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  • Vivek Shah PGEC

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    jigarso
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    This paper proposes a greedy graph algorithm for achieving high throughput soft MIMO detection. It solves the hard and soft MIMO detection problem using a greedy algorithm that performs edge reduction and path extension through graphical and mathematical methods. Simulation results show the greedy algorithm achieves a lower bit error rate than the maximum K-best algorithm. A VLSI architecture is developed for sample systems and achieves a throughput of 600Mbps, with good latency, area, and BER performance compared to other solutions.

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    This paper proposes a greedy graph algorithm for achieving high throughput soft MIMO detection. It solves the hard and soft MIMO detection problem using a greedy algorithm that performs edge reduction and path extension through graphical and mathematical methods. Simulation results show the greedy algorithm achieves a lower bit error rate than the maximum K-best algorithm. A VLSI architecture is developed for sample systems and achieves a throughput of 600Mbps, with good latency, area, and BER performance compared to other solutions.

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    Attribution Non-Commercial (BY-NC)
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    11 views1 page

    Vivek Shah PGEC

    Uploaded by

    jigarso
    This paper proposes a greedy graph algorithm for achieving high throughput soft MIMO detection. It solves the hard and soft MIMO detection problem using a greedy algorithm that performs edge reduction and path extension through graphical and mathematical methods. Simulation results show the greedy algorithm achieves a lower bit error rate than the maximum K-best algorithm. A VLSI architecture is developed for sample systems and achieves a throughput of 600Mbps, with good latency, area, and BER performance compared to other solutions.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOCX, PDF, TXT or read online from Scribd
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    High Throughput VLSI Architecture For Soft Output MIMO Detection

    Objective:
    The Objective of this paper is to study A greedy graph algorithm for achieving the high throughput soft MIMO(Multiple input Multiple output) detection.

    Research Methodologies:
    A Greedy Algorithm Simulation and graphical analysis VLSI Architecture Design

    Analysis:
    Here in this paper the hard as well as soft MIMO detection problem which was in the K-best algorithm is solved using a greedy algorithm. In that edge reduction and path extension is done by the graphical as well as the mathematical method. Then it is taken two sample system for comparison of BER(bit error rate). Using simulation results we can easily identify that for both the cases the BER for greedy algorithm is still better than the maximum value of K in K-best algorithm. Then the VLSI architecture is developed for that sample system and is represented by block diagram. Also Hardware scheduling is done using timing diagram and simple equation. It is also shown by the VLSI implementation result. Also comparison of various parameters are shown in table. With some trade off we can say that we can improve throughput by this method.

    Conclusion:
    The detector based on a Greedy Graph Algorithm can achieve very high throughput of 600Mbps. Comparing with other solutions this detector is good in throughput, latency, area and BER performance.

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