#define FIQ_ID 0 Fast interrupt. #define SYSC_ID 1 System controller. #define PIOA_ID 2 Parallel I/O controller A.

#define PIOB_ID 3 Parallel I/O controller B. #define PIOC_ID 4 Parallel I/O controller C. #define ADC_ID 5 Analog to digital converter. #define US0_ID 6 USART 0. #define US1_ID 7 USART 1. #define US2_ID 8 USART 2. #define MCI_ID 9 MMC interface. #define UDP_ID 10 USB device port. #define TWI_ID 11 Two wire interface 0. #define SPI0_ID 12 Serial peripheral 0. #define SPI1_ID 13 Serial peripheral 1. #define SSC_ID 14 Serial peripheral interface. #define TC0_ID 17 Timer/counter 0. #define TC1_ID 18 Timer/counter 1. #define TC2_ID 19 Timer/counter 2. #define UHP_ID 20 USB host port. #define EMAC_ID 21 Ethernet MAC. #define ISI_ID 22 Image sensor interface.

#define US3_ID 23 USART 3. #define US4_ID 24 USART 4. #define TWI1_ID 25 Two wire interface 1. #define TC3_ID 26 Timer/counter 3. #define TC4_ID 27 Timer/counter 4. #define TC5_ID 28 Timer/counter 5. #define IRQ0_ID 29 External interrupt 0. #define IRQ1_ID 30 External interrupt 1. #define IRQ2_ID 31 External interrupt 2.

USART Peripheral Multiplexing

#define PA31_SCK0_A 31 Channel 0 serial clock pin. #define PB4_TXD0_A 4 Channel 0 transmit data pin. #define PB5_RXD0_A 5 Channel 0 receive data pin. #define PB27_CTS0_A 27 Channel 0 clear to send pin. #define PB26_RTS0_A 26 Channel 0 request to send pin. #define PB25_RI0_A 25 Channel 0 ring indicator pin. #define PB22_DSR0_A 22 Channel 0 data set ready pin. #define PB23_DCD0_A 23 Channel 0 data carrier detect pin. #define PB24_DTR0_A 24 Channel 0 data terminal ready pin. #define PA29_SCK1_A 29 Channel 1 serial clock pin. #define PB6_TXD1_A 6 Channel 1 transmit data pin.

#define PB7_RXD1_A 7 Channel 1 receive data pin. #define PB29_CTS1_A 29 Channel 1 clear to send pin. #define PB28_RTS1_A 28 Channel 1 request to send pin. #define PA30_SCK2_A 30 Channel 2 serial clock pin. #define PB8_TXD2_A 8 Channel 2 transmit data pin. #define PB9_RXD2_A 9 Channel 2 receive data pin. #define PA5_CTS2_A 5 Channel 2 clear to send pin. #define PA4_RTS2_A 4 Channel 2 request to send pin. #define PC0_SCK3_B 0 Channel 3 serial clock pin. #define PB10_TXD3_A 10 Channel 3 transmit data pin. #define PB11_RXD3_A 11 Channel 3 receive data pin. #define PC10_CTS3_B 10 Channel 3 clear to send pin. #define PC8_RTS3_B 8 Channel 3 request to send pin. #define PA31_TXD4_B 31 Channel 4 transmit data pin. #define PA30_RXD4_B 30 Channel 4 receive data pin.

SPI Peripheral Multiplexing

#define PA0_SPI0_MISO_A 0 Channel 0 master input slave output pin. #define PA1_SPI0_MOSI_A 1 Channel 0 master output slave input pin. #define PA2_SPI0_SPCK_A 2 Channel 0 serial clock pin. #define PA3_SPI0_NPCS0_A 3 Channel 0 chip select 0 pin. #define PC11_SPI0_NPCS1_B 11 Channel 0 chip select 1 pin.

#define PC16_SPI0_NPCS2_B 16 Channel 0 chip select 2 pin. #define PC17_SPI0_NPCS3_B 17 Channel 0 chip select 3 pin. #define SPI0_PINS _BV(PA0_SPI0_MISO_A) | _BV(PA1_SPI0_MOSI_A) | _BV(PA2_SPI0_SPCK_A) #define SPI0_PIO_BASE PIOA_BASE #define SPI0_PSR_OFF PIO_ASR_OFF #define SPI0_CS0_PIN _BV(PA3_SPI0_NPCS0_A) #define SPI0_CS0_PIO_BASE PIOA_BASE #define SPI0_CS0_PSR_OFF PIO_ASR_OFF #define SPI0_CS1_PIN _BV(PC11_SPI0_NPCS1_B) #define SPI0_CS1_PIO_BASE PIOC_BASE #define SPI0_CS1_PSR_OFF PIO_BSR_OFF #define PB0_SPI1_MISO_A 0 Channel 1 master input slave output pin. #define PB1_SPI1_MOSI_A 1 Channel 1 master output slave input pin. #define PB2_SPI1_SPCK_A 2 Channel 1 serial clock pin. #define PB3_SPI1_NPCS0_A 3 Channel 1 chip select 0 pin. #define PC5_SPI1_NPCS1_B 5 Channel 1 chip select 1 pin. #define PC18_SPI1_NPCS1_B 18 Channel 1 chip select 1 pin. #define PC4_SPI1_NPCS2_B 4 Channel 1 chip select 2 pin. #define PC19_SPI1_NPCS2_B 19 Channel 1 chip select 2 pin. #define PC3_SPI1_NPCS3_B 3 Channel 1 chip select 3 pin. #define PC20_SPI1_NPCS3_B 20 Channel 1 chip select 3 pin. #define SPI1_PINS _BV(PB0_SPI1_MISO_A) | _BV(PB1_SPI1_MOSI_A) | _BV(PB2_SPI1_SPCK_A) #define SPI1_PIO_BASE PIOB_BASE #define SPI1_PSR_OFF PIO_ASR_OFF #define SPI1_CS0_PIN _BV(PB3_SPI1_NPCS0_A) #define SPI1_CS0_PIO_BASE PIOB_BASE #define SPI1_CS0_PSR_OFF PIO_ASR_OFF #define SPI1_CS3_PIN _BV(PC3_SPI1_NPCS3_B)

#define SPI1_CS3_PIO_BASE PIOC_BASE #define SPI1_CS3_PSR_OFF PIO_BSR_OFF

Image Sensor Interface Peripheral Multiplexing

#define PB20_ISI_D0_B 20 Image sensor data bit 0 pin. #define PB21_ISI_D1_B 21 Image sensor data bit 1 pin. #define PB22_ISI_D2_B 22 Image sensor data bit 2 pin. #define PB23_ISI_D3_B 23 Image sensor data bit 3 pin. #define PB24_ISI_D4_B 24 Image sensor data bit 4 pin. #define PB25_ISI_D5_B 25 Image sensor data bit 5 pin. #define PB26_ISI_D6_B 26 Image sensor data bit 6 pin. #define PB27_ISI_D7_B 27 Image sensor data bit 7 pin. #define PB10_ISI_D8_B 10 Image sensor data bit 8 pin. #define PB11_ISI_D9_B 11 Image sensor data bit 9 pin. #define PB12_ISI_D10_B 12 Image sensor data bit 10 pin. #define PB13_ISI_D11_B 13 Image sensor data bit 11 pin. #define PB28_ISI_PCK_B 28 Image sensor data clock pin. #define PB29_ISI_VSYNC_B 29 Image sensor vertical sync pin. #define PB30_ISI_HSYNC_B 30 Image sensor horizontal sync pin. #define PB31_ISI_MCK_B 31 Image sensor reference clock pin.

MultiMedia Card and SDCard Interface Peripheral Multiplexing

#define PA8_MCCK_A 8 MultiMedia card clock pin. #define PA7_MCCDA_A 7 MultiMedia card slot A command pin.

#define PA6_MCDA0_A 6 MultiMedia card slot A data bit 0 pin. #define PA9_MCDA1_A 9 MultiMedia card slot A data bit 1 pin. #define PA10_MCDA2_A 10 MultiMedia card slot A data bit 2 pin. #define PA11_MCDA3_A 11 MultiMedia card slot A data bit 3 pin. #define PA1_MCCDB_B 1 MultiMedia card slot B command pin. #define PA0_MCDB0_B 0 MultiMedia card slot B data bit 0 pin. #define PA5_MCDB1_B 5 MultiMedia card slot B data bit 1 pin. #define PA4_MCDB2_B 4 MultiMedia card slot B data bit 2 pin. #define PA3_MCDB3_B 3 MultiMedia card slot B data bit 3 pin.

EMAC Interface Peripheral Multiplexing

#define PA10_ETX2_B 10 Transmit data bit 2 pin. #define PA11_ETX3_B 11 Transmit data bit 3 pin. #define PA12_ETX0_A 12 Transmit data bit 0 pin. #define PA13_ETX1_A 13 Transmit data bit 1 pin. #define PA14_ERX0_A 14 Receive data bit 0 pin. #define PA15_ERX1_A 15 Receive data bit 1 pin. #define PA16_ETXEN_A 16 Transmit enable pin. #define PA17_ERXDV_A 17 Data valid pin. #define PA18_ERXER_A 18 Receive error pin. #define PA19_ETXCK_A 19 Transmit clock pin. #define PA20_EMDC_A 20 Management data clock pin.

#define PA21_EMDIO_A 21 Management data I/O pin. #define PA22_ETXER_B 22 Transmit error pin. #define PA23_ETX2_B 23 Transmit data bit 2 pin. #define PA24_ETX3_B 24 Transmit data bit 3 pin. #define PA25_ERX2_B 25 Receive data bit 2 pin. #define PA26_ERX3_B 26 Receive data bit 3 pin. #define PA27_ERXCK_B 27 Receive clock pin. #define PA28_ECRS_B 28 Carrier sense pin. #define PA29_ECOL_B 29 Collision detect pin. #define PC21_EF100_B 21 Force 100Mbit pin.

ADC Interface Peripheral Multiplexing

#define PA22_ADTRG_A 22 ADC trigger pin.

Debug Unit Peripheral Multiplexing

#define PB14_DRXD_A 14 Debug unit receive data pin. #define PB15_DTXD_A 15 Debug unit transmit data pin.

Synchronous Serial Controller Peripheral Multiplexing

#define PB18_TD0_A 18 Transmit data pin. #define PB19_RD0_A 19 Receive data pin. #define PB16_TK0_A 16 Transmit clock pin. #define PB20_RK0_A 20 Receive clock pin. #define PB17_TF0_A 17 Transmit frame sync. pin. #define PB21_RF0_A 21 Receive frame sync. pin.

Two Wire Interface Peripheral Multiplexing

#define PA23_TWD_A 23 Two wire serial 0 data pin. #define PA24_TWCK_A 24 Two wire serial 0 clock pin. #define PB12_TWD1_A 12 Two wire serial 1 data pin. #define PB13_RWCK1_A 13 Two wire serial 1 clock pin.

Timer/Counter Peripheral Multiplexing

#define PA25_TCLK0_A 25 Timer/counter 0 external clock input. #define PA26_TIOA0_A 26 Timer/counter 0 I/O line A. #define PC9_TIOB0_B 9 Timer/counter 0 I/O line B. #define PB6_TCLK1_B 6 Timer/counter 1 external clock input. #define PA27_TIOA1_A 27 Timer/counter 1 I/O line A. #define PC7_TIOB1_A 7 Timer/counter 1 I/O line B. #define PB7_TCLK2_B 7 Timer/counter 2 external clock input. #define PA28_TIOA2_A 28 Timer/counter 2 I/O line A. #define PC6_TIOB2_A 6 Timer/counter 2 I/O line B. #define PB16_TCLK3_B 16 Timer/counter 3 external clock input. #define PB0_TIOA3_B 0 Timer/counter 3 I/O line A. #define PB1_TIOB3_B 1 Timer/counter 3 I/O line B. #define PB17_TCLK4_B 17 Timer/counter 4 external clock input. #define PB2_TIOA4_B 2 Timer/counter 4 I/O line A. #define PB18_TIOB4_B 18 Timer/counter 4 I/O line B. #define PC22_TCLK5_B 22

Timer/counter 5 external clock input. #define PB3_TIOA5_B 3 Timer/counter 5 I/O line A. #define PB19_TIOB5_B 19 Timer/counter 5 I/O line B.

Clocks, Oscillators and PLLs Peripheral Multiplexing

#define PB30_PCK0_A 30 Programmable clock 0 output pin. #define PC1_PCK0_B 1 Programmable clock 0 output pin. #define PB31_PCK1_A 31 Programmable clock 1 output pin. #define PC2_PCK1_B 2 Programmable clock 1 output pin.

CompactFlash Peripheral Multiplexing

#define PC10_A25_CFRNW_A 10 Read not write pin. #define PC8_NCS4_CFCS0_A 8 Chip select line 0 pin. #define PC9_NCS5_CFCS1_A 9 Chip select line 1 pin. #define PC6_CFCE1_B 6 Chip enable line 1 pin. #define PC7_CFCE2_B 7 Chip enable line 2 pin.

External Bus Interface Peripheral Multiplexing

#define PC16_D16_A 16 Data bus bit 16 pin. #define PC17_D17_A 17 Data bus bit 17 pin. #define PC18_D18_A 18 Data bus bit 18 pin. #define PC19_D19_A 19 Data bus bit 19 pin. #define PC20_D20_A 20 Data bus bit 20 pin. #define PC21_D21_A 21 Data bus bit 21 pin. #define PC22_D22_A 22 Data bus bit 22 pin. #define PC23_D23_A 23

Data bus bit 23 pin. #define PC24_D24_A 24 Data bus bit 24 pin. #define PC25_D25_A 25 Data bus bit 25 pin. #define PC26_D26_A 26 Data bus bit 26 pin. #define PC27_D27_A 27 Data bus bit 27 pin. #define PC28_D28_A 28 Data bus bit 28 pin. #define PC29_D29_A 29 Data bus bit 29 pin. #define PC30_D30_A 30 Data bus bit 30 pin. #define PC31_D31_A 31 Data bus bit 31 pin. #define PC4_A23_A 4 Address bus bit 23 pin. #define PC5_A24_A 5 Address bus bit 24 pin. #define PC11_NCS2_A 11 Negated chip select 2 pin. #define PC14_NCS3_NANDCS_A 14 Negated chip select 3 pin. #define PC13_NCS6_B 13 Negated chip select 6 pin. #define PC12_NCS7_B 12 Negated chip select 7 pin. #define PC15_NWAIT_A 15 External wait signal pin.

Advanced Interrupt Controller Peripheral Multiplexing

#define PC13_FIQ_A 13 Fast interrupt input pin. #define PC12_IRQ0_A 12 External interrupt 0 input pin. #define PC15_IRQ1_B 15 External interrupt 1 input pin. #define PC14_IRQ2_B 14 External interrupt 2 input pin.

Detailed Description
Register definitions.

Define Documentation
#define FIQ_ID 0 Fast interrupt. Definition at line 162 of file at91sam9xe.h. #define SYSC_ID 1 System controller. Definition at line 163 of file at91sam9xe.h. #define PIOA_ID 2 Parallel I/O controller A. Definition at line 164 of file at91sam9xe.h. #define PIOB_ID 3 Parallel I/O controller B. Definition at line 165 of file at91sam9xe.h. #define PIOC_ID 4 Parallel I/O controller C. Definition at line 166 of file at91sam9xe.h. #define ADC_ID 5 Analog to digital converter. Definition at line 167 of file at91sam9xe.h. #define US0_ID 6

USART 0. Definition at line 168 of file at91sam9xe.h. #define US1_ID 7 USART 1. Definition at line 169 of file at91sam9xe.h. #define US2_ID 8 USART 2. Definition at line 170 of file at91sam9xe.h. #define MCI_ID 9 MMC interface. Definition at line 171 of file at91sam9xe.h. #define UDP_ID 10 USB device port. Definition at line 172 of file at91sam9xe.h. #define TWI_ID 11 Two wire interface 0. Definition at line 173 of file at91sam9xe.h. #define SPI0_ID 12 Serial peripheral 0. Definition at line 174 of file at91sam9xe.h. #define SPI1_ID 13 Serial peripheral 1. Definition at line 175 of file at91sam9xe.h.

#define SSC_ID 14 Serial peripheral interface. Definition at line 176 of file at91sam9xe.h. #define TC0_ID 17 Timer/counter 0. Definition at line 177 of file at91sam9xe.h. #define TC1_ID 18 Timer/counter 1. Definition at line 178 of file at91sam9xe.h. #define TC2_ID 19 Timer/counter 2. Definition at line 179 of file at91sam9xe.h. #define UHP_ID 20 USB host port. Definition at line 180 of file at91sam9xe.h. #define EMAC_ID 21 Ethernet MAC. Definition at line 181 of file at91sam9xe.h. #define ISI_ID 22 Image sensor interface. Definition at line 182 of file at91sam9xe.h. #define US3_ID 23 USART 3.

Definition at line 183 of file at91sam9xe.h. #define US4_ID 24 USART 4. Definition at line 184 of file at91sam9xe.h. #define TWI1_ID 25 Two wire interface 1. Definition at line 185 of file at91sam9xe.h. #define TC3_ID 26 Timer/counter 3. Definition at line 186 of file at91sam9xe.h. #define TC4_ID 27 Timer/counter 4. Definition at line 187 of file at91sam9xe.h. #define TC5_ID 28 Timer/counter 5. Definition at line 188 of file at91sam9xe.h. #define IRQ0_ID 29 External interrupt 0. Definition at line 189 of file at91sam9xe.h. #define IRQ1_ID 30 External interrupt 1. Definition at line 190 of file at91sam9xe.h. #define IRQ2_ID 31

External interrupt 2. Definition at line 191 of file at91sam9xe.h. #define PA31_SCK0_A 31 Channel 0 serial clock pin. Definition at line 197 of file at91sam9xe.h. #define PB4_TXD0_A 4 Channel 0 transmit data pin. Definition at line 198 of file at91sam9xe.h. #define PB5_RXD0_A 5 Channel 0 receive data pin. Definition at line 199 of file at91sam9xe.h. #define PB27_CTS0_A 27 Channel 0 clear to send pin. Definition at line 200 of file at91sam9xe.h. #define PB26_RTS0_A 26 Channel 0 request to send pin. Definition at line 201 of file at91sam9xe.h. #define PB25_RI0_A 25 Channel 0 ring indicator pin. Definition at line 202 of file at91sam9xe.h. #define PB22_DSR0_A 22 Channel 0 data set ready pin. Definition at line 203 of file at91sam9xe.h.

#define PB23_DCD0_A 23 Channel 0 data carrier detect pin. Definition at line 204 of file at91sam9xe.h. #define PB24_DTR0_A 24 Channel 0 data terminal ready pin. Definition at line 205 of file at91sam9xe.h. #define PA29_SCK1_A 29 Channel 1 serial clock pin. Definition at line 207 of file at91sam9xe.h. #define PB6_TXD1_A 6 Channel 1 transmit data pin. Definition at line 208 of file at91sam9xe.h. #define PB7_RXD1_A 7 Channel 1 receive data pin. Definition at line 209 of file at91sam9xe.h. #define PB29_CTS1_A 29 Channel 1 clear to send pin. Definition at line 210 of file at91sam9xe.h. #define PB28_RTS1_A 28 Channel 1 request to send pin. Definition at line 211 of file at91sam9xe.h. #define PA30_SCK2_A 30 Channel 2 serial clock pin.

Definition at line 213 of file at91sam9xe.h. #define PB8_TXD2_A 8 Channel 2 transmit data pin. Definition at line 214 of file at91sam9xe.h. #define PB9_RXD2_A 9 Channel 2 receive data pin. Definition at line 215 of file at91sam9xe.h. #define PA5_CTS2_A 5 Channel 2 clear to send pin. Definition at line 216 of file at91sam9xe.h. #define PA4_RTS2_A 4 Channel 2 request to send pin. Definition at line 217 of file at91sam9xe.h. #define PC0_SCK3_B 0 Channel 3 serial clock pin. Definition at line 219 of file at91sam9xe.h. #define PB10_TXD3_A 10 Channel 3 transmit data pin. Definition at line 220 of file at91sam9xe.h. #define PB11_RXD3_A 11 Channel 3 receive data pin. Definition at line 221 of file at91sam9xe.h. #define PC10_CTS3_B 10

Channel 3 clear to send pin. Definition at line 222 of file at91sam9xe.h. #define PC8_RTS3_B 8 Channel 3 request to send pin. Definition at line 223 of file at91sam9xe.h. #define PA31_TXD4_B 31 Channel 4 transmit data pin. Definition at line 225 of file at91sam9xe.h. #define PA30_RXD4_B 30 Channel 4 receive data pin. Definition at line 226 of file at91sam9xe.h. #define PA0_SPI0_MISO_A 0 Channel 0 master input slave output pin. Definition at line 231 of file at91sam9xe.h. #define PA1_SPI0_MOSI_A 1 Channel 0 master output slave input pin. Definition at line 232 of file at91sam9xe.h. #define PA2_SPI0_SPCK_A 2 Channel 0 serial clock pin. Definition at line 233 of file at91sam9xe.h. #define PA3_SPI0_NPCS0_A 3 Channel 0 chip select 0 pin. Definition at line 234 of file at91sam9xe.h.

#define PC11_SPI0_NPCS1_B 11 Channel 0 chip select 1 pin. Definition at line 235 of file at91sam9xe.h. #define PC16_SPI0_NPCS2_B 16 Channel 0 chip select 2 pin. Definition at line 236 of file at91sam9xe.h. #define PC17_SPI0_NPCS3_B 17 Channel 0 chip select 3 pin. Definition at line 237 of file at91sam9xe.h. #define SPI0_PINS _BV(PA0_SPI0_MISO_A) | _BV(PA1_SPI0_MOSI_A) | _BV(PA2_SPI0_SPCK_A) Definition at line 239 of file at91sam9xe.h. #define SPI0_PIO_BASE PIOA_BASE Definition at line 240 of file at91sam9xe.h. #define SPI0_PSR_OFF PIO_ASR_OFF Definition at line 241 of file at91sam9xe.h. #define SPI0_CS0_PIN _BV(PA3_SPI0_NPCS0_A) Definition at line 243 of file at91sam9xe.h. #define SPI0_CS0_PIO_BASE PIOA_BASE Definition at line 244 of file at91sam9xe.h. #define SPI0_CS0_PSR_OFF PIO_ASR_OFF Definition at line 245 of file at91sam9xe.h. #define SPI0_CS1_PIN _BV(PC11_SPI0_NPCS1_B)

Definition at line 247 of file at91sam9xe.h. #define SPI0_CS1_PIO_BASE PIOC_BASE Definition at line 248 of file at91sam9xe.h. #define SPI0_CS1_PSR_OFF PIO_BSR_OFF Definition at line 249 of file at91sam9xe.h. #define PB0_SPI1_MISO_A 0 Channel 1 master input slave output pin. Definition at line 251 of file at91sam9xe.h. #define PB1_SPI1_MOSI_A 1 Channel 1 master output slave input pin. Definition at line 252 of file at91sam9xe.h. #define PB2_SPI1_SPCK_A 2 Channel 1 serial clock pin. Definition at line 253 of file at91sam9xe.h. #define PB3_SPI1_NPCS0_A 3 Channel 1 chip select 0 pin. Definition at line 254 of file at91sam9xe.h. #define PC5_SPI1_NPCS1_B 5 Channel 1 chip select 1 pin. Definition at line 255 of file at91sam9xe.h. #define PC18_SPI1_NPCS1_B 18 Channel 1 chip select 1 pin. Definition at line 256 of file at91sam9xe.h.

#define PC4_SPI1_NPCS2_B 4 Channel 1 chip select 2 pin. Definition at line 257 of file at91sam9xe.h. #define PC19_SPI1_NPCS2_B 19 Channel 1 chip select 2 pin. Definition at line 258 of file at91sam9xe.h. #define PC3_SPI1_NPCS3_B 3 Channel 1 chip select 3 pin. Definition at line 259 of file at91sam9xe.h. #define PC20_SPI1_NPCS3_B 20 Channel 1 chip select 3 pin. Definition at line 260 of file at91sam9xe.h. #define SPI1_PINS _BV(PB0_SPI1_MISO_A) | _BV(PB1_SPI1_MOSI_A) | _BV(PB2_SPI1_SPCK_A) Definition at line 262 of file at91sam9xe.h. #define SPI1_PIO_BASE PIOB_BASE Definition at line 263 of file at91sam9xe.h. #define SPI1_PSR_OFF PIO_ASR_OFF Definition at line 264 of file at91sam9xe.h. #define SPI1_CS0_PIN _BV(PB3_SPI1_NPCS0_A) Definition at line 266 of file at91sam9xe.h. #define SPI1_CS0_PIO_BASE PIOB_BASE Definition at line 267 of file at91sam9xe.h.

#define SPI1_CS0_PSR_OFF PIO_ASR_OFF Definition at line 268 of file at91sam9xe.h. #define SPI1_CS3_PIN _BV(PC3_SPI1_NPCS3_B) Definition at line 271 of file at91sam9xe.h. #define SPI1_CS3_PIO_BASE PIOC_BASE Definition at line 272 of file at91sam9xe.h. #define SPI1_CS3_PSR_OFF PIO_BSR_OFF Definition at line 273 of file at91sam9xe.h. #define PB20_ISI_D0_B 20 Image sensor data bit 0 pin. Definition at line 280 of file at91sam9xe.h. #define PB21_ISI_D1_B 21 Image sensor data bit 1 pin. Definition at line 281 of file at91sam9xe.h. #define PB22_ISI_D2_B 22 Image sensor data bit 2 pin. Definition at line 282 of file at91sam9xe.h. #define PB23_ISI_D3_B 23 Image sensor data bit 3 pin. Definition at line 283 of file at91sam9xe.h. #define PB24_ISI_D4_B 24 Image sensor data bit 4 pin. Definition at line 284 of file at91sam9xe.h.

#define PB25_ISI_D5_B 25 Image sensor data bit 5 pin. Definition at line 285 of file at91sam9xe.h. #define PB26_ISI_D6_B 26 Image sensor data bit 6 pin. Definition at line 286 of file at91sam9xe.h. #define PB27_ISI_D7_B 27 Image sensor data bit 7 pin. Definition at line 287 of file at91sam9xe.h. #define PB10_ISI_D8_B 10 Image sensor data bit 8 pin. Definition at line 288 of file at91sam9xe.h. #define PB11_ISI_D9_B 11 Image sensor data bit 9 pin. Definition at line 289 of file at91sam9xe.h. #define PB12_ISI_D10_B 12 Image sensor data bit 10 pin. Definition at line 290 of file at91sam9xe.h. #define PB13_ISI_D11_B 13 Image sensor data bit 11 pin. Definition at line 291 of file at91sam9xe.h. #define PB28_ISI_PCK_B 28 Image sensor data clock pin.

Definition at line 292 of file at91sam9xe.h. #define PB29_ISI_VSYNC_B 29 Image sensor vertical sync pin. Definition at line 293 of file at91sam9xe.h. #define PB30_ISI_HSYNC_B 30 Image sensor horizontal sync pin. Definition at line 294 of file at91sam9xe.h. #define PB31_ISI_MCK_B 31 Image sensor reference clock pin. Definition at line 295 of file at91sam9xe.h. #define PA8_MCCK_A 8 MultiMedia card clock pin. Definition at line 300 of file at91sam9xe.h. #define PA7_MCCDA_A 7 MultiMedia card slot A command pin. Definition at line 301 of file at91sam9xe.h. #define PA6_MCDA0_A 6 MultiMedia card slot A data bit 0 pin. Definition at line 302 of file at91sam9xe.h. #define PA9_MCDA1_A 9 MultiMedia card slot A data bit 1 pin. Definition at line 303 of file at91sam9xe.h. #define PA10_MCDA2_A 10

MultiMedia card slot A data bit 2 pin. Definition at line 304 of file at91sam9xe.h. #define PA11_MCDA3_A 11 MultiMedia card slot A data bit 3 pin. Definition at line 305 of file at91sam9xe.h. #define PA1_MCCDB_B 1 MultiMedia card slot B command pin. Definition at line 306 of file at91sam9xe.h. #define PA0_MCDB0_B 0 MultiMedia card slot B data bit 0 pin. Definition at line 307 of file at91sam9xe.h. #define PA5_MCDB1_B 5 MultiMedia card slot B data bit 1 pin. Definition at line 308 of file at91sam9xe.h. #define PA4_MCDB2_B 4 MultiMedia card slot B data bit 2 pin. Definition at line 309 of file at91sam9xe.h. #define PA3_MCDB3_B 3 MultiMedia card slot B data bit 3 pin. Definition at line 310 of file at91sam9xe.h. #define PA10_ETX2_B 10 Transmit data bit 2 pin. Definition at line 315 of file at91sam9xe.h.

#define PA11_ETX3_B 11 Transmit data bit 3 pin. Definition at line 316 of file at91sam9xe.h. #define PA12_ETX0_A 12 Transmit data bit 0 pin. Definition at line 317 of file at91sam9xe.h. #define PA13_ETX1_A 13 Transmit data bit 1 pin. Definition at line 318 of file at91sam9xe.h. #define PA14_ERX0_A 14 Receive data bit 0 pin. Definition at line 319 of file at91sam9xe.h. #define PA15_ERX1_A 15 Receive data bit 1 pin. Definition at line 320 of file at91sam9xe.h. #define PA16_ETXEN_A 16 Transmit enable pin. Definition at line 321 of file at91sam9xe.h. #define PA17_ERXDV_A 17 Data valid pin. Definition at line 322 of file at91sam9xe.h. #define PA18_ERXER_A 18 Receive error pin.

Definition at line 323 of file at91sam9xe.h. #define PA19_ETXCK_A 19 Transmit clock pin. Definition at line 324 of file at91sam9xe.h. #define PA20_EMDC_A 20 Management data clock pin. Definition at line 325 of file at91sam9xe.h. #define PA21_EMDIO_A 21 Management data I/O pin. Definition at line 326 of file at91sam9xe.h. #define PA22_ETXER_B 22 Transmit error pin. Definition at line 327 of file at91sam9xe.h. #define PA23_ETX2_B 23 Transmit data bit 2 pin. Definition at line 328 of file at91sam9xe.h. #define PA24_ETX3_B 24 Transmit data bit 3 pin. Definition at line 329 of file at91sam9xe.h. #define PA25_ERX2_B 25 Receive data bit 2 pin. Definition at line 330 of file at91sam9xe.h. #define PA26_ERX3_B 26

Receive data bit 3 pin. Definition at line 331 of file at91sam9xe.h. #define PA27_ERXCK_B 27 Receive clock pin. Definition at line 332 of file at91sam9xe.h. #define PA28_ECRS_B 28 Carrier sense pin. Definition at line 333 of file at91sam9xe.h. #define PA29_ECOL_B 29 Collision detect pin. Definition at line 334 of file at91sam9xe.h. #define PC21_EF100_B 21 Force 100Mbit pin. Definition at line 335 of file at91sam9xe.h. #define PA22_ADTRG_A 22 ADC trigger pin. Definition at line 340 of file at91sam9xe.h. #define PB14_DRXD_A 14 Debug unit receive data pin. Definition at line 345 of file at91sam9xe.h. #define PB15_DTXD_A 15 Debug unit transmit data pin. Definition at line 346 of file at91sam9xe.h.

#define PB18_TD0_A 18 Transmit data pin. Definition at line 351 of file at91sam9xe.h. #define PB19_RD0_A 19 Receive data pin. Definition at line 352 of file at91sam9xe.h. #define PB16_TK0_A 16 Transmit clock pin. Definition at line 353 of file at91sam9xe.h. #define PB20_RK0_A 20 Receive clock pin. Definition at line 354 of file at91sam9xe.h. #define PB17_TF0_A 17 Transmit frame sync. pin. Definition at line 355 of file at91sam9xe.h. #define PB21_RF0_A 21 Receive frame sync. pin. Definition at line 356 of file at91sam9xe.h. #define PA23_TWD_A 23 Two wire serial 0 data pin. Definition at line 361 of file at91sam9xe.h. #define PA24_TWCK_A 24 Two wire serial 0 clock pin.

Definition at line 362 of file at91sam9xe.h. #define PB12_TWD1_A 12 Two wire serial 1 data pin. Definition at line 364 of file at91sam9xe.h. #define PB13_RWCK1_A 13 Two wire serial 1 clock pin. Definition at line 365 of file at91sam9xe.h. #define PA25_TCLK0_A 25 Timer/counter 0 external clock input. Definition at line 370 of file at91sam9xe.h. #define PA26_TIOA0_A 26 Timer/counter 0 I/O line A. Definition at line 371 of file at91sam9xe.h. #define PC9_TIOB0_B 9 Timer/counter 0 I/O line B. Definition at line 372 of file at91sam9xe.h. #define PB6_TCLK1_B 6 Timer/counter 1 external clock input. Definition at line 374 of file at91sam9xe.h. #define PA27_TIOA1_A 27 Timer/counter 1 I/O line A. Definition at line 375 of file at91sam9xe.h. #define PC7_TIOB1_A 7

Timer/counter 1 I/O line B. Definition at line 376 of file at91sam9xe.h. #define PB7_TCLK2_B 7 Timer/counter 2 external clock input. Definition at line 378 of file at91sam9xe.h. #define PA28_TIOA2_A 28 Timer/counter 2 I/O line A. Definition at line 379 of file at91sam9xe.h. #define PC6_TIOB2_A 6 Timer/counter 2 I/O line B. Definition at line 380 of file at91sam9xe.h. #define PB16_TCLK3_B 16 Timer/counter 3 external clock input. Definition at line 382 of file at91sam9xe.h. #define PB0_TIOA3_B 0 Timer/counter 3 I/O line A. Definition at line 383 of file at91sam9xe.h. #define PB1_TIOB3_B 1 Timer/counter 3 I/O line B. Definition at line 384 of file at91sam9xe.h. #define PB17_TCLK4_B 17 Timer/counter 4 external clock input. Definition at line 386 of file at91sam9xe.h.

#define PB2_TIOA4_B 2 Timer/counter 4 I/O line A. Definition at line 387 of file at91sam9xe.h. #define PB18_TIOB4_B 18 Timer/counter 4 I/O line B. Definition at line 388 of file at91sam9xe.h. #define PC22_TCLK5_B 22 Timer/counter 5 external clock input. Definition at line 390 of file at91sam9xe.h. #define PB3_TIOA5_B 3 Timer/counter 5 I/O line A. Definition at line 391 of file at91sam9xe.h. #define PB19_TIOB5_B 19 Timer/counter 5 I/O line B. Definition at line 392 of file at91sam9xe.h. #define PB30_PCK0_A 30 Programmable clock 0 output pin. Definition at line 397 of file at91sam9xe.h. #define PC1_PCK0_B 1 Programmable clock 0 output pin. Definition at line 398 of file at91sam9xe.h. #define PB31_PCK1_A 31 Programmable clock 1 output pin.

Definition at line 399 of file at91sam9xe.h. #define PC2_PCK1_B 2 Programmable clock 1 output pin. Definition at line 400 of file at91sam9xe.h. #define PC10_A25_CFRNW_A 10 Read not write pin. Definition at line 405 of file at91sam9xe.h. #define PC8_NCS4_CFCS0_A 8 Chip select line 0 pin. Definition at line 406 of file at91sam9xe.h. #define PC9_NCS5_CFCS1_A 9 Chip select line 1 pin. Definition at line 407 of file at91sam9xe.h. #define PC6_CFCE1_B 6 Chip enable line 1 pin. Definition at line 408 of file at91sam9xe.h. #define PC7_CFCE2_B 7 Chip enable line 2 pin. Definition at line 409 of file at91sam9xe.h. #define PC16_D16_A 16 Data bus bit 16 pin. Definition at line 414 of file at91sam9xe.h. #define PC17_D17_A 17

Data bus bit 17 pin. Definition at line 415 of file at91sam9xe.h. #define PC18_D18_A 18 Data bus bit 18 pin. Definition at line 416 of file at91sam9xe.h. #define PC19_D19_A 19 Data bus bit 19 pin. Definition at line 417 of file at91sam9xe.h. #define PC20_D20_A 20 Data bus bit 20 pin. Definition at line 418 of file at91sam9xe.h. #define PC21_D21_A 21 Data bus bit 21 pin. Definition at line 419 of file at91sam9xe.h. #define PC22_D22_A 22 Data bus bit 22 pin. Definition at line 420 of file at91sam9xe.h. #define PC23_D23_A 23 Data bus bit 23 pin. Definition at line 421 of file at91sam9xe.h. #define PC24_D24_A 24 Data bus bit 24 pin. Definition at line 422 of file at91sam9xe.h.

#define PC25_D25_A 25 Data bus bit 25 pin. Definition at line 423 of file at91sam9xe.h. #define PC26_D26_A 26 Data bus bit 26 pin. Definition at line 424 of file at91sam9xe.h. #define PC27_D27_A 27 Data bus bit 27 pin. Definition at line 425 of file at91sam9xe.h. #define PC28_D28_A 28 Data bus bit 28 pin. Definition at line 426 of file at91sam9xe.h. #define PC29_D29_A 29 Data bus bit 29 pin. Definition at line 427 of file at91sam9xe.h. #define PC30_D30_A 30 Data bus bit 30 pin. Definition at line 428 of file at91sam9xe.h. #define PC31_D31_A 31 Data bus bit 31 pin. Definition at line 429 of file at91sam9xe.h. #define PC4_A23_A 4 Address bus bit 23 pin.

Definition at line 430 of file at91sam9xe.h. #define PC5_A24_A 5 Address bus bit 24 pin. Definition at line 431 of file at91sam9xe.h. #define PC11_NCS2_A 11 Negated chip select 2 pin. Definition at line 432 of file at91sam9xe.h. #define PC14_NCS3_NANDCS_A 14 Negated chip select 3 pin. Definition at line 433 of file at91sam9xe.h. #define PC13_NCS6_B 13 Negated chip select 6 pin. Definition at line 434 of file at91sam9xe.h. #define PC12_NCS7_B 12 Negated chip select 7 pin. Definition at line 435 of file at91sam9xe.h. #define PC15_NWAIT_A 15 External wait signal pin. Definition at line 436 of file at91sam9xe.h. #define PC13_FIQ_A 13 Fast interrupt input pin. Definition at line 441 of file at91sam9xe.h. #define PC12_IRQ0_A 12

External interrupt 0 input pin. Definition at line 442 of file at91sam9xe.h. #define PC15_IRQ1_B 15 External interrupt 1 input pin. Definition at line 443 of file at91sam9xe.h. #define PC14_IRQ2_B 14 External interrupt 2 input pin. Definition at line 444 of file at91sam9xe.h.
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