01 75 Pac 12

NAVAIR 01-75PAC-12
TECHNICAL MANUAL
CREW STATION MAINTENANCE ORGANIZATIONAL
TECHNICIAN
NAVY MODEL P-3C AIRCRAFT
DISTRIBUTION STATEMENT C. Distribution authorized to U.S. Government agencies only and their contractors to protect publications required for official use or for administrative or operational purposes only (15 July 1991). Other requests for this document shall be referred to Commander, Naval Air Systems Command (PMA--290), RADM William A Moffett Bldg, 47123 Buse Rd Bldg 2272, Patuxent River, MD 20670--1547. DESTRUCTION NOTICE - For unclassified, limited documents, destroy by any method that will prevent disclosure of contents or reconstruction of the document. Published by Direction of Commander, Naval Air Systems Command
0801LP1102493
1 JUNE 2004
Change 13 - 15 May 2010
NAVAIR 01-75PAC-12
LIST OF EFFECTIVE PAGES

Insert latest changed pages; dispose of superseded pages in accordance with applicable regulations. NOTE: On a changed page, the portion of the text affected by the latest change is indicated by a vertical line, or other change symbol, in the outer margins of a two column page. On a three column page the change symbols will be located in the left margin for the left and center columns and the right margin for the right column. Changes to illustrations are indicated by miniature pointing hands. Changes to wiring diagrams are indicated by shaded areas. Dates of issue: Original . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Jun 2004 (Inc. through IRAC 5) Change 1 . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Mar 2005 Change 2 . . . . . . . . . . . . . . . . . . . . . . . . . 30 May 2005 Change 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Jan 2006 Change 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Feb 2007 Change 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Mar 2007 Change 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Jul 2007 Change 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Sep 2007 Change 8 . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Jan 2008 Change 9 . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Jun 2008 Change 10 . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Oct 2008 Change 11 . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Apr 2009 Change 12 . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Jun 2009 Change 13 . . . . . . . . . . . . . . . . . . . . . . . . 15 May 2010
Total number of pages in this manual is 548, consisting of the following: Page No. # Change No. Page No. # Change No. Page No. # Change No. Page No. # Change No. Title . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 i.....................................................2 ii . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 iii . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 iv blank . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 1-1 - 1-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 1-3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1-4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 1-5 - 1-6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 1-7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 1-8 - 1-9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 1-10 - 1-12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 1-13 - 1-14 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 1-15 - 1-18 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 1-19 - 1-20 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 1-21 - 1-22 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2-2 - 2-3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2-4 - 2-10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 2-11 - 2-12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2-13 - 2-16 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 2-17 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2-18 - 2-22 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 2A-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2A-2 - 2A-4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2A-4A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2A-4B blank . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2A-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2A-6 - 2A-18 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2A-19 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2A-20 blank . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2B-1 - 2B-14 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3-1 blank . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 3-2 - 3-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 3-9 blank . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 3-10 - 3-18 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 4-1 blank . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 4-2 - 4-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 4-6 - 4-34 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 4A-1 - 4A-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4A-3 - 4A-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4A-6 - 4A-7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4A-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 4A-9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4A-10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 4A-11 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4A-12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 4A-13 - 4A-15 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4A-16 - 4A-35 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 4A-36 blank . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 4A-37 - 4A-50 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 4A-51 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4A-52 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 4B-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4B-2 - 4B-4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4B-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4B-6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4B-7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4B-7A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4B-7B blank . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4B-8 - 4B-9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 4B-10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 4B-11 - 4B-20 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 4B-21 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 4B-22 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4B-23 - 4B-86 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 5-1 blank . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5-2 - 5-4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5-5 - 5-21 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 5-22 blank . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 6-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6-2 - 6-16 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 7-1 - 7-17 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 7-18 blank . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 8-1 - 8-27 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 8-28 blank . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 9-1 - 9-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 9-3 blank . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 9-4 - 9-39 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 9-40 blank . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 9A-1 - 9A-10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 9A-11 blank . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 9A-12 - 9A-32 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 9B-1 - 9B-12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 9B-13 blank . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 9B-14 - 9B-31 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 9B-32 blank . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 9C-1 - 9C-24 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 9D-1 - 9D-24 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0
# - Zero in this column indicates an original page. A Change 13
NAVAIR 01-75PAC-12
TABLE OF CONTENTS
Figure SECTION 1 - GENERAL INFORMATION 1-1 1-2 1-3 1-4 1-5 1-6 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 Equipment Location Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 Avionic Subsystem Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4 Crew Station Interface Diagram, Aircraft BUNO 156507 through 158927 and 158929 through 159329 Not Incorporating AFC 450 and AFC 506 . . . . . . . . . . . . . . . . . . . . . 1-5 Crew Station Interface Diagram, Aircraft BUNO 158928, 159504 through 161596 Not Incorporating AFC 450 and AFC 506 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6 Crew Station Interface Diagram, Aircraft BUNO 156507 through158927 and 158929 through 161596 Incorporating AFC 450 and AFC 506 and Aircraft 161762 and Subsequent Incorporating AFC 506 . . . . . . . . . . . . . . . . . . 1-7 Crew Station Interface Diagram (Applicable to Aircraft Incorporating AFC 607) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-8 Ground/Air Sensing Signal Flow Diagram . . . . . . . . . . . . . . . . . 1-9 Electronic Rack Overheat Warning Diagram, Aircraft BUNO 156507, 158928, 159503 through 159886, 159888, 159890 through 161409 and 161411 through 161596 and Aircraft Not Incorporating AFC 450 . . . . . . . . . . 1-10 Electronic Rack Overheat Warning Diagram, Aircraft BUNO 156508 through 158927, 158929 through 159329, 159887 Incorporating AFC 450, 159889, 161410, 161762 and Subsequent . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-11 Tools and Test Equipment Location Diagram . . . . . . . . . . . . . 1-12 Circuit Breaker Panel Location Diagram, Aircraft BUNO 156507 through 161596 Not Incorporating AFC 450 . . . . . . . 1-13 Circuit Breaker Panel Location Diagram, Aircraft 156507 through 161596 Incorporating AFC 450 and Aircraft BUNO 161762 and Subsequent . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-14 Circuit Breaker Panel Location Diagram, (Applicable to Aircraft Incorporating AFC 506) . . . . . . . . . . . . . . . . . . . . . . . . 1-15 Circuit Breaker Panel Location Diagram, (Applicable to Aircraft Incorporating AFC 607) . . . . . . . . . . . . . . . . . . . . . . . . 1-16 Record of Applicable Technical Directives . . . . . . . . . . . . . . . . 1-17 Table of Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-19 Technician Readiness Test Procedures . . . . . . . . . . . . . . . . . . . 2-1 MTT System Test Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-22 DMTS Test Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-24 Page Figure 3-3 3-4 3-5 3-6 3-7 Page Universal Keyset Functional Signal Flow Diagram . . . . . . . . . . 3-5 TACCO Keyset and MDD Tray Functional Signal Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-6 Sensor Station 3 Keyset and SDD Tray Functional Signal Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-10 Ordnance Panel Functional Signal Flow Diagram . . . . . . . . . 3-12 Keyset and Tray Manual Test Procedures . . . . . . . . . . . . . . . . 3-13 Figure 4B-5 4B-6 4B-7 4B-8 4B-9 4B-10 4B-11 4B-12 4B-13 4B-14 4B-15 4B-16 4B-17 4B-18 4B-19 4B-20 4B-21 4B-22 4B-23 4B-24 4B-25 4B-26 4B-27 4B-28 4B-29 4B-30 4B-31 4B-32 4B-33 4B-34 4B-35 4B-36 4B-37 4B-38 4B-39 4B-40 4B-41 4B-42 4B-43 4B-44 4B-45 Page VDC Simplified Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . 4B-8 VDC Signal Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4B-9 VDC Functional Signal Flow Diagram . . . . . . . . . . . . . . . . . 4B-11 DDC, VDC, and CMP Power Distribution Functional Signal Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4B-16 DDC, VDC and CMP Location Diagram . . . . . . . . . . . . . . . 4B-17 Computer Maintenance Panel Controls and Indicators . . . 4B-18 Computer Maintenance Panel BIT . . . . . . . . . . . . . . . . . . . . 4B-19 DDC and VDC Control Panel Controls and Indicators . . . . 4B-20 DDC Module Function and Interchangeability . . . . . . . . . . . 4B-21 DDC Module Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 4B-23 VDC Module Function and Interchangeability . . . . . . . . . . . 4B-24 VDC Module Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 4B-26 DDC Characteristics and Troubleshooting . . . . . . . . . . . . . 4B-27 VDC Characteristics and Troubleshooting . . . . . . . . . . . . . . 4B-34 Console Functional Block Diagram . . . . . . . . . . . . . . . . . . . . 4B-42 Console Signal Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . 4B-44 Console Functional Signal Flow Diagram . . . . . . . . . . . . . . 4B-46 Console Equipment Location . . . . . . . . . . . . . . . . . . . . . . . . . 4B-52 FPD Controls, Indicators, and Characteristics . . . . . . . . . . 4B-54 FPD BIT Procedures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4B-56 FPD Alignment Procedures . . . . . . . . . . . . . . . . . . . . . . . . . . 4B-60 PCHRD Controls, Indicators, and Characteristics . . . . . . . 4B-62 PCHRD BIT Procedures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4B-63 ANK Controls, Indicators, and Characteristics . . . . . . . . . . 4B-65 PEP Controls, Indicators, and Characteristics . . . . . . . . . . 4B-66 PEP Testing and Troubleshooting Procedures . . . . . . . . . . 4B-67 DEP Controls and Indicators . . . . . . . . . . . . . . . . . . . . . . . . . 4B-68 DEP Testing and Troubleshooting Procedures . . . . . . . . . . 4B-69 Trackball Controls and Indicators . . . . . . . . . . . . . . . . . . . . . 4B-70 Printer Signal Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . . 4B-71 Printer Functional Signal Flow Diagram . . . . . . . . . . . . . . . . 4B-72 PT-540(V)7/U HCR Controls and Indicators . . . . . . . . . . . 4B-73 PT-540(V)7/U HCR Characteristics . . . . . . . . . . . . . . . . . . . 4B-75 PT-540(V)7/U HCR Servicing Procedures . . . . . . . . . . . . . 4B-76 PT-540(V)7/U HCR Operating Procedures . . . . . . . . . . . . 4B-78 PT-540(V)7/U HCR Test Procedures . . . . . . . . . . . . . . . . . 4B-79 PT-540(V)7/U HCR Troubleshooting Procedures . . . . . . . 4B-80 TP-4840 Printer Controls and Indicators . . . . . . . . . . . . . . . 4B-81 TP-4840 Printer Characteristics . . . . . . . . . . . . . . . . . . . . . . 4B-82 TP-4840 Printer Servicing Procedures . . . . . . . . . . . . . . . . . 4B-83 TP-4840 Printer Operating, Testing and Troubleshooting Procedures . . . . . . . . . . . . . . . . . . . . . . . . . 4B-85
SECTION 4 - DIGITAL DATA COMPUTER 4-1 4-2 4-3 4-4 4-5 4-6 4-7 4-8 4-9 Central Computer Signal Flow Diagram, Aircraft BUNO 156507 through 158927 and 158929 through 159329 Not Incorporating AFC 450 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2 Central Computer Signal Flow Diagram, Aircraft BUNO 158928, 159503 through 161409, and 161411 through 161596 Not Incorporating AFC 450 . . . . . . . . . . . . . . . 4-4 Central Computer Instruction Repertoire and Branch Designations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-6 Central Computer Maintenance Control Panel Controls and Indicators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-9 Central Computer Unit and Module Location Diagram . . . . . 4-12 Central Computer Preload Checkout Procedure, BUNO 156507 through 158927 and 158929 through 159329 . . . . . . 4-17 Central Computer Preload Checkout Procedure, BUNO 158928 and 159503 and Subsequent . . . . . . . . . . . . . . . . . . . 4-19 Central Computer Memory Fault Isolation Procedure . . . . . . 4-21 Central Computer Module Function and Interchangeability . 4-23
1-7 1-8 1-9
1-10
1-11 1-12 1-13 1-14 1-15 1-16 1-17 2-1 2-2 2-3
SECTION 4A - CENTRAL COMPUTER 4A-1 4A-2 4A-3 4A-4 4A-5 4A-6 4A-7 4A-8 4A-9 4A-10 4A-11 4A-12 4A-13 Central Computer Simplified Block Diagram . . . . . . . . . . . . . 4A-1 Central Computer Signal Flow Diagram . . . . . . . . . . . . . . . . 4A-2 Central Computer Functional Signal Flow Diagram . . . . . . . 4A-6 Central Computer Power Distribution Functional Signal Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4A-9 SDC Interface Connector Plate and Barometric Altimeter Signal Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4A-12 SDC Interface Connector Plate and Barometric Altimeter Functional Signal Flow Diagram . . . . . . . . . . . . . . . . . . . . . . 4A-14 Maintenance Panel Controls and Indicators . . . . . . . . . . . . 4A-16 Central Computer Location Diagram . . . . . . . . . . . . . . . . . . 4A-18 Central Computer Description and Capabilities . . . . . . . . . 4A-20 Power - Up BIT Troubleshooting Procedures . . . . . . . . . . . 4A-21 Maintenance Panel BIT Troubleshooting Procedures . . . . 4A-37 Central Computer Test Procedure . . . . . . . . . . . . . . . . . . . . 4A-43 Central Computer Module Function and Interchangeability 4A-51
SECTION 2 - READINESS TEST PROCEDURES
SECTION 2A - READINESS TEST PROCEDURES (Applicable To Aircraft Incorporating AFC 506) 2A-1 Technician Readiness Test Procedures . . . . . . . . . . . . . . . . . 2A-1 SECTION 2B - READINESS TEST PROCEDURES (Applicable to Aircraft Incorporating AFC 607) 2B-1 3-1 3-2 Technician Readiness Test Procedures . . . . . . . . . . . . . . . . 2B-1 Keyset and Tray Signal Flow Diagram . . . . . . . . . . . . . . . . . . . . 3-2 Pilot Keyset Functional Signal Flow Diagram . . . . . . . . . . . . . . 3-4 SECTION 3 - KEYSETS AND TRAYS
SECTION 5 - MX-8023( )/AYA-8 DATA ANALYSIS LOGIC UNIT (LU 1) 5-1 5-2 5-3 5-4 5-5 5-6 5-7 5-8 LU 1 Signal Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2 LU 1 Overall Power Distribution Signal Flow Diagram . . . . . . 5-6 LU 1 Status Functional Signal Flow Diagram . . . . . . . . . . . . . . 5-8 Logic Unit Power Supply Troubleshooting Procedures . . . . . . 5-9 LU 1 Module Location Diagram . . . . . . . . . . . . . . . . . . . . . . . . . 5-12 LU 1 Module Type and Function . . . . . . . . . . . . . . . . . . . . . . . . 5-13 LU 1 Subassembly Module Location Diagram . . . . . . . . . . . . 5-14 LU 1 Module and Subassembly Function and Interchangeability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-15
SECTION 4B - DATA PROCESSING DISPLAY AND CONTROL SYSTEM (Applicable to Aircraft Incorporating AFC 607) 4B-1 4B-2 4B-3 4B-4 DP/DCS Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DDC Simplified Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . DDC Signal Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . DDC Functional Signal Flow Diagram . . . . . . . . . . . . . . . . . . 4B-1 4B-2 4B-3 4B-6
Change 2
NAVAIR 01-75PAC-12
TABLE OF CONTENTS
Figure Page Figure Page 9A-2 MTT AC and DC Power Control and Distribution Signal Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9A-2 9A-3 MTT Read/Write Functional Signal Flow Diagram . . . . . . . . 9A-6 9A-4 MTT Supply Reel, Takeup Reel, and Capstan Drive Signal Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9A-12 9A-5 MTT Ready Function Signal Flow Diagram . . . . . . . . . . . . . 9A-16 9A-6 MTT Load Point Functional Signal Flow Diagram . . . . . . . 9A-18 9A-7 MTT Low Tape Sensor and Tape Remaining Functional Signal Flow Diagram . . . . . . . . . . . . . . . . . . . . . . 9A-19 9A-8 MTT Tape Break, End-Of-Tape and Tape Fault Sensor Functional Signal Flow Diagram . . . . . . . . . . . . . . . . . . . . . . 9A-20 9A-9 MTT Module Location Diagram . . . . . . . . . . . . . . . . . . . . . . . 9A-21 9A-10 MTT Servicing Procedures . . . . . . . . . . . . . . . . . . . . . . . . . . 9A-23 9A-11 MTT Tape Handling Procedure . . . . . . . . . . . . . . . . . . . . . . . 9A-25 9A-12 MTT Alignment Procedures . . . . . . . . . . . . . . . . . . . . . . . . . . 9A-28 9A-13 MTT Module Function and Interchangeability . . . . . . . . . . . 9A-29 SECTION 9B - RD-319A MAGNETIC TAPE TRANSPORT 9B-1 MTT Signal Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9B-1 9B-2 MTT Primary Power Distribution Functional Signal Flow Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9B-2 9B-3 MTT Tape Control Function Signal Flow Diagram . . . . . . . . 9B-4 9B-4 MTT Capstan Servo Functional Signal Flow Diagram . . . . . 9B-8 9B-5 MTT Data Read Function Signal Flow Diagram . . . . . . . . . 9B-10 9B-6 MTT Data Write Function Signal Flow Diagram . . . . . . . . . 9B-14 9B-7 MTT Supply Reel/Takeup Reel Functional Signal Flow Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9B-16 9B-8 MTT Tape Handling and Adjustments . . . . . . . . . . . . . . . . . 9B-19 9B-9 MTT Module Location Diagram . . . . . . . . . . . . . . . . . . . . . . . 9B-24 9B-10 MTT Servicing Procedures . . . . . . . . . . . . . . . . . . . . . . . . . . 9B-27 9B-11 MTT Module Function and Interchangeability . . . . . . . . . . . 9B-29 SECTION 9C - REPLACEMENT DATA STORAGE SYSTEM (Applicable to Aircraft Incorporating AFC 616) 9C-1 RDSS Signal Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 9C-1 9C-2 RDSS Power Distribution Diagram . . . . . . . . . . . . . . . . . . . . . 9C-2 9C-3 RDSS Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9C-3 9C-4 RDSS Functional Signal Flow Diagram . . . . . . . . . . . . . . . . . 9C-4 9C-5 RDSS Troubleshooting Procedures . . . . . . . . . . . . . . . . . . . . 9C-8 9C-6 RDSS Test Point Charts/Locations (ST 2600 M--O Drive Installed) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9C-16 9C-7 RDSS Test Point Charts/Locations (ST 5200 M--O Drive Installed) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9C-17 9C-8 RDSS Module Location Diagram . . . . . . . . . . . . . . . . . . . . . 9C-18 9C-9 RDSS Maintenance Controls and Indicators . . . . . . . . . . . . 9C-20 9C-10 RDSS Magneto--Optical Drive Setup Procedure (ST 2600 M--O Drive Installed) . . . . . . . . . . . . . . . . . . . . . . . 9C-21 9C-11 RDSS Magneto--Optical Drive Setup Procedure (ST 5200 M--O Drive Installed) . . . . . . . . . . . . . . . . . . . . . . . 9C-22 9C-12 RDSS Module Configuration Diagram (ST 2600 M--O Drive Installed) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9C-23 9C-13 RDSS Module Configuration Diagram (ST 5200 M--O Drive Installed) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9C-24 Figure SECTION 9D - REPLACEMENT DATA STORAGE SYSTEM (Applicable to Aircraft Incorporating AFC 607) 9D-1 9D-2 9D-3 9D-4 9D-5 9D-6 9D-7 9D-8 9D-9 9D-10 9D-11 9D-12 9D-13 RDSS Signal Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 9D-1 RDSS Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . 9D-2 RDSS Functional Signal Flow Diagram . . . . . . . . . . . . . . . . . 9D-3 RDSS Power Distribution Diagram . . . . . . . . . . . . . . . . . . . . . 9D-7 RDSS Troubleshooting Procedures . . . . . . . . . . . . . . . . . . . . 9D-8 RDSS Test Point Charts/Locations (ST 2600 M--O Drive Installed) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9D-16 RDSS Test Point Charts/Locations (ST 5200 M--O Drive Installed) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9D-17 RDSS Module Location Diagram . . . . . . . . . . . . . . . . . . . . . 9D-18 RDSS Maintenance Controls and Indicators . . . . . . . . . . . . 9D-20 RDSS Magneto-Optical Drive Setup Procedure (ST 2600 M--O Drive Installed) . . . . . . . . . . . . . . . . . . . . . . . 9D-21 RDSS Magneto-Optical Drive Setup Procedure (ST 5200 M--O Drive Installed) . . . . . . . . . . . . . . . . . . . . . . . 9D-22 RDSS Module Configuration Diagram (ST 2600 M--O Drive Installed) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9D-23 RDSS Module Configuration Diagram (ST 5200 M--O Drive Installed) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9D-24 Page
SECTION 6 - MX-8024( )/AYA-8 DATA ANALYSIS LOGIC UNIT (LU 2) 6-1 LU 2 Signal Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1 6-2 LU 2 Overall Power Distribution Functional Signal Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2 6-3 LU 2 Module Location Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 6-4 6-4 LU 2 Module Type and Function . . . . . . . . . . . . . . . . . . . . . . . . . 6-5 6-5 LU 2 Subassembly Module Location Diagram . . . . . . . . . . . . . 6-6 6-6 LU 2 Module and Subassembly Function and Interchangeability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-7
SECTION 7 - MX-8034/AYA-8 DATA ANALYSIS LOGIC UNIT (LU 3)
LU 3 Signal Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1 LU 3 Overall Power Distribution Functional Signal Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-2 7-3 LU 3 Module Location Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 7-5 7-4 LU 3 Module Type and Function . . . . . . . . . . . . . . . . . . . . . . . . . 7-6 7-5 LU 3 Subassembly Module Location Diagram . . . . . . . . . . . . . 7-7 7-6 LU 3 Offline Troubleshooting Procedures . . . . . . . . . . . . . . . . . 7-8 7-7 LU 3 Module and Subassembly Function and Interchangeability. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-9 SECTION 8 - LOGIC UNIT 4 8-1 LU 4 Signal Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-1 8-2 LU 4 Overall Power Distribution Functional Signal Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-2 8-3 LU 4 Drum Auxiliary Memory Subunit (DAMS) Functional Signal Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-6 8-4 LU 4 Auxiliary Display Functional Signal Flow Diagram, Aircraft BUNO 158928 and 159503 through 161596 Not Incorporating AFC 450 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-7 8-5 LU 4 Data Multiplexer Subunit (DMS) Functional Signal Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-8 8-6 LU 4 Power Distribution Troubleshooting Procedures . . . . . . 8-9 8-7 LU 4 Power Supply Troubleshooting Procedures . . . . . . . . . . 8-10 8-8 LU 4 Module Location Diagram . . . . . . . . . . . . . . . . . . . . . . . . . 8-12 8-9 LU 4 Offline Troubleshooting Procedures . . . . . . . . . . . . . . . . 8-13 8-10 LU 4 Module Type and Function . . . . . . . . . . . . . . . . . . . . . . . . 8-14 8-11 LU 4 Subassembly Module Location Diagram . . . . . . . . . . . . 8-15 8-12 LU 4 Module and Subassembly Function and Interchangeability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-17 SECTION 9 - DIGITAL MAGNETIC TAPE SYSTEM 9-1 DMTS Signal Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-1 9-2 DMTS Power Distribution Diagram . . . . . . . . . . . . . . . . . . . . . . . 9-2 9-3 DMTS Functional Signal Flow Diagram . . . . . . . . . . . . . . . . . . . 9-4 9-4 DMTS Fault Detection/Isolation Diagram . . . . . . . . . . . . . . . . 9-19 9-5 DMTC Test Point Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-29 9-6 DMTS Module Location Diagram . . . . . . . . . . . . . . . . . . . . . . . 9-33 9-7 DMTS Maintenance Controls and Indicators . . . . . . . . . . . . . 9-34 9-8 DMTS Tape Cartridge Loading and Servicing . . . . . . . . . . . . . 9-38 9-9 DMTC Switch-lndicator Removal and Replacement . . . . . . . 9-39 SECTION 9A - RD-319 MAGNETIC TAPE TRANSPORT 9A-1 MTT Signal Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9A-1
7-1 7-2
ii
NAVAIR 01-75PAC-12
LIST OF TECHNICAL PUBLICATION DEFICIENCY REPORTS INCORPORATED

Report Control No. None Location
Change 13
iii/(iv blank)
SECTION 1
GENERAL INFORMATION
SECTION 1 GENERAL INFORMATION
NAVAIR 01-75PAC-12
1-1. GENERAL. 1. This Crew Station Maintenance Manual (CSMM) is one of a series of manuals which provide the experienced technician with information and maintenance data required for readiness testing and organizational level maintenance of avionic equipment installed in the P-3C aircraft. This CSMM is supplemented by NAVAIR 01-75PAC-2-5, Integrated Technician Station Organizational Maintenance Instruction Manual (MIM). Manuals in the CSMM-series cover avionic equipment by crew station groupings in correspondence with like groupings in the MIM-series manuals. Maintenance coverage in this CSMM and the associated MIM, which is limited to specific production blocks of P-3C aircraft, is identified by Naval Bureau Number (BUNO). The coverage not limited by BUNO is applicable to all P-3C aircraft. For a complete listing of aircraft series, including BUNO and corresponding Lockheed serial numbers with cross-referencing, see NAVAIR 01-75PAA-2-1. verify the operational status of the avionic system. The tests use system test programs, Built-In Test Equipment (BITE), off-line test procedures, and portions of the operational program as applicable. 4. Section 3 and subsequent (hardware sections) are each dedicated to a specific system or functional grouping of equipment. The section number assigned to a system will, in all instances, be consistent between the CSMM and its associated MIM. Within the hardware sections the following conventions apply: a. When two (2) or more types of equipment are used for the same purpose, the same section number applies to all, and an alphabetical suffix is used to differentiate between types. Aircraft applicability serialization is shown on the tab sheets. When two (2) or more configurations exist within the same section, the minor differences are shown by delta notes; extensive differences are illustrated by separate figures, and serial number applicability is included in the figure title. Major signals are shown as double width lines and flow horizontally throughout the diagram. Block outlines adhere to the following conventions: (1) (2) (3) (4) (5) Solid line () a discrete component; disassembly or repair not normally possible Single dash line ( - ) unit, black box, or dust cover of a functional assembly Double dash line ( - - ) a removable module Triple and greater dash line ( - - - ) removable sub or sub- submodule Continuous dash line (- - - - -) a single block illustration of a multiunit system or an airframe enclosure or pod; i.e., IRDS, ESM. m. n. k. h. f. Partial or fractionalized illustrations are indicated by a zig-zag line in either upper, lower, or side outline, which indicate additional portions appear elsewhere in the same drawing. Absence of a zig-zag line does not imply an item is complete, but rather that the part shown is the only part in that drawing. Broken or air-connected lines or cables use a letter enclosed by a square and accompanied by a reference to the sheet number of the continuation. Lines terminated with a circuit reference such as G-8, L-24, R-122 refer to wiring diagrams indexed in Section 2 of each wiring data manual table 2-1. Table 2-1 cross indexes from circuit reference to the specific NAVAIR 01-75PAC-2-13 Series and NAVAIR 01-75PAC-2 Series manual for that diagram. Major test points are identified on signal flow diagrams, tables, charts, and illustrations by use of a numeral enclosed in a star ( 1 ), but are referred to in the text as TP along with the applicable reference designator (2A4TP1). j. System signal flow diagrams (first level) provide a composite simplified illustration of all active elements involved in a common function. Subsystem signal flow diagrams (second level) provide information covering a functional group, such as HF 1 (AN/ARC-161). System functional signal flow diagrams are special purpose diagrams showing a function of a multipurpose system, such as receive, transmit, azimuth distribution, and BITE. Functional blocks are used to show internal signal flow of equipment maintained at the unit (black box) level. Equipment maintained to the module level shows signal flow to the module level with text descriptions inside the module outline. System and Subsystem interface buses are labelled according to their use. Table 1-1 lists the types of interfaces and their definition.
g.
5.
b.
1-2.
PURPOSE AND SCOPE. 1. The purpose of this CSMM is to provide a basic manual covering readiness testing, system interfacing, signal flow, and maintenance procedures for avionic equipment located at or controlled by the technician station. The Integrated Technician Station MIM supports the CSMM by providing: a. b. c. d. Descriptive data on operating controls and indicators. Descriptive data supporting signal flow diagrams in this CSMM. Maintenance philosophy. Maintenance procedures (when needed to support procedures in the CSMM) covering testing, troubleshooting, alignment and adjustment, servicing and removal/installation procedures. Peculiar support equipment maintenance. c. d.
i.
l.
e. 2.
Section 1 provides general information to assist in locating equipment and information, cross-indexing, system interconnecting, and status of technical content. Section 2, Readiness Test Procedures, reflects the latest Systems Test Program available to Fleet personnel. The readiness tests
e.
3.
Connector reference designators are shown as P numbers and imply 2P1 connects to 2J1. If such is not the case, then both reference designators are shown; i.e., 2P1 connects to 24J3. Lower case connector pins are prefixed with Z.
o.
Figure 1-1.
Introduction (Sheet 1 of 2)
1-1
NAVAIR 01-75PAC-12
Table 1-1. Interface Definitions Interface EIA-170 RGB Definition Electronics Industries Association, electrical performance standards for monochrome television studio facilities 525 lines, 30 Hz frame 640 H. X 482 V. Electronics Industries Association, electrical performance standards for monochrome television studio facilities 525 lines, 30 Hz frame 640 H. X 482 V. Electronics Industries Association, electrical performance standards for interface between data terminal equipment and data communication equipment employing serial binary data interchange. Electronics Industries Association, electrical performance standards for high resolution monochromatic closed circuit TV camera 1056 line, 60 Hz frame 1280 H. X 1024 V. Electronics Industries Association, electrical performance standards for electrical characteristics of balanced voltage digital interface circuits. Electronics Industries Association, electrical performance standards for electrical characteristics of generators and receivers for use in balanced digital multi-point systems. Institute of Electrical and Electronic Engineers (IEEE), electrical performance standards for serial data transfer protocols employing 1500 byte packets. Navy Tactical Data System Type C (ANEW) interface employing 16 or 32 bit (microcode controlled) full duplex parallel data interchange. Proteus Digital Channel Interface employing independent serial full duplex source/sink data interchange. Air Transport Industrys standard for the transfer of digital data between avionics systems. ARINC 429 is implemented as a simplex, broadcast bus. Wire topology is based upon a 78 ohm, unbalanced, twisted shielded pair. Air Transport Industrys standard for the transfer of digital data between avionics systems. ARINC 575 is implemented as a simplex, broadcast bus. Wire topology is based upon a 78 ohm, unbalanced, twisted shielded pair. 2. 1-3. RELATED PUBLICATIONS. 1. NAVAIR 01-75PAA-2-1, General Information and Servicing, is a primary source of information for all personnel required to work on P-3 aircraft. Information of particular interest to avionic personnel is: a. b. c. Ground safety precautions and emergency procedures. Ground air conditioning. Ground electrical power. 6. 4. NAVAIR 01-75PAA-2-15, Connector and Wire Repair Procedures, is used for detailed information for repairing wiring and connectors. NAVAIR 01-1A-505, Installation Practices for Aircraft Electric and Electronic Wiring, provides additional information. NAVAIR 01-75PAC-4 Series, Illustrated Parts Breakdown manuals, are the authoritative source for usage and parts replacement information and take precedence over any such information provided in any other manual. NAVAIR 01-1A-8, Aircraft Structural Hardware for Aircraft Repair, applies in use of maintenance and torque values relating to nuts, bolts, screws, and fasteners, unless specific directions are provided by the manual in use. NAVAIR 01-75PAA-2-2.1, Corrosion Control, Cleaning, Painting, and Decontamination, provides coverage to prevent, detect, identify, and properly treat and repair corrosion. NAVAIR 01-75PAA-0, Technical Documentation List, contains an indexed listing of all applicable P-3 manuals. The manual user should consult OPNAVlNST 4790.2 for reporting discrepancies in this manual.
5.
EIA-170 NTSC
EIA-232/RS-232D
NAVAIR 01-75PAC-1 Series, NATOPS manuals, provide operating procedures, crew station illustrations, electrical power supply control, and functions of avionic controls and indicators. NAVAIR 01-75PAC-2-13 Series and NAVAIR 01-75PAC-2 Series, Systems Wiring Diagram manuals, provide specific and complete wiring data information for all electric, electronic, and instrument systems installed in all P-3C aircraft. In addition, specific wiring data for Lockheed manufactured devices (A-boxes) is provided to the discrete component level.
7.
3.
EIA-343/343A RGB
8. 9.
EIA-422/422A
EIA--485/RS--485
Ethernet 802.3
NTDS Type C (ANEW)
PDC Interface
ARINC 429
ARINC 575
1-2
Figure 1-1.
Introduction (Sheet 2 of 2)
NAVAIR 01-75PAC-12
OBS STA NAVCOMM
C1C2 C3 SS 3 MAIN LOAD CTR F1 F2
ORD PNL
FLIGHT ENGINEER 60 30 0 30 60 PILOT 100 FWD 200 RADOME

A1
COPILOT
FWD LOAD CTR
300
400
B1 B2 B3 D1
500
D2 D3 SS 1
600
SS 2
LAV
K1 K2
AFT RADOME 1200 1300 1400
700
E1 E2
800
G1 G2
900
1000
H3
1100
J1 J2
MAD BOOM 1500
H1H2 D3
600
SS 1 SS 2 E1 E1C
10
700
E2
TACCO
SEE DETAIL A
OBS STA
9
DETAIL A
FLIGHT STATION Instrument Panel D 80-5170 Pilot Color High Resolution Display (PCHRD)
6
NAVCOMM STATION D D D
5
RACK D3
5
C-7627/AYA-8 Control Indicator (NAVCOMM Keyset) 79C3015-00 Flat Panel Display (FPD) 6 700101 Programmable Entry Panel (PEP) 60192 Alphanumeric Keyboard (ANK) 60193 Trackball (TB)
6 6 6 6
D D D D D D
6
MX-9360( )AYA-8 Data Analysis Logic Unit (LU4) 1 3 5 RD-319/AYA-8 Magnetic Tape Transport (MTT A and MTT B) RD-319A/AYA-8 Magnetic Tape Transport (MTT)
1 3 5 1 3
CENTER CONSOLE D D C-7629/AYA-8 Control Indicator (Pilot Keyset) 2000 Data Entry Panel (DEP)
6
D D D D
5
C-10553/ASH-33 Digital Magnetic Tape Control (DMTC)
5 1 3 5 1 4 4 5 5 3 5
RD-450/ASH-33 Digital Data Recorder-Reproducer (DMTU) 7354801 SDC Interface Connector Box (SDC Connector Plate) 7354845 LU 4 Interface Connector Box (LU4 Connector Plate) CD-155/ASQ-227(V) Video Distribution Controller (VDC) 9700822 Replacement Data Storage System (RDSS)
6 6 7
700106 PEP Power Supply CDL Power Control Panel
A505-AN/ASQ-114 DMTS Interface Box (DMTS Interconnection Box)

2 2
TACCO STATION D D D D D D IP-917/ASA-70 Multipurpose Display (MDD or MDD Tray) 79C3015-00 Flat Panel Display (FPD) 60192 Alphanumeric Keyboard (ANK) 60193 Trackball (TB)
6 6 6 6
PT-540(V)7/U Hard Copy Recorder (HCR) or TP-4840 Printer

11
D D D D
700101 Programmable Entry Panel (PEP)

6
RACK D1 D D D D D D D D MX-8024( )AYA-8 Data Analysis Logic Unit (LU2) MX-8034( )AYA-8 Data Analysis Logic Unit (LU3) 7354820 Interconnect Box 2 (ICB2) 7354830 Interconnect Box 3 (ICB3) A511 Power Distribution Box USQ-140 Main Terminal
11 11 11 2 2 4 4 5 5 1 1 3 3 5 5
RACK F2 D D D 2000 Data Entry Panel (DEP) 6 SB-3152/AYA-8 ARM/ORD Test Panel C-7628/AYA-8 Control Indicator (Ordnance Keyset)
5
700106 PEP Power Supply
SENSOR STATION 1 AND 2 D C-7627(P)/AYA-8 Control Indicator (SS 1 Universal Keyset and SS 2 Universal Keyset)
1 3 5
USQ-140 Digital Interface Unit USQ-140 Remote Power Supply
RACK H1 D D CDL COMSEC FillPort

11 11
SENSOR STATION 3 D D D D D D IP-918/ASA-70 Multipurpose Display (SDD or SDD Tray) 79C3015-00 Flat Panel Display (FPD) 60192 Alphanumeric Keyboard (ANK) 60193 Trackball (TB)
6 6 6 6 5
Airborne Modem Assembly
RACK D2 D D D D D D D D D CP-901(V)( )ASQ-114(V) Digital Data Computer (Central Computer) TS-2899/ASQ-114(V) Computer Maintenance Console (Maintenance Console)
1 3 5 1 3 5 1 3 5 1 2 3 4 2 4 5 5 6 7 6 6
NOTE
Applicable to Aircraft Not Incorporating AFC 450 Applicable to Aircraft Incorporating AFC 450 Applicable to Aircraft Not Incorporating AFC 506 Applicable to Aircraft Incorporating AFC 506 Applicable to Aircraft Not Incorporating AFC 607 Applicable to Aircraft Incorporating AFC 607 Applicable to Aircraft Incorporating AFC 616 Aircraft Incorporating AFC 450, or Aircraft 161763 and subsequent Aircraft 156509 thru161596 not Incorporating AFC 450, and Aircraft incorporating AFC 607 Rack E1C if Incorporating AFC 607; Rack E1 if not Incorporating AFC 607 Applicable to Aircraft Incorporating AFC 593
700101 Programmable Entry Panel (PEP)

6
TF-543/ASQ-114(V) Power Isolation Transformer (Isolation Transformer) MX-8023( )AYA-8 Data Analysis Logic Unit (LU1) 1 3 5 CP-2044/ASQ-212(V) Digital Data Computer (Central Computer) C-12198/ASQ-212 Computer Terminal Control (CTC) J-4959/ASQ-212 Interconnect Box 1 (ICB1)
2 4 5 2 4 5
700106 PEP Power Supply
CP-2451/ASQ-227(V) Digital Data Computer (DDC)
8 9
C-12639/ASQ-227(V) Computer Maintenance Panel (CMP)
10
11
Figure 1-2. Equipment Location Diagram
Change 6
1-3
NAVAIR 01-75PAC-12
CREW STATION MAINTENANCE MANUAL AVIONIC SUBSYSTEM INDEXES

CREW STATION MAINTENANCE MANUAL CREW STATION MAINTENANCE MANUAL CREW STATION MAINTENANCE MANUAL NAVAIR 01-75PAC-12-5 SENSOR STATION 3 (CONTINUED)
SECTION 3 3 3 3 3 4 4A 4B 5
AVIONIC SUBSYSTEM C-7627(P)/AYA-8 CONTROL-INDICATOR C-7628/AYA-8 CONTROL-INDICATOR C-7629/AYA-8 CONTROL-INDICATOR IP-917/ASA-70 MULTIPURPOSE DATA DISPLAY IP-918/ASA-70 SENSOR DATA DISPLAY DIGITAL DATA COMPUTER CENTRAL COMPUTER DATA PROCESSING DISPLAY AND CONTROL SYSTEM MX-8023( )/AYA-8 DATA ANALYSIS LOGIC UNIT (LU 1) MX-8024( )/AYA-8 DATA ANALYSIS TECHNICIAN LOGIC UNIT (LU 2) MX-8034/AYA-8 DATA ANALYSIS LOGIC UNIT (LU 3) MX-9360/AYA-8B DATA ANALYSIS LOGIC UNIT (LU 4) AN/ASH-33 DIGITAL DATA RECORDER REPRODUCER SET RD-319/AYA-8 MAGNETIC TAPE TRANSPORT RD-319A/AYA-8 MAGNETIC TAPE TRANSPORT REPLACEMENT DATA STORAGE SYSTEM REPLACEMENT DATA STORAGE SYSTEM
MAINTENANCE INSTRUCTION MANUAL (MIM) REFERENCE NAVAIR 01-75PAC-2-5 NAVAIR 01-75PAC-2-5 NAVAIR 01-75PAC-2-5 NAVAIR 01-75PAC-2-5 NAVAIR 01-75PAC-2-5 NAVAIR 16-30ASQ212-1 NAVAIR 01-75PAC-2-5 NAVAIR 01-75PAC-2-5 NAVAIR 01-75PAC-2-5 NAVAIR 01-75PAC-2-5 NAVAIR 01-75PAC-2-5 NAVAIR 01-75PAC-2-5 NAVAIR 01-75PAC-2-5 NAVAIR 01-75PAC-2-5 NAVAIR 01-75PAC-2-5 NAVAIR 01-75PAC-2-5 NAVAIR 01-75PAC-2-9 NAVAIR 01-75PAC-2-9 NAVAIR 01-75PAC-2-9 NAVAIR 01-75PAC-2-9 NAVAIR 01-75PAC-2-9 NAVAIR 01-75PAC-2-9 NAVAIR 01-75PAC-2-9 NAVAIR 01-75PAC-2-9 NAVAIR 01-75PAC-2-9 NAVAIR 01-75PAC-2-9 NAVAIR 01-75PAC-2-9 NAVAIR 01-75PAC-2-9 NAVAIR 01-75PAC-2-9 NAVAIR 01-75PAC-2-9 NAVAIR 01-75PAC-2-9 NAVAIR 01-75PAC-2-9 NAVAIR 01-75PAC-2-9 NAVAIR 01-75PAC-2-9 NAVAIR 01-75PAC-2-9 NAVAIR 01-75PAC-2-9 NAVAIR 01-75PAC-2-9 NAVAIR 01-75PAC-2-9 NAVAIR 01-75PAC-2-9 NAVAIR 01-75PAC-2-9 NAVAIR 01-75PAC-2-9 NAVAIR 01-75PAC-2-9 NAVAIR 01-75PAC-2-9 NAVAIR 01-75PAC-2-9 NAVAIR 01-75PAC-2-9
SECTION 3 3 3A
AVIONIC SUBSYSTEM IP-917/ASA-70 MULTIPURPOSE DATA DISPLAY IP-918/ASA-70 SENSOR DATA DISPLAY IP-918/ASA-70A MULTIPURPOSE AND SENSOR DATA DISPLAY IP-919/ASA-70 AUXILIARY READOUT DISPLAY IP-1359A TACTICAL DISPLAY AVM4055 TELEVISION MONITOR A291 POWER DISTRIBUTION BOX A383 POWER DISTRIBUTION BOX A511 POWER DISTRIBUTION BOX A521 POWER DISTRIBUTION BOX A324 TACCO POWER CONTROL CV-2461A/A SIGNAL DATA CONVERTER AN/ACQ-5( )DATA TERMINAL SET AN/ACQ-8( )DIGITAL DATA SET REPLACEMENT INERTIAL NAVIGATION SYSTEM REPLACEMENT INERTIAL NAVIGATION SYSTEM-GPS AN/ARC-161 HF COMMUNICATION SYSTEM AN/USC-43(V)3 ANDVT SECURITY UNIT AN/ARC-243 HF COMMUNICATION SYSTEM AN/ARC-143 UHF COMMUNICATION SYSTEM AN/ARC-187(V) UHF COMMUNICATION SYSTEM AN/ARC-187(V) UHF COMMUNICATION SYSTEM AN/AGC-6 TELETYPEWRITER SET AN/AIC-22(V) INTERCOMMUNICATION SYSTEM TRUE AIRSPEED SYSTEM AN/ARN-151 GLOBAL POSITIONING SYSTEM AN/ARN-151 GLOBAL POSITIONING SYSTEM AN/ARR-72 SONOBUOY RECEIVER SET BT RECORDER/AMBIENT SEA NOISE METER AN/AQH-4(V) SOUND RECORDERREPRODUCER SYSTEM AN/AQH-4(V)2 SOUND RECORDERREPRODUCER SYSTEM TD-900( )/AS TIME CODE GENERATOR AN/AQA-7A(V)10 SONAR COMPUTERRECORDER SYSTEM AN/ASA-76A GENERATOR TRANSMITTER GROUP HYPERBOLIC FIX MEASURING UNIT AN/ARS-3 SONOBUOY REFERENCE SYSTEM (SRS) TACTICAL DATA DISPLAY GROUP AN/ALQ-78 ELECTRONIC SUPPORT MEASURES AN/ALQ-78A ELECTRONIC SUPPORT MEASURES AN/ALR-66B(V)3 COUNTERMEASURES RECEIVING SET (ESM) AN/ALR-66A(V)3 COUNTERMEASURES RECEIVING SET (ESM) AN/APS-115( ) RADAR SET MX-7974/ASA-69 RADAR INTERFACE UNIT AN/APS-137(V)2 SEARCH RADAR SET AN/ASQ-81(V) MAGNETIC DETECTION SET
MAINTENANCE INSTRUCTION MANUAL (MIM) REFERENCE NAVAIR 01-75PAC-2-6 NAVAIR 01-75PAC-2-6 NAVAIR 01-75PAC-2-6 NAVAIR 01-75PAC-2-6 NAVAIR 01-75PAC-2-6 NAVAIR 01-75PAC-2-6 NAVAIR 01-75PAC-2-6 NAVAIR 01-75PAC-2-6 NAVAIR 01-75PAC-2-6 NAVAIR 01-75PAC-2-6 NAVAIR 01-75PAC-2-6 NAVAIR 01-75PAC-2-6 NAVAIR 01-75PAC-2-10 NAVAIR 01-75PAC-2-10 NAVAIR 01-75PAC-2-10 NAVAIR 01-75PAC-2-10 NAVAIR 01-75PAC-2-10 NAVAIR 01-75PAC-2-10 NAVAIR 01-75PAC-2-10 NAVAIR 01-75PAC-2-10 NAVAIR 01-75PAC-2-10 NAVAIR 01-75PAC-2-10 NAVAIR 01-75PAC-2-10 NAVAIR 01-75PAC-2-10 NAVAIR 01-75PAC-2-10 NAVAIR 01-75PAC-2-10 NAVAIR 01-75PAC-2-10 NAVAIR 01-75PAC-2-7 NAVAIR 01-75PAC-2-7 NAVAIR 01-75PAC-2-7 NAVAIR 01-75PAC-2-7 NAVAIR 01-75PAC-2-7 NAVAIR 01-75PAC-2-7 NAVAIR 01-75PAC-2-7 NAVAIR 01-75PAC-2-7 NAVAIR 01-75PAC-2-7 NAVAIR 01-75PAC-2-8 NAVAIR 01-75PAC-2-8 NAVAIR 01-75PAC-2-8 NAVAIR 01-75PAC-2-8 NAVAIR 01-75PAC-2-8 NAVAIR 01-75PAC-2-8 NAVAIR 01-75PAC-2-8 NAVAIR 01-75PAC-2-8
SECTION 5 5 5 6 7 7A
AVIONIC SUBSYSTEM AN/ASA-65(V)2 MAGNETIC COMPENSATOR GROUP AN/ASA-65(V)5 MAGNETIC COMPENSATOR GROUP AN/ASA-64 SUB ANOMALY DETECTING GROUP AN/APX-76A(V) SIF INTERROGATOR SET AN/AAS-36( ) INFRARED DETECTING SET AN/ASX-6 MULTI-MODE IMAGING SYSTEM SEARCH STORES SYSTEM KILL STORES CONTROL AND RELEASE AN/AWG-19(V)1 HARPOON COMMAND LAUNCH CONTROL SET MAVERICK MISSILE SYSTEM DATA HANDLING PROCEDURES DIAGNOSTIC PROCEDURES ACCEPT/REJECT CRITERIA (ERROR PRINTOUT DEFINITIONS) SPECIAL TEST DESCRIPTIONS ACOUSTIC TEST SIGNAL GENERATOR DELETED ADVANCED SONOBUOY COMMUNICATION LINK RECEIVER SYSTEM (ASCL) ADVANCED SONOBUOY COMMUNICATION LINK RECEIVER SYSTEM (ASCL) AN/ARR-78(V)3 ACOUSTIC PROCESSING SUITE (APS) SINGLE ADVANCED SIGNAL PROCESSOR (SASP) SOUND RECORDER-REPRODUCER SYSTEM AN/AQH-13 SOUND RECORDER-REPRODUCER SYSTEM, AN/AQH-4(V)2 SOUND RECORDER-REPRODUCER SYSTEM, AN/AQH-13B TIME CODE GENERATOR SONOBUOY REFERENCE SYSTEM ARS-5 SONOBUOY REFERENCE SYSTEM TESTING FLOW DIAGRAMS STP TEST DESCRIPTIONS INITIALIZATION AND TAPE DUPLICATOR PROCEDURES COMPUTER SYSTEM CONTROL AUTOMATIC SYGNOG TEST PROCEDURES SIMULTANEOUS SYGNOG TEST PROCEDURES SS-1/2 SASP LOAD PROCEDURES SPECIAL TESTS UTILITIES DIAGNOSTICS DUPLICATOR PROCEDURES COMPUTER SYSTEM CONTROL AUTOMATIC SYGNOG TEST PROCEDURES SIMULTANEOUS SYGNOG TEST PROCEDURES SS-1/2 SASP LOAD PROCEDURES SPECIAL TESTS UTILITIES DIAGNOSTICS
MAINTENANCE INSTRUCTION MANUAL (MIM) REFERENCE NAVAIR 01-75PAC-2-8 NAVAIR 01-75PAC-2-8 NAVAIR 01-75PAC-2-8 NAVAIR 01-75PAC-2-8 NAVAIR 01-75PAC-2-8 NAVAIR 01-75PAC-2-8 NAVAIR 01-75PAC-2-11 NAVAIR 01-75PAC-2-11 NAVAIR 01-75PAC-2-11 NAVAIR 01-75PAC-2-11 NAVAIR 01-75PAC-2-5 NAVAIR 01-75PAC-2-5 NAVAIR 01-75PAC-2-5 NAVAIR 01-75PAC-2-5 NAVAIR 01-75PAC-2-15 NAVAIR 01-75PAC-2-15 NAVAIR 01-75PAC-2-15 NAVAIR 01-75PAC-2-15 NAVAIR 01-75PAC-2-15 NAVAIR 01-75PAC-2-15 NAVAIR 01-75PAC-2-15 NAVAIR 01-75PAC-2-15 NAVAIR 01-75PAC-2-15 NAVAIR 01-75PAC-2-15 NAVAIR 01-75PAC-2-15 NAVAIR 01-75PAC-2-15 NAVAIR 01-75PAC-2-15 NAVAIR 01-75PAC-2-15
NAVAIR 01-75PAC-12-2 TACTICAL COORDINATOR STATION
4 5 5A 6 6 6 6 6 7 3 3A 4A 4B 6 6 6A 7 7A 7B
NAVAIR 01-75PAC-12 TECHNICIAN
6 7 8 9 9A 9B 9C 9D 3
NAVAIR 01-75PAC-12-6 ARMAMENT/ ORDNANCE STATION
3 4 5 6
NAVAIR 01-75PAC-12-7 SYSTEM TEST PROGRAM
2 3 4 5 3 4 5 5A 6 6A 7 7A 7B 8 10 10A
AN/ASW-31 AUTOMATIC FLIGHT CONTROL SYSTEM 3A PB-20N AUTOPILOT SYSTEM 3B AN/ASW-60 DIGITAL COMPUTER SYSTEM 4 AN/ASA-66 TACTICAL DATA DISPLAY GROUP 5 AND 5A HORIZONTAL SITUATION INDICATOR AND FLIGHT DIRECTOR SYSTEM 5B, 5C, ELECTRONIC FLIGHT DISPLAY AND 5D SYSTEM AND FLIGHT DIRECTOR SYSTEM 6 AN/APN-194(V) ELECTRONIC ALTIMETER SET 6 AN/APQ-107 RADAR ALTIMETER WARNING SET (DUAL) 6A AN/APN-194(V) ELECTRONIC ALTIMETER SET NAVAIR 01-75PAC-12-1 6A AN/APQ-107 RADAR ALTIMETER FLIGHT STATION WARNING SET (SINGLE) 7 AN/APX-72 IFF TRANSPONDER SET 7A AN/APX-118/123 IFF TRANSPONDER SET 8 R-1651/ARA ON TOP POSITION INDICATOR RECEIVER 8, 8A AND 8B AN/ARN-83 LF DIRECTION FINDER 8, 8A AND 8B AN/ARA-50 UHF DIRECTION FINDER 8A AN/ARR-78(V) ON TOP POSITION INDICATOR RECEIVER 9 AN/ARN-118(V) TACAN NAVIGATION SET 9A AN/ARN-84 TACAN NAVIGATION SET 10 AN/ARN-87(V) VHF NAVCOMM EQUIPMENT 10 MLR-2020-A-1 MULTI-MODE RECEIVER 10 AN/ARN-32 MARKER BEACON SET 10 51V-4 GLIDESLOPE RECEIVER 10A AN/ARN-140 VHF NAVIGATION RECEIVER SYSTEM 10B AN/ARC-197 VHF COMMUNICATION 10C AND 10D AN/ARC-182 VHF/UHF COMMUNICATION SYSTEM 10E AN/ARC-210 VHF/UHF COMMUNICATION 11 DELETED 12 AN/APN-234 COLOR WEATHER RADAR 13 AN/ALE-39 & ARR-47 SURVIVABILITY AND VULNERABILITY 14 AAU-64/A PRESSURE ALTIMETER
NAVAIR 01-75PAC-12-3 NAVIGATION/ COMMUNICATION STATION
8 11 12 13 13A 3 4 5 5A
NAVAIR 01-75PAC-12-8 SENSOR STATIONS 1 AND 2 UPDATE III AND BLOCK MOD UPGRADE PROGRAM
NAVAIR 01-75PAC-12-4 SENSOR STATIONS 1 AND 2
6 7 7 7 8 9 3 3A
NAVAIR 01-75PAC-12-9 SYSTEM TEST PROGRAM FOR ADVANCED SIGNAL PROCESSOR NAVAIR 01-75PAC-12-10 SYSTEM TEST PROGRAM FOR CP-2044/ASQ-212
2 3 4
2 3 4 5 6 7 8
NAVAIR 16-30ASQ212-1 NAVAIR 16-30ASQ212-1 NAVAIR 16-30ASQ212-1 NAVAIR 16-30ASQ212-1 NAVAIR 16-30ASQ212-1 NAVAIR 16-30ASQ212-1 NAVAIR 16-30ASQ212-1 NAVAIR 01-75PAC-2-5 NAVAIR 01-75PAC-2-5 NAVAIR 01-75PAC-2-5 NAVAIR 01-75PAC-2-5 NAVAIR 01-75PAC-2-5 NAVAIR 01-75PAC-2-5 NAVAIR 01-75PAC-2-5
NAVAIR 01-75PAC-12-5 SENSOR STATION 3
3C 3D 4 4 4A 5
NAVAIR 01-75PAC-12-12 SYSTEM TEST PROGRAM FOR CP-2451/ASQ-227
2 3 4 5 6 7 8
1-4
Change 12
Figure 1-3. Avionic Subsystem Index
NAVAIR 01-75PAC-12
SENSOR STATIONS 1 AND 2
HYFIX SOUND RECORDER - REPRODUCER SONOBUOY RECEIVER HYFIX AFCS SS1 KEYSET SS1 DIFAR DICASS CONVERTER SS1 DCCI SS2 DCCI SS2 DIFAR SS2 KEYSET PILOT KEYSET HSI EHSI 4 PILOT DISPLAY
FLIGHT STATION
DAS 6 SEE NAV INTERCON-NECTION BOX AND CENTRAL REPEATER SYSTEM FDI EFDI 4 RIU ANALOG CH 4
SENSOR STATION 3
3 IRDS VIDEO RECORDER SS3 SDD SS3 TRACKBALL ESM IRDS IRDS DISP MAD/ SAD
TACCO STATION
TAD TACCO ARO ANALOG CH 4
NAVCOM ARO
NAVCOM STATION
BATHY-THERMOGRAPH 1 GPS
NAV SIMULATOR INERTIAL SYSTEM NO. 1 INERTIAL SYSTEM NO. 2 DOPPLER RADAR 2 NAV INTERCON-- CENTRAL NECTION REPEATER SYSTEM BOX
ARM/ORD STATION
ARM/ORD TEST PANEL SEARCH INTERCON-NECTION BOX ORDNANCE KEYSET
TACCO MDD
SS3 TRAY
DIGITAL TACCO TRAY TACCO TRACKBALL
HSI EHSI 4 NAVCOM KEYSET
UHF/HF RADIO
AFT ARM INTERCON-NECTION BOX FWD ARM INTERCON-NECTION BOX
CASS
TTY AND HSP
DATA LINK
DIRECTIONAL LISTENING
DIRECTIONAL LISTENING
MODE STATUS
5 MAGNETIC VARIATION TRUE AIRSPEED VELOCITY, TRUE HEADING AND CONTROL VELOCITY, TRUE HEADING AND CONTROL CRS ROLL SIMULATED HEADING COURSE COMMAND MAGNETIC HEADING
COURSE ERROR CROSS TRACK ERROR
AUDIO PROCESSOR CHANNELS 8 THRU 15
X AXIS
SS1 HYFIX
SS2 HYFIX
Y AXIS
COURSE COMMAND
VECTOR, CHARACTER AND CONTROL
RANGE, PRF, HV ON/OFF COMMANDS
DRIFT ANGLE
5 BANK ANGLE
AZIMUTH ELEVATION
BARO-METRIC ALTI-METER
LAMP INPUTS/SWITCH OUTPUTS
SAD, CAMERA, DOPPLER AND NAV STATUS DATA
DRIFT ANGLE
CRS PITCH
X AXIS
Y AXIS
OUTPUT DATA AND CONTROL
CHARACTER AND CONTROL
GROUND SPEED AND DRIFT
INPUT DATA AND CONTROL
MONITOR AND CONTROL
WATER TEMPERATURE
RADAR READ ENABLE
RECEIVED DATA
SAD MARK
SIGNAL DATA CONVERTER
SS1 KEYSET LOGIC 1
SONO RECEIVER LOGIC
SS2 KEYSET LOGIC 2
PILOT KEYSET LOGIC 4
IFPM NO. 1
SS3 TRAY LOGIC 6
15
STATUS LOGIC
TACCO TRAY LOGIC
ARO LOGIC
NAVCOM KEYSET LOGIC
TRANSMIT DATA
RECEIVED DATA
TRANSMIT DATA
20
10
ESM DATA GIMBAL CONTROL
19
LOD AND CONTROL
23
17 16 8
2 3
21 4
5 22
24
IFPM NO. 2
ORDNANCE PANEL LOGIC
12
14
11
12
10
DIGITAL INPUT/OUTPUT MULTIPLEXER 3 0 1 2
MAINTENANCE CONTROL PANEL
LU 1
DIFAR DIGITAL INTERFACE UNIT
ANALOG CH 4
PILOT DISPLAY LOGIC 6
MASTER TIMING LOGIC
SS3 SDD LOGIC 5
FUNCTION GENERATOR
TACCO MDD LOGIC 7 11
NAVIGATION MULTIPLEXER 8 8 9
ARM/ORD LOGIC
LU 2
10 MAGNETIC TAPE CONTROL LOGIC
LU 3
4, 5, 6, 7
0, 1, 2, 3
11
10
8, 9, 10, 11 MAGNETIC TAPE TRANSPORT A MAGNETIC TAPE TRANSPORT B
CP-901/ASQ- 114
1
NOTE
AIRCRAFT INCORPORATING AFC 540 REMOVED ON AIRCRAFT INCORPORATING AFC 619 REMOVED ON AIRCRAFT INCORPORATING AFC 608 AIRCRAFT INCORPORATING AFC 603 AIRCRAFT NOT INCORPORATING AFC 603 AIRCRAFT INCORPORATING AFC 696
LEGEND
NO. - SIGNAL DATA CONVERTER INPUT/OUTPUT CHANNELS NO.-- DIGITAL INPUT/OUTPUT MULTIPLEXER CHANNELS (DIM/DOM) NO.-- COMPUTER INPUT/OUTPUT CHANNELS
2 3 4 5 6
Figure 1-4. Crew Station Interface Diagram, Aircraft BUNO 156507 through 158927 and 158929 through 159329 Not Incorporating AFC 450 and AFC 506
Change 9
SELECT AND RELEASE
10
MONITOR AND CONTROL
MONITOR AND CONTROL
GIMBAL POSITION
SELECT, CONTROL AND LAUNCH
COMPTR ALTITUDE LOADING COMMANDS
1-5
NAVAIR 01-75PAC-12
AUXILIARY DISPLAY SRS SS1 KEYSET HYFIX SS1 DIFAR
SOUND RECORDER - REPRODUCER SONOBUOY RECEIVER DICASS CON-VERTER CASS SS1 DCCI SS2 DCCI SS2 DIFAR HYFIX SS2 KEYSET PILOT DISPLAY
FLIGHT STATION
DAS 9 AFCS HSI EHSI 7
SEE NAV INTERCON-NECTION BOX AND CENTRAL REPEATER SYSTEM FDI EFDI 7
4 RIU ANALOG CH 4 SS3 TRAY
SENSOR STATION 3
IRDS 6 VIDEO RECORDER SS3 SDD SS3 TRACKBALL ESM IRDS
TACCO STATION
TAD TACCO MDD TACCO ARO
NAVCOM STATION
NAVCOM ARO BATHY-THERMO-GRAPH HSI EHSI 7 NAVCOM KEYSET 8 DRIFT ANGLE COURSE COMMAND 1 GPS
NAV SIMULATOR INERTIAL SYSTEM NO. 1 INERTIAL SYSTEM NO. 2 DOPPLER RADAR 5 VELOCITY, TRUE HEADING AND CONTROL VELOCITY, TRUE HEADING AND CONTROL
NAV CENTRAL INTERCON-- REPEATER NECTION SYSTEM BOX
ARM/ORD STATION
ARM/ORD TEST PANEL SEARCH INTERCON-NECTION BOX ORDNANCE KEYSET AFT ARM INTERCON-NECTION BOX FWD ARM INTERCON-NECTION BOX
ANALOG CH 4
HACLCS
PILOT KEYSET
IRDS DISP
DIGITAL TACCO TRAY TACCO TRACKBALL
UHF/HF RADIO DATA LINK
MAD/ SAD AZIMUTH GIMBAL POSITION ELEVATION MODE STATUS
TTY AND HSP
RADAR READ ENABLE RANGE, PRF, HV ON/OFF COMMANDS
MAGNETIC VARIATION TRUE AIRSPEED MAGNETIC HEADING
COURSE COMMAND
COURSE ERROR CROSS TRACK ERROR
CRS ROLL SIMULATED HEADING
8 BANK ANGLE DRIFT ANGLE
BARO-METRIC ALTIMETER SELECT, CONTROL AND LAUNCH
DIRECTIONAL LISTENING SS2 HYFIX
X AXIS
DIRECTIONAL LISTENING OUTPUT DATA AND CONTROL
Y AXIS
COMMAND AND CONTROL
SAD, CAMERA, DOPPLER AND NAV STATUS DATA
CRS PITCH
10
SIGNAL DATA CONVERTER
SS1 KEYSET LOGIC 1
SONO RECEIVER LOGIC
SS2 KEYSET LOGIC 2
PILOT KEYSET LOGIC 4
ESM DATA
SAD MARK
19
20
23
16
17
10
RECEIVED DATA
21
22
24
IFPM NO. 1 5 12
SS3 TRAY LOGIC 6 15 14
STATUS LOGIC 7 11
TACCO TRAY LOGIC 0
ARO LOGIC
NAVCOM KEYSET LOGIC 3 12
IFPM NO. 2 10
ORDNANCE PANEL LOGIC 9 DM CH 4
DIGITAL INPUT/OUTPUT MULTIPLEXER 3 0 1 2
LU 1
DIFAR DIGITAL INTERFACE UNIT
ANALOG CH 4 NAVIGATION MULTIPLEXER 8 9 10 11
MONITOR AND CONTROL
WATER TEMPERATURE
LOADING COMMANDS
GIMBAL CONTROL
TRANSMIT DATA
TRANSMIT DATA
RECEIVED DATA
SELECT AND RELEASE MONITOR AND CONTROL
MONITOR AND CONTROL
SS1 HYFIX
LOD AND CONTROL
X AXIS
Y AXIS
CMPTR ALTITUDE
TO LOGIC UNIT 4
4 4
PILOT DISPLAY LOGIC 6
MASTER TIMING LOGIC
SS3 SDD LOGIC 5
FUNCTION GENERATOR
TACCO MDD LOGIC 7 3
ARM/ORD LOGIC
LU 2
MAGNETIC TAPE CONTROL LOGIC
LU 3
2 MAGNETIC TAPE TRANSPORT 4, 5, 6, 7 3 0, 1, 2, 3 0 1 2 11 9 10 2 8, 9, 8 10, 11 2 11 8, 9, 3 COMPUTER INTERCON-NECTION BOX 10 DIGITAL MAGNETIC TAPE SYSTEM 3
AUXILIARY DISPLAY LOGIC
DM CH 2
DATA MULTIPLEXER
13 DM CH 0 TEST LOOP
MAINTENANCE CONTROL PANEL 14 SPARE COMPUTER CHANNEL 15 DRUM AUXILIARY MEMORY SUBUNIT
DM CH 1
LU 4
13
DM CH 4
TO ARM/ORD STATION
14
15
12, 13, 14, 15
9, 10, 11
10
CP-901/ASQ-114
LEGEND
NO. - SIGNAL DATA CONVERTER INPUT/OUTPUT CHANNELS NO. - DIGITAL INPUT/OUTPUT MULTIPLEXER CHANNELS (DIM/DOM) NO. - COMPUTER INPUT/OUTPUT CHANNELS NO. - DATA MULTIPLEXER CHANNELS 1 2 3
NOTE
AIRCRAFT INCORPORATING AFC 540 AIRCRAFT 158928 AND 159504 THROUGH 161132 AIRCRAFT 161329 THROUGH 161596
4 5 6
RIU WITH APS-- 115 EQUIPPED A/C OR INPUT COMMANDS TO RSC/ANALOG CH 3 FROM SDC WITH APS-- 137(V) EQUIPPED A/C REMOVED ON AIRCRAFT INCORPORATING AFC 619 REMOVED ON AIRCRAFT INCORPORATING AFC 608
7 8 9
AIRCRAFT INCORPORATING AFC 603 AIRCRAFT NOT INCORPORATING AFC 603 AIRCRAFT INCORPORATING AFC 696
1-6
Change 9
Figure 1-5. Crew Station Interface Diagram, Aircraft BUNO 158928, 159504 through 161596 Not Incorporating AFC 450 and AFC 506
NAVAIR 01-75PAC-12
MPD 1 SOUND RECORDER-REPRODUCER ASCL 1 SASP AU CMEP 1 CMEP 2 PILOT KEYSET SASP DCU SRS INPUT/OUTPUT DATA AND CONTROL 3 VELOCITY, TRUE HEADING AND CONTROL GIMBAL POSITION AND MODE CONTROL GIMBAL CONTROL VECTOR, CHARACTER AND CONTROL RANGE, PRF, HV ON/OFF COMMANDS 8 BANK ANGLE COURSE ERROR CROSS TRACK ERROR ANALOG CHANNEL 4 VECTOR, CHARACTER AND CONTROL ANALOG CHANNEL 4 VECTOR, CHARACTER AND CONTROL 8 LAMP INPUTS/SWITCH OUTPUTS VELOCITY, TRUE HEADING AND CONTROL BAROMETRIC ALTIMETER SELECT, CONTROL AND LAUNCH LAMP INPUTS/SWITCH OUTPUTS MAGNETIC VARIATION SIMULATED HEADING HSI EHSI 7 ASCL 2 MPD 2 PILOT DISPLAY DAS 9 AFCS SEE NAV INTERCON-NECTION BOX AND CENTRAL REPEATER SYSTEM FDI EFDI 7
FLIGHT STATION
ANALOG CH 3 SS3 SDD DIGITAL
SENSOR STATION 3
IRDS VIDEO 11 RECORDER 6 10 IRDS DISP /TV MON
TACCO STATION
TACCO MDD ANALOG CH 4
TAD/TV 11 MON 10
NAVCOMM STATION
NAVCOMM ARO
NAV SIMULATOR GPS
ARM/ORD STATION
INERTIAL SYSTEM NO. 1 INERTIAL SYSTEM NO. 2 DOPPLER RADAR ARM/ORD TEST PANEL NAV INTERCON-NECTION BOX CENTRAL REPEATER SYSTEM
ANALOG CH 4
SS3 11 IRDS/MMIS 10 TRACKBALL SS3 TRAY ESM 10 11 11 11 MAD/ SAD
DIGITAL
TACCO ARO
UHF/HF RADIO TACCO TRACKBALL NAVCOMM KEYSET HSI EHSI 7 TTY & HSP DATA LINK
SEARCH STORES INTERCON-NECTION BOX ORDNANCE KEYSET
AFT ARMAMENT INTERCON-NECTION BOX FWD ARMAMENT INTERCON-NECTION BOX
HACLCS
TACCO TRAY
MODE STATUS SAD POWER ON AND ESM STATUS DOPPLER STATUS SAD MARK
ELEVATION\/AZIMUTH
COURSE COMMAND
COURSE COMMAND
TRANSMIT/RECEIVED DATA
TRANSMIT/RECEIVED DATA
MAGNETIC HEADING
MONITOR AND CONTROL
MONITOR AND CONTROL
MONITOR AND CONTROL
TRUE AIRSPEED
SELECT AND RELEASE
3 3
SDC CONNECTOR PLATE 4 TO MES/AC 1
SDC CONNECTOR PLATE 4
INPUT/OUTPUT DATA AND CONTROL
RDSS OUTPUT DATA AND CONTROL
DATA AND CONTROL
POSITION GIMBAL
ANEW 1
ANEW 5
ANEW 2
MES/AC 1&2
MDA 1 AGP 1
ANEW 4
MES/AC 2
ANEW 3
MES/AC 2&3
MDA 3 MDA 2 AGP 2
SYNCHRO/ DIGITAL CONVERTER (3 MODULES)
ARD
MES/AC 1
ANEW 4
ANEW 2
NAV/MUX
MES/AC 2
ARM/ORD
ANEW 1
VSBE VSB VSB GATEWAY GLOBAL MEMORY SECONDARY MEMORY
MAINTENANCE PANEL
MAINTENANCE PANEL INTERFACE
GPC 0
GPC 1
GPC 2
CP- 2044/ASQ-212
VME BUS RS-- 232
1 2 3 4
RIU WITH APS-- 115 EQUIPPED A/C OR INPUT COMMANDS TO RSC/ANALOG CH 3 FROM SDC WITH APS-- 137(V) EQUIPPED A/C. AIRCRAFT INCORPORATING AFC 540. AIRCRAFT BUNO 161762 AND SUBSEQUENT. NUMBERS SHOWN INSIDE SDC CONNECTOR PLATE DENOTE PROCESSING SDC MODULE WITHIN THE CP-- 2044.
NOTE
5 6 7 8
REMOVED ON AIRCRAFT INCORPORATING AFC 619. REMOVED ON AIRCRAFT INCORPORATING AFC 608. AIRCRAFT INCORPORATING AFC 603. AIRCRAFT NOT INCORPORATING AFC 603.
9 10 11
AIRCRAFT INCORPORATING AFC 696. AIRCRAFT INCORPORATING AFC 705. AIRCRAFT NOT INCORPORATING AFC 705.
Figure 1-6. Crew Station Interface Diagram, Aircraft BUNO 156507 through 158927 and 158929 through 161596 Incorporating AFC 450 and AFC 506 and Aircraft 161762 and Subsequent Incorporating AFC 506
DATA AND COMMANDS
DRIFT ANGLE
DRIFT ANGLE
X AXIS Y AXIS
ESM DATA
ICS
ICS
COMPUTER ALTITUDE
Y AXIS
CRS PITCH
X AXIS
CRS ROLL
Change 10
1-7
NAVAIR 01-75PAC-12
ASCL RCVR DAS 1 SOUND RECORDER-REPRODUCER DCU AFCS PCHRD PILOT COPILOT FPD FPD DEP EFDI EHSI MAD/SAD 3 3 A507 ICS ICS GIMBAL POSITION AND MODE CONTROL BAROMETRIC ALTIMETER ELEVATION/AZIMUTH ARINC 575 ARINC 575 SIMULATED HEADING TAS/SIM TAS IRDS VIDEO RADAR 3 IRDS/MMIS 2 2 3 3 TAD GROUP/ 2 TV MON SEE NAV INTERCONNECTION BOX AND CENTRAL REPEATER SYSTEM
FLIGHT STATION
SENSOR STATION 3
3 AUDIO TO ICS IRDS DISPLAY/ 2 TV MON
TACCO STATION
NAVCOMM STATION
NAV SIMULATOR
GPS 4
ARM/ORD STATION
FPD
FPD FPD
INS 1/ INS 2 BARO ALTIMETER
NAV INTERCONNECTION BOX
ARM/ORD TEST PANEL
PEP TB ANK
SIF
ESM TB
PEP ANK TB PEP ANK
UHF/HF
AFT ARMAMENT INTERCONNECTION BOX FWD ARMAMENT INTERCONNECTION BOX
SEARCH STORES INTERCONNECTION BOX CENTRAL REPEATER SYSTEM DEP HACLCS
CV-4145A DATA LINK
EHSI
PEP TB ANK
PEP TB ANK
MK 50
PRINTER
KG 84C
TTY EMULATION DATA
GIMBAL CONTROL
INPUT/OUTPUT DATA AND CONTROL
DATA AND CONTROL
RADAR/IFF VIDEO
MODE STATUS
HV ON/OFF
ETHERNET VIDEO DATA
CRS PITCH
ESM DATA
MAG HDG
VIDEO DATA
VIDEO
VIDEO
CRS ROLL
MAG VAR
VIDEO
DATA
VIDEO DATA
DATA
DATA
DATA
RIU EFDS J-BOX
VDC
VDC
VDC
VDC
VDC
VDC
ETHERNET
EIA 232
DATA
SCSI INTERFACE SIGNALS
SELECT, CONTROL, AND LAUNCH ARM/ORD
MONITOR AND CONTROL
MONITOR AND CONTROL
RANGE, PRF, HV ON/OFF
MONITOR AND CONTROL
MARK ON TOP
ARINC 429
COMPUTER MAINTENANCE PANEL
RDSS
SAD MARK
ARINC 429
NAVMUX
ETHERNET
EIA 232
TRANS I/O
TRANS I/O
TRANS I/O
NAVMUX
MAU
NAVMUX
ANEW 1
ANEW 5
ANEW 4
NAVMUX
ANEW 3
ANEW 2
GPC 1
GPC 0
VME BUS
CP-2451/ASQ-227
NOTE
1 2 AIRCRAFT INCORPORATING AFC 696 AIRCRAFT INCORPORATING AFC 705 3 4 AIRCRAFT NOT INCORPORATING AFC 705 AIRCRAFT NOT INCORPORATING AFC 719
Figure 1-7. Crew Station Interface Diagram (Applicable to Aircraft Incorporating AFC 607) 1-8 Change 12
TRANS I/O
ANEW 0
SDC
SDC
SELECT AND RELEASE
NAVAIR 01-75PAC-12
(RACK H1) BOTH SCISSOR SWITCHES IN GROUND POSITION PROVIDE GROUND TO KIT-1C/TSEC TRANSPONDER 5 COMPUTER (SEE AN/APX-72 IFF TRANSPONDER SET CKT R132) BOTH SCISSOR SWITCHES IN GROUND POSITION PROVIDE GROUND TO KIR-1C/TSEC TRANS PONDER COMPUTER (SEE AN/APX-76(V) SIF INTERROGATOR SET CKT R133) (RACK H1) J/P646 P 4 (MLC) TB51 (MAIN LOAD CENTER) IN ENERGIZED (GROUND) POSITION PROVIDES 28 D3 VDC FOR A270 NAV SIMULATOR WHEEL LOGIC (28 VDC) (SEE CENTRAL REPEATER SYSTEM CKT R121) D1 (RACK B1) TB411 C2 A2 6 A23 B3 IN ENERGIZED (GROUND) POSITION B1 PROVIDES 115 VAC PHASE C FOR IRDS RADOME FAN DC B2 6 IN ENERGIZED (GROUND) POSITION PROVIDES C3 GROUND TO ALTIMETER WEIGHT-ON-WHEELS. (SEE AN/APN-194(V) ELECTRONIC ALTIMETER SET C1 AND AN/APQ-107 (SINGLE) RADAR ALTIMETER WARNING SET CKT R103 AND R105) IN ENERGIZED (GROUND) POSITION PROVIDES GROUND TO GLOBAL POSITIONING SYSTEM. (SEE AN/ARN-151 GPS CKT R200) B3 B1 B2 (FS 354) J113/P113 (FORWARD LOAD CENTER) F D3 D2 D2 IN ENERGIZED (GROUND) POSITION PROVIDES 28 VDC FOR ENGINE LOW RPM SOLENOID. D3 (SEE ENGINE IDLE CONTROL CKT K13) D1 C3 A2 C1 B3 B1 A3 A1 A2 B2 C2 IN ENERGIZED (GROUND) POSITION PROVIDES 115 VAC TO A114 OUTFLOW VALVE OVERRIDE ACTUATOR OPEN CIRCUIT. IN DE-ENERGIZED A2 (AIR) POSITION PROVIDES VOLTAGE TO ACTUATOR THRU SIDE OUTFLOW VALVE SWITCH. (SEE PRESSURIZATION AND AUXILIARY VENT CONTROL CKT H8) DC D1
D3 D2 D1 C3 C2 C1
(RACK H1) TB447 A16 3 2 5 3
IN DE-ENERGIZED (AIR) POSITION PROVIDES GROUND FOR LOAD MONITORING CONTROL RELAY (SEE POWER SYSTEMS CONTROL CKT X1)
D3 D1 C3 C1 7 D2
C2
C16
IN ENERGIZED (GROUND) POSITION PROVIDES 28 VDC FOR OVERHEAT WARNING AUXILIARY RELAY (SEE ELECTRONIC RACKS OVERHEAT WARNING CKT W10)
A3
D2
IN ENERGIZED (GROUND) POSITION PROVIDES 28 VDC FOR BOMB BAY LIGHTS. (SEE SERVICE LIGHTS CKT L15) IN DE-ENERGIZED (AIR) POSITION PROVIDES 28 VDC TO M117 ANGLE OF ATTACK INDICATORS. (SEE ANGLE OF ATTACK SYSTEM CKT F2) IN DE-ENERGIZED (AIR) POSITION PROVIDES 28 VDC TO EMPENNAGE DEICE CONTROL RELAY AND GROUND TO EMP DEICE PARTING STRIP POWER RELAY. (SEE EMPENNAGE DEICING CONTROL CKT H28) (FS 354) J113/P113 28 VDC D
A1
B3 B2 B1
D10
D1 IN DE-ENERGIZED (AIR) POSITION AND WITH PROP DEICE SWITCH S187 IN ON POSITION PROVIDES 28 VDC FOR PROP DEICE RELAY (SEE PROPELLER ICE CONTROL CKT H3) A3 A1 A2 (SS 3) TB446 C12 C11
A3 A1 A2
10
MAIN AC BUS A CIRCUIT BREAKER PANEL GRD AIR SENSING 28 VDC DC 28 VDC X2 C25 X1 28 VDC NO. 1 SCISSOR SWITCH RELAY
IN ENERGIZED (GROUND) POSITION PROVIDES A3 GROUND TO NAV INTERCONNECTION BOX CONNECTOR 1J22-C. (SEE NAVIGATION INTERCONNECTION BOX INTERFACE CKT R122) A1 IN ENERGIZED (GROUND) POSITION, PROVIDES A GROUND TO AFCS ELECTRICAL TEST PANEL (SEE AN/ASW-31 AUTOMATIC FLIGHT CONTROL SYSTEM CKT R118 [AIRCRAFT NOT INCORPORATING AFC 696]) OR PROVIDES WOW SIGNAL TO FLIGHT CONTROL COMPUTER (SEE AN/ASW-60 DIGITAL COMPUTER SYSTEM CKT R118 [AIRCRAFT INCORPORATING AFC 696]). TO PILOT, COPILOT, AND NAVCOMM CDU (SEE CKT R106A [AIRCRAFT INCORPORATING AFC 719]) TO INTERCOMMUNICATIONS SYSTEM SERVICE BOX CONTROL. (SEE AN/AIC-22(V) INTERCOMMUNICATION SYSTEM CKT R130)
A3 IN ENERGIZED (GROUND) POSITION PROVIDES 28 VDC TO GROUND AIRCONDITIONING SWITCH S154 (SEE PRESSURIZATION AND AUXILIARY VENT CONTROL CKT H8) A2 A1 A3 A2 A1
B3 B2 B1 A3 A2 A1 IN ENERGIZED (GROUND) POSITION PROVIDES 28 VDC TO APU CONTROL RELAY. (SEE AUXILIARY POWER UNIT CONTROL CKT K21) IN ENERGIZED (GROUND) POSITION PROVIDES 28 VDC TO A164 AUXILIARY POWER UNIT. (SEE AUXILIARY POWER UNIT CONTROL CKT K21)
X1 X2
NO. 3 SCISSOR SWITCH RELAY
X1 X2
X1 X2
X1 X2 NO. 5 SCISSOR SWITCH RELAY
X1 X2 APU SCISSOR SWITCH RELAY
28 VDC THRU APU EXT CONTROL RELAY APU FIRE EXT. MANUAL RELEASE SWITCH S192 AND APU CONTROL SWITCH S195. (SEE AUXILIARY POWER UNIT CONTROL CKT K21)
C26
J112/P112 C14 (RACK C1) TB410 9 B3 28 VDC TO AUTO FLT CONT SYS GROUND TEST PNL. (PILOT SIDE CONSOLE) (SEE PB-20N AUTOPILOT SYSTEM CKT R118). WITH BOTH SCISSOR SWITCHES IN GROUND POSITION PROVIDES GROUND FOR AFCS POWER RELAY AND AUTOPILOT GROUND TEST PNL. (PILOT SIDE CONSOLE) (SEE PB-20N AUTOPILOT SYSTEM CKT R118). 28 VDC TO AUTO FLT CONT SYS GROUND TEST PNL. (PILOT SIDE CONSOLE) (SEE AN/ASW-31 AUTOMATIC FLIGHT CONTROL SYSTEM CKT R118 OR AN/ASW-60 DIGITAL COMPUTER SYSTEM CKT R118 [AIRCRAFT INCORPORATING AFC 696]). WITH BOTH SCISSOR SWITCHES IN GROUND POSITION PROVIDES GROUND FOR AFCS POWER RELAY AND AUTOPILOT GROUND TEST PNL. (PILOT SIDE CONSOLE) (SEE AN/ASW-31 AUTOMATIC FLIGHT CONTROL SYSTEM CKT R118 OR AN/ASW-60 DIGITAL COMPUTER SYSTEM CKT R118 [AIRCRAFT INCORPORATING AFC 696]). B3 (SEE EXTERIOR LIGHTS CKT L1) B2 B1 B2 (MLC) TB164 C11 1N649-1 1N649-1 C10 1N649-1 C12 B9 X2 B2 X1 WHITE STROBE LIGHT CONTROL RELAY A2 B3 B1 A3 A1 (RIGHT WING STATION 100) TB54 A14 (RIGHT SCISSOR SWITCH) J184/P147 D F FUS J112/P259 P C15 GRD WHEN WEIGHT ON BOTH WHEELS N SEE DETAIL A DC C A3 B E GROUND A2 WING FUS DISC R8-2 12 11 J319/P434 DETAIL A 1 TO J184 RIGHT SCISSOR SWITCH WING B1 B2 B3 A1 AIR (SEE EXTERIOR LIGHTS CKT L1) (LEFT WING STATION 100) TB 52 A13 L (FS 370) (MAIN LANDING GEAR) LEFT SCISSOR SWITCH 1 AIR B1 B2 J A14 D F A C B (FS 525) TB419 A6 FUS J174/P262 ZR (MAIN LANDING GEAR) RIGHT SCISSOR SWITCH WING FUS DISC L8-2 23 J325/P440 10 WING DC B3 A1 A2 A3 2 3 4 5 6 GROUND 7 8 AIRCRAFT BUNO 161001 AND SUBSEQUENT AIRCRAFT BUNO 158563 AND SUBSEQUENT AIRCRAFT BUNO 156507 THROUGH 158226 AIRCRAFT BUNO 161001, 161005 AND SUBSEQUENT AND AIRCRAFT INCORPORATING AFC 408 AIRCRAFT BUNO 156506 THROUGH 161000, 161002 THROUGH 161004 AIRCRAFT INCORPORATING AFC 540 AN/ASH-37 SDRS SYSTEM, AIRCRAFT INCORPORATING AFC 562 AIRCRAFT EQUIPPED WITH AN/ASW-31 AUTOMATIC FLIGHT CONTROL SYSTEM OR AN/ASW-60 DIGITAL COMPUTER SYSTEM AIRCRAFT EQUIPPED WITH PB-20N AUTOPILOT SYSTEM AIRCRAFT INCORPORATING AFC 719
(LEFT SCISSOR SWITCH) J184/P147 E DC
NOTE
BOTH SCISSOR SWITCHES IN GROUND POSITION PROVIDE GROUND TO IRDS EXTEND-RETRACT MECHANISM (SEE INFRARED DETECTION SET TURRET CONTROL CKT R179)
B2
C8 8 H4
LEFT SCISSOR SWITCH IN AIR POSITION PROVIDES GRD FOR SAFETY DISABLE OVERRIDE RELAY IN A275 SEARCH STORES INTERCONNECTION BOX. (RACK G2) (SEE SEARCH STORES SYSTEM CKT A103)
J/P 811 (FS 525) TB419 A5 K
1N649-1 1N1616 8 G2
LEFT SCISSOR SWITCH IN GROUND POSITION PROVIDES GROUND FOR FLIGHT IDLE STOP RELAY. (SEE FLIGHT IDLE STOP CKT K9)
C9
1N3191
EITHER SCISSOR SWITCH IN AIR POSITION PROVIDES GROUND FOR JETTISON CONT RELAY 2A7K4 IN FWD ARMAMENT INTERCONNECTION BOX (RACK B1) (SEE STORES JETTISON RELEASE SYSTEM CKT A107)
X2
X1
LOWER STROBE LIGHT CONTROL RELAY
J/P910 RIGHT SCISSOR SWITCH IN GROUND POSITION PROVIDES GROUND FOR IDLE STOP RELAY. (SEE FLIGHT IDLE STOP CKT K9) J
TO J184 LEFT SCISSOR SWITCH
Figure 1-8. Ground/Air Sensing Signal Flow Diagram
Change 12
1-9
NAVAIR 01-75PAC-12
(RACK A1) TB173 A1 A2
(TACCO STATION) TB192 A1 A2
(RACK B1) TB191 A1 A2
(RACK D1) TB189 A1 A2
(RACK C3) TB433 B5 B4
(SENSOR STATION 3) TB178 A1 A2
(RACK C3) TB177 A1 A2
(NAVCOM STATION) TB175 A1 A2
(FORWARD LOAD CENTER) TB50 D16
(FORWARD LOAD CENTER) P15 F A2CR10 1N649-1 INDICATOR LIGHT CONTROL
(PILOT INSTRUMENT PANEL) G5 P4 U CC
(CENTER INSTRUMENT PANEL) Y Y 28 VDC
FLIGHT STATION PANEL SIGNAL LIGHTS CKT L24
DETAIL A
DETAIL A
D17
INST NEG TEST BUS
RACK OVHT
28 VDC 2 (RACK D3) TB172 A10 A7 2 2 (RACK D3) TB172 A1 A2 (SENSOR STATION 1) TB187 1 A1 A2 (SENSOR STATION 2) TB186 A1 A2 OVERHEAT (RACK E1) TB185 A1 A2 (RACK E2) TB184 A1 A2 (RACK G1) TB183 A1 A2 (RACK F1) TB179 A1 A2 (RACK F1) TB424 A29 A28 (FS 882) TB198 A7 A9 (RACK H1) TB182 A1 A2 (RACK J1) TB181 A1 A2 (RACK K1) TB180 A1 A2 OVERHEAT TEMPERATURE SENSOR DETAIL C (MAIN LOAD CENTER) DETAIL A DETAIL B DETAIL A DETAIL B DETAIL A (NOSE WHEEL WELL) RACK OVERHEAT SIGNAL HORN W3 R + DC OVERHEAT TEMPERATURE SENSOR J1 B A 28 VDC OVERHEAT A J1 B 1NR649-1
A1 A2
28 VDC RESET 5 6 RESET SWITCH 7 8
RACK OVERHEAT LIGHT 1 Y PUSH TO TEST 3
A3
A4 A5
MAIN DC BUS CIRCUIT BREAKER PANEL RACK OVERHEAT WARNING 28 VDC 1N649-1 TB51 C23 C24 C22 SCISSOR SWITCH RELAY NO. 1 (ENERGIZED WITH WEIGHT-ON-WHEELS)
P231 D
REPEAT CYCLE TIMER
RACK OVERHEAT SIGNAL HORN (FS 514 P231 A + DC DC
(FS 354) N18 ZA
DC DETAIL A
C OVERHEAT WARNING AUXILIARY RELAY
TIMER DC
A1 A2
28 VDC RESET 5 6 8 RESET SWITCH 2 RACK OVERHEAT LIGHT 1 Y PUSH TO TEST 3
A3
4 1NR649-1 7
AN ELECTRONIC RACK OVERTEMPERATURE CONDITION EXISTS WHEN AN ELECTRONIC RACK REACHES A TEMPERATURE OF 57.2 (1.7) _C (135 (3) _F). INDICATIONS THAT A RACK HAS REACHED THIS CONDITION ARE THE OVERHEAT LIGHT AT THE RACK COMES ON, THE RACK OVHT LIGHT ON THE CENTER INSTRUMENT PANEL COMES ON, AND IF THE AIRCRAFT IS ON THE GROUND (WEIGHT ON WHEELS), THE RACK OVERHEAT SIGNAL HORN SOUNDS. THE RACK OVERHEAT WARNING CIRCUIT BREAKER ON THE MAIN DC BUS CIRCUIT BREAKER PANEL APPLIES 28 VDC TO THE SOLENOID OF ALL RESET SWITCHES. THE OVERHEAT WARNING AUXILIARY RELAY (THROUGH THE ENERGIZED CONTACTS OF THE SCISSOR SWITCH RELAY NO. 1) AND TO THE TIMER.
WHEN AN OVERHEAT TEMPERATURE SENSOR (LOCATED IN EACH RACK) CLOSES, A GROUND SIGNAL TURNS ON THE RACK OVERHEAT LIGHT ON THE RACK AND THE RACK OVHT LIGHT ON THE CENTER INSTRUMENT PANEL. THE GROUND SIGNAL THAT TURNS ON THE RACK OVHT LIGHT IS ROUTED THROUGH THE NORMALLY CLOSED CONTACTS OF THE RESET SWITCH. THE GROUND SIGNAL IS ALSO ROUTED TO THE RESET SWITCH SOLENOID FROM THE OVERHEAT TEMPERATURE SENSOR. THE RESET SWITCH DOES NOT CLOSE UNTIL THE RESET TOGGLE HAS BEEN MANUALLY PLACED TO THE SOLENOID-HELD MOMENTARY POSITION.
SETTING THE RESET SWITCH TO THE SOLENOID-HELD MOMENTARY POSITION INTERRUPTS THE GROUND SIGNAL FROM THE OVERHEAT TEMPERATURE SENSOR TO THE RACK OVHT LIGHT ON THE CENTER INSTRUMENT PANEL AND THE OVERHEAT WARNING AUXILIARY RELAY. THE ACTION CAUSES THE RACK OVHT LIGHT TO GO OUT AND THE RACK OVERHEAT SIGNAL HORN TO SHUT OFF. THE REASON FOR THIS ACTION IS TO ALLOW DETECTION OF AN OVERTEMP CONDITION IN ANOTHER ELECTRONICS RACK. THE SWITCH STAYS IN THE DOWN POSITION AND THE RACK OVERHEAT DROPS BELOW THE LOWER LIMIT OF 53.3_C (128_F) AT WHICH TIME THE GROUND SIGNAL FROM THE OVERHEAT TEMPERATURE SENSOR IS REMOVED FROM THE RESET SWITCH SOLENOID.
OVERHEAT TEMPERATURE SENSOR
J1 B A
A4 A5 A6 DC
DETAIL B
NOTE
1 2 AIRCRAFT BUNO 156507 THROUGH 161131 AIRCRAFT BUNO 161132 AND SUBSEQUENT
(RACK D3) TB172 28 VDC OVERHEAT 1N6162 A8 4 1NR649-1 DMTC OVERHEAT (SEE DMTS POWER DISTRIBUTION) A9 5 6 8 DMTC OVERHEAT RESET SWITCH A10 A7 28 VDC RESET
7 2
DETAIL C
1-10
Figure 1-9. Electronic Rack Overheat Warning Diagram, Aircraft BUNO 156507, 158928, 159503 through 159886, 159888,159890 through 161409 and 161411 through 161596 and Aircraft Not Incorporating AFC 450
NAVAIR 01-75PAC-12
(RACK A1) TB173 A1 A2
(TACCO STATION) TB192 A1 A2
(RACK C3) TB433 B5 B4
(SENSOR STATION 3) TB178 A1 A2
(NAVCOM STATION) TB175 A1 A2
(FORWARD LOAD CENTER) TB50 D16
(FORWARD LOAD CENTER) P15 F A2CR10 1N649-1 INDICATOR LIGHT CONTROL
(PILOT INSTRUMENT PANEL) G5 P4 U CC
(CENTER INSTRUMENT PANEL) Y Y 28 VDC
FLIGHT STATION PANEL SIGNAL LIGHTS CKT L24
DETAIL A (RACK F1) TB424 A29 A30
DETAIL A (RACK F1) TB179 A1 A2 (RACK G1) TB183 A1 A2 (FS 882) TB198 A7 A9
D17 (RACK H1) TB182 A1 A2 (RACK J1) TB181 A1 A2
INST NEG TEST BUS
RACK OVHT
(RACK K1) TB180 A1 A2 SENSOR STATION 2 OVERHEAT SENSOR (SENSOR STATION 1) TB153 A4 A5 DC A6 DC (RACK E1 DISC) J/P548 F G (SENSOR STATION 1 AND 2 OVHD DISC) J/P470 P N A1 A2 (SENSOR STATION 1 AND 2 OVHD DISC) J/P470 ZC ZB SENSOR STATION 1 OVERHEAT SENSOR
J1 B
J1 B A
DETAIL B (RACK E2) J/P564 U M V R DETAIL A
(RACK E2) TB184 A1 A2
DETAIL A (SENSOR (SENSOR STATION 1 AND 2) STATION 1 AND 2 OVHD DISC) ASP POWER CONTROL J1 J/P470 ZG R (RACK E1 DISC) J/P548 D C B H 7 9 AU/DCU OVHT LIGHT WARNING HORN & OVHT LIGHT
A J1 10 (RACK E1) TB185 A1 A2 A7 1N649-1
STA OVHT LIGHT 11
(MAIN LOAD CENTER) TB51 C23 MAIN DC BUS CIRCUIT BREAKER PANEL 28 VDC RACK OVERHEAT WARNING 1N649-1 C22 SCISSOR SWITCH RELAY NO. 1 (ENERGIZED WITH WEIGHT-ON-WHEELS) AIR GND A2 X2 X1 A1 OVERHEAT WARNING AUXILIARY RELAY P231 D REPEAT CYCLE TIMER RACK OVERHEAT SIGNAL HORN (FS 514 P231 A TIMER DC B DC + DC W3 R + DC (FS 354) N18 ZA
RESET 5 6 ASP OVHT RESET SW (RACK D3) TB172 A1 A2 A7
A8 (NOSE WHEEL WELL) RACK OVERHEAT SIGNAL HORN A9 A10 4 7 1N66162 A11 A12 RESET 5 6 DMTC OVERHEAT RESET SW 8
C24
AU/DCU OVERHEAT WARNING (SEE NAVAIR 01-75PAC- -8) -12-
28 VDC OVERHEAT
A1 A2
28 VDC RESET 5 6 8
RACK OVERHEAT LIGHT 1 Y PUSH TO TEST 3
J1 B A
28 VDC OVERHEAT
A1 A2
28 VDC RESET 5 6 8 RESET SWITCH 2 RACK OVERHEAT LIGHT 1 Y PUSH TO TEST
DMTC OVERHEAT (SEE DMTS POWER DISTRIBUTION)
1N649-1
A8 A9
4 7 8
A3 OVERHEAT TEMPERATURE SENSOR J1 B A DC DETAIL A 1NR649-1 A4 A5
A3
4 1NR649-1 7
1N66162 A10
RESET SWITCH 7
J1 B A
A4 A5 A6 DC
NOTE
3 FOR OVERHEAT WARNING CIRCUIT DESCRIPTION, SEE FIGURE 1-9.
DETAIL B
Figure 1-10. Electronic Rack Overheat Warning Diagram, Aircraft BUNO 156508 through 158927, 158929 through 159329, 159887 Incorporating AFC 450 and 159889, 161410, 161762 and Subsequent
1-11
NAVAIR 01-75PAC-12
BOMB BAY STOWAGE BIN
MODULE PULLER STOWAGE COMM SYSTEM MODULE PULLERS (3) (BEHIND PANEL) FWD INSPECTION LIGHT AND 75 FT. CORD ASSY
MOUNTED TO VERTICAL RACK
DETAIL B LH BRACKET CLAMP
PORT SPARE LAMPS IDENTIFICATION DECAL
STOWAGE FOR ARMAMENT LOOSE EQUIPMENT, STORES LOADING AND STORES UNLOADING RIGGING
NOTE
LH BRACKET CLAMP TO BE USED ONLY AT RACKS B2 AND F
CAUTION
UNIVERSAL MODULE PULLER MOUNTED TO INCLINED RACK MAXIMUM TABLE LOAD IS 100 POUNDS TABLE WITHOUT CLAMPS CAN BE USED DURING FLIGHT EXCEPT WHEN LANDING OR TAKING OFF
PARACHUTE STOWAGE
SPARE CIRCUIT BREAKERS 5 AMP 2 REQD
STOWED SETTING
DETAIL A RH BRACKET
CLAMP
STBD AFT CIRCUIT BRK PANEL FWD ELECT LOAD CENTER
AFT BRACKET STOWAGE OBS STA MAINTENANCE TABLE INSTALLED ON RACK
FLIGHT ENGINEER COPILOT
STORAGE FOR TELEPRINTER PAPER PACK ADDITIONAL DITCHING STORES EXIT STOWAGE
RH BRACKET CLAMP TO BE USED ONLY AT RACKS B3 AND C2
NOTE
LH AND RH BRACKETS MUST BE REMOVED AND STOWED BEFORE MAINTENANCE TABLE IS PLACED BELOW COUNTER TOP TAIL RADOME
NOTE
NOSE RADOME
PILOT SPARE FUSE PANEL (LOCATED PILOT OVERHEAD) PROP PLANE DITCHING EXIT ENTRY DOOR OBS STA
SPARE LAMP STOWAGE
SPARE LAMP STOWAGE
LU 2 (LU 3 SIMILAR)
PORT
FWD
EXTENDER STOWAGE
LU 1 CARD EXTENDER (2) MTT A MAINTENANCE CONTROL CONSOLE AISLE SIDE MTT B STOWAGE FOR SPARE MODULE CASES
TOOL KIT LEFT SIDE OF COMPUTER INPUT/OUTPUT ASSY
SPARE LAMPS IDENTIFICATION DECAL

REEL HEIGHT GAGE MTT TAPE STORAGE
DMTU
2
NARROW EXTENDER STOWAGE
AFT AISLE SIDE WIDE EXTENDER STOWAGE AFT PORT LU 4 DMTC ASSEMBLY REMOVAL HANDLE (2) AFT PORT LU 4 2 VOLT--OHM METER PSM--4 OR EQUIVALENT 1
STATIC ELIMINATOR (WRISTSTRAP) BOARD PULLER (MODULE EXTRACTOR)
NOTE
AIRCRAFT BUNO 157326 AND SUBSEQUENT, AND PRIOR AIRCRAFT MODIFIED BY AFC 208 ALL LOGIC UNITS OF THE AN/AYA--8C AND OL--377(V)/AY DATA ANALYSIS PROGRAMMING GROUP SETS HAVE THE SAME TOOL AND TEST EQUIPMENT REQUIREMENTS
AFT
PORT OSCILLOSCOPE AND STORAGE COVER (TEKTRONIX TYPE 453 OR EQUIVALENT)
DETAIL
MEMORY STACK SENSE AMPLIFIER (2) (REMOVAL TOOL)
CARD REMOVAL TOOL (2)
TOOL CASE ASSEMBLY (2 PLACES) TOOL CASE ASSEMBLY (2 PLACES)
1-12
Figure 1-11. Tools and Test Equipment Location Diagram
NAVAIR 01-75PAC-12
MANUAL TITLE AVIONIC SUBSYSTEM
AN/ASQ-114(V) COMPUTER MX-8023( )/AYA-8 DATA ANALYSIS LOGIC UNIT (LU 1) MX-8024( )/AYA-8 DATA ANALYSIS LOGIC UNIT (LU 2) MX-8034/AYA-8 DATA ANALYSIS LOGIC UNIT (LU 3) MX-9360/AYA-8B DATA ANALYSIS LOGIC UNIT (LU 4) RD-319/AYA- MAGNETIC TAPE TRANSPORT -8 NAVAIR 01-75PAC-12 TECHNICIAN RD-319A/AYA- MAGNETIC TAPE TRANSPORT -8 AN/ASH-33 DIGITAL RECORDER-REPRODUCER SET C-7627(P)/AYA-8 CONTROL-INDICATOR C-7628/AYA-8 CONTROL-INDICATOR C-7629/AYA-8 CONTROL-INDICATOR AN/ASA-66 TACTICAL DATA DISPLAY GROUP AN/AJN-15 FLIGHT DIRECTOR SYSTEM HORIZONTAL SITUATION INDICATOR GROUP CENTRAL REPEATER AND CONTROL SYSTEM NAVIGATION SIMULATOR AN/APN-194(V) ELECTRONIC ALTIMETER SET AN/APQ-107 RADAR ALTIMETER WARNING SET NAVAIR 01-75PAC-12-1 FLIGHT STATION AN/APX-72 IFF TRANSPONDER AN/ARA-50 UHF DIRECTION FINDER GROUP PB-20N AUTOPILOT AN/ASW-31 AUTOMATIC FLIGHT CONTROL AN/ASW-60 DIGITAL COMPUTER SYSTEM AN/ARN-83 DIRECTION FINDER SET (LF-DF) ON TOP POSITION INDICATOR RECEIVER AN/ARN-32 RADIO RECEIVING SET (MARKER BEACON) GLIDESLOPE TACAN NAVIGATION SET AN/ARN-87(V) VHF/VOR NAVCOMM SYSTEM R-2217/ARN-140 VHF NAVIGATION SYSTEM (VOR, ILS, MARKER BEACON) MLR-2020-A-1 MULTI-MODE RECEIVER AN/ARC-182(V) VHF/UHF COMMUNICATION SYSTEM C-11067/ARC-197 VHF COMMUNICATION SYSTEM AN/ARC-210 VHF/UHF COMMUNICATION SYSTEM IP-917/ASA-70 MULTIPURPOSE DATA DISPLAY IP-918/ASA-70 SENSOR DATA DISPLAY NAVAIR 01-75PAC-12-2 TACTICAL COORDINATOR STATION IP-919/ASA-70 AUXILIARY READOUT DISPLAY CV-2461A/A SIGNAL DATA CONVERTER OD-159/A TACCO AUXILIARY DISPLAY TACCO POWER CONTROL AAU-28/A SYNCHRO ALTIMETER-TRANSMITTER AN/ACQ-5( ) DATA TERMINAL SET AN/ACQ-8( ) DIGITAL DATA SET FORWARD LOAD CENTER AFT ELECTRONIC AFT ELECTRONIC AFT ELECTRONIC AFT ELECTRONIC DPS ELECTRONIC DPS ELECTRONIC DPS ELECTRONIC DPS ELECTRONIC MAIN LOAD CENTER DPS ELECTRONIC DPS ELECTRONIC FORWARD ELECTRONIC FORWARD ELECTRONIC FLT STA H2/H3 H2/H3 H2/H3 H2/H3 D1 D1 D1 D1 MLC D1 D1 B1/B2 B1/B2 27 H2/H3 MLC B1/B2 MLC E2 E2 MLC B1/B2 H2/H3 6 H2/H3 B1/B2 22 23 20 21 27 6 24 22 23 6 25
CIRCUIT BREAKER PANEL

DPS ELECTRONIC DPS ELECTRONIC DPS ELECTRONIC DPS ELECTRONIC DPS ELECTRONIC DPS ELECTRONIC DPS ELECTRONIC DPS ELECTRONIC DPS ELECTRONIC DPS ELECTRONIC DPS ELECTRONIC
LOCATION
D1 D1 D1 D1 D1 D1 D1 D1 D1 D1 D1 B1/B2 FLT STA B1/B2 FLT STA B1/B2 B1/B2 B1/B2 CB12 FLT STA FLT STA FLT STA MLC MLC MLC MLC B1/B2 MLC MLC B1/B2 B1/B2 H2/H3 5 5 5 4 3 26 1 7 14 2
MANUAL TITLE
AVIONIC SUBSYSTEM

CENTER ELECTRONIC CENTER ELECTRONIC FORWARD ELECTRONIC CENTER ELECTRONIC CENTER ELECTRONIC CENTER ELECTRONIC CENTER ELECTRONIC CENTER ELECTRONIC CENTER ELECTRONIC MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER DPS ELECTRONIC MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER FORWARD ELECTRONIC FORWARD ELECTRONIC HARPOON
LOCATION
E2 E2 B1/B2 E2 E2 E2 E2 E2 E2 MLC MLC MLC D1 MLC MLC MLC MLC MLC MLC MLC MLC MLC MLC B1/B2 B1/B2 E1 11 17 1 2 3 4 5 6 7 10 12 13 4 15 16 19 16 17 18 19 20 21 22 23 24 25 26 27 10 11 12 13 14 15
NOTE
NOTES 8 AND 9 ARE NO LONGER APPLICABLE TO THIS FIGURE AIRCRAFT BUNO 158928,159503 THROUGH 161596 AIRCRAFT BUNO 161132 AND SUBSEQUENT AIRCRAFT BUNO 156514 AND 157322 AND SUBSEQUENT AIRCRAFT BUNO 156507 THROUGH 156513 AND 156515 THROUGH 157331 AIRCRAFT BUNO 156507 THROUGH 161121 AND 161123 THROUGH 161131 AIRCRAFT BUNO 161122 AND 161132 SUBSEQUENT AIRCRAFT BUNO 156507 THROUGH 158927 AND 158929 THROUGH 159329 AIRCRAFT BUNO 160290 AND SUBSEQUENT AIRCRAFT BUNO 160290 AND SUBSEQUENT AND AIRCRAFT INCORPORATING AFC 405 AIRCRAFT BUNO 156507 THROUGH 156513 AND 156515 THROUGH 157331 NOT INCORPORATING AFC 459 AIRCRAFT BUNO 156507 THROUGH 156513 AND 156515 THROUGH 157331 INCORPORATING AFC 459, AND 156514 AND 157322 AND SUBSEQUENT AIRCRAFT BUNO 158928, 159503 THROUGH 159888 AND 159890 THROUGH 161131 AIRCRAFT BUNO 156514, 157332 THROUGH 161337 NOT INCORPORATING AFC 427 AIRCRAFT BUNO 161338 AND SUBSEQUENT AND AIRCRAFT INCORPORATING AFC 427 AIRCRAFT BUNO 158928, 159503 THROUGH 161409 AND 161411 THROUGH 161596 DELETED AIRCRAFT INCORPORATING AFC 457 AIRCRAFT INCORPORATING AFC 540 AIRCRAFT INCORPORATING AFC 472 AIRCRAFT INCORPORATING AFC 485 AIRCRAFT INCORPORATING AFC 651 AIRCRAFT INCORPORATING AFC 686 AIRCRAFT INCORPORATING AFC 693 AIRCRAFT INCORPORATING AFC 696 AIRCRAFT INCORPORATING AFC 738
AN/ASA-66 TACTICAL DATA DISPLAY GROUP AN/ARR-72 MINIATURE SONOBUOY RCVR SYS ID-1872/A AMBIENT SEA NOISE METER AN/AQA-7A(V)10 SONAR COMPUTER-RECORDER GROUP NAVAIR 01-75PAC-12-4 AN/ASA-76A GENERATOR-TRANSMITTER GROUP SENSOR STATIONS 1 AND 2 HYPERBOLIC FIX MEASURING UNIT AN/AQH-4(V)( ) SOUND RECORDER-REPRODUCER SET AN/AQH-4A(V)2 SOUND RECORDER-REPRODUCER SET TIME CODE GENERATOR SYSTEM BATHYTHERMOGRAPH AN/ARS- ) SONOBUOY REFERENCE SYSTEM -3( AN/APS-115( ) RADAR SET MX-7974/ASA-69 RADAR INTERFACE UNIT AN/AAS-36( ) INFRARED DETECTING SET AN/ASQ-10A MAGNETIC DETECTION SET AN/ASQ-81 MAGNETIC DETECTION SET AN/ASA-64 SUBANOMALY DETECTING GROUP AN/ASA-65(V)2 MAGNETIC COMPENSATOR GROUP AN/ASA-65(V)5 MAGNETIC COMPENSATOR GROUP AN/APX-76A SIF INTERROGATOR AN/ALQ-78 ESM SET AN/ALQ-78A ESM SET AN/ALR-66(V)3 COUNTERMEASURES RECEIVING SET SEARCH STORES SYSTEM KILL STORES CONTROL AND RELEASE HARPOON AIRCRAFT COMMAND LAUNCH CONTROL SET (HACLCS)
{ { {
FORWARD ELECTRONIC AND FORWARD LOAD CENTER FORWARD ELECTRONIC AND FORWARD LOAD CENTER FORWARD ELECTRONIC FORWARD ELECTRONIC FORWARD ELECTRONIC AND NAV INTERCONNECTION BOX FORWARD LOAD CENTER FORWARD LOAD CENTER FORWARD LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER FORWARD ELECTRONIC MAIN LOAD CENTER MAIN LOAD CENTER FORWARD ELECTRONIC FORWARD ELECTRONIC AFT ELECTRONIC
RIGHT SIDE LOOKING OUTBOARD

MAIN LOAD CENTER (MLC) FORWARD LOAD CENTER FLIGHT STATION
LEFT SIDE LOOKING OUTBOARD
FORWARD ELECTRONIC DPS ELECTRONIC CENTER ELECTRONIC NAVCOMM AFT ELECTRONIC TACCO STATION COMPUTER DITCHING EXIT HARPOON
AN/ASN-179 REPLACEMENT INERTIAL NAVIGATION SYSTEM AFT ELECTRONIC AN/ARC-161 HF COMMUNICATION SYSTEM MAIN LOAD CENTER AN/ARC-243(V) HF COMMUNICATION SYSTEM NAVAIR 01-75PAC-12-3 NAVIGATION COMMUNICATION STATION AN/ARC-143 UHF COMMUNICATION SYSTEM AN/ARC-187(V) UHF COMMUNICATION SYSTEM AN/AGC-6 TELETYPEWRITER SET AN/AIC-22(V) INTERCOMMUNICATIONS SET C-11067/ARC-197 VHF COMMUNICATION SYSTEM AN/ARC-182(V) VHF/UHF COMMUNICATION SYSTEM AN/ARN-151 GLOBAL POSITIONING SYSTEM FORWARD ELECTRONIC MAIN LOAD CENTER CENTER ELECTRONIC CENTER ELECTRONIC MAIN LOAD CENTER FORWARD ELECTRONIC AFT ELECTRONIC AFT ELECTRONIC FORWARD ELECTRONIC
ENTRY DOOR OBSERVER STATION
Figure 1-12. Circuit Breaker Panel Location Diagram, Aircraft BUNO 156507 through 161596 Not Incorporating AFC 450
Change Change 115
1-13
NAVAIR 01-75PAC-12
NOTE
MANUAL TITLE
AVIONIC SUBSYSTEM
AN/ASQ-114(V) COMPUTER MX-8023( )/AYA-8 DATA ANALYSIS LOGIC UNIT (LU 1) MX-8024( )/AYA-8 DATA ANALYSIS LOGIC UNIT (LU 2) MX-8034/AYA-8 DATA ANALYSIS LOGIC UNIT (LU 3) MX-9360/AYA-8B DATA ANALYSIS LOGIC UNIT (LU 4) AN/ASH-33 DIGITAL DATA RECORDER-REPRODUCER SET C-7627(P)/AYA-8 CONTROL-INDICATOR C-7628/AYA-8 CONTROL-INDICATOR C-7629/AYA-8 CONTROL-INDICATOR AN/ASA-66 TACTICAL DATA DISPLAY GROUP AN/AJN-15 FLIGHT DIRECTOR SYSTEM HORIZONTAL SITUATION INDICATOR GROUP ELECTRONIC FLIGHT DISPLAY SYSTEM CONTROL ELECTRONIC HORIZONTAL SITUATION INDICATOR ELECTRONIC FLIGHT DIRECTOR INDICATOR CENTRAL REPEATER AND CONTROL SYSTEM NAVIGATION SIMULATOR AN/APN-194(V) ELECTRONIC ALTIMETER SET AN/APQ-107 RADAR ALTIMETER WARNING SET

DPS ELECTRONIC DPS ELECTRONIC DPS ELECTRONIC DPS ELECTRONIC DPS ELECTRONIC DPS ELECTRONIC DPS ELECTRONIC DPS ELECTRONIC DPS ELECTRONIC FORWARD ELECTRONIC AND FORWARD LOAD CENTER FORWARD ELECTRONIC AND
LOCATION
D1 D1 D1 D1 D1 1 D1 D1 D1 D1 B1/B2 FLT STA B1/B2 FLT STA B1/B2 B1/B2 B1/B2 B1/B2 B1/B2 FLT STA B1/B2 B1/B2 CB12 FLT STA FLT STA FLT STA MLC MLC MLC MLC B1/B2 MLC B1/B2 B1/B2 H2/H3 FLT STA H2/H3 H2/H3 H2/H3 H2/H3 D1 D1 D1 D1 MLC D1 D1 B1/B2 B1/B2 H2/H3 MLC B1/B2 MLC MLC MLC MLC B1/B2 H2/H3 H2/H3 B1/B2
6 6 5 6 5 5 4 3
MANUAL TITLE
AVIONIC SUBSYSTEM
AN/APS-115( ) RADAR SET MX-7974/ASA-69 RADAR INTERFACE UNIT AN/AAS-36( ) INFRARED DETECTING SET AN/ASQ-10A MAGNETIC DETECTION SET AN/ASQ-81 MAGNETIC DETECTION SET AN/ASA-64 SUBANOMALY DETECTING GROUP AN/ALR-66A(V)3 COUNTERMEASURES RECEIVING SET AN/ALR-66B(V)3 COUNTERMEASURES RECEIVING SET AN/ASA-65(V)5 MAGNETIC COMPENSATOR GROUP AN/APX-76A SIF INTERROGATOR AN/ALQ-78 ESM SET AN/ALQ-78A ESM SET SEARCH STORES SYSTEM KILL STORES CONTROL AND RELEASE HARPOON AIRCRAFT COMMAND LAUNCH CONTROL SET (HACLCS) ACOUSTIC TEST SIGNAL GENERATOR ADAPTIVE CONTROL PHASED ARRAY (ACPA) SONOBUOY RECEIVING SET (ASCL) SINGLE ADVANCED SIGNAL PROCESSOR (SASP) SOUND RECORDER-REPRODUCER SYSTEM AN/AQH-4(V)2 SOUND RECORDER-REPRODUCER SYSTEM AN/AQH-13 TIME CODE GENERATOR AN/ASA-66A TACTICAL DATA DISPLAY GROUP SONOBUOY REFERENCE SYSTEM

MAIN LOAD CENTER DPS ELECTRONIC MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER FORWARD ELECTRONIC FORWARD ELECTRONIC HARPOON ACOUSTIC SYSTEM ACOUSTIC SYSTEM ACOUSTIC SYSTEM ACOUSTIC SYSTEM MAIN AC BUS A ACOUSTIC SYSTEM ACOUSTIC SYSTEM ACOUSTIC SYSTEM ACOUSTIC SYSTEM MAIN AC BUS B
LOCATION
MLC D1 MLC MLC 15 MLC 14 MLC MLC 11 MLC MLC MLC MLC MLC B1/B2 B1/B2 SS1 SS2 SS2 SS2 SS2 MLC SS2 SS2 SS2 SS2 MLC 10
NOTES 2, 7, 9, 12, 13 AND 16 THROUGH 23 ARE NO LONGER APPLICABLE TO THIS FIGURE 1 3 4 5 6 8 10 11 14 15 24 25 26 27 28 AIRCRAFT BUNO 158928,159503 THROUGH 161596 AIRCRAFT BUNO 156514 AND 157322 AND SUBSEQUENT AIRCRAFT BUNO 156507 THROUGH 156513 AND 156515 THROUGH 157331 AIRCRAFT BUNO 156507 THROUGH 161121 AND 161123 THROUGH 161131 AIRCRAFT BUNO 161122 AND 161132 SUBSEQUENT AIRCRAFT INCORPORATING AFC 581 AIRCRAFT BUNO 160290 AND SUBSEQUENT AIRCRAFT BUNO 160290 AND SUBSEQUENT AND AIRCRAFT INCORPORATING AFC 405 AIRCRAFT BUNO 158928, 159503 THROUGH 159888 AND 159890 THROUGH 161131 AIRCRAFT BUNO 156514, 157332 THROUGH 161337 NOT INCORPORATING AFC 427 AIRCRAFT INCORPORATING AFC 603 AIRCRAFT INCORPORATING AFC 686 AIRCRAFT INCORPORATING AFC 693 AIRCRAFT INCORPORATING AFC 696 AIRCRAFT INCORPORATING AFC 738
{ { { { {
FORWARD LOAD CENTER FORWARD ELECTRONIC FORWARD ELECTRONIC AND NAV INTERCONNECTION BOX FORWARD ELECTRONIC AND NAV INTERCONNECTION BOX FORWARD LOAD CENTER FORWARD ELECTRONIC FORWARD ELECTRONIC AND NAV INTERCONNECTION BOX FORWARD LOAD CENTER FORWARD LOAD CENTER FORWARD LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER FORWARD ELECTRONIC MAIN LOAD CENTER FORWARD ELECTRONIC FORWARD ELECTRONIC AFT ELECTRONIC FORWARD LOAD CENTER AFT ELECTRONIC AFT ELECTRONIC AFT ELECTRONIC AFT ELECTRONIC DPS ELECTRONIC DPS ELECTRONIC DPS ELECTRONIC DPS ELECTRONIC MAIN LOAD CENTER DPS ELECTRONIC DPS ELECTRONIC FORWARD ELECTRONIC FORWARD ELECTRONIC MAIN LOAD CENTER FORWARD ELECTRONIC MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER FORWARD ELECTRONIC AFT ELECTRONIC AFT ELECTRONIC FORWARD ELECTRONIC
24 24 24
NAVAIR 01-75PAC-12-8 SENSOR STATIONS 1 AND 2 - UPDATE III
NAVAIR 01-75PAC-12-1 FLIGHT STATION
AN/APX-72 IFF TRANSPONDER AN/ARA-50 UHF DIRECTION FINDER GROUP PB-20N AUTOPILOT AN/ASW-31 AUTOMATIC FLIGHT CONTROL AN/ASW-60 DIGITAL COMPUTER SYSTEM AN/ARN-83 DIRECTION FINDER SET (LF-DF) AN/ARN-32 RADIO RECEIVING SET (MARKER BEACON) GLIDESLOPE TACAN NAVIGATION SET AN/ARN-87(V) VHF/VOR NAVCOMM SYSTEM R-2217/ARN-140 VHF NAVIGATION SYSTEM (VOR, ILS, MARKER BEACON) MLR-2020-A-1 MULTI-MODE RECEIVER AN/ARC-182(V) VHF/UHF COMMUNICATION SYSTEM C-11067/ARC-197 VHF COMMUNICATION SYSTEM AN/ARC-210 VHF/UHF COMMUNICATION SYSTEM IP-917/ASA-70 MULTIPURPOSE DATA DISPLAY IP-918/ASA-70 SENSOR DATA DISPLAY
27

25
26
FORWARD ELECTRONIC DPS ELECTRONIC HARPOON NAVCOMM AFT ELECTRONIC
IP-919/ASA-70 AUXILIARY READOUT DISPLAY CV-2461A/A SIGNAL DATA CONVERTER OD-159/A TACCO AUXILIARY DISPLAY TACCO POWER CONTROL AAU-28/A SYNCHRO ALTIMETER-TRANSMITTER AN/ACQ-5( ) DATA TERMINAL SET AN/ACQ-8( ) DIGITAL DATA SET AN/ARC-161 HF COMMUNICATION SYSTEM AN/ARC-243(V) HF COMMUNICATION SYSTEM
28
8
AN/ASN-179 REPLACEMENT INERTIAL NAVIGATION SYSTEM AFT ELECTRONIC
28
NAVAIR 01-75PAC-12-3 NAVIGATION COMMUNICATION STATION
AN/ARC-143 UHF COMMUNICATION SYSTEM AN/ARC-187(V) UHF COMMUNICATION SYSTEM AN/AGC-6 TELETYPEWRITER SET AN/AIC-22(V) INTERCOMMUNICATIONS SET C-11067/ARC-197 VHF COMMUNICATION SYSTEM AN/ARC-182(V) VHF/UHF COMMUNICATION SYSTEM AN/ARN-151 GLOBAL POSITIONING SYSTEM
ACOUSTIC SYSTEM DITCHING EXIT
TACCO STATION COMPUTER
1-14
Change 11
Figure 1-13. Circuit Breaker Panel Location Diagram, Aircraft 156507 through 161596 Incorporating AFC 450 and Aircraft BUNO 161762 and Subsequent
NAVAIR 01-75PAC-12
MANUAL TITLE AVIONIC SUBSYSTEM
AN/ASQ-212(V) DIGITAL DATA COMPUTER SYSTEM NAVAIR 01-75PAC-12 TECHNICIAN AN/ASH-33 DIGITAL DATA RECORDER-REPRODUCER SET C-7627(P)/AYA-8 CONTROL-INDICATOR C-7628/AYA-8 CONTROL-INDICATOR C-7629/AYA-8 CONTROL-INDICATOR
CIRCUIT BREAKER LOCATION PANEL

DPS ELECTRONIC FORWARD LOAD CENTER DPS ELECTRONIC DPS ELECTRONIC DPS ELECTRONIC D1 FLT STA D1 D1 D1
MANUAL TITLE
AVIONIC SUBSYSTEM
AN/APS-115( ) RADAR SET MX-7974/ASA-69 RADAR INTERFACE UNIT AN/AAS-36( ) INFRARED DETECTING SET AN/ASX-6 MULTI-MODE IMAGING SYSTEM AN/ASQ-81 MAGNETIC DETECTION SET AN/ASA-64 SUBANOMALY DETECTING GROUP AN/ALR-66(V)3 COUNTERMEASURES RECEIVING SET AN/ASA-65(V)5 MAGNETIC COMPENSATOR GROUP AN/APX-76A SIF INTERROGATOR SEARCH STORES SYSTEM KILL STORES CONTROL AND RELEASE HARPOON AIRCRAFT COMMAND LAUNCH CONTROL SET (HACLCS) ACOUSTIC TEST SIGNAL GENERATOR ADAPTIVE CONTROL PHASED ARRAY (ACPA) SONOBUOY RECEIVING SET (ASCL) SINGLE ADVANCED SIGNAL PROCESSOR (SASP) SOUND RECORDER-REPRODUCER SYSTEM AN/AQH-4(V)2 TIME CODE GENERATOR AN/ASA-66A TACTICAL DATA DISPLAY GROUP SONOBUOY REFERENCE SYSTEM INTEGRATED ACOUSTIC COMMUNICATION

MAIN LOAD CENTER DPS ELECTRONIC MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER FORWARD ELECTRONIC FORWARD ELECTRONIC HARPOON ACOUSTIC SYSTEM ACOUSTIC SYSTEM ACOUSTIC SYSTEM ACOUSTIC SYSTEM MAIN AC BUS A ACOUSTIC SYSTEM ACOUSTIC SYSTEM ACOUSTIC SYSTEM MAIN AC BUS B
LOCATION
1 MLC D1 MLC MLC MLC MLC MLC MLC MLC B1/B2 B1/B2 SS1 SS2 SS2 SS2 SS2 MLC SS2 SS2 SS2 MLC 2 3 9 4 5 6 7 8 9 10 11
NOTE
AIRCRAFT BUNO 156507 THROUGH 156513 AND 156515 THROUGH 157331 AIRCRAFT BUNO 156514 AND 157332 AND SUBSEQUENT AIRCRAFT BUNO 156507 THROUGH 161121 AND 161123 THROUGH 161131 AIRCRAFT BUNO 161122 AND 161132 AND SUBSEQUENT AIRCRAFT INCORPORATING AFC 603 AIRCRAFT INCORPORATING AFC 686 AIRCRAFT INCORPORATING AFC 693 AIRCRAFT INCORPORATING AFC 696 AIRCRAFT INCORPORATING AFC 705 AIRCRAFT INCORPORATING AFC 738 AIRCRAFT INCORPORATING AFC 719
AN/ASA-66 TACTICAL DATA DISPLAY GROUP AAU64/A PRESSURE ALTIMETER AN/AJN-15 FLIGHT DIRECTOR SYSTEM HORIZONTAL SITUATION INDICATOR GROUP ELECTRONIC HORIZONTAL SITUATION INDICATOR GROUP CENTRAL REPEATER AND CONTROL SYSTEM NAVIGATION SIMULATOR AN/APN-194(V) ELECTRONIC ALTIMETER SET NAVAIR 01-75PAC-12-1 FLIGHT STATION AN/APQ-107 RADAR ALTIMETER WARNING SET AN/APX-72 IFF TRANSPONDER AN/APX118/123 IFF TRANSPONDER AN/ARA-50 UHF DIRECTION FINDER GROUP PB-20N AUTOPILOT AN/ASW-31 AUTOMATIC FLIGHT CONTROL AN/ASW-60 DIGITAL COMPUTER SYSTEM AN/ARN-83 DIRECTION FINDER SET (LF-DF) AN/ARN-32 RADIO RECEIVING SET (MARKER BEACON) GLIDESLOPE TACAN NAVIGATION SET AN/ARN-87(V) VHF/VOR NAVCOMM SYSTEM R-2217/ARN-140 VHF NAVIGATION SYSTEM (VOR, ILS, MARKER BEACON) MLR-2020A-1 VHF NAVIGATION RECEIVER AN/ARC-182(V) VHF/UHF COMMUNICATION SYSTEM C-11067/ARC-197 VHF COMMUNICATION SYSTEM AN/ARC-210 VHF/UHF COMMUNICATION SYSTEM IP-917/ASA-70 MULTIPURPOSE DATA DISPLAY IP-918/ASA-70 SENSOR DATA DISPLAY NAVAIR 01-75PAC-12-2 TACTICAL COORDINATOR STATION IP-919/ASA-70 AUXILIARY READOUT DISPLAY OD-159/A TACCO AUXILIARY DISPLAY AVM4055 TELEVISION MONITOR TACCO POWER CONTROL AAU-28/A SYNCHRO ALTIMETER-TRANSMITTER AN/ACQ-5( ) DATA TERMINAL SET AN/ACQ-8( ) DIGITAL DATA SET INERTIAL NAVIGATION SYSTEM NAVAIR 01-75PAC-12-3 NAVIGATION COMMUNICATION STATION AN/ARC-161 HF COMMUNICATION SYSTEM AN/ARC-243 (V) HF COMMUNICATION SYSTEM AN/ARC-187 UHF COMMUNICATION SYSTEM AN/AIC-22(V) INTERCOMMUNICATIONS SET C-11067/ARC-197 VHF COMMUNICATION SYSTEM AN/ARC-182 VHF COMMUNICATION SYSTEM AN/ARC-210 VHF/UHF COMMUNICATION SYSTEM AN/ARN151 GLOBAL POSITIONING SYSTEM C12738/A PILOT, NAVCOMM CDU, DDS C12738/A COPILOT CDU
FORWARD ELECTRONIC AND FORWARD LOAD CENTER FORWARD ELETRONIC AND FORWARD LOAD CENTER FORWARD ELECTRONIC AND FORWARD LOAD CENTER FORWARD ELECTRONIC FORWARD ELECTRONIC FORWARD ELECTRONIC FORWARD ELECTRONIC AND NAV INTERCONNECTION BOX FORWARD LOAD CENTER FORWARD LOAD CENTER FORWARD LOAD CENTER FORWARD LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER FORWARD ELECTRONIC MAIN LOAD CENTER FORWARD ELECTRONIC FORWARD ELECTRONIC AFT ELECTRONIC FORWARD LOAD CENTER AFT ELECTRONIC AFT ELECTRONIC AFT ELECTRONIC AFT ELECTRONIC DPS ELECTRONIC DPS ELECTRONIC DPS ELECTRONIC MAIN LOAD CENTER MAIN LOAD CENTER DPS ELECTRONIC DPS ELECTRONIC FORWARD ELECTRONIC FORWARD ELECTRONIC AFT ELECTRONIC MAIN LOAD CENTER FORWARD ELECTRONIC MAIN LOAD CENTER MAIN LOAD CENTER FORWARD ELECTRONIC AFT ELECTRONIC AFT ELECTRONIC AFT ELECTRONIC FORWARD ELECTRONIC FORWARD ELECTRONIC FORWARD LOAD CENTER
B1/B2 FLT STA B1/B 11 FLT STA 11 B1/B2 FLT STA B1/B2 B1/B2 B1/B2 B1/B2 CB12 FLT STA FLT STA FLT STA FLT STA 11 MLC MLC MLC MLC B1/B2 MLC B1/B2 B1/B2 H2/H3 FLT STA H2/H3 H2/H3 H2/H3 H2/H3 D1 D1 D1 MLC MLC D1 D1 B1/B2 B1/B2 H2/H3 MLC B1/B2 MLC MLC B1/B2 H2/H3 H2/H3 H2/H3 B1/B2 B1/B2 FLT STA 11 11 4 10 10 9 7 3 4 6 1 2 8 3 3 5 NAVAIR 01-75PAC-12-8 SENSOR STATIONS 1 AND 2 UPDATE III NAVAIR 01-75PAC-12-6 ARMAMENT/ ORDNANCE STATION

FORWARD ELECTRONIC DPS ELECTRONIC HARPOON NAVCOMM AFT ELECTRONIC TACCO STATION COMPUTER
Figure 1-14. Circuit Breaker Panel Location Diagram, (Applicable to Aircraft Incorporating AFC 506)
Change 12
1-15
NAVAIR 01-75PAC-12
NOTE
MANUAL TITLE
AVIONIC SUBSYSTEM
AN/ASQ-227(V) DIGITAL DATA COMPUTER SYSTEM REPLACEMENT DATA STORAGE SYSTEM

DPS ELECTRONIC DPS ELECTRONIC DPS ELECTRONIC DPS ELECTRONIC DPS ELECTRONIC DPS ELECTRONIC DPS ELECTRONIC DPS ELECTRONIC
LOCATION
D1 D1 D1 D1 D1 D1 D1 D1
MANUAL TITLE
AVIONIC SUBSYSTEM
AN/APS-115( ) RADAR SET MX-7974/ASA-69 RADAR INTERFACE UNIT AN/AAS-36( ) INFRARED DETECTING SET OA-8962/ASH VIDEO SIGNAL RECORDER GROUP AN/ASX-6 MULTI-MODE IMAGING SYSTEM AN/ASQ-81 MAGNETIC DETECTION SET AN/ASA-64 SUBANOMALY DETECTING GROUP AN/ALR-66(V)3 COUNTERMEASURES RECEIVING SET AN/ASA-65(V)5 MAGNETIC COMPENSATOR GROUP AN/APX-76A SIF INTERROGATOR SEARCH STORES SYSTEM KILL STORES CONTROL AND RELEASE HARPOON AIRCRAFT COMMAND LAUNCH CONTROL SET (HACLCS) ACOUSTIC TEST SIGNAL GENERATOR ADAPTIVE CONTROL PHASED ARRAY (ACPA) SONOBUOY RECEIVING SET (ASCL) ACOUSTIC PROCESSING SUITE (APS) SOUND RECORDER-REPRODUCER SYSTEM TIME CODE GENERATOR

MAIN LOAD CENTER DPS ELECTRONIC MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER FORWARD ELECTRONIC FORWARD ELECTRONIC HARPOON ACOUSTIC SYSTEM ACOUSTIC SYSTEM ACOUSTIC SYSTEM ACOUSTIC SYSTEM MAIN AC BUS A ACOUSTIC SYSTEM ACOUSTIC SYSTEM
LOCATION
MLC D1 MLC MLC MLC MLC MLC MLC MLC MLC B1/B2 B1/B2 SS1 SS2 SS2 SS2 SS2 MLC SS2 SS2
1 2 3 4 5
AIRCRAFT INCORPORATING AFC 651 AIRCRAFT INCORPORATING AFC 686 AIRCRAFT INCORPORATING AFC 693 AIRCRAFT INCORPORATING AFC 593 AIRCRAFT INCORPORATING AFC 705 AIRCRAFT INCORPORATING AFC 738 AIRCRAFT INCORPORATING AFC 719
PILOT COLOR HIGH RESOLUTION DISPLAY FLAT PANEL DISPLAY (TACCO, NAVCOMM, SS 3) PROGRAMMABLE ENTRY PANEL (TACCO, NAVCOMM, SS 3) PILOT DEP ORD DEP PRINTER
6 7
AAU-64/A PRESSURE ALTIMETER AN/AJN-15 FLIGHT DIRECTOR SYSTEM ELECTRONIC FLIGHT DISPLAY SYSTEM CONTROL ELECTRONIC HORIZONTAL SITUATION INDICATOR ELECTRONIC FLIGHT DIRECTOR INDICATOR CENTRAL REPEATER AND CONTROL SYSTEM NAVIGATION SIMULATOR AN/APN-194(V) ELECTRONIC ALTIMETER SET AN/APQ-107 RADAR ALTIMETER WARNING SET NAVAIR 01-75PAC-12-1 FLIGHT STATION AN/APX-72 IFF TRANSPONDER AN/APX-118/123 IFF TRANSPONDER AN/ARA-50 UHF DIRECTION FINDER GROUP AN/ASW-31 AUTOMATIC FLIGHT CONTROL AN/ARN-83 DIRECTION FINDER SET (LF-DF) AN/ARN-32 RADIO RECEIVING SET (MARKER BEACON) GLIDE SLOPE TACAN NAVIGATION SET AN/ARN-87(V) VHF/VOR NAVCOMM SYSTEM R-2217/ARN-140 VHF NAVIGATION SYSTEM (VOR, ILS, MARKER BEACON) MLR-2020-A-1 MULTI-MODE RECEIVER AN/ARC-182(V) VHF/UHF COMMUNICATION SYSTEM C-11067/ARC-197 VHF COMMUNICATION SYSTEM AN/ARC-210 VHF/UHF COMMUNICATION SYSTEM OD-159/A TACCO AUXILIARY DISPLAY AVM4055 TELEVISION MONITOR TACCO POWER CONTROL AAU-28/A SYNCHRO ALTIMETER-TRANSMITTER AN/ACQ-5( ) DATA TERMINAL SET AN/ACQ-8( ) DIGITAL DATA SET INERTIAL NAVIGATION SYSTEM NAVAIR 01-75PAC-12-3 NAVIGATION COMMUNICATION STATION AN/ARC-187 UHF COMMUNICATION SYSTEM AN/AIC-22(V) INTERCOMMUNICATIONS SET C-11067/ARC-197 VHF COMMUNICATION SYSTEM AN/ARC-182 VHF COMMUNICATION SYSTEM AN/ARN-151 GLOBAL POSITIONING SYSTEM AN/USQ-140 MULTIFUNCTIONAL INFORMATION DISTRIBUTION SYSTEM COMMON DATA LINK AN/AIC-34(V) INTERCOMMUNICATION SYSTEM C-12738/A PILOT, NAVCOMM CDU, DDS C-12738/A COPILOT CDU AN/ARC-161 HF COMMUNICATION SYSTEM AN/ARC-243(V) HF COMMUNICATION SYSTEM
FORWARD ELECTRONIC AND FORWARD LOAD CENTER FORWARD ELECTRONIC AND FORWARD LOAD CENTER FORWARD ELECTRONIC AND NAV INTERCONNECTION BOX FORWARD ELECTRONIC AND NAV INTERCONNECTION BOX FORWARD LOAD CENTER FORWARD ELECTRONIC FORWARD ELECTRONIC AND NAV INTERCONNECTION BOX FORWARD LOAD CENTER FORWARD LOAD CENTER FORWARD LOAD CENTER FORWARD LOAD CENTER MAIN LOAD CENTER MAIN LOAD CENTER FORWARD ELECTRONIC MAIN LOAD CENTER FORWARD ELECTRONIC FORWARD ELECTRONIC AFT ELECTRONIC FORWARD LOAD CENTER AFT ELECTRONIC AFT ELECTRONIC AFT ELECTRONIC AFT ELECTRONIC MAIN LOAD CENTER MAIN LOAD CENTER DPS ELECTRONIC DPS ELECTRONIC FORWARD ELECTRONIC FORWARD ELECTRONIC AFT ELECTRONIC MAIN LOAD CENTER FORWARD ELECTRONIC MAIN LOAD CENTER MAIN LOAD CENTER FORWARD ELECTRONIC AFT ELECTRONIC AFT ELECTRONIC FORWARD ELECTRONIC DPS ELECTRONIC AFT ELECTRONIC FORWARD ELECTRONIC FORWARD ELECTRONIC FORWARD LOAD CENTER
B1/B FLT STA B1/B2 FLT STA B1/B2 B1/B2 B1/B2 B1/B2 FLT STA B1/B2 B1/B2 CB12 FLT STA FLT STA FLT STA FLT STA MLC MLC B1/B2 MLC B1/B2 B1/B2 H2/H3
7 7
NAVAIR 01-75PAC-12-8 SENSOR STATIONS 1 AND 2 -UPDATE III AND BLOCK MOD UPGRADE PROGRAM

FLT STA 2 H2/H3 H2/H3 H2/H3 H2/H3 MLC MLC D1 D1 B1/B2 B1/B2 H2/H3 MLC B1/B2 MLC MLC B1/B2 H2/H3 H2/H3 B1/B2 D1 H2/H3 B1/B2 B1/B2 FLT STA 7 7 4 4 4 6 6 5
1
FORWARD ELECTRONIC DPS ELECTRONIC HARPOON NAVCOMM AFT ELECTRONIC TACCO STATION COMPUTER
1-16
Change 12
Figure 1-15. Circuit Breaker Panel Location Diagram, (Applicable to Aircraft Incorporating AFC 607)
NAVAIR 01-75PAC-12
TECHNICAL DIRECTIVE NO. AFC 208 AFC 235 AFC 236 ISSUE DATE 30 Jun 70 9 Jun 72 10 May 72 TITLE AIRFRAME; In-Flight Spares Module Carrying Cases Provided (ECP 604CC) INSTRUMENTS; Gyro Horizon Indicator Installed on Pilot Instrument Panel (ECP 681) COMMUNICATION SYSTEM; ICS Master Control Box, Green Light Indication Added for Auxiliary Selection (ECP 671) COMMUNICATION SYSTEM; ICS Master Control Box Circuitry Revised to Provide Dimming. Superseded by AVC 1515 (ECP 675CC) ASW SYSTEMS; Installation of Command Active Sonobuoy System (CASS) (ECP 701) NAVIGATION SYSTEM; HSI Group, Removal of AM-4923/A Electronic Control Amplifier (Distance, Central Repeater Box 3) (ECP 687S1) ASW SYSTEM; Installation of Ambient Sea Noise Meter (ECP 748) COMMUNICATION SYSTEM; Installation of SETAD (ECP 779) NAVIGATION SYSTEM; Replacement of Navigation Interconnection Boxes (ECP 777R1) COMMUNICATION SYSTEM; Miscellaneous Improvements (ECP 775R1) COMMUNICATION SYSTEM; Addition of Module Pullers for System Selector, Switching Matrix and Interface 2 (ECP 786) WEAPONS CONTROL; Installation of AN/ AAS-36 Infrared Detecting System and OA 8962/ASH Video Recorder Provisions (ECP 879R1S6) ASW SYSTEM; Installation of AN/AQA-7(V) Triple Vernier DIFAR and DICASS (ECP 919R1, ECP 919R1S5A1) ARMAMENT; Harpoon Missile Capability Retrofit (ECP 947) NAVIGATION SYSTEM; Installation of LTN-72 Inertial Navigation Set (ECP 925R1) NAVIGATION SYSTEM; Installation of LTN-211 Omega Navigation System (ECP 949) ASW SYSTEM; Modification of AN/AQA-7A(V)8 3V DIFAR System (ECP 965) NEW DATA ADDED IN CHG/REV DATED 15 Feb 71 1 Dec 71 1 Dec 71 SUPERSEDED DATA DELETED IN CHG/REV DATED 1 Aug 83 1 Aug 83 1 Aug 83 TECHNICAL DIRECTIVE NO. AFC 450 AFC 457 AFC 477 ISSUE DATE 28 Apr 89 20 Aug 88 28 Jul 89 TITLE ASW SYSTEM; Installation of Update III into NUDs and Update I, Aircraft (ECP 972) ELECTRONIC COUNTERMEASURES; Installation of AN/ALR-66(V)3 Receiving Set (ECP 970S2) ASW SYSTEM; Installation Provisions for OL-337(V)1/AY Data Analysis Programming Group in Lieu of AN/AYA-8C Data Analysis Programming Group (ECP 972R2) Electronic Equipment Rack Aural Overheat P-3C AN/ASQ-212 Digital Computer Set Installation 30 Jan 01 15 Feb 99 P-3 COMMUNICATIONS IMPROVEMENT PROGRAM, Installation of (WUC 63000) CN-170/ASN-179 Replacement Inertial Navigation Unit (RINU); Installation of in P-3C Aircraft (WUC 734S0) AN/APS--149 Littoral Surveillance Radar System (LSRS) ELECTRONIC FLIGHT DISPLAY SYSTEM (EFDS); Installation of in P-3C Aircraft (WUC 56X3H) ARMAMENT; - PEU-196A ARMAMENT CONTROL BOX (E10-19344-1) Installation of ASW System; P-3C Block Modification Upgrade Program (BMUP) into Update II Aircraft; Installation of (WUC 73P40) ASW System; P-3C Block Modification Upgrade Program (BMUP) into Update II.5 Aircraft; Installation of (WUC 73P40) NAVIGATION SYSTEM; LTN-211 or AN/ARN-99 Omega Navigation System Removal of (RAMEC JAX-024-97 AVIONICS; Integrated Acoustic Communications System (IACS); Removal of (RAMEC JAX-036-98) P/N 9700822 Replacement Data Storage System (RDSS) installed in lieu of ASH-33/ASH-33A Digital Magnetic Tape System (DMTS) AVIONICS; AN/APN-187 or AN/APN-227 Doppler Radar Set; Removal of (RAMEC JAX-025-98) COMMUNICATION SYSTEM; Provisions for AN/ARC-182A(V) V/UHF Radio Set in lieu of AN/ARC-197 VHF Communications Set, Installation Of (WUC 621K0) P-3C Bombing Navigation Systems: N/USQ-78B(V) Display-Control Set; Upgrade of (WUC 737E0) NEW DATA ADDED IN CHG/REV DATED 1 Mar 87 1 Jul 87 1 Jul 87 1 May 93 SUPERSEDED DATA DELETED IN CHG/REV DATED 15 June 91
AFC 239
29 May 72
1 Dec 71
Canceled
AFC 489 AFC 506 AFC 597 AFC 581
15 June 91 15 Feb 96 1 Jul 03 1 Jan 06
AFC 245 AFC 251
15 Mar 74 18 Feb 72
1 Sep 73 1 Dec 72
1 Aug 83 1 Aug 83
AFC 593 1 Sep 73 1 Sep 73 1 Sep 73 1 Dec 72 1 Sep 73 1 Aug 83 1 Aug 83 1 Aug 83 1 Aug 83 1 Aug 83 AFC 607 Part 1 AFC 607 Part 2 AFC 610 15 Aug 80 1 Aug 83 AFC 611 1 Dec 82 AFC 616 1 Aug 83 1 Dec 82 1 Dec 82 1 Apr 85 AFC 672 AFC 603
1 Apr 05 15 Nov 00
15 Jul 07 1 Jul 03
AFC 275 AFC 280 AFC 283 AFC 286 AFC 299
30 Nov 73 1 Jun 74 29 Mar 74 19 Jul 74 4 Nov 74
AFC 604
15 Oct 00
15 Jan 02
15 May 01
1 Jul 03
15 May 01
1 Jul 03
4 June 99
15 Jan 02
AFC 359
20 May 82
28 Sep 99
15 Jan 02
AFC 387
18 Aug 82
17 Nov 00
1 Nov 00
AFC 405 AFC 408 AFC 414 AFC 443
11 Oct 84 3 Aug 84 14 Jun 85 21 May 84
AFC 619 AFC 651
20 Apr 00 20 Apr 00
15 Jan 02 1 Jul 03
03 Nov 03
15 Mar 05
Figure 1-16. Record of Applicable Technical Directives (Sheet 1 of 2) Change 12 1-17
NAVAIR 01-75PAC-12
TECHNICAL DIRECTIVE NO. AFC 686 AFC 693 NEW DATA ADDED IN CHG/REV DATED 1 Mar 07 1 Mar 07 AVC 3063 1 Feb 08 AVC 4917 15 Nov 00 SUPERSEDED DATA DELETED IN CHG/REV DATED TECHNICAL DIRECTIVE NO. AVC 1515 NEW DATA ADDED IN CHG/REV DATED 15 Jul 73 SUPERSEDED DATA DELETED IN CHG/REV DATED 1 Aug 83
ISSUE DATE 10 Feb 05 1 Aug 05
TITLE CNS/ATM, Multi-Mode Receiver System MLR-2020-A-1, Installation of (WUC 62160) CNS/ATM, AN/ARC-210 V/UHF Communications System, Installation of (WUC 62X3K00) AN/ASW-60 Digital Computer System (P-3 Digital Autopilot System) in lieu of the AN/ASW-31 AFCS, Installation of (WUC 573V0) Bombing Navigation Systems: AN/AQH-13B Acoustic Data Recorder; Installation of (WUC 73899) P3C AIP and BMUP ARMAMENT PROVISIONS FOR DIRECTED SEARCH; Intallation of (WUC 74R80) AN/ASX-6 Multi-Mode Imaging System (MMIS) Procurement as Replacement for AN/AAS-36 Infrared Detection Set (IRDS) (WUC 741W0) P-3C Bombing Navigation Systems: AN/USQ-78B(V) Display-Control Set; Upgrade of (WUC 737E0) CNS/ATM AN/ARC-210 V/UHF Communication System, Installation of (WUC 62X3K00) AN/APS--149 Radar System SMCS Refresh Upgrade (SRU) RNP/RNAV Mode S; Installation of in P-3 Aircraft (WUC 65000) / (OOMA 1000000) AN/ARC-243 HF Radio Set and AN/ACQ-8 Digital Data Set in lieu of the AN/ARC-161 HF Radio Set and AN/ACQ-5 Data Terminal Set (WUC 612U0, 691M0; OOMA WUC 1000000) COMMUNICATIONS SYSTEM; Revision of Wiring to ICS Isolation Box A350 (ECP 609CC) NAVIGATION SYSTEM; Modification of A349 Navigation Interconnection Box (ECP 777R1) NAVIGATION SYSTEM; Modification of A332 Navigation Interconnection Box (ECP 777R1) COMMUNICATION SYSTEM; Modification of CU-1809/ARC HF Antenna Coupler (ECP 775R1) COMMUNICATION SYSTEM; Modification of A345 Communication System Selector (ECP 775R1) COMMUNICATION SYSTEM; Modification of A346 Communication Switching Matrix (ECP 775R1) COMMUNICATION SYSTEM; Modification of A347 Secure Switching Matrix (ECP 775R1) COMMUNICATION SYSTEM; Modification of CV-2528/ACQ-5 Converter Control (ECP 775R1)
ISSUE DATE 5 Dec 74
TITLE
COMMUNICATION SYSTEM; ICS Master Control Box Circuitry Revised to Provide Dimming. Replaces AFC 239 (ECP 675CC) CMOS, CP-901(V)6/ASQ-114(V) P-3C A373/A518 NAVIGATION INTERCONNECTION BOX: Modification of (WUC 71Y1Q00/71Y3A00) P-3C A366/A519 NAVIGATION INTERCONNECTION BOX: MODIFICATION OF (WUC 71Y1W00/71Y3700) P-3C J-3833/A NAVIGATION INTERCONNECTION BOX; Modification of (WUC 71Y1Y00) CV-2461/A Signal Data Converter (ECP 773R1) DATA HANDLING SYSTEM; Replacement of CV-2461/A Signal Data Converter (ECP 773R1) NAVIGATION SYSTEM; Installation of AN/APN-194 in lieu of AN/APN-141 (ECP 775R1) LLLTV System Deleted in Production (ECP 817) NAVIGATION SYSTEM; LTN-72 Inertial Navigation System in lieu of AN/ASN-84 (ECP 894) Installation of AN/ASH-33 Digital Magnetic Tape Set (DMTS) (ECP 926S1) P-3C Update Incorporated in Production (ECP 822) ARMAMENT; Installation of Harpoon Missile System Provisions and TACAN Antenna, and Removal of Bullpup (ECP 846) PHOTOGRAPHIC SYSTEM; Installation of Forward Looking Infrared (FLIR) (also known as Infrared Detecting Set-IRDS) (ECP 853) ASW SYSTEM; Installation of Sonobuoy Reference System (SRS) (ECP 854) P-3C Modified DIFAR Incorporated (ECP 857) ASW SYSTEM; Installation of AN/AQH-4(V)2 Recorder-Reproducer in lieu of AN/AQH-4(V) (ECP 873R1S3) PHOTOGRAPHIC SYSTEM; Installation of Infrared Detecting Set (IRDS) Video Signal Recorder (ECP 886) P-3C Update III Program Incorporated in Production (ECP 953R2S1) AN/AYA-8B Replacement of Data Processing System Logic Units (ECP 962C2) Incorporation of Modernized Logic Units in Production Update III Aircraft (ECP 962R2) AAU-28/A Synchro-Altimeter Transmitter (LCP 2082)
30 Nov 05 30 Nov 05
AFC 696
16 Jul 07
AVC 4918 1 Feb 07 AVC 4919 15 Jul 06 None 1 Feb 08 None None None 1 Jan 08 15 Jul 07 1 May 09 1 Jan 09 None None None None
15 Nov 00
1 Jul 03
AFC 697 Part 2 AFC 698
18 Aug 06
15 Nov 00
30 Nov 05
15 Mar 06
AFC 705
15 Aug 06
1 Jun 74 1 Sep 73 1 Nov 74 15 Mar 80 15 Oct 81 1 Nov 74 1 Oct 77
1 Aug 83 1 Aug 83 1 Aug 83
AFC 706 Part 4 AFC 707 AFC 711 AFC 719 AFC 738
31 Jul 06
1 Feb 07
9 Aug 06 2 Nov 06 30 Nov 07 12 May 08
1 Aug 83
AVC 1069 AVC 1440 AVC 1441 AVC 1448
15 May 70 25 Jul 74 17 Jun 74 28 Jan 74
15 Feb 71 1 Sep 73 1 Sep 73 1 Dec 72
1 Aug 83 1 Aug 83 1 Aug 83 1 Aug 83
None
1 Oct 77
1 Aug 83
None None None
1 Oct 77 1 Apr 77 1 Mar 78 1 Aug 83
AVC 1450
31 Jan 74
1 Dec 72
1 Aug 83
None
1 Apr 79
AVC 1451
31 Jan 74
1 Dec 72
1 Aug 83
None None
1 Apr 85 1 Apr 85 1 Mar 87 1 Jan 70
AVC 1452 AVC 1453
31 Jan 74 18 Feb 74
1 Dec 72 1 Dec 72
1 Aug 83 None 1 Aug 83 None
1-18
Change 12 TBD Change
Figure 1-16. Record of Applicable Technical Directives (Sheet 2 of 2)
NAVAIR 01-75PAC-12
A ACH ACPA ADDU ADL AFC AGP AMLCD ANEW ANK AOI AOIL AOL AOVM APR APS ARD ARINC ARM/ORD ARM/OUT ARO AROL ASCL ASHWC ATM AU AUX PANEL AUX RDOUT DSPLY AVC AZ B B BFL BIT BITE
Primary Accumulator Register
BKG C CASS CAX (0-9) CAY (0-9) CBX (0-9) CBY (0-9) CCU CDB CDC CDL CDNU CDU CH CHEX CMM CMP CNS COMM COP CP CPTR CR CSC 2/BUS CT CTC CTTM
Background C Register Command Activated Sonobuoy System Horizontal (Conic) Major Axis Bit 0-9 Vertical (Conic) Major Axis Bit 0-9 Horizontal (Conic) Major Axis Bit 0-9 Vertical (Conic) Major Axis Bit 0-9 Computer Control Unit Control Distribution Box Countdown Clock Common Data Link Control Display Navigation Unit Control Display Unit Channel Channel Expansion Core Memory Module Computer Maintenance Panel Communication Navigation Surveillance Communication Computer Operator Panel Central Processor Computer Control Register (Serial)Computer Support Channel 2-Wire Serial Bus Magnetic Tape Control Test Computer Terminal Control Magnetic Tape Control or Magnetic Tape Transport Test Mode Direct Addressing Data Acknowledge Drum Auxiliary Memory Subunit Digital Computer System (Digital Autopilot System) Data Bit Diagnostic Control Time Counter Digital Computer Figure 1-17. Table of Abbreviations (Sheet 1 of 4)
DCU DD1 DD2 DD3 DD4 DDC DDS DDU DEP DF DF DIAG DG DI1 DI2 DI3 DI4 DI5 DI6 DI7 DI8 DI9 DI10A DI10B DI11 DI12 DI13 DI14
Display Computer Unit Decoded Density - 200 Bits Per Inch Decoded Density - 556 Bits Per Inch Decoded Density - 800 Bits Per Inch Decoded Density Illegal Density Digital Data Computer Digital Data Set (Data Link) Digital Data Unit Data Entry Panel Display Formatter Display Formatter Diagnostic Density Generator Output (Decoded Counter State) Decoded Instruction - Master Clear Decoded Instruction - Rewind Decoded Instruction - Status Report Decoded Instruction - Search Reverse Decoded Instruction - Space File Reverse Decoded Instruction - Read Record Reverse Decoded Instruction - Search Forward Decoded Instruction - Space File Forward Decoded Instruction - Read Record Forward Decoded Instruction - Loop Transport A Decoded Instruction - Loop Transport B Decoded Instruction - Write Inter Record Gap or Extended Inter Record Gap Decoded Instruction - Write Inter Record Gap Decoded Instruction - Write Extended Inter Record Gap Decoded Instruction - Write Tape Mark Inter Record Gap and Write Tape Mark Extended Inter Record Gap Search or Read Reverse Decoded Instruction - Search Instruction Decoded Instruction - Space File Decoded Instruction - Read Mode Decoded Instruction - Search or Read Forward Decoded Instruction - Write or Loop Decoded Instruction - Not Master Clear or Rewind or Status Report Decoded Instruction - Not Master Clear or Status Report or Loop
Analog Channel Adaptive Control Phased Array Air Data Display Unit (Pressure Altimeter) Auxiliary Display Logic Airframe Change Advanced Graphics Processor Active Matrix Liquid Crystal Display Navy Tactical Data System Type C Interface Alphanumeric Keyboard Armament/Ordnance Input Armament/Ordnance Input Logic Armament Output Logic All Other Voltage Monitor Absolute Page Register Acoustic Processing Suite Auxiliary Readout Display Aeronautical Radio, Inc. Armament/Ordnance Armament/Output Auxiliary Readout Auxiliary Readout Logic Advanced Sonobuoy Communication Link Axoustic Suite Health and Welfare Checks Air Traffic Management Analyzer Unit Auxiliary Panel Auxiliary Readout Display (ARO) Avionics Change All Zeros B Register Bits BIT Fault Light Built-in Test Built-in Test Equipment DA DACK DAMS DAS DB DCTC DCU
DI15 DI16 DI17 DI18 DI19 DI20 DI21 DI22
Change 13
1-19
NAVAIR 01-75PAC-12
DI23 DI24 DI25 DI26 DI27 DI28 DI29 DI30 DI31 DI32 DICASS DIFAR DIM DMS DMTC DMTS DMTU DN CLK DO DOM DPC DP/DCS DREQ DTA DTE DTL DTRB E-BUS E-MONBUS ECA EER EFDI Decoded Instruction - Not Write or Search Decoded Instruction - Not Master Clear or Rewind or Status Report or Loop Decoded Instruction - Write Mode Decoded Instruction - Reverse Mode Decoded Instruction - Forward Mode But Not Write Mode Decoded Instruction - Forward Mode or Loop But Not Write Mode Decoded Instruction - Write Mode or Loop Decoded Instruction - Forward Mode or Reverse Mode But Not Search or Space File Decoded Instruction - Forward Mode Decoded Instruction - Forward Mode or Reverse Mode But Not Write Mode Directional Cass Directional Low Frequency Analyzing and Recording Digital Input Multiplexer Data Multiplexer Subunit Digital Magnetic Tape Control Digital Magnetic Tape Set Digital Magnetic Tape Unit Diagnostic Clock Door-Open Digital Output Multiplexer Data Processor Computer Data Processing Display and Control System Data Request Diagnostic Test Actuate Diagnostic Test Enable Diode Transistor Logic, used to represent baseline LU in Section 2 software Diagnostic Test Readback Event Bus Event Monitor Bus Electronic Control Amplifier Extended Echo Ranging Electronic Flight Display Indicator HCR HSP I I IA IA IB ICB IDR Hard Copy Recorder High Speed Printer Interface Register Instruction (Symbol) Indirect Addressing Input Acknowledge Input Bit Interconnect Box Input Data Request EFDS EHSI EI EIA EIE EO IR EO--IR EO/IR EOD EOF ESI ESM EXOR f FDSC FDSC FGL FLIR FPD FR FSVM GP GPC GPS GR GT End-Of-Data End-Of-File Externally Specified Index Electronic Support Measures Exclusive or Function Code Designator Flight Direction Steering System Computer Flight Director System Control Function Generator Logic Forward Looking Infrared Flat Panel Display Function Register Fail Safe Video Multiplexer Gross Position General Purpose Controller Global Positioning System Group Gap Timer Output (Decoder Counter State) LAPE LLLTV LLS L/O LOD LOPE LP LSK LSO MAT SEL MAU MCA MCB MCC MCP MCS MDA MDD MDM MDS MEP Lateral Parity Error Low Light Level Television Left Line Select Lockout Light-Off Detection Longitudinal Parity Error Loop Line Select Key Low-Speed Oscillator Matrix Select Media Access Unit Master Clear By Computer Instructions Master Clear By Computer Instructions or By System Initialize Master Clear By Computer Instructions or System Initialize; End of Tape 1 Maintenance Control Panel Memory and Control Section Monitor Drive Analog Multipurpose Data Display Magnetic Drum Memory Multiply, Divide, or Square Root Manual Entry Panel K k or k Primary Rank or Iteration Counter Operand Interpretation Designator j j Branch Condition Designator Input/Output Channel or APR Designator Electronic Flight Display System Electronic Horizontal Situation Indicator External Interrupt Electronics Industry Association External Interrupt Enable Electro Optical/InfraRed Surveillance System IEEE IEER IFPM INS I/O IOP IRDS IRG Institute of Electrical and Electronic Engineers Improved Extended Echo Ranging Inflight Performance Monitor Inertial Navigation System Input/Output Input/Output Processor Infrared Detecting Set Inter-Record Gap
1-20
Change 13
Figure 1-17. Table of Abbreviations (Sheet 2 of 4)
NAVAIR 01-75PAC-12
MES LIGHT 1 MES MUX MFS MIDS MIM MLC MMIS MMR MMVP M-O MONF SW MPD MPDL MPLX MRO MTC MTL MTT MTX NAVCOM NAVCOMM NAV/COM NAV MUX Manual Entry Subsystem Light 1 Manual Entry Subsystem Multiplexer Monofunction Switch Multifunctional information Distribution System Maintenance Interface Module Main Load Center Multi-Mode Imaging System Multi-Mode Receiver Multi-Media Video Processor Magneto-Optical Monofunction Switch Multipurpose Display Multipurpose Display Logic Multiplex Matrix Readout Magnetic Tape Control Master Timing Logic Magnetic Tape Transport Matrix Navigation Communication Navigation Communication Navigation Communication Navigation Multiplexer PCHRD PCP PDL PEP PIC PM & SI POWER NORM PRO PWRFAULTINT PWRMONINT Q Q400 r RAS RD STB RDSS RET RINU RKT RIP RKT SNGL RLS RMT OA OB Output Acknowledge Output Bit RNAV RNP Pilot Color High Resolution Display Power Control Panel Pilot Display Logic Programmable Entry Panel Processor Input Channel Power Monitor and System Initialize Power Normal Projection Readout Power Fault Interrupt Power Monitor Interrupt Quotient and Secondary Accumulator Register 400 Hz Clock Repeat Designator Raster Read Strobe Replacement Data Storage System Return Replacement Inertial Navigation Unit Rocket Ripple Rocket Single Right Line Select Remote Area Navigation System Required Navigation Performance
1 2
ODR OF-L ON-L OOL OP OP ORD OUT OSD OV OVHT OVTEMP
Output Data Request Off Line On Line Ordnance Output Logic Operand Operator Panel Ordnance Output On-Screen Display Overvoltage Overheat Overtemp
RS RSC RSC RTC RVID SAD SASP SC SCC SCCM SDC SDD SI SLT SMA SMC SMS SR1 SR2 SR3 SR4 SR5 SR6 SR7 SR8 SR9 SR10 SR11 SR12 SR13 SR14 SR15 SR16 SRC SRL SRS
Recommended Standard Radar Scan Converter Radio Set Control Real-Time Clock Radar Video Input Digitizer Sub Anomaly Detecting Single Advanced Signal Processor System Controller Spare Computer Channel Support Channel Controller Module Synchro/Digital Converter Sensor Data Display System Initialize Sonobuoy Launch Tube Secondary Memory Array Secondary Memory Controller Secondary Memory Sequencer Status Register Output - Normal Completion Status Register Output - Rewinding Status Register Output - End of File Status Register Output - End of Tape Warning Status Register Output - Load Point Status Register Output - Low Tape Warning Status Register Output - Write Lockout Status Register Output - Illegal Instruction Status Register Output - Illegal Operation Status Register Output - Improper Frame Count Status Register Output - Fault Status Register Output - Lateral Parity Error Status Register Output - Longitudinal Parity Error Status Register Output - Timing Error Status Register Output - Master Clear Status Register Output - No Compare Status Register Common Term Sono Receiver Logic Sonobuoy Reference System
NAVMUX/MES-AC Navigation Multiplexer/Manual Entry System-Aircraft Status NE NIM-C1 NM NORMAL XP NORMAL XP (GND) NTDS Signal That Turns On NORMAL XP Light Naval Tactical Data System Next Execution Naval Tactical Data System Interface Module Navigation Multiplexer Light on AUX Panel Indicating Power Supply DC Voltage Correct
Change 12
1-21
NAVAIR 01-75PAC-12
SS ST STRD STR PL MON SU S/W SYGNOG TACCO TAS TB TCV TI TMAZ TO TRP PRS TTL TTM U UKS UV VDC VM VME Sensor Station Status STP System Test Program Stored Store-In-Place Monitor Subunit Software System Go-No Go XPEX BUS Tactical Coordinator True Airspeed Trackball Threshold Control Voltage Test Input Tape Mark or All Zeros Format Test Output Torpedo Preset Transistor--Transistor Logic Time Totalizer Meter U Register Universal Keyset Undervoltage Video Distribution Controller Volts Monitor Versa-Module-Eurocard
1
WLO WR X X X-BUS
Write Lockout Word Register Horizontal Operand Register, Input to Subtractor Segment of I/O Bus Connected Directly to I/O Modules Segment of E-Bus Connected to IOP Segment of I/O Bus Connected Directly to IOP Vertical Contents of Memory Location Y Operand or Operand-Address Designator Memory Data Register
XPX BUS Y Y y Z
NOTE
USED INTERCHANGEABLY AIRCRAFT INCORPORATING AFC 593
1-22
Change 12
SECTION 2
SECTION 2 READINESS TEST PROCEDURES
READINESS TEST PROCEDURES
NAVAIR 01-75PAC-12
2-1. 2-2. AIRCRAFT POWER TURN-ON. EXTERNAL INITIALIZATION. 1. 2. 3. 4. Check all antennas for breakage or damage. Check that forward radome is closed. Connect battery in rear of nose wheel well. Verify that FLIR CONT ENABLE-DISABLE switch (located in the nose wheel well) is in DISABLE (IRDS installed). WARNING Physical injury or equipment damage can occur if the IRDS turret is lowered with no ground observer. If the FLIR CONT ENABLE-DISABLE switch is not set to DISABLE, turret extension can occur in the event of an IRDS equipment power on state upon aircraft power application. 5. Verify that the SONOBUOY SAFETY SWITCH ACCESS DOOR (under aircraft forward of sonobuoy launch tubes) is OPEN. The switch being open disables firing circuitry to the sonobuoy launch tubes. Check that aft radome is closed. Check ESM, Doppler, and OTPI antenna covers to ensure drain holes are not obstructed. If external power unit is to be used, see NAVAIR 01-75PAA-2-1 for detailed procedures. 3. 4. 5. 6. CAUTION Ensure the HSI PILOT, HSI CO--PILOT and HSI NAV circuit breakers on the FWD ELECTRONICS CIRCUIT BREAKER PANEL and the PILOT EFDI and COPILOT EFDI circuit breakers on the FWD ELECTRICAL LOAD CENTER remain open (pulled) when power is applied to the aircraft. 1. At flight station: a. Observe EXTERNAL PWR AVAILABLE light is on. Set EXTERNAL POWER switch to ON. Observe that EXTERNAL POWER ON light is green (on). At external power receptacle, observe that EXTERNAL POWER IN USE light is on. OR b. Start APU. See NAVAIR 01-75PAA-2-1. 7. 8. 9. 10. Do not operate the avionics equipment without air conditioning. Close all doors and hatches except free fall chute. The sonobuoy free fall chute must be open to allow release of pressurization. d. Turn on air conditioning system (either on-board or auxiliary). (See NAVAIR 01-75PAA-2-1 for detailed procedures.) Adjust and operate cabin air conditioning system until cabin temperature is under 27 degrees C (80 degrees F) and maintain temperature below this reading. Close (push in) PILOT and COPILOT EFDI circuit breakers and check all circuit breakers are closed. 13. 14. 15. 2-4. 12. CAUTION c. Check that the BUS MONITORING A BUS, B BUS, and ESS BUS switches are ON. 11. d. Set the MODE switch to RMT (displays go blank).
At electronics rack G2: a. b. Check that SEARCH PWR SFTY CKT DISABLE switch is off. Check that SEARCH PWR SFTY CKT DISABLE switch cover is down.
At electronic rack H1, third shelf, set IFF MODE 2 numeral wheels to 0100. CAUTION To prevent possible internal component failure, the INERTIAL SYSTEM NO. 1, INERTIAL SYSTEM NO. 2, and 115VAC A RUN circuit breakers on the aft electronic circuit breaker panel shall remain open (pulled) when the inertial navigation system(s) are not being used. At aft electronic circuit breaker panel, check that all circuit breakers are closed. Perform visual inspection of all bays, racks, and equipment for security and proper installation. Ensure 75 ft ICS cord, headset, and boom mike are on board the aircraft.
e. 2.
At forward left hand electronic circuit breaker panel: a. b. c. Close (push in) HSI PILOT, HSI COPILOT and HSI NAV circuit breakers and check that all circuit breakers are closed. Check that ARM SAFETY CKT DISABLE switch is off. Check that ARM SAFETY CKT DISABLE switch cover is down.
6. 7. 8. 2-3.
At DPS electronic circuit breaker panel, check that all circuit breakers are closed. Check that all available LU subunit switches are set to on (DTL only). Check that circuit breaker on SDC, electronic rack D3, is on. At main load center circuit breaker panels, check that all circuit breakers are closed. At Harpoon circuit breaker panel, check that all circuit breakers are closed. At acoustic system circuit breaker panel, check that all circuit breakers are closed (Update III only). At center electronic circuit breaker panel, check that all circuit breakers are closed. At electronics rack F1 (Aircraft incorporating AFC 597): a. b. c. On UHF 1 and UHF 2 RSC, set FUNCTION switch to T/R. Verify all segments display 8 followed by four-digit readout of software date, e.g., 01.98. Set MODE switch to MAN. Verify the correct operating frequency has been entered. Ensure no flashing BIT codes, decimal points, or ? in 100 MHz digit position are present.
TACCO STATION. 1. 2. Perform lamp test. At TACCO Power Control: a. Activate all power control switches in the prescribed sequence: (1) (2) (3) (4) (5) (6) (7) (8) (9) (10) b. COMPUTER POWER ON LOGIC UNITS 1, 2, and 3 KEYSETS MAG TAPES DATA CONV RDR SCAN PILOT DISPLAY ARO SS 3 MPD TACCO MPD
INTERNAL INITIALIZATION.
Verify that the three Central Computer switches are in the center position.
Figure 2-1. Technician Readiness Test Procedures (Sheet 1 of 17)
Change 10
2-1
NAVAIR 01-75PAC-12
3. At TACCO AUX Power Control [LU (DPS) 4 equipped], activate the following switches: a. b. 4. 5. 6. 2-5. LOGIC UNIT 4 SS 1 & SS 2 DISPLAY 7. b. c. d. Set BEARING selector to FMS2. Set HDG SRC switch to PRI (INS 2). Set ATTD SRC switch to PRI (INS 2). 11. b. c. d. Set BEARING selector to FMS2. Set HDG SRC switch to PRI (INS 1). Set ATTD SRC switch to PRI (INS 1).
At MDD, perform BITE and set MODE SELECTOR switch to ON LINE. (See NAVAIR 01-75PAC-12-2 for BITE data.) At TACCO Armament Control Panel, set all selector switches to OFF. At Torpedo Preset Panel, set MANUAL STA SELECT switch to AUTO. Perform lamp test. CAUTION To prevent possible internal component failure, the INERTIAL SYSTEM NO. 1, INERTIAL SYSTEM NO. 2, and 115VAC A RUN circuit breakers on the aft electronic circuit breaker panel shall remain open (pulled) when the inertial navigation system(s) are not being used.
At Flight station, turn on following radios: a. b. c. d. e. f. VOR 1 VOR 2 Aircraft incorporating AFC 707, at the Copilot side console, set V/UHF POWER toggle switch to ON. TACAN (set to receive) ADF UHF 1 (Aircraft not incorporating AFC 597) (1) g. Set function selector switch to T/R + G and mode switch to MAN.
At Pilot FDS Control: a. b. c. Press STEERING PITCH switch-indicator from OFF to ON (if ON, press OFF then ON). Press STEERING ROLL switch-indicator from OFF to ON (if ON, press OFF then ON). Press MAN HDG switch-indicator to AMBER.
FLIGHT STATION. 1.
12.
On Pilot Armament Control Panel (Armament Control Box on Aircraft incorporating AFC 604): WARNING At no time shall the flight station MASTER ARM and SRCH PWR switches be turned on during the running of any ARM/ORD SYGNOG tests. a. b. c. Set MASTER ARM switch to OFF. Set SRCH PWR switch to OFF. Set SPL WPN STA SEL switch to OFF (Aircraft not incorporating AFC 604). NOTE SONO DISABLED indicator remains on when SONOBUOY SAFETY SWITCH ACCESS DOOR is open. If a fault exists with the safety switch when access door is open, troubleshoot using NAVAIR 01-75PAC-12-6.
UHF 1 (Aircraft incorporating AFC 597) (1) (2) At the CDNU, press F1 to select UHF 1 Control page. Toggle LSK-2 to select T/R+G. NOTE
2.
Inertial Navigation System: a. At both Pilot and Copilot MSU, set INS 1 and INS 2 mode switches to STBY.
3.
AN/ARN-151 Global Positioning System. a. b. At both Pilot and Copilot CDNU, set Power switch to ON. After approximately 20 second BIT (screen blank), adjust BRT knob for correct intensity. 8.
If the radio control is currently set up, frequencies or preset information may also be entered on the Comm page (F3) by selecting the LSK that corresponds to the UHF radio or by selecting the F1 (UHF 1) or F2 (UHF 2) button. At Tactical Data Display: a. b. 9. Set POWER switch to ON. Perform BITE and set MODE switch to NORM. (See NAVAIR 01-75PAC-12-1 for BITE data.)
4. 5.
At Copilot IFF Transponder Control, set MASTER switch to STBY. At Copilot HSI Control (Aircraft not incorporating AFC 603): a. b. c. d. Set COURSE switch to TAC NAV REP (SEL DA). Set BRG 2 switch to DA/DF. Set HDG switch to INS 2. Set ATTD switch to INS 2. 10.
2-6.
NAVCOMM STATION. 1. 2. Perform lamp test. AN/ARN-151 Global Positioning System. a. b. 3. At NAV/COMM CDNU, set power ON/OFF switch to ON. After approximately 20 second BIT (screen blank), rotate BRT knob to adjust intensity.
At Pilot HSI Control (Aircraft not incorporating AFC 603): a. b. c. d. Set COURSE switch to TAC NAV (SEL DA). Set BRG 1 switch to DA. Set HDG switch to INS 1. Set ATTD switch to INS 1.
6.
At Copilot EFDS Control (Aircraft incorporating AFC 603): NOTE COURSE and BEARING selector positions are displayed on either the EFDS or EFDI. a. Set COURSE selector to FMS2.
At Pilot EFDS Control (Aircraft incorporating AFC 603): NOTE COURSE and BEARING selector positions are displayed on either the EHSI or EFDI. a. Set COURSE selector to FMS2.
At HF 1 and HF 2 Radio Set Controls, set COND selector switch to LO (Aircraft Not Incorporating AFC 738).
3A. At HF 1 and HF 2 Radio Set Controls, set function switch to STBY (Aircraft Incorporating AFC 738). 4. At Teleprinter: a. Set POWER switch to ON.
2-2
Change 11
NAVAIR 01-75PAC-12
b. c. d. 5. Press CMPTR-TTY switch-indicator to light CMPTR amber. Verify adequate paper supply. Verify paper release handle is up. NOTE Aircraft with an A-370 COMM System Selector, the XMIT indicator is amber when COMM System Selector TEST switch-indicator is amber. h. Verify the following indicators are on green, and that all others are off: (1) (2) (3) (4) (5) 8. RADIO SILENCE ROLL CALL LONG BC SHORT BC TEST 13. 12. a. b. c. Set COURSE selector to FMS2. Set BEARING selector to FMS2. Set HDG SRC switch to PRI (INS 1).
At Teletypewriter: a. b. Set POWER switch to ON. Press CONST & EDIT key.
At UHF 2 Radio Set Control, (RSC), (Aircraft not incorporating AFC 597) a. b. Set function selector switch to T/R + G. Set mode switch to MAN.
6.
At COMM System Selector: a. b. c. Set POWER switch to ON. Verify that MATRIX FAULT indicators are not on. Verify CIPHER DATA switch-indicator on COMM System Selector is green as follows: (1) (2) (3) (4) d. e. Set TEST switch-indicator to amber. On UHF 2, set DATA switch-indicator to amber. On HF/UHF, verify that CIPHER DATA switch-indicator is green. (If amber, then press to green.) Set TEST switch-indicator to off.
UHF 2 (Aircraft incorporating AFC 597) a. b. At the CDNU, press F2 to select UHF 2 Control page. Toggle LSK-2 to select T/R+G. NOTE If the radio control is currently set up, frequencies or preset information may also be entered on the Comm page (F3) by selecting the LSK that corresponds to the UHF radio or by selecting the F1 (UHF 1) or F2 (UHF 2) button.
Set NAV Simulator as follows: a. b. c. d. e. Set POWER/OFF switch to POWER. Set HEADING/OFF switch to OFF and control to zero degrees. Set ROLL/OFF switch to OFF and control to zero degrees. Set TAS KNOTS/OFF switch to OFF and control to 200 knots. Set PITCH/OFF switch to OFF and control to zero degrees. b. 15. 16. 14.
At electronic equipment rack B3: a. Verify that the COMM Interface 2 MASTER CONTROL and CLOCK SELECT switches are in OPERATE. Verify TEST SELECT switch is set to position 24.
Select PLAIN VOICE amber. At COMM Interface 1, verify TEST SELECTOR switch is set to position 24 and TEST-OFF-OPR switch to OPR. 9.
At Bathythermograph (if installed): a. b. Set PWR switch to OFF. Set function switch to OPERATE.
7.
At Data Link Control Monitor: a. b. Set POWER FAULT switch to amber. Set TEST switch-indicator to green. NOTE DTS GO and FAULT indicators must go off when TEST switch-indicator comes on green. c. d. e. f. g. Set DATA switch-indicator to amber. Set CONTROL switch-indicator to amber. Set INT SYNC switch-indicator to amber. Set DATA FAST switch-indicator to amber (INT NORM also lights amber). Set ERROR DETECT switch-indicator to amber. 11. 10.
True Air Speed (TAS), turn on TAS. AN/ARN-151 Global Positioning System. a. b. At NAVCOMM CDNU, set Power switch to ON. After approximately 20 second BIT (screen blank), adjust BRT knob for correct intensity.
At NAVCOMM HSI Control (Aircraft not incorporating AFC 603): a. b. c. d. Set COURSE switch to REP PILOT. Set BRG 2 switch to DA. Set HDG/ATTD switch to INS 1. Set HDG switch to TRUE. 2-7.
SENSOR STATION 3. 1. 2. 3. Perform SS 3 lamp test with A321 test switch.The AAI control panel indicator requires an independent press-to-test function. Set VHF-ECM switch to ECM on ICS Crew Control. At both Radar Controls: a. b. Set PWR switches to PWR. Press LOAD-DUMMY switch-indicators to DUMMY.
At NAVCOMM EFDS Control (Aircraft incorporating AFC 603): NOTE COURSE and BEARING selector positions are displayed on either the EHSI or EFDI.
Change 11
2-3
NAVAIR 01-75PAC-12
c. d. e. 4. 5. 6. Set frequency select switch to FIXED. Set AFC-MAN switches to AFC. Set VIDEO switches to TEST. 8. 9. b. Perform BITE (see NAVAlR 01-75PAC-12-4) and set MODE switch to NORM. e. f. g. Press RESET CHAN pushbutton switch. Press RESET MCP pushbutton switch. Press CONTROL EF switch-indicator, observe that CONTROL EI lamp indicator comes on and MCP DATA REGISTER 14 and 0 indicators come on.
At RSGC, press CONTROL CMPTR switch-indicator to amber. Set the following: a. b. c. At DIU, set OFF LlNE-SPL CMD-LT OFF switch to SPL CMD or LT OFF. At both SDR, verify DIU IN-OUT switch is set to IN; set BITE selector switch to ASSG. At ICP, press bezel switch and press ALI LOFAR block to amber. 2-12.
At Antenna Control, set SCAN switch to FULL. At SDD, perform BITE, then set MODE SELECTOR switch to ON LINE. (See NAVAIR 01-75PAC-12-2 for BITE data.) At ESM Control-Indicator (AN/ALQ-78 ESM or AN/ALQ-78A ESM installed):
LU 2/DMTS. 1. At LU 2, verify MTC subunit power switch is set to OFF.
2-13.
TAPE LOAD PROCEDURE (RD-319 MTT INSTALLED). 1. 2. 3. 4. 5. Load STP tape on MTT. (See MTT Tape Loading Procedure in Section 9A.) Load scratch tape on alternate MTT with a write permit ring installed and zero tape. See NAVAIR 01-75PAC-12-7. At LU 2 MCP, press CONTROL IA switch-indicator and observe that CONTROL EI indicator goes off. At LU 2 MCP, set MODE SELECTOR switch to ON LINE. At LU 2, press ENTER pushbutton and observe OFF LINE indicator goes off and ON LINE indicator comes on.
CAUTION 2-9. Do not run antenna at high speed for more than 15 minutes. a. b. c. 7. 8. 2-8. Set SCAN RATE switch to LOW. Set POWER switch to STBY (STBY lamp comes on). Set SYSTEM TEST switch to OFF.
10.
If DICASS is installed, verify the POWER switch is set to OFF.
ELECTRONICS RACKS F1 AND F2. 1. At electronics rack F2 ARM/ORD Test Panel: a. b. c. 2. Set POWER switch to ON. Press LAMP TEST pushbutton switch. Verify that all indicators come on. 2-14.
Set MAD Selector Control Panel MAD AUX switch to POWER. Set MAD Control PWR switch to ON.
At SRS Receiver-Computer (located between electronics racks F1 and F2 on top shelf, if installed): a. b. Set power ON-OFF switch to ON. Verify that TEST POINT SELECT switch is set to OFF (AN/ARS-3 SRS only). NOTE A 3-minute warmup is required to ensure SRS equipment stabilization. In the event of an aircraft power shutdown or an SRS power down for maintenance, the 3-minute warmup should again be observed.
TAPE LOAD PROCEDURE (RD-319A MTT INSTALLED). 1. 2. 3. 4. Load STP tape on MTT. (See MTT Tape Handling and Adjustments in Section 9B.) At LU 2, press IA switch-indicator and observe that EI lamp goes off. At LU 2, set MODE SELECTOR switch to ON LINE. At LU 2, press ENTER pushbutton and observe OFF LINE indicator goes off and ON LINE indicator comes on.
SENSOR STATIONS 1 AND 2. 1. 2. 3. 4. Perform lamp test. At SS 1 and SS 2 SONO Receiver Power Switch, set power switches to on. At SS 1 and SS 2 DCCI, press all COMP OVRD switches to auto or manual mode. At ASSG, press POWER switch-indicator to ON. NOTE For DIFAR, perform initialization procedures, see NAVAIR 01-75PAC-12-4 Section 2. 5. 6. 7. At both BFI, set POWER switch to ON. At both SDR, set POWER switch to ON. At Auxiliary Display (if installed): a. Set POWER switch to ON. 2-10. 2-11.
2-15.
TAPE LOAD PROCEDURES (DMTS INSTALLED). NOTE With AFC 489 installed, depression of RCDR OVHT RESET toggle switch will override the rack overheat warning caused by the 4 second overtemp sensor in the DMTC. 1. At DMTC: a. b. c. Set POWER switch-circuit breaker to ON. Press ONLN-OFFLN for CTRL 1 or CTRL 2 as required. Verify ONLN is backlit amber. Verify CP-901 switch-indicator is backlit amber for on line controller.
AVIONICS INITIALIZATION. LU 2/MTT. 1. At LU 2 MCP, set switches as follows: a. b. c. Set MODE SELECTOR switch to OFF LINE. Set CHANNEL switch to MTC. On nonupdate aircraft, on LU 2 POWER CONTROL panel, set ADDRESS switch to A1-B2 (MTT A) or A2-B1 (MTT B) as required. On update aircraft, set ADDRESS switch to A1-B2. Press ENTER pushbutton switch.
d.
2-4
NAVAIR 01-75PAC-12
d. Press DMTU SEL switch-indicators A and B active for on line controllers. Verify switch-indicators are backlit amber for active controllers. c. d. e. f. Set ADDRESS selector to 2. Load a write enabled scratch tape cartridge in DMTU. (See DMTS Tape Cartridge Loading and Servicing in Section 9.) Set AUTO-MNL switch to AUTO. Verify that only the following indicators are on: (1) (2) (3) (4) (5) (6) PWR ON SEL RDY AUTO BOT STOP NOTE The STP may be loaded from DMTU A or DMTU B. However, the unit containing the STP must have the ADDRESS selector set to 1. The unit containing the scratch tape must be addressed as 2. 2-16. COMPUTER BOOTSTRAP CHECK AND PROCEDURE (CORE ROPE COMPUTER). 1. Core Rope Computer Diagnostic Test: a. b. c. Set BOOTSTRAP AUTO RECOV-MANUAL switch to MANUAL. Set BOOTSTRAP A-B switch to B. Press MASTER CLEAR switch. PROGRAM LOAD 2. j. k. d. e. f. g. h. i. Press LSO-START STEP switch once. Verify that STOP indicator comes on and P register displays 40062. Set BOOTSTRAP AUTO RECOV-MANUAL switch to center. Set BOOTSTRAP A-B switch to center. Press LSO-START STEP switch once. Verify that STOP indicator comes on and P register displays 40063. Press LSO-START STEP switch once. RUN indicator comes on momentarily (approximately 1 second) then goes off. Verify that STOP indicator comes on and P register displays 40766. NOTE Try rerun if bootstrap check fails. For core rope error definition, see NAVAIR 16-35CP901 (computer diagnostics). Core Rope MTC Logic Test. Press LSO-START STEP switch twice and observe that RUN indicator comes on. NOTE
2.
At DMTU A: a. b. c. d. e. f. Set PWR switch-circuit breaker to ON. Set AUTO-MNL switch to MNL. Set ADDRESS selector to 1. Load STP tape cartridge in DMTU. (See DMTS Tape Cartridge Loading and Servicing in Section 9.) Set AUTO-MNL switch to AUTO. Verify that only the following indicators are on: (1) (2) (3) (4) (5) (6) (7) PWR ON SEL RD WRITE LOCKOUT AUTO BOT STOP
3.
At DMTU B: a. b. Set PWR switch-circuit breaker to ON. Set AUTO-MNL switch to MNL.
S S
If MTC logic test is GO, bootstrap loading of computer diagnostics (first file in system test tape) is automatically initiated. See step 1 of System Test Program Load. If MTC logic test fails, see NAVAIR 01-75PAC-12-7.
2-5
NAVAIR 01-75PAC-12
2-17. COMPUTER BOOTSTRAP CHECK AND TAPE LOADED PROGRAM LOAD PROCEDURES (ROM COMPUTER). 1. ROM Computer Diagnostic Test: a. b. c. d. e. f. g. h. i. j. k. BOOTSTRAP AUTO RECOV-MANUAL switch to MANUAL. Set BOOTSTRAP A-B switch to A. Set JUMP 2 and JUMP 3 switches to up. Press MASTER CLEAR switch. Press LSO-START STEP switch once. Verify that STOP indicator comes on and P register displays 40062. Set both BOOTSTRAP switches to center. Press LSO-START STEP switch once. Verify that STOP indicator comes on and P register displays 40063. Press LSO-START STEP switch once. RUN indicator comes on momentarily (approximately 1 second), then goes off. Verify that STOP indicator comes on and P register displays 40500. Set JUMP 2 and JUMP 3 switches to center. NOTE Try rerun if preload checkout fails. If unsuccessful, perform Central Computer Preload Checkout procedure in Section 4. See NAVAIR 16-35CP901 series for error stop and loop definitions. 2. ROM MTC/DMTC Logic Test. Press LSO-START STEP switch twice, and observe that RUN indicator comes on. NOTE 6. 5.
FLEET ISSUE HAWK Where: SYYYYYYY ZZZZZZZZ SYSTEM TEST STARTED
S
2-18.
If MTC/DMTC logic test fails, see NAVAIR 01-75PAC-12-7 for error stop and loop definitions.
NOTE The ADVANCE key option shall not be printed. If channels 1 and 2 have been disabled, or following a manual restart, the ADVANCE key shall not be displayed or available. 7. The ADVANCE key control device shall be available as follows:
Disabled Channels 1 2 All Others Control Device TTY TACCO, NAVCOMM, and SS 3 TTY, TACCO, NAVCOMM, and SS 3
SYSTEM TEST PROGRAM LOAD. NOTE Throughout this manual, program designation is indicated as SYYYYYYY. S indicates the program designation, plus major and minor changes incorporated. 1. 2. Verify that tape unit begins to operate and loads the computer diagnostic test into memory. After computer diagnostic is loaded, the tape unit stops and the computer runs the diagnostic program. Verify the PROG and MEM PROT FAULT indicators come on. After the PROG and MEM PROT FAULT indicators come on, the tape unit again starts to operate. At Control Key check, set BOOTSTRAP AUTO RECOV-MANUAL and A-B switches to center and press MASTER CLEAR switch. When the executive is loaded, the HSP prints the following: 8.
Excessive I/O activity is usually the result of a hardware problem in the interface circuits between the CP-901 and the peripheral. After completing the load sequence, the operator should select and execute the diagnostic for the peripheral device or logic unit connected to the disabled channel. The I/O activity check is performed upon initial program load and on all manual restarts. In addition, if the channel has been previously disabled, the routine will be performed under the following conditions: a. b. c. d. Upon completion or termination of Automatic Auto SYGNOG. Upon completion or termination of an operator selected Auto SYGNOG, Diagnostic, or Special Test. Upon completion or termination of Tape Duplicator. Upon termination of Simultaneous SYGNOG.
3.
9.
4.
YYYYYYY= Fleet issue identification number ZZZZZZZZ = COMPLETED or NOT RUN
l.
To detect hardware problems which could cause program slow down, an I/O Bombardment Check is made on the computer channels used by the executive. Channels exceeding their expected activity level will be disabled. The disabling of a channel shall result in the print and display of the I/O Bombardment Error Message:
CHANNEL YYYYYYY YYYYYYY TO ADVANCE DEPRESS NUM 6 XX YY... shall denote the disabled channel. line entries shall denote multiple channels disabled. XX YY YY DISABLED YYYYYYY YYYYYYY
10.
When I/O Bombardment is detected, it indicates that unexpected I/O has been detected on a particular CP-901 channel. Upon disabling that computer channel, the operator has the option of performing that channels peripheral diagnostic test. If tape loading fails after computer diagnostics is completed, a status cue informs operator of last attempt. The message may include an octal code. See NAVAIR 01-75PAC-12-7 for error printout definition. NOTE If tape loading or computer diagnostic results in an abnormal P register display, see NAVAIR 01-75PAC-12-7 or NAVAIR 16-35CP901 series for error stop and loop definitions.
11.
If MTC/DMTC logic test is successful, bootstrap loading of STP tape is automatically initiated.
2-6
NAVAIR 01-75PAC-12
2-19. CONTROL KEY CHECK. NOTE Twelve keys are required at the TACCO Keyboard, NAVCOMM Universal Keyset, TTY, or SS 3 to perform the control key check. In case of a stuck key, the check may be run at an alternate station. 1. After the tape loader and system test executive are loaded, operators are cued at TACCO and NAVCOMM ARO and SS 3 SDD.
FLEET ISSUE SYYYYYYY SYSTEM TEST STARTED DEPRESS TACCO NUMERIC OR NAV COMM NUMERIC OR TTY NUMERIC OR SS 3 NUMERIC 1 1 1 1
the default configuration.

CONFIG TABLE 1 0+0 DPS 1 0+1 DPS 2 0+2 DPS 3 0+3 DPS 4 DTL DTL DTL NO CONFIG TABLE 2 1+0 IRDS 1+1 BT DIFAR 1+2 RADAR YES NO APS-115
XXX=Verification line. Displays selected option to be processed at the TACCO MDD and SS 3 SDD.
2.
If mass storage is not available or the mass storage load is unsuccessful, the default configuration is displayed on the Configuration List Tableau. Unsuccessful load of the mass stored configuration list results in a print on the HSP and a display for 5 seconds on the ARO, SS 3 SDD, and TACCO MDD.
UNABLE TO LOAD CONFIG TABLE FROM MASS STORAGE
0+4 ACOUSTIC LOC 0+5 MAG TAPE RD-319 0+6 ESM 0+7 AD 0+8 SRS 0+9 OMEGA ALQ-78 NO NONE LTN-211 YYYYYYYYYYYYYYYYYYY 5 ADV ARO TABLE 6 ADVANCE 8 CONFIG COMPLETE
3.
Upon operator selection of a specific equipment name from the Configuration List Tableau, the selected equipment is displayed with the available options on the Equipment Options Tableau. (See Equipment Options Tableau procedure.) a. Selection of the ADVANCE function results in the display of the Equipment Options Tableau for the next sequential equipment name from the Configuration List Tableau. Selection of the ADVANCE function when no equipment name has been selected or the last equipment name has been previously selected causes the program to automatically select the 0+0 equipment name for display in the Equipment Options Tableau. Selection of the ADV ARO TABLE function results in the display of the next table of the configuration list. If the last table of the configuration list is currently being displayed, selection results in the display of the first table. NOTE If an illegal key depression is made when the Configuration List Tableau is displayed, ILLEGAL RESPONSE is displayed on the verification line of the tableau.
YYYYYYYYYYYYYYYYYYY 5 ADV ARO TABLE 6 ADVANCE 8 CONFIG COMPLETE
2. 3.
Sequentially press numerics 1 through 0, CANCEL (SKIP key for SS 3), and EOM at a control station. After numeric 1 is pressed, the cue for the selected station is updated to DEPRESS NUMERIC 2, DEPRESS NUMERIC 3, and so forth, until EOM is pressed. After EOM is pressed, the HSP prints:
CONTROL KEY CHECK COMPLETE AT XXXXXX Where XXXXXX = station at completion.
YYY=Verification line. Displays selected option to be processed at the TACCO and NAVCOMM AROs. CONFIG TABLE 0+0 0+1 0+2 0+3 0+4 0+5 0+6 0+7 0+8 0+9 1+0 1+1 1+2 5 6 8 DPS 1 DPS 2 DPS 3 DPS 4 ACOUSTIC MAG TAPE ESM AD SRS OMEGA IRDS BT DIFAR RADAR DTL DTL DTL NO LOC RD-319 ALQ-78 NO NONE LTN-211 YES NO APS-115
b.
4.
5. 2-20.
The Configuration List Tableau is displayed on the AROs, TACCO MDD, and SS 3 SDD.
CONFIGURATION PROCESSING (TAPE LOADED STP). 1. Upon completion of the control key check, the executive displays the Configuration List Tableau on both AROs, SS 3 SDD, and the TACCO MDD with either the mass stored aircraft configuration or the default configuration. If mass storage is available in the aircraft, an attempt is made to load the stored configuration list. The following printout is an example of the Configuration List Tableau for
4.
XXXXXXXXXXXXXXXXXXX ADV ARO TABLE ADVANCE CONFIG COMPLETE
If the operator selects the CONFIG COMPLETE function, mass storage is available, and the equipment configuration has changed from what is in mass storage, an attempt is made to store the identified configuration in mass storage. Unsuccessful storage of the configuration list results in either the display for 5 seconds on the ARO, SS 3 SDD, and TACCO MDD and printing of the mass storage store error message:
2-7
NAVAIR 01-75PAC-12
UNABLE TO STORE CONFIG TABLE TO MASS STORAGE DEPRESS NUM 6
3.
c. 6. 2-21.
The configuration list printout is then printed and the program will exit configuration processing.
Following the Mass Storage Load Error message or operator selection of NUM 4 (INCORRECT CONFIGURATION), the program prints and displays for 10 seconds the CMOS CP-901 Reload Error message on the ARO, SS 3 SDD, and TACCO MDD.
STORED CONFIGURATION DOES NOT MATCH AIRCRAFT CONFIGURATION OPERATOR MUST RELOAD FROM SYSTEM TEST TAPE
5.
Or the printing and display for 5 seconds on the ARO, SS 3 SDD, and TACCO MDD and printing of the mass storage unprotect message:
MEMORY PROTECT DETECTED UNPROTECT MASS STORAGE SECTOR ONE WHEN COMPLETE DEPRESS NUM 6
Upon exit of configuration processing, the executive displays the main select tableau on the ARO, SS 3 SDD, and TACCO MDD. PROCESSING (SECONDARY STORAGE
CONFIGURATION LOADED STP). 1.
Upon completion of the control key check, the executive prints and displays the configuration list on the SS 3 SDD and the TACCO MDD with the mass stored aircraft configuration. The following is an example of the configuration list for the default configuration.
LIST DTL DTL DTL NO LOC RD-319 ALQ-78 NO NONE NO YES NO APS-115 CP-901 FOR XXXXXXXX CONFIGURATION LIST DPS 1 DPS 2 DPS 3 DPS 4 ACOUSTIC MAG TAPE ESM AD SRS OMEGA IRDS BT DIFAR RADAR DTL DTL DTL NO LOC RD-319 ALQ-78 NO NONE NO YES NO APS-115
4.
The program will then perform a system halt. The operator must then load STP from the MTT. Selection of NUM 6 (CORRECT CONFIGURATION) results in the exit of configuration processing.
a.
If mass storage is not available, the equipment configuration has not changed from what is in mass storage, or the storage of the configuration list is unsuccessful, the program shall print the configuration list printout and exit configuration processing. The following is an example of the configuration list printout for the default configuration.
CP-901 FOR XXXXXXXX CONFIGURATION LIST DPS 1 DPS 2 DPS 3 DPS 4 ACOUSTIC MAG TAPE ESM AD SRS OMEGA IRDS BT DIFAR RADAR DTL DTL DTL NO LOC RD-319 ALQ-78 NO NONE NO YES NO APS-115
CONFIGURATION DPS 1 DPS 2 DPS 3 DPS 4 ACOUSTIC MAG TAPE ESM AD SRS OMEGA IRDS BT DIFAR RADAR IF CORRECT DEPRESS NUM 6 IF INCORRECT DEPRESS NUM 4 Displayed at: SS 3 SDD TACCO MDD
5. 2-22.
EQUIPMENT OPTIONS TABLEAU. 1. The Equipment Options Tableau is displayed and is available for selection when an equipment name has been selected from the Configuration List Tableau. a. The equipment options that are available per equipment selection are listed below.
OPTIONS a. DTL a. Yes, equipment installed b. No, equipment not installed a. LOC b. BBAND a. RD-319 MTT b. RD-319A MTT c. DMTS a. AN/ALQ-78 ESM b. AN/ALQ-78A ESM a. Yes, equipment installed b. No, equipment not installed a. None b. AN/ARS-3
EQUIPMENT 1. DPS 1, DPS 2 DPS 3 2. DPS 4 3. ACOUSTIC
Where XXXXXXXX = CMOS or NON CMOS
b.
Upon successful storage of the configuration list, the program shall display on the ARO, SS 3 SDD, and TACCO MDD the mass storage protect message:
MEMORY UNPROTECTED PROTECT MASS STORAGE SECTOR ONE WHEN COMPLETE
Printed at HSP: Where XXXXXXXX=CMOS or NON CMOS
4. MAG TAPE
2.
If the mass storage load is unsuccessful, the program shall print and display for 10 seconds the Mass Storage Load Error message on the ARO, SS 3 SDD, and TACCO MDD.
UNABLE TO LOAD CONFIG TABLE FROM MASS STORAGE
5. ESM 6. AD 7. SRS
2-8
NAVAIR 01-75PAC-12
8. IRDS 9. BT DIFAR 10. RADAR a. Yes, equipment installed b. No, equipment not installed a. Yes, equipment installed b. No, equipment not installed a. AN/APS-115 b. AN/APS-137 YYY = ZZZ = options to be selected, number of options listed shall be limited to only those required. (verification line) selected options to be configured. 2 3 4 5 6 7 SELECTABLE AUTO SIMULTANEOUS DIAGNOSTICS SPECIAL TESTS TAPE DUPLICATOR STP TERMINATE
Note: Asterisk items are not status accountable.
NOTE
1.
b.
The following printout depicts the Equipment Options Tableau displayed at the ARO, SS 3 SDD, and TACCO MDD.
EQUIPMENT OPTIONS CHOOSE XXXXXXXX CONFIGURATION 1 ZZZZZZZZZZZZZZZZZZ 2 ZZZZZZZZZZZZZZZZZZ 3 ZZZZZZZZZZZZZZZZZZ 4 ZZZZZZZZZZZZZZZZZZ 5 ZZZZZZZZZZZZZZZZZZ YYYYYYYYYYYYYYYYYYYYY CANCEL OR SKIP TO RESELECT EOM TO ENTER COMMENT: XXXXXXXX = equipment to be configured.
S S S
2-23.
If an invalid configuration has been entered, program performance is unpredictable. If an illegal key depression is made when the Equipment Options Tableau is displayed, ILLEGAL RESPONSE is displayed on the verification line of the tableau. Selection of an equipment option results in the redisplay of the Configuration List Tableau with the selected equipment option.
When configuration processing is completed from tape loaded or secondary storage loaded STP, the System Test Main Select Tableau is printed and displayed at both ARO, SS 3 SDD, and TACCO MDD. The NAVCOMM, TACCO, or SS 3 operators have the option to select a specific test with numerics 1, 2, 3, 4, 5, and 6 at the TACCO Keyboard, the NAVCOMM Universal Keyset, TTY, or SS 3 Tray. Pressing of numeric 7 terminates the STP. If the Tape Load STP is being executed, the tape rewinds to load point, the MTT is deselected, and the program stops. Upon depression of the START STEP switch on the MCP, the program returns to the Main Select Tableau. NOTE
SYSTEM TEST SELECT TABLEAU.

TEST SELECTION DEPRESS 1 AUTOMATIC AUTO
S S
The operator must execute Mass Store Special Test under the following circumstances: The configuration has been modified and the operator desires to execute STP from secondary storage.
2-9
NAVAIR 01-75PAC-12
2-24. AUTOMATIC AUTO SYGNOG TEST. NOTE On ALQ-78/ALQ-78A equipped aircraft, ESM power switch must be set to ON prior to selecting Automatic Auto SYGNOG. 1. Press numeric 1 on TACCO Keyboard, NAVCOMM Universal Keyset, TTY, or SS 3 Tray to select automatic auto SYGNOG. The program search and load cues are displayed as appropriate at TACCO MDD, SS 3 SDD, and ARO:
TAPE SEARCH FOR XXXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXXX ZZZZZZ TO ABORT OR XXXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXXX BEING LOADED NOTE ZZZZZZ = CANCEL at TACCO ARO NAVCOM ARO TACCO MDD SKIP at SS 3 SDD DPS 1 TAC NAV ARO ESM SONO RECEIVER DPS 2 MAG TAPE DPS 3 SDC DPS 4 SRS DATA LINK INT None None ESM Acoustics None None None None LU(DTL)4 SRS None None None AN/ALQ-78 or AN/ALQ-78A ESM Localizer or Broadband DIFAR None None None None Yes, equipment installed AN/ARS-3 None T SE CE TE NI Test terminated without error Test started with error Test completed with error Test terminated with error Equipment not installed
5.
The following display depicts the automatic auto SYGNOG status tableau for the default configuration:
FLEET ISSUE SYYYYYY AUTO SYGNOG STATUS TABLEAU TEST HSP DPS 1 TAC ARO NAV ARO ESM SONO RECEIVER DPS 2 MAG TAPE DPS 3 SDC DATA LINK INT XXXXXXXXXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXXXXXXXXX STATUS AB AB AB AB AB AB AB AB AB AB AB
Upon depression of TACCO Keyboard, NAVCOMM Universal Keyset, TTY, or SS 3 numeric 9 (which is available any time an operator response is required or upon completion or termination of automatic auto SYGNOG), the auto SYGNOG status tableau is printed on the HSP with the following legends displayed as appropriate next to the test titles:
STARTED COMPLETED TERMINATED STARTED ERROR TERMINATED ERROR
When the program is in an error branch, the operator is given key depression options to exit, continue, or repeat test in progress. At this time, the operator may terminate automatic auto SYGNOG and return to the system test main select tableau. Pressing the terminate key returns the program to the system test main select tableau and prints the auto SYGNOG status tableau with the status of tests which have been run. If an illegal key is pressed, the message ILLEGAL RESPONSE is printed on the HSP. To terminate automatic auto SYGNOG, press NUM-7 on NAVCOMM Universal Keyset, TACCO Keyboard, TTY, or SS 3 Tray. Note that the terminate option is not displayed. Error printouts. When a malfunction is detected, the HSP prints out the test title, test number, and may include an octal code. See NAVAIR 01-75PAC-12-7 for an explanation of error printouts. 6. HSP prints out the following test message at 3000 words per minute:
2. 3. 4.
X... shall be replaced by the specific test name The HSP prints the following:
AUTOMATIC AUTO SYGNOG SELECTED
As the automatic test progresses, the operator is advised of the individual test status by the TACCO MDD and SS 3 SDD. The automatic auto SYGNOG status tableau is configuration dependent. Line entries appropriate to the identified configuration shall be displayed in the order shown below:
Equipment Dependency None Configuration Option(s) None
NOTE The following legends are displayed as appropriate next to the test titles on the MDD:
Legend S C Definitions Test started Test completed without error
Listed Line Entries HSP
2-10
NAVAIR 01-75PAC-12
8. At the completion of the 60 WPM test, both AROs display the following message:
HSP 100 WPM TEST SELECT 100 WPM MODE TO CONTINUE DEPRESS NUM 2 NAVCOM NUM 2 TACCO NUM 2 TTY NUM 2 SS 3 OBSERVED ERR DEPRESS NUM 4 NAVCOM NUM 4 TACCO NUM 4 TTY NUM 4 SS 3 ABCDEFGHIJKLMNOPQR (100 WPM PRINTOUT)
11.
ARO DISPLAY CHECK.
a.
At the completion of the DPS 1 test, the following is automatically displayed on the ARO:
9.
After the completion of the 100 wpm test, pressing numeric 2 on the NAVCOMM Universal Keyset, TACCO Keyboard, or SS 3 Tray produces the following TTY type test printout:
(TTY TYPE TEST PRINTOUT)
NOTE NOTE Should a timing error occur during the WPM timing test, the following message appears on both AROs, TACCO MDD, and SS 3 SDD:
HSP COMM INTFC 1 (3000, 60, OR 100) WPM TIMING ERR
There should be no two adjacent dots missing in any of the 5X5 matrix printouts for character position 1 through 71. If the printout pattern does not qualify, clean the print head of the HSP. Character position 72 is printed out as a number sign (#).
S
10. a. b.
7.
At the completion of the 3000 WPM test, the TACCO and NAVCOMM ARO display:
HSP 60 WPM TEST SELECT 60 WPM MODE TO CONTINUE DEPRESS NUM 2 NAVCOM NUM 2 TACCO NUM 2 TTY NUM 2 SS 3 OBSERVED ERR DEPRESS NUM 4 NAVCOM NUM 4 TACCO NUM 4 TTY NUM 4 SS 3 ABCDEFGHIJKLMNOPQR (60 WPM PRlNTOUT)
DPS 1 Test. The DPS 1 test is entered after completion of the HSP test. For DTL 1 configurations, in case of an error, the following cue is displayed on the ARO and SS 3 SDD:
TO EXIT DEPRESS NUM 1 NAVCOM NUM 1 TACCO NUM 1 TTY NUM 1 SS 3 TO CONTINUE DEPRESS NUM 2 NAVCOM NUM 2 TACCO NUM 2 TTY NUM 2 SS 3
b.
If patterns are not acceptable, press numeric 4 on the TACCO Keyboard, NAVCOMM Universal Keyset, or TTY. The first observed error is at the TACCO station, regardless of what station is in control.
c.
If patterns on both AROs are acceptable, press numeric 2 on the TACCO Keyboard, NAVCOMM Universal Keyset, or TTY, or either one twice.
d.
The Sonobuoy Receiver test is entered at the completion of the ESM test or ARO display check.
Change 3
2-11
NAVAIR 01-75PAC-12
NUM 1 NAVCOM NUM 1 TACCO NUM 1 TTY NUM 1 SS 3 TO CONTINUE DEPRESS NUM 2 NAVCOM NUM 2 TACCO NUM 2 TTY NUM 2 SS 3
b.
12.
ESM (AN/ALQ-78 and AN/ALQ-78A). The ESM test is automatically entered after completion of the ARO display check. When an error occurs during the ESM test, the operator has the option to EXIT, CONTINUE, or REPEAT. These options are displayed on the ARO and the SS 3 SDD. Sonobuoy Receiver test (Localizer and Broadband DIFAR installed). a. In case of an error, the following cue is displayed on the ARO and SS 3 SDD:
TO EXIT DEPRESS NUM 1 NAVCOM NUM 1 TACCO NUM 1 TTY NUM 1 SS 3
For LU (DTL) 3 configurations, in case of an error, the following cue is displayed on the ARO and SS 3 SDD:
13.
15.
Mag Tape Test (RD-319 MTT). Upon completion or termination of the LU (DTL) 2 test, the mag tape timing test is automatically entered. Mag Tape Test (RD-319A MTT). a. b. Upon completion or termination of the DPS 2 test, the MTT test is automatically entered. Individual cues tell the operator to remove the STP tape, mount a scratch tape, and then replace the STP tape. In each case, press numeric 6 when complete. c.
16.
During DPS 3 test, the auto SYGNOG status tableau is not displayed.
19.
Signal Data Converter (SDC) Test. a. The SDC test is automatically entered upon completion of the DPS 3 test. In case of an error, the following cue is displayed on the ARO and SS 3 SDD:
TO REPEAT DEPRESS NUM 3 NAVCOM NUM 3 TACCO NUM 3 TTY NUM 3 SS 3 TO EXIT DEPRESS NUM 1 NAVCOM NUM 1 TACCO NUM 1 TTY NUM 1 SS 3
14.
DPS 2 Test. NOTE During DPS 2 NAV MUX subunit testing, error detection can occur if DPS 2 is not initialized. If this occurs, a message is displayed instructing the operator to turn DPS 2 power off and then on. After cycling power, the operator must press the ADVANCE key as instructed by the message. When these actions are performed, the DPS 2 test is repeated. a. b. The DPS 2 test is entered after completion of the Sonobuoy Receiver test or the last previously listed test. For DTL 2 configurations, in case of an error, the following cue is displayed on the ARO and SS 3 SDD:
TO EXIT DEPRESS
17.
Mag Tape Test (DMTS). a. b. Upon completion or termination of the DPS 2 test, the mag tape test is automatically entered. Individual cues instruct the operator in the testing of both tape drive units, the removal and mounting of the STP tape, and the scratch tape, as required. In each case, press numeric 6 when complete.
b.
18.
DPS 3 Test. a. The DPS 3 test is entered after completion of the mag tape test.
2-12
Change 3
NAVAIR 01-75PAC-12
TO CONTINUE DEPRESS NUM 2 NAVCOM NUM 2 TACCO NUM 2 TTY NUM 2 SS 3
b.
20.
DPS 4 Test [LU (DTL) 4 installed]. a. The DPS 4 test is automatically entered upon completion of the SDC test. A cue instructs the operator to turn LU 4 power switch off, then on, and press numeric 6 when complete. The options NUM-1 EXIT and NUM-6 CONTINUE are available whenever instruction or error messages are displayed. If the operator opts to EXIT the test, the message EXIT RESPONSE RECEIVED is printed on the HSP and the test terminated. The final subtest in DPS 4 is an operational check of the ALTERNATE DRUM CLOCK track. This subtest may be skipped. If the operator does opt to EXIT at this time, the status display at the TACCO MDD shows a T. If the operator opts to continue, the message ALTERNATE DRUM CLOCK TRACK NOT CHECKED is printed on the HSP. If necessary to check the alternate track, press numeric 6. A cue tells the operator to set the CLOCK SELECT switch to its alternate (opposite) position. The switch is located on the MDM maintenance panel at the left side of DPS 4. Close the switch cover and press numeric 6 to continue. 23. c.
b.
The operator is then cued to TURN SRS POWER SWITCH OFF and THEN ON, then AT SRS TEST PANEL SELECT TP 10 and THEN SELECT TP OFF, then IF THIS MESSAGE REMAINS AFTER ACTION COMPLETION, press NUM-6 to advance. When the program detects a power status or TP status problem, the complete cue remains on display and NUM-6 must be pressed to start error processing. When the power status and TP status tests are successful, the complete cue is removed from display and testing continues automatically. lnitialization or I/O data transfer errors cause failure of the TP status test. If this is the case, the cue remains on display and NUM-6 must be pressed. Then, the error process causes exit from the current subtest as subsequent subtests detect and process initialization and I/O data transfer problems. The remainder of the SRS test is automatic with operator intervention required only in the event of an error stop. The options NUM-1 EXIT, NUM-2 CONTINUE, and NUM-3 REPEAT are available whenever error messages are displayed. If the operator opts to EXIT the test, the message SRS TEST TERMINATED is printed on the HSP and the test is terminated.
TEST SELECTION DEPRESS 1 2 3 4 5 6 7 AUTOMATIC AUTO SELECTABLE AUTO SIMULTANEOUS DIAGNOSTICS SPECIAL TESTS TAPE DUPLlCATOR STP TERMINATE
2-25.
SELECTABLE AUTO SYGNOG TEST. NOTE
c.
During running of auto SYGNOG, MAG TAPE auto fails due to SASP STP tape being in the DMTU. In order to obtain a complete status for MAG TAPE auto, it is necessary to verify DF diagnostic and DF OP load have completed; then load a scratch tape in the DMTU and follow MAG TAPE auto instructions.
d.
Data Link Interface Test. a. The data link interface test is automatically entered upon completion of the last previously listed test that was executed. 1. b. In case of an error, the following cue is displayed on the ARO and SS 3 SDD:
On ALQ-78/ALQ-78A equipped aircraft, ESM power switch must be set to ON prior to selecting ESM Test.
21.
Omega Test. a. The Omega test is automatically entered upon completion of the DPS 4 or SDC test. If LU 4 is installed, the cue to cycle DPS 4 power is not presented in this mode of auto SYGNOG testing if power monitor testing in the DPS 4 test was executed. The options NUM-1 EXIT and NUM-6 CONTINUE are available whenever instruction or error messages are displayed. If the operator opts to EXIT the test, the message OMEGA TEST TERMINATED is printed on the HSP and the test is terminated.
Press numeric 2 on TACCO Keyboard, NAVCOMM Universal Keyset, TTY, or SS 3 Tray to select selectable auto SYGNOG. The program search and load cues are displayed as appropriate at TACCO MDD, SS 3 SDD, and ARO:
TAPE SEARCH FOR XXXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXXX ZZZZZZ TO ABORT OR XXXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXXX BEING LOADED NOTE ZZZZZZ = CANCEL at TACCO ARO NAVCOM ARO TACCO MDD SKIP at SS 3 SDD
b.
22.
SRS Test (AN/ARS-3 installed). a. The SRS test is automatically entered upon completion of the Omega test or the last previously listed test that was executed. (1) In a LU (DTL) 4 environment, the cue to cycle power is not present in this mode of auto SYGNOG testing if power monitor testing in DPS 4 or Omega test was executed. DMS subtests 1, 2, 3, and 4 are to be executed prior to SRS initiation.
NOTE Upon completion of the last available automatic auto SYGNOG test, the system test executive is in control and the auto SYGNOG status tableau (step 3 of Automatic Auto SYGNOG test procedure) is printed on the HSP. The system test main select tableau is also printed on the HSP and displayed on the ARO, TACCO MDD, and SS 3 SDD as follows:
2.
X... shall be replaced by the specific test name
2-13
NAVAIR 01-75PAC-12
3. 4. Display shall be for 5 seconds. Tests performed in selectable auto SYGNOG are the same as those run in automatic auto SYGNOG, the only difference being that the operator is required to select each test individually from the auto SYGNOG test select tableau. In a LU (DTL) 4 environment, the operator is required to cycle LU 4 power in the DPS 4 and SRS (AN/ARS-3) test. The HSP prints out as follows:
SELECTABLE AUTO SYGNOG SELECTED 0+8 0+9 SDC DATA LINK INT XXXXXXXXXXXXXXXXXX 3 5 6 7 TEST REENTRY ADV ARO TABLE ADV TO NEXT TEST TERMINATE TE NI Test terminated with error Equipment not installed
9.
When an operator is selected or a test is in progress, the TACCO MDD and SS 3 SDD status tableau are as depicted in the automatic auto SYGNOG section. Upon completion of selectable auto SYGNOG, press TERMINATE key 7. The auto SYGNOG status tableau (step 3 of Automatic Auto SYGNOG Test) is also printed on the HSP. The system test main select tableau is also printed on the HSP and displayed on the ARO and SS 3 SDD as follows:
10.
5.
8.
The following TACCO MDD and SS 3 SDD displays are examples of the auto SYGNOG select/status tableau for the default configuration:
FLEET ISSUE SYYYYYYY AUTO SYGNOG STATUS TABLEAU SELECT 0+0 0+1 0+2 0+3 0+4 0+5 0+6 0+7 0+8 0+9 TEST HSP DPS 1 TAC NAV ARO ESM SONO RECEIVER DPS 2 MAG TAPE DPS 3 SDC DATA LINK INT STATUS AB AB AB AB AB AB AB AB AB AB
6.
After selection of selectable auto SYGNOG, the ARO displays the selectable auto SYGNOG test select tableau. The SS 3 SDD and TACCO MDD display the selectable auto SYGNOG test select/status tableau. The ARO selections are limited to 10 per table. The SS 3 SDD and TACCO MDD display all available selection/status entries. Both selectable auto SYGNOG tableau are configuration dependent. The following table lists the order of each line entry and its equipment dependency.
Equipment Dependency None None None ESM Acoustics None None None None LU(DTL)4 SRS None Configuration Option(s) None None None AN/ALQ-78 or AN/ALQ-78A ESM Localizer or Broadband DIFAR None None None None Yes, equipment installed AN/ARS-3 SRS None
Listed Line Entries HSP DPS 1 TAC NAV ARO ESM SONO RECEIVER DPS 2 MAG TAPE DPS 3 SDC DPS 4 SRS DATA LINK INT
2-26.
SIMULTANEOUS SYGNOG TEST. 1. Press TACCO Keyboard, NAVCOMM Universal Keyset, TTY, or SS 3 Tray numeric 3 to select simultaneous SYGNOG. The ARO, TACCO MDD, and SS 3 SDD display TAPE SEARCH FOR SIMULTANEOUS SYGNOG and after locating the correct file number, SIMULTANEOUS SYGNOG will then be loaded. The OVERFLOW indicators come on at TACCO and SS 3. The start of station simultaneous testing is indicated by test select tableaus being displayed at all stations except ARM/ORD. The SS 1 and SS 2 test select tableaus are represented by keyset legends. In non-SASP environment, the SS 1 and SS 2 auxiliary display is available and displays the SS 1 and SS 2 test select tableau. NOTE The cues and procedures listed in Section 2 of each Crew Station Maintenance Manual should be followed at all times. 3. The TACCO Keyboard, NAVCOMM Universal Keyset, SS 3 Tray, or TTY numeric 8 can be pressed to display the simultaneous SYGNOG status tableau on the SS 3 SDD and TACCO MDD. This key is unavailable at a station when a keyset test is in progress at that station. This key is not available at the SS 3 station when SS 3 is testing and is not available elsewhere when TACCO is testing. Alternate depression of this key causes the MDD and SDD to display the auto SYGNOG status tableau. The available simultaneous SYGNOG tests are as configured during configuration processing. The following table lists the tests that are available along with their equipment dependencies:
XXXXXXXXXXXXXXXXXXXXXXXX
3 6 7 8 9 TEST REENTRY ADV TO NEXT TEST TERMINATE DISPLAY STATUS PRINT STATUS
2.
7.
The following ARO display is an example of the auto SYGNOG test select tableau for the default configuration:
AUTO TEST TABLE 1 SELECT 0+0 0+1 0+2 0+3 0+4 0+5 0+6 0+7 TEST HSP DPS 1 TAC NAV ARO ESM SONO RECEIVER DPS 2 MAG TAPE DPS 3
NOTE XXX...denotes the verification line. The following legends are displayed as applicable next to the test titles on the SS 3 SDD and TACCO MDD:
Legend S C T SE CE Definitions Test started Test completed without error Test terminated without error Test started with error Test completed with error
4.
2-14
NAVAIR 01-75PAC-12
Available Simul Tests FLT TAC NAV SS 1 SS 2 SS 3 ORD MTT Equipment Dependency None None None Acoustic Acoustic None None Mag Tape Configuration Option(s) None None None Localizer or Broadband DIFAR Localizer or Broadband DIFAR None None RD-319 MTT KEYSET DISPLAY SONO RECEIVER BT LOC DIFAR B BAND CASS DICASS None AD None None Acoustic Acoustic None None None Yes, equipment installed None None Localizer DIFAR Broadband DIFAR None None
h.
Station Test MTT 1 MTT 2
MTT Station Entries:

Equipment Dependency Mag Tape Mag Tape Configuration Option(s) RD-319 MTT RD-319 MTT
6.
The following depicts the TACCO MDD and SS 3 SDD displayed simultaneous SYGNOG status tableaus for: a. NUDS, UD I, UD II, and UD II.5 configurations.
FLEET ISSUE SYYYYYYY SIMULTANEOUS SYGNOG STATUS TABLEAU FLT KEYSET DISPLAY DIRECTOR NAVIGATION ARM ORD TAC KEYSET DISPLAY ANALOG TRACKBALL AB AB AB AB AB AB AB AB AB SS 3 KEYSET DISPLAY TRACKBALL ANALOG SAD IRDS ORD KEYSET DIRECTOR NAVIGATION DATA LINK TTY SS 1 KEYSET DISPLAY SONO RECEIVER BT LOC DIFAR CASS DICASS 7 8 9 AB AB* AB AB AB AB AB AB AB AB AB AB MTT MTT 1 MTT 2 AB** AB** KEYSET PANEL AB AB AB AB AB AB AB AB SS 2 KEYSET LOC DIFAR CASS DICASS AB AB AB AB
e.
SS 2 Station Entries:
5.
Each available simultaneous SYGNOG station requires status accountable entries. The following tables list the status line entries for each station test along with their equipment dependencies: a.
Station Test KEYSET DISPLAY DIRECTOR NAVIGATION ARM ORD
Flight Station Entries:

Equipment Dependency None None None None None Configuration Option(s) None None None None None
Station Test KEYSET LOC DIFAR B BAND CASS DICASS
Equipment Dependency None Acoustic Acoustic None None
Configuration Option(s) None Localizer DIFAR Broadband DIFAR None None
f.
NAV
b.
Station Test
TACCO Station Entries:

Equipment Dependency None None None None Configuration Option(s) None None None None Station Test KEYSET DISPLAY TRACKBALL ANALOG ISAR SAD IRDS Equipment Dependency None None None Radar Radar None IRDS Configuration Option(s) None None None AN/APS-115 AN/APS-137 None Yes, equipment installed
KEYSET DISPLAY ANALOG TRACKBALL
c.
Station Test
NAVCOMM Station Entries:

Equipment Dependency None None None None None Configuration Option(s) None None None None None
KEYSET DIRECTOR NAVIGATION DATA LINK TTY
g.
ARM ORD Station Entries:
TERMINATE DISPLAY STATUS PRINT STATUS
d.
Station Test
Equipment Dependency Configuration Option(s)
Station Test KEYSET PANEL
Equipment Dependency None None
Configuration Option(s) None None
NOTE
* ** Not available on NON UPDATE Aircraft Available on NON UPDATE Aircraft only
2-15
NAVAIR 01-75PAC-12
7. Pressing the TACCO Keyboard, NAVCOMM Universal Keyset, SS 3 Tray or TTY numeric 9 causes the status tableau to be printed by the HSP. The following display is an example of the simultaneous SYGNOG status tableaus for: a. NUDS, UD I, UD II, and UD II.5 configurations.
FLEET ISSUE SYYYYYYY SIMULTANEOUS SYGNOG STATUS TABLEAU FLT KEYSET DISPLAY DIRECTOR NAVIGATION ARM ORD KEYSET DISPLAY ANALOG TRACKBALL KEYSET DIRECTOR NAVIGATION DATA LINK TTY KEYSET DISPLAY SONO RECEIVER BT LOC DIFAR CASS DICASS KEYSET LOC DIFAR CASS DICASS KEYSET DISPLAY TRACKBALL ANALOG SAD IRDS KEYSET PANEL AAAAAAAAAA AAAAAAAAAA AAAAAAAAAA AAAAAAAAAA AAAAAAAAAA AAAAAAAAAA AAAAAAAAAA AAAAAAAAAA AAAAAAAAAA AAAAAAAAAA AAAAAAAAAA AAAAAAAAAA AAAAAAAAAA AAAAAAAAAA AAAAAAAAAA AAAAAAAAAA AAAAAAAAAA AAAAAAAAAA AAAAAAAAAA AAAAAAAAAA AAAAAAAAAA AAAAAAAAAA AAAAAAAAAA AAAAAAAAAA AAAAAAAAAA AAAAAAAAAA AAAAAAAAAA AAAAAAAAAA AAAAAAAAAA AAAAAAAAAA AAAAAAAAAA AAAAAAAAAA AAAAAAAAAA BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB* BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB MTT MTT 1 2 AAAAAAAAAA AAAAAAAAAA BBBBBBBBBB** BBBBBBBBBB**
2-27.
SYGNOG SWITCH FUNCTION. NOTE Key and switch numbers have been omitted since numbers vary between station keysets and keyboards. 1. SEQUENTIAL. Pressing this switch causes each test (with the exception of alignment tests, TACCO POFA test, SS 1 and SS 2 STP test, and the MTT test) listed in the station test select tableau, to be entered automatically after completion or termination of the prior test. Upon completion of all tests, the station TEST COMPLETE message is displayed. If one or more tests were terminated, the station test select tableau is displayed upon completion of final test. REPEAT STEP. Pressing this switch causes the program to repeat the step in which an error has just occurred. This option is available only after an error has occurred, in which case the switch is lighted amber. If the repeat option is used and the error is not detected, an E is not entered on the status tableau. OBSERVED ERROR. Pressing this switch informs the computer that the station operator has observed an error. This causes the program to output the error message at the HSP appropriate to the step of the test in progress. Also, an E is entered next to the test title of the test status tableau. This option is available any time during a test. ADVANCE. Pressing this switch informs the computer that observed equipment response is acceptable, and causes the program to proceed with the next sequential step of the test in progress. This option is not functional during keyset test. RESTART. Pressing this switch causes the test currently in progress to be restarted. This option is available anytime during a test. CONTINUE. Pressing this switch causes the program to continue with the next sequential step of the test in progress. This option is available only after an error has occurred, in which case the switch is lighted amber. An E is entered on the test status tableau. TEST SELECT TABLEAU. Pressing this switch causes the program to display the station test select tableau. It is available at flight station, TACCO, NAVCOMM, and SS 1, 2, and 3. If a test is in progress, the test is terminated and a T is inserted on the appropriate line of the simultaneous SYGNOG status tableau.
NOTE
* ** Not available on NON UPDATE Aircraft Available on NON UPDATE Aircraft only
NOTE
When the program is in an error branch, the operator is given key depression options to start over, continue, repeat, or terminate. These key functions are defined in SYGNOG Switch Functions. Error printouts. When a malfunction is detected, the HSP prints the station, test step number, and either the expected/received octal codes or an operator observed error message.
TAC
2.
S
8.
The MTT test can be run only at the TACCO Keyboard. (See figure 2-2 for test procedures.)
NAV
The MTT test (non-update aircraft) can be run at any time during simultaneous SYGNOG. There are two tests. Test 1 checks MTT 2. Test 2 checks MTT 1. a. b. c. Press numeric 3 on the TACCO Keyboard to run each test. Program advances to next test after each test is completed. Numeric 4 is used to exit to next subtest in case of error stop. See MTT System Test Procedure for initialization procedures and alternate action in case of error stop.
3.
SS 1
4.
9.
SS 2
Pressing the TACCO Keyboard, NAVCOMM Universal Keyset, or TTY numeric 7 returns the control to the system test executive program. The HSP prints the simultaneous SYGNOG status tableau. The system test main select tableau is also printed on the HSP and displayed on the ARO as follows:
5.
SS 3
6.
10.
ORD
During the simultaneous station testing (at which time the options displayed are available), the station tests are placed under station operator control by means of switch functions that provide certain options. (See applicable Crew Station Readiness Test Procedures for specific switch assignments.)
7.
2-16
NAVAIR 01-75PAC-12
8. SELECT TEST. Pressing the switch associated with a specific test listed in the test selection tableau causes initiation of the specified test and erases the test status from the simultaneous SYGNOG status tableau. The select test options are available only while the test select tableau is being presented at the Pilot Display, TACCO MDD, NAVCOMM ARO, SS 1, and SS 2 Universal Keyset/legends (auxiliary display is available when configured), or SS 3 SDD. TERMINATE: a. Pressing this switch terminates the test in progress and causes the program to proceed with the next sequential test if in the sequential mode or to go back to the test select tableau if not in sequential mode. If malfunctions occur during the readiness test, see NAVAlR 01-75PAC-12-7. 2. is not critical, but all stations must be shut down prior to turning off power at the TACCO Power Control. 1. At TACCO AUX Power Control [LU(DTL) 4 equipped], set the following power switches to OFF: a. b. SS 1 & SS 2 DISPLAY LOGIC UNIT 4 4. CAUTION
9.
At the TACCO POWER CONTROL panel, set the following peripheral equipment power switches to OFF in the prescribed sequence to avoid equipment damage: a. b. c. d. e. f. g. h. TACCO MPD SS 3 MPD ARO PILOT DIS RDR SCAN DATA CONV MAG TAPE KEYSETS
To prevent possible internal component failure, the INERTIAL SYSTEM NO. 1, INERTIAL SYSTEM NO. 2, and 115VAC A RUN circuit breakers on the AFT ELECTRONIC CIRCUIT BREAKER PANEL shall remain open (pulled) when the inertial navigation system(s) are not being used. At the AFT ELECTRONIC CIRCUIT BREAKER PANEL, open (pull out) the INERTIAL SYSTEM NO. 1, INERTIAL SYSTEM NO. 2, and 115VAC A RUN circuit breakers.
b. 2-28.
AIRCRAFT POWER TURNOFF. CAUTION
CAUTION
To avoid a power overload condition (and unnecessary popping of circuit breakers), the following TACCO Power Control Power-off procedure must be performed in the sequence shown. NOTE
3.
At the TACCO POWER CONTROL panel, set the following power switches to OFF in the prescribed sequence: a. b. c. d. LOGIC UNIT 3 LOGIC UNIT 2 LOGIC UNIT 1 COMPUTER POWER 5. 6.
To prevent possible internal component failure, the HSI PILOT, HSI CO--PILOT, and HSI NAV circuit breakers on the FWD ELECTRONIC CIRCUIT BREAKER PANEL and the PILOT EFDI and COPILOT EFDI circuit breakers on the FWD ELECTRICAL LOAD CENTER shall remain open (pulled) when power is applied to the aircraft. At the FWD ELECTRICAL LOAD CENTER, open (pull out) the PILOT EFDI and COPILOT EFDI circuit breakers. At the FWD LH ELECTRONIC CIRCUIT BREAKER PANEL, open (pull out) the HSI PILOT, HSI CO--PILOT, and HSI NAV circuit breakers.
S S
Prior to turning off equipment on mass storage aircraft, drum stored program must be loaded. The sequence in which the various stations are shut down
Change 10
2-17
NAVAIR 01-75PAC-12
2-1. MTT SYSTEM TEST INITIALIZATION (RD-319 MTT equipped).
1. Mount zeroized scratch tape (with write permit ring installed) on MTT B (MTT 2). System test tape is mounted on MTT A (MTT 1). (See NAVAIR 01-75PAC-12-7 for zeroizing procedures.)
NOTE D D NUM 3 must be pressed two times if the MTT 2 test is rerun. Operator cues are displayed at the TACCO ARO. Line 10 (MTT 2 SELECTED) comes up only if magnetic tape test initial provisions have been met. If the external function is not accepted by LU 2, Magnetic Tape Control subunit, line 10 reads as follows:
MTT 2 UNAVAILABLE
(3) (4) (5)
Switch tape reels. Thread tape, close door, and press FORWARD and TAPE MOTION pushbutton switches. Observe LOAD POINT indicator is amber.
NOTE D The scratch test tape must be electrically erased prior to running the MTT System Test procedure. The tape must be positioned at load point. The MTT System Test can be run only at the TACCO Keyboard.
Set ADDRESS switch on LU 2 POWER CONTROL panel to A1-B2 if the scratch test tape is mounted on MTT 2. Set ADDRESS switch on LU 2 POWER CONTROL panel to A2-B1 if the scratch test tape is mounted on MTT 1.
NOTE
At this point, the scratch test tape must be electrically erased before continuing with next step. d. 3. At LU 2 MCP, set MODE SELECTOR switch to ON LINE and press ENTER.
D
2.
If the external function request is accepted, but the MTT is not ready, the ARO display reads as follows:
MTT 2 NOT READY
If MTT 1 or MTT 2 power is not turned on, a not installed (NI) cue is displayed on the MDD and HSP status tableaus. If an error is detected, the program runs to completion. The ARO displays TEST COMPLETE; the HSP prints out the error, and the MDD status tableau displays CE. If five errors are detected while running MTT 1 or 2 tests, then the test is automatically terminated and the HSP prints out the five errors as follows:
ERROR MTT 1 (2) TERMINATED 5 ERRORS DETECTED
Press TACCO Keyboard NUM 3. The TACCO ARO displays: MTT 2 TEST COMPLETE MTT 1 SELECTED
4.
NOTE
If one MTT is down or not installed, the unit to be tested must be selected as logical (2). 3. Perform the avionics initialization procedure. Upon entering simultaneous SYGNOG test, the MDD displays the following: SELECT TEST DEPRESS MXA1 MXA2 MXA3 MXA4 M-7 MXA5 NUM3 NUM4 NUM8 NUM9 NUM7 KEYSET DISPLAY ANALOG TRACKBALL SEQUENTIAL POFA TEST MAG TAPE INIT MAG TAPE TERM DISPLAY STATUS PRINT STATUS TERMINATE SlMUL 2.
Press TACCO Keyboard NUM 3. The TACCO ARO displays: (Running time approximately 2 minutes.) MTT 1 IN PROGRESS Upon completing the test, the TACCO ARO displays: MTT TESTS COMPLETE SWITCH TAPES
5.
NOTE D It is recommended the tapes be left as they presently are located rather than switch them as directed by the display. However, if the operator leaves the tapes located as they are, then set the ADDRESS switch on LU 2 POWER CONTROL panel to A2-B1. The reason for leaving the tapes as they are is to eliminate unnecessary tape handling. TACCO Keyboard NUM 4 terminates any test being run. A T is displayed on the status tableau when NUM 4 is used to terminate a test in progress or to advance the program after an error stop.
The TACCO ARO displays: MTT 2(1) REWINDING MTT 2(1) TERMINATED SWITCH TAPES
Switch tapes between transports as follows: a. At LU 2 MCP: (1) (2) (3) (4) (5) (6) (7) (8) b. c. Set MTT TEST switch to OFF. Set switches 24 through 27 to down. Set all CONTROL subsection switches (4) to down. Set MODE SELECTOR switch to OFF LINE. Set CHANNEL switch to MTC. Press ENTER pushbutton switch. Press all RESET pushbutton switches (5). Press CONTROL EF switch-indicator.
2-2.
PROCEDURE.
1. Press TACCO Keyboard NUM 3. The TACCO ARO displays: MTT 1 REWINDlNG Then: MTT 2 IN PROGRESS (Running time approximately 2 minutes.) Then: MTT 2 TEST COMPLETE MTT 1 SELECTED SWITCH TAPES
6.
Observe on each MTT that MTT SELECT and ADDRESS NO. 1 or NO. 2 indicators are not lighted green. On the MTT containing the scratch test tape, press REVERSE and TAPE MOTION pushbutton switches. (1) (2) Verity that STOP indicator is amber before opening door. Manually rewind the tape and remove reel from the transport.
NOTE
These cues are displayed until load point is reached; then the TACCO ARO displays: MTT 1(2) SELECTED SWITCH TAPES
2-18
Figure 2-2. MTT System Test Procedure (Sheet 1 of 2)
NAVAIR 01-75PAC-12
7. 8. When a test is terminated, the program advances to the next test. Switch tapes and press TACCO Keyboard NUM 3 two times to begin test. A NO WRITE LOCK OUT cue is displayed and printed out by the HSP if the following conditions exist: a. b. c. 9. No write permit ring mounted on scratch test tape. ADDRESS A1-B2 switch on LU 2 POWER CONTROL panel in incorrect position. Write permit logic failure.
After corrective action, press NUM 3 to run the test or press NUM 4 to exit test.
Figure 2-2. MTT System Test Procedure (Sheet 2 of 2)
2-19
NAVAIR 01-75PAC-12
2-1. 2-2. DMTS READINESS CHECK. INITIALIZATION.
1. 2. Remove any tape cartridge installed in DMTU. Verify the following circuit breakers on DPS electronic circuit breaker panel are on: a. b. c. d. 3. 4. MAG TAPE CONT ABC. MAG TAPE A DC. MAG TAPE B DC. PWR DISTR BOX DC.
2-3.
LAMP TEST.
1. 2. 3. Press and hold DMTU A LAMP TEST switch and verify all DMTU A indicators come on. Release LAMP TEST switch. Press and hold DMTU B LAMP TEST switch and verify all DMTU B indicators come on. Release LAMP TEST switch. Press and hold DMTC LAMP TEST switch indicators come on as indicated: CONTROLLER 1/2 A/N DISPLAY CONTROLLER 1/2-MORE INFO CONTROLLER 1/2-SEL MOD CONTROLLER 1/2-CLR CTRL 1-ON LN/OFF LN CTRL 2-ON LN/OFF LN CTRL 1-I/O SEL (4) CTRL 2-I/O SEL (4) DMTU SEL (8) AYK-14-PWR AYK-14-BIT ERROR AYK-14-OVER TEMP AYK-14-IPL FAIL AYK-14-RESET AYK-14-CLR BIT-CTRL 1-2, 4, 1, 3 BIT-CTRL 2-16, 18, 1, 17 BIT-CTRL 1-INIT MA CLR BIT-CTRL 2-INlT MA CLR OVER TEMP 4. and verify the following =RED? =GREEN =AMBER =GREEN =AMBER =AMBER =AMBER =AMBER =AMBER =AMBER =AMBER =RED =GREEN & AMBER =GREEN =GREEN =AMBER =AMBER =AMBER =AMBER =RED c. LOOP 4 LOOP 5 ALL LOOP 1
MODE DISPLAY LOOP 2 LOOP 3
CYCLE
OP
HALT
MODE DISPLAY READ FWD d. WRITE 5S WRITE AS WRITE EOF CONT HALT READ REV IRG/FM WRITE OS WRITE FS
Verify the MAG TAPE switch on the TACCO Power Control is on. Set DMTC POWER switch, and DMTU A and DMTU B PWR switches to ON. Verify the following indications: a. On DMTC: (1) (2) b. PWR ON comes on amber. OVER TEMP goes off.
On DMTU A and B: (1) (2) (3) PWR ON comes on. RDY goes off. WRITE LOCKOUT comes on.
Continue to hold DMTC LAMP TEST switch and verify the MODE DISPLAY cycles through the following ten displays: MODE DISPLAY e.
MODE DISPLAY
CAUTION
a. Power must be applied to DMTU before inserting tape cartridge in DMTU. Damage to tape may result if power is not on.
NOTE
Verify safe switch on scratch tape cartridge is in WRITE before installing tape into DMTU. 5. Install scratch tape cartridge in both DMTU (see DMTU tape cartridge loading and servicing Section 9). Verify the following indications on both DMTU A and DMTU B: a. b. RDY comes on. WRITE LOCKOUT goes off. BIT b. DMTU A MODE DISPLAY DMTU B DMTU C DMTU D MODE DISPLAY
D
f.
D
EXIT
2-20
Figure 2-3. DMTS Test Procedure (Sheet 1 of 3)
NAVAIR 01-75PAC-12
MODE DISPLAY
MODE DISPLAY
MODE DISPLAY
D
g.
D
k.
BIT TEST
DMTU A
DMTU B
DMTU C
DMTU D
D
EXIT
9. MODE DISPLAY MODE DISPLAY
Press MODE DISPLAY BIT TEST switch-indicator. Verify MODE DISPLAY displays BIT test options as follows: MODE DISPLAY ALL LOOP 1 LOOP 2 LOOP 3
D D D
l.
D
h.
D D D D D D
D
LOOP 4 LOOP 5 CYCLE OP HALT
2-4.
MODE DISPLAY
PROCEDURE.
1. At DMTC, verify that CP-901 I/O SEL and each DMTU SEL is assignable to either CTRL and that each CTRL is selectable to ON LN then back to OFF LN. Set AUTO-MNL switch on DMTU A and DMTU B to AUTO. Set DMTU A ADDRESS selector to 1 and DMTU B ADDRESS selector to 0. At DMTC, assign DMTU SEL A and DMTU SEL B to CTRL 1. ASSIGN CP-901 I/O SEL to CTRL 1. Press and hold BIT CTRL 1 INIT master clear switch-indicator and verify all four segment BIT lamps come on. Release BIT CTRL lNIT master clear switch-indicator. Verify segment BIT lamps go off and CONTROLLER 1 alphanumeric display reads TEST OK. Press CONTROLLER 1 CLR switch-indicator. Verify TEST OK display goes off. Press CONTROLLER 1 SEL MODE switch-indicator. Verify CONTROLLER 1 SEL MODE switch-indicator comes on amber and MODE DISPLAY displays BIT mode options as follows:
10.
Press MODE DISPLAY OP switch-indicator. Verify MODE DISPLAY OP switch-indicator border is on, CONTROLLER 1 MORE INFO switch-indicator comes on green, and CONTROLLER 1 alphanumeric display reads: !!!!!!!!!!!!!. Press CONTROLLER 1 MORE INFO switch-indicator and verify CONTROLLER 1 alphanumeric display characters change as follows: ! , 7 B M X 8 C N Y # . 9 D O Z $ / : E P [ % 0 ; F Q \ & l < G R ] , 2 = H S ( 3 > I T ) 4 ? J U * 5 @ K V + 6 A L W
D
i.
D
2.
11.
3.
4. 5. MODE DISPLAY 6.
12. 13. 14.
Press each of the other MODE DISPLAY switch-indicators except HALT. Verify that border lights come on when switch is pressed. Press MODE DISPLAY HALT switch-indicator. Verify MODE DISPLAY OP switch-indicator border light is off. Press MODE DISPLAY ALL switch-indicator. Verify that MODE DISPLAY ALL border is on, and CONTROLLER 1 alphanumeric display reads TEST OK. Press MODE DISPLAY HALT switch-indicator, then CONTROLLER 1 SEL MODE switch-indicator.
D
j.
D
7.
D
8.
15.
2-21
NAVAIR 01-75PAC-12
16. 17. 18. 19. Press MODE DISPLAY EXIT switch-indicator. Verify MODE DISPLAY is blank. Repeat steps 4 through 16 using CONTROLLER 2. Set AUTO-MNL switch on DMTU to MNL. Verify AUTO indicator on both DMTUs are off. Press FWD, STOP, RWND, and STOP switches on DMTU A. Verify RWD, RVS, and STOP indicators come on when applicable switch is pressed and go off when switch is released. Repeat step 19 using DMTU B. At DMTC, assign DMTU SEL A and DMTU SEL B to CTRL 1. 39. 22. 23. 24. 25. Assign CP-901 I/O SEL to CTRL 1. Set AUTO-MNL switch on DMTU A and DMTU B to AUTO. Verify DMTU A and DMTU B AUTO indicators come on. At DMTC, press CONTROLLER 1 SEL MODE switch-indicator. Press MODE DISPLAY DMTU A switch-indicator. Verify MODE DISPLAY displays DMTU A test options as follows: MODE DISPLAY READ FWD READ REV IRG/FM WRITE OS WRITE FS 40. Press CONTROLLER 1 SEL MODE then select MODE DISPLAY DMTU A option. Press MODE DISPLAY IRG/FM switch-indicator. Verify CONTROLLER 1 alphanumeric display reads WLO. Press MODE DISPLAY HALT switch-indicator. Press CONTROLLER 1 SEL MODE, select MODE DISPLAY DMTU B option, and then press IRG/FM switch-indicator. Verify CONTROLLER 1 alphanumeric display reads WLO. Press MODE DISPLAY HALT, CONTROLLER 1 SEL MODE, and the MODE DISPLAY EXIT switch-indicators. Set AUTO-MNL switch on both DMTU to MNL. Press FWD switch on DMTU A and DMTU B, and allow tapes to run until tapes stop (3 1/2 minutes maximum). Verify EOT and LOW TAPE indicators are on and BOT indicators are off on both DMTU. Set AUTO-MNL switch on both DMTU to AUTO. At DMTC, assign DMTU SEL A and DMTU SEL B to CTRL 1. Press CONTROLLER 1 SEL MODE, then select MODE DISPLAY DMTU A option. Press MODE DISPLAY READ REV switch-indicator. Verify CONTROLLER 1 alphanumeric display reads EOT, and then LTW. Verify DMTU A EOT indicator is off. At DMTC, press MODE DISPLAY HALT, CONTROLLER 1 CLR, and MODE DISPLAY READ FWD switch-indicators. Verify DMTU A FWD indicator is on. At DMTC, press MODE DISPLAY HALT, then CONTROLLER 1 SEL MODE switch-indicator. Repeat steps 48 through 50 using DMTU B. Press MODE DISPLAY EXIT switch-indicator. Repeat steps 44 through 52 using CTRL 2. Set DMTC POWER switch to off. At DMTC, assign DMTU SEL A and DMTU SEL B to CTRL 1. 34. Press CONTROLLER 2 SEL MODE switch-indicator, then press MODE DISPLAY DMTU A switch-indicator. Verify MODE DISPLAY displays DMTU A test options (see step 25 for DMTU A test options). Press MODE DISPLAY IRG/FM switch-indicator. Verify CONTROLLER 2 alphanumeric display reads TEST OK. Repeat steps 34 and 35 using DMTU B. Press CONTROLLER SEL MODE and then MODE DISPLAY EXIT switch-indicators. Remove scratch tape cartridges from DMTU and set SAFE switches to SAFE. Reinstall tapes in DMTU. 55. 56. 57. Set AUTO-MNL switch on DMTU A and DMTU B to MNL. Press RWND switch on DMTU A and DMTU B, allow tapes to run until tapes stop (3 1/2 minutes maximum). When tapes stop, remove tape cartridges and set DMTU A and DMTU B PWR switches to OFF.
35. 36. 37. 38.
20. 21.
41. 42.
43. 44. 45. CONT HALT 46.
WRITE 5S
WRITE AS
WRITE EOF
26. 27. 28.
Press MODE DISPLAY READ REV switch-indicator. Verify CONTROLLER 1 alphanumeric display reads BOT. Open tape cartridge door. Verify CONTROLLER 1 alphanumeric display reads NOT READY. Close tape cartridge door and momentarily press MODE DISPLAY READ REV switch-indicator. VERIFY CONTROLLER 1 alphanumeric display reads BOT. Press MODE DISPLAY IRG/FM switch-indicator. Verify CONTROLLER 1 alphanumeric display reads TEST OK. Press CONTROLLER 1 CLR switch-indicator to clear alphanumeric display. Repeat steps 25 through 30 using DMTU B. Press MODE DISPLAY EXIT switch-indicator. Assign DMTU SEL A and DMTU SEL B to CTRL 2.
47. 48.
49.
29. 30. 31. 32. 33.
50. 51. 52. 53. 54.
2-22
SECTION 2A
SECTION 2A READINESS TEST PROCEDURES
THIS SECTION CONTAINS DATA APPLICABLE TO AIRCRAFT INCORPORATING AFC 506
NAVAIR 01-75PAC-12
2A. 2A-1. AIRCRAFT POWER TURN-ON. EXTERNAL INITIALIZATION. 1. Check all antennas for breakage or damage. 2. Check that forward radome is closed. 3. Connect battery in rear of nose wheel well.
CAUTION
Do not operate the avionic equipment without air conditioning. Close all doors and hatches except free fall chute. The sonobuoy free fall chute must be open to allow release of pressurization. c. Turn on air conditioning system (either on-board or auxiliary). (See NAVAIR 01-75PAA-2-1 for detailed procedures.) Adjust and operate cabin air conditioning system until cabin temperature is under 27 degrees C (80 degrees F) and maintain temperature below this reading. d. Close (push in) the PILOT EFDI and COPILOT EFDI circuit breakers and check that all circuit breakers are closed. e. Ensure cabin exhaust fan is on. 2. At forward left hand electronic circuit breaker panel: a. Close (push in) the HSI PILOT, HSI CO--PILOT, and HSI NAV circuit breakers and check that all circuit breakers are closed. b. Check that ARM SAFETY CKT DISABLE switch is off. c. Check that ARM SAFETY CKT DISABLE switch cover is down. 3. At DPS electronic circuit breaker panel, check that all circuit breakers are closed with the exception of DPS-1 and DPS-3 which should be pulled. 4. At main load center circuit breaker panels, check that all circuit breakers are closed. 5. At Harpoon circuit breaker panel check that all circuit breakers are closed. 6. At acoustic system circuit breaker panel, check that all circuit breakers are closed. 7. At center electronic circuit breaker panel, check that all circuit breakers are closed. 8. At electronics rack F1 (Aircraft incorporating AFC 597): a. On UHF 1 and UHF 2 RSC, set FUNCTION switch to T/R. b. Verify all segments display 8 followed by four-digit readout of software date, e.g., 01.98. c. Set MODE switch to MAN and verify correct operating frequency has been entered, no flashing BIT codes or decimal point, and no ? in 100 MHz digit position. d. Set the MODE switch to RMT (displays go blank). 9. At electronics rack G2: a. Check that SEARCH PWR SFTY CKT DISABLE switch is off. b. Check that SEARCH PWR SFTY CKT DISABLE switch cover is down. 10. At electronics rack H1, third shelf, set IFF MODE 2 numeral wheels to 0100. 2A-4. TACCO STATION. 1. Perform lamp test. 2A-3.
CAUTION To prevent possible internal component failure, the INERTIAL SYSTEM NO. 1, INERTIAL SYSTEM NO. 2, and 115VAC A RUN circuit breakers on the aft electronic circuit breaker panel shall remain open (pulled) when the inertial navigation system(s) are not being used.
11. At aft electronic circuit breaker panel, check that all circuit breakers are closed. 12. Perform visual inspection of all bays, racks, and equipment for security and proper installation. 13. Ensure 75 ft ICS cord, headset, and boom mike are on board the aircraft. ELECTRONICS RACK D2. 1. At CP-2044 Computer Maintenance Panel: a. If the CP-2044 computer is not powered on, momentarily push the POWER switch to ON. b. Set POWER-UP BIT I/O switch to OFF. c. Set POWER-UP BIT MEM switch to OFF. d. Set POWER-UP BIT PROCESSOR switch to OFF. e. Set BOOTSTRAP switch to D. f. Set AUTO START/START switch to AUTO START. g. Momentarily push the STOP switch down. h. Momentarily push the MA CLR switch down. 2. Observe the following at the CP-2044 Maintenance Panel:
WARNING
Physical injury or equipment damage can occur if the IRDS (Aircraft Not Incorporating AFC 705) or MMIS (Aircraft Incorporating AFC 705) Turret is lowered with no ground observer. If the IRDS TURRET CONT switch is not set to DISABLE, Turret extension can occur in the event of an IRDS or MMIS equipment power-on state upon aircraft power application. 4. Verify that FLIR CONT ENABLE-DISABLE switch (located in the nose wheel well) is in DISABLE (IRDS or MMIS installed). 5. Verify that the SONOBUOY SAFETY SWITCH ACCESS DOOR (under aircraft forward of sonobuoy launch tubes) is OPEN. The switch being open disables firing circuitry to the sonobuoy launch tubes. 6. Check that aft radome is closed. 7. Check Doppler and OTPI antennas covers to ensure drain holes are not obstructed. 8. If external power unit is to be used, see NAVAIR 01-75PAA-2-1 for detailed procedures. 2A-2. INTERNAL INITIALIZATION.
CAUTION
Ensure the HSI PILOT, HSI CO--PILOT, and HSI NAV circuit breakers on the FWD ELECTRONIC CIRCUIT BREAKER PANEL and the PILOT EFDI and COPILOT EFDI circuit breakers on the FWD ELECTRICAL LOAD CENTER remain open (pulled) when power is applied to the aircraft. 1. At flight station: a. Observe EXTERNAL PWR AVAILABLE light is on. Set EXTERNAL POWER switch to ON. Observe that EXTERNAL POWER ON light is green (ON). At external power receptacle, observe that EXTERNAL POWER IN USE light is on. OR Start APU. See NAVAIR 01-75PAA-2-1. b. Check that the BUS MONITORING A BUS, B BUS, and ESS BUS switches are ON.
INITIALIZING MEMORY
followed by:
UNDEFINED BOOTSTRAP TYPE GPC IDLING IN CFW
2. At TACCO Power Control: a. Activate the following power control switches:
Figure 2A-1.
Technician Readiness Test Procedures (Sheet 1 of 19)
Change 10
2A-1
NAVAIR 01-75PAC-12
(1) LOGIC UNIT 2 (supplies power to ARM/ORD Test Panel) (2) KEYSETS b. At ADDU/CDU Control, set ADDU MASTER switch to PILOT and CDU switch to ON (Aircraft Incorporating AFC 719). 3. Deleted 4. Deleted 5. Deleted 6. Copilot Side Console: a. At INS 2 MSU, set mode switch to STBY (Aircraft Not Incorporating AFC 719). b. At IFF Transponder Control, set MASTER switch to STBY (Aircraft Not Incorporating AFC 719). c. At IFF Remote Control Unit (RCU), set MASTER switch to STBY (Aircraft Incorporating AFC 719). d. At GPS CDNU, set MODE switch to ON (Aircraft Not Incorporating AFC 719). e. At CDU/IFF Control, set CDU switch to ON (Aircraft Incorporating AFC 719). f. Set V/UHF POWER toggle switch to ON (Aircraft Incorporating AFC 707). (2) Press RLS6 LSK adjacent to POWER. (3) Press LLS1 LSK adjacent to RINU1 to toggle INU 1 to ON. (4) Press RLS1 LSK adjacent to RINU2 to toggle INU 2 to ON. (5) Press LLS2 LSK adjacent to IFF to toggle IFF to ON. (6) Press LLS3 LSK adjacent to V/UHF to toggle V/UHF to ON. 10. At Flight Station, turn on following radios: a. VOR 1 b. VOR 2 c. Aircraft incorporating AFC 707 and not incorporating AFC 719, at the Copilot side console, set V/UHF POWER toggle switch to ON. d. TACAN (set to receive) e. ADF f. UHF 1 (Aircraft Not Incorporating AFC 597 and Aircraft Incorporating AFC 719). (1) Set function selector switch to T/R + G and mode switch to MAN. g. UHF 1 (Aircraft Incorporating AFC 597 and Aircraft Not Incorporating AFC 719). (1) At the CDNU, press F1 to select UHF 1 Control page. (2) Toggle LSK-2 to select T/R+G.
NOTE
On aircraft with RDSS installed, the MAG TAPE switch controls power to the RDSS. (3) MAG TAPE (4) DATA CONV (supplies power to BARO ALT) (5) RDR SCAN (6) PILOT DIS (7) ARO (8) SS3 MPD (9) TACCO MPD 3. At MDD, perform BITE and set MODE SELECTOR switch to ON LINE. (See NAVAIR 01-75PAC-12-2 for BITE data.) 4. At TACCO Armament Control Panel, set all selector switches to OFF. 5. At Torpedo Preset Panel, set MANUAL STA SELECT switch to AUTO. 6. At HACLC control box: a. Set the POWER-OFF switch to POWER (ON). b. After approximately 20 seconds verify that the GO section of the GO-NO GO indicator is lit green. c. Ensure the CMPTR/MAN switch indicator is set to the CMPTR position. 7. At the IRDS AUX (IR) control, set POWER/OFF switch to POWER (Aircraft Not Incorporating AFC 705). 8. At MMIS TV Monitor, press PWR switch to activate TV Monitor (Aircraft Incorporating AFC 705). 2A-5. FLIGHT STATION. 1. Perform lamp test.
7. At Copilot HSI Control (Aircraft Not Incorporating AFC 603): a. Set COURSE switch to TAC NAV REP (SEL DA). b. Set BRG 2 switch to DA/DF. c. Set HDG switch to INS 2. d. Set ATTD switch to INS 2. 8. At Copilot EFDS Control (Aircraft Incorporating AFC 603):
NOTE
If the radio control page is currently set up, frequencies or preset information may also be entered on the Comm page (F3) by selecting the LSK that corresponds to the UHF radio or by selecting the F1 (UHF 1) or F2 (UHF 2) button. 11. At Flight station, verify that ASCL OTPI control is set to OFF. 12. At Tactical Data Display: a. Set POWER switch to ON. b. Perform BITE and set MODE switch to NORM. (See NAVAIR 01-75PAC-12-1 for BITE data.) 13. At Pilot HSI Control (Aircraft Not Incorporating AFC 603): a. Set COURSE switch to TAC NAV (SEL DA) b. Set BRG 1 switch to DA c. Set HDG switch to INS 1 d. Set ATTD switch to INS 1 14. At Pilot EFDS Control (Aircraft Incorporating AFC 603):
NOTE
COURSE and BEARING selector positions are displayed on either the EHSI or EFDI. a. Set COURSE selector to FMS2.
CAUTION To prevent possible internal component failure, the INERTIAL SYSTEM NO. 1, INERTIAL SYSTEM NO. 2, and 115 vac A RUN circuit breakers on the aft electronic circuit breaker panel shall remain open (pulled) when the inertial navigation system(s) are not being used.
2. Pilot Side Console: a. At INS 1 MSU, set mode switch to STBY (Aircraft Not Incorporating AFC 719).
b. Set BEARING selector to FMS2. c. Set HDG SRC switch to PRI (INS 2). d. Set ATTD SRC switch to PRI (INS 2). 9. At Flight Station Control Console. a. At GPS CDNU, set MODE switch to ON (Aircraft Not Incorporating AFC 719). b. At Pilot CDU, access the power page by pressing the IDX switch (Aircraft Incorporating AFC 719). (1) Press LLS1 line select key (LSK) adjacent to START INIT.
2A-2
Change 12
Figure 2A-1. Technician Readiness Test Procedures (Sheet 2 of 19)
NAVAIR 01-75PAC-12 NOTE

COURSE and BEARING selector positions are displayed on either the EHSI or EFDI. a. Set COURSE selector to FMS2. b. Set BEARING selector to FMS2. c. Set HDG SRC switch to PRI (INS 1). d. Set ATTD SRC switch to PRI (INS 1). 15. At Pilot FDS Control: a. Press STEERING PITCH switch-indicator from OFF to ON (if ON, press OFF then ON). b. Press STEERING ROLL switch-indicator from OFF to ON (if ON, press OFF then ON). c. Press MAN HDG switch-indicator to AMBER. 16. On Pilot Armament Control Panel (Armament Control Box on Aircraft with AFC 604 Incorporated): a. Set POWER switch to ON. b. Set CMPTR-TTY switch-indicator to CMPTR. c. Verify adequate paper supply. d. Verify paper release handle is up. 5. At TTY: a. Set POWER switch to ON. b. Press CONST & EDIT key. 6. At COMM System Selector: a. Set POWER switch to ON. b. Verify that MATRIX FAULT indicators are not on. c. Verify CIPHER DATA switch-indicator on COMM System Selector is green as follows: (1) Set TEST switch-indicator to amber. h. Verify the following indicators are on green, and all others are off: (1) RADIO SILENCE (2) ROLL CALL (3) LONG BC (4) SHORT BC (5) TEST 8. Set NAV Simulator as follows: a. Set POWER/OFF switch to POWER. b. Set HEADING/OFF switch to OFF and control to zero degrees. c. Set ROLL/OFF switch to OFF and control to zero degrees. d. Set TAS KNOTS/OFF switch to OFF and control to 200 knots. e. Set PITCH/OFF switch to OFF and control to zero degrees. 9. At NAVCOM HSI Control (Aircraft not incorporating AFC 603): a. Set COURSE switch to REP PILOT. b. Set BRG 2 switch to DA. c. Set HDG/ATTD switch to INS 1. d. Set HDG switch to TRUE. 10. At NAVCOM EFDS Control (Aircraft Incorporating AFC 603):
WARNING
At no time shall the Flight station MASTER ARM and SRCH PWR switches be turned on during the running of any ARM/ORD SYGNOG tests. a. Set MASTER ARM switch to OFF. b. Set SRCH PWR switch to OFF. c. Set SPL WPN STA SEL switch to OFF (On Aircraft with AFC 604 Not Incorporated).
(2) On UHF 2, set DATA switch-indicator to amber. (3) On HF/UHF, verify that CIPHER DATA switch-indicator is green. If amber, then press to green. (4) Set TEST switch-indicator to off. d. At COMM Interface 1, verify TEST SELECTOR switch is set to position 24 and TEST-OFF-OPR switch to OPR. 7. At Data Link Control Monitor: a. Set POWER FAULT switch-indicator to amber. b. Set TEST switch-indicator to green.
NOTE COURSE and BEARING selector positions are displayed on either the EHSI or EFDI.
a. Set COURSE selector to FMS2. b. Set BEARING selector to FMS2. c. Set HDG SRC switch to PRI (INS 1). 11. UHF 2 Radio Set Control (Aircraft Not Incorporating AFC 597 and Incorporating AFC 719): a. Set function selector switch to T/R + G and mode switch to MAN. 12. UHF 2 Radio Set Control (Aircraft incorporating AFC 597 and Aircraft Not Incorporating AFC 719): a. At CDNU, press F2 to select UHF 2 Control page. b. Toggle LSK-2 to select T/R+G.
NOTE
SONO DISABLED indicator remains on when SONOBUOY SAFETY SWITCH ACCESS DOOR is open. If a fault exists with the safety switch when access door is open, troubleshoot using NAVAIR 01-75PAC-12-6. 2A-6. NAVCOM STATION. 1. Perform lamp test. 2. At HF 1 and HF 2 Radio Set Controls, set COND selector switch to LO. 2A. At HF 1 and HF 2 Radio Set Controls, set function switch to STBY (Aircraft Incorporating AFC 738). 3. At GPS CDNU, set MODE switch to ON (Aircraft Not Incorporating AFC 719). 3A. At NAVCOMM CDU Control, set CDU switch to ON (Aircraft Incorporating AFC 719). 4. At HSP:
NOTE
DTS GO and FAULT indicator must go off when TEST switch-indicator comes on green. c. Set DATA switch-indicator to amber. d. Set CONTROL switch-indicator to amber. e. Set INT SYNC switch-indicator to amber. f. Set DATA FAST switch-indicator to amber (INT NORM also lights amber).
g. Set ERROR DETECT switch-indicator to amber.
NOTE
On aircraft with an A-370 COMM System Selector, the XMIT indicator is amber when COMM System Selector TEST switch-indicator is amber.
Change 12
2A-3

If the radio control page is currently set up, frequencies or preset information may also be entered on the Comm page (F3) by selecting the LSK that corresponds to the UHF radio or by selecting the F1 (UHF 1) or F2 (UHF 2) button. 13. At Rack B3: a. Verify that the COMM Interface 2 MASTER CONTROL and CLOCK SELECT switches are in OPERATE. b. Verify TEST SELECT switch is set to position 24. 14. True Air Speed (TAS), turn on TAS. 2A-7. SENSOR STATION 3. 1. Perform lamp test. The AAI control panel indicator requires an independent press-to-test function. 2. Set VHF-ECM switch to ECM on ICS Crew Control. 3. At both Radar Controls: a. Set PWR-OFF switches to PWR. b. Set ANT-DUMMY LOAD switch-indicators to DUMMY. c. Set FIXED-AGILE FREQ switch-indicators to FIXED. d. Set AFC-MAN switches to AFC. e. Set VIDEO TEST-OFF switches to VIDEO TEST. 4. At Antenna Control, set SCAN switch to FULL. 5. At SDD, perform BITE, then set MODE SELECTOR switch to ON LINE. (See NAVAlR 01-75PAC-12-2 for BITE data.) 6. Set MAD Selector Control Panel MAD AUX switch to POWER. 7. Set MAD Control PWR switch to ON. 8. Set IRDS mode switch to STBY (Aircraft Not Incorporating AFC 705). 9. Set IRDS display PWR switch to ON (Aircraft Not Incorporating AFC 705). 10. At MMIS TV Monitor, press PWR switch to activate TV Monitor (Aircraft Incorporating AFC 705). 11. MMIS power up procedures (Aircraft Incorporating AFC 705): a. Ensure IRDS TURRET Control panel RETRACT/OFF/EXTEND switch is set to OFF and RETRACT indicator is illuminated. b. On Infrared (IR) Set Control: (1) Ensure Mode Control knob is set to TURRET DISABLE. (2) Set POWER/ON/OFF switch to ON. (3) Ensure the green LED is illuminated. 2A-8. SENSOR STATIONS 1 AND 2. 1. Perform lamp test. 2. On ASCL C-I, press POWER switch-indicator to ON. 3. Verify DC POWER indicator is not on. 4. Verify edgelit control panels of ASCL C-I, ASCL Receiver-Indicator. 5. On ASCL C-I, check that the following switch-indicators come on green: a. RCVR COMD b. EQUIP CLEAR c. TEST COMD d. STATUS REQ e. Keyboard 6. Check that all other lamps and LED displays are off. 7. On ASCL C-I, hold LAMP TEST switch to YEL/LED. a. Observe all LED displays indicate 8. b. Check RCVR COMD, CHAN, BUOY TYPE, TEST MODE, EQUIP CLEAR, TEST COMD, CMPTR MODE, and STATUS REQ switch-indicators come on yellow. 8. Hold LAMP TEST switch to GRN/IND. a. Check that COMD ERR, SELF TEST, POWER INTRPT, E TEST, HIGH TEMP, DC POWER, CLEAR COMPL, and BIT SYNC indicators are on. b. Check RCVR COMD, CHAN, BUOY TYPE, TEST MODE, EQUIP CLEAR, TEST COMD, CMPTR MODE, and STATUS REQ switch-indicators are green. c. Release LAMP TEST switch. 9. On ASCL Receiver-Indicator, hold LAMP TEST switch to ON. a. Observe RECEIVER STATUS indications sequence: CMPTR 1 second OFF 1 second OFF 2 second ON b. Release LAMP TEST switch. c. RECEIVER STATUS panel should indicate that all receivers are set to channel 16. d. Repeat steps 3 through 9 for other ASCL. 10. SA and DCU Power On and Verification Procedures. To activate power from the Power Control Panel, perform the following steps: SIG LVL 3 5 0 CHAN 33 55 88 f. S S a. On DCU and SA Power Control Panel, set CIRCUIT BREAKER to DC and AC. b. Set UNIT POWER ON-OFF switches to ON. c. On SASP Power Control Panel at SS-1 Overhead, set ASP Power Control to ON.
CAUTION
The SASP Power Control POWER switch-indicator, when set to ON, applies 3 phase AC power to the power control panels of the SA and DCU, and to the SASP MPD and SASP CMEP. Local power switches on the units do not remove input power from the units. Power to the units can be removed only by pressing the SASP Power Control POWER switch-indicator to OFF.
NOTE
The CABIN EXHAUST FAN switch shall be set to the ON position at the cockpit center instrument overhead panel. If UNIT POWER ON-OFF switch is set to ON, setting the LOCAL-REMOTE switch to LOCAL activates unit power. d. At SS-2 on the General Light Control, press and hold NORMAL-TEST switch to TEST and verify all indicators on SASP Power Control are on and that OVHT indicator is flashing. Release NORMAL-TEST switch. e. Verify indicators on DCU Power Control Panel are as follows: (1) UNIT POWER, PWR ON amber. (2) UNIT POWER, FAULT dark. (3) BATTLE SHORT, dark (press off if necessary). (4) THERMAL ALARM, all dark. (5) Other indicators, not applicable. Verify indicators on DCU Diagnostic Panel are as follows: (1) LOAD on (press to ON if necessary). (2) Other indicators, not applicable. g. On DCU Power Control Panel, press and hold LAMP TEST switch-indicator and verify all indicators on DCU Power Control and Diagnostic Panels are on. h. Verify indicators on SA Power Control Panel are as follows: (1) UNIT POWER, PWR ON amber. (2) UNIT POWER, FAULT dark. (3) BATTLE SHORT, dark (press off if necessary). (4) THERMAL ALARM, all dark. (5) Other indicators, not applicable.
2A-4
Change 12
NAVAIR 01-75PAC-12
i. Verify indicators on SA Diagnostic Panel are as follows: (1) LOAD on (press to ON if necessary). (2) Other indicators, not applicable. j. On SA Power Control Panel, press and hold LAMP TEST switch-indicator and verify all indicators on SA Power Control and Diagnostic Panels are on. c. VIDEO to NORM. d. MODE TEST to LCL. e. BATTLE SHORT to OFF. f. CB1 pushed IN. MPD brightness controls are set low to prevent burning CRT phosphor and to prolong MPD life.
CAUTION
g. POWER to ON. h. CHAN 1 BRT and CONT may be adjusted as required for suitable viewing.
11. On both SASP MPDs, set controls as follows: a. CHANNEL to 1. b. Channel 1 ASPECT RATIO TO 3:4.
NOTE
Adjustment of the H GAIN, V GAIN, H CENTER, V CENTER, and FOCUS potentiometer controls may be required to align CRT presentation.
Figure 2A-1. Technician Readiness Test Procedures (Sheet 4A of 19)
Change 12
2A-4A/(2A-4B blank)
NAVAIR 01-75PAC-12
12. SASP CMEP Initialization. a. Raise SASP CMEP control panel assembly covers and verify that CB1 circuit breaker is closed. b. On SASP CMEP, set ON-OFF switch to ON. Allow a warmup time of 2 minutes. Verify CMEP MAIN SELF TEST switch is not pressed and ACTION VERIFY indicator is off. If ACTION VERIFY indicator is on, press RESET switch. If ACTION VERIFY indicator does not go off after pressing RESET switch, depress LOAD switch on DCU. After depressing LOAD switch on DCU, press RESET switch. If ACTION VERIFY indicator is still on, perform CMEP self test. ELECTRONICS RACKS F1 AND F2. 1. At electronics rack F2 ARM/ORD Test Panel: a. Set POWER switch to ON. b. Press LAMP TEST pushbutton switch. c. Verify that all indicators come on. 2. At SRS Receiver-Computer (located between electronics racks F1 and F2 on top shelf, if installed): a. Set power ON-OFF switch to ON.
1. 2. 3. 4. 5. 6.
(b) S/W version number is displayed for 5 seconds. NOTE

BIT STATUS menu is displayed when errors are detected during BIT. 1 2 3 4 9 0
(c) After 40-50 seconds, MAIN MENU is displayed as follows: NOTE

Down arrow () indicates scroll point using to view remainder of menu.
MAIN MENU SHUTDOWN CONFIGURATION SASP LOAD RDSS BUILTIN TEST DRIVE STATUS UTILITIES
INTERNAL BIT RUN ALL RUN INTERNAL ANEW RUN INTERNAL PDC DRIVE TEST GO TO PREV MENU GO TO MAIN MENU
(9) Select RUN ALL from INTERNAL BIT Menu.
(a)
2A-9.
TEST IN PROGRESS displayed until test completion (approximately 2.5 minutes).
WARNING
Do not look into or try to view with a mirror the inside of the M-O Drive. The Class IIIB Semiconductor Laser emits invisible radiation which can cause serious eye damage.
NOTE
A 3-minute warmup is required to ensure SRS equipment stabilization. In the event of an aircraft power shutdown or an SRS power down for maintenance, the 3-minute warmup should again be observed. b. Set ADDRESS selector to 0. 2A-10. 2A-11. AVIONICS INITIALIZATION. RDSS DISK LOAD PROCEDURES.
(10) Select and observe BIT STATUS from RDSS BUILT-IN TEST Menu. BIT STATUS CPU PASSED INT ANEW PASSED INT PDC PASSED DRIVE 1 PASSED DRIVE 2 NOT FOUND DRIVE 3 NOT FOUND DRIVE 4 NOT FOUND EXT ANEW NOT TESTED EXT PDC NOT TESTED 9 GO TO PREV MENU 0 GO TO MAIN MENU (11) Return to MAIN MENU to initialize system for PFL. 2. PFL for STP Load Procedures a. At RDSS: (1) On MAIN MENU, select CONFIGURATION and Depress ENTER. CONFIGURATION 1 CONFIGURE TC 2 CONFIGURE SASP 3 CONFIGURE IP ADDR 4 TEXT INTENSITY 0 GO TO MAIN MENU (2) On CONFIGURATION menu, select CONFIGURE TC and configure as follows: CONFIGURE TC ADDR DRV FILE BOF 0 1 STP YES 1 XXX XXXXXXXX XXX 2 XXX XXXXXXXX XXX 3 XXX XXXXXXXX XXX b. At central computer MP: (1) Set BOOTSTRAP switch to A. (2) Set AUTO START/START switch to AUTO START. (3) Set LOAD/STOP switch to STOP.
CAUTION
Cleaning of the M--O Disks may be required to prevent damage and/or corruption of disk/data. When operating in extreme environment (dust/sand), very frequent cleaning (every load) may be necessary to avoid problems. M--O Disks may be cleaned using Disk Cleaning Kit P/N MOA--D51, available through GSA. (4) Clean M0 Disks as necessary per instructions provided with cleaning kit.
CAUTION
Interruption of power to the RDSS caused by resetting the RDSS power switch, RDSS circuit breaker or PWR DIST circuit breaker with an M-O disk mounted will corrupt the disk. Additionally, the M-O Disk may be corrupted by an extended power transient caused by aircraft power source switching. If RDSS is powered down for any reason with M-O disk mounted, depress and hold eject switch (see Figure 9C-10 and 9C-11) while applying power. This will cause the M-O disk to eject upon RDSS power up. 1. RDSS Power-up BIT a. At TACCO Power Control, ensure MAG TAPES switch is
NOTE
The disk must have some free space for the RDSS to write test files during BIT. The test files will not overwrite existing data and will be removed after BIT is complete. (5) Insert appropriate write enabled configuration controlled application software disk into M-O drive. (6) Verify drive ready LED is illuminated steady green (takes approximately 15 seconds to mount M-O media). (7) Select RDSS BUILT-IN TEST from MAIN MENU. RDSS BUILTIN TEST 1 PANEL BIT 2 INTERNAL BIT 3 EXTERNAL BIT 4 BIT STATUS 0 GO TO MAIN MENU (8) Select INTERNAL BIT from RDSS BUILT-IN TEST Menu.
set to the on (up) position.
b. At RDSS: (1) Set power switch-circuit breaker to ON. (2) Verify POWER ON indicator is illuminated and OVERTEMP indicator is extinguished. (3) Observe operator display for proper sequencing of power-up automatic BIT:
(a) (-) is displayed in upper left corner of RDSS display for 40 seconds.
Change 13
2A-5
NAVAIR 01-75PAC-12
(4) Set LOAD/STOP switch to STOP. (3) If memory has been purged and reformatted depress NUM 4. (4) Observe the following: STOP FAILED T A SK NOT R U NN I N G AIRCRAFT CONFIGURATION MENU EQUIPMENT STATUS 0+1 IRDS XXXXXXX 0+2 SRS YYYYYYY 0+3 RADAR ZZZZZZZ NUM 7 NUM 8 Where : I N IT I ALI Z I N G MEM ORY TERMINATE ACCEPT CONFIGURATION 2A-12. S S If operator is going to load and run STP from M--O Disk, go to para. 2A-13. If operator is going to transfer STP from M--O Disk to Secondary Memory go to para. 2A-14.
CP-2044 COMPUTER STP LOAD FROM SECONDARY MEMORY. 1. At CP-2044 Computer Maintenance Panel: a. If the CP-2044 computer is not powered on, momentarily push the POWER switch to ON. b. Set POWER-UP BIT I/O switch to I/O. c. Set POWER-UP BIT MEM switch to MEM. d. Set POWER-UP BIT PROCESSOR switch to PROCESSOR. e. Set BOOTSTRAP switch to B. f. Set AUTO START/START switch to AUTO START.
(5) Set MA CLR switch to MA CLR.
XXXXXXXX = EO-IR or IRDS YYYYYYY = ARS 5 or NONE ZZZZZZZ = APS 115 or APS 137
followed by: V ERI F Y I NG MA G NET I C TA P E AT T EMP T S #X X X Where : followed by: P R EF L IGH T L OA D E R LO A DIN G F RO M M AG N ETI C T AP E AT T EMP T S #X X X Where : followed by: P R EF L IGH T L OA D E R LO A DED F R OM M AG N ETI C T AP E
(5) Select appropriate entries for aircraft configuration. (6) When complete select NUM 8 to accept configuration. (7) Observe TAPE OPERATION IN PROGRESS message followed by:
g. Momentarily push the STOP switch down and observe the following: ALL PROCESSORS STOPPED
XXX = Number of verification attempts.
TAPE TYPE STP XXXXXXXXXX YY YY YY ZZ ZZ NUM 6 ADVANCE NUM 7 TERMINATE Where :
h. Momentarily push the MA CLR switch down. i. Observe at the CP-2044 Maintenance Panel that the BIT Light lights red for approximately 4 seconds and then goes out.
XXXXXXXXXX= Program version number YY YY YY= Program date ZZ ZZ= Program time
XXX = Number of verification attempts.
(8) Depress NUM 6 to advance program to verify and check the Central Computers EEPROMs. (9) Observe the following: EEPROM OPERATION IN PROGRESS (10) Then observe:
2. Observe the following at the CP-2044 Maintenance Panel:
NOTE
If Secondary Memory is not available or does not contain BIT, the control firmware defaults to loading BIT from M-O Disk. The word SECONDARY will then read TAPE. If STP M-O Disk is not loaded in RDSS and the RDSS is not setup correctly, the ATTEMPT count will increment until the proper conditions are met. L O AD I NG F R OM TO A T TE M PT followed by: L O AD I NG F R OM TO A T TE M PT B IT T I M E > X X X > MAST E R > GPC 1 > 000 B IT T I M E > X X X > SECO N DARY > GPC 0 > 000
c. At either the TACCO MDD or SS 3 SDD: (1) After approximately 1 minute, observe the following: P U R GE NUM 4 NUM 6 NUM 7 S E CO N D ARY M E M ORY NO YES T E R M IN A T E S
STP XXXXXXX PROGRAM 0+1 SECONDARY MEMORY 0+2 EXECUTE FROM TAPE NUM 7 TERMINATE
Where :
XXXXXXX= Program version number NOTE
(2) If memory has not been purged and reformatted depress NUM 6 to perform the purge and reformat procedure.
If operator is going to load and run STP from Secondary Memory, go to para. 2A-12.
2A-6
Change 7
NAVAIR 01-75PAC-12
followed by: L O AD I NG F R OM TO A T TE M PT followed by: R U N N I N G B IT 0 >Y Y YY 2 >Y Y YY T IM E > X X X 1 > YYYY B IT T I M E > X X X > MAST E R > GPC 2 > 000 SYSTEM TEST V ERS I O N LOA D E R W I T H A x xxG x x x Where: PROGRAM Sxxx Vxxx MxxxSxxx e. Set BOOTSTRAP switch to A. f. Set AUTO START/START switch to AUTO START.
g. Momentarily push the STOP switch down and observe the following:
Sxxx = STP version number Vxxx = Preflight Loader version number Axxx = AGP version number Gxxx = GPC version number Mxxx = MIM version number Sxxx = SDC version number
i.
S TOP F A IL E D T AS K NO T R UN N I N G
followed by: 3. After approximately 4 minutes BIT completes and displays the number of hard and soft errors. BIT C O MP L ETED S O FT ERRORS H A RD ERRORS followed by: T IM E > X X X > X X X > X X X Where :
h. Momentarily push the MA CLR switch down. Observe at the CP-2044 Maintenance Panel that the BIT Light lights red for approximately 4 seconds and then goes out.
SYSTEM TEST PROG RAM VE R SIO N X XX X X X X X
NOTE NOTE
If Secondary Memory is not available or does not contain BIT, the control firmware defaults to loading BIT from M-O Disk. The word SECONDARY will then read TAPE. If STP M-O Disk is not loaded in RDSS and the RDSS is not setup correctly, the ATTEMPT count will increment until the proper conditions are met. LOADING FROM TO ATTEMPT followed by: LOADING FROM TO ATTEMPT followed by: LOADING FROM TO ATTEMPT followed by: R U N N IN G BI T 0>YYYY 2>YYYY TIME > X X X 1>YYY Y BI T T IM E > > M A ST E R > G P C 2 > 0 0 0 XXX BI T T IM E > > M A ST E R > G P C 1 > 0 0 0 XXX BI T T IM E > X X X > S E CO N D A RY > G P C 0 > 0 0 0
XXXXXXXX = Program version number
I N IT I ALI Z I N G
MEM ORY
After approximately 10 seconds, the STP and operator will perform the following procedures: S S S S S S STP checks BIT tests results for errors and verifies CP-2044 Hardware configuration (refer to para 2A-15). STP checks for I/O Bombardment on the peripheral devices (refer to para 2A-16). Operator performs Control Key Check (refer to para 2A-17). Operator enters date and time into the system (refer to para 2A-18). STP performs EEPROM Version and Checksum Tests (refer to para 2A-19). Operator confirms or changes aircraft equipment configuration. (refer to para 2A-20). STP displays the Main Selection Tableau (refer to para 2A-21).
followed by: STP R E SID E N T P R O G R A M L O ADI N G FR O M S EC O NDA R Y ME M O R Y A T TEM P T #0 0 0
followed by: STP R E SID E N T P R O G R A M L O ADE D F RO M S EC O NDA R Y ME M O R Y
followed by: S STP TRANSIENT PR O GRA M L OA D I N G F R O M S ECO N D A RY M E M O R Y A P P R OX TIM E 3 0 S E C O N D S followed by: SYSTEM TEST PROGRAM I N ITI A L I ZI N G A P P R OX TIM E 1 5 S E C O N D S followed by: 2A-13.
CP-2044 COMPUTER STP LOAD FROM M-O DISK. 1. At CP-2044 Computer Maintenance Panel: a. If the CP-2044 computer is not powered on, momentarily push the POWER switch to ON. b. Set POWER-UP BIT I/O switch to I/O. c. Set POWER-UP BIT MEM switch to MEM. d. Set POWER-UP BIT PROCESSOR switch to PROCESSOR.
Change 7
2A-7
NAVAIR 01-75PAC-12
3. After approximately 4 minutes BIT completes and displays the number of hard and soft errors. b. Depress NUM 4 if the purging and reformatting of Secondary Memory is not required. If the operator requires that the secondary memory be purged and reformatted, then depress NUM 6. The depressing of NUM 6 will destroy everything that resides in secondary memory. c. Observe: E E P RO M N E E DE D R E LO A D ON XXX X
BIT TIME > X X X COMPLETED S O F T E R ROR S > XX X H A R D E R ROR S > XX X followed by:
T O PE R F O RM R ELOAD D E P RE S S ADV A NCE T O SK IP D E P RE S S REL O AD EXIT
A I R CR A F T
C O N F IG U R A T IO N STATUS XXXXX X X YYYYY Y Y ZZZZZ Z Z
MENU
NUM 1 NUM 6 NUM 7
E X IT A D VAN C E T E R M IN A T E
I N I T I ALI Z I N G M E M OR Y
EQU 0+1 0+2 0+3
IP M E N T IRDS SRS RADAR
Where:
followed by: P R E F LIG H T L O ADI N G M A G NET I C A T TEM P T followed by: P R E F LIG H T L O A D E R L O ADE D F R O M M A G NET I C T A P E followed by: LOADER FROM TAPE #000
NUM 7 NUM 8
T E R M IN A T E A C C E P T C O N F IG U R A T I O N GPC 0 GPC 1 GPC 2
XXXX = One of the following module callouts:

AGP 1 AGP 2 SDC 1 SDC 2 SDC 3 MIM
Where :
XXXXXX = EO-IR or IRDS YYYYYYY = ARS 5 or NONE ZZZZZZZ = APS 115 or APS 137
NOTE
The message above will be displayed for each EEPROM mismatch. h. Depress NUM 1.
d. Make the appropriate equipment modifications to the AIRCRAFT CONFIGURATION MENU to match the actual equipment installed in the aircraft. When complete, depress NUM 8. e. Observe TAPE OPERATION IN PROGRESS message followed by:
NOTE
S This response is needed for each iteration of the message presented in paragraph 6g, above. If the EEPROMs are to be updated, refer to NAVAIR 01-75PAC-12-10 for proper procedures and additional information. i. Observe:
P R E F LIG H T L O A D E R V E R SIO N X X X X X X X X Where: XXXXXXXX = Preflight Loader version number

4. At either the TACCO MDD or SS-3 SDD: a. Observe: f.
TAPE TYPE STP X X XXXXXX Y Y YY Y Y Z Z ZZ NUM 6 ADVANCE N U M 7 T E R M IN A T E
Where : XXXXXXXX = Program version number YY YY YY = Program date ZZ ZZ = Program time

Depress NUM 6. g. If the EEPROM versions in the CP-2044 do not match the EEPROM versions on the tape, the following will be displayed:
STP 0+1 0+2
XX X X X XX X PROG RAM SECONDARY MEMORY EXECUTE FROM TAPE YYYYYYYYYYYYYYYY
P U R G E S E C ON D A R Y MEMORY NUM NUM NUM 4 6 7 NO YES T E R M IN A T E
NUM
T E R M IN A T E
Where:
XXXXXXXX = Program version number YYYYYYYYYYYYYYYY = Verification Line
2A-8
Change 7
NAVAIR 01-75PAC-12
j. Depress 0+2, EOM.
Where: XXXXXXXX = Program version number NOTE
g. Momentarily push the STOP switch down and observe the following:
S T P R E SID E N T P R O G R A M L O ADI N G F R O M M A GNE T I C T A P E A P P R O X TI M E 2 M I N U T E S followed by: STP TRANSIENT P R OGR A M L O A D I NG F R O M MA G N E T I C T A P E A P P R O X TI M E 4 0 S E C O N D S followed by:
After approximately 10 seconds, the STP and operator will perform the following procedures: S S S S S S S STP checks BIT tests results for errors and verifies CP-2044 Hardware configuration (refer to para 2A-15). STP checks for I/O Bombardment on the peripheral devices (refer to para 2A-16). Operator performs Control Key Check (refer to para 2A-17). Operator enters date and time into the system (refer to para 2A-18). STP performs EEPROM Version and Checksum Tests (refer to para 2A-19). Operator confirms or changes aircraft equipment configuration (refer to para 2A-20). STP displays the Main Selection Tableau (refer to para 2A-21).
S TOP F A I L E D T A S K NO T R U N N I N G
h. Momentarily push the MA CLR switch down. i. Observe the following at the CP-2044 Maintenance Panel:
I N I T I ALI Z I N G M E M OR Y
followed by: P R E F LIG H T L O ADI N G M A G NET I C A T TEM P T followed by: P R E F LIG H T L O A D E R L O ADI N G F R O M M A G NET I C T A P E LOADER FROM TAPE #000
SYSTEM TEST PRO GRA M I NIT I A L I Z I N G A P P R O X TI M E 1 5 S E C O N D S followed by: S Y S T E M TE S T P R O G R A M V E RSI O N S x x x L OAD E R V x x x W I T H A x xxG x x x M x x x S x x x Where: Sxxx = STP version number Vxxx = Preflight Loader version number Axxx = AGP version number Gxxx = GPC version number Mxxx = MIM version number Sxxx = SDC version number
2A-14.
CP-2044 COMPUTER SYSTEM TEST PROGRAM TRANSFER FROM M-O DISK TO SECONDARY MEMORY. 1. At CP-2044 Computer Maintenance Panel: a. If the CP-2044 computer is not powered on, momentarily push the POWER switch to ON. b. Set POWER-UP BIT I/O switch to OFF. c. Set POWER-UP BIT MEM switch to OFF. d. Set POWER-UP BIT PROCESSOR switch to OFF. e. Set BOOTSTRAP switch to A. f. Set AUTO START/START switch to AUTO START.
2. At either the TACCO MDD or SS-3 SDD: a. Observe: P U R GE NUM 4 NUM 6 NUM 7 S E CO N D ARY M E M ORY NO YES T E R M IN A T E
followed by:
SYSTEM TEST PROG RAM V E R S ION XXXXXXXX
Change 7
2A-9
NAVAIR 01-75PAC-12
b. Depress NUM 4. c. Observe: A I R CR A F T EQU 0+1 0+2 0+3 IP M E N T IRDS SRS RADAR C O N F IG U R A T IO N S T A TUS XXXXXX X YYYYYY Y ZZZZZZ Z S S S S MEN U
Where:
XXX X = one of the following module callouts: AGP 1 AGP 2 SDC 1 NOTE SDC 2 SDC 3 MIM
j.
Depress 0+1, EOM and observe the following message:
GPC 0 GPC 1 GPC 2
TAPE
OPERATION IN PROGRESS
k. After approximately 3 minutes, observe the following message:
NUM 7 NUM 8
T E R M IN A T E A C C E P T C O N F IG U R A T IO N
The message above will be displayed for each EEPROM mismatch. NUM 1 (EXIT) exits to next step. NUM 6 (ADVANCE) advances to EEPROM reprogramming procedures (refer to NAVAIR 01-75PAC-12-10). NUM 7 (TERMINATE) terminates preflight loader program. h. Depress NUM 1.
Where: XXXXXXX = EO-IR or IRDS YYYYYYY = ARS 5 or NONE ZZZZZZZ = APS 115 or APS 137
d. Make the appropriate equipment modifications to the AIRCRAFT CONFIGURATION MENU to match the actual equipment installed in the aircraft. When complete, depress NUM 8. e. Observe TAPE OPERATION IN PROGRESS message followed by: TAPE TYPE STP X X XXXXXX Y Y YY Y Y Z Z ZZ NUM 6 ADVANCE N U M 7 T E R M IN A T E
T O P RO C E S S A N OTHE R A T D MT U I NS T A LL N EXT S E L E CT T A PE U N IT 0+1 0+2 NUM 7 TAPE TAPE U N IT 1 U N IT 2
TAPE
TERMINATE
NOTE
S S This response is needed for each iteration of the message presented in paragraph 2g, above. If the EEPROMs are to be updated, refer NAVAIR 01-75PAC-12-10 for proper procedures and additional information. i. Observe: to
l.
Depress NUM 7.
m. Observe the following message:
PRE
FL I G H T T A PE L O AD E R TERMINATED
Where: XXXXXXXX = Program version number YY YY YY = Program date ZZ ZZ = Program time

f. Depress NUM 6. The following message is displayed:
n. Observe the following message is displayed on the CP-2044 MP:
STP 0+1 0+2
XX X X X XX X PROG RAM SECONDARY MEMORY EXECUTE FROM TAPE YYYYYYYYYYYYYYYY
PRE
FLIGHT TAPE LOADER TERMINATED
E E P R OM
O P ER A T I ON IN PR O G R E S S NUM 7
TERMINATE
g. If the EEPROM versions in the CP-2044 do not match the EEPROM versions on the tape, the following will be displayed:
Where: XXXX = Program version number YYYY = Verification line
3. Go to paragraph 2A-12 to complete Pre-flight using STP from Secondary Memory procedures.
E E P RO M N E E DE D
R E LO A D ON XXX X
T O PE R F O RM R ELOAD D E P RE S S ADV A NCE T O SK IP D E P RE S S NUM 1 NUM 6 NUM 7 REL O AD EXIT
E X IT A D VAN C E T E RMI N ATE
2A-10
Change 7
NAVAIR 01-75PAC-12
2A-15. BIT AND CP-2044 HARDWARE CONFIGURATION TEST RESULTS. 1. After the STP is loaded the CP-2044 BIT Test results are printed for each module that fails BIT testing. If there are no BIT failures or configuration difference, the program automatically performs I/O BOMBARDMENT Check (refer to para 2A-15). The following is an example of the data that is printed when SDC1 fails BIT testing: BIT ERRORS MODULE TEST NUMBER TEST STEP SUBTEST STEP REPORTING GPC AMPLIFYING ERROR : SDC1 : 6 : 117 : 8 : 3 DATA = 2. For further explanation and additional information on I/O Bombardment Check, refer to NAVAIR 01-75PAC-12-10. 3. After numeric 1 is pressed, the cue for the selected station is updated to DEPRESS NUMERIC 2, DEPRESS NUMERIC 3, and so forth, until EOM is pressed. 4. After EOM is pressed, the HSP prints: CONTROL KEY CHECK COMPLETE AT XXXXXX Where:
NOTE
S Excessive I/O activity is usually the result of a hardware problem in the interface circuits between the CP-2044 and TTY. The I/O activity check is performed upon STP program load. In addition, if the TTY had been previously disabled, this routine will be performed under the following conditions: a. Upon termination of Automatic SYGNOG.
XXXXXXX = TACCO
NAVCOMM TTY SS-3
XXXXXXXX XXXXXXXX XXXXXXXX
b. Upon termination of Simultaneous SYGNOG. c. Upon termination or completion of any Utilities Test. d. Upon termination or completion of any Special Test. S When I/O Bombardment is detected it indicates that unexpected I/O activity has been detected on the TTY. 2A-17. CONTROL KEY CHECK. 2A-18.
5. Upon successful completion of the Control Key Check, the program automatically goes to the Date/Time Entry (refer to para 2A-17). For further explanation and additional information on Control Key Check, refer to NAVAIR 01-75PAC-12-10. DATE/TIME ENTRY. 1. Upon completion of the Control Key Check the program displays the following Date/Time Tableau on the TACCO MDD, SS-3 SDD, and both AROs: ENTER DATE AND TIME MM/DD/YYYY HH:MM WHEN COMPLETED DEPRESS EOM Enter the date in the format month, day, hour, and minute followed by EOM. An example is 01/01/2000 08:05. Depression of CANCEL or SKIP at the SS-3 Tray will delete the last entry on the line. If an illegal value is entered and EOM is depressed an error message is displayed. Depression of NUM-6 while the error message is displayed will redisplay the Date/Time Tableau.
2. Following the printing of BIT errors a comparison is made of all CP-2044 slots with a default slot configuration. Any slot that differs from the default data is printed on the HSP identifying the slot and its default and current status. Slots not identified in the printout conform to the default status. The following is an example of a printout that contains discrepancies in four slots: SLOT DIFFERENCES SLOT C13 A1 B31 B28 MODULE AGP1 NAV/MUX GPC2 GPC5 OLD STATUS PASS PASS PASS EMPTY NEW STATUS EMPTY FAIL FAIL PASS
NOTE
Twelve keys are required at the TACCO Keyboard, NAVCOM Keyset, TTY, or SS-3 Tray to perform the Control Key Check. In case of a stuck key, the check may be run at an alternate station. 1. After the STP is loaded, operators are cued on the TACCO MDD, SS-3 SDD, and both AROs.
3. Slot comparison is performed because BIT, in some cases, can not determine if a module is missing or failing. In this instance, BIT reports a status of EMPTY but the slot comparison identifies the expected default status of PASS. 4. For further explanation and additional information on BIT testing, refer to NAVAIR 01-75PAC-12-10. 2A-16. I/O BOMBARDMENT CHECK. 1. To detect hardware problems which could cause program slow down, an I/O Bombardment Check is made on the TTY by the STP. If there are no I/O Bombardment errors the program automatically goes to Control Key Check (refer to para 2A-16). If TTY exceeds its expected activity level it will be disabled. The disabling of the TTY shall result in the display of the following I/O Bombardment Error Message:
F L E E T IS S U E S Y S T EM T E ST
YYYYYYYY STARTED
D E P R ES S T A C C O N U M E R IC 1 OR N A V C O M M N U M E R IC 1 OR T T Y N U M E R IC 1 OR S S 3 N U M E R IC 1 Where:
NOTE
S S The / and : symbols are not displayed on the TACCO MDD or SS-3 SDD. Date/Time entries are used for display on tableaus and to time tag test results that are stored in secondary memory. On subsequent STP loads, tests that have been run within 24 hours do not have to be executed.
YYYYYYYY = Program version number
2. Sequentially press numerics 1 through 0, CANCEL (SKIP for SS-3), and EOM at a control station.
TTY
HS P
DISABLED 6
T O A DV A N C E D E P RE S S NU M
Change 7
2A-11
NAVAIR 01-75PAC-12
2. Upon successful completion of the Date/Time Entry, the program automatically goes to the EEPROM Verification And Checksum Checks (refer to para 2A-18). For further explanation and additional information on Date/Time Entry, refer to NAVAIR 01-75PAC-12-10. 2A-19. EEPROM VERIFICATION AND CHECKSUM CHECKS. 1. Following Date/Time Entry the program checks the fourteen EEPROMs for correct version numbers and performs a checksum on each EEPROM. The version numbers and checksum results of each EEPROM is then compared with the current STP program. While the program is performing this check, the following message is displayed on the TACCO MDD, SS-3 SDD, and both AROs: A I R CR A F T C ONFIG M E N U 2A-21. SYSTEM TEST MAIN SELECT TABLEAU.
E Q U IP M E N T STAT U S 0+0 OPTICS XXXX X X X 0+1 RADAR YYYY Y Y Y 0+2 RESERVED Z Z Z ZZ Z Z Z ZZ ZZZZZZZ Z NUM 6 NUM 7 NUM 8 ADVANCE T E RM INATE A C CE PT CONF I G
MAIN SELECT SELECT MODE 0+0 AUTOMATIC 0+1 SIMULTANEOUS 0+2 SPECIAL TEST 0+3 UTILITIES 0+4 DIAGNOSTICS XXXXXXXXXXXXXXXXXXX 7 TERMINATE 9 PRINT SCREEN Where:
Where: CHECKING E E P R O M V E R S IO N AND CHECKSUM S
XXXXXXX = EO-IR or IRDS YYYYYYY = APS-115 or APS-137 ZZZZZZZZZZZZZZZZZZ = Verification Line
XXXXX...XXXX = Verification line
2. If there is no error the program then proceeds to Aircraft Equipment Configuration (refer to para 2A-19). If there is a mismatch of any version number or checksum comparison, the following message is displayed on the TACCO MDD, SS 3 SDD, and both AROs:
2. Upon operator selection of a specific equipment name from the aircraft configuration list, the equipment name is displayed on the verification line with the alternate equipment option. Depressing EOM changes the equipment name to the alternate option. The following list contains the equipment name with the possible options for each piece of equipment: Optics a. EO-IR b. IRDS Radar a. APS-115 b. APS-137 2A-22.
When configuration processing is completed, the System Test Main Select Tableau is printed and displayed on the TACCO MDD, SS-3 SDD and both AROs. The operator can then select a specific test mode at the TACCO Keyboard, NAVCOM Keyset, TTY, or SS-3 Tray. Depressing NUM 7 terminates the STP, the displays go blank, the HSP prints STP TERMINATED, the maintenance panel displays SYSTEM TEST PROGRAM TERMINATED and the program stops. If the Tape Load STP is being executed the tapes are rewound to BOT. Depressing NUM 9 prints the displayed tableau. SS-1 AND SS-2 SASP STP.
EEPROM XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX M O U N T A N D L O A D T A P E C O N T A IN IN G S T P A N D F O L L O W E E P R O M D O W N L O A D I N S T R U C T IO N S 6 7 ADVANCE T E R M IN A T E Where: EEPROM
3. Depressing NUM 8 and EOM accepts the options currently displayed for each piece of equipment. The executive saves the options in secondary memory, prints the current aircraft configuration which will be used throughout STP testing, and exits aircraft configuration processing. The following is the printout of the default aircraft configuration:
NOTE
The selection of running the SS-1/2 SASP STP in the Coordinated Mode can be done in either Automatic or Simultaneous SYGNOG modes. 1. Select Automatic SYGNOG at a SASP controlling station (TACCO, NAVCOM, or SS-3) and then select SS-1 2 SASP option from the Automatic SYGNOG Select/Status Tableau by depressing the displayed keys and then EOM. 2. If the SASP STP has been previously loaded and SS-1/2 STP testing is in progress, the following message is displayed at the SASP controlling station along with operator key options:
XXXXXXXXX.............XXXXXXXXX =
F L E ET I S SU E XXXXX X X X X C O N FI G U R AT ION LIS T O M E GA L T N -211 R A D AR Y Y YY YYY SRS NONE Where:
VERSION NUMBER OF EEPROM DIFFERS FROM STP or CHECKSUM FAILURE Depress NUM 6 to bypass download of EEPROMs and advance to the rest of the STP program. Depress NUM 7 to terminate STP in order to download EEPROM programs. Refer to NAVAIR 01-75PAC-12-10 for EEPROM download instructions. 2A-20. AIRCRAFT EQUIPMENT CONFIGURATION PROCESSING. 1. Upon completion of the EEPROM validation, the program displays the Configuration List Tableau on the TACCO MDD, SS-3 SDD, and both AROs with either the stored aircraft or default configuration. The following is an example of the default Configuration List Tableau.
XXXXXXXX = Program version number YYYYYYY = APS-115 or APS-137
4. For further explanation and additional information on Configuration Processing, refer to NAVAIR 01-75PAC-12-10.
SASP STP M1 NUM 2
IN PROGR E SS
RESTART C O NT INUE
Figure 2A-1. Technician Readiness Test Procedures (Sheet 12 of 19) 2A-12 Change 7

RESTART reinitiates SASP STP loading and all previous SASP STP results are lost at the SS-1/2 stations. CONTINUE enables the coordinated mode and establishes the CP-2044 STP in the SASP STP monitor mode. 3. If the SASP STP has not been previously loaded, the following tableau is displayed at the SASP controlling station: d. After depressing NUM 6 the following messages are displayed on the TACCO MDD and SS-3 SDD as the diagnostic is being loaded: ENSURE THE FOLLOWING D M T S O N LI N E IO SELECTED TO SS 1 DMTU SELECTED DMTU ADDRESS TO O ASP STP TAPE INSTALLED TO SC DIAGNOSTIC I MPL BEING LOADED k. After depressing NUM 6 the following messages are displayed in sequence on the TACCO MDD and SS-3 SDD as the SASP STP is being loaded: BEING LOADED STP followed by: followed by: SC DIAGNOSTIC BEING LOADED STP LOAD I PL BEING LOADED LOAD I MPL BEING LOADED ADVANCE DEPRESS NUM 6 ENSURE THE FOLLOWING DMTS ONLINE IO SELECTED TO SS 1 DMTU SELECTED DMTU ADDRESS TO 0 ASP STP TAPE INSTALLED TO ADVANCE DEPRESS NUM 6 i. After successful completion of SC diagnostics, the status on the TACCO MDD and SS-3 SDD SIMULTANEOUS SYGNOG STATUS TABLEAU is set to C if displayed. The following DMTU/RDSS set up instructions are displayed at the controlling station:
AND
AT
BOT
j.
SASP
LOAD
SELECT
DEPRESS 0+0 SC TEST 0+1 SC AND DF 0+2 SASP LOAD XXXXXXXXXXXXXXX Where:
AND
AT
BOT
TESTS
XXXX...XXXX = Verification line NOTE
followed by:
In the SASP equipped aircraft configuration, primary preflight of the SASP system is the SASP/CP-2044 coordinated mode. Once the coordinated mode has been successfully established, the operator will have the choice of three SASP test options: SC TEST, SC AND DF TESTS, and SASP LOAD. In order to expedite preflight, the operator should select the SC AND DF TEST option. For options other than SC AND DF TESTS, refer to NAVAIR 01-75PAC-12-10. 4. The CP-2044 STP shall automatically perform an ANEW Interface Test on the CP-2044/SC channel upon the selection of any SASP load option. If a fault is detected during this test, error messages and the available operator options will be displayed. 5. SC AND DF OPTION a. Select SC and DF Tests option. b. The following message is displayed on the verification line of the SASP Load Tableau at the SASP control station:
SC
DIAGNOSTIC I PL
e. In case of an error during the SC load, the operator options are displayed on the TACCO MDD and SS-3 SDD. f. After a successful SC load, the SC diagnostic test is initiated, and the following message is displayed in the controlling station AUTOMATIC SYGNOG Task Tableau:
followed by:
STP
LOAD I N
PROGRESS
SC SC AND DF TESTS
DIAGNOSTIC
IN
PROGRESS
l.
Upon successful load of SASP STP, the DF diagnostic load is initiated.
c. Upon depression of the EOM key the DMTU set up instructions are displayed at the controlling station:
g. The status on the TACCO MDD and SS-3 SDD Simultaneous SYGNOG Status Tableau is set to S if displayed. h. In case a diagnostic error occurs during the SC test, depending on the error, the operator options are displayed on the TACCO MDD and SS-3 SDD.
m. Upon successful load of the DF diagnostic, the CP-2044 initiates the DF test and updates the TACCO MDD and SS-3 SDD SIMULTANEOUS SYGNOG STATUS TABLEAU test status to S if it is displayed. The following message is also printed on the HSP if available:
Figure 2A-1. Technician Readiness Test Procedures (Sheet 13 of 19) Change 7 2A-13
NAVAIR 01-75PAC-12
DF TEST TAPE SEARCH DMTU 0 FOR DF TEST ON o. If an error is detected during the DF diagnostic testing, an alert is displayed on the TACCO MDD, SS-3 SDD and both AROs in Automatic SYGNOG using the Coordinated Mode. If the Coordinated Mode was selected in Simultaneous SYGNOG the Alert is displayed only on both AROs. In both Automatic or Simultaneous SYGNOG Coordinated Mode the error message is printed on the HSP. p. The CP-2044 STP automatically initiates the DF OPS load sequence upon successful execution and completion of SC and DF diagnostics. The SIMULTANEOUS SYGNOG STATUS TABLEAU, if displayed, and the SASP Status Tableau for both SC & DF diagnostics are updated to C. q. If a function is unavailable or an error occurs, a SASP Alert message is displayed at the SASP CP-2044 controlling station so that the operator can take corrective action. r. At the completion of DF OPS load, COORDINATED is displayed on both AROs Simultaneous SYGNOG Task Tableau if the system is being operated in the Simultaneous SYGNOG Mode. 2A-23.
NOTE
S If the DF test status at TACCO MDD indicates an error upon entering SS1/2 SIMUL SYGNOG and an error message is printed on the HSP, error options are displayed at the control station to further evaluate the error. Upon successful execution and completion of the SC AND DF TESTS, the operator may select SS 1+2 LOAD or the SC TEST. The SC TEST and SS 1 + 2 LOAD selections are available as operator options. If the SC AND DF TESTS have completed successfully, the SC TEST and SS 1 + 2 LOAD options do not have to be executed for the successful completion of SASP Preflight as they have already been run and executed as part of the SC and DF Tests.
APPROXIMATELY 10 TO TEST A TEST PATTERN DISPLAYED. NO RESPON MINS DF TEST WILL AS CORRECT AND CONTINUE IF IF PATTERN DEPRESS PATTERN DEPRESS CORRECT PASS ON
12 MINS INTO WILL BE SE WITHIN 2 SUME
CMEP
INCORRECT FAIL ON CMEP
NOTE
While the SS 1/2 DF Diagnostic Test is in progress, the operator may initiate and execute either AUTOMATIC or SIMULTANEOUS SYGNOG tests. n. Approximately 10 to 12 minutes into the DF test, a test pattern is displayed on the SS-1 and SS-2 MPDs (see Diagram 1). Verify the test pattern is correct or incorrect by depressing one of the pass/fail criteria switches on the appropriate CMEP.
AUTOMATIC SYGNOG SELECT/STATUS TABLEAU AND KEY OPTIONS.
NOTE
During running of Automatic SYGNOG, MAG TAPE fails due to SASP STP M-O Disk being in the RDSS. In order to obtain a complete status for MAG TAPE, it is necessary to verify DF diagnostic and DF OP load have completed; then load M-O Disk in the RDSS and follow MAG TAPE instructions. 1. When the Main Select Tableau is displayed, depressing 0+0 and EOM on the TACCO Tray, NAV/COM Keyset, TTY, or SS-3 Tray selects Automatic SYGNOG. 2. After selection of Automatic SYGNOG, the AROs display the Automatic SYGNOG Task Tableau. The SS-3 SDD and TACCO MDD display the Automatic SYGNOG Select/Status Tableau. The ARO selections are limited to 9 entries per table. The SS-3 SDD and TACCO MDD display all available selection/status entries. Both Automatic SYGNOG Selection tableaus are configuration dependent. The following lists the order of each line entry and its equipment dependency.
NOTE
If the test pattern is not verified within 2 minutes at each sensor station, diagnostic testing continues as if the test passed. Each neglected verification shall increase the run time accordingly.
s. If Automatic SYGNOG testing is completed prior to the completion of SS 1/2 station testing, terminate Automatic SYGNOG and select Simultaneous SYGNOG from the MAIN SELECTION Tableau. t. To reenter the COORDINATED Mode in Simultaneous SYGNOG, select SS 1/2 SASP TESTING at a SASP control station.
u. If SASP STP is already loaded when SS 1/2 SIMUL is selected, the following tableau is displayed:
SASP STP M1 NUM 2
T E S T IN G I N
PROGRESS
RESTART C O NT INUE
NOTE
S S RESTART reinitiates SASP STP loading and all previous SASP STP results are lost at the SS-1/2 stations. CONTINUE enables the coordinated mode and establishes the CP-2044 STP in the SASP STP monitor mode. v. Depress NUM 2 which coordinates the SASP and CP-2044 and updates the Simultaneous SYGNOG Status Tableau. Verify DF is S or C on TACCO or SS-3 Simultaneous SYGNOG Status Tableau.
Listed Line Entries HSP TAC NAV ARO MAG TAPE HACLCS
Equipment Dependency None None None None
Configuration Option(s) None None None None
3. An example of the ARO displayed Automatic SYGNOG Test Select Tableau for the default configuration is depicted as follows:
Diagram 1. DF Test Pattern
2A-14
Change 7
NAVAIR 01-75PAC-12
AUTO SYNOG TABLE 1 CE TE Test completed with error Test terminated with error 6. The execution of the CP-2044 BIT tests (i.e. CORE, INTFC, or MEMORY BIT) will cause STP to lose control of the system to BIT processing. The AROs and MPDs will blank. At the conclusion of BIT testing, STP will automatically be reloaded for execution. 7. When Automatic SYGNOG tests are executing the AROs display a task tableau with the following legends displayed as appropriate next to the test titles: TERM TERM ERROR COMP COMP ERROR STARTED STARTED ERROR 8. Tests selected to run singly display messages on the TACCO MDD and SS-3 SDD. For the HSP test the NAV/COM ARO is also used to display messages along with the TACCO MDD and SS-3 SDD. Informative messages detail the progress of a test, instructional messages specify necessary operator actions, and error messages instruct the operator on error isolation or maintenance action. Error messages are also printed on the HSP including the test title, test number, and may include expected/receive octal codes. The operator is given key depression options to exit, continue, or repeat the test in progress. At this time, the operator may terminate the test and return to the Automatic SYGNOG Select/Status tableau. 9. Automatic SYGNOG tests may be singly selected for execution or all tests may be selected for concurrent processing. When all tests are chosen for execution test messages are not immediately displayed but are stored with a test alert displayed on the bottom of the Automatic SYGNOG Select/Status Tableau. Alerts are selected in the same fashion as selecting tests, but the result is a test message displayed on the MPDs. A response may be made to the message or NUM 5 may be pressed which causes the display of the next stored message. If a response is entered the Automatic SYGNOG Select/Status Tableau is redisplayed. If there are no more stored messages the Automatic SYGNOG Select/Status Tableau is displayed on the MPDs. When only one test remains, its executing messages are not queued but immediately displayed on the MPDs. 10. When Automatic SYGNOG tests finish execution the test status is displayed on Automatic SYGNOG Select/Status and Task tableaus. In addition, SYGNOG test status is stored in secondary memory so that SYGNOG test status is retained for 24 hours. It is not necessary to run tests that have been executed within the last 24 hours. After that, SYGNOG test status is removed from secondary memory and the tableaus.
S E L E CT TEST 0 + 0 CO R E BI T 0 + 1 IN T F C B IT 0 + 2 M E M O R Y B IT 0 + 3 HS P 0 + 4 TA C N A V ARO 0 + 5 MA G T AP E 0 + 6 HA C L C S 0 + 7 AL L 0 + 8 SS 1 / 2 S ASP X X X X XX X X X XX XXXXXX 3 T E ST R E EN TRY 5 A D V A R O T ABLE 6 ADV TO NEXT TEST 7 T E RM I N A TE 9 P R IN T S CR EEN Where:
5. Press the applicable numerics at TACCO Tray, NAV/COM Keyset, SS-3 Tray, or TTY to select the desired Automatic SYGNOG test. After pressing the desired numerics, press the EOM key to activate the selection. Use the CANCEL key (SKIP at SS-3) if a wrong numeric is accidentally pressed which restarts the selection process. Certain STP configurations contain more tests than can be contained on the Select tableau displayed on the ARO. In this circumstance, the Select tableau contains two tables. The first table contains the tests which are selected with a first numeric key of 0 and the second table contains the selections with a first numeric key of 1. When the first numeric key is selected the appropriate table is displayed on the ARO (ie. depressing numeric 1 causes the display of Table 2 on the ARO). The following keys, when depressed at the TACCO, NAV/COM, SS-3, or TTY and followed by an EOM perform the following functions. TEST REENTRY (NUM 3) causes the most recently executed Automatic SYGNOG test (if any) to be repeated. ADV TO NEXT TABLE (NUM 5) causes the display of the alternate table of the Select tableau displayed on the AROs. Multiple tables of the Select tableau are only available for those aircraft configurations that have more tests than can be displayed on an ARO. ADV TO NEXT TEST (NUM 6) causes selection of the next test after the most recently executed Automatic SYGNOG test (if any). If the most recently executed test is HACLCS, then HSP is selected. (If no test has been executed, the TEST REENTRY and ADV TO NEXT TEST option will select HSP Test). TERMINATION (NUM 7), if selected while the Automatic SYGNOG Select/Status tableau is displayed on the MPDs, will cause the termination of Automatic SYGNOG and the display of the STP Main Select tableau. If selected while one or all Automatic SYGNOG tests are executing, then the test(s) will discontinue processing and the program will display the Automatic Select and Select/Status tableaus. The HSP and Mag Tape tests, when terminated, may display instructional messages for actions necessary to properly perform the termination process. If all tests are executing and termination is selected, then select test alerts to view and respond to these instructional messages. DISPLAY STATUS (NUM 8) toggles the MPD at which the key is selected, between the Automatic SYGNOG Select/Status and Simultaneous Status Tableaus. PRINT SCREEN (NUM 9) at TACCO or NAV/COM causes the ARO displays to be printed on the HSP. Depressing NUM 9 at TTY or SS-3 causes the Automatic SYGNOG Status Tableau to be printed on the HSP with the following legends displayed as appropriate next to the test titles: COMPLETED TERMINATED COMPLETED ERROR TERMINATED ERROR
XXXXXXXXXXXXXXXXX = Verification line

4. An example of the TACCO MDD and SS-3 SDD displayed Automatic SYGNOG Select/Status Tableau is depicted as follows:
A U T O MA T I C S E L E CT 0+0 0+1 0+2 0+3 0+4 0+5 0+6 0+7 0+8
FLEET I SS U E YYYY YY YY MM DD YY S YGNOG S EL E CT STA TU S TABL E AU TEST C O R E B IT I NT F C B IT MEMORY BIT HSP T AC ARO N AV ARO M AG TAPE HACLCS ALL SS 1 2 SASP ST A TUS A B A B A B A B A B A B A B A B A B
X X X X XX X X X XX XXXXXX X XX X XXX 3 6 7 8 9 Where: T ES T REENT RY ADV TO NEXT TEST T ER M INATE D IS P LAY ST AT US PRINT SCREEN
YYYYYYY = Program version number XXXXXXXXXXXXXXXXXXXXXXXX = Verification line NOTE
The following legends are displayed as applicable next to the test titles on the SS-3 SDD and TACCO MDD: LEGEND/DEFINITION S C T SE Test started without error Test completed without error Test terminated without error Test started with error
Change 7
2A-15
NAVAIR 01-75PAC-12
2A-24. AUTOMATIC SYGNOG TESTS. The following Standardized keyset usage shall be used throughout the Automatic SYGNOG testing and valid keys will be presented to the operator whenever an operator response is required: NUM 1 - EXIT. This entry terminates the test in progress. NUM 2 - CONTINUE. This entry executes the next test step. NUM 3 - REPEAT. This entry repeats the last executed test step. NUM 4 - NO. This entry answers the question posed in an instructional message. NUM 4 - OBSERVED ERROR. This entry registers an operator observed error. NUM 5 - SCROLL. This entry is only available when the ALL Mode is selected. After selecting any of the Alert messages, this option will allow the operator to scroll between all pending Alert messages. NUM 6 - YES. This entry answers the question posed in an instructional message. NUM 6 - ADVANCE. This entry executes the next test step. NUM 7 - TERMINATE. This entry terminates the test in progress. NUM 9 - PRINT SCREEN. This entry, when made from the TTY or SS-3 Tray, prints the contents of the TACCO MDD on the HSP. If this entry is made from the NAV/COM Keyset or TACCO Tray, the Automatic SYGNOG Task Tableau displayed on both AROs is printed on the HSP. 1. HSP Test Should an error occur during the running of the HSP Test an error message shall be displayed on the TACCO MDD, SS-3 SDD, and the NAV/COM ARO with operator instructions. For further information and description of the HSP Test, refer to NAVAIR 01-75PAC-12-10. a. When the HSP Test is selected the following message is displayed on the TACCO MDD, SS-3 SDD, and the NAV/ COM ARO for 5 seconds: HSP TEST IN PROGRESS b. The operator then monitors the TACCO MDD, SS-3 SDD, or the NAV/COM ARO for instructions to perform the test. c. Operator responses are made at the TACCO Tray, SS-3 Tray, NAV/COM Keyset, or TTY. d. The following 4 test patterns are printed during the course of running the HSP Test: (1) HSP 3000 WPM Test Pattern
A AB ABC ABCD ABCDE ABCDEF ABCDEFG ABCDEFGH ABCDEFGHIJKLMNOP ABCDEFGHIJKLMNOPQRSTUVWX ABCDEFGHIJKLMNOPQRSTUVWXYZABCDEF ABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMN ABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUV ABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCD ABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKL ABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRST
NOTE
(2) HSP 100 WPM Test Pattern

ABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRST
TACCO and NAV/COM ARO Test Pattern b. If patterns are not acceptable, press NUM 4 on the TACCO Keyboard, NAV/COM Keyset, SS-3 Tray, or TTY. The first observed error is at the TACCO station, regardless of what station is in control. c. If patterns on both AROs is acceptable, press NUM 6 on the TACCO Keyboard, NAV/COM Keyset, SS-3 Tray, or TTY. Two depressions are required for this test, one for the TACCOs ARO and the other for the NAV/COMs ARO. 3. MAG Tape Test.
(3) HSP 60 WPM Test Pattern

ABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRST
(4) HSP Dot Matrix Test Pattern
NOTE NOTE
There should be no two adjacent dots missing in any of the 5X5 MATRIX printouts for character position 1 through 71. If the printout pattern does not qualify, clean the print head of the HSP. 2. ARO Display Test.
NOTE
During the running of the MAG Tape Test all instructional messages will be displayed on the TACCO MDD and SS-3 SDD. Should an error occur during the testing, error messages shall be printed on the HSP. For further information and description of the MAG Tape Test, refer to NAVAIR 01-75PAC-12-10. a. When the MAG Tape Test is selected, the MAG Tape Test is automatically started. b. Individual cues instruct the operator in the testing of the RDSS, the removal and mounting of the STP M-O Disk, and the scratch M-O Disk as required. In each case, press NUM 6 when complete.
NOTE
Should an error occur during the running of the ARO Display Test, the error message shall be displayed on the TACCO MDD and the SS-3 SDD, and the error message shall be printed on the HSP. For further information and description of the ARO Display Test, refer to NAVAIR 01-75PAC-12-10. a. When the ARO Test is started, the following is automatically displayed on both AROs:
2A-16
Change 7
NAVAIR 01-75PAC-12
4. STEP DELETED 5. HACLCS Test. 3. At the TACCO Tray, pressing M-5, EOM displays the TACCO Select Tableau on the TACCO MDD. Then pressing NUM 8, EOM at the TACCO Keyboard, NAV/COM Keyset, or TTY will return the TACCO MDD to the display of the Simultaneous SYGNOG Status Tableau. 4. Pressing NUM 8, EOM at the TACCO Keyboard, NAV/COM Keyset, or TTY while the Simultaneous SYGNOG Status Tableau is displayed on the TACCO MPD, toggles between the display of the Automatic SYGNOG Select/Status Tableau and Simultaneous SYGNOG Status Tableau. 5. Pressing NUM 7, EOM at the TACCO Keyboard, NAV/COM Keyset, or TTY while the Simultaneous SYGNOG Status Tableau is displayed on the TACCO MDD causes Simultaneous SYGNOG processing to cease and the display of the STP Main Select Tableau. 6. At the SS-3 Tray, pressing M-5, EOM displays the SS-3 Select Tableau on the SS-3 SDD. Then pressing NUM 8, EOM at the SS-3 Tray will return the SS-3 SDD to the display of the Simultaneous SYGNOG Tableau. 7. Pressing NUM 8, EOM at the SS-3 Tray while the Simultaneous SYGNOG Status Tableau is displayed on the SS-3 SDD toggles between the display of the Automatic SYGNOG Select/Status Tableau and Simultaneous SYGNOG Status Tableau. 8. Pressing NUM 7, EOM at the SS-3 Tray while the Simultaneous SYGNOG Status Tableau is displayed on the SS-3 SDD causes Simultaneous SYGNOG processing to cease and the display of the STP Main Select Tableau. 9. The available Simultaneous SYGNOG tests are determined during configuration processing. The Simultaneous SYGNOG tests affected by the aircraft configuration are the Optics and Radar tests, which are selected at SS-3. The following table specifies the equipment dependencies: Available Equipment Configuration Simul Dependency Option Tests -------------------------------------ANALOG Radar AN/APS-115 ISAR Radar AN/APS-137 EO-IR Optics AN/ASX-6 IRDS Optics AN/AAS-36 10. The following depicts the TACCO MDD and SS-3 SDD displayed Simultaneous SYGNOG Status Tableaus: FLEET ISSU E X X X X X X X X MM DD YY SIMULTANEOUS SYGNOG S T A T U S T A BLEAU FLIGHT STATION KEYSET DISPLAY DIRECTOR NAVIGATION ARM ORD T A CCO STATION K EYSET A B D ISPLAY A B A NALOG A B T RACKBALL A B
NOTE
Should an error occur during the HACLCS Test, an error message shall be printed on the HSP and displayed on the TACCO MDD and SS-3 SDD. All instructional messages shall be displayed on the TACCO MDD and SS-3 SDD. For further information and description of the HACLCS Test, refer to NAVAIR 01-75PAC-12-10. a. At the Harpoon Weapon System (HWS) select Computer Mode. b. When the HACLCS Test is started the following message is displayed on the TACCO MDD and SS-3 SDD:
HACLCS TEST IN P R O G R E S S
A A A A A
B B B B B
c. If errors occur, error and instructional messages are displayed on the TACCO MDD and SS-3 SDD along with the operator response keys. Operator responses are made at the TACCO Tray, SS-3 Tray, NAV/COM Keyset, or TTY. 2A-25. SIMULTANEOUS SYGNOG TEST.
NAV COM STATION KEYSET A DIRECTOR A NAVIGATION A DATA LINK A TTY A
B B B B B
S S 3 STATION K EYSET A D ISPLAY A T RACKBALL A Y YYYYYY A S AD A Z ZZZZZZ A
B B B B B B
MAIN SELECT SELECT MODE 0+0 AUTOMATIC 0+1 SIMULTANEOUS 0+2 SPECIAL TEST 0+3 UTILITIES 0+4 DIAGNOSTICS XXXXXXXXXXXXXXXXXXX 7 TERMINATE 9 PRINT SCREEN
Where:
SS 1 2 SASP SC DIAGNOSTIC CMEP 1 TEST CMEP 2 TEST DF DIAGNOSTIC AU DIAGNOSTIC ASCL 1 TEST ASCL 2 TEST DMTS TEST END TO END M5 7 8 9
A A A A A A A A A
B B B B B B B B B
A R M ORD STATION K EYSET A B P ANEL A B
XXXXX...XXXX = Verification line
1. When the Main Select Tableau is displayed, pressing 0 + 1 and EOM on the TACCO Keyboard, NAV/COM Keyset, TTY, or SS-3 Tray selects Simultaneous SYGNOG. 2. The start of station simultaneous testing is indicated by test select tableaus and task tableaus being displayed on both AROs, the Simultaneous SYGNOG Status Tableau at the TACCO MDD and SS-3 SDD, and the Flight Select/Status Tableau on the Pilot display.
STATION SELECT TAB L E A U TERMINATE DISPLAY STATUS PRINT SCREEN Where:
XXXXXXXXX = Program version number YYYYYYY = ANALOG or ISAR ZZZZZZZ = EO-IR or IRDS
NOTE
The cues and procedures listed in Section 2 of each Crew Station Maintenance Manual should be followed at all times.
Change 7
2A-17

The following A and B line entries are displayed as applicable next to the test titles: A and B definitions S C T SE CE TE TEST STARTED WITHOUT ERROR TEST COMPLETED WITHOUT ERROR TEST TERMINATED WITHOUT ERROR TEST STARTED WITH ERROR TEST COMPLETED WITH ERROR TEST TERMINATED WITH ERROR FLEET ISSUE SI M U L T A N E O U S XXXXXXXX H H:M M: S S M M/D D/Y Y sired test and EOM to activate the test. Select CANCEL (SKIP at SS-3) anytime during the process to start over. 14. Once the test is executing, progress messages will be displayed at test station and on the Simultaneous SYGNOG Task Tableau displayed on both AROs. When a test is selected at the TACCO and NAV/COM stations the Task tableau is replaced with a test informative message. 15. When Simultaneous SYGNOG tests finish execution the test status is displayed on Simultaneous SYGNOG Status Tableau. In addition, SYGNOG test status is stored in secondary memory and is retained for 24 hours. After that, SYGNOG test status is removed from secondary memory and the tableau.
SYGNOG STATUS
TABLEAU
11. Pressing NUM 9 followed by an EOM at each controlling key device prints the screen contents specified by the following chart:
KEY DEVICE NAV/COM Keyset Pilot Keyset SS-3 Tray TACCO Tray TTY
SCREEN NAV/COM ARO PILOT DISPLAY SS-3 SDD TACCO ARO TACCO MDD
12. If the Simultaneous SYGNOG Status Tableau is selected to be printed, then the output is a status printout. The following is an example of the Simultaneous SYGNOG status printout:
F LI G H T S T A T I O N KE Y S E T AAAAAAAAA DI S P L A Y AAAAAAAAA DI R E C T O R AAAAAAAAA NAVIGATION AAAAAAAAA ARM/ORD AAAAAAAAA TACCO STATION KEYSET AAAAAAAAA DI S P L A Y AAAAAAAAA ANALOG AAAAAAAAA TRACKBALL AAAAAAAAA NAV/COM STATION KEYSET AAAAAAAAA DI R E C T O R AAAAAAAAA NAVIGATION AAAAAAAAA DATA LINK AAAAAAAAA TTY AAAAAAAAA SS3 STATION KEYSET AAAAAAAAA DI S P L A Y AAAAAAAAA TRACKBALL AAAAAAAAA YYYYYYY AAAAAAAAA SAD AAAAAAAAA ZZZZZZZ AAAAAAAAA ARM ORD STATION KEYSET AAAAAAAAA PANEL AAAAAAAAA SS 1/2 SASP SC DIAGNOSTIC AAAAAAAAA CMEP 1 TEST AAAAAAAAA CMEP 2 TEST AAAAAAAAA D F DI A G N O S T I C A A A A A A A A A A U DI A G N O S T I C A A A A A A A A A ASCL 1 TEST AAAAAAAAA ASCL 2 TEST AAAAAAAAA DMTS TEST AAAAAAAAA END TO END AAAAAAAAA
BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB
NOTE
S When the program is in an error branch, the operator is giv en key depression options to start over, continue, repeat, or terminate. These key functions are defined in SIMULTA NEOUS SYGNOG Switch Functions. Error printouts. When a malfunction is detected, the HSP prints the station, test step number, and either the ex pected/receive octal codes or an operator observed error message.
16. While the Simultaneous SYGNOG Status Tableau is displayed on the TACCO MDD, pressing the TACCO Keyboard, NAV/COM Keyset, or TTY NUM 7, EOM returns the system to the Main Selection Tableau. While the Simultaneous SYGNOG Status Tableau is displayed on the SS-3 SDD, pressing SS-3 NUM 7, EOM returns the system to the MAIN Selection Tableau.
Where:
XXXXXXXXX = Program version number YYYYYYY = ANALOG or ISAR ZZZZZZZ = EO-IR or IRDS NOTE
MAIN SELECT SELECT MODE 0+0 AUTOMATIC 0+1 SIMULTANEOUS 0+2 SPECIAL TEST 0+3 UTILITIES 0+4 DIAGNOSTICS XXXXXXXXXXXXXXXXXXX 7 TERMINATE 9 PRINT SCREEN
The following A and B entries are printed as applicable next to the test title on the HSP:
STARTED COMPLETED TERMINATED STARTED COMPLETED TERMINATED
ERROR ERROR ERROR
13. To select a Simultaneous SYGNOG test, ensure the station select tableau is displayed. Select the appropriate numerics for the de-
17. During the simultaneous station testing (at which time the options displayed are available), the station tests are placed under station operator control by means of switch functions that provide certain options (see applicable Crew Station Readiness Test procedures for specific switch assignments).
2A-18
Change 7
NAVAIR 01-75PAC-12
2A-26. SIMULTANEOUS SYGNOG SWITCH FUNCTIONS. 8. PRINT SCREEN: a. Depressing NUM 9 at the SS-3 Tray prints the contents of the SS-3 SDD. b. Depressing NUM 9 at the TACCO Tray prints the contents of the TACCO ARO. c. Depressing NUM 9 at the NAV/COM Keyset prints the contents of the NAV/COM ARO. d. Depressing NUM 9 at the TTY prints the contents of the TACCO MDD. 2. At the CP-2044 Maintenance Panel set COMPUTER POWER switch to OFF.
NOTE
Key and switch numbers have been omitted since numbers vary between station keysets and keyboards. 1. SEQUENTIAL: a. Depressing NUM 0+X, EOM causes each test (with the exception of alignment tests, TACCO POFA test, and the SS-1 and SS-2 STP test) listed in the station test select tableau, to be entered automatically after completion of the prior test. Upon completion of all tests, the station TEST COMPLETE message is displayed. If one or more tests were terminated, the station test select tableau or the Simultaneous SYGNOG Status Tableau is displayed upon completion of final test. 2. REPEAT STEP: a. Depressing NUM 3 causes the program to repeat the step in which an error has just occurred. This option is available only after an error has occurred. If the repeat option is used and the error is not detected, an E is removed from the status tableau. 3. OBSERVED ERROR: a. Depressing NUM 4 informs the computer that the station operator has observed an error. This causes the program to output the error message at the HSP and display device appropriate to the step of the test in progress. Also, an E is entered next to the test title of the test status tableau. 4. ADVANCE: a. Depressing NUM 6 informs the computer that observed equipment response is acceptable, and causes the program to proceed with the next sequential step of the test in progress. This option is not functional during keyset test. 5. CONTINUE: a. Depressing NUM 2 causes the program to continue with the next sequential step of the test in progress. This option is available only after an error has occurred. An E is entered on the test status tableau. 6. TERMINATE: a. Depressing NUM 7 terminates the test in progress and causes the program to return to the Test Selection Tableau or Simultaneous SYGNOG Status Tableau. b. If malfunctions occur during the readiness test, refer to NAVAIR 01 -75PAC-12-10. 7. DISPLAY STATUS: a. Depressing NUM 8, EOM toggles the MPD at which the key is selected, between the Automatic SYGNOG Select/Status Tableau and Simultaneous SYGNOG Status Tableau. When the Station Select Tableau is displayed on the MPD this Control Key causes the display of the Simultaneous SYGNOG Status Tableau. S S
CAUTION To prevent possible internal component failure, the INERTIAL SYSTEM NO. 1, INERTIAL SYSTEM NO. 2, and 115VAC A RUN circuit breakers on the AFT ELECTRONIC CIRCUIT BREAKER PANEL shall remain open (pulled) when the inertial navigation system(s) are not being used.
3. At the AFT ELECTRONIC CIRCUIT BREAKER PANEL, open
2A-27.
AIRCRAFT POWER TURNOFF.
(pull out) the INERTIAL SYSTEM NO. 1, INERTIAL SYSTEM NO. 2, and 115VAC A RUN circuit breakers. CAUTION
NOTE
Prior to turning off equipment ensure the current STP is loaded into Secondary Memory. The sequence in which the various stations are shut down is not critical, but all stations must be shut down prior to turn ing off power at the TACCO Power Control.
1. At the TACCO POWER CONTROL panel, set the following peripheral equipment power switches to OFF: a. TACCO MPD b. SS3 MPD c. ARO d. PILOT DlS e. RDR SCAN f. DATA CONV
To prevent possible internal component failure, the HSI PILOT, HSI CO--PILOT, and HSI NAV circuit breakers on the FWD ELECTRONIC CIRCUIT BREAKER PANEL and the PILOT EFDI and COPILOT EFDI circuit breakers on the FWD ELECTRICAL LOAD CENTER shall remain open (pulled) when power is applied to the aircraft.
4. At the FWD LH ELECTRONIC CIRCUIT BREAKER PANEL, open (pull out) the HSI PILOT, HSI CO--PILOT, and HSI NAV circuit breakers. 5. At the FWD ELECTRICAL LOAD CENTER, open (pull out) the PILOT EFDI and COPILOT EFDI circuit breakers.
g. RDSS h. KEYSETS i. LOGIC UNIT 2
Change 10
2A-19/(2A-20 blank)
SECTION 2B
SECTION 2B READINESS TEST
APPLICABLE TO AIRCRAFT INCORPORATING AFC 607
NAVAIR 01-75PAC-12
2B-1. 2B-2. AIRCRAFT POWER TURN-ON. EXTERNAL INITIALIZATION. 1. 2. 3. 4. Check all antennas for breakage or damage. Check that forward radome is closed. Verify aircraft is properly grounded. Connect battery in rear of nose wheel well. WARNING Physical injury or equipment damage can occur if the IRDS (Aircraft Not Incorporating AFC 705) or MMIS (Aircraft Incorporating AFC 705) Turret is lowered with no ground observer. If the IRDS TURRET CONT switch is not set to DISABLE, Turret extension can occur in the event of an IRDS or MMIS equipment power-on state upon aircraft power application. 5. Verify that IRDS TURRET CONT switch (located in the nose wheel well) is in DISABLE position (IRDS or MMIS installed). WARNING Except during ground maintenance test, the sonobuoy safety switch shall be in the safe position during ground loading/unloading, buoy inspection and maintenance. 6. Aircraft Incorporating AFC 593: CAUTION a. Improperly mated umbilical connectors can result in system malfunction or damage. When properly mated, red line on receptacle cannot be seen when receptacle is viewed from side. At pod umbilical cable connector panels, ensure red line on umbilical cable receptacles cannot be seen when receptacle is viewed from side. Remove and stow pod inlet cover. 3. 4. 2B-3. 1. 2. 10. detailed procedures. Aircraft Incorporating AFC 593: d. e. f. (ACE802HDDP) removed. Ensure pod waterdrain cover is
Check pod exterior and mounting hardware for damage and security. Ensure drain holes on lowerskin of pod are free of obstructions.
CAUTION
INTERNAL INITIALIZATION. Open free fall chute. At SS 1 & SS 2 (Aircraft Incorporating AFC 593): a. b. At Bus Power Control panel, ensure GEN 1/NORMAL/GEN 4 switch is set to NORMAL. At Status and Control panel, ensure SMCS PWR, POD, and SENSOR switches are OFF.
b. 11.
Pod cooling preparation.
At DPS Electronic circuit breaker panel, check that all circuit breakers are closed. At SS 3: a. Check IRDS TURRET Control Panel set to OFF.
CAUTION To avoid equipment damage, airflow must be provided to pod until maximum internal temperature of pod is below 100 degrees F. NOTE For operation in High Dust Environments, only operate the pod with ground cooling carts fitted with deflector kit, supplemental air filter, and condenser coil facing downwind. a. In High Dust Environments, clear away dust that may have accumulated in the inlet throat and near the exhaust door screen. Install pod cooling cart adapter. NOTE
5.
At Forward Electronic circuit breaker panel (Aircraft Incorporating AFC 593 with pod installed): a. Ensure SONO CONT, SONO RELEASE LH, and SONO RELEASE RH circuit breakers are open and tagged.
6.
At NAVCOMM Station: a. Check that TAS POWER and PROBE HEATER switch are OFF. CAUTION Ensure the HSI PILOT, HSI COPILOT, and HSI NAV circuit breakers on the Forward Electronic Circuit Breaker Panel and the PILOT EFDI and COPILOT EFDI circuit breakers on the Forward Load Center remain open (pulled) when power is applied to the aircraft.
S S
a.
The SONOBUOY SAFETY SWITCH ACCESS DOOR (under aircraft forward of sonobuoy launch tubes) is inaccessible with the pod installed. It is not possible to verify that the roller switch is fully extended with the pod installed. Verify that the SONOBUOY SAFETY SWITCH ACCESS DOOR (under aircraft forward of sonobuoy launch tubes) is OPEN. Verify roller switch is fully extended. The switch being open disables firing circuitry to the sonobuoy launch tubes.
b.
When utilizing A/AM32C17 Trailer Mounted Air Conditioner Unit, the waterdrain cover is removed when using two cooling carts to provide airflow to pod and installed when using a single cart on aircraft incorporating AFC 593. When utilizing ACE802HDDP Trailer Mounted Air Conditioning/Heating Unit, the water drain cover is removed to provide airflow to pod. (A/AM32C17) Ensure pod waterdrain cover is removed (dual cart) or installed (single cart).
7.
At Flight Station: a. At Forward Load Center, check that all circuit breakers are closed (except INTAKE DOOR, PILOT EFDI and COPILOT EFDI circuit breakers). Perform inverter battery test (22 volts minimum). Check that all switches are either off, safe, or normal. Check that all red guarded switches are closed. Check landing gear handle down.
7. 8. 9.
Check that aft radome is closed. Check OTPI antenna and Doppler well covers to ensure drain holes are not obstructed. If external power unit is to be used, see NAVAIR 01-75PAA-2-1 for
S
c.
b. c. d. e.
Figure 2B-1. Technician Readiness Test Procedures (Sheet 1 of 14)
Change 13
2B-1
NAVAIR 01-75PAC-12
f. g. h. i. j. 8. Check bomb bay door open/closed switch agrees with door position. Check flap position selector agrees with flap position. APU fire detector-Checked. APU arming switch-OFF. Check for a minimum of 1,000 pounds of fuel in tanks 2 and 3 for hydraulic cooling. 17. 18. b. c. steps: a. Power up all PEPs, DEPs, and FPDs at the various operator stations except for SS 1 and SS 2 and set the Flight Station PCHRD POWER switch to AUTO position. Inspect all rack overheat indicators for proper operation. Inspect all racks to ensure all equipment is installed and properly secured. 25. b. 24. (3) Ensure red guarded ERASE PWR/ERASE switch cover is closed.
At Rack G2: a. Check that SEARCH PWR SAFETY CKT DISABLE switch is off. Check that SEARCH PWR SAFETY CKT DISABLE red guarded switch cover is down.
Observe EXTERNAL POWER AVAILABLE light is illuminated. Set EXTERNAL POWER switch to ON. Observe that EXTERNAL POWER ON light is green (ON). At external power receptacle, observe that EXTERNAL POWER IN USE light is illuminated. NOTE On Aircraft Incorporating AFC 593, aircraft buses C and D are powered via external power cart during ground operations.
At the Forward Load Center, close (push in) the PILOT EFDI and COPILOT EFDI circuit breakers. At the Forward Left Hand Electronic Circuit Breaker Panel, close (push in) the HSI PILOT, HSI CO-PILOT, and HSI NAV circuit breakers. At Main Electronic Load Center circuit breaker panels, check that all circuit breakers are closed. WARNING
At Rack H1, set IFF MODE 2 numeral wheels to 0100 (Aircraft Not Incorporating AFC 719). CAUTION To prevent possible internal component failure, the INERTIAL SYSTEM NO. 1, INERTIAL SYSTEM NO. 2, and 115 vac A RUN circuit breakers on the aft electronic circuit breaker panel shall remain open (pulled) when the inertial navigation system(s) are not being used.
19.
9.
Aircraft Incorporating AFC 593: a. Observe EXTERNAL POWER C/D AVAILABLE light is illuminated. Set EXTERNAL POWER C/D switch to ON. Observe that EXTERNAL POWER C/D ON light is green (ON). At external power receptacle, observe that EXTERNAL POWER C/D IN USE light is illuminated. OR 20.
26. If wing stores are present, Harpoon simulator must be disconnected. At Rack D3 (Aircraft Incorporating AFC 593): a. At Navigation Interface Unit (NIU): (1) (2) 21. 22. Set POWER ON/OFF switch to ON. Ensure red guarded THERMAL OVERRIDE J6 (TEST) switch cover is closed. 2B-4. 27.
At Aft Electronic circuit breaker panel, check that all circuit breakers are closed. Ensure 75 ft. ICS cord, headset, and boom mike are on board the aircraft.
RDSS DISK LOAD PROCEDURES. CAUTION Interruption of power to the RDSS caused by resetting the RDSS power switch, RDSS circuit breaker or PWR DIST circuit breaker with the M-O disk mounted will corrupt the disk. If RDSS is powered down for any reason with the M-O disk mounted, depress and hold EJECT SWITCH (See Figure 9D-10 and 9D-11) while applying power. This will cause M-O disk to eject upon RDSS power-up. 1. RDSS Power-up BIT. a. b. At TACCO Power Control ensure RDSS switch is set to the on (up) position. At RDSS: (1) (2) (3) Set power switch-circuit breaker to ON. Verify POWER ON indicator is illuminated and OVERTEMP indicator is extinguished. Observe operator display for proper sequencing of power-up automatic BIT: (a) (-) is displayed in upper left corner of RDSS display for 40 seconds.
10. 11.
Set APU control switch-on. APU control switch-Start, then release to ON (APU generator will engage automatically). NO. 2 fuel boost pump (or establish crossfeed)-ON, if needed to maintain the APU within rpm limits. Wing and tail lights-ON. Set UHF 1 function selector switch to T/RG and Mode switch to MAN. Establish positive radio contact with ground station. CAUTION Do not operate the avionics equipment without air conditioning. Close all doors and hatches except free fall chute. The sonobuoy free fall chute must be open to allow release of pressurization.
12. 13.
At Harpoon circuit breaker panel, check that Simulator circuit breakers are open and all other circuit breakers are closed. At Acoustic System circuit breaker panel, check that all circuit breakers are closed. At Rack E1C (Aircraft Incorporating AFC 593): a. At Electronic Unit (EU): (1) (2) b. Set POWER ON/OFF switch to ON. Ensure red guarded THERMAL OVERRIDE ON/OFF/ON switch cover is closed.
23.
14.
Turn on air conditioning system (either on-board or auxiliary). (See NAVAIR 01-75PAA-2-1 for detailed procedures.) Adjust and operate cabin air conditioning system until cabin temperature is under 27 degrees C (80 degrees F) and maintain temperature below this reading. Ensure cabin exhaust fan is on. Starting at the Flight Station and working aft, perform the following
At Fibre Channel Storage Array (FCSA): (1) (2) Set POWER ON/OFF switch to ON. Ensure red guarded THERMAL OVERRIDE ON/OFF/ON switch cover is closed.
15. 16.
2B-2
Change 13
NAVAIR 01-75PAC-12
(b) S/W version number is displayed for 5 seconds. NOTE BIT STATUS menu is displayed when errors are detected during BIT. (c) After 40-50 seconds, MAIN MENU is displayed as follows: NOTE Down arrow () indicates scroll point using to view remainder of menu.
1. 2. 3. 4. 5. 6. MAIN MENU SHUTDOWN CONFIGURATION SASP LOAD RDSS BUILTIN TEST DRIVE STATUS UTILITIES
1 2 3 4 0
RDSS BUILTIN TEST PANEL BIT INTERNAL BIT EXTERNAL BIT BIT STATUS GO TO MAIN MENU
(2) (3) (4) (5) 2.
ARM/ORD PNL DDC BARO ALT RDR VIDEO
(8)
Select INTERNAL BIT from RDSS BUILTIN TEST Menu.

1 2 3 4 9 0 INTERNAL BIT RUN ALL RUN INTERNAL ANEW RUN INTERNAL PDC DRIVE TEST GO TO PREV MENU GO TO MAIN MENU
After approximately 40 seconds, observe the following at the CMP:

DDC MAIN MENU:XXXX 1. RUN BUILTIN TEST 2. LOAD AND EXECUTE 3. BURN NEW PROGRAM 4. DISPLAY VERSION 5. STATUS MENU 6. HELP
(9)
Select RUN ALL from INTERNAL BIT Menu. (a) TEST IN PROGRESS displayed until test completion (approximately 2.5 minutes). 2B-7. a.
Where:
XXXX = AIP
or BMUP
(10) Select and observe BIT STATUS from RDSS BUILT-IN TEST Menu.
BIT STATUS CPU PASSED INT ANEW PASSED INT PDC PASSED DRIVE 1 PASSED DRIVE 2 NOT FOUND DRIVE 3 NOT FOUND DRIVE 4 NOT FOUND EXT ANEW NOT TESTED EXT PDC NOT TESTED 9 GO TO PREV MENU 0 GO TO MAIN MENU
Verify XXXX = BMUP (Refer to NAVAIR 01-75PAC-12-12).
WARNING Do not look into or try to view with a mirror the inside of the M--O Drive. The Class IIIB Semiconductor Laser emits invisible radiation which can cause serious eye damage. CAUTION Cleaning of the M--O Disks may be required to prevent damage and/or corruption of disk/data. When operating in extreme environment (dust/sand), very frequent cleaning (every load) may be necessary to avoid problems. M--O Disks may be cleaned using Disk Cleaning Kit P/N MOA--D51, available through GSA. (4) Clean MO Disks as necessary per instructions provided with cleaning kit. NOTE The disk must have some free space for the RDSS to write test files during BIT. The test files will not overwrite existing data and will be removed after BIT is completed. (5) (6) Insert appropriate write enabled configuration controlled application software disk into MO drive. Verify drive ready LED is illuminated steady green (takes approximately 15 seconds to mount MO media). Select RDSS BUILTIN TEST from MAIN MENU. 2B-6.
DIGITAL DATA COMPUTER (DDU) PREFLIGHT LOADER LOAD FROM M-O DISK. 1. At Computer Maintenance Panel (CMP): a. b. c. d. e. 2. Ensure all circuit breakers are closed. Ensure the DDC BIT ENBL/NO BIT/IDLE switch is set to IDLE. Ensure the VDC BIT ENBL/NO BIT/IDLE switch is set to NO BIT. Ensure the UNIT SEL switch is set to DDC. Ensure the AC ON/OFF power switch is set to ON.
(11) Return To MAIN MENU. 2B-5. ELECTRONICS RACK D2. 1. At Computer Maintenance Panel (CMP): a. b. c. d. e. Check that all circuit breakers are closed. Set the DDC BIT ENBL/NO BIT/IDLE switch to IDLE. Set the VDC BIT ENBL/NO BIT/IDLE switch to NO BIT. Set the UNIT SEL switch to DDC. Set the AC ON/OFF power switch to ON.
After approximately 40 seconds, observe at the CMP: NOTE In all CMP menu operations and unless otherwise indicated, use the zero (0), BACK and ENTR keys to select the previous menu. Menu selection can be accomplished by use of either depressing the corresponding number and ENTR, or by using the arrow keys to position backlighting over desired selection and depressing ENTR.
TACCO STATION. 1. At TACCO Power Control: a. Set the following Power Control switches to the on (up) position: (1) VDC 3.
Where:
XXXX = AIP
or BMUP
(7)
Select LOAD AND EXECUTE and depress ENTR switch.
Change 13
2B-3
NAVAIR 01-75PAC-12
4. Observe the following at the CMP:
DDC LOAD MENU 1. STP 2. TMS 3. PFL PREFLIGHT LOADER MAIN MENU VERSION: XXXXXXXXXXXX 0+1 0+2 0+3 0+4 0+5 0+6 NUM 7 CLEARING PROGRAM MEMORY AREA IN PowerPC 0... CLEAN UP DISK UPDATE AIRCRAFT CONFIG DISPLAY SYSTEM FILES VERIFY AND BURN EEPROMS CONVERT PID DATA DISK UTILITIES TERMINATE PREFLIGHT
a. b. 2.
Perform Lamp Test by sequentially setting panel signal lights switches (OVHD, INST, and PED) to TEST. Adjust lighting controls as required.
Pilot Side Console: CAUTION To prevent possible internal component failure, the INERTIAL SYSTEM NO. 1, INERTIAL SYSTEM NO. 2, and 115 vac A RUN circuit breakers on the Aft electronic circuit breaker panel shall remain open (pulled) when the Inertial Navigation System(s) are not being used. a. b. At INS 1 MSU, set mode switch to STBY (Aircraft Not Incorporating AFC 719). At ADDU/CDU Control, set ADDU MASTER switch to PILOT and CDU switch to ON (Aircraft Incorporating AFC 719).
5. 6.
Select PFL and depress ENTR. Observe the following at the CMP:
Where: c.
XXXX...XXXX = Version
number
followed by:
CLEARING PROGRAM MEMORY AREA IN PowerPC 1...
Select 0+1 and observe the following CLEAN UP MENU is displayed:

CLEAN UP DISK NUM NUM NUM NUM 1 2 3 4 DRIVE DRIVE DRIVE DRIVE A B C D
followed by:
LOADING PREFLIGHT LOADER PROGRAM BUILD: XXXXXXXX
NUM 7
RETURN TO MAIN MENU
d.
Select NUM 1 to clean Drive A and observe the following:

CLEAN UP DISK X IN PROGRESS
3.
At Flight Station Center Console. a. b. At GPS CDNU, set MODE switch to ON (Aircraft Not Incorporating AFC 719). At Pilot CDU, access the power page by pressing the IDX switch (Aircraft Incorporating AFC 719). (1) Press LLS1 line select key (LSK) adjacent to START INIT. (2) (3) (4) Press RLS6 LSK adjacent to POWER. Press LLS1 LSK adjacent to RINU1 to toggle INU 1 to ON. Press RLS1 LSK adjacent to RINU2 to toggle INU 2 to ON. Press LLS2 LSK adjacent to IFF to toggle IFF to ON. Press LLS3 LSK adjacent to V/UHF to toggle V/UHF to ON.
Where: followed by:
XXXXXXXX
= Program version number.
(1) e.
When cleanup process is completed the PREFLIGHT LOADER MAIN MENU will be displayed.
PREFLIGHT LOADER PROGRAM BUILD: XXXXXX LOADED FROM DISK
Select 0+2 to verify the aircraft configuration and observe the following:
AIRCRAFT CONFIGURATION EQUIPMENT 0+0 OPTICS 0+1 RESERVED 0+2 RESERVED 0+3 RESERVED 0+4 DRIVE A 0+5 DRIVE B 0+6 DRIVE C 0+7 DRIVE D NUM 7 MENU STATUS XXXXXX
Where: followed by:
XXXXXXXX
ASQ227 BMUP BUILD: XXXXXX
TRUE FALSE FALSE FALSE
(5) (6) c.
Where: 2B-8.
XXXXXXXX
= STP. (1) (2)
RETURN TO MAIN MENU
At Pilot EFDS Control: NOTE
CENTRAL COMPUTER PREFLIGHT LOADER LOAD . 1. At TACCO, SS 3 or NAVCOM consoles: a. b. Select TACT COMPUTR MODE on the TACCO, SS 3 or NAVCOM PEP. After approximately 1 minute, observe the following menu is displayed on the consoles where the TACT COMPUTER MODE is selected: 2B-9.
Where: XXXXXX = MMIS or IRDS Select appropriate entries for aircraft configuration. When the aircraft equipment configuration is correct depress NUM 7, to return to PRE-FLIGHT LOADER MAIN MENU.
COURSE and BEARING selector positions are displayed on either the EHSI or EFDI. (1) (2) (3) (4) Set COURSE selector to FMS2. Set BEARING selector to FMS2. Set HDG SRC switch to PRI (INS 1). Set ATTD SRC switch to PRI (INS 1).
f.
Select NUM 7 to terminate PreFlight Loader.
FLIGHT STATION. 1. Pilot Overhead Panel:
2B-4
Change 13
NAVAIR 01-75PAC-12
d. On Armament Control Box: WARNING At no time shall the Flight Station MASTER ARM and SRCH PWR switches be turned on during the running of any ARM/ORD SYGNOG tests. (1) (2) Ensure MASTER ARM switch is OFF. Ensure SRCH PWR switch is OFF. NOTE SONO DISABLED indicator remains on when SONOBUOY SAFETY SWITCH ACCESS DOOR is open. If a fault exists with the safety switch when access door is open, troubleshoot using NAVAIR 01-75PAC-12-6. e. f. Set VOR 1 to ON or PWR. (Rotate VOL knob to apply power.) At FDS Control: (1) (2) (3) g. Press STEERING PITCH switch-indicator from OFF to ON (if ON, press OFF then ON). Press STEERING ROLL switch-indicator from OFF to ON (if ON, press OFF then ON). Set COMP TRK switch-indicator to AMBER. c. d. e. f. g. h. a. b. c. d. 5. Set COURSE selector to FMS2 (EHSI and EFDI). Set BEARING selector to FMS2 (EHSI). Set HDG SRC switch to PRI (INS 2). Set ATTD SRC switch to PRI (INS 2). 8. d. Verify POWER and READY indicators illuminated.
On COMM System Selector (Aircraft Not Incorporating AFC 593): a. b. c. Set POWER switch to ON. Verify that MATRIX FAULT indicators are not on. Verify CIPHER DATA switch-indicator on COMM System Selector is configured as follows: (1) (2) (3) (4) Set TEST switch-indicator to amber. On UHF 2, set DATA switch-indicator to amber. On HF/UHF, verify that CIPHER DATA switch-indicator is green, if amber, then press to green. Set TEST switch-indicator to off.
Copilot Side Console: a. b. At ADF Control Panel, set ADF Control Mode switch to ADF. Set UHF 1 Function Selector switch to T/R+G and Mode switch to MAN. At INS 2 MSU, set mode switch to STBY (Aircraft Not Incorporating AFC 719). At IFF Transponder Control, set MASTER switch to STBY (Aircraft Not Incorporating AFC 719). At IFF Remote Control Unit (RCU), set MASTER switch to STBY (Aircraft Incorporating AFC 719). At GPS CDNU, set MODE switch to ON (Aircraft Not Incorporating AFC 719). At CDU/IFF Control, set CDU switch to ON (Aircraft Incorporating AFC 719). Set V/UHF POWER toggle switch to ON (Aircraft Incorporating AFC 707). 9.
On aircraft with AIC34 (Aircraft Incorporating AFC 593). a. b. In Rack F1/F2, apply power to UHF 2. At the NAVCOMM Station: (1) (2) (3) (4) Depress MODE switch to select the MAIN MENU on NAVCOMM DCCI. On the MAIN MENU select option 4, CONFIGURE. On CONFIGURE MENU select option 3, RADIO. Verify the UHF 2 indicates that this radio is available by an X being displayed in far righthand column. If not, use the and arrows to place a X in the righthand column. Use the MODE switch to reselect the MAIN MENU. This will take several depressions of the MODE switch. On the MAIN MENU select option 2, TRANSMIT/RECEIVE . On the TRANSMIT/RECEIVE Menu select the UHF 2 radio. Use the or arrows to select the TADILA mode. Depress the ENTR switch to save this selection.
2B-10. NAVCOMM STATION. 1. 2. 3. 4. 5. 6. Perform lamp test. At GPS CDNU, set MODE switch to ON (Aircraft Not Incorporating AFC 719). At CDU Control, set CDU ON/OFF switch to ON (Aircraft Incorporating AFC 719). At HF 1 and HF 2 Radio Set Controls, set COND selector switch to LO (Aircraft Not Incorporating AFC 738). At HF 1 and HF 2 Radio Set Controls, set function switch to STBY (Aircraft Incorporating AFC 738). At TP-4840 Printer: a. b. c. 7. Verify adequate paper supply. Press PWR pushbutton. Verify PWR indicator bar illuminated. 10.
On aircraft incorporating AFC 593: (1) At the NAVCOMM station, set the switch on the Link16 control panel to ON or STBY . CAUTION
(5)
(6) (7) (8) (9)
Ensure the MIDS fan in Rack D1 is running to provide system cooling. h. i. j. k. 4. Set TACAN to receive. Set VOR 2 to ON or PWR. Set V/UHF to T/R (Aircraft Not Incorporating AFC 719). Verify ASCL OTPI control is set to OFF.
(10) Verify that UHF 2 line indicates L11 and the mode is TADILA. At Data Link Control Monitor: a. Set POWER FAULT switch-indicator to amber. NOTE DTS GO and FAULT indicator will extinguish when TEST switch-indicator illuminates green.
At Copilot EFDS Control: NOTE COURSE and BEARING selector positions are displayed on either the EHSI or EFDI.
At PT-540(V)7/U HCR: a. b. c. Set INTERFACE SELECTION switch to PARALLEL. Verify adequate paper supply. Set POWER switch to ON.
Change 13
2B-5
NAVAIR 01-75PAC-12
b. c. d. e. f. g. h. Set TEST switch-indicator to green. Set DATA switch-indicator to amber. Set CONTROL switch-indicator to amber. Set INT SYNC switch-indicator to amber. Set DATA FAST switch-indicator to amber (INT NORM also illuminates amber). Set ERROR DETECT switch-indicator to amber. Verify the following indicators are illuminated green, and all others are extinguished: (1) (2) (3) (4) (5) 11. RADIO SILENCE ROLL CALL LONG BC SHORT BC TEST 4. 5. 1. 2. 3. a. b. Verify that the COMM Interface 2 MASTER CONTROL and CLOCK SELECT switches are in OPERATE. Verify TEST SELECT switch is set to position 24. 5. 6. 7. 8. CAUTION 9. If the Harpoon MCP lights are checked utilizing the TACCO light control panel test switch, do not hold the switch in test for longer than 60 seconds or the Harpoon lighting assembly will be damaged. Perform lamp test. At TACCO Armament Control Panel, set all selector switches to OFF. At Torpedo Preset Panel, set MANUAL STA SELECT switch to AUTO. At Directed Search Mode Select Panel, set MODE SELECT switch to OFF. At HACLCS control box: a. b. c. 6. 7. Set the POWER/OFF switch to POWER (on). After approximately 20 seconds, verify that the GO section of the GO/NO-GO indicator is illuminated green. Ensure the CMPTR/MAN switch indicator is set to CMPTR. 10. 11. At Magnetic Detection Set Control, set PWR switch to ON, SYS READY light illuminates steady (after time out). At 9TC, set power switch to POWER. At CGA, set PWR switch to PWR. At IRDS, set mode switch to STBY (Aircraft Not Incorporating AFC 705). At IRDS display, set PWR switch to ON (Aircraft Not Incorporating AFC 705). At MMIS TV Monitor, press PWR switch to activate TV Monitor (Aircraft Incorporating AFC 705). MMIS power up procedures (Aircraft Incorporating AFC 705): a. Ensure IRDS TURRET Control panel RETRACT/OFF/EXTEND switch is set to OFF and RETRACT indicator is illuminated. On Inferred Set Control: (1) (2) (3) 1. 2. 3. 4. 5. Ensure Mode Control knob is set to TURRET DISABLE. Set POWER/ON/OFF switch to ON. Ensure the green LED is illuminated.
2B-11. TACCO STATION.
b.
At NAV Simulator: a. b. c. d. e. Set POWER/OFF switch to POWER. Set HEADING/OFF switch to OFF and control to zero degrees. Set ROLL/OFF switch to OFF and control to zero degrees. Set TAS KNOTS/OFF switch to OFF and control to 200 knots. Set PITCH/OFF switch to OFF and control to zero degrees.
2B-13. SENSOR STATIONS 1 AND 2. Perform lamp test. On ASCL Receiver Control Indicator (C--I), depress POWER switch-indicator to ON. Verify DC POWER indicator extinguished. Verify edge lit control panels of ASCL C-I and ASCL Receiver-Indicator are illuminated. On ASCL C-I, check that the following switch-indicators illuminate green: a. b. c. d. e. 6. 7. RCVR COMD EQUIP CLEAR TEST COMD STATUS REQ Keyboard
At the IRDS AUX (IR) control set, set POWER/OFF switch to POWER (Aircraft Not Incorporating AFC 705). At MMIS TV Monitor, press PWR switch to activate TV Monitor (Aircraft Incorporating AFC 705).
12.
At NAVCOMM EFDS Control: NOTE COURSE and BEARING selector positions are displayed on the EHSI. a. b. c. Set COURSE selector to FMS2. Set BEARING selector to FMS2. Set HDG SRC switch to PRI (INS 1).
2B-12. SENSOR STATION 3. 1. 2. Perform lamp test. On both RADAR SET CONTROLS: a. b. c. d. e. 3. 4. Set PWR-OFF switch to PWR. Set ANT-DUMMY LOAD switch-indicators to DUMMY. Set FIXED-AGILE FREQ switch-indicators to FIXED. Set AFC-MAN switches to AFC. Set VIDEO TEST-OFF switches to VIDEO TEST.
13. 14. 15. 16.
At UHF 2 Radio Set Control, set function selector switch to T/R + G and mode switch to MAN. Set the UHF 2 UPPER/LOWER ANT Switch to the UPPER position. Set True Air Speed (TAS) OFF/POWER switch to POWER. At Rack B3:
Check that all other lamps and LED displays are extinguished. On ASCL C-I, hold LAMP TEST switch to YEL/LED. a. b. Observe all LED displays indicate 8. Check RCVR COMD, CHAN, BUOY TYPE, TEST MODE, EQUIP CLEAR, TEST COMD, CMPTR MODE, and STATUS REQ switch-indicators illuminate yellow.
At Antenna Control, set SCAN switch to FULL. At MAD Selector CONTROL, set MAD AUX switch to POWER.
2B-6
Change 13
NAVAIR 01-75PAC-12
8. Hold LAMP TEST switch to GRN/IND. a. Check that COMD ERR, SELF TEST, POWER INTRPT, EXT TEST, HIGH TEMP, DC POWER, CLEAR COMPL, and BIT SYNC indicators illuminate. Check RCVR COMD, CHAN, BUOY TYPE, TEST MODE, EQUIP CLEAR, TEST COMD, CMPTR MODE, and STATUS REQ switch-indicators illuminate green. Release LAMP TEST switch. c. DCU. 11. DCU Power On and Verification Procedures. To activate power from the Power Control Panel, perform the following steps: a. b. b. Ensure DCU UNIT POWER Control Panel ON-OFF switch is set to OFF. Open the right--hand door of the DCU DASD A3 assembly. NOTE The DASD thermal protection circuitry does not allow power to be applied to the DASD if the internal temperature of the DASD is at or below 0_C (32_F). d. e. f. g. h. Insert the System Controller (SC) removable DASD into the exposed DASD cradle and push it to the rear until it stops. Lower the latching handle to lock the DASD in place. Tighten the latching handle thumbscrew to secure the DASD within the enclosure. Close righthand door of DCU DASD assembly. Open the left--hand door of the DCU DASD A3 assembly. (3) The ACOUSTIC PWR CONT POWER switch-indicator, when set to ON, applies 3 phase AC power to the PEP Power Supplies and the DCU UNIT POWER Control Panel, and applies single phase AC power to the SS 1 and SS 2 displays. Local power switches on the units do not remove power from the units. Power to the units can be removed only by pressing the ACOUSTIC PWR CONT POWER switch-indicator to OFF. 10. DCU removable DASD Hard Drives installation procedure. a. At DCU perform the following steps: CAUTION l. Close lefthand door of DCU DASD assembly. NOTE Ensure the VDC, DDC, and RDSS portions of the TACCO internal initialization has been performed prior to DCU initialization. NOTE The DASD thermal protection circuitry does not allow power to be applied to the DASD if the internal temperature of the DASD is at or below 0_C (32_F). i. j. k. Insert the Analyzer Subunit (ASU) removeable DASD into the exposed DASD cradle and push it to the rear until it stops. Lower the latching handle to lock the DASD in place. Tighten the latching handle thumbscrew to secure the DASD within the enclosure. f. (4) (5) (6) THERMAL CUT/OFF extinguished. INTERLOCK OPEN extinguished. BATTLESHORT ON extinguished. A1 PS GO illuminated green. e. On DCU UNIT POWER Control Panel, set Unit power CIRCUIT BREAKER ON-OFF to ON. Set UNIT POWER ON-OFF switch to ON. NOTE The CABIN EXHAUST FAN switch must be set to the ON position at the Flight Station center instrument overhead panel. c. d. On ASP Power Control Panel at SS 1 Overhead, set Acoustic Power Control to ON. AT SS 2 on the General Light Control, press and hold NORMAL-TEST switch to TEST and verify the ACOUSTIC PWR CONT power and the OVHT indicators are illuminated. Release NORMAL-TEST switch. Verify indicators on the DCU UNIT POWER Control Panel are as follows: (1) (2) UNIT POWER ON illuminated green. A5 PS GO illuminated green.
b.
This equipment contains components subject to damage by electrostatic discharge (ESD). Use ESD precautionary procedures when touching, removing or installing.
c. 9.
On ASCL Receiver-Indicator, hold LAMP TEST switch to ON. a. Observe RECEIVER STATUS indications sequence: CMPTR 1 second OFF 1 second OFF 2 second ON b. c. d. Release LAMP TEST switch. RECEIVER STATUS panel should indicate that all receivers are set to channel 16. (Channel 20 does not indicate zero (0)). Push the switch down to observe the receiver channels 2140 are set to RF channel 16 (Channel 40 does not indicate zero (0)). Push the switch up after channels are observed. WARNING SIG LVL 3 5 0 CHAN 33 55 88
On DCU UNIT POWER Control Panel, pull out, lift, and hold LAMP TEST switch. Verify all indicators on DCU UNIT POWER Control panel are illuminated.
12.
At SS 1 and SS 2: a. b. c. Verify DISPLAY POWER indicators are illuminated green and not blinking. Verify LOCAL VIDEO MODE matrix is displayed on the SS 1 and SS 2 PEPs. Touch the CHRD DISPLAY HI RES TPS on the SS 1 and SS 2 PEPs.
Do not install or remove DASD with power applied at the
Change 13
2B-7
NAVAIR 01-75PAC-12
d. e. f. Touch the ACOUSTIC 1 VIDEO TPS on the SS 1 PEP. Touch the ACOUSTIC 2 VIDEO TPS on the SS 2 PEP. During Acoustic Processing Suite (APS) boot-up process, verify the boot-up script messages are being displayed on SS 1 and SS 2 FPDs. If no error messages are present at the end of the boot-up process, the AN/USQ78 Upgrade Logo will be displayed at both stations. (See Diagram 2B-1.) a. b. c. Set LAMP POWER switch to ON. Press LAMP TEST pushbutton switch. Verify that all indicators illuminate. followed by:
2B-15. COMPUTER STP LOAD FROM M-O DISK. 1. At Computer Maintenance Panel (CMP): a. b. c. d. Ensure all circuit breakers are closed. Ensure the DDC BIT ENBL/NO BIT/IDLE switch is set to IDLE. Ensure the VDC BIT ENBL/NO BIT/IDLE switch is set to NO BIT. Ensure the UNIT SEL switch is set to DDC. Ensure the AC ON/OFF power switch is set to ON. Depress the MCLR switch on the DDC CMP.
followed by:
LOADING SYSTEM TEST PROGRAM BUILD: XXXXXXXX
Where: followed by:
XXXXXXXX
Diagram 2B-1. AN/USQ-78 Upgrade Logo g. 13. Touch the ACOUSTIC 1 TPS at SS 1 PEP. 2.
e. f.
SYSTEM TEST PROGRAM BUILD: XXXXXXXX LOADED FROM DISK
APS Initialization. a. b. Verify the Graphics Verification Matrix is displayed on both PEPs. Verify that theUSQ--78 Upgrade Logo is correctly displayed on each FPD (see Diagram 2B--1) and touch the PASS TPS on each PEP.
After approximately 40 seconds, observe at the CMP: NOTE In all CMP menu operations and unless otherwise indicated, use the zero (0) or BACK and ENTR keys to select the previous menu. Menu selection can be accomplished by use of either depressing the corresponding number and ENTR, or by using the arrow keys to position backlighting over desired selection and depressing ENTR.
Where: followed by:
XXXXXXXX
SYSTEM TEST PROGRAM VERSION XX.XX RUNNING POWERUP BIT
Where: followed by:
XX.XX
14.
APS PEP Initialization. a. b. Verify LOAD SELECTION MATRIX is displayed on SS 1 and SS 2 PEP. Touch the ACOUSTEC 1 TPS at SS 1 PEP.
INITIALIZING...
followed by:
EXECUTING MOTOROLA PPCBUG DIAGNOSTICS...
15.
On Aircraft Incorporating AFC 593: a. b. At Acoustic Power Control panel, set POWER switch to ON. At SS 1 and SS 2 Flat Panel Displays (FPDs): (1) (2) c. d. Set power switch to on. Observe POWER and CAL lights are illuminated. 3. 4.
Where:
XXXX = AIP
or BMUP
(APPROX 5 SEC.)
Select LOAD AND EXECUTE and depress ENTER switch. Observe the following at the CMP:
DDC LOAD MENU 1. STP 2. TMS 3. PFL
followed by:
TRANSFERRING & DECOMPRESSING CONTROL FIRMWARE FROM ROM TO RAM... (APPROX 45 SEC.)
At ANK (Alphanumeric Keyboard), observe PWR light is illuminated. At Programmable Entry Panels (PEPs), observe powerup BIT status.
5. 6.
Select STP and depress ENTER. Observe the following at the CMP:
NOTE Allow up to 1 minute for the above message to complete. 7. Upon completion of running Power-Up BIT the DDC MAIN MENU is displayed.
2B-14. ELECTRONICS RACKS F1 AND F2. 1. At Rack F2, ARM/ORD Test Panel:
2B-8
Change 13
NAVAIR 01-75PAC-12
8. Repeat steps 3 through 5 to load STP, observe the following at the CMP:
ANKs to perform the Control Key Check. In case of a stuck key, the check may be run at an alternate console. 2. After the STP is loaded, the following is displayed at the selected consoles:
FLEET SYSTEM ISSUE TEST ASQ227 STARTED 1 1 XXXXXXXX
2.
Upon successful completion of the Date/Time Entry, the program automatically goes to the EEPROM Verification And Checksum Checks. For further explanation and additional information on Date/Time Entry, refer to NAVAIR 01-75PAC-12-12.
2B-19. EEPROM VERIFICATION AND CHECKSUM CHECKS. 1. Following Date/Time Entry the program checks the EEPROMs for correct version numbers and performs a checksum on each EEPROM. The version numbers and checksum results of each EEPROM are then compared with the current STP program. While the program is performing this check, the following message is displayed at the selected consoles:
RETRIEVING EEPROM VERSIONS AND CHECKSUM STATUS
followed by:
DEPRESS TACCO OR N AV/C O M OR SS3 NUMERIC 1 NUMERIC NUMERIC
followed by:
LOADING SYSTEM TEST PROGRAM BUILD: XXXXXXXX
followed by: Where:

XXXXXXXX

CARD
Where: followed by:
XXXXXXXX
3. 4.
At the ANK, sequentially press numerics 1 through 0, DEL, and ENTER. After numeric 1 is pressed, the cue for the selected console is updated to DEPRESS NUMERIC 2, DEPRESS NUMERIC 3, and so forth, until ENTER is pressed. After ENTER is pressed, the following message is printed:
CONTROL KEY CHECK COMPLETE AT XXXXXXX
EEPROM CARD VERSION XXX XXX XXX XXX XXX XXX XXX XXX N/A XXX XXX X X X X X X X X X X
VERIFICATION FILE VERSION YYY YYY YYY YYY YYY YYY YYY YYY N/A YYY YYY Y Y Y Y Y Y Y Y Y Y CHECKSUM STATUS ZZZ ZZZ ZZZ ZZZ ZZZ ZZZ ZZZ ZZZ N/A ZZZ ZZZ Z Z Z Z Z Z Z Z Z Z
SYSTEM TEST PROGRAM BUILD: XXXXXXXX LOADED FROM DISK
Where: followed by:

ASQ227 XXXXXXXX
XXXXXXXX
5.
Where:
BMUP STP
XXXXXXX = TACCO
or
NAV/COM
or
SS 3
6. = Program version number. BIT AND HARDWARE
Where:
XXXXXXXX
Upon successful completion of the Control Key Check, the program automatically goes to the Date/Time Entry. For further explanation and additional information on Control Key Check, refer to NAVAIR 01-75PAC-12-12.
G G D D D D D D D V V
P P S S S S S S S D D
C C P P P P P P P C C
0 1 0 1 2 3 4 5 6 0 1
2B-16. STP INITIATED DDC POWER-UP CONFIGURATION RESULTS. 1.
2B-18. DATE/TIME ENTRY. 1. Upon completion of the Control Key Check, the program displays the following Date/Time Tableau at the selected console:
ENTER DATE AND TIME MM/DD/YYYY HH:MM WHEN COMPLETED DEPRESS ENTER
T0 BURN EXECUTE 6 7
EEPROMS, TERMINATE AND P RE F L I G H T L O A D E R P R O G R A M
After STP is loaded and before execution, the DDC BIT Test results are printed for each module that fails BIT testing. NOTE Following the printing of BIT errors, a comparison is made of all slots with a default slot configuration. Any slot that differs from the default data is printed identifying the slot and its default and current status. Slots not identified in the printout conform to the default status.
ADVANCE TERMINATE
Where:
Where:
2.
For further explanation and additional information on BIT testing, refer to NAVAIR 01-75PAC-12-12. Select TACT COMPUTR MODE on TACCO, SS 3, or NAVCOMM PEP. NOTE Twelve keys are required at the TACCO, SS 3, or NAVCOMM
MM/DD/YYYY = Month, day and year HH:MM = Hour and minutes
NOTE All fields must be complete to advance the program. a. b. Enter the date and time field by pressing the appropriate numerics. When completed depress ENTER. Date/Time entries are used for display on tableaus and to time tag test results that are stored on the RDSS M-O disk. 2.
= Firmware version number in application module. YYYY = Firmware version number of loadable file located on the load device. ZZZZ = PASS or FAIL, result of checksum comparison between firmware version loaded in the module and comparing its results to that stored on load device. N/A = Unpopulated slot (expansion).
XXXX
2B-17. CONTROL KEY CHECK. 1.
NOTE Depressing NUM 6 bypasses download of EEPROMs and advances to the rest of the STP program. Depressing NUM 7 terminates STP in order to download EEPROM programs. Refer to NAVAIR 01-75PAC-12-12 for EEPROM download instructions.
Change 13
2B-9
NAVAIR 01-75PAC-12
2B-20. AIRCRAFT EQUIPMENT CONFIGURATION PROCESSING. 1. Upon completion of the EEPROM validation, the program displays the Configuration List Tableau at the selected console with either the stored aircraft or default configuration. The following is an example of the default Configuration List Tableau.
AIRCRAFT EQUIPMENT 0+0 O 0+1 R 0+2 R 0+3 V 0+4 D 0+5 D 0+6 D 0+7 D CONFIG MENU STATUS XXXXXX
2B-21. SYSTEM TEST MAIN SELECT TABLEAU.

MAIN S 0 0 0 0 0 X 7 9 E + + + + + X L 0 1 2 3 4 X T P EC A S S U D XX ER RI SELECT T U I P T I X M N M O U C L G X N O M L I I N X A S D A T A T O X T C E T A L I S X E R
3.
Select CONTINUE and observe that the AUTOMATIC SYGNOG SELECT STATUS Tableau is displayed.
2B-23. AUTOMATIC SYGNOG SELECT/STATUS TABLEAU AND KEY OPTIONS.

IC NEO TE ES TIC XXX EEN US ST S XXXXX MAIN S 0 0 0 0 0 X 7 9 E + + + + + X L 0 1 2 3 4 X T P EC A S S U D XX ER RI SELECT T U I P T I X M N M O U C L G X N O M L I I N X A S D A T A T O X T C E T A L I S X E R
P E E M R R R R
T S S E I I I I
ICS ERVED ERVED VDC VE A VE B VE C VE D
T M E I A X I T
Y T F F F
Y R A A A
Y U L L L
Y E S S S
YYYY E E E
Where: 1.
XXXX...XXXX
= Verification line
T M E I A X I T
IC NEO TE ES TIC XXX EEN
US ST S XXXXX
NUM NUM NUM
6 8 9
ADVANCE ACCEPT CONFIG PRINT SCREEN
When configuration processing is completed, the System Test Main Select Tableau is displayed at the selected console. The operator can then select a specific test mode at the ANK. Prior to selection of ENTER, verify selected mode, then depress ENTER. Depressing NUM 7 terminates the STP, the displays go blank, STP TERMINATED is printed, the CMP displays SYSTEM TEST PROGRAM TERMINATED and the program stops. Depressing NUM 9 prints the displayed tableau. 1.
Where:
XXXX...XXXX
= Verification line of selected mode.
2.
When the Main Select Tableau is displayed, depressing 0+0 and ENTER on the TACCO, SS 3, or NAVCOMM ANK selects Automatic SYGNOG. After selection of Automatic SYGNOG, the Automatic SYGNOG Select Test Tableau will be displayed at the TACCO and NAVCOMM consoles. The Automatic SYGNOG Select/Status Tableau will be displayed at the TACCO and SS 3 consoles. The tableau selections are limited to nine entries per table, whereas the Select/Status Tableau will display all available selection/status entries. Both Automatic SYGNOG Selection tableaus are configuration dependent. The following lists the order of each line entry and its equipment dependency. Listed Line Entries DISK HACLCS Equipment Dependency None None Configuration Option(s) None None
Where: 2.
XXXXXX = MMIS or IRDS YYYYYYYY = AIP, BMUP, CUP, TCDL,
or INVALID
3.
2.
Upon operator selection of a specific equipment name from the aircraft configuration list, the equipment name is displayed on the verification line with the alternate equipment option. Depressing ENTER changes the equipment name to the alternate option. Depressing NUM 8 and ENTER accepts the options currently displayed for each piece of equipment. The STP saves the options on the M-O disk, prints the current aircraft configuration, which will be used throughout STP testing, and exits aircraft configuration processing. The following is the printout of the default aircraft configuration:
FLEET C V R E O D D D D O D A S P R R R R N C D M T I I I I ISSUE ASQ227 B U S R I U L L L M P S E S S S UP 115 66 XXXXXXXX
2B-22. SS 1 AND SS 2 APS STP. NOTE
S S
3.
The Coordinated Mode should not be selected due to Central Computer and APS software incompatibilities. The list of equipment in the Central Computer STP does not agree with equipment presently installed at SS 1 and SS 2. Test lines for the SASP configured aircraft are still listed in the Status Tableau and the Test Status lines for the APS equipment are not presently displayed. 3.
1.
FIGURATION B AR A A ICS M VE A T VE B F VE C F VE D F
M P L M R A A A
Select Automatic SYGNOG at TACCO, SS 3, or NAVCOMM console and then select SS 1/2 SASP option from the Automatic SYGNOG Select/Status Tableau by depressing the displayed keys and then ENTER. The APS STP should have been previously loaded and SS 1/2 SASP testing in progress. The following message is displayed at the controlling consoles along with operator key options:
SASP STP TESTING IN PROGRESS F1 NUM RESTART 2 CONTINUE
An example of the Automatic SYGNOG Select Tableau displayed at the TACCO or NAVCOMM consoles is provided below:
S 0 0 0 0 0 0 0 0 3 6 7 9 E + + + + + + + + LECT TEST 0 DDC BIT 1 VDCU BI 2 RESERVE 3 DISK 4 HACLCS 5 RESERVE 6 ALL 7 SS1/2 S T A T P E D E R ST RE V TO RMINA INT S E N T C
2.
T D
E E E
D ASP
Where: 4.
XXXXXXXX
= Program version number
NOTE CONTINUE establishes the DDC in the SASP STP monitor mode. Do not use the RESTART option.
For further explanation and additional information on Configuration Processing, refer to NAVAIR 01-75PAC-12-12.
NTRY EXT TEST E REEN
2B-10
Change 13
NAVAIR 01-75PAC-12
4. An example of the TACCO and SS 3 displayed Automatic SYGNOG Select/Status Tableau is depicted as follows:
FLEET ISSUE XXXXXXXXXXXX MM/DD/YY AUTOMATIC SYGNOG SELECT/STATUS TABLEAU S 0 0 0 0 0 0 0 0 3 6 7 8 9 E + + + + + + + + LECT 0 1 2 3 4 5 6 7 T D V R D H R A S T A T D P E D D E I A E L S E D E I R S C C S S C S L 1 S V R S I T BIT U BIT ERVED K LCS ERVED /2SASP T STATUS AB AB AB AB AB AB
(4)
TERMINATE (NUM 7), if selected while the Automatic SYGNOG Select/Status Tableau is displayed, will cause the termination of Automatic SYGNOG and the display of the STP Main Select Tableau. If selected while one or all Automatic SYGNOG tests are executing, then the test(s) will discontinue processing and the program will display the Automatic Test Select and Select/Status Tableaus. The Disk test, when terminated, may display instructional messages for actions necessary to properly perform the termination process. If all tests are executing and termination is selected, then scroll test alerts to view and respond to these instructional messages. DISPLAY STATUS (NUM 8) toggles the display between the Automatic SYGNOG Select/Status and Simultaneous Status Tableaus. PRINT SCREEN (NUM 9) at NAVCOMM causes the NAVCOMM display to be printed. Depressing NUM 9 at TACCO or SS 3 causes the Automatic SYGNOG Status Tableau to be printed with the following legends displayed as appropriate next to the test titles: COMPLETED TERMINATED COMPLETED TERMINATED
9.
Tests selected to run individually display messages on the TACCO and SS 3 consoles. Informative messages detail the progress of a test, instructional messages specify necessary operator actions, and error messages instruct the operator on error isolation or maintenance action. Error messages that include the test title, test number, and may include expected/received codes, are displayed and printed. The operator is given key depression options to exit, continue, or repeat the test in progress. At this time, the operator may terminate the test and return to the Automatic SYGNOG Select/Status Tableau. Automatic SYGNOG tests may be individually selected for execution or all tests may be selected for concurrent processing. When all tests are chosen for execution, test messages are not immediately displayed, but are stored with a test alert displayed on the bottom of the Automatic SYGNOG Select/Status Tableau. Alerts are selected in the same fashion as selecting tests, but the result is a displayed test message. A response may be made to the message or NUM 5 may be depressed, which causes the display of the next stored message. If a response is entered, the Automatic SYGNOG Select/Status Tableau is redisplayed. If there are no more stored messages, the Automatic SYGNOG Select/Status Tableau is displayed. When only one test remains, its executing messages are not queued, but are immediately displayed. When Automatic SYGNOG tests finish execution, the test status is displayed on Automatic SYGNOG Select/Status and Task tableaus. In addition, SYGNOG test status is stored on the RDSS M-O disk. NOTE The following standardized keyset usage will be used throughout the Automatic SYGNOG testing and valid keys will be presented to the operator whenever an operator response is required: NUM 1 - EXIT. This entry terminates the test in progress. NUM 2 - CONTINUE. This entry executes the next test step. NUM 3 - REPEAT. This entry repeats the last executed test step. NUM 4 - NO. This entry answers the question posed in an instructional message. NUM 4 - OBSERVED ERROR. This entry registers an operator observed error. NUM 5 - SCROLL. This entry is only available when the ALL Mode is selected. After selecting any of the Alert messages, this option will allow the operator to scroll between all pending alert messages. NUM 6 - YES. This entry answers the question posed in an instructional message. NUM 6 - ADVANCE. This entry executes the next test step.
10.
(5)
ENTRY TO NEXT TEST MINATE PLAY STATUS NT SCREEN XXXXXXXXXXXX = Program version number MM/DD/YY = Month, day, and year A B = Current test status
(6)
Where:
A and B definitions:
S C T S C T
11. ERROR ERROR
E E E
Test started without error Test completed without error Test terminated without error Test started with error Test completed with error Test terminated with error
6.
The execution of the DDC BIT will cause STP to lose control of the system to BIT processing. STP will blank the station displays prior to the initiation of the DDC BIT. At the conclusion of DDC BIT, the DDC MAIN MENU will be be displayed on the CMP. The execution of the VDCU BIT will not cause STP to lose control of the DDC since VDCU BIT only executes in the VDC. During this time, STP is in an idle state waiting for VDC communication to be reestablished. The console displays will display various test patterns during VDCU BIT execution since the MMVPs are located in the VDC and are tested during this BIT. At conclusion of VDCU BIT, depending on the initiation path, the BIT results will be available automatically or via key selections. NOTE After VDCU BIT, TACT COMPUTR MODE must be reselected on the PEP to display tableau.
2B-24. AUTOMATIC SYGNOG TESTS.
5.
Press the applicable numerics at TACCO, SS 3 or NAVCOMM ANK to select the desired Automatic SYGNOG test. After pressing the desired numerics, press the ENTER key to activate the selection. If a wrong numeric is accidentally pressed, use the DEL key to restart the selection process. a. The following keys, when depressed at the TACCO, SS 3, or NAVCOMM ANK and followed by an ENTER, perform the following functions: (1) TEST REENTRY (NUM 3) causes the most recently executed Automatic SYGNOG test (if any) to be repeated. ADV TO NEXT TABLE (NUM 5) causes the display of the alternate table of the Select Test Tableau to be displayed. Multiple tables of the Select Test Tableau are only available for those aircraft configurations that have more tests than can be displayed on a single display. ADV TO NEXT TEST (NUM 6) causes selection of the next test after the most recently executed Automatic SYGNOG test (if any).
7.
(2)
8.
When Automatic SYGNOG tests are executing, the TACCO and NAVCOMM consoles display a task tableau with the following legends displayed as appropriate next to the test titles: TERM TERM ERROR COMP COMP ERROR STARTED STARTED ERROR
(3)
Change 13
2B-11
NAVAIR 01-75PAC-12
NUM 7 - TERMINATE. This entry terminates the test in progress. If NUM 7 - TERMINATE is selected from MAIN MENU it will terminate the STP. 1. DISK Test. NOTE Should an error occur during the testing, an error message will be printed and displayed. a. b. 2. When the DISK Test is selected, the DISK Test is automatically started. Individual cues instruct the operator in the DISK Test. 4. a. available only after an error has occurred. An E is displayed on the Test Status Tableau. 3. REPEAT STEP: a. Depressing NUM 3 causes the program to repeat the step where an error has just occurred. This option is available only after an error has occurred. If the repeat option is used and the error is not detected, the E is removed from the Status Tableau. 2B-26. SIMULTANEOUS SYGNOG TEST.
OBSERVED ERROR: Depressing NUM 4 informs the computer that the station operator has observed an error. This causes the program to print an error message and instructional message appropriate to the step of the test in progress. Also, an E is displayed next to the test title of the Status Tableau.
T M E I A X I T
US ST S XXXXX
HACLCS Test. NOTE Should an error occur during the testing, an error message will be printed and displayed. a. b. At the Harpoon Weapon System (HWS), select Computer Mode. When the HACLCS Test is started, the following message is displayed at the TACCO and SS 3 consoles:
HACLCS TEST IN PROGRESS
Where: 1.
XXXX...XXXX
= Verification line.
5.
ADVANCE: a. Depressing NUM 6 informs the computer that observed equipment response is acceptable, and causes the program to proceed with the next sequential step of the test in progress. 2.
When the Main Select Tableau is displayed, pressing 0 + 1 and ENTER on the TACCO, SS 3, or NAVCOMM ANK selects Simultaneous SYGNOG. The start of station simultaneous testing is indicated by test select tableaus and task tableaus being displayed at the TACCO and NAVCOMM consoles. The Simultaneous SYGNOG Status Tableau is displayed on the TACCO and SS 3 consoles. The Flight Select/Status Tableau is displayed on the Pilot display. At the TACCO ANK, pressing NUM 0, ENTER displays the TACCO Select Tableau on the TACCO console. Then pressing NUM 8, ENTER at the TACCO or NAVCOMM ANK, will return the TACCO console to the display of the Simultaneous SYGNOG Status Tableau. At the SS 3 ANK, pressing NUM 0, ENTER displays the SS 3 Select Tableau on the SS 3 console. Then pressing NUM 8, ENTER at the SS 3 ANK, will return the SS 3 console to the display of the Simultaneous SYGNOG Tableau. Pressing NUM 8, ENTER at the TACCO or NAVCOMM ANK, while the Simultaneous SYGNOG Status Tableau is displayed on the TACCO console, toggles between the display of the Automatic SYGNOG Select/Status Tableau and Simultaneous SYGNOG Status Tableau. Pressing NUM 8, ENTER at the SS 3 ANK, while the Simultaneous SYGNOG Status Tableau is displayed on the SS 3 console, toggles between the display of the Automatic SYGNOG Select/Status Tableau and Simultaneous SYGNOG Status Tableau. Pressing NUM 7, ENTER at the TACCO or NAVCOMM ANK, while the Simultaneous SYGNOG Status Tableau is displayed on the TACCO console, causes Simultaneous SYGNOG processing to cease and the STP Main Select Tableau is displayed. Pressing NUM 7, ENTER at the SS 3 ANK, while the Simultaneous SYGNOG Status Tableau is displayed on the SS 3 console, causes Simultaneous SYGNOG processing to cease and the STP Main Select Tableau is displayed.
6.
TERMINATE: a. Depressing NUM 7 terminates the test in progress and causes the program to return to the Test Selection Tableau or Simultaneous SYGNOG Status Tableau. 3.
7.
DISPLAY STATUS: a. Depressing NUM 8, ENTER toggles the display at which the key is selected, between the Automatic SYGNOG Select/Status Tableau and Simultaneous SYGNOG Status Tableau. When the Station Select Tableau is displayed, this control key causes the display of the Simultaneous SYGNOG Status Tableau.
2B-25. SIMULTANEOUS SYGNOG SWITCH FUNCTIONS. NOTE Key and switch numbers have been omitted since numbers vary between station ANKs and DEPs. 1. SEQUENTIAL: a. Depressing NUM 0 + X, ENTER causes each test (with the exception of TACCO POFA test, and the SS 1 and SS 2 STP test) listed in the station Select Test Tableau to be entered automatically after completion of the prior test. Upon completion of all tests, the station TEST COMPLETE message is displayed. If one or more tests were terminated, the station Select Test Tableau or the Simultaneous SYGNOG Status Tableau is displayed upon completion of final test. 8.
4.
PRINT SCREEN: a. Depressing NUM 9 at the Flight DEP, NAVCOM, TACCO, or SS 3 ANK prints the contents of the display at the respective console. KEY DEVICE FLIGHT DEP TACCO ANK NAVCOM ANK SS 3 ANK DISPLAY DEVICE Pilot Display Area TACCO Tactical Display Area NAVCOM Tableau Area SS 3 Tactical Display Area 5.
2.
CONTINUE: a. Depressing NUM 2 causes the program to continue with the next sequential step of the test in progress. This option is
2B-12
Change 13
NAVAIR 01-75PAC-12
6. The following is an example of the Simultaneous SYGNOG status display:
FLEET ISSUE SIMULTANEOUS FLIGHT STATION DEP PCHRD DIRECTOR NAVIGATION ARM/ORD ASQ227 X XX XX XX MM/DD/YY SYGNOG ST AT US T ABLEAU TA P A C T CCO STATION EP A B NK A B HRD A B RACKBALL A B
printed, then the output is a status printout. The following is an example of the Simultaneous SYGNOG status printout:
FLEET ISSUE ASQ227 SIMULTANEOUS SYGNOG XXXXXXX HH:MM:SS STATUS TABLEAU MM/DD/YY
STARTED COMPLETED TERMINATED STARTED COMPLETED TERMINATED 8.
ERROR ERROR ERROR
A A A A A
B B B B B
NAV/COM STATION PEP A ANK A CHRD A DIRECTOR A NAVIGATION A DATA LINK A TRACKBALL A PRINTER A
B B B B B B B B
SS P A C T SS P A C T SS P A C T R S Y
1 STATION EP A NK A HRD A RACBALL A 2 STATION EP A NK A HRD A RACKBALL A 3 STATION EP A NK A HRD A RACKBALL A ADAR A AD A YYYY A
B B B B
B B B B
SS 1/2 SASP SC DIAGNOSTIC PEP1 TEST PEP2 TEST AU DIAGNOSTIC ASCL 1 TEST ASCL 2 TEST END TO END TRACKBALL 1 TRACKBALL 2
A A A A A A A A A
B B B B B B B B B
B B B B B B B
ARM/ORD DEP PANEL 0+ENTER 7 8 9 STATION SELECT TERMINATE DISPLAY STATUS PRINT SCREEN
STATION A A B B
Where:
XXXXXXX YYYYY MM/DD/YY
= Program version number = MMIS or IRDS = Month, day, year A and B definitions
FLIGHT STATION DEP AAAAAAAAA PCHRD AAAAAAAAA DIRECTOR AAAAAAAAA NAVIGATION AAAAAAAAA ARM ORD AAAAAAAAA TACCO STATION PEP AAAAAAAAA ANK AAAAAAAAA CHRD AAAAAAAAA TRACKBALL AAAAAAAAA NAVCOM STATION PEP AAAAAAAAA ANK AAAAAAAAA CHRD AAAAAAAAA DIRECTOR AAAAAAAAA NAVIGATION AAAAAAAAA DATALINK AAAAAAAAA TRACKBALL AAAAAAAAA PRINTER AAAAAAAAA SS3 STATION PEP AAAAAAAAA ANK AAAAAAAAA CHRD AAAAAAAAA TRACKBALL AAAAAAAAA ANALOG AAAAAAAAA SAD AAAAAAAAA YYYYY AAAAAAAAA ARM ORD STATION PEP AAAAAAAAA PANEL AAAAAAAAA SS 1/2 SASP SC DIAGNOSTIC AAAAAAAAA PEP 1 TEST AAAAAAAAA PEP 2 TEST AAAAAAAAA AU DIAGNOSTIC AAAAAAAAA ASCL 1 TEST AAAAAAAAA ASCL 2 TEST AAAAAAAAA END TO END AAAAAAAAA TRACKBALL 1 AAAAAAAAA TRACKBALL 2 AAAAAAAAA
BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB BBBBB
To select a Simultaneous SYGNOG test, ensure the Station Select Tableau is displayed. Select the appropriate numerics for the desired test and ENTER to activate the test. Select CANCEL anytime during the process to start over. Once the test is executing, progress messages will be displayed at test station and on the Simultaneous SYGNOG Task Tableau displayed on the TACCO and NAVCOMM consoles. When a test is selected at the TACCO and NAVCOMM consoles, the Task Tableau is replaced with a test information message. When Simultaneous SYGNOG tests finish execution, the test status is displayed on the Simultaneous SYGNOG Status Tableau. In addition, SYGNOG test status is stored on the RDSS M-O disk and is retained for 24 hours. NOTE
9.
10.
When the program is in an error branch, the operator is given key depression options to start over, continue, repeat, or terminate. These key functions are defined in SIMULTANEOUS SYGNOG Switch Functions. Error printouts. When a malfunction is detected, an error printout is generated indicating the station, test step number, and either the expected/received octal codes or an operator observed error message.
11.
While the Simultaneous SYGNOG Status Tableau is displayed on the TACCO console, depressing NUM 7, ENTER at the TACCO or NAVCOMM ANK returns the system to the Main Selection Tableau. While the Simultaneous SYGNOG Status Tableau is displayed on the SS 3 console, pressing SS 3 NUM 7, ENTER returns the system to the Main Selection Tableau.
Where:
S C T S C T
E E E
Test started without error Test completed without error Test terminated without error Test started with error Test completed with error Test terminated with error
XXXXXXX MM/DD/YY HH:MM:SS YYYYY AAAAAAAAA
= Program version number = Month, day, year = Hours, minutes, seconds = MMIS or IRDS = COMPLETED, STARTED, TERMINATED or blank BBBBB = ERROR or blank NOTE
7.
If the Simultaneous SYGNOG Status Tableau is selected to be
The following A and B entries are printed as applicable next to the test title on the printout:
T M E I A X I T
US ST S XXXXX
Where:
XXXX...XXXX =
Verification line.
Change 13
2B-13
NAVAIR 01-75PAC-12
12. During the simultaneous station testing, the station tests are placed under station operator control by means of switch functions that provide certain options (see applicable Crew Station Readiness Test procedures for specific switch assignments).
Do not remove DASDs with power applied. (7) (8) (9) Open the right--hand door of the DCU DASD A3 assembly. Loosen the SC DASD latching handle thumbscrew and lift the handle. Grasp the handle and pull the DASD from the slot, supporting the DASD with the opposite hand while removing. CAUTION
2B-27. SS 1 AND SS 2 POWER DOWN PROCEDURES (APPLICABLE TO AIRCRAFT INCORPORATING AFC 706). NOTE The sequence in which the various stations are shut down is not critical, but ensure all systems power is shut down, and the FPD PWR, PEP PWR, PCHRD PWR and DEP Power switches are in the OFF (down) position at each station prior to turning off power at the TACCO POWER CONTROL Panel. 1. At SS 1 and SS 2: a. Perform SS 1 and SS 2 software shutdown. (1) If in End to End or normal operations, depress SYS MODE on PEP. The SELECT SYSTEM MODE cue displays as shown below. Depress DOWN on PEP to shut down the system and park the DASD.
SHUTDOWN MENU 1. EJECT DISK 2. SHUTDOWN **WARNING** RDSS WILL BE SHUTDOWN DO YOU WANT TO PROCEED NO YES
c. 2.
Screen goes blank and M-O disk is ejected. Remove M-O disk when ejected.
At the TACCO POWER CONTROL Panel: a. Set the following peripheral equipment power switches to OFF: (1) (2) (3) (4) (5) (6) VDC ARM/ORD PNL DDC RDSS BARO ALT RDR VIDEO
The DASDs must be placed in a protective case for carrying. (10) Place the DASD in the protective carrying case. (11) Open the left--hand door of the DCU DASD A3 assembly. (12) Loosen the ASU DASD latching handle thumbscrew and lift the handle. (13) Grasp the handle and pull the DASD from the slot, supporting the DASD with the opposite hand while removing. (14) Place the DASD in the protective carrying case. (15) Close the doors of the DCU DASD A3 assembly. (16) Store the DASDs in the appropriate secure location. 2B-28. AVIONICS POWER TURNOFF. NOTE The sequence in which the various stations are shut down is not critical, but ensure all systems power is shut down, and the FPD PWR, PEP PWR, PCHRD PWR and DEP Power switches are in the OFF (down) position at each station prior to turning off power at the TACCO POWER CONTROL Panel. 1. At the RDSS: a. Select SHUTDOWN on MAIN MENU. NOTE Down arrow () indicates scroll point using to view remainder of menu.
1. 2. 3. 4. 5. 6. MAIN MENU SHUTDOWN CONFIGURATION SASP LOAD RDSS BUILTIN TEST DRIVE STATUS UTILITIES
NORM OPER
TAPE REPLAY
E/E TEST
DOWN
3.
At the CMP, set the AC power ON/OFF switch to OFF. CAUTION To prevent possible internal component failure, the INERTIAL SYSTEM NO. 1, INERTIAL SYSTEM NO. 2, and 115VAC A RUN circuit breakers on the Aft Electronic circuit breaker panel shall remain open (pulled) when the inertial navigation system(s) are not being used.
(2)
If in SC Diagnostics, re-depress SC if necessary. Load Selection Matrix will display. Depress SHUT DOWN on PEP. If in SYSTEM TEST (SASP STP), redepress any active test (or allow it to complete), then press TERM STP. Load Selection Matrix will display. Depress SHUT DOWN on PEP. When LynxOS is Down is displayed, secure power to the ASP by setting the Acoustic PWR CNT ON/OFF switch to OFF. At DCU: Verify A1 PS GO is extinguished. CAUTION
(3)
(4)
4.
(5) (6)
At the Aft Electronic circuit breaker panel open (pull out) the Inertial System NO. 1, Inertial System NO. 2, and 115VAC A RUN circuit breakers. CAUTION To prevent possible internal component failure, the HSI PILOT, HSI COPILOT, and HSI NAV circuit breakers on the Forward Electronic circuit breaker panel and the PILOT EFDI and COPILOT EFDI circuit breakers on the Forward Electrical Load Center shall remain open (pulled) when power is applied to the aircraft.
This equipment contains components subject to damage by electrostatic discharge (ESD). Use ESD precautionary procedure when touching, removing or installing. Refer to NAVAIR 01-1A-23 (WP 005 00).
5. 6.
At the Forward Electronic circuit breaker panel, open (pull out) the HSI PILOT, HSI COPILOT, and HSI NAV circuit breakers. At the Forward Electrical Load Center, open (pull out) the PILOT EFDI and COPILOT EFDI circuit breakers.
b.
Select SHUTDOWN from SHUTDOWN MENU.
2B-14
Change 13
SECTION 3
KEYSETS AND TRAYS
SECTION 3 KEYSETS AND TRAYS
NAVAIR 01-75PAC-12
(TACCO STATION) A324 TACCO POWER CONTROL (SEE NAVAIR 01-75PAC- -2) -12POWER CONTROL COMPUTER RUN START STOP BOOT STRAP MANUAL OV TEMP POWER ON
(CENTER CONSOLE) (RACK D1) POWER DISTRIBUTION BOX A291 1J1 2J8 POWER CONTROL LINES A383 A511 1 2 3 2J2 115 VAC 3
PWR SUP
(FS 440) TB452
(FS 288) P/J294
5FL1J1
C-7629/AYA- CONTROL -8 INDICATOR (PILOT KEYSET)

INTENSITY ADJ M -1 M -2 M -3 M -4 M - 21 M -5 M -6 M -7 M -8 M - 23 M -9 M - 10 M - 11 M - 12 M - 28 M - 13 M - 14 M - 15 M - 16 M - 33 M - 17 M - 18 M - 19 M - 20 M - 34 M - 35 M - 29 M - 30 M - 31 M - 32 M - 24 M - 25 M - 26 M - 27 FAULT M - 22
5J1
(FS 288) J/P290 PILOT KEYSET LAMP OUTPUTS (FS 288) J/P288 PILOT KEYSET SWITCH INPUTS B A
(TACCO STATION) PP-4986/ASA-70 POWER SUPPLY (MPD POWER SUPPLY) 2J5 115 VAC 3 2J1
AUTO RECY OV TEMP
STOP LOGIC UNITS OV TEMP 2
OFF OV TEMP
5J2
(SEE NAVAIR 01-75PAC- -2) -12-
OFF KEYSETS
OFF MAG TAPE DATA CONV
OFF RDR SCAN
OFF
OFF
OFF
OFF
TACO MPD
SS3 MPD
ARO
PILOT DIS
OFF
OFF
OFF
OFF
2J3 (RACK D1) DPS ELECTRONIC CIRCUIT BREAKER PANEL PILOTS KEYSET A B C MULTIPURPOSE DISPLAY TACO A B C UNIVERSAL KEYSET NAV/COMM A B C UNIVERSAL KEYSET SENSOR STA NO 1 A 4 B C UNIVERSAL KEYSET SENSOR STA NO 2 A 4 B C MULTIPURPOSE DISPLAY SENSOR STA NO 3 A B C ORD IND PANEL B PWR DISTR BOX DC 28 VDC 115 VAC B 115 VAC 3
M -1 M -2 M -3 M -4 M - 21 M -5 M -6 M -7 M -8 M - 23 M -9 M - 10 M - 11 M - 12 M - 28 M - 13 M - 14 M - 15 M - 16 M - 33 M - 17 M - 18 M - 19 M - 20 M - 34 M - 35 M - 29 M - 30 M - 31 M - 32 M - 24 M - 25 M - 26 M - 27 FAULT M - 22
AC AND DC POWER DC POWER
C D E
2J4 (NAVCOM STATION) 2J1 115 VAC 3 2J3 115 VAC 3

PWR SUP
DC POWER
4FL1J1
C-7627(P)/AYA- CONTROL -8 INDICATOR (NAVCOMM UNIVERSAL KEYSET)

INTENSITY ADJ M -1 M -2 M -3 M -4 M - 21 M -5 M -6 M -7 M -8 M - 23 M -9 M - 10 M - 11 M - 12 M - 28 M - 13 M - 14 M - 15 M - 16 M - 33 M - 34 M - 35 M - 29 M - 30 M - 31 M - 32 M - 24 M - 25 M - 26 M - 27 FAULT M - 22
4J1 NAVCOMM LAMP OUTPUTS 4J2 NAVCOMM SWITCH INPUTS G F
(SENSOR STATION 3) PP-4986/ASA-70 POWER SUPPLY (MPD POWER SUPPLY) 2J6 115 VAC 3 115 VAC 3 6J5 6J1
M - 17
M - 18
M - 19
M - 20
6J3
AC AND DC POWER DC POWER
H J K
2J9 115 VAC 3
6J4 (RACK F2) C-7628/AYA- CONTROL -8 INDICATOR (ORDNANCE PANEL)

POWER SUPPLY FAULT BIN SLT
DC POWER
6FL1J1 115 VAC 3 115 VAC 3
6J1 ORDNANCE PANEL SWITCH INPUTS L
O R D N A N C E P A N E L
LAMP INTENSITY PRO- 1 PRO- 2 LOAD * M -1 * M -2 PRO- 3 PRO- 4 UNLOAD * M -3
(SENSOR STATION 1) 10FL1J1 115 VAC 3 115 VAC 3

M -1 M -2 M -3 M -4 M - 21 M -5 M -6 M -7 M -8 M - 23 M -9 M - 10 M - 11 M - 12 M - 28 M - 13 M - 14 M - 15 M - 16 M - 33 M - 17 M - 18 M - 19 M - 20 M - 34 M - 35 M - 29 M - 30 M - 31 M - 32 M - 24 M - 25 M - 26 M - 27 FAULT M - 22
ORDNANCE PANEL LAMP OUTPUTS
C-7627(P)/AYA-8 CONTROL INDICATOR (SS 1 UNIVERSAL KEYSET)

PWR SUP
4 10J1 SS 1 LAMP OUTPUTS 10J2 SS 1 SWITCH INPUTS (SENSOR STATION 2) P N
INTENSITY ADJ
115 VAC 3 11FL1J1
C-7627(P)/AYA- CONTROL -8 INDICATOR (SS 2 UNIVERSAL KEYSET) 4

INTENSITY ADJ PWR SUP
11J1 SS 2 LAMP OUTPUTS Q
11J2 SS 2 SWITCH INPUTS R
(3-1 blank)/3-2
Figure 3-1. Keyset and Tray Signal Flow Diagram (Sheet 1 of 2)
SEE SHEET 2 FOR NOTES 12-311 017-0756
NAVAIR 01-75PAC-12
5 6 A PILOT KEYSET LAMP OUTPUTS 5 6 B PILOT KEYSET SWITCH INPUTS (TACCO STATION) IP-917/ASA-70 MULTIPURPOSE DATA DISPLAY (MDD) (MDD TRAY) (SEE NAVAIR 01-75PAC- -2) -121J12 6 TACCO BIT CODES AND LAMP OUTPUTS 1J14 1J3 D E DC POWER DC POWER 1J4 1J13 1J11 TACCO LAMP OUTPUTS TACCO SWITCH INPUTS 6
1J23/P23
J23 (RACK D2) MX-8023( )/AYA- DATA ANALYSIS -8 LOGIC UNIT (LU 1) 5 (SEE SECTION 5) J-4959/ASQ-212 INTERCONNECT BOX 1 (ICB 1) 6 (SEE SECTION 4A)
(RACK D2) CP-901(V)( )/ASQ-114(V) DIGITAL DATA COMPUTER (CENTRAL COMPUTER) (SEE SECTION 4) 5
1J1
5 CH 00 OUTPUT CONTROL AND GROUP 0 OUTPUT DATA
A1J84
J24
1J24/P24
J20
1J2 5 CH 01, 02, 03 OUTPUT CONTROL
A1J88
1J20/P20
1J1 C AC AND DC POWER
5 J17 1J17/P17 5 1J19/P19 J19
1J3
5 CH 01 INPUT CONTROL AND INPUT DATA
A1J72
5 J18 6 1J18/P18 TACCO KEYBOARD AND SWITCH INPUTS 6 5 J31 1J31/P31 5 J30 1J30/P30
NAVCOMM LAMP OUTPUTS 6
NAVCOMM SWITCH INPUTS (SENSOR STATION 3) 5J1 IP-918/ASA-70 SENSOR DATA DISPLAY (SDD) (SDD TRAY) (SEE NAVAIR 01-75PAC- -2) -125J11 SS 3 LAMP OUTPUTS (RACK D2) 5J3 CP-2044/ASQ-212 DIGITAL DATA COMPUTER (CENTRAL COMPUTER) (SEE SECTION 4A) 6 6 5 J21 1J21/P21
H J K
AC AND DC POWER DC POWER DC POWER 5J4 5J12 SS 3 SWITCH OUTPUTS 5 J25 1J25/P25 J53/P53 6 NAVCOM AND PILOT INDICATORS, AC LINE AND RELAY DRIVERS 6 5 J22 1J22/P22 J54/P54
6 NAVCOM AND PILOT KEYSETS, AC SWITCH AND DIFF INPUTS, SAD MARKS
P8/J8
P4/J4
6 L ORDNANCE PANEL SWITCH INPUTS
J60/P60 6 SS3 AND TACCO TRAYS, TACCO AND ORD KEYS M ORDNANCE PANEL LAMP OUTPUTS J59/P59 6 6 N SS 1 LAMP OUTPUTS J26 5 J27 1J27/P27 J64/P64 5 1J26/P26 6 TACCO TRAY SS3, ORD, PILOT, AND TACCO INDICATORS
P7/J7
P3/J3
P5/J5
6 P SS 1 SWITCH INPUTS
J63/P63 5 J29 1J29/P29
6 TACCO INDICATORS
P2/J2
6 Q SS 2 LAMP OUTPUTS
NOTE
1 AIRCRAFT BUNO 156507 THROUGH 158927 AND 158929 THROUGH 159329 AIRCRAFT BUNO 158928 AND 159503 THROUGH 161131 AIRCRAFT BUNO 161132 AND SUBSEQUENT AIRCRAFT BUNO 156507 THROUGH 161409 ANO 161411 THROUGH 161596 NOT INCORPORATING AFC 450 AIRCRAFT NOT INCORPORATING AFC 506 AIRCRAFT INCORPORATING AFC 506 12-312 017-0757
6 R SS 2 SWITCH INPUTS
5 J28 1J28/P28
2 3 4 5 6
Figure 3-1. Keyset and Tray Signal Flow Diagram (Sheet 2 of 2)
3-3
NAVAIR 01-75PAC-12
(RACK D2) LU 1 ICB 1 4 5 J23 4 1J23/P23 (CENTER CONSOLE) 5J2 51 PILOT KEYSET R1 MESSAGE SIGNALS 35 2 M1 5 MONOFUNCTION SWITCH RETURN 5 MONOFUNCTION SWITCH INDICATOR M2 THROUGH M16 SAME AS M1 DC M17 MONOFUNCTION SWITCH INDICATOR M18 THROUGH M35 SAME AS M17 DC DC 3 1 1
5 MONOFUNCTION SWITCH COMMON
NOTE
R1 IS AN INLINE RESISTOR CONNECTED BETWEEN THE NORMALLY CLOSED CONTACT OF MONOFUNCTION SWITCH M-35 AND PIN 51 OF CONNECTOR 5J2. M17 IS TYPICAL OF THE 19 MONOFUNCTION SWITCH-INDICATORS CONNECTED IN SERIES. UPON ACTIVATION, EACH SWITCH OPENS A COMMON ENTRY SIGNAL LINE AND CLOSES A MESSAGE SIGNAL LINE. THESE SWITCHINDICATORS ARE NOT COMPUTER CONTROLLED AND PROVIDE ONLY GREEN BACKGROUND LIGHTING. M1 IS TYPICAL OF THE 16 MONOFUNCTION SWITCH-INDICATORS. UPON ACTIVATION EACH SWITCH OPENS A COMMON ENTRY SIGNAL LINE AND CLOSES A MESSAGE SIGNAL LINE. AMBER/GREEN LAMPS PROVIDE GREEN BACKGROUND LIGHTING WHEN FUNCTION IS AVAILABLE AND AMBER BACKGROUND LIGHTING WHEN FUNCTION IS ACTIVE. AIRCRAFT NOT INCORPORATING AFC 506 AIRCRAFT INCORPORATING AFC 506
51
G DC 15
VARIABLE LAMP SUPPLY
4 J24 4 1J24/P24 P1 16 35 DC LAMP DRIVER PROVIDES LAMP P1 OUTPUT TO ALL 16 AMBER LAMPS IN 37 MONOFUNCTION SWITCHES THAT ARE COMPUTER LIGHTED 5 LAMP ENABLE 6 VDC REGULATED
5 LAMP ENABLE SIGNALS 16
5J1
PS1
J3 CR1 5 VDC UNREG
INTENSITY ADJ CR2 CR3
PWR SUP FAULT
DS36
B1 FAN (RACK D1) POWER DISTRIBUTION BOX 2J2 D E F (FS 440) TB452 E5 E6 E7 115 VAC A 115 VAC B 115 VAC C (FS 288) P/J294 A B C
FUSE F1 PREVENTS 20 AN OVERLOAD J3 25 CONDITION FROM 4 DAMAGING THE 6 10 VDC POWER SUPPLY. COMPENSATING 26 RESISTOR R2 IS 5 USED TO BALANCE VARIOUS LOAD CONDITIONS. 11 2
CR4 5 VDC UNREG
S36
F1
5FL1J1 A B C D AC
FL1
RF1 FILTER 1 2 3 4 115 VAC A 115 VAC B 115 VAC C NEUTRAL 18
R2 12 9
Figure 3-2. Pilot Keyset Functional Signal Flow Diagram 3-4

12-321 017-0760
NAVAIR 01-75PAC-12
(RACK D2) LU 1
NOTE
1 RESISTOR R2 IS A 487 OHM WIRE WOUND COMPENSATING RESISTOR LOCATED ON INSIDE OF REAR PANEL, BELOW POWER SUPPLY (PS1) CONNECTOR. FUSE F1 IS A 1.5 AMP FUSE USED TO PROTECT THE 6 VDC POWER SUPPLY AND IS LOCATED ON THE OUTSIDE OF THE REAR PANEL R1 IS AN INLINE RESISTOR CONNECTED BETWEEN THE NORMALLY CLOSED CONTACT OF MONOFUNCTION SWITCH M-37 AND PIN 51 OF CONNECTOR 4J2, 10J2, OR 11J2 AS APPROPRIATE. AIRCRAFT BUNO 156507, 158928, 159503 THROUGH 159886, 159888, 159890, THROUGH 161409 AND 161411 THROUGH 161596 AND AIRCRAFT NOT INCORPORATING AFC 450 AIRCRAFT NOT INCORPORATING AFC 506 AIRCRAFT INCORPORATING AFC 506
5 6
ICB 1
J30 (NAVCOMM) 6 1J30 (NAVCOMM) 5 1J26 (SS1) 1J28 (SS2) 51 13 MESSAGE SIGNALS
(NAVCOMM STATION) (SENSOR STATION 1) (SENSOR STATION 2) (NAVCOMM) 4J2 4 (SS1) 10J1 (SS2) 11J1 4 51 13 6 VDC P1 13 24 20 19 18 25 DC A2 P2 AMPLIFIERCONVERTER LAMP DRIVER 37 35 DC 6 VDC A1 BINARY DECODER 1 2 DIODE 3 MATRIX 4 DECODER 5 6 7 8 NAVCOMM UNIVERSAL KEYSET SS 1 UNIVERSAL KEYSET SS 2 UNIVERSAL KEYSET 4 4 3 R1 M9 MATRIX SELECT SWITCH INDICATORS M10 THROUGH M16 SAME AS M9 DC 7 8 8 8 M1 MESSAGE SIGNAL MATRIX READOUT SWITCH INDICATORS M2 THROUGH M8 SAME AS M1 7
MONOFUNCTION SWITCH COMMON 37
MONOFUNCTION SWITCH RETURN 6 5
MESSAGE SIGNAL 8 DC
J31 (NAVCOMM) 1J31 (NAVCOMM) 1J27(SS1) 1J29(SS2) 62 63 64 65
(NAVCOMM) 4J1 4 4 (SS1) 10J2 (SS2) 11J2 62 63 64 65
MATRIX READOUT SWITCH INDICATOR DC
MATRIX SEL BIT 1 MATRIX SEL BIT 2 MATRIX SEL BIT 3 MATRIX SEL BIT 4
P1
MATRIX PROJECTION LAMP ENABLES
5 6 (RACK D2) CENTRAL COMPUTER
P2 8 8 3 MONOFUNCTION SWITCH INDICATORS M17, M18 AND M19 SAME AS M9 DC M20 MONOFUNCTION SWITCH INDICATOR G DC M21 THROUGH M32 SAME AS M20 DC 5 MONOFUNCTION SWITCH INDICATOR M33 THROUGH M37 SAME AS M9
A1J72
5 CH 01 INPUT CONTROL AND INPUT DATA 5 CH 00 OUTPUT CONTROL AND GROUP 0 OUTPUT DATA 5 CH 01, 02, 03 OUPUT CONTROL
5 40
1J3
LAMP ENABLE SIGNAL
16
A1J84
5 60
1J1 6 7 8 9 PRO 1 BIT 1 PRO 1 BIT 2 PRO 1 BIT 4 PRO 1 BIT 8 PRO 2 PRO 3 PRO 4 PRO 5 PRO 6 PRO 7 PRO 8 PRO 9 4 4 4 4 4 4 4 4 6 7 8 9
PRO 1 INDICATES CENTRAL COMPUTERS RESPONSE BY PROJECTING ONE OF TWELVE LEGENDS TO INFORMATION SUPPLIED BY THE OPERATOR PRESSING ONE OF THE MATRIX SELECT SWITCH INDICATORS
MONOFUNCTION LAMP ENABLES
A1J88
1J2
6 VDC DC KEYSET PANEL INTENSITY ADJ PS1 POWER SUPPLY 6 VDC P1/J3 2 3 R2 8 9 5 2 F1 11 12 18 +6 VDC ADJ J1 +6 VDC P1/J3 25 26 14 28 21 29 J2 GND 10 4 5 VDC 6 VDC AS REQUIRED CR5 CR6 CR7 CR8 SWITCHES
J8/P8
6 KEYSET AND SWITCH INPUTS 6 INDICATOR OUTPUTS
P54/J54
J4/P4
P53/J53
PRO 2 THROUGH PRO 9 (SAME AS PRO 1)
(RACK D1) POWER DISTRIBUTION BOX 2J3 H A B 2J6 V R D L K U
S39
(FS 440) TB452 D19 D21 D21 115 VAC A 115 VAC B 115 VAC C TO NAVCOMM 4FL1J1 (NAVCOMM) 4FL1J1 4 C9 C10 C11 C5 C6 C7 115 VAC A 115 VAC B 115 VAC C 115 VAC A 115 VAC B 115 VAC C TO SS2 4 11FL1J1 AC DC TO 4 SS1 10FL1J1 4 115 VAC A 115 VAC B 115 VAC C (SS1) 10FL1J1 (SS2) 11FL1J1 A B C D F FL1 RFI FILTER 1 2 3 4 115 VAC A 115 VAC B 115 VAC C NEUTRAL
DC 1 B1 FAN
LAMP POWER
READOUT MATRIX SEL S38
DC 6 VDC PWR SUPPLY FAULT VR1 DC GROUND DS47 PWR SUP FAULT CR1 CR2 CR3 CR4
LAMP POWER
12--331 017--0762
Figure 3-3. Universal Keyset Functional Signal Flow Diagram
3-5
NAVAIR 01-75PAC-12
(TACCO STATION) MPD POWER SUPPLY 2J1 P 115 VAC A 1J1 P (TACCO STATION) MDD 1A5 LAMP DRIVER POWER SUPPLY P67 E J1 CB2 CR3 T4 CR4 CR6 DC-2B SUPPLY T AC NEUTRAL T D LAMP INTENSITY CONTROL CR5 CR8 CR7 V W,X R,S T3 CR2 DC2C SUPPLY DC2 RETURN DC1 RETURN V W,X R,S 3A 3B DC-2C SUPPLY 25-28 29 30 1P76 CR1 N,P J,K CB1 T1 R 115 VAC B R F AC NEUTRAL VARIABLE AC L,M G 11 AC1 RETURN AC NEUTRAL VARIABLE AC L,M 8A 11A 8B 11B XA4 L W,X U V +20 VDC COMMON 5 VDC -20 VDC L W,X U V -20 VDC 5 VDC COMMON +20 VDC ENABLE SIGNALS H G F E DC1 SUPPLY AC1 SUPPLY N,P J,K 6A 7A 6B 7B DC1-DC2 RETURN TO LAMP DRIVERS AS REQUIRED AC1 RETURN 60-61 62 DRIVER LAMP RETURNS 20 44-46 47-48 12 XA5 1A6A5 LOW CURRENT LAMP DRIVER (SAME AS 1A6A4) XA5 DRIVER LAMP RETURNS XA6 ENABLE SIGNALS ENABLE SIGNALS 1A6A6 LOW CURRENT LAMP DRIVER (SAME AS 1A6A4) XA6 DRIVER LAMP RETURNS 20 12 13-24 1P76 1-4 5-11 20 8 4 1P73 13-24 1P74 17-24 13-16 1P75 AC1/DC1 SUPPLY 12-15 16-19 24 25 U DC2B SUPPLY U 2A 2B 29 30 1P75 25-28 J1 P67 1P68 T DC2A SUPPLY T 1A TB1 1B 1A6 LAMP DRIVER DC-2A SUPPLY 25-28 29 30 1P74 1P73
A B
SHEET 2 SHEET 2
T2
C D
SHEET 2 SHEET 2
E F
SHEET 2 SHEET 2
G H J L
SHEET 3
SHEET 3
SHEET 3
1A6A4 LOW CURRENT LAMP DRIVER PROVIDES LAMP RETURNS FOR AMBER LAMPS THAT ARE COMPUTER LIGHTED
XA4
SHEET 3
TO LAMP DRIVERS AS REQUIRED 20 20 NOT USED ENABLE SIGNALS ENABLE SIGNALS
M N
SHEET 2
(RACK D2) LU 1 ICB 1 3 4
1J19 3 J19/1P19
4 32
1J11
1P71 8 12
SHEET 2 P SHEET 2
1J20 3 J20/1P20 4
48 12
1J12 ENABLE SIGNALS 4 BIT MATRIX CODE 1J14
1P72
Q R S T U V
1P73
SHEET 2
1J17 3 J17/1P17 4 76 38 75 35 1J18 3 J18/1P18 1 80 41 32 33 3439 40 6 4 72
20 MRO SWITCH RETURN MESSAGE SIGNALS MATRIX SELECT SWITCH RETURN MRO SWITCH COMMON MATRIX SELECT SWITCH COMMON 4
XA7 ENABLE SIGNALS
1A6A7 LOW CURRENT LAMP DRIVER (SAME AS 1A6A4)
XA7 DRIVER LAMP RETURNS
20
4 7
SHEET 3 SHEET 3
76 38 75 35 1J13 1 80 41 32 33 3439 40 1J5
1A6A1 HIGH CURRENT LAMP DRIVER XA1 4 BIT MATRIX CODE PROVIDES LAMP RETURNS FOR WHITE PRO LAMPS AND AMBER MATRIX SELECT SWITCH LAMPS
XA1
4 DRIVER LAMP RETURNS 9 2 18
20-23 49-57 58,59 26-43
SHEET 3 SHEET 3
68
KEYBOARD MONOF SWITCH RETURN MONOF SWITCH COMMON MONOF SWITCH RETURN MESSAGE SIGNALS KEYBOARD MONOF SWITCH COMMON KEYBOARD ENTER KEYBOARD DATA BITS ISOLATED GROUND AND KEYBOARD RET + OVERFLOW SIGNAL
XA2 4 BIT MATRIX CODE
1A6A2 HIGH CURRENT LAMP DRIVER (SAME AS 1A6A1)
SHEET 3
XA2
DRIVER LAMP RETURNS 24 1-12 31-42
12 12
W X Y Z
SHEET 2 SHEET 2
XA3 4 BIT MATRIX CODE
1A6A3 HIGH CURRENT LAMP DRIVER (SAME AS 1A6A1)
XA3
DRIVER LAMP RETURNS 24 1-12 31-42
1P74
12 12
SHEET 2 SHEET 2
SEE LU 3 OVERALL POWER DISTRIBUTION FUNCTIONAL SIGNAL FLOW DIAGRAM (RACK D1) ICB 3 4 J7/3P7 6 7 4
B C
24 4 1
1P75 1-12 31-42
12 12
NOTE
R1 IS AN INLINE RESISTOR CONNECTED BETWEEN THE NORMALLY CLOSED CONTACT OF MONOFUNCTION SWITCH MFS-46 AND PIN 80 OF CONNECTOR 1J13
R2 IS AN INLINE RESISTOR CONNECTED BETWEEN THE NORMALLY CLOSED CONTACT OF MATRIX SELECT SWITCH MSA-12 AND PIN 35 OF CONNECTOR 1J14-35
3 4
AIRCRAFT NOT INCORPORATING AFC 506 AIRCRAFT INCORPORATING AFC 506
AA BB
SHEET 2 SHEET 2
3-6
Figure 3-4. TACCO Keyset and MDD Tray Functional Signal Flow Diagram (Sheet 1 of 3)
12-341 017-0764
NAVAIR 01-75PAC-12
(TACCO STATION) MDD (CONT.) 1A4 CONTROL TRAY 1P79 A B C D SHEET 1 E DRIVER LAMP RETURNS F H J K L M N ZB S T U V SHEET 1 W X Y Z ZA R P SHEET 1 ZC DC-2B LAMP SUPPLY ZD ZE ZF MXC-1 MRO-1 ZH ZJ ZK ZM ZN ZP MESSAGE SIGNALS ZR ZS ZT ZU ZV ZW ZX MESSAGE SIGNALS MXC-2 MRO-2 MXC-3 MRO-3 MXC-4 MRO-4 MXC-5 MRO-5 MXC-6 MRO-6 1A4A4 READOUT MODULE HOUSING ASSEMBLY C MATRIX LAMP 12 ON MRO 12 LAMP 12 ON MRO 11 LAMP 12 ON MRO 10 LAMP 12 ON MRO 9 LAMP 12 ON MRO 8 LAMP 12 ON MRO 7 LAMP 12 ON MRO 6 LAMP 12 ON MRO 5 LAMP 12 ON MRO 4 LAMP 12 ON MRO 3 LAMP 12 ON MRO 2 LAMP 12 ON MRO 1 LAMP 1 ON MRO 1-12 LAMP 10 ON MRO 1-12 LAMP 9 ON MRO 1-12 LAMP 8 ON MRO 1-12 LAMP 7 ON MRO 1-12 LAMP 6 ON MRO 1-12 LAMP 5 ON MRO 1-12 LAMP 4 ON MRO 1-12 LAMP 3 ON MRO 1-12 LAMP 2 ON MRO 1-12 LAMP 11 ON MRO 1-6 LAMP 11 ON MRO 7-12 LAMP SUPPLY FOR MRO 1-12 TO LAMP 11 ON MRO 2-12 LAMP SUPPLY FOR MRO 2-12 OPTIONAL CONNECTION MXC-7 MRO-7 MXC-8 MRO-8 MXC-9 MRO-9 ACTUAL ARRANGEMENT OF LAMPS IN MRO (REAR VIEW) TO LAMP 12 ON MRO 2-12 (SAME AS MRO 1) TO LAMP 1-10 ON MRO 2-12 (SAME AS MRO 1) 12 10 7 4 1 11 9 8 6 5 3 2 MRO 1 READOUT MODULE H 1 5 F 4 D C 2 A B G 7 7 3 12 1 10 9 8 7 6 5 4 3 2 11 C TYPICAL OF 12 11 SHEET 1 DC-2B LAMP SUPPLY 3 2 P ZC ZD ZE ZF MXC-10 MRO-10 MXC-11 MRO-11 MXC-12 MRO-12 SHEET 1 DC-2B LAMP SUPPLY P ZC ZD ZE ZF 5 4 7 6 SHEET 1 9 8 RED 12 1 10 SHEET 1 DRIVER LAMP RETURNS SHEET 1 DRIVER LAMP RETURNS 1P78 1A4A3 READOUT MODULE A HOUSING ASSEMBLY B B MATRIX C D E F H J K L M N ZB S T U V W X Y Z ZA R SHEET 1 (SAME AS 1A4A4) SHEET 1 1P77 1A4A2 READOUT MODULE A HOUSING ASSEMBLY B A MATRIX C D E DRIVER LAMP RETURNS F H J K L M N ZB S T U V W X Y Z ZA R (SAME AS 1A4A4)
BB
DRIVER LAMP RETURNS
DRIVER LAMP RETURNS
DRIVER LAMP RETURNS
MRO SWITCH RETURN
1P79 ZY
MRO SWITCH RETURN
1P78 ZH ZJ ZK ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY
MRO SWITCH RETURN
1P77 ZH ZJ ZK ZM ZN ZP MRO SWITCH COMMON ZY
MESSAGE SIGNALS
ZR ZS ZT ZU ZV ZW ZX
MESSAGE SIGNALS MSC-1 MATRIX C SELECT SWITCHES MSC- THROUGH -2 MSC-12 SAME AS MSC-1 11 SHEET 1 MSB-1 MATRIX B SELECT SWITCHES MSB- THROUGH -2 MSB-12 SAME AS MSB-1 11 SHEET 1 SHEET 1 DRIVER LAMP RETURNS MSA-1 MATRIX A SELECT SWITCHES MSA- THROUGH -2 MSA-12 SAME AS MSA-1 R2 2 MATRIX SELECT SWITCH COMMON
MATRIX SELECT SWITCH RETURN SHEET 1 AC1 RETURN AC1/DC1 SUPPLY
SHEET 1
AC1 RETURN AC1/DC1 SUPPLY
SHEET 1
AA
A
DRIVER LAMP RETURNS
DRIVER LAMP RETURNS
A 12-3402 017-0765
3-7
NAVAIR 01-75PAC-12
(TACCO STATION) MDD (CONT.)
MESSAGE SIGNALS MONOF SWITCH RETURN
1A3 RIGHT HAND ASSEMBLY 1P69 44 1P68 1A1 LEFT HAND ASSEMBLY 1P69 39 SHEET 1 MONOF SWITCH RETURN AC1 RETURN AC1/DC1 SUPPLY 25 1P70
MFS-1
SHEET 1
F
SHEET 1
AC1 RETURN AC1/DC1 SUPPLY DRIVER LAMP RETURNS VARIABLE AC AC NEUTRAL OVERFLOW
29 30 31
MONOFUNCTION SWITCHES MFS- THROUGH -2 MFS-11 SAME AS MFS-1
MFS-12
L
10
4, 5 1, 3
MONOFUNCTION SWITCHES MFS-14 AND MFS-15 SAME AS MFS-12
MONOFUNCTION SWITCH SAME AS MFS-13
AA
11 1 2 ELECTROLUMINESCENT PANEL BACKLIGHTS CONTROL OVERFLOW + 24 16
MFS-13
G SHEET 1 18
MONOFUNCTION SWITCHES MFS-19 THROUGH MFS-34 SAME AS MFS-13
1P70 49 MONOFUNCTION SWITCH RETURN
16
DRIVER LAMP RETURNS
MESSAGE SIGNALS
1A4 CONTROL TRAY
SHEET 1
MONOFUNCTION SWITCHES MFS-43 THROUGH MFS-46 SAME AS MFS-13 SHEET 1
1 R1
MONOFUNCTION SWITCHES MFS-47 SAME AS MFS-12
MONOFUNCTION SWITCHES MFS-65 AND MFS-66 SAME AS MFS-13 2
MONOFUNCTION SWITCH COMMON KEYBOARD MONOF SWITCH RETURN
AC1 RETURN AC1/DC1 SUPPLY SHEET 1 DRIVER LAMP RETURNS 1P80 1A4A5
R R
DRIVER LAMP RETURNS SHEET 1
SHEET 1
DRIVER LAMP RETURNS
KEYBOARD ENABLE -20 VDC 5 VDC +20 VDC ISOLATED GROUND AND KEYBOARD RET COMMON AC NEUTRAL VARIABLE AC
K T R, P S N L, M ZA ZB
KEYBOARD TO LOGIC AS REQUIRED
TO ELECTROLUMINESCENT PANEL
THE KEYBOARD FUNCTION IS INITIATED BY THE OPERATOR TO CONSTRUCT MESSAGES FOR DISPLAY ON THE CRT. THE OPERATOR PRESSES A SPECIFIC KEY ON THE KEYBOARD WHICH PRODUCES A 6-BIT DATA WORD TO LU 1 OR ICB 1.
1P80 B A C, D E, F H, G 6 KEYBOARD MONOF SWITCH COMMON KEYBOARD ENTER KEYBOARD DATA BITS
A 12-343 017-0766
3-8
NAVAIR 01-75PAC-12
(SENSOR STATION 3) SDD
5P67 E
5A5
LAMP DRIVER POWER SUPPLY CB2 T2 T4 CR3 5P67 T CR4 W,X DC-2A SUPPLY DC-2A RETURN 5P68 T W X
5A6
LAMP DRIVER TB1 1A 5A 6A 4A 1B 5B 6B 4B 7B 8B 9B 10B 11B AC1 RETURN DC RETURN TO LAMP DRIVERS AS REQUIRED AC1-DC1 SUPPLY DC-2A SUPPLY 5P73 15 34 35 23 22 37 36 39 38 32 33
A B C D E NOTE
SHEET 2
T1 CB1 (SENSOR STATION 3) MPD POWER SUPPLY 6J1 P T R L W, X U 115 VAC A AC NEUTRAL 115 VAC B 20 VDC COMMON 5 VDC 5J1 P T R L W, X U D F 20 VDC COMMON 5 VDC 5A1 (RACK D1) ICB 3 3 J10/3P10 7 6 3 3 5P69 9 TEST DS5 1 LEFT HAND ASSEMBLY
T3
CR2 R CR1 R,S N,P J,K DC1 RETURN DC1 SUPPLY AC1 SUPPLY S N J K L
7A 8A 9A 10A 11A
L H G
AC1 RETURN VARIABLE AC AC NEUTRAL
H F G 5P69 2 1 BIT 1 2 3 4 5 6 7 BIT 2 BIT 4 BIT 8 5P71 1 2 3 4
TO LAMP DRIVERS 5A6A1 AND 5A6A4 AS REQUIRED 5A6A1 HIGH CURRENT LAMP DRIVER
R1 IS AN INLINE RESISTOR CONNECTED BETWEEN THE NORMALLY CLOSED CONTACT OF MONOFUNCTION SWITCH M- AND PIN 52 OF CONNECTOR 5J12 -1 AIRCRAFT NOT INCORPORATING AFC 506 AIRCRAFT INCORPORATING AFC 506
2 3 XA1
ELECTROLUMINESCENT PANEL
XA1 1 2 85 86
12
DRIVER LAMP RETURNS
F
SHEET 2
SEE LU 3 OVERALL POWER DISTRIBUTION FUNCTIONAL SIGNAL FLOW DIAGRAM (RACK D2) LU 1 ICB 1 2 3 1J21 2 J21/1P21 1 2 3 4
5J5 2 C B
8 S1-G 24 16 OVERFLOW 8
MODE SELECTOR 3 BIT 1 BIT 2 BIT 4 BIT 8 8 5J11 1 2 3 4 MRO LAMP ENABLE SIGNALS MONOFUNCTION LAMP ENABLE SIGNALS 3 5J12 52 38 53 MONOF SWITCH COMMON MONOF SWITCH RETURN MESSAGE SIGNALS SWITCH 8 8 XA4
5A6A4 LOW CURRENT LAMP DRIVER XA4 8 8 8 8
DRIVER LAMP RETURNS DRIVER LAMP RETURNS
H J
SHEET 2
8 1J22 2 J22/1P22
52 50
12-351 017-0770
(3-9 blank)/3-10
Figure 3-5. Sensor Station 3 Keyset and SDD Tray Functional Signal Flow Diagram (Sheet 1 of 2)
NAVAIR 01-75PAC-12
(SENSOR STATION 3) SDD (CONT) 5A4 CONTROL TRAY
5A4A2 READOUT MODULE HOUSING ASSEMBLY
TYPICAL LAMP LAYOUT MRO 1 THROUGH MRO 8 FROM 5P81 L A M P 1 2 L A M P 11 12 R E D G H 11 12
5P81 J H F E D C B A SHEET 1 F DRIVER LAMP RETURNS K L M N P R S A DC-2A SUPPLY T U EE DD CC BB AA Z Y X W V MONOF SWITCH COMMON MRO 1 LAMP 12 (RED) MRO 2 LAMP 12 (RED) MRO 3 LAMP 12 (RED) MRO 4 LAMP 12 (RED) MRO 5 LAMP 12 (RED) MRO 6 LAMP 12 (RED) MRO 7 LAMP 12 (RED) MRO 8 LAMP 12 (RED) MRO 1 THROUGH 8 LAMP 6 MRO 1 THROUGH 8 LAMP 5 MRO 1 THROUGH 8 LAMP 4 MRO 1 THROUGH 8 LAMP 3 MRO 1 THROUGH 8 LAMP 2 MRO 1 THROUGH 8 LAMP 1 MRO M18 LAMP MRO 8 SUPPLY M17 MRO 7
LAMP SUPPLY
10
DRIVER LAMP RETURNS
OPTIONAL CONNECTION
7 C
1 1
B 2
A 2 3 4
C D 5 6
4 E 7 8
F 5 9 10
11
10
12
M16 MRO 6
M15 MRO 5
M14 MRO 4
M13 MRO 3
M12 MRO 2
M11 MRO 1
MESSAGE SIGNALS
20
MONOF SWITCH COMMON MESSAGE SIGNALS M38B MONOF SWITCH RETURN AC1/DC1 SUPPLY AC1 RETURN M38A M37 MONOFUNCTION SWITCHES M32 THROUGH M36 SAME AS M37 MONOFUNCTION SWITCHES M25 THROUGH M31 SAME AS M37 M24 MONOFUNCTION SWITCHES M19 THROUGH M23 SAME AS M24 A
E SHEET 1
G AC1 RETURN B SHEET 1 AC1/DC1 SUPPLY G DRIVER LAMP RETURNS SHEET 1 1 R1
10
MESSAGE SIGNALS MONOFUNCTION SWITCH M10 SAME AS M24 C SHEET 1 D SHEET 1 J 8 SHEET 1 AC1/DC1 SUPPLY AC1 RETURN AC1/DC1 SUPPLY AC1 RETURN DRIVER LAMP RETURNS MONOFUNCTION SWITCHES M3 THROUGH M9 SAME AS M24 MONOFUNCTION SWITCHES M1 AND M2 SAME AS M37
MONOFUNCTION SWITCH COMMON
Figure 3-5. Sensor Station 3 Keyset and SDD Tray Functional Signal Flow Diagram (Sheet 2 of 2)
SEE SHEET ONE FOR NOTES 12-352 017-0773
3-11
NAVAIR 01-75PAC-12
(RACK D2) LU 1 1 ICB 1 2 1J25 1 J25/1P25 6 7 8 11
(RACK F2) ORDNANCE PANEL 2 PRO 1 BIT 1 PRO 1 BIT 2 PRO 1 BIT 4 PRO 1 BIT 8 6J1 6 7 8 11 PRO 1 PROJECTION READOUT ASSEMBLY (PRO) PROVIDES UP TO TWELVE COMPUTER CONTROLLED PROJECTION READOUTS PRO 2 (SAME AS PRO 1) DC 18 19 20 21 PRO 3 BIT 1 PRO 3 BIT 2 PRO 3 BIT 4 PRO 3 BIT 8 18 19 20 21 PRO 3 (SAME AS PRO 1) DC 24 25 26 27 PRO 4 BIT 1 PRO 4 BIT 2 PRO 4 BIT 4 PRO 4 BIT 8 24 25 26 27 PRO 4 (SAME AS PRO 1) DC 32 31 30 29 SWITCH COMMON MESSAGE SIGNAL MESSAGE SIGNAL MESSAGE SIGNAL 32 31 30 29 M-1 M-2 M-3 R1 6 VDC REGULATED
DC
12 13 14 17
PRO 2 BIT 1 PRO 2 BIT 2 PRO 2 BIT 4 PRO 2 BIT 8
12 13 14 17
28
SWITCH RETURN
28
G DC DC
G DC
G DC
BIN
SLT G DC DC G G DC
J1 58 ORD STATUS UNLD 22 18 19
A6A1 LAMP DRIVER
J1 2 A UNLOAD 3 4 5 37 A A LOAD A CHASSIS
J2 1
PS1 POWER SUPPPLY
J2 27 28 INTENSITY ADJ DC
59
ORD STATUS LOAD
DC
20 21 1 35 CHASSIS
6 VDC REGULATED
(RACK D1) POWER DISTRIBUTION BOX 2J6 M 115 VAC B (FS 440) TB452 C12 AC AIRCRAFT NOT INCORPORATING AFC 506 AIRCRAFT INCORPORATING AFC 506 A6FL1 RFI FILTER 6FL1J1 C D 3 4 115 VAC B NEUTRAL
R2
14 20 2 3 8 9
25 26 4
5 VDC CR1 CR2 CR3 CR4 CR5 CR6
VR1 10 5 23 F1 11 17
DS1 POWER SUPPLY FAULT
6 12 18 24
1 2
CHAS
12-361 017-0774
3-12
Figure 3-6. Ordnance Panel Functional Signal Flow Diagram
NAVAIR 01-75PAC-12
LEGEND 1A1 MAINTENANCE CONTROL PANEL 2 3 1

29 28 27 26 25 24 23 22 21 20 19 18
1 LOGIC UNIT POWER CONTROL PANEL

DOM 1-16 1-17 1-18 5 4 3 2 1 0 DOM 1-3 OFF UK2 UK3 SS2 NAV/COM 1-14 1-15 OFF PILOT 1-4 CRT 1-5 ORD 1-6 OFF STATUS 1-8 1-22 ART 45 1-7
MODE SELECTOR switch OFF LINE indicator CHANNEL toggle switch DlM-DOM indicator ENTER pushbutton switch RESET MCP pushbutton switch RESET DATA pushbutton switch COMPUTER DATA INPUT indicators MCP DATA REGISTER indicators LAMP TEST pushbutton switch CONTROL IA switch-indicator CONTROL OA switch-indicator RESET CONTROL pushbutton RESET REQUEST pushbutton RESET CHAN pushbutton ON LINE indicator STATUS (1-8,1-22) toggle switch
9
POWER ALARM TEST AOVM -10VM 5VM
2 3 4 17 5 6 7 8 9 10
COMPUTER DATA INPUT 17 16 15 14 13 12 11 10 9
L O G I C U N I T 1
MODE SELECTION
VERIFY OFF LINE ON LINE TEST
CHANNEL DIM-DOM
ENTER
MCP
RESET
DATA
MCP DATA REGISTER ARO CONTROL ODR IDR INT ODR IDR INT OA IA IA MC MC OA IA IE
CHANNEL CONTROL
2
DIM--DOM POWER OA IA IE ALARM MC MC MC TEST DIM--DOM ON VER
10
CLOCK
HZ SIGNAL GROUND
400 200 100 25
TACCO UK1 1-10 SS1 1-11 -13 1-12 1-
SRL 1-19 1-20 1-21
ARO TEST 2
CHAN REQUEST
OA IA IE ON VER 1
MODE CONTROL
LAMP TEST
CONTROL
AUTO
18 17 16 15 11 10
DATA TO DIM--DOM 9 8 7 6 5
1
29 28 27 26 25 24 23 22 21 20 19
DATA TO ARO
18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
OA IA IE
ARO
COMPUTER CONTROL
DIM-DOM
OA IA IE
COMPUTER DATA OUTPUT
COMPUTER RETURN
ARO 1-23 ELAPSED TIME OFF
MAIN POWER
11 12 13
16 15 14 13 12 11
OFF
14 15 16 17
NOTE This procedure is not usable on AN/AYA-8C and OL377(V)1/AY Data Analysis Programming Group equipped aircraft. For keyset and tray testing of these units see applicable logic unit section. 3-1. 3-2. GENERAL INFORMATION. By using the following procedures, faults can be quickly identified as either Logic Unit 1 (LU 1) or Keyset/Tray faults. The first check consists of setting switch-indicator codes in LU 1 MCP DATA REGISTERS and verifying the results by observing the switch-indicators on the appropriate Keyset/Tray. (See Logic Unit to Switch-Indicator check procedure.) The second check consists of actuating a switch-indicator on a Keyset/Tray and verifying the readout at LU 1 COMPUTER DATA INPUT indicators. (See Switch-Indicator to LU 1 check procedure.) LOGIC UNIT TO SWITCH-INDICATOR CHECK. At LU 1 Maintenance Control Panel, perform the following: 1. 2. 3. 4. 5. 6. Press LAMP TEST (10) and verify that all indicators come on. Set MODE SELECTOR (1) switch to OFF LINE. Set CHANNEL (3) toggle switch to DlM-DOM. Press ENTER (5) pushbutton switch and verify DIM-DOM (4) and OFF LINE (2) indicators are on. Press CONTROL lA (11) switch-indicator. Press RESET CHAN (15) pushbutton switch and observe COMPUTER DATA INPUT (8) indicators. If all indicators are off, go to step Figure 3-7. 3-5.
7.
If any are on, perform the following: Alternately press RESET CONTROL (13) pushbutton and CONTROL lA (11) switch-indicator until all COMPUTER DATA INPUT indicators are off. If unable to clear all indicators, see Procedures for locating Stuck/Defective key. Press RESET DATA (7) switch. In the MCP DATA REGISTER (9), set the appropriate DlM/DOM channel assignment code for the Keyset/ Tray selected. (See Diagram A for assignment codes.) In MCP DATA REGISTER (9) set octal code for switch-indicator being checked. (See Diagrams B through F for switch-indicator octal codes.) Press CONTROL OA (12) switch-indicator and verify that selected switch-indicator is on amber. Clear MCP by pressing RESET MCP (6) pushbutton. Repeat steps 8 through 10 for other switch-indicators being checked. Upon completion of check, return MODE SELECTOR (1) switch to ON LINE and press ENTER (5) switch.
8. 9. 10. 11. 12. 13. 14.
3-3. 3-4.
SWITCH-INDICATOR TO LU 1 CHECK. At LU 1 Maintenance Control Panel, perform the following: 1. 2. 3. 4. 5. Press LAMP TEST (10) and verify that indicators come on. Set MODE SELECTOR (1) switch to OFF LINE. Set CHANNEL (3) toggle switch to DIM-DOM. Press ENTER (5) pushbutton switch and verify DlM-DOM (4) and OFF LlNE (2) indicators come on. Press CONTROL IA (1) switch-indicator.
Keyset and Tray Manual Test Procedures (Sheet 1 of 6) 3-13
NAVAIR 01-75PAC-12
6. Press RESET CHAN (5) pushbutton switch and observe COMPUTER DATA INPUT (8) indicators. If all indicators are off, go to step 7. If any are on, perform the following: Alternately press RESET CONTROL (13) pushbutton switch and CONTROL lA (11) switch-indicator until all COMPUTER DATA INPUT indicators are off. If unable to clear all indicators, see Procedure for locating Stuck/Defective Key.
29 28 27 26 25 24 23 22 21 20 19
COMPUTER DATA INPUT 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
7.
Press selected switch-indicator on appropriate Keyset/Tray. (See Diagrams B through F for switch-indicator layout.)
CHANNEL NUMBER READOUT POSITION READOUT POSITION FOR SWITCH CODE (OCTAL) SEE PARAGRAPH 3- AND DIAGRAMS -7 B THROUGH F 12 11 10 9 8 7 6 5 4 3 2 1 0
8.
Verifty octal readout at LU 1 COMPUTER DATA INPUT(8) indicators. (See Diagrams B through F for octal codes.)
29 28 27 26 25 24 23 22 21 20 19 18
MCP DATA REGISTER 17 16 15 14 13
9.
Upon completion of check, return MODE SELECTOR (1) switch to ON LINE and press ENTER (5) pushbutton switch.
ENTER CHANNEL NUMBER HERE (OCTAL) DIM/DOM, CHAN ASSIGNMENT CODES 000 000 000 000 000 000 000 001 010 011 100 110 SET/RESET CODE BIT ASSIGNMENT SEE PARAGRAPH 3- AND DIAGRAMS -7 B THROUGH F NOTE IF ANY OTHER DIM/DOM CHANNEL ASSIGNMENT CODE APPEARS, SEE NAVAIR 01-75PAC-12-7
3-6.
PROCEDURE FOR LOCATING STUCK/DEFECTIVE KEY. AT LU 1 Maintenance Control Panel perform the following: 1. At LU 1 Power Control Panel, set STATUS (17) switch to OFF.
2.
Press LAMP TEST (10) and verify that all indicators come on.
CHANNEL ASSIGNMENT CODES (Bits 15 thru 20) MDD TRAY SS 1 UKS SS 2 UKS NAVCOM UKS PILOT KEYSET SDD TRAY ORDNANCE PANEL AND ORDNANCE ALERT LIGHTS
000 001 Diagram A. Channel Assignment Codes
3.
Set MODE SELECTOR (1) switch to OFF LINE.
3-7.
The following switch-indicator codes are typical for all switch-indicators on all Keyset/Trays: 1. Keyset/TRAY switch-indicator output code Switch code (octal) which appears in COMPUTER DATA INPUT Indicators (bit positions 0 through 11) Channel number also comes on.
Switch code (octal) which appears in COMPUTER DATA INPUT indicators (bit positions 0 through 11) Channel number also comes on.
4.
Set CHANNEL (3) toggle switch to DIM-DOM.
5.
Press ENTER (5) pushbutton switch and verify DIM-DOM (4) and OFF LINE (2) indicators come on.
6.
Press RESET CHAN (15) pushbutton switch.
7.
Indicators in bit position 15 through 20 in COMPUTER DATA INPUT indicators reflect channel number of Keyset/TRAY with stuck key. (See Diagram A for channel numbers.)
Indicator lighting code (octal) set in MCP DATA REGISTER to cause legend to come on AMBER (bit positions 0 through 11)
8.
Indicators in bit positions 0 through 11 in COMPUTER DATA INPUT indicators reflect octal code for stuck switch-indicator. (See Diagram B through F for switch-indicator octal codes.)
0001 ** 0101
* **
0100
9.
At LU 1 Power Control Panel, set STATUS (17) switch to STATUS.
* Indicates green ** Indicates amber
Indicator reset code (octal) set in MCP DATA REGISTER to cause legend to go off (bit positions 0 through 11)
NOTE Switch-indicators come on GREEN. When an acknowledge condition occurs, an AMBER light overrides the GREEN light.
10.
Set MODE SELECTION (1) switch to ON LINE and press ENTER (5) pushbutton switch.
Figure 3-7. Keyset and Tray Manual Test Procedures (Sheet 2 of 6) 3-14
NAVAIR 01-75PAC-12
2. Keyset/Tray switch-indicator input code
Switch code (octal) which appears in COMPUTER DATA INPUT indicators (bit positions 0 through 11). Channel number also comes on. Switches with no octal code in lower half have no AMBER lighting capability and always come on GREEN. ** **
01XX
0021
**
02XX
INTENSITY ADJ
**
READOUTS MATRIX SEL PWR SUP FAULT SWITCHES 06XX PRO- 7 -
* Indicates green
NOTE The Pilot Keyset differs from the other keyset/trays in the number of digits required to light a switch-indicator. Example: to light switch-indicator M15 on the Pilot keyset you should insert octal code 404 (100 000 100) into the MCP DATA REGISTER (bits 0 through 8). To light an equivalent switch-indicator on a Universal Keyset requires a four digit octal code. Example: to light switch-indicator M-15 on a Universal Keyset, you would insert octal code 1307 (001 011 000 111) into MCP DATA REGISTER (bits 0 through 11).
U N I V E R S A L
**
00XX PRO- 1 -
**
07XX
**
10XX
PRO- 2 PRO- 3 -
**
03XX
**
04XX
**
05XX
PRO- 8 PRO- 9 -
PRO- 4 PRO- 5 PRO- 6 -
0021
* **
0025
0022
* ** * **
0027
0023
* **
0030
**
0001
M- 17 -
** *
M- 18 0026
M- 19 -
* ** ** * ** **
0002
* ** ** * ** ** *
0003
* ** ** * ** ** * ** *
0004
* ** * ** * ** * **
0024
1101 1100 M- 1 0005
1102 1100 M- 2 0006
1104 1100 M- 3 0007
1110 1100 M- 4 0010 M- 20 0031 M- 21 M- 22 M- 23 M- 24 -
0032
0033
0034
0035
K E Y S E T
1201 1200
1202 1200 M- 6 -
1204 1200 M- 7 -
1210 1200 M- 8 M- 25 0036 M- 26 M- 27 0037 M- 28 M- 29 0040
**
M- 5 -
0011
* ** * ** ** **
0012
0013
0014
1301 1300
1302 1300 M- 10 0016
1303 1300
1304 1300
**
M- 9 0015
** *
**
M- 11 0017
**
M- 12 0020
M- 30 0041
M- 31 0042
M- 32 -
* ** **
* ** **
0043
* ** **
0044
* ** **
0045
* **
1305 1300
1306 1300 M- 14 ** -
1307 1300
1310 1300
1410 1400 M- 33 -
1501 1500 M- 34 -
1502 1500 M- 35 -
1504 1500 M- 36 -
1510 1500 M- 37 -
P I L O T
01 * ** 100 101 ** M-1 05 * ** ** 201 200 M-5 11 * ** ** 301 300 M-9 15 * ** ** 401 400 M-13 21 * M-17
02 * ** 100 102 ** M-2 06 * ** 200 202 ** M-6 12 * ** ** 302 300 M-10 16 * ** 400 402 ** M-14 22 * M-18
03 * 04 * ** ** ** 100 110 100 ** 104 M-3 M-4 07 * 10 * ** ** ** ** 204 200 210 200 M-7 M-8 13 * 14 * ** ** ** ** 304 300 310 300 M-11 M-12 17 * 20 * ** ** ** ** 404 400 410 400 M-15 M-16 23 * 24 * M-19 M-20
**
INTENSITY ADJ
M- 13 -
**
M- 15 ** -
**
M- 16 ** -
25 * M-21 27 *
PWR SUP
36 * M-22 31 * M-25 36 * M-30 42 * M-34 32 * M-26 37 * M-31 40 * M-32 43 * M-35 33 *
MATRIX SELECT
NOTE
FAULT
30 * M-24
Matrix readout M-1 through M-8 message positions simultaneously come on with the actuation of MATRIX SELECT switch indicators M-9 through M-16. M-9 causes simultaneous lighting of message for M-1 through M-8. Messages for PRO-1 through 9 can be activated by setting the code for the desired positional display of a message by prefixing the two message bits shown below with the PRO selection bits. To turnoff any PRO message lamp, set the PRO code and suffix with 00. To turn off all PRO message lamps simultaneously set 1700, 1300, 1400, 1500, or 1600.
XX00 XX12 XX01 XX02
K E Y S E T
34 * M-28
35 * M-29 41 *
M-33
PILOT KEYSET SWITCH NUMBERING IS INDICATED BELOW EACH SWITCH
XX11
XX03 XX04 XX07 XX06 XX05
Diagram B. Pilot Keyset
XX10
Diagram C. Universal Keyset
NAVAIR 01-75PAC-12
MODULE REPLACEMENT. In the event of a failure of a complete section of the MDD, it may be necessary to change one of the lamp driver modules. This diagram shows a breakdown of switch-indicators versus their associated lamp driver.
= A6A1 = A6A2 = A6A3
POWER SUPPLY FAULT
O R D N A N C E P A N E L
BIN
SLT
PRO-** PRO-** -1 -2 01XX OFF = 0100 02XX 0200 = OFF
** PRO-3 PRO-** -4
LAMP INTENSITY LOAD
03XX OFF = 0300 0500 ** 04XX 0400 = OFF
0502
**
**
0504
UNLOAD **
**
0500
**
0003 * M-3
* CUE LIGHT + ONLY CUE LIGHT ONLY + * = A6A4 = A6A6 = A6A5
0001 * M-1
0002 * M-2
PRO-1 THROUGH PRO-4 MESSAGE POSITION CODE LEGEND PREFIX THE MESSAGE POSITION TO BE ACTIVATED WITH THE INDIVIDUAL PRO CODE.
* * * *
CUE LIGHT ONLY
NOTE
ORD ALERT lights on Observer Stations use the same channel assignments as the Ordnance Panel. To test the ORD ALERT Lights set 0501 (flashes). Reset 0500 (off).
ORDNANCE ALERT LIGHT ASSEMBLY (ORD ALERT LIGHT 00 12 02 11 01
TACCO TRAY SWITCH INTERDEPENDENCY The diagram below shows the relationship between series-wired groups of switches. The accompanying legend defines the five groups to the COMPUTER DATA INPUT address bits (0 through 11).
*
= GROUP 04XX = GROUP 20XX = GROUP10XX *
. . +
= GROUP 01XX = GROUP 00XX *
03 ORD ALERT 04 07 05
PUSH TO
* * *
10 06
TEST + + +
Diagram D. Ordnance Panel
Diagram E. MDD Tray
NAVAIR 01-75PAC-12
MASTER TURN OFF CODES

SWITCH- INDICATOR GROUP MATRIX SELECT A (MSA- THRU MSA-1 -12) MATRIX SELECT B (MSB- THRU MSB-1 -12) MATRIX SELECT C (MSC- THRU MSC-1 -12) MFS- THRU MFS-1 -29 MFS-30 THRU MFS-66 MATRIX A (MXA- THRU MXA-1 -12) MATRIX B (MXB- THRU MXB-1 -12) MATRIX C (MXC- THRU MXC-1 -12) CODE 0000 0100 1200 1500 1600 3500 3600 3700
NOTE
Setting of indicator lighting code for any MATRIX readout (MX series A, B, or C) causes appearence of an AMBER rectangle in that position. Setting the 11th switch lighting code in the MATRIX SELECT (MS series A, B, or C) group causes the upper 6 MATRIX readout plus MATRIX SELECT switch 11 to come on. Setting any MATRIX SELECT switch lighting code (other than 11 or 12) lights legends in all 12 MATRIX readouts plus the MATRIX SELECT switch selected comes on.
0414 * MFS-12 0420 * ** ** 0506 0606 MFS-15 MFS-16 0417 * 0421 * MFS-17
0415 * ** ** MFS-13
0504 0604
0416 * MFS-14
0423 * ** ** 0507 0607 MFS-18 MFS-19
0422 *
OVERFLOW
TEST 0403 * ** ** 0303 0403 MFS-3 0410 * ** ** 0311 0411 MFS-8
0401 * ** ** 0301 0401 MFS-1 0404 * 0405 * 0406 * ** 0404 0306 0406 0307 0407 ** ** ** ** ** 0304 MFS-4 MFS-5 MFS-6 0411 * 0412 * 0413 * ** 0501 0502 0602 0503 0603 ** ** ** ** ** 0501 MFS-9 MFS-10 MFS-11 0001 * -35 0002 * MFSMFS-36 0005 * ** ** 1302 1402 MFS-39 0007 * ** ** 1304 1404 MFS-41 0016 * 0017 * ** ** -53 MFS-52 MFS3307 3407
0424 * 0425 * 0426 * 0427 * 0430 * ** ** 0511 0611 0701 1001 0702 1002 0701 1003 ** ** ** ** ** ** ** ** MFS-20 MFS-21 MFS-22 MFS-23 MFS-24
0510 0610
0402 * ** ** 0302 0402 MFS-2 0407 * ** ** 0310 0410 MFS-7 2001 * ** ** 2301 2401 MXA-1
0431 * 0432 * 0433 * 0434 * 0435 * ** ** 0706 1006 0707 1007 0710 1010 0711 1011 ** ** ** ** ** ** ** ** MFS-25 MFS-26 MFS-27 MFS-28 MFS-29
0704 1004
0436 * 0437 * 0440 * 0441 * 0442 * ** 1201 1102 1202 1103 1203 1104 1204 1106 1206 ** ** ** ** ** ** ** ** ** 0111 MFS-30 MFS-31 MFS-32 MFS-33 MFS-34 2015 * ** ** 2505 2606 MXB-1 2016 * 2017 * ** ** ** ** 2507 2607 2510 2610 MXB-2 MXB-3 2020 * ** ** 2511 2611 MXB-4 2021 * ** ** 2701 3001 MXB-5 2022 * ** ** 2702 3002 MBA-6 0443 * ** ** 1107 1207 MFS-43 0444 * ** ** 1110 1210 MFS-44 0445 * ** ** 1111 1211 MFS-45 0446 * ** ** MFS-46
1301 1401
2002 * 2003 * 2004 * 2005 * 2006 * ** ** ** ** 2304 2404 2306 2406 2307 2407 ** ** ** ** ** ** 2302 2402 2303 2403 MXA-2 MXA-3 MXA-4 MXA-5 MXA-6 2011 * 2012 * 2013 * 2014 * ** 2601 2502 2602 2503 2603 2504 2504 ** ** ** ** ** ** ** 2501 MXA-9 MXA-10 MXA-11 MXA-12 1003 * 1004 * 1005 * 1006 * ** ** 0004 0000 0005 0000 0006 0000 ** ** ** ** ** ** 0003 0000 MSA-3 MSA-4 MSA-5 MSA-6 1011 * 1012 * 1013 * 1014 * ** ** 0012 0401 0013 0000 0014 0000 ** ** ** ** ** ** 0011 0000 MSA-9 MSA-10 MSA-11 MSA-12 0013 * 0014 * 0015 * ** ** 1311 1411 3306 3406 ** ** ** ** MFS-49 MFS-50 MFS-51
1310 1410
0003 *
2031 * ** ** 3101 3201 MXC-1 2037 * ** ** 3110 3210 MXC-7 1031 * ** ** 0201 0201 MSC-1
0207 0200
2032 * 2033 * ** 3202 3103 3203 ** ** ** 3102 MXC-2 MXC-3 2040 * ** ** 3111 3211 MXC-8 1032 * ** ** 0202 0200 MSC-2
2034 * ** ** 3104 3204 MXC-4
2035 * 2036 * ** 3206 3107 3207 ** ** ** 3106 MXC-5 MXC-6
2007 * 2010 * ** 2410 2311 2411 ** ** ** 2310 MXA-7 MXA-8 1001 * 1002 * ** ** ** ** 0001 0000 0002 0000 MSA-1 MSA-2 1007 * 1010 * ** ** ** ** 0007 0000 0010 0000 MSA-7 MSA-8 0012 * ** ** MFS-47 MFS-48
1307 1407
-37 0004 * MFSMFS-38 0006 * ** ** MFS-40

1303 1403
2023 * 2024 * ** 3003 2704 3004 ** ** ** 2703 MXB-7 MXB-8 1015 * 1016 * ** ** 0102 0100 ** ** MSB-1 MSB-2
0101 0100
2025 * 2026 * 2027 * 2030 * ** 3006 2707 3007 2710 3010 2711 3011 ** ** ** ** ** ** ** 2706 MXB-9 MXB-10 MXB-11 MXB-12 ** ** 0103 0100 1017 * ** ** 0104 0100 1020 * ** ** 0105 0100 1021 * ** ** 0106 0100 1022 *
2041 * 2042 * 2043 * 2044 * ** 3401 3302 3402 3303 3403 3304 3404 ** ** ** ** ** ** ** 3301 MXC- MXC-9 -10 MXC-11 MXC-12 1033 * ** ** 0203 0200 MSC-3 1034 * ** ** 0204 0200 MSC-4 1035 * ** ** 0205 0200 MSC-5 1036 * ** ** 0206 0200 MSC-6
MSB-3
MSB-4
MSB-5
MSB-6
0010 * ** ** 1306 1406 MFS-42
1023 * 1024 * ** ** ** ** 0107 0100 0110 0100 MSB-7 MSB-8
1025 * 1026 * 1027 * 1030 * ** ** ** ** ** ** ** ** 0111 0100 0112 0101 0113 0100 0114 0100 MSB-9 MSB-10 MSB-11 MSB-12 0030 * 0031 *
1037 * 1040 * 1041 * 1042 * 1043 * 1044 * ** ** 0210 0200 0211 0200 0212 0200 0213 0200 0214 0200 ** ** ** ** ** ** ** ** ** ** MSC-7 MSC-8 MSC-9 MSC-10 MSC-11 MSC-12 0034 * 0033 * ** ** ** ** 3311 3411 -66 MFS-65 MFS3310 3410
0011 *
0032 *
0035 *
0036 *
MFS-62 MFS-63 MFS-64

KEYLEVER CODE KEYLEVER LEGEND
MFS-67 MFS-68 55 7 Y 12 73 H B 06 SPACE 22 6 42 G 05 56 U 74 N 8 66 J 07 57 I 75 M 9 67 K 10 60 O 76 0 50 L 11 61 BACK 27 P 51 37 26 . 36
0020 *
0021 *
0022 *
0023 *
0024 *
0025 *
0026 * 0027 * MFS-61A
NOTE: PREFIX ALL KEYLEVER CODES WITH 01
MFS-54 MFS-55
MFS-56 MFS-57 MFS-58
MFS-59 MFS-60
0027 * MFS-61B
1 25 2 23 Q 62 EOM 24 A NEXT LINE 01
52 3 W 63 13 S Z 02
53 E 70 X
4 64 D 03
54 R 71 C
5 65 F 04
40 T 72 V
Diagram E. MDD Tray (Continued)
NAVAIR 01-75PAC-12
AMBER border is controlled by module A6A4
NOTE
MODULE REPLACEMENT. In the event of a failure of a complete section of the SDD Tray, it may be necessary to change one of the lamp driver modules. This diagram SDD shows a breakdown of switch-indicators versus their associated lamp driver
NO REPLACEABLE MODULE
(CHECK POWER SUPPLY VOLTAGES)
A6A1
A6A4
0013
* **
0014
* **
0015
* **
0016
* **
0031
0032
0033
0034
0035
0301 0300 M-11
**
0302 0300 M-12
**
0304 0300 M-13
**
0310 0300 M-14
**
M-25
M-26
M-27
M-28
M-29
0017
* **
0020
* **
0021
* **
0022
* **
0036
0037
0040
0041
0042
0401 0400 M-15 0001
**
0402 0400 M-16
**
0404 0400 M-17
**
0410 0400 M-18
**
M-30
M-31
M-32
M-33
M-34
0002
0003
* **
0004
* **
0005
* **
0043
0044
0045
0101 0100 M-1 M-2 M-3
**
0102 0100 M-4
**
0104 0100 M-5
**
M-35
M-36
M-37
0006
* **
0007
* **
0010
* **
0011
* **
0012
* **
0023
* **
0024
* **
0025
* **
0026
* **
0027
* **
0030
* **
0110 0100 M-6
**
0201 0200 M-7
**
0202 0200 M-8
**
0204 0200 M-9
**
0210 0200 M-10
**
0501 0500 M-19
**
0502 0500 M-20
**
0503 0500 M-21
**
0504 0500 M-22
**
0505 0500 M-23
**
0506 0500 M-24
**
0046
0046
M-38
M-38
Diagram F. SDD Tray
017-0781
SECTION 4
DIGITAL DATA COMPUTER
THIS SECTION CONTAINS DATA APPLICABLE TO AIRCRAFT BUNO 156507 THROUGH 161596 NOT INCORPORATING AFC 450
SECTION 4 DIGITAL DATA COMPUTER
NAVAIR 01-75PAC-12
(TACCO STATION) IP-917/ASA-70 MULTIPURPOSE DATA DISPLAY (MDD), (MDD TRAY) (SEE NAVAIR 01-75PAC- -2) -12-
1J14 SWITCH INPUTS 1J13 KEYBOARD AND SWITCH INPUTS 1J12 1J11 LAMP OUTPUTS BIT CODES AND LAMP OUTPUTS
1J17 1J18 1J20 1J19
(RACK D2) MX-8023( )/AYA- DATA -8 ANALYSIS LOGIC UNIT (LU 1) (SEE SECTION 5) DIM/DOM ASSIGNMENTS DIM CHANNEL MDD TRAY 00 SS1 KEYSET 01 SS2 KEYSET 02 NAVCOMM KEYSET 03 PILOT KEYSET 04 TEST LOOP 1 05 SDD TRAY 06 STATUS 07 SONO RCVR 08 ORD PANEL 09 TEST LOOP 2 10 SAD 11 BT RECORDER 12 NOT USED 13 NOT USED 14 ESM 15
1J1 CHANNEL 00 OUTPUT CONTROL AND GROUP 0 OUTPUT DATA 1J2 CHANNEL 01, 02, AND 03 OUTPUT CONTROL DOM MDD TRAY SS1 KEYSET SS2 KEYSET NAVCOMM KEYSET PILOT KEYSET TEST LOOP 1 SDD TRAY STATUS SONO RCVR ORD PANEL TEST LOOP 2 NOT USED RIU NOT USED IRDS ESM 1J3 CHANNEL 01 INPUT CONTROL AND INPUT DATA 1J4 (RACK C1) A363 COMMUNICATIONS INTERFACE NUMBER 1 (COMM INTERFACE 1) (SEE NAVAIR 01-75PAC- -3) -12(RACK D3) CV-2461A/A SIGNAL DATA CONVERTER (SDC) (SEE NAVAIR 01-75PAC- -2) -12(SENSOR STATION 3) MX-8109/ASA- MAD UNIT -71 NUMBER 2 SELECTOR CONTROL (SELECTOR CONTROL SUBASSEMBLY) (SEE NAVAIR 01-75PAC- -5) -12CHANNEL 00 INPUT CONTROL AND INPUT DATA 3J4 CHANNEL 02 INPUT CONTROL AND INPUT DATA E D C B A
1J5
(SENSOR STATION 1) C-7627(P)/AYA-8 CONTROL-INDICATOR (SS 1 UNIVERSAL KEYSET) (SEE SECTION 3)
10J2 SWITCH INPUTS 10J1 LAMP OUTPUTS
1J26 1J27
CHANNEL 02 OUTPUT CONTROL AND GROUP 0 OUTPUT DATA
3J5
1J6
J2
J1 CHANNEL 03 INPUT CONTROL AND INPUT DATA F
(SENSOR STATION 2) C-7627(P)/AYA-8 CONTROL-INDICATOR (SS 2 UNIVERSAL KEYSET) (SEE SECTION 3)
11J2 SWITCH INPUTS 11J1 LAMP OUTPUTS
1J28 1J33 1J29 SAD MARK 2J1
(NAVCOMM STATION) C-7627(P)/AYA-8 CONTROL-INDICATOR (NAVCOMM UNIVERSAL KEYSET) (SEE SECTION 3) (CENTER CONSOLE) C-7629(P)/AYA- CONTROL-8 INDICATOR (PILOT KEYSET) (SEE SECTION 3)
4J2 SWITCH INPUTS 4J1 LAMP OUTPUTS (FS 288) J/P288 SWITCH INPUTS 5J1 LAMP OUTPUTS (FS 288) J/P270 SWITCH INPUTS 5J11 LAMP OUTPUTS
1J30 1J31
INPUT AROL, IFPM AND PWR MONITOR DIM TELETYPE SDC
COMPUTER CHANNEL 00 GROUP 00 01 *02 *03
OUTPUT ARO INS STATUS DATA
(RACK B1) NAVIGATION INTERCONNECTION BOX 1J17 (NAV INTERCONNECTION BOX)
5J2
1J23 1J24
DOM HSP SDC INS 1 NAV MODE/ DIGITAL VALID
(SEE NAVAIR 01-75PAC- -1) -12(FS 440) TB452 J3 (RACK D1) 673986 DIGITAL DATA UNIT (DDU) 4
NOTE * HARDWIRED THROUGH LU 1
J4 1J22 1J21 1J7 DATA DISPLAY 1J25 1J8 DATA DISPLAY 1J9 COMMANDS 1J13 1J2 INS 2 NAV MODE/ DIGITAL VALID (FS 525) TB435 MARK-ON-TOP 2J2 (TACCO STATION) IP-919/ASA- AUXILIARY -70 READOUT DISPLAY (ARO) (SEE NAVAIR 01-75PAC- -2) -12(RACK C3) MX-7974/ASA- RADAR -69 INTERFACE UNIT (RIU) (SEE NAVAIR 01-75PAC- -5) -12(RACK D1) 2J4 A291 POWER DISTRIBUTION BOX (SEE NAVAIR 01-75PAC- -2) -122J4 115 VAC 3 115 VAC 3 POWER ON 1J32 1J39 LU 1 OVERTEMP ESM STATUS 1J16 ESM DATA (RACK D1) DPS ELECTRONIC CIRCUIT BREAKER PANEL PWR DISTR BOX COMPUTER A B C M DC N LU 1 OVERTEMP (TACCO STATION) 1J1 A324 TACCO POWER CONTROL (SEE NAVAIR 01-75PAC- -2) -121J2 STATUS AND CONTROL L 1J1 LU 3 OVERTEMP LU 2 OVERTEMP J K 3J2 (SEE NAVAIR 01-75PAC- -3) -12(FS 288) P/J292 (FS 197) TB6 (COPILOT CONTROL WHEEL) TB457 (NAVCOMM STATION) IP-919/ASA- AUXILIARY -70 READOUT DISPLAY (ARO) (SEE NAVAIR 01-75PAC- -2) -1227P (PILOT CONTROL WHEEL) TB458 27P (PILOT CONTROL WHEEL) 672243 MARK-ON-TOP SWITCH (SEE SECTION 5) (COPILOT CONTROL WHEEL) 672243 MARK-ON-TOP SWITCH (SEE SECTION 5)
(SENSOR STATION 3) IP-918/ASA- SENSOR DATA -70 DISPLAY (SDD), (SDD TRAY) (SEE NAVAIR 01-75PAC- -2) -12-
5J12
(RACK F2) C-7628/AYA-8 CONTROL-INDICATOR (ORDNANCE PANEL) (SEE SECTION 3) (RACK C1) RO-308/SSQ-36 BATHYTHERMOGRAPH DATA RECORDER (BT RECORDER) (SEE NAVAIR 01-75PAC- -4) -12(RACK C3) 962982 IRDS INTERCONNECTION BOX (SEE NAVAIR 01-75PAC- -5) -12-
6J1 LAMP OUTPUT/ SWITCH INPUTS
J3 SEAWATER TEMP
1J33 ORD ALERT AND 12 VDC UNREGULATED 115 VAC 3
(FS 440) TB452
(FS 440) TB452 G H
1FL1J1 2J108 GIMBAL CONTROL 2J109 MODE STATUS (FS 525) TB435 1J11
ESM SYSTEM (SENSOR STATION 1) C-7617/ARR-72(V) DUAL CHANNEL CONTROLINDICATOR (DCCI) (TYPICAL 4 PLACES) (SEE NAVAIR 01-75PAC- -4) -12(SENSOR STATION 2) C-7617/ARR-72(V) DUAL CHANNEL CONTROLINDICATOR (DCCI) (TYPICAL 4 PLACES) (SEE NAVAIR 01-75PAC- -4) -124J2 (RACK G1) PIC COMMAND/STATUS 4J2 PIC 12 - COMMAND/STATUS -15 PIC 16- COMMAND/STATUS/LOD -19 PIC 8- COMMAND/STATUS -11 4J2 PIC COMMAND/STATUS PIC 4- COMMAND/STATUS -7 (SEE NAVAIR 01-75PAC- -5) -12ESM COMMANDS
1J12 1J34 PIC 0- COMMAND/STATUS -3 1J35
1J36 1J37 1J38
SA-1605/ARR-72(V) AUDIO SWITCHING ASSEMBLY (AUDIO SWITCHING UNIT) (SEE NAVAIR 01-75PAC- -4) -12-
(4-1 blank)/4-2
Change 3
Figure 4-1. Central Computer Signal Flow Diagram, Aircraft BUNO 156507 through 158927 and 158929 through 159329 Not Incorporating AFC 450 (Sheet 1 of 2)
NAVAIR 01-75PAC-12
(RACK D2) A1J84 A B C D E CHANNEL 00 OUTPUT CONTROL AND GROUP 0 OUTPUT DATA A1J88 CHANNEL 01, 02, 03 OUTPUT CONTROL CHANNEL 01 INPUT CONTROL AND INPUT DATA CHANNEL 00 INPUT CONTROL AND INPUT DATA CHANNEL 02 INPUT CONTROL AND INPUT DATA A1J80 TIMING AND CONTROL SECTION A1J72 A1J68 A1J76 ARITHMETIC SECTION A1J70 A1J82 A1J86 5J19 A1J74 A1J75 A1J78 5J26 VECTOR UNBLANK VECTOR SWEEP ENABLE LU 3 OVERTEMP 3FL1J1 115 VAC 3 MONITOR AND CONTROL TO ALL COMPUTER UNITS POWER SUPPLY UNIT 3J17 FGL X - DEFLECTION 3J18 FGL VIDEO 3J19 FGL UNBLANK (RACK D1) A8J04 A8J03 A8J02 A8J01 A8J06 A8J07 CHANNEL 08 INPUT CONTROL AND INPUT DATA A10P1 CHANNEL 09 INPUT CONTROL AND INPUT DATA CHANNEL 10 INPUT CONTROL AND INPUT DATA CHANNEL 08 OUTPUT CONTROL AND GROUP 2 OUTPUT DATA (RACK B3) A507 COMMUNICATION INTERFACE NUMBER 2 (COMM INTERFACE 2) (SEE NAVAIR 01-75PAC-12-3) 8J2 READ DATA AND STATUS 8J1 WRITE DATA AND COMMANDS (RACK D3) RD-319/AYA-8 MAGNETIC TAPE TRANSPORT (MTT B) (SEE SECTION 9A) M N 28 VDC 115 VAC 3 8J2 READ DATA AND STATUS 8J1 WRITE DATA AND COMMANDS 2J19 LU 2 OVERTEMP 2FL1J1 115 VAC 3 2J14 STATUS 6J6 2J13 2J16 STATUS 5J9 (SENSOR STATION 1) A269 AFT ARMAMENT INTERCONNECTION BOX (SEE NAVAIR 01-75PAC-12-6) (RACK G2) A275 SEARCH STORES INTERCONNECTION BOX (SEE NAVAIR 01-75PAC-12-6) (RACK F2) SB-3152/AYA-8 ELECTRICAL TEST PANEL (ARM/ORD TEST PANEL) (SEE SECTION 6) 2J12 2J11 2J15 STATUS 2J17 CONTROL 2J8 2J9 (RACK B1) A395 FORWARD ARMAMENT INTERCONNECTION BOX (SEE NAVAIR 01-75PAC-12-6) 7J3 CHANNEL 09, 10, 11 OUTPUT CONTROL CHANNEL 11 OUTPUT CONTROL AND GROUP 2 OUTPUT DATA 2J6 2J3 2J4 2J5 2J1 2J2 MX-8024 ( ) /AYA-8 DATA ANALYSIS LOGIC UNIT (LU 2) (SEE SECTION 6) COMPUTER CHANNEL 2J8 INS 1 DATA AND CONTROL 2J9 INS 2 DATA AND CONTROL J3 J4 673986 DIGITAL DATA UNIT (DDU) 4 (SEE NAVAIR 01-75PAC-12-3) (RACK D1) 1J23 1J18 3J21 3J16 3J14 VECTOR UNBLANK 3J15 FGL Y - DEFLECTION 1J30 1J29 CP-901(V)( )/ASQ-114 (V) DIGITAL DATA COMPUTER (CENTRAL COMPUTER) I/O UNIT DESTRUCTIVE READOUT MEMORY UNIT CENTRAL PROCESSOR UNIT NON-DESTRUCTIVE READOUT MEMORY (NDRO) I/O UNIT (RACK D1) A1J83 A1J87 A1J79 A1J67 A1J66 3J1 CHANNEL 04 OUTPUT CONTROL AND GROUP 1 OUTPUT DATA CHANNEL 05, 06, 07 OUTPUT CONTROL CHANNEL 07 INPUT CONTROL AND INPUT DATA 3J2 3J3 IN 22J5 CHANNEL 04 OUTPUT CONTROL AND OUTPUT DATA 3J4 DIFAR NOT USED MX-8034/AYA-8 DATA ANALYSIS LOGIC UNIT (LU 3) (SEE SECTION 7) 3J24 HORIZ INPUT 3J23 VERT INPUT COMPUTER CHANNEL *04 05 OUTPUT DIFAR SENSOR DATA DISPLAY GROUP 01 PILOT DISPLAY TACCO DATA DISPLAY 3J26 UNBLANKING INPUT 3J25 VIDEO INPUT (TACCO STATION) 3J5 3J6 3J7 OVERFLOW INDICATOR 3J13 VECTOR SWEEP ENABLE 1J19 1J26 SELECTION AND POSITION COMMANDS VECTOR/ANALOG DATA 1J5 1J6 1J7 IP-917/ASA-70 MULTIPURPOSE DATA DISPLAY (MDD) (SEE NAVAIR 01-75PAC-12-2) P/J240 1J3 P/J238 1J7 P/J236 1J5 (FS 288) P/J234 1J4 (PILOT INSTRUMENT PANEL) IP-886A/ASA-66 TACTICAL DATA DISPLAY (SEE NAVAIR 01-75PAC-12-1)
(RACK D3) 22J4 J-3346A/AQA-7(V) DIGITAL CHANNEL 04 INTERFACE UNIT (DIU) INPUT CONTROL AND INPUT DATA (SEE NAVAIR 01-75PAC-12-4) (SENSOR STATION 3) IP-918/ASA-70 SENSOR DATA DISPLAY (SDD) (SEE NAVAIR 01-75PAC-12-2)
5J6 SELECTION AND POSITION COMMANDS 5J7 5J5 OVERFLOW VECTOR/ANALYSIS DATA
3J8 3J9 3J10 3J20
HAWK II PWR MONITOR AND LU 3 IFPM
06 07
CHANNEL 03 INPUT CONTROL AND INPUT DATA CHANNEL 12 OUTPUT CONTROL AND OUTPUT DATA COMPUTER DIAGNOSTIC CABLE CHANNEL 06 INPUT CONTROL AND INPUT DATA (HAWK II DIAGNOSTICS) NOTE 1 2 3 4 5 6 7 DELETED DELETED DELETED AIRCRAFT INCORPORATING AFC 408 DELETED DELETED DELETED
A1J81
NOTE *HARDWIRED THROUGH LU 3
A9J01 A9J05 A9J06 (RACK D2)
A8J02
A9J03
A9J04
(RACK D2)
TS-2899/ASQ-114(V) COMPUTER MAINTENANCE CONSOLE (MAINTENANCE CONSOLE)
TF-543/ASQ-114(V) POWER ISOLATION TRANSFORMER (ISOLATION TRANSFORMER)
INPUT
OUTPUT NAV MUX
NAV 08 MULTIPLEXER PWR MONITOR ARM/ORD 09 MAG TAPE 10 TRANSPORT TRANS DATA LINK *11
GROUP 02 ARM/ORD MAG TAPE DATA LINK
G H
115 VAC 3 115 VAC 3
CHANNEL 11 INPUT CONTROL AND INPUT DATA (RACK D3)
7J2
NOTE *HARDWIRED THROUGH LU 2 2J10
J K L
LU 3 OVERTEMP LU 2 OVERTEMP STATUS AND CONTROL
RD-319/AYA-8 MAGNETIC TAPE TRANSPORT (MTT A) (SEE SECTION 9A)
2J18 ARMAMENT/ORDNANCE CONTROL
7J1
Figure 4-1. Central Computer Signal Flow Diagram, Aircraft BUNO 156507 through 158927 and 158929 through 159329 Not Incorporating AFC 450 (Sheet 2 of 2)
Change 3
4-3
NAVAIR 01-75PAC-12
(TACCO STATION)
IP-917/ASA-70 MULTIPURPOSE DATA DISPLAY (MDD), (MDD TRAY) (SEE NAVAIR 01-75PAC-12-2)
1J14 SWITCH INPUTS 1J13 KEYBOARD AND SWITCH INPUTS 1J12 BIT CODES AND LAMP OUTPUTS 1J11 LAMP OUTPUTS
1J17 1J18 1J20 1J19
(RACK D2) MX-8023( )/AYA- DATA -8 ANALYSIS LOGIC UNIT (LU 1) (SEE SECTION 5) DIM/DOM ASSIGNMENTS CHANNEL 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15
1J1 CHANNEL 00 OUTPUT CONTROL AND GROUP 0 OUTPUT DATA 1J2 DOM MDD TRAY SS1 KEYSET SS2 KEYSET NAVCOMM KEYSET PILOT KEYSET TEST LOOP 1 SDD TRAY STATUS SONO RCVR ORD PANEL TEST LOOP 2 NOT USED RIU NOT USED IRDS ESM CHANNEL 01, 02, AND 03 OUTPUT CONTROL 1J3 CHANNEL 01 INPUT CONTROL AND INPUT DATA 1J4 (RACK C1) A363 COMMUNICATIONS INTERFACE NUMBER 1 (COMM INTERFACE 1) (SEE NAVAIR 01-75PAC- -3) -12(RACK D3) CV-2461A/A SIGNAL DATA CONVERTER (SDC) (SEE NAVAIR 01-75PAC- -2) -12(SENSOR STATION 3) MX-8109/ASA- MAD UNIT -71 2J1 NUMBER 2 SELECTOR CONTROL (SELECTOR CONTROL SUBASSEMBLY) (SEE NAVAIR 01-75PAC- -5) -12(RACK B1) OUTPUT ARO GROUP 00 INS STATUS DATA 1J17 NAVIGATION INTERCONNECTION BOX (NAV INTERCONNECTION BOX) (SEE NAVAIR 01-75PAC- -1) -12J3 INS 1 NAV MODE/ DIGITAL VALID J4 INS 2 NAV MODE/ DIGITAL VALID (SEE NAVAIR 01-75PAC- -3) -12(RACK D1) 673986 DIGITAL DATA UNIT (DDU) CHANNEL 00 INPUT CONTROL AND INPUT DATA 3J4 CHANNEL 02 INPUT CONTROL AND INPUT DATA CHANNEL 03 INPUT CONTROL AND INPUT DATA (RACK D3) J1 MX-9360/AYA-8B DATA ANALYSIS LOGIC UNIT (LU 4) (SEE SECTION 8) DMS ASSIGNMENTS INPUT CHANNEL OUTPUT DMS TEST LOOP SRS ADL OMEGA HACLS NOT USED INPUT HAWK II NOT II USED DMS SCC DAMS 00 01 02 03 04 05-07 COMPUTER CHANNEL DMS TEST LOOP SRS ADL OMEGA HACLS NOT USED OUTPUT C B A
DIM
(SENSOR STATION 1)
C-7627(P)/AYA-8 CONTROL-INDICATOR (SS1 UNIVERSAL KEYSET) (SEE SECTION 3)
10J2 SWITCH INPUTS 10J1 LAMP OUTPUTS 11J2 SWITCH INPUTS 11J1 LAMP OUTPUTS
1J26 1J27
(SENSOR STATION 2) C-7627(P)/AYA-8 CONTROL-INDICATOR (SS2 UNIVERSAL KEYSET)

(SEE SECTION 3)
MDD TRAY SS1 KEYSET SS2 KEYSET NAVCOMM KEYSET PILOT KEYSET TEST LOOP 1 SDD TRAY STATUS SONO RCVR ORD PANEL TEST LOOP 2 SAD BT RECORDER NOT USED NOT USED ESM
D
E F 12J7 12J9 12J10 12J14 12J18 12J23 12J12 12J13 CHANNEL 15 INPUT CONTROL AND INPUT DATA CHANNEL 14 INPUT CONTROL AND INPUT DATA CHANNEL 06 INPUT CONTROL AND INPUT DATA/HAWK II DIAGNOSTICS CHANNEL 13, 14, 15 OUTPUT CONTROL CHANNEL 13 INPUT CONTROL AND INPUT DATA CHANNEL 12 OUTPUT CONTROL AND GROUP 03 OUTPUT DATA HORIZ INPUT VERT INPUT VIDEO INPUT UNBLANKING INPUT HARPOON DATA 12J20 HARPOON COMMANDS 1J4 1J5 1J3 1J7 (SEE NAVAIR 01-75PAC-12-4) J2 (RACK B2) CP-1138( )(V)1/UYK DATA PROCESSOR COMPUTER (DPC) (SENSOR STATION 1/2) IP-886/ASA-66 TACTICAL DATA DISPLAY
1J5
3J5
1J6
J2
G H
J K L M
1J28 1J33 1J29 SAD MARK
(NAVCOMM STATION)
C-7627(P)/AYA-8 CONTROL-INDICATOR (NAVCOMM UNIVERSAL KEYSET) (SEE SECTION 3)
4J2 SWITCH INPUTS 4J1 LAMP OUTPUTS (FS 288) J/P288 SWITCH INPUTS 5J1 LAMP OUTPUTS (FS 288) J/P270 SWITCH INPUTS 5J11 LAMP OUTPUTS
1J30 1J31
INPUT AROL, IFPM AND PWR MONITOR DIM TELETYPE SDC
COMPUTER CHANNEL 00
06 GROUP 01 12 HAWK GROUP 03 13 14 15 DMS SCC DAMS 12J24 12J25 12J3
(CENTER CONSOLE)
C-7629/AYA-8 CONTROL-INDICATOR (PILOT KEYSET) (SEE SECTION 3)
5J2
1J23 1J24
01 *02 *03
DOM HSP SDC
(FS 440) TB452
NOTE * HARDWIRED THROUGH LU 1
(SENSOR STATION 3)
IP-918/ASA-70 SENSOR DATA DISPLAY (SDD), (SDD TRAY) (SEE NAVAIR 01-75PAC-12-2) (RACK F2) C-7628/AYA-8 CONTROL-INDICATOR (ORDNANCE PANEL) (SEE SECTION 3) (RACK C1) RO-308/SSQ-36 BATHYTHERMOGRAPH DATA RECORDER (BT RECORDER) (SEE NAVAIR 01-75PAC-12-4)
5J12
1J22 1J21 1J7 DATA DISPLAY 1J8 DATA DISPLAY 1J25 J2 1 1J9 COMMANDS 1J2 3J2 (TACCO STATION) IP-919/ASA- AUXILIARY -70 READOUT DISPLAY (ARO) (SEE NAVAIR 01-75PAC- -2) -12(RACK C3) MX-7974/ASA- RADAR -69 INTERFACE UNIT (RIU) (SEE NAVAIR 01-75PAC- -5) -12-
10
(SEE NAVAIR 01-75PAC-12-6)
6J1 LAMP OUTPUT/ SWITCH INPUTS (RACK F1) R-1997/ARS-3 RECEIVER-CONVERTER (SEE NAVAIR 01-75PAC-12-4) SEAWATER TEMP
J3
(SRS) POWER ON STATUS
12J5 1J13 1J11 12J15 (RACK D1) DPS ELECTRONIC CIRCUIT BREAKER PANEL DC PWR DISTR BOX A B C COMPUTER (NAVCOMM STATION) 7J2 IP-919/ASA- AUXILIARY -70 READOUT DISPLAY (ARO) (SEE NAVAIR 01-75PAC- -2) -12SRS DATA 12J26 LU 4 PS1, PS2, AND MDM OVERTEMP 12J11 2J1 SRS COMMANDS J3 J2 (RACK F1) R-1997/ARS-3 RECEIVER-CONVERTER 1
(RACK C3) 962982 IRDS INTERCONNECTION BOX

2J108 2J109
GIMBAL CONTROL (FS 525) TB435 MODE STATUS ESM STATUS ESM DATA ESM SYSTEM 1J12 ESM COMMANDS 1J34 PIC 0- COMMAND/STATUS -3 PIC COMMAND/STATUS PIC 4- COMMAND/STATUS -7 1J36 1J35 1FL1J1 1J33 (SEE NAVAIR 01-75PAC- -5) -121J32
(SEE NAVAIR 01-75PAC-12-4) (TACCO STATION) 960807 TACCO AUX POWER CONTROL
1J16
(SENSOR STATION 1) C-7617/ARR-72(V) DUAL CHANNEL CONTROLINDICATOR (DCCI) (TYPICAL 4 PLACES) (SEE NAVAIR 01-75PAC-12-4) (SENSOR STATION 2) C-7617/ARR-72(V) DUALCHANNEL CONTROLINDICATOR (DCCI) (TYPICAL 4 PLACES) (SEE NAVAIR 01-75PAC-12-4)
4J2
(PILOT CONTROL WHEEL) (PILOT CONTROL WHEEL) 27P TB458 672243 MARK-ON-TOP SWITCH (FS 525) (FS 288) (FS 197) TB6 P/J292 (SEE SECTION 5) TB435 (COPILOT CONTROL (COPILOT CONTROL WHEEL) MARK-ON-TOP WHEEL) 27P 672243 MARKTB457 -ON-TOP SWITCH (SEE SECTION 5) (FS 440) (RACK D1) TB452 2J4 A291 POWER DISTRIBUTION 2J4 ORD ALERT AND 12 BOX 115 VAC 3 VDC UNREGULATED 115 VAC 3 115 VAC 3 LU 4 POWER ON 1J1
N
P (FS 440) TB452 Q R (TACCO STATION) A324 TACCO POWER CONTROL
4J2 (RACK G1) PIC COMMAND/STATUS 3J6
PIC 8- COMMAND/STATUS -11 1J37 PIC 12 - COMMAND/STATUS -15 PIC 16- COMMAND/STATUS/LOD -19 1J38
1J39 LU 1 OVERTEMP (SEE NAVAIR 01-75PAC- -2) -122J7
1J1 LU 3 OVERTEMP 1J2 LU 2 OVERTEMP STATUS AND CONTROL S T U
POWER ON 115 VAC 3
SA-1605/ARR-72(V) AUDIO SWITCHING ASSEMBLY (AUDIO SWITCHING UNIT) (SEE NAVAIR 01-75PAC-12-4)
(SEE NAVAIR 01-75PAC- -2) -12LU 1 OVERTEMP
4-4
Change 3
Figure 4-2. Central Computer Signal Flow Diagram, Aircraft BUNO 158928, 159503 through 161409, and 161411 through 161596 Not Incorporating AFC 450 (Sheet 1 of 2)
NAVAIR 01-75PAC-12
A B C D E F
CHANNEL 00 OUTPUT CONTROL AND GROUP 0 OUTPUT DATA CHANNEL 01, 02, 03 OUTPUT CONTROL CHANNEL 01 INPUT CONTROL AND INPUT DATA CHANNEL 00 INPUT CONTROL AND INPUT DATA CHANNEL 02 INPUT CONTROL AND INPUT DATA CHANNEL 03 INPUT CONTROL AND INPUT DATA CHANNEL 15 INPUT CONTROL AND INPUT DATA CHANNEL 14 INPUT CONTROL AND INPUT DATA CHANNEL 06 INPUT CONTROL AND INPUT DATA/HAWK II DIAGNOSTICS CHANNEL 13, 14, 15 OUTPUT CONTROL CHANNEL 13 INPUT CONTROL AND INPUT DATA CHANNEL 12 OUTPUT CONTROL AND GROUP 03 OUTPUT DATA
A1J84 A1J88 A1J72 A1J68 A1J76 A1J80 A1J77 A1J73 A1J75 A1J85 A1J69
(RACK D2) CP-901(V)3/ASQ-114 (V) DIGITAL DATA COMPUTER CP-901(V)4/ASQ-114 (V) DIGITAL DATA COMPUTER (CENTRAL COMPUTER) I/O DESTRUCTIVE READOUT UNIT MEMORY UNIT CENTRAL PROCESSOR UNIT NON-DESTRUCTIVE READOUT MEMORY (NDRO)
8 9 I/O UNIT
(RACK D1) A1J83 A1J87 A1J79 A1J67 A1J66 3J1 CHANNEL 04 OUTPUT CONTROL AND GROUP 1 OUTPUT DATA CHANNEL 05, 06, 07 OUTPUT CONTROL CHANNEL 07 INPUT CONTROL AND INPUT DATA (RACK D3) 22J4 MX-8441/AQA-7(V) 11 CHANNEL 04 J-3346A/AQA-7(V) 12 INPUT CONTROL DIGITAL INTERFACE UNIT (DIU) AND INPUT DATA (SEE NAVAIR 01-75PAC- -4) -12(SENSOR STATION 3) IP-918/ASA-70 SENSOR DATA DISPLAY (SDD) 3J2 3J3 IN 22J5 CHANNEL 04 OUTPUT CONTROL AND OUTPUT DATA 3J4 DIFAR NOT USED MX-8034/AYA- DATA ANALYSIS -8 LOGIC UNIT (LU 3) (SEE SECTION 7) 3J24 HORIZ INPUT 3J23 VERT INPUT COMPUTER CHANNEL *04 05 OUTPUT DIFAR SENSOR DATA DISPLAY GROUP 01 PILOT DISPLAY TACCO DATA DISPLAY 3J26 UNBLANKING INPUT 3J25 VIDEO INPUT 3J5 3J6 3J7 OVERFLOW INDICATOR 3J13 SELECTION AND POSITION COMMANDS VECTOR/ANALOG DATA
(FS 288) P/J234 1J4
(PILOT INSTRUMENT PANEL) IP-886A/ASA- TACTICAL -66 DATA DISPLAY
P/J236 1J5 P/J238 1J7 P/J240 1J3 (SEE NAVAIR 01-75PAC- -1) -12(TACCO STATION) 1J6 1J7 1J5 1J26 VECTOR SWEEP ENABLE 1J19 VECTOR UNBLANK 1J29 FGL Y - DEFLECTION 1J30 FGL X - DEFLECTION 1J18 FGL VIDEO 1J23 FGL UNBLANK (SEE NAVAIR 01-75PAC- -2) -12(RACK D1) IP-917/ASA- MULTIPURPOSE -70 DATA DISPLAY (MDD)
ARITHMETIC SECTION A1J70 TIMING AND CONTROL SECTION A1J82
5J6 SELECTION AND POSITION COMMANDS 5J7 5J5
3J8 3J9 VECTOR/ANALYSIS DATA OVERFLOW 3J10 3J20 VECTOR UNBLANK 3J21 3J16 LU 3 OVERTEMP 3FL1J1
HAWK II PWR MONITOR AND LU 3 IFPM
06 07
G H J K L M
A1J86 5J19 A1J74 5J26 A1J78 (SEE NAVAIR 01-75PAC- -2) -12-
3J14 3J15 3J17 3J18 3J19
VECTOR SWEEP ENABLE
A1J81 115 VAC 3 MONITOR AND CONTROL TO ALL COMPUTER UNITS POWER SUPPLY UNIT 6 6 A8J04 A8J03 A8J02 A8J01 A8J06 A8J07 7 POWER AND CONTROL 7 (RACK D2) A10P1 6 J1 J2 CHANNEL 08 INPUT CONTROL AND INPUT DATA CHANNEL 09 INPUT CONTROL AND INPUT DATA CHANNEL 10 INPUT CONTROL AND INPUT DATA CHANNEL 08 OUTPUT CONTROL AND GROUP 2 OUTPUT DATA CHANNEL 09, 10, 11 OUTPUT CONTROL A505 AN/ASQ-114 DMTS INTERFACE BOX (DMTS INTERCONNECTION BOX) (SEE SECTION 9)
2J3 2J4 2J5 7 2J1 7 2J2
(RACK D1) MX-8024( )/AYA- DATA -8 ANALYSIS LOGIC UNIT (LU 2) (SEE SECTION 6) COMPUTER INPUT CHANNEL OUTPUT NAV 08 NAV MULTIMUX PLEXER PWR MONITOR GROUP 02 ARM/ORD 09 ARM/ORD MAG TAPE DATA LINK MAG TAPE 10 TRANSPORT TRANS DATA LINK *11 2J8 2J9 J3 INS 1 DATA AND CONTROL INS 2 DATA AND CONTROL J4
J3 J4 J8
A9J05 A9J06
(RACK D2)
A9J01
A8J02
A9J03
A9J04
CHANNEL 8 OUTPUT CONTROL AND GROUP 2 OUTPUT DATA CHANNEL 09, OUTPUT CONTROL
TS-2899/ASQ-114(V) COMPUTER MAINTENANCE CONSOLE (MAINTENANCE CONSOLE)
673986 DIGITAL DATA UNIT (DDU) 5
TF-543/ASQ-114(V) POWER ISOLATION TRANSFORMER (ISOLATION TRANSFORMER)
CHANNEL 10 INPUT CONTROL AND INPUT DATA 7 (RACK D3) 1J2 C-10553/ASH- DIGITAL MAGNETIC -33 TAPE CONTROL (DMTC) (SEE SECTION 9B) (RACK D3) RD-319A/AYA- MAGNETIC -8 TAPE TRANSPORT (SEE SECTION 9)
J7
1J2
NOTE
1 2 3 4 5
AIRCRAFT BUNO 160290 AND SUBSEQUENT DELETED DELETED DELETED AIRCRAFT BUNO 161001, 161005 AND SUBSEQUENT AND AIRCRAFT INCORPORATING AFC 408 AIRCRAFT BUNO 158928 AND 159503 THROUGH 161131 AIRCRAFT BUNO 161132 AND SUBSEQUENT CHANNEL 11 AIRCRAFT BUNO 159503 THROUGH 159506 INPUT CONTROL AIRCRAFT BUNO 159507 AND SUBSEQUENT AND INPUT DATA
(RACK B1) 8J2 READ DATA AND STATUS 8J1 WRITE DATA AND COMMANDS 2J19 LU 2 OVERTEMP 2FL1J1 2J16 STATUS 115 VAC 3 7J3 CHANNEL 11 OUTPUT CONTROL AND GROUP 2 OUTPUT DATA 6 2J6 2J14 STATUS 6J6 2J11 2J17 CONTROL 5J9 2J10 2J15 STATUS 2J8 (SEE NAVAIR 01-75PAC- -6) -12(SENSOR STATION 1) A269 AFT ARMAMENT INTERCONNECTION BOX (SEE NAVAIR 01-75PAC- -6) -12(RACK G2) A275 SEARCH STORES INTERCONNECTION BOX (SEE NAVAIR 01-75PAC- -6) -122J18 ARMAMENT/ORDNANCE CONTROL (RACK F2) 7J1 SB-3152/AYA- ELECTRICAL -8 TEST PANEL (ARM/ORD TEST PANEL) (SEE SECTION 6) 2J9 A395 FORWARD ARMAMENT INTERCONNECTION BOX
N P
28 VDC 115 VAC 3
6 7 8 9 10 11
Q R
115 VAC 3 115 VAC 3
7J2
(RACK D3) A507 COMMUNICATION INTERFACE NUMBER 2 (COMM INTERFACE 2) (SEE NAVAIR 01-75PAC- -3) -12-
S T U
LU 3 OVERTEMP LU 2 OVERTEMP STATUS AND CONTROL
12 13 14 15
AIRCRAFT BUNO 160290 AND SUBSEQUENT AND AIRCRAFT INCORPORATING AFC 405 AIRCRAFT BUNO 156507 THROUGH 161003 NOT INCORPORATING AFC 387 AIRCRAFT BUNO 156507 THROUGH 161003 INCORPORATING AFC 387, AND AIRCRAFT BUNO 161004 AND SUBSEQUENT DELETED DELETED DELETED
Figure 4-2. Central Computer Signal Flow Diagram, Aircraft BUNO 158928, 159503 through 161409, and 161411 through 161596 Not Incorporating AFC 450 (Sheet 2 of 2) Change 3 4-5
NAVAIR 01-75PAC-12
INSTRUCTION WORD FORMATS

FORMAT I
f 29 - 24 j 23 - 21 k 20 - 18 NON-I/O Instruction f 29 - 24 b 17 - 15 y 14 - 0 j 0 1 b 17 - 15 y 14 - 0 2 3 4 5 6 b 18 General Instruction * * f=77 29 - 24 *f=50, 54 23 18 b 17 - 15 17 - 15 y 14 - 0 n 7 YLESS YMORE YIN YOUT YLESS YMORE COM.A, .O, .AQ f04 no skip unconditional skip : Y < (Q) : Y > (Q) : (Q) > Y and Y > (A) : (Q) < Y or Y < (A) : Y < (A) : Y > (A) DIV f23 no skip SKIP NOOver Flow Over Flow AZERO ANOT zero skip no skip f23 no skip SKIP ----NOREM REM ----J-DESIGNATORS SQRT ADD.Q, SUB. Q ENT.LP, RPL.LP k7 f26 f27 f40 f44 no skip SKIP APOS ANEG QZERO QNOT zero QPOS QNEG no skip SKIP EVEN parity ODD parity AZERO ANOT zero APOS ANEG (no mod) ADV BACK ADDB R ADVR BACKR ADDBR : : : : : : : : RPT f70 Y of NE = Y Y of NE = Y + 1 Y of NE = Y - 1 Y of NE = Y + Bb Y of NE = Y [+B6] n Y of NE = Y + l [+B6] n Y of NE = Y - l [+B6] n Y of NE = Y + Bb [+B6] n
^ j
23 - 20
^ k
19 - 18 I/O Instruction
FORMAT II
f=77 29 - 24 23 *f = 44, 63, 64, 65
modifies Y address for the store portion by (B6) if repeated instruction is replace class.
NE - Next execution
^ j
^ k
y 8-0 ADDRESS MODE SELECTION K-DESIGNATORS 0 k Note: (1) CA = Current Addressing mode (DA or PA) (2) DA = Direct Addressing mode; PA = Page Addressing mode (3) Bit 215 = mode definition bit; O=DA, I = PA 0 1 2 f-Code f64 & f65 f64 & f65 f64 & f65 f60 & f61 LEGEND M - Memory word (30 bits) ML - Lower half memory word MU - Upper half memory word X - Sign bit extended Cpl - Complement C - Channel j j A - A-register Q - Q-register 3 f64 & f65 f64 f65 f64 f65 6 f64 f65 7 f64 & f65 Y = A Operand Y = UL Y = ML Y = MU Y = M CA CA CA YU, jump in CA YU, jump in CA YU, jump in CA
14 - 11 10 - 9
Special Instruction f=77 29 - 24 23 *f = 11, 15 18 blank 17 16 y
Direct Addressing Instruction * * *f = Format II Function Code **Forced k = 3
Remarks
MEMORY ADDRESS ASSIGNMENT

OCTAL ADDRESS RANGE 00000 00001 00002 00003 00004 00005-00017 00020-00037 00040-00057 00060-00077 00100-00117 00120-00137 00140-00157 00160 00161 00162-00177 00200-00217 00220-00237 00240-00257 00260-00477 00500-00517 00520-00537 00540-00577 00600-00617 00620 and over 40000-40777 USE Program Fault Interrupt Entrance Address Count-down Clock Interrupt Entrance Address Memory Protect Interrupt Entrance Address Input Power Failure Interrupt Entrance Address Power on Entrance Address Unassigned External Interrupt Entrance Addresses Input Monitor Interrupt Entrance Addresses Output Monitor Interrupt Entrance Addresses Input Buffer Control Words Output Buffer Control Words External Function Buffer Control Words Real Time Clock Count-down Clock Unassigned ESI Input Buffer Termination Words ESI Output Buffer Termination Words ESI External Function Buffer Termination Words Unassigned External Function Buffer Monitor Interrupt Entrance Addresses Interrupt Word Storage Addresses Unassigned Intercomputer Time-Out Entrance Address Unassigned NDRO Memory when enabled
Set addressing mode contained in (Y)15 and jump to (Y)L See note 3 CA YU, jump in CA YU, jump in DA. YU , jump in PA. YU, jump in DA. YU, jump in PA. YU, jump in DA. YU, jump in PA.
Y = UL
Obtain instruction & operand in CA, set DA, P YL, previous addressing mode Obtain instruction & operand in CA, set PA, P YL, previous addressing mode Obtain instruction & operand in CA, set DA, P YL, previous addressing mode Obtain instruction & operand in CA, set PA, P YL, previous addressing mode Obtain instruction & operand in CA, set DA, P YL, previous addressing mode Obtain instruction & operand in CA, set PA, P YL, previous addressing mode CA YU, jump in CA
Y = ML
Y = MU
4-6
Figure 4-3. Central Computer Instruction Repertoire and Branch Designations (Sheet 1 of 3)
NAVAIR 01-75PAC-12
CODE (Octal) f
INSTRUCTION
DESCRIPTION
TIME m sec.
CODE (Octal) f 54 55 56 57 60 60j0 60j1 61 62 63 64
INSTRUCTION
DESCRIPTION
TIME m sec. 4-6 4-6 4-6 4-6 2-4 2 2-4 2-4 4 4 4-6 4-6 2 2 2 2 2 2 2 2 2 2 2-4 4-6 4 6 min. 6 min. 6 min. 6 min. 6 min. 6 min. 2-4 2-4 4-6 4 2-4 4 4 4
01 02 03 * 04 05 06 07 10 11 12 12k0 12j0 ^ 13k0 ^ 13k1 ^ 13k2 ^ 13k3 14k0 14k0 15k4 15k4 16 ^ 17k0 ^ 17k1 ^ 17k2 ^ 17k3 20 21 * 22 * 23 * 23k7 24 25 * 26 * 27 30 31 32 33 34 35 36 37 * 40 41 42 43 * 44 45 46 47 50 51 52 53
Right SHiftDQ Right SHiftDA Right SHiftDAQ COMpareDADQDAQ Left SHiftDQ Left SHiftDA Left SHiftDAQ ENTerDQ ENTerDA ENTerDBj CLearDBj NO-OPeration EXternal-COMmandDC DW(Y)DMONITOR EXternal-COMmandDC DW(Y)DMONFORCE EXternal-COMmandDC DW(Y) EXternal-COMmandDC DW(Y)DFORCE SToReDQ ComPlementDQ SToReDA ComPlement A SToReDB JumPDYDC DCOMACTIVE JumPDL(Y)DC DCOMACTlVE SToReDC DW (Y)DFORCE SToReDC DW (Y) ADDDA SUBtractDA MULtiply DIVide SQuare RooT RePLaceDA + Y RePLaceDA - Y ADDDQ SUBtractDQ ENTerDY + Q ENTerDY - Q SToReDA + Q SToReDA - Q RePLaceDY + Q RePLaceDY - Q RePLaceDY+1 RePLaceDY - 1 ENTerDLP ADDDLP SUBtractDLP COMpareDMASK RePLaceDLP RePLaceDA+LP RePLaceDA-LP SToReDLP SELectiveDSET SELectiveDComPlement SELectiveDCLear SELectiveDSUbstitute
Shift (Q) Right by Y Shift (A) Right by Y Shift (AQ) Right by Y Sense (j); Ai=Af Shift (Q) Left by Y Shift (A) Left by Y Shift (AQ) Left by Y Y Q Y A Y Bj O Bj Enter Bo with 0 (do nothing operation) (Y) C ,Y 140 + monitor interrupt Force (Y) C ,Y 140 + address is 500 + Initiate external function Y 140 + Force (Y) C Y , 140 + (Q) Y or A (Q) Q (A) Y or Q (A) A (B)j Y Jump to Y if external function buffer active on Cj Jump to (Y)L if external function buffer active on Cj Input data word C Y, force IDA (00520 + ) Y (A) + Y A (A) - Y A (Q)Y AQ (AQ)/Y Q;R A pQ Q; residue A (A) + (Y) Y&A (A) - (Y) Y&A (Q) + Y Q (Q) - Y Q Y + (Q) A Y - (Q) A (A) + (Q) A&Y (A) - (Q) A&Y (Y) + (Q) Y&A (Y) - (Q) Y&A (Y) + 1 Y&A (Y) - 1 Y&A L[Y(Q)] A (A) + L[Y(Q)] A (A) - L[Y(Q)] A (A) - L[Y(Q)] sense (j), A + L[Y(Q)];(A)i = (A)f L[(Y)(Q)] Y&A (A)+L[(Y)(Q)] Y&A (A)-L[(Y)(Q)] Y&A L[(A)(Q)] Y Set An for Yn = 1 Complement An for Yn = 1 Clear An for Yn = 1 Yn An for Qn = 1
2-4-6 2-4-6 2-4-6 4 2-4-6 2-4-6 2-4-6 2-4 2-4 2-4 2 2-4 6 min. 6 min. 6 min. 6 min. 2-4 2 2-4 2 2-4 4 4 6 min. 4-6 2-4 2-4 18 32 32 4-6 4-6 2-4 2-4 2-4 2-4 2-4 2-4 4-6 4-6 4-6 4-6 2-4 2-4 2-4 2-4 4-6 4-6 4-6 2-4 2-4 2-4 2-4 2-4
]* ] ]

]*
Replace SElectiveDSET Replace SElectiveDComPlement Replace SElectiveDCLear Replace SElectiveDSUbstitute JumP (arithmetic) Remove Interrupt Lockout Remove Interrupt Lockout, JumP JumP (manual) JumPDYDC DACTIVE INput buffer JumPDYDC DACTIVE OUTput buffer Return JumP (arithmetic)
Set An for (Y)n=1, (A) Y Complement An for (Y)n=1, (A) Y Clear An for (Y)n=1, (A) Y (Y)n An for Qn = 1, (A) Y Jump to Y if jump j condition satisfied Release master I/O interrupt lockout RIL same as above, jump to Y Jump to Y if j condition is satisfied Jump to Y if C input buffer active Jump to Y if C output buffer active If j condition is satisfied, P Y L, Addressing mode Yu, jump to Y+1
]* 65 Return JumP (manual) 66k0 TERMinateDC DINPUT Terminate input buffer on C 66 1b0 k Remove Interrupt LockoutDALL Release master I/O interrupt lockout 66 1b0 Set Interrupt LockoutDALL k Set master I/O interrupt lockout 66 2b0 Remove Interrupt Lockout-EXternalDALL Release all external channel interrupt lockouts k 662b0 Set Interrupt Lockout-EXternalDALL Set all external channel interrupt lockouts k 66 3b0 Remove Interrupt Lockout-EXternalDC Release external channel interrupt lockout on C k 66 k3b0 Set Interrupt Lockout-EXternalDC Set external channel interrupt lockout on C NOTE: Master Clear sets all external channel interrupt lockouts and releases master I/O interrupt lockout. 67k0 TERMinateDC DOUTPUT Terminate output buffer on C 67 k1 TERMinateDC DCOMmand Terminate external function buffer on C 67 2 TERMinateDALL Terminate all buffers k * 70 RePeaT Execute NI Y times 71 B SKipDBj (B)j Y (B)j+1 Bj and read NI; (B)j=Y skip NI and clear Bj 72 B JumPDBj (B) 0, (B)j-1 Bj and jump to Y; (B)j=0, read NI 73 INputDC (without monitor mode) Initiate input buffer on C ; (Y) 00100+ 74 OUTputDC (without monitor mode) Initiate output buffer on C ;Y) 00120+ 742 EXternal-COMmand-MultiWordDC DW(Y) Initiate EF buffer on C ; (Y) 00140+ k 75 INputDC (with MONITOR mode) Initiate input buffer on C with monitor; (Y) 00100+ , monitor interrupt address is 00040+ 76 OUTputDC (with MONITOR mode) Initiate output buffer on C with monitor; (Y) 00120+ , monitor interrupt address is 00060+ 76k2 EXternal-COMmand-MultiwordDC DW(Y)DMONITOR Initiate EF buffer on C with monitor; monitor interrupt address is 00500+ ;(Y) 00140+ 7711 Enter A with Y Enter A using address in U; (Y) A Y=U16-0 7715 Store A with Y Store A using address in U; (A) Y Y=U16-0 7744 Test and Set Flag (Y) 0, read NI; (Y) = 0, skip NI; always set Y=1s 7750 Enter Absolute Page Register Y6-0 APR 7754 Store Absolute Page Register APR Y 7763 Load B and JumP (P) B7, jump to (Y) 7764 Direct Load B and JumP (P) B7, set direct addressing mode, jump to (Y) 7765 Page Load B and JumP (P) B7, set page addressing mode, jump to (Y)
Y - The operand designator modified by Bb * Special j and k designators Y -The operand; Y or (Y) ] See Address Mode Selection k designators
NI=Next Instruction BCW=Better Control Word APR=Absolute page register min - minimum LP or L [ ] - Logical Product
4-7
NAVAIR 01-75PAC-12 NORMAL K - DESIGNATOR READ

READ INSTRUCTION (f = 01 - 12, 20 - 23, 26, 27, 31, 40 - 43, 50 - 53, 60 - 65, 70 - 72) y k=0 0s B b ARITH MEM k=1 0s ARITH MEM k=2 0s ARITH MEM k=3 ARITH y k=4 B SIGN b ARITH MEM k=5 SIGN ARITH MEM k=6 SIGN ARITH A k=7 k = 7 NOT USED WHEN f = 52 OR 53 ARITH NOTES CPL = COMPLIMENT bits bits 29-15 14-0
CPL CPL CPL
STORE
STORE INSTRUCTION (f = 14 - 16, 32, 33, 47) -
REPLACE
REPLACE INSTRUCTION (f = 24, 25, 34 - 37, 44 - 46, 54 - 57) j 0 ARITH k = 0 NOT USED Q ARITH MEM ARITH MEM ARITH MEM MEM ARITH MEM ARITH MEM MEM ARITH MEM ARITH** k = 4 NOT USED A ARITH SIGN MEM ARITH SIGN MEM ARITH k = 7 NOT USED MEM *f = 14, K = 0; COMPLIMENT Q **f = 15, K = 4; COMPLIMENT A MEM ARITH MEM MEM ARITH MEM MEM 1 2 3 4 5 6 7 0 = 178 j ^ JP f60 RJP f64 JP f61 RJP f65 j 0 1 2 3 4 5 6 7 (Not available on * or ) Skip Code no skip SKIP QPOS QNEG AZERO ANOT zero APOS ANEG
(No Jump)* Uncond. Jump* QPOS QNEG AZERO ANOT zero APOS ANEG C j SACTIVEIN f62j
Uncond. Jump* KEY1 KEY2 KEY3 STOP STOP5 STOP6 STOP7 C j f63j SACTIVEOUT
*f 60 Bootstrap or Spec L/O set, clear L/O; Bootstrap or Spec L/O clear, clear I/O L/O and sets Cj EIE line after External Interrupt.
SIGN = THE SIGN BIT OF A 15 BIT OPERAND IS EXTENDED INTO THE 15 MOST SIGNIFICANT BITS OF THE 30 OPERAND
4-8
NAVAIR 01-75PAC-12
INDEX NO. 1 NAME POWER SUPPLY ON-OFF switch Uses 28 vdc power to control application of 115 vac 400 Hz primary power to the computer power supply. When released, switch returns to center position. ON position: supplies power to power supply. OFF position: removes power from power supply. Indicates 400 Hz power is applied to computer power supply. Indicates the nominal 5 vdc power is applied from power supply to computer circuits and is greater than 4.5 V. Indicate which clock phase is active. During phase 1, the T1 timing pulse is active. During phase 2, the T2 timing pulse is active. Lights all operable neon and incandescent indicators to test operation. Indicate associated external function active flip-flop for I/O group selected by I/O GROUP SEL controls is set. Indicate which main timing bracket enables, E0 through E7, are active.
10
FUNCTION
POWER SUPPLY ON INPUT OUTPUT POWER POWER
MAINT IND TEST
FAULT MEM POWER PROG PROT I/O CP M0 M1 M2
OVERTEMP M5 M6 M7 P/S1 P/S2
M3
M4
OFF
INPUT POWER indicator OUTPUT POWER indicator 11 2 PHASE 1, 2 indicators MAIN IND TEST Pushbutton switch EXT FUNCTION 3-0 indicators MAIN TIMING 0-7 indicators FAULT POWER indicator PROG indicator
38
EXT INTERRUPT 3 2 1 0 3
EXT FUNCTION 2 1
OUTPUT 2 1
INPUT 0 3 2 1 0
I/O GROUP SEL 0 CLR 1
37
ELAPSED TIME
PHASE 1 1
MAIN TIMING 3 5 7
SEQUENCE CONTROL PROCESSOR SEQUENCE INST OP3 OP2 RTC1 RTC2 RTC3 RTC4 I/O
I/O SEQUENCE 1 2 3
12
3 4
13
2 2 4 6 0 PROCESSOR SEQUENCE REQUEST OP1 OP2 RTC1 RTC2 RTC3 RTC4 I/O I/O CLR SPEC I/O
14 15
36
REPEAT CONTROL ADDR MODE IA DA MP 16 15 14 APR 13 12 11 CLR 3 APR SELECT 2 1 0 CLR
16 6
35
REPEAT 2
CLR
34
14
13
12
B 11 10 9 8 7 6 5 4 3 2 1 0 CLR 2
B SELECT 0 1
17
CLR
Indicates a power fault has occurred. Indicates an illegal function code has been executed. Indication is continuous until central computer is master cleared. Indicates an instruction has been executed (in the indirect addressing mode) which initiated a memory write cycle into a protected memory area. The write is aborted under this condition. Indicate associated output active flip-flop for I/O group selected by I/O GROUP SEL controls is set. Lights come on when associated processor sequence is active. Acquires instruction to be executed from memory. Acquires operand and executes instruction. Provides additional cycle time necessary to complete execution of replace and return jump instructions. Acquires real-time clock (RTC) pulse from RTC and increments contents of RTC register. Stores updated RTC register contents in memory. Acquires countdown clock (CDC) pulse from RTC and decrements CDC register contents if greater than zero. Stores updated RTC register contents and sets CDC interrupt request if updated RTC register equals zero.
33
29 28 27 26
UAQZ 25 24 23 22 21 20 19 18 17 16 15
FORMAT 11
UAQZ SELECT U A Q Z
18 19
MEM PROT indicator
MEM SELECT 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 CLR 2 1 0 CLR
20
OUTPUT 3-0 indicators PROCESSOR SEQUENCE INST indicator
32 31 30 29
14
13
12
11
10
CLR
READ
INITIATE WRITE
WRITE ENABLE
STOP 7 6 5 3
JUMP 2 1
DISCONNECT RTC B7 P
BOOTSTRAP AUTO A RECOV
MODE STEP RUN INST PHASE STOP RUN
LSO CONTROL
21 22 23
OP1 indicator OP2 indicator
RTC1 indicator 24
STOP START STEP MASTER CLEAR
RTC2 indicator RTC3 indicator
TOGGLE
SET & INDICATE
SET ONLY
INDICATE ONLY
28
27
26
25
RTC4 indicator
Figure 4-4. Central Computer Maintenance Control Panel Controls and Indicators (Sheet 1 of 3)
4-9
NAVAIR 01-75PAC-12
INDEX NO. 9
NAME INPUT 3-0 indicators OVERTEMP I/O, C/P, MO to P/S1, and S2 indicators
FUNCTION Indicate which input active flip-flop is set.
INDEX NO. 17
NAME B-SELECT 2-0 Switch-indicators CLR Pushbutton switch FORMAT II Switch-indicators UAQZ SELECT U, A, Q, and Z Switch-indicators MEM SELECT 2-0 Switch-indicators
FUNCTION
INDEX NO. 23
NAME LSO CONTROL Potentiometer
FUNCTION Varies output frequency of low-speed oscillator from 5 to 60 Hz. Low-speed oscillator provides automatic START STEP signal generation when selected by START STEP switch. Indicates computer is in RUN mode and is performing programmed instructions at normal speed, or that computer is operating in PHASE STEP mode. Causes computer to be master cleared unless it is operating in RUN mode. Set to down position, returns to center position. When set to down position, causes computer to operate in mode selected by MODE control. When set to up position, causes automatic START STEP signal generation under control and at frequency of low-speed oscillator. Center is neutral position. Up position is a locked position; down position is a momentary contact position. When released from down position, switch returns to center position. When set to down position, causes the computer to cease program operation after completion of next I sequence. Indicates computer power is on, but that clock phase pulses (T1 and T2) are not being issued.
Set and indicate three B select flip-flops. Octal translator from flip-flops connects appropriate B register to B register indicators. Clears all B select flip-flops. Sets and indicates format II flip-flop. Set and indicate a four stable-state circuit, connecting corresponding register to UAQZ controls. Set and indicate three memory selection flip-flops. Octal translator from flip-flop enables display and setting of appropriate memory Z register via UAQZ SELECT and UAQZ register indicator controls. Each unit has an integral Z register. Clears all memory select flip-flops.
10
Indicate which unit input/output (I/O), central processor (C/P), memory (M0 to M7, or power supply (P/S1 or P/S2) is exceeding 107o to 110oC (225o to 230oF). The sensors and associated indicators automatically reset when temperature decreases. The computer program is not necessarily affected. Set and indicate two I/O group select flip-flops. Octal translator from flip-flops connect appropriate I/O group active flip-flops to EXT INTERRUPT, EXT FUNCTION, OUTPUT, and INPUT indicators. Clears I/O group select 1 and 0 flip-flops. Lights come on when associated I/O sequence is active. Acquires 30-bit buffer control word from memory. Updates and restores buffer control word. If upper and lower bits are equal, active is cleared. Transfers I/O data either into computer memory, or out to peripheral equipment. Set and indicate associated sequence request flip-flop for step mode operation. Execution of requested sequence depends on computer priority.
24
RUN Indicator
18 19
25
MASTER CLEAR Switch LSO-START STEP Switch
11
I/O GROUP SEL 1, 0 Switch-indicators
20
26
CLR Pushbutton switch 12 I/O SEQUENCE 1 indicator 2 indicator 3 indicator 13 PROCESSOR SEQUENCE REQUEST OP1, OP2, RTC1, RTC2, RTC3, RTC4, and I/O Switch-indicators CLR Pushbutton switch 14 L/O SPEC indicator I/O indicator 15 APR MP, 16-11 Switch-indicators CLR Pushbutton switch 16 APR SELECT 3-0 Switch-indicators CLR Pushbutton switch
CLR Pushbutton switch INITIATE READ Switch
27 When set to down position, initiates a manual read operation at memory address selected in P. INITIATE WRITE selection required to permit restart in any mode. When set to down position, initiates a manual write operation of Z register data at memory address selected by P. Must be preceded by an INITIATE READ selection. Indicates a manual read has been performed and a manual write must be performed to permit restart in any mode. Enables either automatic or manual entry to fault interrupt routine in NDRO memory, as determined by BOOTSTRAP A-B switch. Center position enables entry to fault routine in DRO memory (address 00000). Determines entry to starting address of one of three fault interrupt routines in NDRO memory: A - paper-tape load routine (00001) B - magnetic tape load routine (00002) Neutral - program fault recovery routine (00000) Transfers computer from INST STEP or PHASE STEP mode to RUN mode, enabling computer to execute a program when START STEP switch is activated. Transfers computer from RUN or PHASE STEP mode to INST STEP mode, enabling computer to perform one instruction, starting with OP1 sequence and ending after completion of next I sequence, when START STEP switch is activated. Transfers computer from RUN or INST STEP mode to PHASE STEP mode, enabling generation of a single clock phase (T1 or T2) with each activation of START STEP switch.
STOP Switch
28 29
STOP Indicator STOP 7 Switch
INITIATE WRITE Switch
WRITE ENABLE Indicator 21 BOOTSTRAP AUTO RECOVMANUAL Switch
Causes computer to cease program operation if a function code of 61 (jump) or 65 (return jump) with a j designator of 7 is executed. Indicates computer has executed a 61 or 65 instruction with a j designator of 7 and with STOP switch 7 set. When set to up position, causes computer to cease program operation if a function code of 61 (jump) or 65 (return jump) with a j designator of 6 is executed. Indicates computer has executed a 61 or 65 instruction with a j designator of 6 and with STOP switch 6 set. Causes computer to cease program operation if a function code of 61 (jump) or 65 (return jump) with a j designator of 5 is executed. Set to up position to activate. Set to center position to deactivate. Indicates computer has executed a 61 or 65 instruction with a j designator of 5 and with STOP switch 5 set.
7 Indicator
Clears all sequence request flip-flops.
6 Switch
Lights come on when special interrupt causes a lockout. Lights come on when I/O interrupt causes a lockout. 22 Set and indicate corresponding bits of APR selected by APR SELECT controls. MP (memory protect) corresponds to APR 12. Clears all bits of APR selected by APR SELECT controls.
A-B Switch
6 Indicator
MODE RUN Switch- indicator
5 Switch
INST STEP Switch- indicator
5 Indicator
Set and indicate four APR select flip-flops. Octal translator from flip-flops connects appropriate APR register to APR register indicators. Clears all APR select flip-flops.
PHASE STEP Switch-indicator
4-10
NAVAIR 01-75PAC-12
INDEX NO. 30 NAME JUMP 3 Switch Enables computer to jump if a 61 (jump) or 65 (return jump) instruction with a j designator of 3 is executed. Set to up position to activate. Set to center position to deactivate. Enables computer to jump if a 61 (jump) or 65 (return jump) instruction with a j designator of 2 is executed. Set to up position to activate. Set to center position to deactivate. Enables computer to jump if a 61 (jump) or 65 (return jump) instruction with a j designator of 1 is executed. Set to up position to activate. Set to center position to deactivate. Disables a real-time clock when placed in up position. Prevents B7 register from being automatically decremented when set to up position. Prevents incrementing of P register when set to up position. Set and indicate corresponding bits of P register. Clears all bits of P register. CLR Pushbutton Set and indicate corresponding bits of register selected by UAQZ SELECT controls. Clears all bits of register selected by UAQZ SELECT controls. (If U is selected, also clears format II flip-flop.) Set and indicate corresponding bits of B register selected by B SELECT controls. Clears all bits of register selected by B SELECT controls. Sets and indicates repeat flip-flop which, in conjunction with OP1 PROCESSOR SEQUENCE REQUEST and B7 register (for number of repetitions), causes next instruction in U register to repeat. Set and indicate corresponding repeat control flip-flop selections. Repeat options are as follows (octal notation): 0 - Do not modify operand address of repeated instruction after each individual execution. If repeated instruction is a replace instruction, store operand at same address from where operand was read. 1 - Increase operand address of repeated instruction by one after each execution. If repeated instruction is a replace instruction, store operand at same address from where operand was read. 37 36 ADDR MODE IA Switch-indicator DA Switch-indicator ELAPSED TIME Meter EXT INTERRUPT 3-0 Indicators FUNCTION INDEX NO. 35 (CONT.) NAME FUNCTION 2 - Decrease operand address of repeated instruction by one after each execution. If repeated instruction is a replace instruction, store operand at same address from where operand was read. 3 - Repeat initial B-register modification of repeated instruction before each execution. 4 - Do not modify operand address of repeated instruction after each individual execution. If repeated instruction is a replace instruction, operand address is modified by (B6) for store portion of replace instruction. 5 - Increase operand address of repeated instruction by one after each execution of repeated instruction. If repeated instruction is a replace instruction, incremented operand address is modified by (B6) for store portion of replace instruction. 6 - Decrease operand address of repeated instruction by one after each execution of repeated instruction. If repeated instruction is a replace instruction, decremented operand address is modified by (B6) for store portion of replace instruction. 7 - Repeat initial B-register modification of repeated instruction before each execution. If repeated instruction is a replace instruction, modified operand address is further modified by (B6) for store portion of replace instruction. Clears all repeat control flip-flops. Sets and indicates indirect addressing mode. Sets and indicates direct addressing mode. Indicates number of hours (up to a total of four digits) during which power has been applied to computer power supply. Indicate which computer external interrupt enable flip-flop is set.
2 Switch
1 Switch
31
DISCONNECT RTC Switch B7 Switch P Switch
32
14-0 Switch-indicators CLR Pushbutton switch
33
UAQZ 29-0 Switch-indicators CLR Pushbutton switch
34
14-0 Switch-indicators CLR Pushbutton switch
38
35
REPEAT CONTROL REPEAT Switch-indicator
r2, r1, and r0 Switch-indicators
4-11
NAVAIR 01-75PAC-12
MEMORY STACK REMOVAL

A10 ISOLATION TRANSFORMER
A9 COMPUTER MAINTENANCE CONSOLE UNIT
MEMORY STACK REMOVAL TYPICAL MEMORY STACK

A1 INPUT/OUTPUT ASSEMBLY
A2 MEMORY UNIT 2 A3 CENTRAL PROCESSOR UNIT HEAT SINK COVER PLATE A4 MEMORY UNIT 1 A5 MEMORY UNIT 0
CAUTION
WHEN REMOVING OR REPLACING MEMORY STACKS BE CERTAIN TO LOOSEN THREE SENSE AMPLIFIERS FIRST, THEN REMOVE THE THREE SENSE AMPLIFIERS AND MEMORY STACKS SIMULTANEOUSLY. USE CARE TO AVOID DAMAGE TO CONNECTORS AND EXPOSED WIRES.
A6 MEMORY UNIT 3 A7 POWER SUPPLY A8 MAIN FRAME ASSEMBLY

TORQUE HEAT SINK COVERPLATE SCREWS TO 22 (2) INCHPOUNDS. HEAT SINK COVER PLATE IS TYPICAL SEVEN PLACES
NOTE
MEMORY STACKS WITH THREE SENSE AMPLIFIER CONNECTORS MATED 1 2 3 4 5 6
FRONT
SENSE AMPLIFIER SENSE AMPLIFIER CONNECTOR DETAIL
CAUTION
USE EXTREME CARE WHEN REMOVING REPLACING HEAT SINK COVER PLATE TO AVOID BENDING THIN MEMBRANES ON FRONT OF HEAT EXCHANGERS. BENT MEMBRANES RESTRICT AIRFLOW AND REDUCE EFFICIENCY OF EXCHANGERS
EXTRACTION TOOL
20 MALE PINS
AIRCRAFT BUNO 156507 THROUGH 158927 AND 158929 THROUGH 159329 AIRCRAFT BUNO 156507 THROUGH 158927 AND 158929 THROUGH 159506 AIRCRAFT BUNO 158928, 159503 AND SUBSEQUENT AIRCRAFT BUNO 159507 AND SUBSEQUENT AIRCRAFT BUNO 156507 THROUGH 161409 AND 161411 THROUGH 161596 AIRCRAFT BUNO 161762 AND SUBSEQUENT
CAUTION
POWER OPERATION WITH HEAT SINK COVER PLATE REMOVED MUST NOT EXCEED 30 MINUTES. ALLOW 1 HOUR COOLING BEFORE ATTEMPTING A SECOND PERIOD OF POWER ON OPERATION WITHOUT THE HEAT SINK COVER PLATE ATTACHED.
CAUTION
THE MARKED SIDE OF CONNECTORS MUST FACE MEMORY STACK
MEMORY STACKS SENSE AMPLIFIER CONNECTORS
4-12
Figure 4-5. Central Computer Unit and Module Location Diagram (Sheet 1 of 5)
NAVAIR 01-75PAC-12
INPUT/OUTPUT ASSEMBLY MODULE LOCATION (UNIT A1)

GROUP 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 GROUP 1 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 GROUP 2 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 GROUP 3 54 55 56 57 58 59 60 61 62 63 64 MODULE NO. 2 4 4 NAME OUTPUT & ACKNOWLEDGE REGISTER 1/0 DATA RECEIVERS 1/0 DATA RECEIVERS NUMBER USED 24 30 40 3 COLOR CODE NO. 1105 1075 1075
2 1
2 2
2 3
2 4
2 5
2 6
4 7
4 8
4 9
4 10
4 11
4 12
4 13
4 14
4 15
4 16
2 17
2 18
2 19
2 20
2 21
2 22
4 23
4 24
4 25
4 26
4 27
4 28
4 29
4 30
4 31
4 32
2 33
2 34
2 35
2 36
2 37
2 38
4 39
4 40
4 41
4 42
4 43
4 46
4 47
2 50
2 51
2 52
2 53
2 54
4 55
4 56
4 57
4 58
4 59 3
4 60
4 61
4 62
4 63
4 64
44 45
48 49
OUTPUT 1 BITS 0-2 2 3-5 3 6-8 4 9-15 5 16-22
GROUP 0 6 23-29 7 BITS 0-2 8 3-5 9 6-8 10 9-11
INPUT 11 12-14 12 15-17 13 18-20 14 21-23 15 24-26 16 27-29 17 BITS 0-2 18 3-5
OUTPUT 19 6-8 20 9-15 21 16-22
GROUP 1 22 23-29 23 BITS 0-2 24 3-5 25 6-8 26 9-11
INPUT 27 12-14 28 15-17 29 18-20 30 21-23 31 24-26 32 27-29 33 BITS 0-2 34 3-5
OUTPUT 35 6-8 36 9-15 37 16-22
GROUP 2 38 23-29 39 BITS 0-2 40 3-5 41 6-8 42 9-11
INPUT 43 12-14 44 45 15-17 18-20 46 21-23 47 24-26 48 49 27-29 BITS 0-2 50 3-5
OUTPUT 51 6-8 52 9-15 53 16-22
GROUP 3 54 23-29 55 BITS 0-2 56 3-5
3 57 6-8 58 9-11
INPUT 59 12-14 60 15-17 61 18-20 62 21-23 63 24-26 64 27-29 49 BITS 0-2 50 3-5
OUTPUT 51 6-8 52 9-15 53 16-22
GROUP 3 54 23-29 55 BITS 0-2 56 3-5
1 57 6-8 58 9-11
INPUT 59 12-14 60 15-17 61 18-20 62 21-23 63 24-26 64 27-29
-1 CH- CH-2 -3 CH- CH-0 EIE EI IDR EIE EIE EI EI IDR -1 CH-0 CHEFR EFR ODR CH 0-1 2-3 0A CH 0-1 2-3 EF EIE
-5 CH- CH-6 -7 CH- CH-4 EIE EI IDR -3 CH-3 CHEI EFR IDR ODR CH 0-1 2-3 CLR DATA EIE EIE EI EI IDR -5 CH-4 CHEFR EFR ODR CH 4-5 6-7 0A CH 4-5 6-7 EF EIE
-9 -10 -11 CH- CH- CH- CH-8 EIE EI IDR -7 CH-7 CHEI EFR IDR ODR CH 4-5 6-7 CLR DATA EIE EIE EI EI IDR -9 CH-8 CHEFR EFR ODR CH 8-9 10-11 OA CH -9 810-11 EF EIE
-13 CH- CH-14 -15 CH-12 CHEIE EI IDR EIE EI IDR CH-12 EFR EIE EI EIE
-13 CH- CH-14 -15 CH-12 CHEIE EI IDR EIE EI IDR CH-12 EFR EIE EI EIE
CH-2 IDR ODR EFR
CH-6 IDR ODR EFR
CH-10 IDR ODR EFR
CH 0-1 2-3 IA
CH 4-5 6-7 IA
CH 8-9 10-11 IA
CH- CH-11 -11 EI EFR IDR ODR CH 8-9 10-11 CLR DATA
CH- CH- CH-13 -15 -14 -15 CHEFR IDR EI EFR ODR ODR IDR EFR ODR CH CH CH CH 12-13 -13 -13 1212-13 1214-15 -15 -15 1414-15 14CLR EF 0A IA DATA
CH- CH- CH-13 -15 -14 -15 CHEFR IDR EI EFR ODR ODR IDR EFR ODR CH CH CH CH 12-13 -13 -13 1212-13 1214-15 -15 -15 1414-15 14CLR EF 0A IA DATA
OUT CHNL- ARO -0 CHNL- DOM -1 CHNL- HSP -2 CHNL- SDC -3
IN AROL IFPM AND PWR MONITOR DIM TTY SDC
OUT CHNL- DIFAR -4 SASP
5 6
IN DIFAR SASP NOT USED HAWK II
OUT 5 6 CHNL- NAV/MUX -8 CHNL- ARM/ORD -9 CHNL-10 MTCL/DMTS CHNL-11 DATA LINK
IN NAV/MUX, PWR MONITOR ARM/ORD MTCL/DMTS DATA LINK
OUT CHNL-12 HAWK II CHNL-13 DMS CHNL-14 SCC CHNL-15 DAMS
IN NOT USED DMS SCC DAMS
OUT CHNL-12 HAWK II CHNL-13 CHNL-14 CHNL-15
IN
CHNL- SS3 SENSOR -5 DATA DISPLAY CHNL- PILOT -6 DISPLAY CHNL- TACCO -7 DATA DISPLAY
POWER MONITOR AND LU 3 IFPM
ALTERNATE CONFIGURATION
4-13
NAVAIR 01-75PAC-12
CENTRAL PROCESSOR MODULE LOCATION (UNIT A3)

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 58 59 60 61 62 63 64
MODULE NO. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57
NAME APR REGISTER THERMOSTAT, FRONT ACTIVE MONITOR REGISTER APR CONTROL P-B-R1-U/U I/O MEMORY COMMAND GENERATOR CONTROL LOGIC MODULE TYPE 2 R2 AND CONTROL ADDER I/O FUNCTIONAL CODE TRANSLATION CONTROL LOGIC MODULE, TYPE 15 UL AND CONTROL ADDER I/O SEQUENCE CONTROL CONTROL LOGIC MODULE TYPE 13 CONTROL LOGIC MODULE TYPE 18 MONITOR PRIORITY AND SEQUENCING CONTROL LOGIC MODULE TYPE 11 CONTROL LOGIC MODULE TYPE 1 CONTROL LOGIC MODULE TYPE 19 CONTROL LOGIC MODULE TYPE 10 2-PHASE CLOCK SYNC REGISTER, DATA REGISTER SINGLE-SHOTS CONTROL LOGIC MODULE TYPE 6 READ SELECTOR CONTROL BUFFER PRIORITY CONTROL LOGIC MODULE TYPE 17 COMPLEMENT AND WRITE SELECT CONTROL INTERRUPT CONTROL CONTROL LOGIC MODULE TYPE 12 X REGISTER SUBTRACTOR INTERRUPT AND TRANSFER REGISTER CONTROL LOGIC MODULE TYPE 8 READ WRITE SELECTORS ADDRESS SELECTOR SEQUENCER CONTROL LOGIC MODULE TYPE 5 THERMOSTAT, REAR 1-REGISTER, ADDER REGISTER CONTROL LOGIC MODULE TYPE 9 CURRENT SWITCH 1 ADDRESS DATA SELECTOR CONTROL LOGIC MODULE TYPE 7 SELECTION MATRIX 1 HCK TIMING AND INTERCOMPUTER TIMING OUT SUBTRACTOR CONTROL NDRO MEMORY 1 CONTROL LOGIC MODULE TYPE 14 SPECIAL INTERRUPT PRIORITY A Q CONTROL A Q CONTROL CONTROL LOGIC MODULE TYPE 16 SHIFT CONTROL CONTROL LOGIC MODULE TYPE 4 A Q REGISTERS A REGISTERS CONTROL LOGIC MODULE TYPE 3 CONTROL MODE START/STOP MULTIPLE CIRCUIT CARD ASSY 3 (1024 WORD ROM) INTERCONNECT MODULE 3
NUMBER USED 6 1 16 4 15 1 3 3 1 1 3 1 3 10 1 1 4 6 1 1 16 1 1 1 1 1 1 1 10 3 1 5 3 2 1 5 1 1 3 1 1 4 1 1 2 1 1 1 1 2 2 10 10 2 1 1 1
COLOR CODE NO. 1015 1370 1000 1050 1055 1101 1140 1035 1121 1250 1025 1095 1240 1265 1085 1220 1135 1270 1216 1150 1005 1195 1175 1130 1260 1170 1125 1235 1080 1115 1205 1020 1090 1160 1375 1070 1210 *2365 1110 1200 *2370 1041 1180 *4003 1245 1045 1191 1165 1255 1010 1155 1060 1065 1145 1030 *5681 *4490
C
3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 9 6 12 15 14 14 18 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 14 18 14 24 27 30 30 30 33 33 33 36 36 36 36 36 39 39 39 42 42 42 42 INTERCONNECT 39 39 39 42 42 42 42 1
ROM
NDRO MEMORY 44 1
B
2 5 5 8 11 5 5 5 5 5 8 11 5 5 5 5 5 8 11 5 5 5 14 14 14 14 14 17 17 17 17 20 14 18 18 18 23 26 29 32 29 29 32 29 29 32 29 29 32 29 29 32 29 35
56 3
57 3
38 41
A
1 1 1 CHNL-15 1 1 1 1 2 3 4 5 2 3 4 5 CHNL-14 CHNL-13 CHNL-12 CHNL-11 1 6 6 CHNL-10 4 7 7 CHNL-9 4 8 8 CHNL-8 4 4 7 7 7 10 13 13 13 16 19 22 25 28 31 34 34 37 18 40 43 45 45 46 47 48 49 50 50 51 51 52 53 52 53 52 53 52 53 52 53 52 53 52 53 52 53 52 53 52 53 54 54 55 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 GR-3 GR-2 GR-1 CHNL-7 CHNL-6 CHNL-5 CHNL-4 CHNL-3 CHNL-2 CHNL-1 CHNL-0 I/O CONTROL
COMPAR 12-14 27-29 9-11 24-26 6-8 21-23 3-5 18-20 0-2 15-17
52 53 52 53 54 54 55 58 59 60 61 62 63 64 ALTERNATE CONFIGURATION
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 CHNL-15 CHNL-14 CHNL-13 CHNL-12 CHNL-10 CHNL-11 CHNL-7 CHNL-6 CHNL-5 CHNL-4 CHNL-3 CHNL-2 CHNL-1 CHNL-0 CHNL-9 I/O CONTROL R 0-4 (T2) I/O MEMORY COMMAND CHNL-8
ADD DATA SELECTOR #3
U 18 I/O FUNCTION CODE
U 17 PRI SEQ MONITOR
CTL LOGIC
CTL LOGIC
6-11 INTERRUPT REG 18-23 INTERRUPT REG
INTERRUPT REG
INTERRUPT CTL
6-11 ADD SELECTOR 18-23 ADD SELECTOR
ADD SELECTOR
I REG (ADDER)
I REG (ADDER)
U 16 (T20) CTL LOGIC
CTL LOGIC
12-17 CTL LOGIC
OUTPUT (T1) GR-3 (T1) GR-2 (T2) GR-2 (T2) GR-2
0-5 I REG (ADDER) 12-17 I REG (ADDER)
I REG (ADDER)
(TI) CTL LOGIC
INPUT REQUEST MONITORS
ACKNOWLEDGED REGISTER
24-29 GR 8 CHNL PRIORITY
GR-TIMING
GR-TIMING UAQZ MEM SEL-ADDRESS CTL
GR-TIMING MEM ADDRESS
U 0-4 I/O SEQ
U 21 (T2)GR-0
GR-1 (TI-T2) GR-1
GR-3
U 15-29 GR-3
U 28 GR-3
R 10-14 GR-3
U 10-14 GR-2
U 27 GR-2
U 26 GR-2
U 25 GR-2
U 24 GR-1
U 23 GR-1
R 5-9 GR-1
U 5-9 GR-1
U 22 GR-0
U 20 GR-0
U 19 GR-0
GR-3
GR-3
GR-3
GR-2
MODE 8 START (WRITE SEL)
READ/WRITE-SEL (CTL) I/O BUFFER
MODE START/STEP I/O BUFFFER
(CURRENT ) SWITCH 1024 WORD ROM SELECTION ( MATRIX )
U 15
0-5
MEMORY SELECT CTL
MEMORY SELECT CTL
MEMORY SELECT CTL MODE 8 START/STEP 7
READ-SEL (CTL) I/O MEM
READ/WRITE 12-14, 27-29
THERMOSTAT FONT
READ/WRITE 9-11, 24-26
BIT 28 UAQZ SEL-I/O BUFFER
READ/WRITE 3-5., 18-20
READ SELECTOR CTL
(T-2) UAQZ SELECT (T-2) I/O ENABLE
READ/WRITE 27-29
READ/WRITE 12-14
READ/WRITE 24-26
READ/WRITE 21-23
READ/WRITE 18-20
READ/WRITE 15-17
READ/WRITE 9-11
READ/WRITE 6-8
READ/WRITE 3-5
BITS 16 17 23 (T-1) OP ENABLE
BIT 13-14 MEMORY ADD
BIT 11-12 CTL ADDER
15 21 23 (T-1) I ENABLE
READ/WRITE 0-2
MEMORY ADD
MEMORY ADD
THERMOSTAT REAR
WRITE SELECTOR
CTL ADDER
CTL ADDER
NOT USED
INTERCONNECTING MODULE
B-12
B-14
B-13
B-10
B-11
B-9
B-8
B-7
B-6
B-5
B-4
B-3
B-2
B-1
B-0
2-PHASE CLOCK
BIT 15-16 P BIT 14
BIT 13-14 P BIT 13
BIT 11-12 P BIT 12
SEL REG MP 4, 6, 8, 10, BIT P BIT 10
SEL REG MP 12-15 BIT P BIT 11
P MOD START/STEP MENCONGL (CTL) P BIT 5
BITS 24-26
BIT 15-16
BIT 28
27-29
SEL REG MP 5, 7, 9, 11 BIT
SEL REG MP 0-3 BIT
B-SEL P CORE ROPE (CTL)
B-SEL P CORE ROPE (CTL)
MEMORY ADDRESS (CTL)
P R-2 CORE ROPE (CTL)
B DECREMENT (CTL)
U TRANSLATION 18, 19-20
B6, 7 OUT
B4, 5 OUT
B2, 3
Q REGISTER
A REGISTER
MAIN TIMING 1-2 SEQ
SPECIAL INTERRUPT
SKIP CTL MEN CONT
SKIP CTL MEN CONT
Q= 4, 12, 20, 21, 23, 28
Q= 2, 6, 10, 14, 18, 26
Q= 3, 7, 11, 15, 19, 27
MEMORY CONFLICT
A=2, 6, 10, 14, 18, 26
A REG. (MEM CTL)
U TRANSLATION
U TRANSLATION
U TRANSLATION
U TRANSLATION
I/O BUFFER (CTL)
MAIN TIMING 1-2
INTERRUPT CTL
MASTER CLR
FORMAT II
FORMAT II
FORMAT II
A+ Q+ CTL
A+C+ CTL
UAOZ CTL
UAOZ CTL
APR CTL
APR CTL
APR CTL
APR CTL
MDS CTL
Q = 24-29
APR REGISTER
A=4, 12, 20, 28
Q= 18-23
Q= 12-17
A=12-17
A=1, 5, 9, 13, 17, 25
A=24-29
A=18-23
A=6-11
A 0-5
READ/WRITE START
Q REG. (MEM CTL)
A=0, 8, 16, 24
A=3, 7, 11, 15, 19, 27
Q= 1, 5, 9, 13, 17, 25
Q = 0, 8, 16, 24
Q= 6-11
Q= 0-5
NOT USED
P BIT 9
P BIT 8
P BIT 7
P BIT 6
P BIT 4
P BIT 3
P BIT 2
P BIT 1
P BIT 0
GR-TIMING
GR-1
GR-1
GR-0
GR-0
GR-0
GR-0
GR-0
*WITH THE SUBSTITUTION OF THE ROM NDRO-TYPE BOOT- STRAP, MODULE NUMBERS 38, 41 AND 44 ARE DELETED AND REPLACED WITH MODULE NUMBERS 56 AND 57
4-14
5 7 6
11
13
12
16
15
15
MODULE NO.
14
10
17
SENS AMP BITS 16, 18, 20, 21, 23-27, 29 STACK 3 X AXIS SELECTOR
NAME
INHIBIT CURRENT REGULATOR FILTER CARD
SENS AMP BITS 10-15, 17, 19, 22, 28
MEMORY CONTROL
TRANSISTOR MATRIX
PULSE GENERATOR
READ/WRITE CURRENT REGULATOR
SENS AMP BITS 0-9
TRANSLATION AND TIMER
READ/WRITE DIODE SELECTOR STACK DISCHARGE CIRCUIT
DATA REGISTER (V, V3) 2 DATA REGISTER (V4) 4
SENSE AMPLIFIER (V4) 4
INHIBIT STACK SELECTOR
PULSE DISTRIBUTION AND STACK SELECT ADDRESS REGISTOR
SENSE AMPLIFIER (V, V3) 2
STACK SELECTOR AND FANOUT READ/WRITE EMMITTER SELECTOR READ/WRITE BASE SELECTOR
SENS AMP BITS 16, 18, 20, 21, 23-27, 29 STACK 1 X AXIS SELECTOR SENS AMP BITS 10-15, 17, 18, 22, 28 STACK 0 STACK 0 X AXIS READ/WRITE SENS AMP BITS 0-9 AXIS SELECTOR SENS AMP BITS 0-9 SENS AMP BITS 10-15, 17, 19, 22, 28
SENS AMP BITS 0-9

STACK 3 X B & E AXIS SEL STACK 2 X B & E AXIS SEL TIMER MEMORY CONTROL (OVR TEMP CTL) PULSE DISTRIBUTION READ/WRITE CURRENT ADDR. REG BITS 0-11 S REG BITS 0-5 ADDR. REG BITS 0-11 S REG BITS 6-11 STACK SELECTOR ADDR. REG TIMER STACKS 2 & 3 X E AXIS SEL NOT USED STACKS 0 & 1 X & Y B AXIS SEL STACK 2 Y READ/WRITE DIODE STACK 3 Y READ/WRITE DIODE STACK 2 & 3 Y E AXIS SEL NOT USED STACK 2 X READ/WRITE DIODE STACK 3 X READ/WRITE DIODE STACK 0 Y READ/WRITE DIODE STACK 1 Y READ/WRITE DIODE STACKS 0 & 1 Y E AXIS SEL STACK DISCHARGE X & Y READ/WRITE CURRENT REGULATOR (STACK TEMP SENSE) STACK 3 Y B & E AXIS SEL S REG BITS 0-11 S REG BITS 12, 13
SENS AMP BITS 10-19 SENS AMP BITS 20-29 SENS AMP BITS 20-29
INHIBIT HALF STACK EVEN BITS 0-28 INHIBIT HALF STACK ODD BITS 1-29
SENS AMP BITS 0-9 SENS AMP BITS 10-19 SENS AMP BITS 20-29
A
1
SENS AMP BITS 16, 18, 20, 21, 23-27, 29 SENS AMP BITS 10-15, 17, 19, 22, 28 STACK 2 X AXIS SELECTOR
B
2 3
TIMER
SENS AMP BITS 0-9
ALTERNATE CONFIGURATION
SENS AMP BITS 16, 18, 20, 21, 23-27, 29
12
12
2 1
34 35 36 6725
NUMBER USED
6702 6670
6700
6710
6691
6715
6730 6665
6706
6660
6655 6650
6720
6695
1830 6741 6675 6680
COLOR CODE NO.
B = BASE
E = EMITTER
A
SENS AMP BITS 0-9 SENS AMP BITS 10-19 MEMORY STACK #2 MEMORY STACK #3
STACK 2 Y B & E AXIS SEL STACKS 2 & 3 X & Y B AXIS SEL STACKS 0 & 1 X E AXIS SEL
NOT USED
STACK 1 X B & E AXIS SEL STACK 0 XB & E AXIS SEL STACK 1 X READ/WRITE DIODE Z REG BITS 0-4 Z REG BITS 5-9 Z REG BITS 10-14 Z REG BITS 15-19 Z REG BITS 20-24 Z REG BITS 25-29 INHIBIT CURRENT REGULATOR BITS 0-3 REGULATOR BITS 4-7 REGULATOR BITS 8-11 REGULATOR BITS 12-15 REGULATOR BITS 16-19 REGULATOR BITS 20-23 REGULATOR BITS 24-26 REGULATOR BITS 27-29 STACK 1 Y B & E AXIS SEL STACK 0 Y B & E AXIS SEL INHIBIT HALF STACK EVEN BITS 0-28 INHIBIT HALF STACK ODD BITS 1-29 FILTER (OVER TEMP CTL) NOT USED
STACK 0 X READ/WRITE DIODE SENS AMP BITS 20-29
B
INHIBIT HALF STACK EVEN BITS 0-28 INHIBIT HALF STACK ODD BITS 1-29 SENS AMP BITS 0-9 SENS AMP BITS 10-19
C A B C
2 2 2 1 1 1 1 1 1 1 1 1 MEMORY STACK #3 3 1 2 2 4 5 6 6 7 8 8 9 MEMORY STACK #2 N O T N O T 14 3 4 10 U 11 12 12 10 U 12 12 12 12 10 13 S S E E D D 7 8 1 1 1 2 3 4 5 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 2 2 11 10 U S E D 3 3 N O T
MEMORY STACK #1 MEMORY STACK #0
MEMORY UNIT-MODULE LOCATION (TYPICAL OF 4)
2 12 12 15 15 15 15 15 15 16 16 16 16
MEMORY STACK #1
MEMORY STACK #0
16 16 16 16 2
INHIBIT HALF STACK EVEN BITS 0-28 INHIBIT HALF STACK ODD BITS 1-29
34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
17
34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
3 U S E D N O T
NAVAIR 01-75PAC-12
4-15
NAVAIR 01-75PAC-12 4-1. 4-2. POWER SUPPLY ADJUSTMENTS. When power supply maintenance module A7A4 or A7A5 has been replaced, the gain adjust potentiometers may require adjustment. Adjustment must be made at ambient temperature after 20 minutes warmup. The Fluke Digital Multimeter Model No. 8125A or equivalent, is required to adjust the power supply. To adjust the power adjustment screws, perform the following procedure: CAUTION Ensure Central Computer power is off. NOTE Normal maximum voltage drop between the power supply, central processor and memories is 0.2 vdc. If the drop is excessive, determine the cause. Do not attempt to adjust the output of the +5.0 vdc from the power supply to compensate for an abnormal voltage drop. 1. 2. 3. Loosen screws holding power supply coverplate and remove coverplate. Turn Central Computer power on by setting POWER SUPPLY ON-OFF switch on maintenance console to ON. Set STOP switch to STOP.
CAUTION
ENSURE POWER IS REMOVED FROM CENTRAL COMPUTER BEFORE REMOVING OR INSTALLING POWER SUPPLY COVER
NOTE Ensure ground bus split by measuring difference of voltage between power supply channel 1 and channel 2 fromTP-E03 and TP-E07. The difference should be less than 0.05 volt. If an excessive ground split is detected, do not proceed to adjust the +5.0 logic levels. 4. 5. 6. 7. 8. 9. 10. 11. Connect ground lead of multimeter to test point E3. Connect positive lead of multimeter to test point A1. Adjust channel one power adjustment screw for an output of +5.3 (+0.0, -0.1) vdc. Remove multimeter. Connect ground lead of multimeter to test point E7. Connect positive lead of multimeter to test point A9. Adjust channel to power adjustment screw for an output of +5.3 (+0, -0.1) vdc. Remove multimeter. CAUTION Turn off Central Computer power.
POWER SUPPLY (UNIT A7)

(SHOWN COVER REMOVED) A7A1 POWER INTERRUPT DETECTOR MODULE OR POWER MONITOR MODULE
NOTE
POWER MONITOR MODULE IS ALTERNATE FOR POWER INTERRUPT DETECTOR MODULE
A7A2 RIGHT--HAND OUTPUT MODULE ASSEMBLY ADJUSTMENT CHANNEL 1
A7A3 RIGHT--HAND OUTPUT MODULE ASSEMBLY
4-3.
12. Replace power supply coverplate. In the event of a power failure, DO NOT TURN COMPUTER POWER OFF. Measure the dc voltages on the front of the power supply as specified by the chart below.
TEST POINTS INDICATIONS NORMAL CH#1 CH#1 C2 OVER/CURRENT D2 OVERVOLTAGE 0 VDC 0 VDC 0 VDC 0 VDC FAULT
CHAN 1
A7A5 MODULE ASSEMBLY A7A4 MODULE ASSEMBLY ADJUSTMENT CHANNEL 2 A7A6 FILTER MODULE ASSEMBLY
CHAN 2
-4 1 VDC -4 1 VDC -4 1 VDC -4 1 VDC
A7A7 FILTER MODULE ASSEMBLY

1 2 3 4 5 6 7 8 9 A B C D E
CH#2 CH#2
CHANNEL 1 TEST POINT
C8 OVER/CURRENT D8 OVERVOLTAGE B3 BIAS E4 NEUTRAL B7 BIAS E6 NEUTRAL
CH#1 CH#1 CH#2 CH#2
-19 VDC 5%
FRONT
CHANNEL 2 TEST POINT
-19 VDC 5%
TEST POINTS
4-16
NAVAIR 01-75PAC-12 4-1. 4-2. CENTRAL COMPUTER PRELOAD CHECKOUT At the Central Computer Maintenance Control Panel, perform Central Computer pre-load checkout procedure as follows: 1. Press and hold STOP while setting POWER SUPPLY ON-OFF switch to ON, then release STOP. NOTE If the MCP fails to respond to control switch commands and the Central Computer run/stop lights on the TACCO Power Control do not come on with the switches properly set, there could be a fault in the TACCO Power Control. a. b. c. d. On the DPS electronic circuit breaker panel, set COMPUTER ABC circuit breaker to off. Disconnect A9J05 connector from Central Computer MCP. On DPS electronic circuit breaker panel set COMPUTER ABC circuit breaker to on. Repeat step 1, if the Central Computer controls respond, the TACCO Power Control fuse F1 or circuitry is defective, or the aircraft wiring is defective. NOTE After correcting discrepancy, proceed with steps e, f, and g. e. f. g. 2. On DPS electronic circuit breaker panel, set COMPUTER ABC circuit breaker to off. Reconnect A9J05 connector on the Central Computer MCP. On DPS electronic circuit breaker panel, set COMPUTER ABC circuit breaker to on. 6. 5. b. 4. 3. d. If INPUT POWER and POWER FAULT indicators are off, perform step 4. 9. Set P to 77777, then observe P. a. b. 10. If P equals 77777, perform step 10. If P equals any other value, perform P Register Test in NAVAIR 16-35CP901-1-1.
Press MAINT IND TEST and observe that all indicators on Maintenance Console come on. a. If no indicators come on (ignoring INPUT POWER) or all indicators come on, perform Power Supply Test in NAVAIR 16-35CP901-1-1. If all indicators except OUTPUT POWER indicator come on, replace bulb for OUTPUT POWER indicator. 11. 12. 13.
Press P CLR, then observe P. a. b. If P equals 00000, perform step 11. If P does not equal 00000, perform P Register Test in NAVAIR 16-35CP901-1-1.
Replace bulb for INPUT POWER indicator and observe the following: a. b. If indicator comes on, perform step 5. If indicator does not come on, perform Power Supply Test in NAVAIR 16-35CP901-1-1.
Set DISCONNECT RTC up. Press MEM SELECT CLR. Press UAQZ SELECT Z, then observe UAQZ SELECT Z. a. b. If UAQZ SELECT Z comes on (and UAQZ SELECT U, A, and Q are not on), perform step 14. If UAQZ SELECT Z is not on, replace cards: 39A of CP and 38A of CP.
While pressing MAINT IND TEST, observe that all indicators on Maintenance Console come on. a. If all indicators are on, perform step 6. NOTE All green, red, and amber indicators are bulbs. All others are switch-indicators. b. c. If one or more indicators do not come on, replace corresponding bulbs/switch-indicators. If console indications do not change, replace MAINT IND TEST switch assembly. 14.
Observe UAQZ. a. b. If UAQZ is not incrementing or decrementing, perform step 15. If UAQZ is incrementing or decrementing, perform Counter Test in NAVAIR 16-35CP901-1-1.
15.
Set UAQZ to 77777 77777, and observe UAQZ. a. b. If UAQZ equals 77777 77777, perform step 16. If UAQZ equals any other value, perform Z OP Register Test in NAVAIR 16-35CP901-1-1.
Press UAQZ SELECT U, then observe UAQZ SELECT U. a. b. If on, perform step 7. If off, replace cards: 39A of CP and 38A of CP. 16.
Press UAQZ CLR, then observe UAQZ. a. b. If UAQZ equals 00000 00000, perform step 17. If UAQZ equals any other value, perform Z OP Register Test in NAVAIR 16-35CP901-1-1.
Observe INPUT POWER, OUTPUT POWER, and POWER FAULT indicators for the following conditions: a. b. If INPUT POWER and OUTPUT POWER indicators are on and POWER FAULT indicator is not on, perform step 5. If INPUT POWER and OUTPUT POWER indicators are off or POWER FAULT indicator is on, check tolerance of source voltage. If source voltage is within tolerance, perform Power Supply Test in NAVAIR 16-35CP901-1-1, CP-901 Computer Diagnostic Manual. If OUTPUT POWER and POWER FAULT indicators are not on, perform step 3.
7.
Set UAQZ to 77777 77777, then observe UAQZ. a. b. If UAQZ equals 77777 77777, perform step 8. If UAQZ equals any other value, perform U Register Test in NAVAIR 16-35CP901-1-1. 17. 18. 19.
Press P CLR, then set P to 01000. Press INITIATE READ. Press UAQZ CLR, then set UAQZ to 71777 77777. NOTE If any bits cannot be set, perform steps 38 through 46.
8.
Press UAQZ CLR, then observe UAQZ. a. b. If UAQZ equals 00000 00000, perform step 9. If UAQZ equals any other value, perform U Register Test in NAVAIR 16-35CP901-1-1.
c.
20.
Press INITIATE WRITE. 4-17
Figure 4-6. Central Computer Preload Checkout Procedure, Aircraft BUNO 156507 through 158927 and 158929 through 159329 (Sheet 1 of 2)
NAVAIR 01-75PAC-12 21. 22. 23. Press P CLR, then set P to 01001. Press INITIATE READ. Press UAQZ CLR, then set UAQZ to 06000 00000. NOTE
If any indicators cannot be set, perform steps 38 through 46.
36.
Perform one of the following: a. b. c. If more than one bit is in error (either erroneously set or cleared), perform steps 38 through 46. If a single bit is erroneously set, record the error bit, then perform Z1 Register Test in NAVAIR 16-35CP901-1-1. If a single bit is erroneously cleared, record the error bit and the P register value, then perform Z1 Register Test in NAVAIR 16-35CP901-1-1.
49.
Central Computer Preload Checkout is completed.
24. 25. 26. 27. 28. 29. 30.
Press INITIATE WRITE. Press MASTER CLEAR. Press P CLR. Set P to 01000. Press UAQZ SELECT U. Press MODE INST. Press LSO-START STEP once, then observe P. a. b. If P equals 01001, perform step 31. If P equals any other value, perform Mode Select Test in NAVAIR 16-35CP901-1-1. 38. 39. 40. 41. 42. 43. 37.
At LU 1, set CHANNEL switch to ARO, and MODE SELECTOR switch to OFF LINE. Press ENTER and RESET CHAN buttons. Set BOOTSTRAP A-B to B. Set BOOTSTRAP AUTO RECOV-MANUAL to MANUAL. Press MASTER CLEAR. Set all STOPS, JUMPS, and DlSCONNECTS to center. Press MODE RUN. Press LSO-START STEP once, then observe P. a. b. If P equals 40062, perform step 44. If P equals any other value, perform step 48.
31.
Observe UAQZ. a. b. If UAQZ equals 71777 77777, perform step 33. If UAQZ equals any other value, perform step 32. 44. 45.
32.
Perform one of the following: a. b. c. If bit 25 or 26 is set, record the bit, then do Z1 Register Test in NAVAIR 16-35CP901. If more than one bit is in error (either erroneously set or cleared), perform steps 38 through 46. If an indicator is clear which should be set, perform Z1 Register Test in NAVAIR 16-35CP901-1-1.
Set BOOTSTRAP AUTO RECOV-MANUAL to center and BOOTSTRAP A-B to center position. Press LSO-START STEP once, then observe P. a. b. If P equals 40063, perform step 46. If P equals any other value, perform step 48.
46.
Press LSO-START STEP once, then observe P. a. b. If P equals 40766, perform step 47. If P equals any other value, note P value and perform step 48.
33. 34.
Press MASTER CLEAR. Press LSO-START STEP once, then observe P. a. b. If P equals 01002, perform step 35. If P equals any other value, perform ADTROL Test in NAVAIR 16-35CP901-1-1. 47. 48.
At LU 1, set MODE SELECTOR to ON LINE and press ENTER. Observe STOP. a. If STOP is on, note P register value and check error stop listing. (See Malfunction Isolation Procedures in NAVAIR 16-35CP901-3.) If STOP is off, note P register value and check error loop listing. (See Malfunction Isolation Procedures in NAVAIR 16-35CP901-1-1.)
35.
Observe UAQZ. a. b. If UAQZ equals 06000 00000, perform step 37. If UAQZ equals any other value, perform step 36. b.
4-18
Figure 4-6. Central Computer Preload Checkout Procedure, Aircraft BUNO 156507 through 158927 and 158929 through 159329 (Sheet 2 of 2)
NAVAIR 01-75PAC-12 4-1. 4-2. CENTRAL COMPUTER PRELOAD CHECKOUT a. If no indicators come on (ignoring INPUT POWER) or all indicators come on, perform Power Supply Test in NAVAIR 16-35CP901-1-1. If all indicators except OUTPUT POWER indicator come on, replace bulb for OUTPUT POWER indicator. 10. a. b. If P equals 77777, perform step 10. If P equals any other value, perform P Register Test in NAVAIR 16-35CP901-1-1.
At the Central Computer Maintenance Control Panel, perform Central Computer preload checkout procedure as follows: NOTE Cycling LU 2 power may cause the MTT, with write permit ring installed, to write extraneous data on tape. 1. Press and hold STOP while setting POWER SUPPLY ON-OFF switch to ON, then release STOP. NOTE If the MCP fails to respond to control switch commands and the Central Computer run/stop lights on the TACCO Power Control do not come on with the switches properly set, there could be a fault in the TACCO Power Control. a. b. c. d. On the DPS electronic circuit breaker panel, set COMPUTER ABC circuit breaker to off. Disconnect A9J05 connector from Central Computer. On DPS electronic circuit breaker panel, set COMPUTER ABC circuit breaker to on. Repeat step 1, if the Central Computer controls respond, the TACCO fuse F1 Power Control or circuitry is defective, or the aircraft wiring is defective. 5. 4.
b.
Press P CLR, then observe P. a. b. If P equals 00000, perform step 11. If P does not equal 00000, perform P Register Test in NAVAIR 16-35CP901-1-1.
Replace bulb for INPUT POWER indicator and observe. a. b. If indicator comes on, perform step 5. If indicator does not come on, perform Power Supply Test in NAVAIR 16-35CP901-1-1. 11. 12. 13.
Set DISCONNECT RTC up. Press MEM SELECT CLR. Press UAQZ SELECT Z, then observe UAQZ SELECT Z. a. b. If UAQZ SELECT Z is on (and UAQZ SELECT U, A, and Q are off), perform step 14. If UAQZ SELECT Z is off, replace cards: 39A of CP and 38A of CP.
While pressing MAINT IND TEST, observe that all indicators on Maintenance Console come on. a. If all indicators are on, perform step 6. NOTE All green, red, and amber indicators are bulbs. All others are switch-indicators. b. c. If one or more indicators do not come on, replace corresponding bulbs/switch-indicators. If console indications do not change, replace MAINT IND TEST switch assembly.
14.
Observe UAQZ. a. b. If UAQZ is not incrementing or decrementing, perform step 15. If UAQZ is incrementing or decrementing, perform Counter Test in NAVAIR 16-35CP901-1-1.
15.
Set UAQZ to 77777 77777, and observe UAQZ. a. b. If UAQZ equals 77777 77777, perform step 16. If UAQZ equals any other value, perform Z OP Register Test in NAVAIR 16-35CP901-1-1.
6.
Press UAQZ SELECT U, then observe UAQZ SELECT U. a. b. If on, perform step 7. If off, replace cards: 39A of CP and 38A of CP. 16.
2.
Observe INPUT POWER, OUTPUT POWER, and POWER FAULT indicators for the following conditions: a. b. If INPUT POWER and OUTPUT POWER indicators are on and POWER FAULT indicator is not on, perform step 5. If INPUT POWER and OUTPUT POWER indicators are off or POWER FAULT indicator is on, check tolerance of source voltage. If source voltage is within tolerance, perform Power Supply Test in NAVAIR 16-35CP901-1, CP-901 Computer Diagnostic Manual. If OUTPUT POWER and POWER FAULT indicators are not on, perform step 3. If INPUT POWER and POWER FAULT indicators are off, perform step 4. 9. 8.
7.
Set UAQZ to 77777 77777, then observe UAQZ. a. b. If UAQZ equals 77777 77777, perform step 8. If UAQZ equals any other value, perform U Register Test in NAVAIR 16-35CP901-1-1.
Press UAQZ CLR, then observe UAQZ. a. b. If UAQZ equals 00000 00000, perform step 17. If UAQZ equals any other value, perform Z OP Register Test in NAVAIR 16-35CP901-1-1.
17. 18. 19.
Press P CLR, then set P to 01000. Press INITIATE READ. Press UAQZ CLR, then set UAQZ to 71777 77777. NOTE If any bits cannot be set, perform steps 38 through 47.
c. d. 3.
Press UAQZ CLR, then observe UAQZ. a. b. If UAQZ equals 00000 00000, perform step 9. If UAQZ equals any other value, perform U Register Test in NAVAIR 16-35CP901-1-1.
Press MAINT IND TEST and observe that all indicators on Maintenance Console come on.
Set P to 77777, then observe P.
20.
Press INITIATE WRITE.
Figure 4-7. Central Computer Preload Checkout Procedure, BUNO 158928 and 159503 and Subsequent (Sheet 1 of 2)
4-19
NAVAIR 01-75PAC-12 21. 22. 23. Press P CLR, then set P to 01001. Press INITIATE READ. Press UAQZ CLR, then set UAQZ to 06000 00000. NOTE If any indicators cannot be set, perform steps 38 through 47. 24. 25. 26. 27. 28. 29. 30. Press INITIATE WRITE. Press MASTER CLEAR. Press P CLR. Set P to 01000. Press UAQZ SELECT U. Press MODE INST. Press LSO-START STEP once, then observe P. a. b. 31. If P equals 01001, perform step 31. If P equals any other value, perform Mode Select Test in NAVAIR 16-35CP901-1-1. 38. 39. 40. 41. 42. 43. 37. b. c. 36. Perform one of the following: a. If more than one bit is in error (either erroneously set or cleared), perform steps 38 through 47. If a single bit is erroneously set, record the error bit, then perform ZI Register Test in NAVAIR 16-35CP901-1-1. If a single bit is erroneously cleared, record the error bit and the P register value, then perform ZI Register Test in NAVAIR 16-35CP901-1-1.
At LU 1, set CHANNEL switch to ARO, and MODE SELECTOR switch to OFF LINE. Press ENTER and RESET CHAN buttons. Set BOOTSTRAP AUTO RECOV-MANUAL to MANUAL. Set JUMP 2 and JUMP 3 to up. Set all other JUMPS, STOPS, and DISCONNECTS to center. Press MASTER CLEAR. Press MODE RUN. Press LSO-START STEP once, then observe P. a. b. If P equals 40062, perform step 44. If P equals any other value, perform step 49.
Observe UAQZ. a. b. If UAQZ equals 71777 77777, perform step 33. If UAQZ equals any other value, perform step 32. 44. 45.
Set BOOTSTRAP AUTO RECOV-MANUAL to center. Press LSO-START STEP once, then observe P. a. b. If P equals 40063, perform step 46. If P equals any other value, note P value and perform step 49.
32.
Perform one of the following: a. b. c. If bit 25 or 26 is set, record the bit, then perform ZI Register Test in NAVAIR 16-35CP901-1-1. If more than one bit is in error (either erroneously set or cleared), perform steps 38 through 47. If an indicator is clear which should be set, perform ZI Register Test in NAVAIR 16-35CP901-1-1. 47. 48. 49. 46.
Press LSO-START STEP once, then observe P. a. b. If P equals 40500, perform step 47. If P equals any other value, note P value and perform step 49.
33. 34.
Press MASTER CLEAR. Press LSO-START STEP once, then observe P. a. b. If P equals 01002, perform step 35. If P equals any other value, perform the ADTROL Test in NAVAIR 16-35CP901-1-1.
Set JUMP 2 and JUMP 3 to center. At LU 1, set MODE SELECTOR to ON LINE and press ENTER. Observe STOP. a. If STOP is on, note P register value and check Error Stop Listing. (See Malfunction Isolation Procedures in NAVAIR16-35CP901-3.) If STOP is off, note P register value and check Error Loop Listing. (See Malfunction Isolation Procedures in NAVAIR 16-35CP901-1-1.)
35.
Observe UAQZ. a. b. If UAQZ equals 06000 00000, perform step 37. If UAQZ equals any other value, perform step 36. 50.
b.
Computer preload checkout is complete.
4-20
Figure 4-7. Central Computer Preload Checkout Procedure, Aircraft BUNO 158928 and 159503 and Subsequent (Sheet 2 of 2)
NAVAIR 01-75PAC-12 4-1. HAWK II MEMORY FAULT ISOLATION AIDS. 1. When the P register ERROR STOP indicates a memory unit failure, select APR 168 and determine the memory unit, stack and half-stack. Determine the absolute address of the failure. a. b. Select B3 or B5. To ensure B3 or B5 contains the absolute address, BITs 13 and 12 of B3/B5 should match APR 168 BITs 13 and 12. Finding the absolute address is imperative. Enter the absolute address in the P register. Manually read/write into the absolute address of the memory unit indicated by APR 168. NOTE Not being able to read/write into the absolute address is indicated by all 30 BITs being dropped during the read/write and is caused by a B row module failure. 4. Flow chart for isolating memory unit failures: once the determination for the ability to read/write into the absolute address is made, follow the flow chart. Absolute address X and Y drive line bit failure. a. b. B3/B5 identify which X and Y drive lines are being used. X and Y drive line BIT assignment and their associated modules are as follows. NOTE Once the bad BIT(s) is determined, the corresponding module could also be determined by use of Central Computer Module Location Diagram, Central Computer Module Function and Interchangeability, or by the use of the following charts.
BIT 11 10 9 8 7 6 5 X READ/WRITE DIODE SELECTOR 4 3 2 1 0 X EMITTER BASE and EMITTER AXIS SELECTOR Y BASE = Y EMITTER BASE and EMITTER AXIS SELECTOR 61 60 28 27 ASSIGNMENT Y READ/WRITE DIODE SELECTOR B ROW CARD FOR SINGLE STACK PROBLEM STACK = 0 1 2 3
2.
21 22 15 16
c. 3. a. b.
Determine if possible to read/write into absolute address.
36 37 19 20
5.
X BASE
35 34
2 1
B ROW CARD FOR TWO STACK PROBLEM
STACK = 0 & 1 X and Y BASE Y EMITTER X EMITTER 14 23 30
2&3 29 17 12
EXAMPLE: P = 21730 APR 168 = 020 B3 = 00200
Using the absolute address to perform manual read/writes into memory unit 2 stack 0 (this information was given by APR 168 ), you determine that you cannot write into memory at the absolute address but that only one stack is failing. BIT 7 of B3 identifies the Y EMITTER. Using the Central Computer Module Location Diagram, it is determined that B61 is the faulty module.
Figure 4-8. Central Computer Memory Fault Isolation Procedure (Sheet 1 of 2)
4-21
NAVAIR 01-75PAC-12
ISOLATING MEMORY UNIT FAILURES - FLOW CHART H. A. CAN YOU READ/WRITE INTO MEMORY AT ABSOLUTE ADDRESS? YES G. DETERMINE FAILING STACK(S) DOES PROBLEM OCCUR IN MORE THAN ONE STACK? 1 YES ALL STACKS - ONE OR MORE BITS, BUT NOT ALL BITS - CHANGE Z REGISTER OR INHIBIT CURRENT REGULATOR CARD(S) FOR RELATED BITS
I. ONE OR MORE STACKS AND ALL BITS - - 3, 7, OR 10B; OR ALL STACKS AND ALL BITS - - 25, 4, 5, OR 24B
NO J. ARE BITS BEING DROPPED? NO NO L. ARE BITS BEING PICKED UP? YES M. CHANGE INHIBIT CARD(S) FOR RELATED BITS YES K. CHANGE SENSE AMP(S) FOR RELATED BITS
N. CHANGE STACK FOR RELATED BITS
B. DETERMINE FAILING STACK(S) DOES PROBLEM OCCUR IN MORE THAN ONE STACK? YES
C. 2 STACKS - CHANGE B ROW CARD CORRESPONDING TO X & Y DRIVE LINE BIT INDICATIONS
NO E. CHANGE B ROW CARD CORRESPONDING TO X & Y DRIVE LINE BIT INDICATIONS NOTE 1
D. ALL 4 STACKS
F.
REFER TO I
IF POSSIBLE TO READ/WRITE INTO THE ABSOLUTE ADDRESS WITH NO MALFUNCTIONS, S REGISTER MAY BE AT FAULT.
4-22
Figure 4-8. Central Computer Memory Fault Isolation Procedure (Sheet 2 of 2)
NAVAIR 01-75PAC-12
EQUIPMENT/MODULE/PART DESIGNATOR A1 IN-FLIGHT SPARES No
SUBSYSTEM Input/Output Unit
NOMENCLATURE Input/Output Assembly
FUNCTION Transfers Data and Control Information between External Equipment and the Computer Input Ack, Ext Enable/ Req Input/Output Reg, Input Amp Enable, Output Data Reg Bits 0-2 Input Ack, Ext Enable/ Req, Input Data Req, Ext/Int Reg, Input Chan Enable, Output Data Reg Bits 3-5 Ext Function Ack/Req, Ext Int Enable Req, Output Data Req Input Amp Chan Enable, Output Data Reg Bits 6-8 Ack Req, Ext Int Enable, Input/Output Data Req, Input Amp Group/Chan Enable, Output Data Reg Bits 9-11, 12-15 Ack Reg, Input/Output Data Req, Ext Int Req, Output Data Control, Output Data Reg Bits 16-18,19-22 Ext Function Req, Output Cont, Output Data Reg 23-25, 26-29 Input Amp Group Enable, Input Amp Bit 0,1, 2 Input Amp Group Enable, Input Amp Bit 3, 4, 5 Input Amp Group Enable, Input Amp Bit 6, 7, 8 Input Amp Group Enable, Input Amp Bit 9,10,11 Input Amp Group Enable, Input Amp Bit 12,13,14 Input Amp Group Enable Input Amp Bit 15,16,17 Input Amp Group Enable, Input Amp Bit 18,19, 20 Input Amp Group Enable, Input Amp Bit 21, 22, 23 Input Amp Group Enable, Input Amp Bit 24, 25, 26
IDENTICAL ITEMS FOR ALTERNATE REPAIRS None
EQUIPMENT/MODULE/PART DESIGNATOR A1A16 A1A17 IN-FLIGHT SPARES Yes Yes
NOMENCLATURE Input/Output Data Receivers Output + Acknowledge Register
FUNCTION Input Amp Group Enable, Input Amp Bit 27, 28, 29 Input Ack, Ext Int Enable/ Req, Output Data Req Input Amp Group/Chan Enable Ack Reg, Output Ack, Ext Int Enable, Input Data Req, Ext Int/Funct Req, Input Amp Chan Enable, Output Data Reg Bits 3-5 Ext Funct Ack, Ext Int Enable, Output Data Req, Input Amp Group/Chan Enable, Ext Int/Funct Reg Output Data Reg Bits 6-8 Ack Reg, Ext Int Enable, Input/Output Data Req, Ext Funct Reg Input Amp Group/Chan Output Data Reg Bits 9-11, 12-15 Ack Reg, Ext Int Req, Output Data Req, Output Data Control, Output Data Reg Bits 16-18, 19-22 Ext Funct Req, Output Data Cont, Output Data Reg Bits 23-25, 26-29 Input Amp Group Enable, Input Amp Bit 0,1, 2 Input Amp Group Enable, Input Amp Bit 3, 4, 5 Input Amp Group Enable, Input Amp Bit 6, 7, 8 Input Amp Group Enable, Input Amp Bit 9,10,11 Input Amp Group Enable Input Amp Bit 12,13,14 Input Amp Group Enable, Input Amp Bit 15,16,17 Input Amp Group Enable, Input Amp Bit 18,19, 20 Input Amp Group Enable, Input Amp Bit 21, 22, 23 Input Amp Group Enable, Input Amp Bit 24, 25, 26 Input Amp Group Enable, Input Amp Bit 27, 28, 29
IDENTICAL ITEMS FOR ALTERNATE REPAIRS A1A7-A16, A23-A32, A39-A48, 3 A55-A64 (40 Total) A1A1-A6, A17-A22, A33-A38, A49-A54 (24 Total) A1A1-A6, A17-A22, A33-A38, A49-A54 (24 Total)
A1A1
Output + Acknowledge Register
Yes
A1A1-A6, A17-A22, A33-A38, A49-A54 (24 Total) A1A1-A6, A17-A22, A33-A38, A49-A54 (24 Total)
A1A18
A1A2
Yes
Yes
A1A19 Yes A1A1-A6, A17-A22, A33-A38, A49-A54 (24 Total) A1A20 Yes A1A1-A6, A17-A22, A33-A38, A49-A54 (24 Total) A1A21 Yes A1A1-A6, A17-A22, A33-A38, A49-A54 (24 Total)
A1A3
Yes
A1A1-A6, A17-A22, A33-A38, A49-A54 (24 Total)
A1A4
Yes
A1A1-A6, A17-A22, A33-A38, A49-A54 (24 Total)
A1A5
Yes
A1A1-A6, A17-A22, A33-A38, A49-A54 (24 Total) A1A1-A6, A17-A22, A33-A38, A49-A54 (24 Total) A1A7-A16, A23-A32, A39-A48, 3 A55-A64 (40 Total) A1A7-A16, A23-A32, A39-A48, A55-A64 (40 Total) A1A7-A16, A23-A32, A39-A48, A55-A64 (40 Total) A1A7-A16, A23-A32, A39-A48, A55-A64 (40 Total) A1A7-A16, A23-A32, A39-A48, A55-A64 (40 Total) A1A7-A16, A23-A32, A39-A48, A55-A64 (40 Total) A1A7-A16, A23-A32, A39-A48, A55-A64 (40 Total) A1A7-A16, A23-A32, A39-A48, A55-A64 (40 Total) A1A7-A16, A23-A32, A39-A48, A55-A64 (40 Total) A1A7-A16, A23-A32, A39-A48, A55-A64 (40 Total) 3 3 3 3 3 3 3 3 3
A1A22
Output + Acknowledge Register Input/Output Data Receivers Input/Output Data Receivers Input/Output Data Receivers Input/Output Data Receivers Input/Output Data Receivers Input/Output Data Receivers Input/Output Data Receivers Input/Output Data Receivers Input/Output Data Receivers Input/Output Data Receivers
Yes
A1A6
Output + Acknowledge Register Input/Output Data Receivers Input/Output Data Receivers Input/Output Data Receivers Input/Output Data Receivers Input/Output Data Receivers Input/Output Data Receivers Input/Output Data Receivers Input/Output Data Receivers Input/Output Data Receivers
Yes
A1A1-A6, A17-A22, A33-A38, A49-A54 (24 Total) A1A7-A16, A23-A32, A39-A48, A55-A64 (40 Total) A1A7-A16, A23-A32, A39-A48, A55-A64 (40 Total) A1A7-A16, A23-A32, A39-A48, A55-A64 (40 Total) A1A7-A16, A23-A32, A39-A48, A55-A64 (40 Total) A1A7-A16, A23-A32, A39-A48, A55-A64 (40 Total) A1A7-A16, A23-A32, A39-A48, A55-A64 (40 Total) A1A7-A16, A23-A32, A39-A48, A55-A64 (40 Total) A1A7-A16, A23-A32, A39-A48, A55-A64 (40 Total) A1A7-A16, A23-A32, A39-A48, A55-A64 (40 Total) 3 3 3 3 3 3 3
A1A23 A1A24 A1A25 A1A26 A1A27 A1A28 A1A29 A1A30 3 A1A31 3 A1A32
Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes
A1A7 A1A8 A1A9 A1A10 A1A11 A1A12 A1A13 A1A14 A1A15
Yes Yes Yes Yes Yes Yes Yes Yes Yes
Figure 4-9. Central Computer Module Function and Interchangeability (Sheet 1 of 12)
4-23
NAVAIR 01-75PAC-12
EQUIPMENT/MODULE/PART DESIGNATOR A1A33 IN-FLIGHT SPARES Yes EQUIPMENT/MODULE/PART DESIGNATOR A1A47 IN-FLIGHT SPARES Yes
NOMENCLATURE Output + Acknowledge Register
FUNCTION Input Ack, Ext Int Enable/ Req, Input/Output Data Req, Input Amp Group/ Chan Enable, Output Data Reg Bit 0-2 Ack Reg, Output Ack, Ext Int Enable Req, Input Data Req, Input Amp Chan Enable, Output Data Reg Bit 3-5, Ext Funct Req Ext Funct Ack/Req, Ext Int Enable Req, Input Amp Group/Chan Enable Output Data Req, Output Data Reg Bits 6-8 Ack Reg, Ext Int Enable, Ext Function Req, Input/ Output Data Req, Input Amp Group/Chan Enable, Output Data Reg Bits 9-11, 12-15 Ack Reg, Input Data and Ext Int Req, Output Data Req/CTL, Output Data Reg Bits 16-18,19-22 Ext Function Req, Output Data Control Output Data Reg Bits 23-25, 26-29 Input Amp Group Enable, Input Amp Bit 0,1, 2 Input Amp Group Enable, Input Amp Bit 3, 4, 5 Input Amp Group Enable, Input Amp Bit 6, 7, 8 Input Amp Group Enable, Input Amp Bit 9,10,11 Input Amp Group Enable, Input Amp Bit 12,13,14 Input Amp Group Enable, Input Amp Bit 15,16,17 Input Amp Group Enable, Input Amp Bit 18,19, 20 Input Amp Group Enable, Input Amp Bit 21, 22, 23
IDENTICAL ITEMS FOR ALTERNATE REPAIRS A1A1-A6, A17-A22, A33-A38, A49-A54 (24 Total)
NOMENCLATURE Input/Output Data Receivers Input/Output Data Receivers Output + Acknowledge Register
FUNCTION Input Amp Group Enable, Input Amp Bit 24, 25, 26 Input Amp Group Enable, Input Amp Bit 27, 28, 29 Input Ack, Ext Int Enable/ Req, Input/Output Data Req, Input Amp Group/ Chan Enable, Output Data Reg Bit 0-2 Ack Reg, Output Ack, Ext Int Enable/Req, Input Data Reg, Input Amp Chan Enable, Output Data Reg Bit 3-5, Ext Funct Req Ext Function Ack/Req, Ext Int Enable/Req, Input Amp Group/Chan Enable Output Data Reg Bits 6-8 Ack Reg, Ext Int Enable, Input/Output Data Req, Ext Funct Req, Input Amp Group/Chan Enable Output Data Reg Bits 9-11, 12-15 Ack Reg, Input Data and Ext Int Req, Output Data Req/CTL, Output Data Reg Bits 16-18, 19-22 Ack Reg, Ext Function Req, Output Data Control, Output Data Reg Bits 23-25, 26-29 Input Amp Group Enable, Input Amp Bit 0,1, 2 Input Amp Group Enable, Input Amp Bit 3, 4, 5 Input Amp Group Enable, Input Amp Bit 6, 7, 8 Input Amp Group Enable, Input Amp Bit 9,10,11 Input Amp Group Enable, Input Amp Bit 12,13,14 Input Amp Group Enable, Input Amp Bit 15,16,17
IDENTICAL ITEMS FOR ALTERNATE REPAIRS A1A7-A16, A23-A32, 3 A39-A48, A55-A64 (40 Total) A1A7-A16, A23-A32, A39-A48, A55-A64 (40 Total) A1A1-A6, A17-A22, A33-A38, A49-A54 (24 Total) 3
A1A48 Yes A1A1-A6, A17-A22, A33-A38, A49-A54 (24 Total)
Yes
A1A34
A1A49
Yes
A1A35
Yes
A1A1-A6, A17-A22, A33-A38, A49-A54 (24 Total) A1A50 Output + Acknowledge Register
Yes
A1A36
Yes
A1A1-A6, A17-A22, A33-A38, A49-A54 (24 Total) A1A51 Output + Acknowledge Register
A1A1-A6, A17-A22, A33-A38, A49-A54 (24 Total)
Yes
A1A37
Yes
A1A1-A6, A17-A22, A33-A38, A49-A54 (24 Total) A1A1-A6, A17-A22, A33-A38, A49-A54 (24 Total) A1A7-A16, A23-A32, A39-A48, A55-A64 3 (40 Total) A1A7-A16, A23-A32, A39-A48, A55-A64 3 (40 Total) A1A7-A16, A23-A32, A39-A48, A55-A64 3 (40 Total) A1A7-A16, A23-A32, A39-A48, A55-A64 3 (40 Total) A1A7-A16, A23-A32, A39-A48, A55-A64 3 (40 Total) A1A7-A16, A23-A32, 3 A39-A48, A55-A64 (40 Total) A1A7-A16, A23-A32, 3 A39-A48, A55-A64 (40 Total) A1A7-A16, A23-A32, 3 A39-A48, A55-A64 (40 Total)
A1A1-A6, A17-A22, A33-A38, A49-A54 (24 Total) A1A1-A6, A17-A22, A33-A38, A49-A54 (24 Total)
A1A52
Yes
A1A38
Output + Acknowledge Register Input/Output Data Receivers Input/Output Data Receivers Input/Output Data Receivers Input/Output Data Receivers Input/Output Data Receivers Input/Output Data Receivers Input/Output Data Receivers Input/Output Data Receivers
Yes
A1A39
Yes
A1A53
Yes
A1A1-A6, A17-A22, A33-A38, A49-A54 (24 Total) A1A1-A6, A17-22, A33-A38, A49-A54 (24 Total) A1A7-A16, A23-A32, A39-A48, A55-A64 3 (40 Total) A1A7-A16, A23-A32, 3 A39-A48, A55-A64 (40 Total) A1A7-A16, A23-A32, 3 A39-A48, A55-A64 (40 Total) A1A7-A16, A23-A32, A39-A48, A55-A64 (40 Total) A1A7-A16, A23-A32, A39-A48, A55-A64 (40 Total) A1A7-A16, A23-A32, A39-A48, A55-A64 (40 Total) 3
A1A40
Yes
A1A54
Yes
A1A41
Yes
A1A55
A1A42
Yes
Input/Output Data Receivers Input/Output Data Receivers Input/Output Data Receivers Input/Output Data Receivers Input/Output Data Receivers Input/Output Data Receivers
Yes
A1A56
Yes
A1A43
Yes
A1A57
Yes
A1A44
Yes
A1A58
Yes
A1A45
Yes
A1A59
Yes
A1A46
Yes
3 3
A1A60
Yes
4-24
NAVAIR 01-75PAC-12
EQUIPMENT/MODULE/PART DESIGNATOR A1A61 A1A62 A1A63 A1A64 Memory Chassis Assy A2 A2A1 IN-FLIGHT SPARES Yes Yes Yes Yes Yes Yes EQUIPMENT/MODULE/PART DESIGNATOR A2A35 IN-FLIGHT SPARES Yes
NOMENCLATURE Input/Output Data Receivers Input/Output Data Receivers Input/Output Data Receivers Input/Output Data Receivers Memory Chassis Assembly Sense Amplifier
FUNCTION Input Amp Group Enable, Input Amp Bit 18,19, 20 Input Amp Group Enable, Input Amp Bit 21, 22, 23 Input Amp Group Enable, Input Amp Bit 24, 25, 26 Input Amp Group Enable, Input Amp Bit 27, 28, 29 Memory Unit 2 Sense Amplifiers, Stack 3, Bits 0-9 Sense Amplifiers, Stack 3, Bits 16, 18, 20, 21, 23-27, 29 Sense Amplifiers, Stack 3, Bits 10-19 Sense Amplifiers, Stack 3, Bits 10-15, 17, 19, 22, 28 Sense Amplifiers, Stack 3, Bits 20-29 Sense Amplifiers, Stack 3, Bits 0-9 Memory Stack 3, Stack Drive/Sense/Inhibit Lines Inhibit Half Stack Select (Stack 3), Inhibit Even Bits 0-28 (U & L) Inhibit Half Stack Select (Stack 3), Inhibit Odd Bits 1-29 (U & L) Sense Amplifiers, Stack 1, Bits 0-9 Sense Amplifiers, Stack 1, Bits 16, 18, 20, 21, 23-27, 29 Sense Amplifiers, Stack 1, Bits 10-19
IDENTICAL ITEMS FOR ALTERNATE REPAIRS A1A7-A16, A23-A32, A39-A48, A55-A64 (40 Total) 3 A1A7-A16, A23-A32, A39-A48, A55-A64 (40 Total) 3 A1A7-A16, A23-A32, A39-A48, A55-A64 (40 Total) 3 A1A7-A16, A23-A32, A39-A48, A55-A64 (40 Total) 3 A4, A5, A6 A2A1-A3, A34-A36, C1-C3, C34-C36 (12 each Mem 48 Total) A2A1-A3, A34-A36, C1-C3, C34-C36 (12 each Mem 48 Total) A2A1-A3, A34-A36, C1-C3, C34-C36 (22 each Mem 48 Total) A2A1-A3, A34-A36, C1-C3, C34-C36 (12 each Mem 48 Total) A2A1-A3, A34-A36, C1-C3, C34-C36 (12 each Mem 48 Total) A2A1-A3, A34-A36, C1-C3, C34-C36 (12 each Mem 48 Total)
SUBSYSTEM Memory Chassis Assy
NOMENCLATURE Sense Amplifier
FUNCTION Sense Amplifiers, Stack 1, Bits 10-15, 17, 19, 22, 28 Sense Amplifiers, Stack 1, Bits 20-29 Sense Amplifiers, Stack 1, Bits 0-9 Memory Stack 1, Memory Stack Drive/Sense/Inhibit Lines Inhibit Half Stack Select (Stack 1), Inhibit Even Bits 0-28 (U & L) Inhibit Half Stack Select (Stack 1), Inhibit Odd Bits 1-29 (U & L) Base and Emitter Selectors (X Axis, Stack 3) Base and Emitter Selectors (X Axis, Stack 2) Translation Fan-Out for Diode Selection and Stack Discharge Memory Control/Overtemp Control Pulse Generator and Pulse Distribution Pulse Distribution, Read/ Write Current Regulator Address(s) Register and Translation Bits 0-5 Address(s) Register and Translation Bits 6-11 Stack Selector and FanOut Address(s) Register and Translation Bits 0-11 Transistor Matrix, Base and Emitter Selectors, X Axis, Stacks 2 & 3, Translation Fan-Out for Diode Sel and Stack Discharge
IDENTICAL ITEMS FOR ALTERNATE REPAIRS A2A1-A3, A34-A36, C1-C3, C34-C36 (12 each Mem 48 Total) A2A1-A3, A34-A36, C1-C3, C34-C36 (12 each Mem 48 Total) A2A1-A3, A34-A36, C1-C3, C34-C36 (12 each Mem 48 Total) A2A4/A27, A37/A60, C4/C27, C37/C60 (4 each Mem 16 Total) A2A28, A30, A61, A63, C28, C30, C61, C63 (8 each Mem 32 Total) A2A28, A30, A61, A63, C28, C34, C61, C63 (8 each Mem 32 Total) A2B1, B2, B27, B28, B34, B35, B60, B61 (8 each Mem 32 Total) A2B1, B2, B27, B28, B34, B35, B60, B61 (8 each Mem 32 Total) A2B3, B11 (2 each Mem 8 Total) (1 each Mem - 4 Total) (1 each Mem - 4 Total) (1 each Mem - 4 Total) A2B8, B9 (2 each Mem - 8 Total) A2B8, B9 (2 each Mem - 8 Total) (1 each Mem - 4 Total) A2B3, B11 (2 each Mem 8 Total) A2B12, B17, B23, B30 (4 each Mem - 16 Total)
A2A36
Sense Amplifier
Yes
A2A36
Sense Amplifier
Yes
A2A37/ A60 2 A2A61/ A62 A2A63/ A64 A2B1
Memory Stack Assembly Inhibit Half Stack
Yes
Yes
A2A1
Sense Amplifier
Yes
Inhibit Half Stack
Yes
A2A2
Sense Amplifier
Yes
Transistor Matrix
Yes
A2A2
Sense Amplifier
Yes
A2B2
Transistor Matrix
Yes
A2A3
Sense Amplifier
Yes
A2B3
Translation and Timer
No
A2A3
Sense Amplifier
Yes
A2B4 4 A2B5/B6 A2B7 A2B8 A2B9 A2B10 2 A2B11 4 A2B12
Memory Control Pulse Generator Pulse Dist. and Stack Select Address Register Address Register Stack Selector and Fan-Out Translation and Timer Read/Write Emitter Selector
Yes Yes No Yes Yes No No Yes
A2A4/ A27 A2A28/ A29 A2A30/ A31 A2A34
Yes Yes
A2A4/A27, A37/A60, C4/C27, C37/C60 (4 each Mem - 16 Total) A2A28, A30, A61, A63, C28, C30, C61, C63 (8 each Mem 32 Total) A2A28, A30, A61, A63, C28, C30, C61, C63 (8 each Mem 32 Total) A2A1-A3, A34-A36, C1-C3, C34-C36 (12 each Mem 48 Total) A2A1-A3, A34-A36, C1-C3, C34-C36 (12 each Mem 48 Total) A2A1-A3, A34-A36, C1-C3, C34-C36 (12 each Mem 48 Total)
Inhibit Half Stack
Yes
Sense Amplifier
Yes
A2A34
Sense Amplifier
Yes
A2A35
Sense Amplifier
Yes
A2B13
Not Used
4-25
NAVAIR 01-75PAC-12
EQUIPMENT/MODULE/PART DESIGNATOR A2B14 IN-FLIGHT SPARES Yes EQUIPMENT/MODULE/PART DESIGNATOR A2B36 A2B37 Yes Yes Yes A2B15, B16, B19-B22, B36, B37 (8 each Mem - 32 Total) A2B15, B16, B19-B22, B36, B37 (8 each Mem - 32 Total) A2B12, B17, B23, B30 (4 each Mem - 16 Total) A2B38 A2B39 A2B40 A2B41 Yes Yes Yes Yes Yes A2B15, B16, B19-B22, B36, B37 (8 each Mem - 32 Total) A2B15, B16, B19-B22, B36, B37 (8 each Mem - 32 Total) A2B15, B16, B19-B22, B36, B37 (8 each Mem - 32 Total) A2B15, B16, B19-B22, B36, B37 (8 each Mem - 32 Total) A2B12, B17, B23, B30 (4 each Mem - 16 Total) A2B42 A2B43 A2B44/ B45 A2B46/ B47 A2B48/ B49 A2B50/ B51 No Yes Yes Yes Yes (1 each Mem - 4 Total) (1 each Mem - 4 Total) A2B1, B2, B27, B28, B34, B35, B60, B61 (8 each Mem 32 Total) A2B1, B2, B27, B28, B34, B35, B60, B61 (8 each Mem 32 Total) A2B14, B29 (2 each Mem 8 Total) A2B52/ B53 A2B54/ B55 A2B56/ B57 A2B58/ B59 A2B60 IN-FLIGHT SPARES Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes
NOMENCLATURE Read/Write Base Selector Read/Write Diode Selector Read/Write Diode Selector Read/Write Emitter Selector Not Used Read/Write Diode Selector Read/Write Diode Selector Read/Write Diode Selector Read/Write Diode Selector Read/Write Emitter Selector
FUNCTION Transistor Matrix, Base and Emitter Selectors, X and Y Axis, Stacks 0 &1 Read/Write Diode Selectors (Y Axis, Stack 2) Read/Write Diode Selectors (Y Axis, Stack 3) Transistor Matrix, Base and Emitter Selectors Y Axis, Stacks 2 & 3, Read/Write Current Reg Read/Write Diode Selectors (X Axis, Stack 2) Read/Write Diode Selectors (X Axis, Stack 3) Read/Write Diode Selectors (Y Axis, Stack 0) Read/Write Diode Selectors (Y Axis, Stack 1) Transmitter Matrix, Base and Emitter Selectors (Y Axis, Stacks 0 & 1) Fan-Out for Diode Sel and Stack Discharge Stack Discharge for Read Diodes (X and Y Axis) Read/Write Current Regulator Base and Emitter Selectors Y Axis, Stack 3 Base and Emitter Selectors Y Axis, Stack 2 Transistor Matrix, Base and Emitter Selectors X and Y Axis, Stacks 2&3 Transistor Matrix, Base and Emitter Selectors X Axis, Stacks 0 & 1, Read/Write Reg, Translation Fan-Out Base and Emitter Selectors X Axis, Stack 1 Base and Emitter Selectors X Axis, Stack 0
IDENTICAL ITEMS FOR ALTERNATE REPAIRS A2B14, B29 (2 each Mem 8 Total)
NOMENCLATURE Read/Write Diode Selector Read/Write Diode Selector Data Register Data Register Data Register Data Register Data Register Data Register Inhibit Current Regulator Inhibit Current Regulator Inhibit Current Regulator Inhibit Current Regulator Inhibit Current Regulator Inhibit Current Regulator Inhibit Current Regulator Inhibit Current Regulator Transistor Matrix
FUNCTION Read/Write Diode Selectors X Axis, Stack 0 Read/Write Diode Selectors X Axis, Stack 1 Data Z Register Bits 0-4 Data Z Register Bits 5-9 Data Z Register Bits 10-14 Data Z Register Bits 15-19 Data Z Register Bits 20-24 Data Z Register Bits 25-29 Inhibit Current Regulator Bits 0-3 Inhibit Current Regulator Bits 4-7 Inhibit Current Regulator Bits 8-11 Inhibit Current Regulator Bits 12-15 Inhibit Current Regulator Bits 16-19 Inhibit Current Regulator Bits 20-23 Inhibit Current Regulator Bits 24-26 Inhibit Current Regulator Bits 27-29 Base and Emitter Selectors, Y Axis, Stack 1 Base and Emitter Selectors, Y Axis, Stack 0 Filter/Overtemp Control Sense Amplifiers, Stack 2, Bits 0-9 Sense Amplifiers, Stack 2, Bits 16, 18, 20, 21, 23-27, 29
IDENTICAL ITEMS FOR ALTERNATE REPAIRS A2B15, B16, B19-B22, B36, B37 (8 each Mem - 32 Total) A2B15, B16, B19-B22, B36, B37 (8 each Mem - 32 Total) A2B38-B43 (6 each Mem 24 Total) A2B38-B43 (6 each Mem 24 Total) A2B38-B43 (6 each Mem 24 Total) A2B38-B43 (6 each Mem 24 Total) A2B38-B43 (6 each Mem 24 Total) A2B38-B43 (6 each Mem 24 Total) A2B44-B59 (8 each Mem (32 Total) A2B44-B59 (8 each Mem 32 Total) A2B44-B59 (8 each Mem 32 Total) A2B44-B59 (8 each Mem 32 Total) A2B44-B59 (8 each Mem 32 Total) A2B44-B59 (8 each Mem 32 Total) A2B44-B59 (8 each Mem 32 Total) A2B44-B59 (8 each Mem 32 Total) A2B1, B2, B27, B28, B34, B35, B60, B61 (8 each Mem 32 Total) A2B1, B2, B27, B28, B34, B35, B60, B61 (8 each Mem 32 Total) (1 each Mem - 4 Total) A2A1-A3, A34-A36, C1-C3, C34-C36 (12 each Mem 48 Total) A2A1-A3, A34-A36, C1-C3, C34-C36 (12 each Mem 48 Total)
A2B15 A2B16 A2B17
A2B18 A2B19 A2B20 A2B21 A2B22 A2B23
A2B24 A2B25/26 A2B27 A2B28 A2B29
Discharge Circuit, Stack Read/Write Current Regulator Transistor Matrix Transistor Matrix Read/Write Base Selector
A2B61 Yes A2B12, B17, B23, B30 (4 each Mem - 16 Total)
Transistor Matrix
Yes
A2B30
Read/Write Emitter Selector
A2B62/ B63 A2C1
Filter Card Sense Amplifier
No Yes
A2B31 A2B34 A2B35
Not Used Transistor Matrix Transistor Matrix
Yes Yes
A2B1, B2, B27, B28, B34, B35, B60, B61 (8 each Mem 32 Total) A2B1, B2, B27, B28, B34, B35, B60, B61 (8 each Mem 32 Total)
A2C1
Sense Amplifier
Yes
4-26
NAVAIR 01-75PAC-12
EQUIPMENT/MODULE/PART DESIGNATOR A2C2 IN-FLIGHT SPARES Yes
NOMENCLATURE Sense Amplifier
FUNCTION Sense Amplifiers, Stack 2, Bits 10-19 Sense Amplifiers, Stack 2, Bits 10-15, 17, 19, 22, 28 Sense Amplifiers, Stack 2, Bits 20-29 Sense Amplifiers, Stack 2, Bits 0-9 Memory Stack 2, Memory Stack Drive/Sense/Inhibit Lines Inhibit Half Stack Select Stack 2 Inhibit Even No. Bits 0-28 Inhibit Half Stack Select Stack 2 Inhibit Odd No. Bits 1-29 Sense Amplifier, Stack 0, Bits 0-9 Sense Amplifiers, Stack 0, Bits 16, 18, 20, 21, 23-27, 29 Sense Amplifier, Stack 0, Bits 10-19 Sense Amplifiers, Stack 0, Bits 10-15, 17, 19, 22, 28 Sense Amplifier, Stack 0, Bits 20-29 Sense Amplifiers, Stack 0, Bits 0-9 Memory Stack 0, Memory Stack Drive/Sense/Inhibit Lines Inhibit Half Stack Select (Stack 0) Inhibit Even No. Bits 0-28 Inhibit Half Stack Select (Stack 0) Inhibit Odd No. Bits 1-29
IDENTICAL ITEMS FOR ALTERNATE REPAIRS A2A1-A3, A34-A36, C1-C3, C34-C36 (12 each Mem 48 Total) A2A1-A3, A34-A36, C1-C3, C34-C36 (12 each Mem 48 Total) A2A1-A3, A34-A36, C1-C3, C34-C36 (12 each Mem 48 Total) A2A1-A3, A34-A36, C1-C3, C34-C36 (12 each Mem 48 Total)
EQUIPMENT/MODULE/PART DESIGNATOR A3 IN-FLIGHT SPARES No
SUBSYSTEM 2 Central Processor Chassis Assembly
NOMENCLATURE Central Processor Chassis Assembly
FUNCTION Contains Control and Arithmetic Section, Controls Portion of I/O and Memory Section APR Regs 8-15 Bits 15 & 16; APR Console Select; C Translation 1 & 3; R2 Ext Reg Bits 11 & 14; Memory Addressing (OP) APR Regs 0-7 Bits 15 & 16; P Ext Reg Bits 11 & 14; Format II Translation; Memory Addressing (I) APR Regs 8-15 Bits 13 & 14; APR Console Select; Sequence Control 1; R2 Ext Reg Bits 13 & 16; Subtractor Control; Memory Addressing (OP) APR Regs 0-7 Bits 13 & 14; NDRO Memory Address Translation; P Ext Reg Bits 12 & 15; I/O Group Select & I Reg; Memory Addressing (I) APR Regs 8-15 Bits 11 & 12; APR Console Select; R2 Ext Reg Bits 12 & 15; Memory Addressing (OP) APR Reg 0-7 Bits 11 & 12; NDRO Memory Address Translation; P Ext Reg Bits 13 & 16; U and C Reg Commands; Memory Addressing (I) APR Reg 8-15 MP Bit; APR Console Select; APR Reg Commands 3; APR Select; Console Control APR & B Select APR Reg 8-15 MP Bit; APR Console Select; APR Reg Commands 2; APR Select; C Translation 3; Console Control APR & B Select APR Reg 0-7 Bit; APR Console Select; APR Reg Commands 2; APR Select; Console Control APR & B Select APR Reg 0-7 MP Bit; APR Console Select; APR Reg Commands 2; APR Select; Console Control APR & B Select
A2C2
Sense Amplifier
Yes
A3A1
APR Register
No
A3A1-A6 (6 Total)
A2C3
Sense Amplifier
Yes
2 A3A2 4 APR Register
A2C3
Sense Amplifier
Yes
No
A3A1-A6 (6 Total)
A2C4/ C27 A2C28/ C29 A2C30/ C31 A2C34
Yes
A2A4/A27, A37/A60, C4/C27, C37/C60 (4 each Mem - 16 Total) A2A28, A30, A61, A63, C28, C30, C61, C63 (8 each Mem 32 Total) A2A28, A30, A61, A63, C28, C30, C61, C63 (8 each Mem 32 Total) A2A1-A3, A34-A36, C1-C3, C34-C36 (12 each Mem 48 Total) A2A1-A3, A34-A36, C1-C3, C34-C36 (12 each Mem 48 Total) A2A1-A3, A34-A36, C1-C3, C34-C36 (12 each Mem 48 Total) A2A1-A3, A34-A36, C1-C3, C34-C36 (12 each Mem 48 Total) A2A1-A3, A34-A36, C1-C3, C34-C36 (12 each Mem 48 Total) A2A1-A3, A34-A36, C1-C3, C34-C36 (12 each Mem 48 Total) 2
A3A3
APR Register
No
A3A1-A6 (6 Total)
Yes
Inhibit Half Stack
Yes
A3A4
APR Register
No
A3A1-A6 (6 Total)
Sense Amplifier
Yes
A2C34
Sense Amplifier
Yes
A3A5 4
APR Register
No
A3A1-A6 (6 Total)
A2C35
Sense Amplifier
Yes
A3A6
APR Register
No
A3A1-A6 (6 Total)
A2C35
Sense Amplifier
Yes
4 A3A7 APR Control
A2C36
Sense Amplifier
Yes
Yes
A3A7-A10 (4 Total)
A2C36
Sense Amplifier
Yes
4 A3A8 APR Control
Yes
A3A7-A10 (4 Total)
A2C37/ C60 A2C61/ C62 A2C63/ C64
Yes
A2A4/A27, A37/A60, C4/C27, C37/C60 (4 each Mem - 16 Total) A2A28, A30, A61, A63, C28, C30, C61, C63 (8 each Mem 32 Total) A2A28, A30, A61, A63, C28, C30, C61, C63 (8 each Mem 32 Total)
Yes
A3A9
APR Control
Yes
A3A7-A10 (4 Total)
Inhibit Half Stack
Yes
A3A10
APR Control
Yes
A3A7-A10 (4 Total)
4-27
NAVAIR 01-75PAC-12
EQUIPMENT/MODULE/PART DESIGNATOR A3A11 IN-FLIGHT SPARES No EQUIPMENT/MODULE/PART DESIGNATOR A3A21 IN-FLIGHT SPARES No
SUBSYSTEM Central Processor Chassis Assembly (Continued)
NOMENCLATURE Control Logic Module Type 2
FUNCTION B Selector; Sequence Control 2; Format II Input Shift B Selector; Sequence Control 2; Format II Input Shift B Selector; Sequence Control 1 & 2; Format II Input Shift T1/T2 Timing; APR Reg Commands 1; B, P, and Q* Reg Commands; Sequence Control 1; Control Adder Commands; MDS and Jump Control C Translation 3; Memory Control; Console Control Mode & Start Stop; Memory Conflict Detection; P Reg Commands; Control Adder Commands; Repeat Control; MDS Control; Interrupt Control B Selector; Memory Control; Memory Conflict Detection; Repeat Control; MDS Control; Interrupt Control; Memory Address Control; NDRO Memory Control; Control Adder Commands Sequence Control 2; Memory Control; Memory Conflict Detection; B Reg Commands; P Reg Commands; Repeat Control; K Counter/Control; Skip Control; Memory Address Control; NDRO Memory Control Timing 2; Memory Control; Memory Addressing Control; Jump Control; P Ext and R2 Ext Regs Control U Translation 2; Memory Control; Memory Addressing Control; Sequence Control 1; Sequence Holds 1; Skip Control; Interrupt Control; Memory Addressing (OP) B Selector; B Reg Commands; Sequence Control 1; Repeat Control; Modify Y, Adv P Decrement B7
IDENTICAL ITEMS FOR ALTERNATE REPAIRS A3A11-A13 (3 Total)
FUNCTION Timing 1 and 2; Sequence Control 1; R Reg Commands; Control Adder Commands; MDS Control; A & Q Reg Commands; I/O Group Select & I Reg Master Clear; Sequence Holds 1 and 2; Skip Control; U and C Reg Commands; Borrow Collection; C Translation 3; U Reg Bits 18-20; C Reg Bits 18-20 U Translation 2; Memory Conflict Detection; Interrupt Control U Translation 1; C Translation 1; U and C Reg Commands; U Reg Bits 24-26; C Reg Bits 24-26 U Translation 1; C Translation 1; U and C Reg Commands, U Reg Bits 27-29; C Reg Bits 27-29 C Translation 2 Timing 1 and 2; Format II Input Shift; C Translation 3; Skip Control; Memory Addressing Control; Read Selector Control; Subtractor Control Sequence Holds 2; Skip Control; C Translation 3; Jump Control MDS Control; Subtractor Control; Borrow Collection Timing 2; Memory Control; Format II Translation; Console Control Memory; Console Control APR and B Select; Sequence Control 1; Sequence Holds 2; U and C Reg Commands; NDRO Memory Control; K Counter and Control U Reg Bits 16, 17, 23; C Reg Bits 16, 17, 23
A3A12
Control Logic Module Type 2 Control Logic Module Type 2 Control Logic Module Type 15
No
A3A11-A13 (3 Total) A3A22 Control Logic Module Type 12
No
None
A3A13
No
A3A11-A13 (3 Total)
A3A14
No
None A3A23 Control Logic Module Type 8 Control Logic Module Type 5
No
None
A3A24 No A3A15-A17 (3 Total) A3A25
No
A3A24, A25 (2 Total)
A3A15
Control Logic Module Type 13
No
A3A16
No
A3A15-A17 (3 Total)
A3A26 A3A27
Control Logic Module Type 9 Control Logic Module Type 19
No No
None A3A27, B37-B39, C23, C43 (6 Total)
A3A17
No
A3A15-A17 (3 Total)
A3A28
Control Logic Module Type 7 Subtractor Control Control Logic Module Type 14
No
None
A3A29 A3A30
No No
None A3A30, A31 (2 Total)
A3A18
No
None
A3A19
No
None
A3A20
No
None
4-28
NAVAIR 01-75PAC-12
EQUIPMENT/MODULE/PART DESIGNATOR A3A31 IN-FLIGHT SPARES No EQUIPMENT/MODULE/PART DESIGNATOR A3A47 IN-FLIGHT SPARES Yes
FUNCTION Timing 2; Format II Translation, Sequence Control 2; Sequence Holds 2; Memory Control; NDRO Memory Control; U and C Reg Commands; B7=0/B=0; I/O Buffer Control Timing; Memory Bit Gating; U Reg Bits 15, 21, 22; C Reg Bits 15, 21, 22 Special Interrupt Priority, Memory Addressing (I) A* and Q* Reg Commands; A* Reg Bit 0; Q* Reg Bit 28 A and Q Reg Commands; Q* Reg Bit 28 Sequence Control 1; Interrupt Control; Shift Selector; MDS Control Console Control UAQZ Select; Shift Control; K Counter and Control; A and Q Reg Commands Console Control UAQZ Select; Shift Control; K Counter and Control; A* Reg Commands; Q and Q* Reg Commands Memory Control; Shift Selector; Q Reg Commands; B7=0/B=0; Parity; A=0 Memory Control; Shift Selector; A Reg Commands; B7=0/B=0; Parity; Q=0 Q and Q* Reg Commands; Q/Q* Reg Bits 0, 8, 16, 22, 24, 29 Q and Q* Reg Commands; Q/Q* Reg Bits 24-29; Q=0; Z8 Reg Bits 27-29 Q and Q* Reg Commands; Q/Q* Reg Bits 4, 12, 20, 21, 23, 28 Q and Q* Reg Commands; Q/Q* Reg Bits 18-23; Z8 Reg Bits 24-26; Q=0 Q and Q* Reg Commands; Q/Q* Reg Bits 3, 7, 11, 15, 19, 27
IDENTICAL ITEMS FOR ALTERNATE REPAIRS A3A30, A31 (2 Total)
NOMENCLATURE A Registers
FUNCTION Q and Q* Reg Commands; Q/Q* Reg Bits 12-17; Z8 Reg Bits 21-23; Q=0 Q and Q* Reg Commands; Q/Q* Reg Bits 2, 6, 10, 14, 18, 26 Q and Q* Reg Commands; Q/Q* Reg Bits 6-11; Z8 Reg Bits 18-20; Q=0 Q and Q* Reg Commands; Q/Q* Reg Bits 1, 5, 9, 13, 17, 25 Q and Q* Reg Commands; Q/Q* Reg Bits 0-5; Z8 Reg Bits 15-17; Q=0 A and A* Reg Commands; A/A* Reg Bits 0, 8, 16, 22, 24, 29 A and A* Reg Commands; A/A* Reg Bits 24-29; Z8 Reg Bits 12-14; A=0 A and A* Reg Commands; A/A* Reg Bits 4, 12, 20, 21, 23, 28 A and A* Reg Commands; A/A* Reg Bits 18-23; Z8 Reg Bits 9-11; A=0 A and A* Reg Commands; A/A* Reg Bits 3, 7, 11, 15, 19, 27 A and A* Reg Commands; A/A* Reg Bits 12-17; Z8 Reg Bits 6-8; A=0 A and A* Reg Commands; A/A* Reg Bits 2, 6, 10, 14, 18, 26 A and A* Reg Commands; A/A* Reg Bits 6-11; Z8 Reg Bits 3-5; A=0 A and A* Reg Commands; A/A* Reg Bits 1, 5, 9, 13, 17, 25 A and A* Reg Commands; A/A* Reg Bits 0-5; Z8 Reg Bits 0-2; A=0 B Selector; Console Control UAQZ Select; Console Control Memory; NDRO Memory Address Translation; Memory Adressing (I) (OP)
IDENTICAL ITEMS FOR ALTERNATE REPAIRS A3A43, A45, A47, A49, A51, A53, A55, A57, A59, A61 (10 Total) A3A42, A44, A46, A48, A50, A52, A54, A56, A58, A60 (10 Total) A3A43, A45, A47, A49, A51, A53, A55, A57, A59, A61 (10 Total) A3A42, A44, A46, A48, A50, A52, A54, A56, A58, A60 (10 Total) A3A43, A45, A47, A49, A51, A53, A55, A57, A59, A61 (10 Total) A3A42, A44, A46, A48, A50, A52, A54, A56, A58, A60 (10 Total) A3A43, A45, A47, A49, A51, A53, A55, A57, A59, A61 (10 Total) A3A42, A44, A46, A48, A50, A52, A54, A56, A58, A60 (10 Total) A3A43, A45, A47, A49, A51, A53, A55, A57, A59, A61 (10 Total) A3A42, A44, A46, A48, A50, A52, A54, A56, A58, A60 (10 Total) A3A43, A45, A47, A49, A51, A53, A55, A57, A59, A61 (10 Total) A3A42, A44, A46, A48, A50, A52, A54, A56, A58, A60 (10 Total) A3A43, A45, A47, A49, A51, A53, A55, A57, A59, A61 (10 Total) A3A42, A44, A46, A48, A50, A52, A54, A56, A58, A60 (10 Total) A3A43, A45, A47, A49, A51, A53, A55, A57, A59, A61 (10 Total) A3A62, A63 (2 Total)
A3A48
AQ Registers
Yes
A3A49 No No No No None A3A50 None None None A3A51
A Registers
Yes
A3A34 A3A35 A3A36 A3A37
Special Interrupt Priority A*Q* Control A*Q* Control Control Logic Module Type 16 Shift Control
AQ Registers
Yes
A Registers
Yes
A3A52
AQ Registers
Yes
A3A38
No
A3A53
A Registers
Yes
A3A39
Shift Control
No
A3A54
AQ Registers
Yes
A3A55 No A3A40, A41 (2 Total) A3A56 No A3A40, A41 (2 Total) A3A57 Yes A3A42, A44, A46, A48, A50, A52, A54, A56, A58, A60 (10 Total) A3A43, A45, A47, A49, A51, A53, A55, A57, A59, A61 (10 Total) A3A42, A44, A46, A48, A50, A52, A54, A56, A58, A60 (10 Total) A3A43, A45, A47, A49, A51, A53, A55, A57, A59, A61 (10 Total) A3A42, A44, A46, A48, A50, A52, A54, A56, A58, A60 (10 Total)
A Registers
Yes
A3A40
Control Logic Module Type 4 Control Logic Module Type 4 AQ Registers
AQ Registers
Yes
A3A41
A Registers
Yes
A3A42
A3A58
AQ Registers
Yes
A3A43
A Registers
Yes
A3A59
A Registers
Yes
A3A44
AQ Registers
Yes
A3A60
AQ Registers
Yes
A3A45
A Registers
Yes
A3A61
A Registers
Yes
A3A46
AQ Registers
Yes
A3A62
No
4-29
NAVAIR 01-75PAC-12
EQUIPMENT/MODULE/PART DESIGNATOR A3A63 IN-FLIGHT SPARES No
FUNCTION Console Control APR and B Select; Console Control Memory; NDRO Memory Address Translation; Memory Addressing (I) (OP) Console Control Mode and Start Stop; Read Selector Control 2 Master Clear; C Translation 2; Console Control Mode and Start Stop; Sequence Holds 1; Modify Y, Adv P, Decrement B7; Repeat Control; Jump Control; Special Interrupt Priority; MDS Control B, P, and R1 Regs Bit 14; U Upper Bit 29; B7=0/B=0; Control Adder Bits 10-14 B, P, and R1 Regs Bit 13; U Upper Bit 28; B7=0/B=0; Control Adder Bits 10-14; Memory Addressing (I) R Reg Commands; R2 Reg Bits 10-14; Control Adder Bits 10-14; Memory Addressing (OP) U and C Reg Commands; Control Adder Bits 10-14; U Lower Reg Bits 10-14 B, P, and R1 Regs Bit 12; Control Adder Bits 10-14; U Upper Bit 27; B7=0/B=0; Memory Addressing (I) B, P, and R1 Regs Bit 11; Control Adder Bits 10-14; U Upper Bit 26; B7=0/B=0; Memory Addressing (I) B, P, and R1 Regs Bit 10; Control Adder Bits 10-14; U Upper Bit 25; B7=0/B=0; Memory Addressing (I) B, P, and R1 Regs Bit 9; Control Adder Bits 5-9; U Upper Bit 24; B7=0/B=0; Memory Addressing (I) B, P, and R1 Regs Bit 8; Control Adder Bits 5-9; U Upper Bit 23; B7=0/B=0; Memory Addressing (I) R Reg Commands; Control Adder Bits 5-9; Memory Addressing (OP)
IDENTICAL ITEMS FOR ALTERNATE REPAIRS A3A62, A63 (2 Total)
EQUIPMENT/MODULE/PART DESIGNATOR A3B12 IN-FLIGHT SPARES No
NOMENCLATURE UL Control Adder
FUNCTION U and C Reg Commands; Control Adder Bits 5-9; U Lower Reg Bits 5-9 B, P, and R1 Regs Bit 7; Control Adder Bits 5-9; U Upper Reg Bit 22; Memory Addressing (I); B7=0/B=0 B, P, and R1 Regs Bit 6; Control Adder Bits 5-9; U Upper Reg Bit 21; Memory Addressing (I); B7=0/B=0 B, P, and R1 Regs Bit 5; Control Adder Bits 5-9; U Upper Reg Bit 20; Memory Addressing (I); B7=0/B=0 B, P, and R1 Regs Bit 4; Control Adder Bits 0-4; U Upper Reg Bit 19; Memory Addressing (I); B7=0/B=0 B, P, and R1 Regs Bit 3; Control Adder Bits 0-4; U Upper Reg Bit 18; Memory Addressing (I); B7=0/B=0 R Reg Commands; Control Adder Bits 0-4; Memory Addressing (OP) U and C Reg Commands; Control Adder Bits 0-4; U Lower Reg Bits 0-4 B, P, and R1 Regs Bit 2; Control Adder Bits 0-4; U Upper Reg Bit 17; Memory Addressing (I); B7=0/B=0 B, P, and R1 Regs Bit 1; Control Adder Bits 0-4; U Upper Reg Bit 16; Memory Addressing (I); B7=0/B=0 B, P, and R1 Regs Bit 0; Control Adder Bits 0-4; U Upper Reg Bit 15; Memory Addressing (I); B7=0/B=0 B Reg Commands; B Selector; Format II Translation; C Translation 1 and 3; Sequence Control 1; NDRO Memory Control; Shift Selector; Memory Addressing (OP); Memory Bit Gating; K Counter and Control
IDENTICAL ITEMS FOR ALTERNATE REPAIRS A3B5, B12, B19 (3 Total)
A3A64
Control Mode Start Stop Thermostat
No
None
A3B13
P-B-R1-UU
Yes
A3B2, B3, B6-B10, B13-B17, B20-B22 (15 Total)
A3B1
No
None
A3B14
P-B-R1-UU
Yes
A3B2, B3, B6-B10, B13-B17, B20-B22 (15 Total)
A3B15
P-B-R1-UU
Yes
A3B2, B3, B6-B10, B13-B17, B20-B22 (15 Total)
A3B2
P-B-R1-UU
Yes
A3B2, B3, B6-B10, B13-B17, B20-B22 (15 Total) A3B2, B3, B6-B10, B13-B17, B20-B22 (15 Total)
A3B16
P-B-R1-UU
Yes
A3B2, B3, B6-B10, B13-B17, B20-B22 (15 Total)
A3B3
P-B-R1-UU
Yes
A3B17 No A3B4, B11, B18 (3 Total) A3B18 No A3B5, B12, B19 (3 Total) A3B19 Yes A3B2, B3, B6-B10, B13-B17, B20-B22 (15 Total)
P-B-R1-UU
Yes
A3B2, B3, B6-B10, B13-B17, B20-B22 (15 Total)
A3B4
R2 Control Adder
R2 Control Adder
No
A3B4, B11, B18 (3 Total)
A3B5
UL Control Adder
UL Control Adder
No
A3B5, B12, B19 (3 Total)
A3B6
P-B-R1-UU
A3B20
P-B-R1-UU
Yes
A3B2, B3, B6-B10, B13-B17, B20-B22 (15 Total)
A3B7
P-B-R1-UU
Yes
A3B2, B3, B6-B10, B13-B17, B20-B22 (15 Total)
A3B21
P-B-R1-UU
Yes
A3B2, B3, B6-B10, B13-B17, B20-B22 (15 Total)
A3B8
P-B-R1-UU
Yes
A3B2, B3, B6-B10, B13-B17, B20-B22 (15 Total)
A3B22
P-B-R1-UU
Yes
A3B2, B3, B6-B10, B13-B17, B20-B22 (15 Total)
A3B9
P-B-R1-UU
Yes
A3B2, B3, B6-B10, B13-B17, B20-B22 (15 Total)
A3B23
Yes
A3B23-B27, B36, C21, C22, C42, C44 (10 Total)
A3B10
P-B-R1-UU
Yes
A3B2, B3, B6-B10, B13-B17, B20-B22 (15 Total)
A3B11
R2 Control Adder
No
A3B4, B11, B18 (3 Total)
4-30
NAVAIR 01-75PAC-12
EQUIPMENT/MODULE/PART DESIGNATOR A3B24 IN-FLIGHT SPARES Yes
FUNCTION B Reg Commands; Sequence Control 2; P Reg Commands; Shift Control; C Translation 3; Sequence Holds 2; Skip Control; Memory Address Control; NDRO Memory Address Translation; Write Selector Control B Reg Commands; B Selector; C Translation 2 and 3; R Reg Commands; MDS Control; Console Control Mode and Start Stop; I/O Buffer Control Timing; Console Control Memory; Memory Addressing (I); Interrupt Control; Shift Selector B Reg Commands; B Selector; C Translation 1 and 3; U and C Regs Commands; Subtractor Control; K Counter and Control; Shift Selector; Console Control Mode and Start Stop; Sequence Holds 1; Interrupt Control; Memory Enable (Inst) (OP); NDRO Memory Address Translation B Reg Commands; B Selector; Console Control Mode and Start Stop; Write Selector Control; Special Interrupt Priority; Control Adder Bits 0-4; Memory Address Control; Memory Control; Memory Bit Gating; MDS Control; Memory Addressing (OP); K Counter and Control Timing 2; Sequence Control 1; Console Control UAQZ Select; Borrow Collection Timing 2; Memory Enable (I/O); Borrow Collection Timing 1; Memory Enable (OP); Borrow Collection Timing 1; Memory Enable (I); Borrow Collection Master Clock
IDENTICAL ITEMS FOR ALTERNATE REPAIRS A3B23-B27, B36, C21, C22, C42, C44 (10 Total)
EQUIPMENT/MODULE/PART DESIGNATOR A3B36 IN-FLIGHT SPARES Yes
FUNCTION B Reg Commands; Sequence Holds 2; Format II Translation; Skip Control; Jump Control; Control Adder Commands; U and C Reg Commands; MDS Control; Read Selector Control 1; Borrow Collection; Memory Bit Gating; I/O Buffer Control Timing; Address Selector Sequence 1 C Translation 3; Read Selector Control 1; Console Control Mode and Start Stop; MDS Control; Subtractor Control; A Reg Commands; I/O Group Select and I Reg; Memory Addressing (I); Q Reg Commands Master Clear; B Selector; Skip Control; Interrupt Control; Read Selector Control 1; I/O Group Select and I Reg; Memory Addressing (I); Complement Select Control; Write Selector Control; Subtractor Control; Console Control UAQZ Select; U and C Reg Commands Sequence Holds 2; B Selector; Repeat Control; Mem- ory Address Control; NDRO Memory Control; MDS Control; Read Selector Control 1 and 2; I/O Memory Commands Generator; Memory Addressing (OP); Subtractor = 0 C Translation 2; Read Selector Control 1 and 2; Complement Select Control Complement Select Control; Write Selector Control X Reg Bits 27-29; Subtractor Bits 27-29; Read/Write Selector Bits 27-29 Read Selector Control 1 and 2; Write Selector Control; Complement Select Control; Read/Write Selector Bits 12-14 and 27-29 X Reg Bits 12-14; Subtractor Bits 12-14; Read/Write Selector Bits 12-14
A3B25
Yes
A3B23-B27, B36, C21, C22, C42, C44 (10 Total)
A3B37
No
A3A27, B37-B39, C23, C43 (6 Total)
A3B26
Yes
A3B23-B27, B36, C21, C22, C42, C44 (10 Total)
A3B38
No
A3A27, B37-B39, C23, C43 (6 Total)
A3B39 Yes A3B23-B27, B36, C21, C22, C42, C44 (10 Total)
A3B27
No
A3A27, B37-B39, C23, C43 (6 Total)
A3B40
Read Selector Control
No
None
A3B41 Yes A3B28-B31 (4 Total) A3B42 Yes Yes Yes No A3B28-B31 (4 Total) A3B28-B31 (4 Total) A3B28-B31 (4 Total) None A3B44
A3B28
Complements Write Select Control X Register Subtractor
No Yes
None A3B42, B44, B45, B47, B48, B50, B51, B53, B54, B56 (10 Total) A3B43, B46, B49, B52, B55 (5 Total)
A3B29 A3B30 A3B31 A3B34/ B35
Control Logic Module Type 1 Control Logic Module Type 1 Control Logic Module Type 1 2 Phase Clock
A3B43
Read Write Selectors
Yes
X Register Subtractor
Yes
A3B42, B44, B45, B47, B48, B50, B51, B53, B54, B56 (10 Total)
4-31
NAVAIR 01-75PAC-12
EQUIPMENT/MODULE/PART DESIGNATOR A3B45 IN-FLIGHT SPARES Yes EQUIPMENT/MODULE/PART DESIGNATOR A3B58 IN-FLIGHT SPARES No
NOMENCLATURE X Register Subtractor
FUNCTION X Reg Bits 24-26; Subtractor Bits 24-26; Read/Write Selector Bits 24-26 Read Selector Control 1 and 2; Complement Select Control; Write Selector Control; Read/Write Selector Bits 9-11 and 24-26 X Reg Bits 9-11; Subtractor Bits 9-11; Read/Write Selector Bits 9-11 X Reg Bits 21-23; Subtractor Bits 21-23; Read/Write Selector Bits 21-23 Read Selector Control 1 and 2; Complement Select Control; Write Selector Control; Read/Write Selector Bits 6-8 and 21-23 X Reg Bits 6-8; Subtractor Bits 6-8; Read/Write Selector Bits 6-8 X Reg Bits 18-20; Subtractor Bits 18-20; Read/Write Selector Bits 18-20 Read Selector Control 1 and 2; Complement Select Control; Write Selector Control; Read/Write Selector Bits 3-5 and 18-20 X Reg Bits 3-5; Subtractor Bits 3-5; Read/Write Selector Bits 3-5 X Reg Bits 15-17; Subtractor Bits 15-17; Read/Write Selector Bits 15-17 Read Selector Control 1 and 2; Complement Select Control; Write Selector Control; Read/Write Selector Bits 0-2 and 15-17 X Reg Bits 0-2; Subtractor Bits 0-2; Read/Write Selector Bits 0-2 Interrupt Control; APR Reg Commands 1; B Selector; Format II Translation; Sequence Control 2; Modify Y, Adv P, Decrement B7; Repeat Control; Jump Control; Special Interrupt Priority
IDENTICAL ITEMS FOR ALTERNATE REPAIRS A3B42, B44, B45, B47, B48, B50, B51, B53, B54, B56 (10 Total) A3B43, B46, B49, B52, B55 (5 Total)
NOMENCLATURE Current Switch
FUNCTION Current Switch
A3B46
Yes
A3B59 A3B60-64
Selection Matrix NDRO Memory
Selection Matrix Rope Memory Rope Memory Module Sel Matrix Rope Mem Current Switch, Rope Data Bit 00-29 ROM Memory Module None Adds Additional Wiring Capability None Active-Monitor Reg Group 3 Chan 15 Active-Monitor Reg Group 3 Chan 14 Active-Monitor Reg Group 3 Chan 13 Active-Monitor Reg Group 3 Chan 12 Active-Monitor Reg Group 2 Chan 11 Active-Monitor Reg Group 2 Chan 10 Active-Monitor Reg Group 2 Chan 9 Active-Monitor Reg Group 2 Chan 8 Active-Monitor Reg Group 1 Chan 7 Active-Monitor Reg Group 1 Chan 6 Active-Monitor Reg Group 1 Chan 5 Active-Monitor Reg Group 1 Chan 4 Active-Monitor Reg Group 0 Chan 3 Active-Monitor Reg Group 0 Chan 2 Active-Monitor Reg Group 0 Chan 1
No No
None None 1
A3B47
Yes
A3B42, B44, B45, B47, B48, B50, B51, B53, B54, B56 (10 Total) A3B42, B44, B45, B47, B48, B50, B51, B53, B54, B56 (10 Total) A3B43, B46, B49, B52, B55 (5 Total)
A3B58/59 A3B60 A3B61/ B62/B63 A3B64 A3C1 A3C2
Multiple Circuit Card None Installed Interconnection Module None installed Active Register, Monitor Register Active Register, Monitor Register Active Register, Monitor Register Active Register, Monitor Register Active Register, Monitor Register Active Register, Monitor Register Active Register, Monitor Register Active Register, Monitor Register Active Register, Monitor Register Active Register, Monitor Register Active Register, Monitor Register Active Register, Monitor Register Active Register, Monitor Register Active Register, Monitor Register Active Register, Monitor Register
No
None 4 None 4
A3B48
Yes
No
A3B49
Yes
Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes
A3C1-C16 (16 Total) A3C1-C16 (16 Total) A3C1-C16 (16 Total) A3C1-C16 (16 Total) A3C1-C16 (16 Total) A3C1-C16 (16 Total) A3C1-C16 (16 Total) A3C1-C16 (16 Total) A3C1-C16 (16 Total) A3C1-C16 (16 Total) A3C1-C16 (16 Total) A3C1-C16 (16 Total) A3C1-C16 (16 Total) A3C1-C16 (16 Total) A3C1-C16 (16 Total)
A3B50
Yes
A3C3 A3C4 A3C5 A3C6 A3C7 A3C8 A3C9 A3C10 A3C11
A3B51
Yes
A3B52
Yes
A3B53
Yes
A3B54
Yes
A3B55
Yes
A3B56
Yes
A3B42, B44, B45, B47, B48, B50, B51, B53, B54, B56 (10 Total) None
A3C12 A3C13 A3C14 A3C15
A3B57
Thermostat, Rear
No
4-32
NAVAIR 01-75PAC-12
EQUIPMENT/MODULE/PART SUBSYSTEM Central Processor Chassis Assembly (Continued) DESIGNATOR A3C16 NOMENCLATURE Active Register, Monitor Register FUNCTION Active-Monitor Reg Group 0 Chan 0 IN-FLIGHT SPARES Yes EQUIPMENT/MODULE/PART SUBSYSTEM Central Processor Chassis Assembly (Continued) DESIGNATOR A3C29 NOMENCLATURE 1 Shots, Sync Reg Data Registers FUNCTION 1 Shot and Sync Reg Group 2 Chan 10 IN-FLIGHT SPARES Yes
IDENTICAL ITEMS FOR ALTERNATE REPAIRS A3C1-C16 (16 Total)
IDENTICAL ITEMS FOR ALTERNATE REPAIRS A3C24 - C31, C34 - C41 (16 Total)
A3C17 A3C18
I/O Functional Code Translation I/O Command Generator
I/O Function Code Translation I/O Buffer Control Timing; I/O Group Select and I Reg; I/O Memory Commands Generator I/O Sequence Control Monitor Priority and Sequencing B Selector; Format II Input Shift; Format II Translation; U Translation 2; Console Control UAQZ Select; Sequence Holds 1; Skip Control; Jump Control; Read Selector Control 1 and 2; I/O Buffer Control Timing; I/O Memory Commands Generator; Memory Addressing Control; MDS Control C Translation 1; Console Control Memory; P Ext Reg Control; R2 Ext Reg Control; Control Adder Commands; Write Selector Control; Subtractor Control; A and A* Reg Commands; I/O Memory Commands Generator; Address Selector Sequence 2 and 3 B Selector; Console Control UAQZ Select; U and G Reg Commands; K Counter and Control; Read Selector Control 1 and 2; Write Selector Control; Subtractor Control; C Translation 3; Subtractor = 0 1 Shot and Sync Reg Group 3 Chan 15 1 Shot and Sync Reg Group 3 Chan 14 1 Shot and Sync Reg Group 3 Chan 13 1 Shot and Sync Reg Group 3 Chan 12 1 Shot and Sync Reg Group 2 Chan 11
No No
None None
A3C30 A3C31 A3C34
1 Shots, Sync Reg Data Registers 1 Shots, Sync Reg Data Registers 1 Shots, Sync Reg Data Registers 1 Shots, Sync Reg Data Registers 1 Shots, Sync Reg Data Registers 1 Shots, Sync Reg Data Registers 1 Shots, Sync Reg Data Registers 1 Shots, Sync Reg Data Registers 1 Shots, Sync Reg Data Registers 1 Shots, Sync Reg Data Registers Control Logic Module Type 18
1 Shot and Sync Reg Group 2 Chan 9 1 Shot and Sync Reg Group 2 Chan 8 1 Shot and Sync Reg Group 1 Chan 7 1 Shot and Sync Reg Group 1 Chan 6 1 Shot and Sync Reg Group 1 Chan 5 1 Shot and Sync Reg Group 1 Chan 4 1 Shot and Sync Reg Group 0 Chan 3 1 Shot and Sync Reg Group 0 Chan 2 1 Shot and Sync Reg Group 0 Chan 1 1 Shot and Sync Reg Group 0 Chan 0 P Reg Commands; Timing 2; Format II Translation; Console Control Mode and Start Stop; Sequence Control 1; Repeat Control; Jump Control; Interrupt Control; Control Adder Commands; U and C Reg Commands; Shift Selector; Read Selector Control 1; Write Selector Control; A Reg Commands Format II Input Shift; Complement Selector Control; C Translation 3; U and C Reg Commands; Console Control Mode and Start Stop; Shift Control; Subtractor Control; Console Control Memory; Read Selector Control 2; A and Q Reg Commands; Sequence Control 1; Interrupt Control; Memory Address Control; Write Selector Control
Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes
A3C24 - C31, C34 - C41 (16 Total) A3C24 - C31, C34 - C41 (16 Total) A3C24 - C31, C34 - C41 (16 Total) A3C24 - C31, C34 - C41 (16 Total) A3C24 - C31, C34 - C41 (16 Total) A3C24 - C31, C34 - C41 (16 Total) A3C24 - C31, C34 - C41 (16 Total) A3C24 - C31, C34 - C41 (16 Total) A3C24 - C31, C34 - C41 (16 Total) A3C24 - C31, C34 - C41 (16 Total) A3B23-B27, B36, C21, C22, C42, C44 (10 Total)
A3C19 A3C20 A3C21
I/O Sequence Control Monitor Priority Sequencing Control Logic Module Type 18
No No Yes
None None A3B23-B27, B36, C21, C22, C42, C44 (10 Total)
A3C35 A3C36 A3C37 A3C38 A3C39 A3C40
A3C22
Yes
A3B23-B27, B36, C21, C22, C42, C44 (10 Total)
A3C41 A3C42
A3C23
No
A3A27, B37-B39, C23, C43 (6 Total)
A3C43 Yes Yes Yes Yes Yes A3C24 - C31, C34 - C41 (16 Total) A3C24 - C31, C34 - C41 (16 Total) A3C24 - C31, C34 - C41 (16 Total) A3C24 - C31, C34 - C41 (16 Total) A3C24 - C31, C34 - C41 (16 Total)
No
A3A27, B37-B39, C23, C43 (6 Total)
A3C24 A3C25 A3C26 A3C27 A3C28
1 Shots, Sync Reg Data Registers 1 Shots, Sync Reg Data Registers 1 Shots, Sync Reg Data Registers 1 Shots, Sync Reg Data Registers 1 Shots, Sync Reg Data Registers
4-33
NAVAIR 01-75PAC-12
EQUIPMENT/MODULE/PART SUBSYSTEM Central Processor Chassis Assembly (Continued) DESIGNATOR A3C44 NOMENCLATURE Central Logic Module Type 18 FUNCTION B Reg Commands; C Translation 3; Sequence Holds 1 and 2; Repeat Control;.Control Adder Commands; U and C Reg Commands; Shift Selector; K Counter and Control; Read Selector Control 1 ; Memory Bit Gating Buffer Priority I/O Interrupt Control Interrupt and Translation Reg 3 (Group) Interrupt and Translation Reg 2 (Channel) Interrupt and Translation Reg 1 (Function) Address Select Sequence 3 Address Select Sequence 2 Address Select Sequence 1 I Reg, +1 Adder, U=L Compare Bits 12-14 and 27-29 I Reg, +1 Adder, U=L Compare Bits 9-11 and 24-26 I Reg, +1 Adder, U=L Compare Bits 6-8 and 21-23 I Reg, +1 Adder, U=L Compare Bits 3-5 and 18-20 I Reg, +1 Adder, U=L Compare Bits 0-2 and 15-17 Address and Data Selector 3 Address and Data Selector 2 Address and Data Selector 1 Acknowledge Timing Group 3 Acknowledge Timing Group 2 Acknowledge Timing Group 1 Acknowledge Timing Group 0 Memory Unit No. 1 IN-FLIGHT SPARES Yes EQUIPMENT/MODULE/PART SUBSYSTEM Memory Chassis Assembly Unit 0 DESIGNATOR A5 NOMENCLATURE Memory Chassis Assembly Modules identical to modules in A2, A4, A6 Memory Chassis Assembly Modules identical to modules in A2, A4, A5 Power Supply Assembly FUNCTION Memory Unit No. 1 IN-FLIGHT SPARES No
IDENTICAL ITEMS FOR ALTERNATE REPAIRS A2, A4, A6
See A2 Breakdown Memory Chassis Assembly Unit 3 A6
Functions identical to functions listed in A2 Memory Unit No. 3
See A2 Section No
See A2 Section
A2, A4, A5
A3C45 A3C46 A3C47 A3C48 A3C49 A3C50 A3C51 A3C52 A3C53
Buffer Priority Interrupt Control Interrupt and Transfer Reg Interrupt and Transfer Reg Interrupt and Transfer Reg Address Selector Sequencer Address Selector Sequencer Address Selector Sequencer I Register
No No No No No No No No No
None None A3C47 - C49 (3 Total) A3C47 - C49 (3 Total) A3C47 - C49 (3 Total)
See A2 Breakdown Power Supply Assembly A7
Functions identical to functions listed in A2 Converts 400 Hz AC to DC for computer unit. Detects transit interrupt and restarts computer Internal Power and Power Monitor Internal Power Supply Channel 1 Internal Power Supply Channel 2 Over Voltage/Current Detector, Channel 1 Over Voltage/Current Detector, Channel 2 Pulse DC Filter and Power Converter, Channel 1 Pulse DC Filter and Power Converter, Channel 2 Houses and Interconnects Computer Modules Provide Maintenance Functions Square Wave Oscillator Clock 1 and 2 Pulses Mode Control Power Isolation and Control
See A2 Section No
See A2 Section
None
A7A1 A3C50 - C52 (3 Total) A7A2 A3C50 - C52 (3 Total) A3C50 - C52 (3 Total) None A7A3
Circuit Card Assembly Power Interrupt DET Output Module Assembly Left Side (No. 1) Output Module Assembly Right Side (No. 2) Card Module Assembly Card Module Assembly Filter Module Assembly Filter Module Assembly Wired Frame Assembly Computer Maintenance Console Circuit Card Assembly Oscillator Control Module Isolation Power Transformer
No No
None None
No
None
A7A4 A7A5 A7A6
No No No No No No No No No
A7A5 A7A4 A7A7 A7A6 None None None None None
A3C54
I Register, Adder Reg R & 8 Adder Compare I Register, Adder Reg R & 8 Adder Compare I Register, Adder Reg R & 8 Adder Compare I Register, Adder Reg R & 8 Adder Compare Address Data Selector Address Data Selector Address Data Selector Ack Timing & Intercomper Timing Out Ack Timing & Intercomper Timing Out Ack Timing & Intercomper Timing Out Ack Timing & Intercomper Timing Out Memory Chassis Assembly Modules identical to modules in A2, A5, A6
Yes
A3C54 - C57 (4 Total)
A3C55 A3C56 A3C57 A3C58 A3C59 A3C60 A3C61 A3C62 A3C63 A3C64 Memory Chassis Assembly Unit 1 A4
Yes Yes Yes No No No No No No No No
A3C54 - C57 (4 Total) A7A7 A3C54 - C57 (4 Total) A3C54 - C57 (4 Total) A3C58 - C60 (3 Total) A3C58 - C60 (3 Total) A3C58 - C60 (3 Total) A3C61 - C64 (4 Total) A3C61 - C64 (4 Total) A3C61 - C64 (4 Total) A3C61 - C64 (4 Total) A2, A5, A6 1 2 3 4 Isolation Transformer Wired Frame Assembly Maintenance Console A8 A9 A9A3 A9A5 A10
NOTE Spare modules are provided for in-flight maintenance of subsystems whose failure would result in mission abort. Yes in the in-flight spares column indicates a spare is available in the in-flight maintenance kit. No indicates that no spare is available. Used on BUNO 156507 through 158927 and 158929 through 159329 Used on BUNO 156507 through 158927 and 158929 through 159506 Used on BUNO 158928, 159503 and subsequent Used on BUNO 159507 and subsequent
See A2 Breakdown
Functions identical to functions listed in A2
See A2 Section
See A2 Section
4-34
SECTION 4A
CENTRAL COMPUTER
SECTION 4A CENTRAL COMPUTER
NAVAIR 01-75PAC-12
NAVCOM KEYSET PILOT KEYSET AC SWITCH INPUTS AC DIFFERENTIAL INPUTS
1 HSI/ EHSI 2 4
A
MMIS
DIGITAL MAGNETIC TAPE/RDSS
ARINC 575 I/F
NOTE
1 2
AIRCRAFT NOT INCORPORATING AFC 603. AIRCRAFT INCORPORATING AFC 603.
3 4
AIRCRAFT INCORPORATING AFC 705 AIRCRAFT NOT INCORPORATING AFC 705
Figure 4A-1.
Central Computer Simplified Block Diagram
Change 10
4A-1
NAVAIR 01-75PAC-12
(RACK D2)
(SS 3)
10093201 DIGITAL TO DIGITAL CONVERTER (SEE NAVAIR 01-75PAC- -5) -12-
J1
16
J2
MMIS DATA AND CONTROL
(RACK D2)
17 NOTE: FOR ICB1 INTERCONNECT WIRING REFER TO TABLE 1. 17

MMIS DATA AND CONTROL J33
J13
17 K
SEE DETAIL A AND B

L (SHEET 3)
B A
NAVIGATION INTERCONNECTION BOX (NAV INTERCONNECTION BOX)
(SEE SECTION 5)
(SEE SECTION 5) N O
4A-2
Change 10
Figure 4A-2.
Central Computer Signal Flow Diagram (Sheet 1 of 4)
NAVAIR 01-75PAC-12
(RACK D3) C10553A/ASH33 DIGITAL MAGNETIC TAPE CONTROL (DMTC) OR REPLACEMENT DATA STORAGE SYSTEM (RDSS) (SEE SECTION 9 or 9C)
(RACK B3)
(RACK D3)
CP1808/USQ78(V) DISPLAY COMPUTER UNIT (DCU) (SEE NAVAIR 0175PAC128)
TJ102-1 (RACK H1/H2)
20 17
INERTIAL NAVIGATION UNIT 1 (INU1)
20
INERTIAL NAVIGATION UNIT 2 (INU2)
17
SEE DETAIL A AND B

(SHEET 3)
NAVIGATION INTERCONNECTION BOX (NAV INTERCONNECTION BOX) (SEE NAVAIR 0175PAC121)
SHEET 1
APS137 OUTPUT
Figure 4A-2.
Change 10 Change 12
4A-3
NAVAIR 01-75PAC-12
J13
ARINC 575 I/F
TJ102-3 (RACK H1/H2) TJ102-1 (RACK H1/H2)
J1B
20 16
J2B
TJ102-4 (RACK H1/H2) ARINC 575 I/F
J1B
20
J2B
16
18
DETAIL A
J13
ARINC 575 I/F
TJ102-4 (RACK H1/H2) TJ102-1 (RACK H1/H2)
J1B
20
J2B
COAXIAL T NAVIGATION INTERCONNECTION BOX (NAV INTERCONNECTION BOX)
TJ102-3 (RACK H1/H2) ARINC 575 I/F
J1B
20
J2B
16
19
DETAIL B
(RACK C3) CV 3942/APS 137 SIGNAL DATA CONVERTER (SDC)
(SEE NAVAIR 01PAC125) 6J3A 3J56
VIDEO SYNC
4A-4
Change 10 Change 12
Figure 4A-2.
NAVAIR 01-75PAC-12 Table 1. Interconnect Box 1, J49959/ASQ-212 (Cable Assemblies/Wiring, Internal)
NOTE
DELETED AIRCRAFT BUNO 159503 THROUGH 161131 WITH AFC 450 INCORPORATED, AND AIRCRAFT BUNO 161132 AND SUBSEQUENT. AIRCRAFT BUNO 156507 THROUGH 158927 AND 158929 THROUGH 159329 WITH AFC 470 INCORPORATED. AIRCRAFT INCORPORATING AFC 470. AIRCRAFT WITH AFC 450 AND AFC 506 INCORPORATED AIRCRAFT INSTALLATION DEPENDENT FOR AN/APS-137 ISAR. AIRCRAFT BUNO 158928 THROUGH 160289 WITH AFC 450 AND AFC 506 INCORPORATED. AIRCRAFT BUNO 161762 AND SUBSEQUENT WITH AFC 506 INCORPORATED. AIRCRAFT WITH AFC 450 AND AFC 506 INCORPORATED AND AN/APS-137 ISAR INSTALLED.
16 17
FROM J5 J7 J8 J9 J11 J16 J17 J18 J19 J20 J21 J22 J23 J24 J25 J30 J31 J32 J33 J53 J54 J55 J56 J57 J58 J59 J60 J61 J62 J63 J64 J65 J66
CABLE ASSY W504 W501 W501 W503 W505 W506 W502 W502 W502 W502 W502 W502 W502 W502 W502 W502 W502 W502 W502 W502 W502 W501 W506 W504 W505 W502 W502 W503 W503 W502 W502 HARD WIRED W502
CABLE FUNCTION ANEW 4 (OUTPUT, TTY & HSP) ARD Interface ARD Interface ANEW 4 (OUTPUT, APS-115) ANEW 3 (OUTPUT, IRDS MES/AC 3 MES/AC 2/3 MES/AC 2/3 MES/AC 3 MES/AC 2 MES/AC 2 MES/AC 1 MES/AC 2 MES/AC 2 MES/AC 1 MES/AC 1 MES/AC 1 MES/AC 1 MES/AC 1 (OUT) MES/AC 1 (IN) ARD Interface ANEW 3 (INPUT, ESM) ANEW 4 (OUTPUT, TTY & HSP) ANEW 3 (OUTPUT, IRDS MES/AC 2 (OUT) MES/AC 2 (IN) ANEW 4 (OUTPUT, APS-115) ANEW 4 (OUTPUT, APS-115) MES/AC 3 (OUT) MES/AC 3 (IN) TEST ARD 12 VDC
16 16
TO J57 J55 J55 J61 ) J58 J56 J63, J64 J60, J64 J59, J63 J63 J59, J60 J59, J60 J53, J54 J59, J60 J59, J60 J53, J54 J53 J53 J53, J54 & J66 (12 VDC) J23, J30, J31, J32 & J33 J23, J30, J33 J7, J8 & S1 J16 J5 J11 J19, J21, J22, J24 & J25 J18, J21, J22, J24 & J25 J9, J62 J61 J17, J19 & J20 J17 & J18 S2 J33 )
DELETED
ANEW 3 (INPUT, ESM)
AIRCRAFT BUNO 161122, 161132 AND SUBSEQUENT. AIRCRAFT BUNO 156507 THROUGH 158927 AND 158929 THROUGH 159329. AIRCRAFT BUNO 158928 AND 159503 AND SUBSEQUENT. AIRCRAFT BUNO 156507 THROUGH 158927 AND 158929 THROUGH 159329 INCORPORATING AFC 450, AIRCRAFT BUNO 161762 THROUGH 162318 INCORPORATING AFC 477 AND 162770 AND SUBSEQUENT. AIRCRAFT BUNO 156507 THROUGH 156513 AND 156515 THROUGH 156530. AIRCRAFT BUNO 156514, 157310 AND SUBSEQUENT.
AIRCRAFT INCORPORATING AFC 705 AIRCRAFT NOT INCORPORATING AFC 705 AIRCRAFT INCORPORATING AFC 705 EXCEPT BUNO 156515 AIRCRAFT BUNO 156515 INCORPORATING AFC 705 AIRCRAFT INCORPORATING AFC 719
18 19 20
NOTE
For detailed wiring information, refer to NAVAIR 16-30ASQ212-1.
Figure 4A-2.
Change 10 Change 12
4A-5
NAVAIR 01-75PAC-12
7 7
4A-6
Change 10
Figure 4A-3.
Central Computer Functional Signal Flow Diagram (Sheet 1 of 3)
NAVAIR 01-75PAC-12
(CONT)
(SS 3) 10093201 DIGITAL TO DIGITAL CONVERTER
J2 J1 6
MMIS DATA AND CONTROL MMIS DATA AND CONTROL J33
INU 1 AND 2 J13 6
NOTE
6 7
12 VDC OUTPUT AND RTN
Figure 4A-3.
Change 10
4A-7
NAVAIR 01-75PAC-12
(CONT)
DMTC OR RDSS
RADAR TRIGGER
4B0303
4A-8
Figure 4A-3.
NAVAIR 01-75PAC-12
IRDS INTERCONNECTION BOX
11
Figure 4A-4.
Central Computer Power Distribution Functional Signal Flow Diagram (Sheet 1 of 3)
Change 10
4A-9
NAVAIR 01-75PAC-12
(RACK D2)
J6
4B0402
4A-10
Figure 4A-4.
NAVAIR 01-75PAC-12
(RACK D2)
(CONT)
11
AIRCRAFT NOT INCORPORATING AFC 705.
Figure 4A-4.
Change 10
4A-11
NAVAIR 01-75PAC-12
(SEE NAVAIR 0175PAC121)
28 VDC
4B0501
4A-12
Change 3
Figure 4A-5.
SDC Interface Connector Plate and Barometric Altimeter Signal Flow Diagram (Sheet 1 of 2)
NAVAIR 01-75PAC-12
(PILOT INSTRUMENT PANEL) ID1540/A HORIZONTAL SITUATION INDICATOR (HSI) OR ID2551/AYN ELECTRONIC HORIZONTAL SITUATION INDICATOR (EHSI) 8
ID1540/A HORIZONTAL SITUATION INDICATOR (HSI) OR ID2551/AYN ELECTRONIC HORIZONTAL SITUATION INDICATOR (EHSI) 8
(RACK B1) NAVIGATION INTERCONNECTION BOX (NAV INTERCONNECTION 1J10 BOX)
(SEE NAVAIR 0175PAC121)
NOTE
DELETED ID1540/A HORIZONTAL SITUATION INDICATOR (HSI) OR ID2551/AYN ELECTRONIC HORIZONTAL SITUATION INDICATOR (EHSI) 8
8 9
Figure 4A-5.
SDC Interface Connector Plate and Barometric Altimeter Signal Flow Diagram (Sheet 2 of 2)
Change 10
4A-13
NAVAIR 01-75PAC-12
(RACK H1)
4A-14
Change 10
Figure 4A-6.
SDC Interface Connector Plate and Barometric Altimeter Functional Signal Flow Diagram (Sheet 1 of 2)
NAVAIR 01-75PAC-12
(NAVCOM STA)
NOTE
AIRCRAFT NOT INCORPORATING AFC 705.
Figure 4A-6.
SDC Interface Connector Plate and Barometric Altimeter Functional Signal Flow Diagram (Sheet 2 of 2)
Change 10
4A-15
NAVAIR 01-75PAC-12
NO. 1 2 3
SWITCH/INDICATOR POWER
TYPE Toggle Switch (Momentary) Indicator
POSITION ON-CENTEROFF N/A Momentary
FUNCTION Powers the CP-2044 computer on and off. Momentary ON and OFF positions. Center position has no connection. Illuminates when computer power is on (Green). Illuminates all indicators on the MP when in the ON position (Depressed). Illuminates computer overtemperature condition at 65_C (+7_). (Amber) Illuminates built-in test failure in the computer system (Red). Illuminates power supply failure (Amber). Purges (clears) bubble (secondary) memory. Displays RUN, BIT, FAULT Information, and Instruction messages and displays. Displays error log. Resets processor. Provides for EEPROM write operation. Dump/load memory to/from tape. Enables brightness adjustment of the display screen. 1 2 Displays BIT history (Indicates BIT execution). Displays slot status. Displays software switches and allows set/clear of them. SW-1 Enables register/memory modification from the MP (Includes secondary memory load). SW-2 and SW-3 Enables BIT cycling (BIT switch or SLOT). 2 3 Checks external system for STUCK KEY. Aircraft status (scans discretes). Enables BIT as selected by POWER-UP BIT switches. Enables BIT on selected slot.
LAMP TEST
Push Button Switch Indicator Indicator Indicator
4 5 6 7 8 9
OVERTEMP FAULT
N/A BIT POWER SUPPLY PURGE N/A N/A N/A N/A N/A N/A N/A
MEMORY PURGE (Safety lock) MAINTENANCE PANEL DISPLAY KEYPAD
Toggle Switch (Momentary) PIXEL DISPLAY ERRL RST WRTE TAPE BRT STAT
MULT
N/A
BIT
N/A
1 2
CURSOR SELECT KEYS CLR 10 FCTN SELECT Push Button Switch Push Button Switch
Left/Right Arrows N/A Momentary
Moves cursor selector left/right on the display.
Clears character selected by cursor. Enables function selection by depression of the function keys.
11
DEVICE SELECT
Momentary
Enables device (card/module) selection via display screen menu.
4B0701
4A-16
Figure 4A-7.
Maintenance Panel Controls and Indicators (Sheet 1 of 2)
NAVAIR 01-75PAC-12
NO.
SWITCH/INDICATOR PROGRAM CONTROL
TYPE
POSITION
FUNCTION
12
Toggle Switch (Momentary)
MA CLR
Master clears selected device. Initiates bootload if selected on BOOTSTRAP switch. Initiates BIT if enabled by POWER-UP BIT switches.
13
Toggle Switch (Lockable/ Momentary) Toggle Switch (Momentary) Rotary Switch
AUTOSTART START LOAD STOP BOOTSTRAP A B C D
Causes loaded program to start running automatically (lockable position). Loaded program requires manual START (momentary position). Causes bootload from selected device. Causes loaded program to stop running. Enables Preflight Loader bootload from tape/M- Disk to -O CP-2044 memory. Enables STP bootload from secondary (bubble) memory to GPC RAM. Enables TMS bootload from secondary (bubble) memory to GPC RAM. Neutral position (not defined). Indicates that processors are actually running the currently loaded application program (Green). (Preflight Loader, STP, or TMS only)
14
15
16
RUN POWER-UP BIT
Indicator
N/A
17
Toggle Switch
OFF I/O
I/O BIT not run. Enables I/O BIT on power up, master clear, or as a function selection. Cards tested: ANEWs, AGPs, MES/ACs, ARM/ORD, MDAs, NAV/MUX, ARD, SDCs. MEMORY BIT not run. Enables MEMORY BIT on power up, master clear, or as a function selection. Cards tested: GMC, GMAs, SMC, SMS, SMAs. PROCESSOR BIT not run. Enables PROCESSOR BIT on power up, master clear, or as a function selection. Cards tested: GPCs, MIM, PSM.
18
Toggle Switch
OFF MEM
19
Toggle Switch
OFF PROCESSOR
Figure 4A-7.
Maintenance Panel Controls and Indicators (Sheet 2 of 2)
4A-17
NAVAIR 01-75PAC-12
4B0801
4A-18
Figure 4A-8.
Central Computer Location Diagram (Sheet 1 of 2)
NAVAIR 01-75PAC-12
4B0802
Figure 4A-8.
Central Computer Location Diagram (Sheet 2 of 2)
4A-19
NAVAIR 01-75PAC-12
4A-1. 4A-2. CENTRAL COMPUTER PRELOAD CHECKOUT The central computer has several self-test capabilities that are performed either automatically or under operator control at the maintenance panel. The three basic tests are: power-up test; power-up BIT; and maintenance panel BIT. (An additional test executed from the central computer is the System Test Program (STP)). Also included are procedures for error log checking, cycle and individual slot BIT testing, stuck key, aircraft status, and master GPC checks, and secondary memory reformatting. Combinations of these tests can be used as an operational readiness test or as troubleshooting tools. The power-up test is automatically initiated upon application of power, or when the power supply recycles in response to a line transient. Upon power-up, the GPCs, SDCs, AGPs, and MIM perform basic verification testing. BIT control determines the system configuration and, via an arbitration procedure, determines the master GPC. Failing power supplies will be reported via the maintenance panel POWER and FAULT indicators and indicators on the modules. Power-up BIT provides for detection of failures within the central computer through use of embedded functionality test firmware on circuit cards with microprocessors and fault detection circuits on all circuit cards. BIT provides for detection of 98 percent of all failures except failures in line drivers and receivers on I/0 circuit cards and fault detection circuits. Line driver and receiver failures are detected by the STP which encompasses testing of peripheral systems. Isolation does not include backplane, maintenance panel, or power supply failures. Maintenance panel BIT is executed manually and exercises the maintenance panel switches (except MEMORY PURGE), keypad, and display. BIT provides running displays and failure detected displays on the maintenance panel. Failure displays include the step number of the failing subtest and isolation candidate(s). Upon display of a detected failure, options to continue at the next test, retest from the beginning, or terminate the test are provided. An M out of N testing philosophy has been incorporated to reduce the reporting of intermittent failures. When a particular failure occurs, the detecting subtest is subjected to retesting N times. If the failure reaches the threshold of M failure occurrences in the N retest times, the failure is logged in an error log as a hard failure and reported to the maintenance panel. If the threshold M is not reached, the failure is logged as a soft failure in the error log and not reported to the maintenance panel. The error log is accessible at the maintenance panel and includes amplifying data about each failure. Preliminary Switch Settings. Set the Pilot Armament Control Panel MASTER ARM and SRCH PWR switches to OFF. 4A-9. Test Initiation. Central computer testing is accomplished by the automatic power-up test, and the power-up BIT and maintenance panel BIT using the maintenance panel. Should a failure occur, refer to the troubleshooting flowcharts and module replacement table that follows the procedures.
4A-3.
Contains parts and assemblies susceptible to damage by electrostatic discharge (esd). This maintenance procedure involves contact with electrostatically sensitive devices. ESD handling is to be in accordance with NAVAIR 01-1A-23.
4A-4.
NOTE
S BIT Diagnostics may or may not be resident in secondary memory. Mission scenarios dictate contents of secondary memory. SMA circuit card assemblv modules Al8 thru A23 are interchangeable if reformatted. New SMAs must be formatted. GPC circuit card assemblies are interchangeable. New GPCs have had a generic microcode installed for factory testing. The GPC must have the CP-2044 GPC microcode loaded to the EEPROMs before the Tactical Mission Software or diagnostic programs can be run.
S S
4A-5.
4A-6.
4A-7.
4A-8.
NOTE
If unable to obtain either master arm or search power OFF status, refer NAVAIR 01-75PAC-12-6.
4A-20
Figure 4A-9.
Central Computer Description and Capabilities
NAVAIR 01-75PAC-12
START CP-2044 TROUBLESHOOTING PROCEDURE
OBSERVE THAT IF BIT LOADS FROM SECONDARY MEMORY, THE LOAD MESSAGES IN DIAGRAM 2 ARE DISPLAYED. THERE IS A 1 SECOND TIMEOUT WHEN TRYING TO LOAD FROM SECONDARY MEMORY BEFORE TRYING TO LOAD FROM TAPE/M- DISK. IF BIT LOADS FROM -O TAPE/M- DISK , THE LOAD -O MESSAGES IN DIAGRAM 3 ARE DISPLAYED.
When instructed to remove or replace modules or WRAs, refer to NAVAIR 16-30ASQ212 for proper procedures.
4B1001
Figure 4A-10.
Power-Up BIT Troubleshooting Procedures (Sheet 1 of 15)
4A-21
NAVAIR 01-75PAC-12
4B1002
4A-22
Figure 4A-10. Power-Up BIT Troubleshooting Procedures (Sheet 2 of 15)
NAVAIR 01-75PAC-12
4B1003
4A-23
NAVAIR 01-75PAC-12
IS DMTS INSTALLED
NO
IS THE LOAD DISPLAY CORRUPTED BUT BIT APPEARS TO BE LOADING EITHER FROM RDSS OR FROM SECONDARY MEMORY
IS RDSS SET UP FOR LOADING BIT
THE CP-2339
AT THE RDSS, SET POWER SWITCH TO ON (UP)
POWER ON INDICATOR IS ILLUMINATED AND OVERTEMP INDICATOR IS EXTINGUISHED
DRIVE BEZEL LED IS ILLUMINATED STEADY GREEN (6 SECONDS AFTER POWER APPLICATION)
INSERT WRITE ENABLED PFL/STP DISK IN M-O DRIVE
MAIN MENU IS DISPLAYED AFTER 40-50 SECONDS
YES
J
REFER TO RDSS FAULT ISOLATION PROCEDURES REFER TO RDSS FAULT ISOLATION PROCEDURES
REFER TO RDSS FAULT ISOLATION PROCEDURES
SH 15
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4 THIS PAGE
4 4 THIS PAGE THIS PAGE
AT RDSS OPERATOR PANEL, SELECT CONFIGURATION (OPTION 2) ON THE MAIN MENU
SELECT CONFIGURE TC (OPTION 1) ON THE CONFIGURATION MENU AND CONFIGURE AS FOLLOWS: ADDR = 0 DRV = 1 FILE = STP BOF = YES
POWER ON THE CP-2339 BY MOMENTARILY PLACING THE MP POWER SWITCH TO THE ON POSITION
OBSERVE BIT LOADS FROM RDSS AND THAT THE LOAD MESSAGES IN DIAGRAM 3-3 ARE DISPLAYED
4A-24
NAVAIR 01-75PAC-12
4B1005
Figure 4A-10.
4A-25
NAVAIR 01-75PAC-12
4B1006
4A-26
Figure 4A-10.
NAVAIR 01-75PAC-12
4B1007
Figure 4A-10.
4A-27
NAVAIR 01-75PAC-12
4B1008
4A-28
Figure 4A-10.
NAVAIR 01-75PAC-12
4B1009
Figure 4A-10.
4A-29
NAVAIR 01-75PAC-12
4B1010
4A-30
Figure 4A-10.
NAVAIR 01-75PAC-12
HAVE TOP AND BOTTOM DOOR AIR FILTERS BEEN CLEANED OR REPLACED
CHECK TOP AND BOTTOM DOOR FILTERS FOR BLOCKAGE. CLEAN OR REPLACE AS NECESSARY.
4B1011
Figure 4A-10.
4A-31
NAVAIR 01-75PAC-12
REPEATED ATTEMPTS TO LOAD FROM TAPE/M- DISK -O INDICATED ON MP.
REFER TO DMTS TAPE/M- DISK -O CARTRIDGE LOADING AND SERVICING INSTRUCTIONS
4B1012
4A-32
Figure 4A-10.
NAVAIR 01-75PAC-12
Table 1.
Module Replacement Table
A MIM (B35) GPC0 (B33) GPC1 (B32) GPC2 (B31) VSB GATEWAY (B34)* GMC (B36)* SMC (B46)* MIM (B35)* GPC0 (B33) GPC1 (B32) GPC2 (B31) AGP1 (C13) AGP2 (C16) SDC1 (A06) SDC2 (A07) SDC3 (A11)
B ARD (A02)
C NAV/MUX (A01) MES/AC1 (A03) MES/AC2 (A04) MES/AC3 (A05) SDC1 (A06) SDC2 (A07) ARM/ORD (A08) SDC3 (A11) ANEW1 (A12) ANEW2 (A13) ANEW3 (A14) ANEW4 (A15) GPC2 (B31) GPC1 (B32) AGP1 (C13) MDA1 (C14) AGP2 (C16) MDA2 (C17) MDA3 (C18) ARD (A02)
D NAV/MUX (A01) MES/AC1 (A03) MES/AC2 (A04) MES/AC3 (A05) SDC1 (A06) SDC2 (A07) ARM/ORD (A08) SDC3 (A11) ANEW1 (A12) ANEW2 (A13) ANEW3 (A14) ANEW4 (A15) GPC2 (B31) GPC1 (B32) GMA2 (B38) GMA3 (B39) GMA4 (B40) AGP1 (C13) MDA1 (C14) AGP2 (C16) MDA2 (C17) GPC0 (B33)
E VSB GATEWAY (B34) ANEW5 (A16) GMC (B36) GMA1 (B37) SMC (B46) SMS (B47)
F VSB GATEWAY (B34)
ANEW5 (A16) MIM (B35) SMA1 (A18)** SMA2 (A19)** SMA3 (A20)** SMA4 (A21)** SMA5 (A22)** SMA6 (A23)**
* Must be replaced, not removed. (Do not leave slot empty).
MDA3 (C18)
** If these modules are replaced, secondary memory must be purged and reformatted. Then BIT must be loaded from tape and restored into secondary memory if BIT load from secondary memory is desired.
Table 2.
Special Messages Table
MESSAGE NUMBER 1 2 3
SPECIAL MESSAGE MASTER ARM SWITCH ON SEARCH POWER SWITCH ON RETEST TO REFORMAT
Figure 4A-10.
4A-33
NAVAIR 01-75PAC-12
Diagram 1. Control Firmware Idle Loop Display
L OAD I NG F R OM TO A T T E MPT BI T T I ME - > X X X - > T APE - > GPC0 - > 001
UNDEF I N E D BO OT S T RA P T YPE GP C I D L I N G I N C F W
WHERE XXX = APPROXIMATE BIT EXECUTION TIME IN SECONDS
Diagram 2. BIT Loading Display (Load From Secondary Memory)

L OAD I NG F R OM TO AT T E MPT L OAD I NG F R OM TO AT T E MPT BI T T I ME - > X X X - > SECONDARY - > GPC0 - > 000 BI T T I ME - > X X X - > MAST E R - > GPC1 - > 000
WHERE: XXX = APPROXIMATE BIT EXECUTION TIME IN SECONDS

L OAD I NG F R OM TO AT T E MPT L OAD I NG F R OM TO AT T E MPT BI T T I ME - > X X X - > MAST E R - > GPC1 - > 000 BI T T I ME - > X X X - > MAST E R - > GPC2 - > 000
WHERE XXX = APPROXIMATE BIT EXECUTION TIME IN SECONDS Diagram 4. Running BIT Display
L OAD I NG F R OM TO AT T E MPT
BI T T I ME - > X X X - > MAST E R - > GPC2 - > 000
RU NNI NG B I T 0 - >AAAA AAA 2 - >CCCC CCC
T I ME - > X X X 1 - >BBBBBBB
WHERE XXX = APPROXIMATE BIT EXECUTION TIME IN SECONDS Diagram 3. BIT Loading Display (Load from Tape)
WHERE:
XXX = APPROXIMATE BIT EXECUTION AAAAAAA = BIT TESTS EXECUTED BY GPC 0 BBBBBBB = BIT TESTS EXECUTED BY GPC 1 CCCCCC = BIT TESTS EXECUTED BY GPC 2
TIME IN SECONDS
NOTE
The display shown above is typical for a system with three GPCs present. The display will vary with more or less than three GPCs.
L OAD I NG F R OM TO AT T E MPT
BI T T I ME - > X X X - > SECONDARY - > GPC0 - > 000
4A-34
Figure 4A-10.
NAVAIR 01-75PAC-12
SH 4 J IS THE LOAD DISPLAY CORRUPTED BUT BIT APPEARS TO BE LOADING EITHER FROM TAPE OR FROM SECONDARY MEMORY THE CP-2339 CP-901
DEPRESS ON LN - OFF LN FOR CTRL 1
DEPRESS CP-901
DEPRESS DMTU
I/O SEL FOR CTRL 1 CP-901 SWITCH-INDICATOR BACK LIT AMBER
MOUNT THE CP-2339 STP TAPE CARTRIDGE ON DMTU A AND SET TO BOT (REFER TO DMTS TAPE CARTRIDGE LOADING AND SERVICING INSTRUCTIONS)
POWER ON THE CP-2339 DIAGRAM 3-3 ILLUMINATED
4A-35/(4A-36 blank)
NAVAIR 01-75PAC-12
4B1101
Figure 4A-11.
Maintenance Panel BIT Troubleshooting Procedures (Sheet 1 of 6)
4A-37
NAVAIR 01-75PAC-12
4B1102
4A-38
Figure 4A-11.
NAVAIR 01-75PAC-12
4B1103
Figure 4A-11.
4A-39
NAVAIR 01-75PAC-12
4B1104
4A-40
Figure 4A-11.
NAVAIR 01-75PAC-12
Diagram 1. Maintenance Panel BIT Displays DISPLAY 1 DISPLAY 7
PAS S PAS S PAS S PAS S UNDEF I N E D BO OT S T R A P T YPE GP C I DL I N G I N C F W PA S S PA S S PA S S PA S S PASS PASS PASS PASS
DISPLAY 14
MP S WI T C H P OSI T I ONS I / O: O FF ME M OF F P ROC: ON : B OOT S T R A P - D L D/ ST P : - - - - A ST A R T : - - - - -
DISPLAY 8
DISPLAY 15
MP S WI T C H P OSI T I ONS I / O: O N ME M ON : P ROC: OF F B OOT S T R A P - D L D/ ST P : - - - - A ST A R T : - - - - -
DISPLAY 2
USE A R R OW K E Y S T O S CROL L THRU P OS S I B L E D E V I CES PRES S E N T R T O S E L ECT 1 - GP C S EL E C T MP T E S T 1 - DI S P L A Y 2 - K E Y P AD 3 - S WI T C H 2
BLINKING DISPLAY 9
MP K E Y P A D T E S T PRES S A N Y K E YP A D K EY: KEY P R E S S E D = X X X X XX PRES S E N T R T O E X I T
DISPLAY 16
MP S WI T C H P OSI T I ONS I / O: O N ME M OF F P ROC: ON : B OOT S T R A P - D L D/ ST P : - - - - A ST A R T : - - - - -
BLINKING DISPLAY 3
USE A R R OW K E Y S T O S CROL L THRU P OS S I B L E D E V I CES PRES S E N T R T O S E L ECT D - MP
DISPLAY 17
MP S WI T C H P OSI T I ONS I / O: O FF ME M ON : P ROC: ON B OOT S T R A P - D L D/ ST P : - - - - A ST A R T : - - - - -
DISPLAY 10
BLINKING DISPLAY 4
MP SEL E C T A F U NC I ON T S EL E C T MP T E S T 1 - DI S P L A Y 2 - K E Y P AD 3 - S WI T C H 3
DISPLAY 18
MP S WI T C H P OSI T I ONS I / O: O N ME M ON : P ROC: ON B OOT S T R A P - D L D/ ST P : - - - - A ST A R T : - - - - -
BLINKING DISPLAY 11
MP S WI T C H P OS I T I ONS I / O: O FF ME M OF F P ROC: OF F : B OOT S T R A P - D L D/ ST P : - - - - A ST A R T : - - - - -
DISPLAY 5
DISPLAY 19
MP S WI T C H P OSI T I ONS I / O: O FF ME M OF F P ROC: OF F : B OOT S T R A P - C L D/ ST P : - - - - A ST A R T : - - - - -
S EL E C T MP T E S T 1 - DI S P L A Y 2 - K E Y P AD 3 - S WI T C H 1
DISPLAY 12 BLINKING DISPLAY 20

MP S WI T C H P OS I T I ONS I / O: ON ME M OF F P ROC: OF F : B OOT S T R A P - D L D/ ST P : - - - - A ST A R T : - - - - MP S WI T C H P OSI T I ONS I / O: O FF ME M OF F P ROC: OF F : B OOT S T R A P - B L D/ ST P : - - - - A ST A R T : - - - - -
DISPLAY 6
OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON ON OFF OFF ON ON OFF OFF ON ON OFF OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON
DISPLAY 13
MP S WI T C H P OS I T I ONS I / O: O FF ME M ON : P ROC: OF F B OOT S T R A P - D L D/ ST P : - - - - A ST A R T : - - - - -
DISPLAY 21
MP S WI T C H P OSI T I ONS I / O: O FF ME M OF F P ROC: OF F : B OOT S T R A P - A L D/ ST P : - - - - A ST A R T : - - - - -
Figure 4A-11.
4A-41
NAVAIR 01-75PAC-12
DISPLAY 22
MP S WI T C H P OS I T I ONS I / O: O FF ME M OF F P ROC: OF F : B OOT S T R A P - D L D/ ST P : L O A D A ST A R T : - - - - -
Table 1. Maintenance Panel Keypad Keys

MP KEY Display 9 Results C-STRT D-STOP E-STEP F-BKPT 8-GREG 9-SREG A-MEM B-SRCH 4-ERRL 5-RST 6-WRTE 7-TAPE 0-BRT 1-STAT 2-MULT 3-BIT <-----> CLR Exits the test
C D E F 8 9 A B 4 5 6 7 0 1 2 3 <---
DISPLAY 23
MP S WI T C H P OS I T I ONS I / O: O FF ME M OF F P ROC: OF F : B OOT S T R A P - D L D/ ST P : S T O P A ST A R T : - - - - -
DISPLAY 24
MP S WI T C H P OS I T I ONS I / O: O FF ME M OF F P ROC: OF F : B OOT S T R A P - D L D/ ST P : - - - - A ST A R T : AUT O
DISPLAY 25
MP S WI T C H P OS I T I ONS I / O: O FF ME M OF F P ROC: OF F : B OOT S T R A P - D L D/ ST P : - - - - A ST A R T : ST ART
---> CLR ENTR
4A-42
Figure 4A-11.
NAVAIR 01-75PAC-12
4A-1. 4A-2. CENTRAL COMPUTER PRELOAD CHECKOUT. Perform the following Power-Up test, Power-Up BIT, and MP BIT tests at the Central Computer Maintenance Panel (MP). 1. POWER-UP TEST
NOTE
Any error conditions (incorrect display or indicator) refer to troubleshooting procedures. (See figures 4A-10 and 4A-11) a. At the CP-2044, set the MP switches as follows: (1) POWER-UP BIT switches to I/O, MEM, and PROCESSOR. (2) AUTO START/START switch to AUTOSTART position. (3) BOOTSTRAP switch to B position. b. Momentarily press the MA CLR switch.
d.
Display sequence for an unsuccessful secondary memory load and successful tape/M--O Disk load will be as follows:
NOTE
S S CP-2044 MP switches are shown in Figure 4A-7. Maintenance Panel Controls and Indicators Any error conditions (incorrect display or indicator) refer to troubleshooting procedures. (See figures 4A-10, and 4A-11) a. At the CP-2044, set the MP switches as follows: (1) LOAD/STOP to the middle position. (2) AUTO START/START to the middle position. (3) MA CLR to the middle position. (4) BOOTSTRAP to the D position. (5) POWER-UP BIT switches to OFF. b. c. Momentarily place the MP POWER switch to the ON position. In approximately ten seconds, display should be as follows: S S S S
L OAD I NG F R OM TO A T T E MPT
BI T T I ME - > X X X - > SECONDARY - > GPC0 - > 000
BI T T I ME - > X X X - > T APE - > GPC0 - > 001
NOTE
BIT is normally resident in secondary memory. If BIT is not in secondary memory it will be loaded from tape/M--O Disk to GPC0s RAM. GPC1s RAM and GPC2s RAM WILL BE LOADED FROM GPC0s RAM. The system will attempt to load from secondary memory for five seconds (XXX in display is time in seconds) and then attempt a tape/M--O Disk load. The system will continue to attempt a tape/M--O Disk load until successful or until operator intervention. c. Display sequence for successful secondary memory load will be as follows: e.
L OAD I NG F R OM TO A T T E MPT BI T T I ME - > X X X - > SECONDARY - > GPC1 - > 000 RU NNI N G B I T 0 - > AAA AAAA 2 - >C CC CCCC L OAD I NG F R OM TO A T T E MPT BI T T I ME - > X X X - > MAST E R - > GPC1 - > 000 T I ME - > X X X 1 - > BBBBB B B L OAD I NG F R OM TO A T T E MPT BI T T I ME - > X X X - > MAST E R - > GPC2 - > 000 L OAD I NG F R OM TO A T T E MPT BI T T I ME - > X X X - > MAST E R - > GPC1 - > 000
UNDE FI N E D BOOT S T RA P T YPE GP C I D L I N G I N C F W
Running BIT display should be as follows:
d.
Verify MP indicators are as follows: S S S POWER ON on OVERTEMP off POWER SUPPLY FAULT off
e. f. g.
Verify fans are operating. Depress and hold the LAMP TEST switch and verify that all MP indicators light. Release the LAMP TEST switch.
WHERE:
2. POWER-UP BIT
BI T T I ME - > X X X - > MAST E R - > GPC2 - > 000
AAAAAAA = Current module being tested by GPC0 BBBBBBB = Current module being tested by GPC1 CCCCCCC = Current module being tested by GPC2 XXX = BIT run time in seconds
f.
After approximately 5 minutes BIT completes and displays number of hard and soft errors.
Figure 4A-12.
Central Computer Test Procedure (Sheet 1 of 8)
4A-43
NAVAIR 01-75PAC-12
3. BRIGHTNESS ADJUSTMENT. a. Depress FCTN SELECT. Display should be as follows: b. Depress the DEVICE SELECT switch. Display should be as follows:
NOTE
The following step tests each pixel/dot position for each character. Each character is a 5 by 7 matrix. Two alternating checkerboard patterns are used to check each character on a line. Each pattern is on for approximately 2 seconds. i. j. Depress the ENTR key on the MP keypad to select DISPLAY BIT. Observe display for all characters on all four lines as follows:
S E L ECT A F UNCT I ON
US E ARROW KEY S T O SCR OL L T H RU POS S I B L E DEV I CE S P R E SS EN T R T O SEL E CT 1 - GPC
BLINKING b. Depress 0/BRT key. Display should be as follows: c. d. Depress the left arrow key on the MP Keypad. Display should be as follows:
NOTE
The following step occurs 5 seconds after line 4 of the MP display is tested. k. Display should be as follows:
US E T HE AR ROW K EYS T O ADJ U ST T HE B RI GHTNES S OF T HI S DI S P L AY P R E SS E N T ER T O EX I T
US E ARROW KEY S T O SCR OL L T H RU POS S I B L E DEV I CE S P R E SS EN T R T O SEL E CT D - MP
BLINKING c. d. Depress -->> or <<-- key to increase or decrease display brightness. Depress ENTR to select current display brightness. The following display will then appear. e. f. Depress the ENTR key on the MP keypad. Display should be as follows: l.
PA S S PA S S PA S S PA S S
P AS S P AS S P AS S P AS S
PASS PASS PASS PASS
Depress the FCTN SELECT switch on the MP to exit DISPLAY BIT.
MP P R ES S DEV I CE S EL ECT OR FCT N SE L E CT KEY S E L ECT A F UNCT I ON
m. Display should be as follows:
MP S E L ECT A F UNCT I ON
4. MAINTENANCE PANEL BIT
g. h.
Depress the 3/BIT key on the MP keypad. (MP BIT initiated) Display should be as follows: n. o.
S EL ECT MP T E ST 1 - D I SPL A Y 2 - K E YPAD 3 - S WI T CH 1
NOTE
Any error conditions (incorrect display or indicator) refer to trouble-shooting procedures. (See figures 4A-10 and 4A-11) a. At the CP-2044, set the MP switches as follows: (1) LOAD/STOP to the middle position. (2) AUTO START/START to the middle position. (3) MA CLR to the middle position. (4) BOOTSTRAP to the D position. (5) POWER-UP BIT switches to OFF.
Depress the 3/BIT key on the MP keypad. Display should be as follows:
BLINKING
BLINKING
4A-44
Figure 4A-12.
NAVAIR 01-75PAC-12
p. q. Depress the right arrow key on the MP keypad to cycle the blinking number to 2. Display should be as follows: ag. Depress key 1; observe 1-STAT. ah. Depress key 2; observe 2-MULT. ai. Depress key 3; observe 3-BIT. aj. Depress key <---; observe <---.
S EL ECT MP T E ST 1 - DI SPL A Y 2 - K E YPAD 3 - S WI T CH 2 MP S WI T C H P OS I T I ONS I / O: O FF ME M OF F P ROC: OF F : B OOT S T R A P - D L D/ ST P : - - - - A ST A R T : - - - - -
at. Display should be as follows:
ak. Depress key --->; observe --->. al. Depress key CLR; observe CLR. BLINKING am. Depress the ENTR key on the MP keypad to exit KEYPAD BIT. an. Display should be as follows: au. Place the OFF-I/O switch to the I/O position. av. Display should be as follows:
r. s.
Depress the ENTR key on the MP keypad to select KEYPAD BIT. Display should be as follows:
MP S E L ECT A F UNCT I ON MP KEY P AD T EST P R E S S A NY KE YP AD KEY: K E Y PRESS E D = X XXXXX P R E S S ENT R T O EX I T MP S WI T C H P OS I T I ONS I / O: O N ME M OF F P ROC: OF F : B OOT S T R A P - D L D/ ST P : - - - - A ST A R T : - - - - -
ao. Depress the 3/BIT key on the MP keypad. WHERE: XXXXXX portion of step s display is initially blank and is modified by steps t thru al. ap. Display should be as follows:
aw. Place the OFF-I/O switch to the OFF position. ax. Place the OFF/MEM switch to the MEM position. ay. Display should be as follows:
The following steps t thru al verify operation of the MP keypad.

t. u. v. w. x. y. z. Depress key C; observe C-STRT. Depress key D; observe D-STOP. Depress key E; observe E-STEP. Depress key F; observe F-BKPT. Depress key 8; observe 8-GREG. Depress key 9; observe 9-SREG. Depress key A; observe A-MEM.
MP S WI T C H P OS I T I ONS I / O: O FF ME M ON : P ROC: OF F B OOT S T R A P - D L D/ ST P : - - - - A ST A R T : - - - - -
BLINKING aq. Depress the left arrow key on the MP keypad to cycle the blinking number to 3. ar. Display should be as follows: az. Place the OFF/MEM switch to the OFF position. ba. Place the OFF/PROCESSOR switch to the PROCESSOR position. bb. Display should be as follows:
aa. Depress key B; observe B-SRCH. ab. Depress key 4; observe 4-ERRL. ac. Depress key 5; observe 5-RST. ad. Depress key 6; observe 6-WRTE. ae. Depress key 7; observe 7-TAPE. af. Depress key 0; observe 0-BRT.
BLINKING
MP S WI T C H P OS I T I ONS I / O: O FF ME M OF F P ROC: ON : B OOT S T R A P - D L D/ ST P : - - - - A ST A R T : - - - - -
as. Depress the ENTR key on the MP keypad to select SWITCH BIT.
bc. Set the following condition: (1) OFF/PROCESSOR switch to the OFF position.
Figure 4A-12.
4A-45
NAVAIR 01-75PAC-12
(2) OFF-I/O switch to the I/O position. (3) OFF/MEM switch to the MEM position. bd. Display should be as follows: bl. Set to the following condition: (1) OFF-I/O switch to the OFF position. (2) OFF/MEM switch to the OFF position. (3) OFF/PROCESSOR switch to the OFF position.
MP S WI T C H P OS I T I ONS I / O: O N ME M ON : P ROC: OF F B OOT S T R A P - D L D/ ST P : - - - - A ST A R T : - - - - MP S WI T C H P OS I T I ONS I / O: O FF ME M OF F P ROC: OF F : B OOT S T R A P - D L D/ ST P : L O A D A ST A R T : - - - - -
bu. Depress and hold the LOAD/STOP switch to the LOAD position until display is as follows:
bm. Display should be as follows:
be. Place the OFF/MEM switch to the OFF position. bf. Place the OFF/PROCESSOR switch to the PROCESSOR position. bg. Display should be as follows:
MP S WI T C H P OS I T I ONS I / O: O FF ME M OF F P ROC: OF F : B OOT S T R A P - D L D/ ST P : - - - - A ST A R T : - - - - -
bv. Release the LOAD/STOP switch. bw. Depress and hold the LOAD/STOP switch to the STOP position until display is as follows:
bn. Place the BOOTSTRAP switch to position C. bo. Display should be as follows:
MP S WI T C H P OS I T I ONS I / O: O FF ME M OF F P ROC: OF F : B OOT S T R A P - D L D/ ST P : S T O P A ST A R T : - - - - -
MP S WI T C H P OS I T I ONS I / O: O N ME M OF F P ROC: ON : B OOT S T R A P - D L D/ ST P : - - - - A ST A R T : - - - - -
MP S WI T C H P OS I T I ONS I / O: O FF ME M OF F P ROC: OF F : B OOT S T R A P - C L D/ ST P : - - - - A ST A R T : - - - - -
bx. Release the LOAD/STOP switch. by. Place the AUTO START/START switch to the AUTO START position. bz. Display should be as follows:
bh. Set to the following condition: (1) OFF-I/O switch to the OFF position. (2) OFF/MEM switch to the MEM position. bi. Display should be as follows:
bp. Place the BOOTSTRAP switch to position B. bq. Display should be as follows:
MP S WI T C H P OS I T I ONS I / O: O FF ME M OF F P ROC: ON : B OOT S T R A P - D L D/ ST P : - - - - A ST A R T : - - - - -
MP S WI T C H P OS I T I ONS I / O: O FF ME M OF F P ROC: OF F : B OOT S T R A P - B L D/ ST P : - - - - A ST A R T : - - - - -
MP S WI T C H P OS I T I ONS I / O: O FF ME M OF F P ROC: OF F : B OOT S T R A P - D L D/ ST P : - - - - A ST A R T : AUT O
ca. Depress and hold the AUTO START/START switch to the START position until display is as follows: br. Place the BOOTSTRAP switch to the position A.
bj. Place the OFF-I/O switch to the I/O position. bk. Display should be as follows:
bs. Display should be as follows:
MP S WI T C H P OS I T I ONS I / O: O FF ME M OF F P ROC: OF F : B OOT S T R A P - D L D/ ST P : - - - - A ST A R T : ST ART
MP S WI T C H P OS I T I ONS I / O: O N ME M ON : P ROC: ON B OOT S T R A P - D L D/ ST P : - - - - A ST A R T : - - - - -
MP S WI T C H P OS I T I ONS I / O: O FF ME M OF F P ROC: OF F : B OOT S T R A P - A L D/ ST P : - - - - A ST A R T : - - - - -
cb. Release the AUTO START/START switch.
bt. Place the BOOTSTRAP switch to the position D.
4A-46
Figure 4A-12.

This concludes the MP Test. To exit test perform one of the following: Power-Up Test or Power-Up BIT. If no other test is needed, turn off computer. 5. ERROR LOG CHECKING. a. Depress DEVICE SELECT. Display should be as follows: WHERE: XX is the log number selected.
US E ARROW KEY S T O SCR OL L T H RU POSS I B L E DEV I CE S P R E SS ENT R T O SEL E CT 1 - GPC S WI T CHES H A VE B E E N UP D A TED
j.
If the error log number entered is not a valid number, the display will state:
d.
Set S2 to 1 for cycle number displayed and set S3 to 1 for cycle BIT, using the arrow keys to move between switch numbers and the number keys to change the switch settings. Depress ENTR to write switches and exit screen. Display should be as follows:
e.
BI T ERROR L OG: L OG# XX E R ROR L OG I S NOT VA L I D
k.
If the error log number entered is not a valid number, depress FCTN SELECT to select a different function or DEVICE SELECT to select a different device.
6. CYCLE TEST OPTION. BLINKING b. c. d. Depress --> or <-- key to scroll to desired device in displayed list of available devices. Depress ENTR to select device and observe display. If the device selected is present more than once in the CP-2044 configuration, press --> or <-- key to select one of available devices. Otherwise, proceed to the next step. Depress 4/ERRL key. Display should be as follows: b. Depress 2/MULT key. Display should be as follows: g.
XX X X XXX B I T ERROR L OG S E L ECT A N E RROR L OG N UMBER ( 0 0 - 3 1 ) 0 0 S E L ECT A F UNCT I ON 1 - SWI T CHES 2 - ST UC K KE Y 3 - AC S T AT US 1 S E L ECT A F UNCT I ON S E L ECT A F UNC T I ON
a.
Depress FCTN SELECT. Display should be as follows:
f.
Depress FCTN SELECT. Display should be as follows:
e.
Depress 3/BIT key. Display should be as follows:
BLINKING WHERE: XXXXXXX is the selected device. f. g. Depress --> or <-- or number keys to enter a decimal error log number. Depress ENTR to display the selected error log. When a valid error log number has been entered, observe display that identifies error log number, number of GPC that was executing the failed test, subtest and step that failed, and number of retries left. Depress ENTR to view MORE error log data, press FCTN SELECT to select a different function, or press DEVICE SELECT to select a different device. If MORE option was selected, observe display that identifies error log number, type of BIT that was executing (PU, MP, or GP), BIT execution time, and whether an overflow error occurred. c.
BLINKING Depress ENTR to select SWITCHES. Display should be as follows: BLINKING

S WI T CH ES S1- 0 S2 - 0 S3 - 0 S4- 0 S5 - 0 S6- 0 S7- 0 0 - OF F 1 - ON E NT R - E X I T
S E L ECT B I T T YPE 1 - S WI T CH 2 - S L OT 1
BLINKING
h.
Depress ENTR to select SWITCH BIT. BIT will be executed according to the switch settings on the MP. (i.e. positions of the OFF-I/O, OFF/MEM, and OFF/PROCESSOR switches). If BIT successfully executes, the following display should appear briefly. (Then, the CP-2044 will initialize memory and continue based on the position of the BOOTSTRAP switch.)
h.
i.
i.
Figure 4A-12.
4A-47
NAVAIR 01-75PAC-12
BI T T I ME - > COMP L E T ED SOF T E R RORS - > HARD E R RORS - > X XX Y YY Z ZZ B I T SL O T T ES T S E L ECT A RO W ( A B OR CD) AB BI T T I ME - > COMP L E T ED SOF T E R RORS - > HARD E R RORS - > X XX Y YY Z ZZ
WHERE:
XXX = BIT execution time. YYY = Number of soft errors. ZZZ = Number of hard errors.
BLINKING
WHERE:
XXX = BIT execution time. YYY = Number of soft errors. ZZZ = Number of hard errors.
j.
If BIT fails, the display will identify the module and number (if applicable) that failed, the number of the GPC that detected the failure, subtest number and step number that failed, possible card replacements to fix the error (maximum of three), and CONTinue, RETEST (for non-interrupt type failures only), and TERMinate options. Continue option will continue from the point of failure; retest option will execute BIT again from the beginning of the test; terminate option will terminate BIT.
e. f.
Depress --> or <-- key to select a row, and press ENTR. If row AB is selected, display should be as follows:
l.
7. SLOT BIT OPTION. a. Depress FCTN SELECT. Display should be as follows:
B I T SL OT T E ST S E L ECT A S L OT NUMBE R ( 01- 4 7 ) 01
If BIT fails, the display will identify the module and number (if applicable) that failed, the number of the GPC that detected the failure, subtest number and step number that failed, possible card replacements to fix the error (maximum of three), and CONTinue, RETEST (for non-interrupt type failures only), and TERMinate options. Continue option will continue from the point of failure; retest option will execute BIT again from the beginning of the test; terminate option will terminate BIT.
8. STUCK KEY OPTION. a. BLINKING

US E ARROW KEY S T O SCR OL L T H RU POSS I B L E DEV I CE S P R E SS ENT R T O SEL E CT 1 - GPC
Depress DEVICE SELECT. Display should be as follows:
g. h.
Depress --> or <-- key or number keys to enter a decimal slot number. Then, press ENTR. If row CD is selected, display should be as follows: b.
B I T SL OT T E ST S E L ECT A S L OT NUMBE R ( 01- 2 5 ) 01
BLINKING Depress 7 to select MES/AC card type. Depress ENTR. Display should be as follows:
b.
Depress 3/BIT key. Display should be as follows: c.
S E L ECT B I T T YPE 1 - S WI T CH 2 - S L OT 1
S E L ECT A MES/ A C NUMB E R
BLINKING BLINKING i. c. d. Depress 2/MULT key and ENTR to select SLOT BIT. Display should be as follows: j. Depress --> or <-- or number keys to enter a decimal slot number. Then, press ENTR. Once a valid slot number is entered and ENTR is pressed, BIT is initiated on the specified row/slot. The BIT tests then display BIT execution information. Otherwise, display states that specified row/slot is empty. If BIT successfully executes, the following display should appear briefly. (Then, the CP-2044 will initialize memory and continue based on the position of the BOOTSTRAP switch.) d. e.
MES/ A C 1
123
BLINKING Depress --> or <-- key to select one of the available MES/AC cards. Depress ENTR to continue. Display should be as follows:
k.
ME S / ACX S EL ECT A F UNCT I O N
WHERE: X = Number of the MES/AC selected.
4A-48
Figure 4A-12.
NAVAIR 01-75PAC-12
f. Depress 2/MULT key. Display should be as follows: c. d.
S E L ECT A F UNCT I ON 1 - SWI T CHES 2 - ST UC K KE Y 3 - AC S T AT US 1
Depress 7 to select MES/AC card type. Depress ENTR. Display should be as follows:
j. k.
Operator should activate the required switches to see the status change on the MP display. Depress --> or <-- key to select CONTinue or TERMinate option. Continue option will show same display with second and third lines changed. Then press ENTR. If terminate option was selected, observe display that states MES/ AC status fctn has been terminated.
S E L ECT A MES/ A C NUMB E R MES/ A C 1 123
l.
BLINKING BLINKING g. h. Depress 2/MULT key and press ENTR. Display should be as follows: e. f.
ST UC K KE Y = > X X X XXXXX X XXXX X XXXXX X ME S / ACX
m. Momentarily depress the MA CLR switch to the down position. 10. DETERMINATION OF MASTER GPC. a. Depress DEVICE SELECT. Display should be as follows:
Depress --> or <-- key to select one of the available MES/AC cards. Depress ENTR to continue. Display should be as follows:
WHERE: XXXXXXXXXXXXXXXXXXXX equals either WAS NOT FOUND or the name of the keyset and stuck key that was found. i. Repeat this procedure from the beginning to select different MES/ AC cards if searching for a stuck key.
S L ECT E
A F UN CT I ON
BLINKING b. c. Depress ENTR to select GPC device. Display should be as follows:
WHERE: X = Number of the MES/AC selected g. Depress 2/MULT key. Display should be as follows:
9. AIRCRAFT STATUS CHECK. a. Momentarily depress the LOAD/STOP switch to the STOP position to stop all processors. Display should be as follows:
S E L ECT A GPC N UMBER S E L ECT A F UNCT I ON 1 - SWI T CHES 2 - ST UC K KE Y 3 - AC S T AT US 1 GPC X YYYY Y Y Y Y
BLINKING
A L L PRO C ESSOR S ST OP PED
BLINKING h. Depress 3/BIT key and press ENTR. Display should initially be as follows. Second and third lines will show MES/AC status that changes when switches are activated. The second line will show the activated switch and the third line will show ACTIVE or INACTIVE, depending on the switch position.
WHERE:
X = Number of GPC currently selected. YYYYYYYY= List of available GPCs (0...7)
b.
Depress DEVICE SELECT. Display should be as follows:
i.
d.
The lowest number GPC in the list of available GPCs on the screen is the master GPC.
11. PURGE/REFORMAT SECONDARY MEMORY. a. Ensure all POWER-UP BIT switches are in the OFF position. Ensure BOOTSTRAP switch is set to position D. If computer is off, turn it on. Momentarily depress the MA CLR switch to the down position.
BLINKING
AC S T AT F UN CT I N I T I AT E D S C ANNI NG DI S CRET ES
b. c. d.
Figure 4A-12.
4A-49
NAVAIR 01-75PAC-12
e. After approximately 10 seconds, display should be as follows: k. l.
UNDEF I N E D BO OT S T R A P T YPE GP C I DL I N G I N C F W S WI T CHES H A VE B E E N UP D A TED
Depress ENTR to write switches and exit the screen. Display should be as follows:
SE C ME M
REF ORMAT I NI T I A T ED
s.
After approximately 2 minutes, display should be as follows:
f.
Momentarily operate the MEMORY PURGE switch to the UP position and then back to the center position. (Switch must be pulled out slightly before moving to the UP position). Depress FCTN SELECT. Display should be as follows: m. Depress DEVICE SELECT. Display should be as follows:
g.
SE C ME M * * ** REF ORMAT **** C OMPL E T ED 3 B A N KS F OR MAT T ED
t.
Reformat is complete. The computer must now be reloaded from tape in order to be used again.
BLINKING h. Depress 2/MULT key. Display should be as follows: n.

S E L ECT A F UNCT I ON 1 - SWI T CHES 2 - ST UC K KE Y 3 - AC S T AT US 1
Depress 9 to select SEC MEM. Depress ENTR. Display should be as follows:
o.
SE C ME M
BLINKING
S E L E C T A F UNC I ON T
i.
Depress ENTR to select SWITCHES. Display should be as follows: BLINKING

S WI T CH ES S1- 0 S2 - 0 S3 - 0 S4- 0 S5 - 0 S6- 0 S7- 0 0 - OF F 1 - ON E NT R - E X I T
p.
Depress 5/RST key. Display should be follows:
SE C ME M S E L E CT RE SET OPT I ON 1 - CUR REN T DEV I CE 2 - A L L I / O CARDS 1
BLINKING q. r. Depress ENTR to select CURRENT DEVICE reset. Display should be as follows:
j.
Set S1 to 1 using the number keys.
4A-50
Figure 4A-12.
NAVAIR 01-75PAC-12
Table 1. Central Computer Module Function and Interchangeability
EQUIPMENT/MODULE/PART DESIGNATOR A4A1 A4A2 A4A3 NOMENCLATURE NAV MUX Auxiliary Readout Display MES/AC 1 FUNCTION Interfaces Doppler radar and Inertial NAV 1 and Inertial NAV 2 data to the CP-2044 Interface between the GPC and the two IP-919/ASA-70 Auxiliary Readout Displays Interfaces Keyset (NAVCOM and Pilot) to Indicators and AC Status Switch and Differential inputs to AC Relay and Status Line Drivers Interfaces TACCO, SS-3. amd ORD Keysets and TACCO Keyboard to Indicators Interfaces TACCO and SS-3 Keysets to Indicators Synchro inputs from NAV system. Barometric Altimeter, TACCO and SS-3 Trackballs, and NAV Simulator are converted to Digital. Synchro outputs to FDS and HSI are made via D/S logic. A4A7 Synchro/Digital Converter 2 Synchro inputs from NAV system. Barometric Altimeter, TACCO and SS-3 Trackballs, and NAV Simulator are converted to Digital. Synchro outputs to FDS and HSI are made via D/S logic. A4A8 A4A11 ARM/ORD Synchro/Digital Converter 3 Interfaces the GPCs and the ARM/ORD equipment Synchro inputs from NAV system. Barometric Altimeter, TACCO and SS-3 Trackballs, IRDS Platform (Aircraft Not Incorporating AFC 705), and NAV Simulator are converted to Digital. Synchro outputs to FDS and HSI are made via D/S logic. A4A12 ANEW 1 Dual Channel separate receivers common output driver I/O CCA A4A13, A4A14, A4A15, A4A16 A4A12, A4A14, A4A15, A4A16 A4A12, A4A13, A4A15, A4A16 A4A12, A4A13, A4A14, A4A16 A4A12, A4A13, A4A14, A4A15 A4A19, A4A20, A4A21, A4A22 A4A23 NONE A4A6, A4A7 A4B31 A4B32 A4B33 A4B34 A4B35 A4B36 A4B37 General Purpose Controller 2 General Purpose Controller 1 General Purpose Controller 0 VSB Gateway Maintenance Interface Module Global Memory Timing & Control Global Memory Array 1 Global Memory Array 2 Global Memory Array 3 Global Memory Array 4 SMC SMS Processing and control for elements of the CP-2044 tied to the VME bus Processing and control for elements of the CP-2044 tied to the VME bus Processing and control for elements of the CP-2044 tied to the VME bus Link normal VSB on Backpanel A4 to extended VSB Backpanel A5 Interfaces Maintenance Panel to the GPCs on the VME bus Provides timing and control for Global Memory Arrays Provides area for I/O data transfers and common data requiring rapid access Provides area for I/O data transfers and common data requiring rapid access Provides area for I/O data transfers and common data requiring rapid access Provides area for I/O data transfers and common data requiring rapid access Provides bubble memory control Sequencer for bubble memory A4A6, A4A11 A4A23 Bubble Array 6 IDENTICAL ITEMS FOR ALTERNATE REPAIRS NONE NONE A4A4, A4A5 A4A20 Bubble Array 3
Table 1.
Central Computer Module Function and Interchangeability (cont.)

IDENTICAL ITEMS FOR ALTERNATE REPAIRS A4A18, A4A20 A4A21 A4A22 A4A23 A4A18, A4A19 A4A21 A4A22 A4A23 A4A18, A4A19 A4A20 A4A21 A4A23 A4A18, A4A19 A4A20 A4A21 A4A23 A4A18, A4A19 A4A20 A4A21 A4A22 A4B32 A4B33 A4B31 A4B33 A4B31 A4B32 NONE NONE NONE A4B38, A4B39, A4B40 A4B37, A4B39, A4B40 A4B37, A4B38, A4B40 A4B37, A4B38, A4B39 NONE NONE
EQUIPMENT/MODULE/PART DESIGNATOR A4A19 NOMENCLATURE Bubble Array 2 FUNCTION Secondary non-volatile mass storage Arrays are interchangeable if reformatted
Secondary non-volatile mass storage Arrays are interchangeable if reformatted
A4A4 A4A5 A4A6
MES/AC 2 MES/AC 3 Synchro/Digital Converter 1
A4A3, A4A5 A4A3, A4A4 A4A7, A4A11 A4A22 Bubble Array 5 A4A21 Bubble Array 4 Secondary non-volatile mass storage Arrays are interchangeable if reformatted
A4A13
ANEW 2
Dual Channel separate receivers common output driver I/O CCA
A4A14
ANEW 3
A4A15
ANEW 4
A4B38
A4A16
ANEW 5
A4B39
A4B40
A4A18
Bubble Array 1
A4B46 A4B47
Figure 4A-13.
Central Computer Module Function and Interchangeability (Sheet 1 of 2)
Change 10
4A-51
NAVAIR 01-75PAC-12
Table 1. Central Computer Module Function and Interchangeability (cont.)
EQUIPMENT/MODULE/PART DESIGNATOR A5C13 A5C14 A5C16 A5C17 A5C18 A5PS1 FL1 NOMENCLATURE Advanced Graphics Processor 1 Monitor Drive Analog 1 Advanced Graphics Processor 2 Monitor Drive Analog 2 Monitor Drive Analog 3 Power Conditioner EMI Filter FUNCTION Link between the GPC and the MDA adapter #1 Interface between AGP and SS-3 Link between the GPC and the MDA adapters #2 and #3 Interface between AGP and TACCO Interface between AGP and Pilot Display Conditioner converts 115 VAC 3 phase to 270 VDC EMI Filter minimizes introduction of external harmonics into DC PS and internal PS harmonics onto the input power line Converts 270 VDC to +5, +12, +15, -15, and -5 VDC A5PS3. A5PS5. A5PS7 A5PS2. A5PS5. A5PS7 A5PS2. A5PS3. A5PS7 A5PS2. A5PS3. A5PS5 IDENTICAL ITEMS FOR ALTERNATE REPAIRS A5C16 A5C17, A5C18 A5C13 A5C14, A5C18 A5C14, A5C17 NONE
A5PS2
Power Regulator Power Regulator Power Regulator Power Regulator
A5PS3
Converts 270 VDC to +5, +12, +15, -15, and -5 VDC
A5PS5
A5PS7
4A-52
Figure 4A-13.
Central Computer Module Function and Interchangeability (Sheet 2 of 2)
SECTION 4B
DATA PROCESSING DISPLAY AND CONTROL SYSTEM
DISPLAY AND CONTROL SYSTEM
DATA PROCESSING
SECTION 4B
NAVAIR 01-75PAC-12
10BASE2 ETHERNET RDSS 10BASE2 ETHERNET
DISCRETES CMP EIA-232 RGB VIDEO EIA-232 DCU USQ-78(V) SYSTEM RADAR INTERFACE UNIT PRINTER
DISCRETES
KG-84C SCSI
NAVIGATION SYSTEM
ELECTRONIC FLIGHT DISPLAY SYSTEM
HARPOON
10/100BASET ETHERNET SCSI HARD DRIVE MVME 2700 (GPC 1) TRANSITION I/O ETHERNET SWITCHER MAU APS-115 RADAR VIDEO
CENTRONICS
EIA-422
TRANSITION RVID I/O
TRANSITION I/O 10BASET
MAU
10 VID BUS
MVME 2700 (GPC 0)
MVME 2700 (GPC 0)
MVME 2700 (GPC 1) NAVMUX/MES-AC
SYNCHRO/ DIGITAL
ARINC 429
ANEW 0
ANEW 3
MMVP 0
MMVP 5
MMVP 4
MMVP 3
MMVP 2
MMVP 1 VME BUS VME BUS
ANEW FSVM 1
ANEW 5
ANEW 4
ANEW 2
ARM/ORD
VDC
DDC
ARM/ORD SYSTEM
EIA-485 FPD RGB VIDEO RGB VIDEO PEP ANK TB PEP ANK TACCO TB PEP ANK SS 3 TB FPD FPD FPD FPD
COMM INTERFACE TWO
EIA-485 RGB VIDEO FLIGHT DEP RGB VIDEO PCHRD RGB VIDEO ORD DEP FLIGHT STATION EIA-485 RGB VIDEO EIA-485 EIA-485 EIA-485
PEP ANK SS 1 TB
PEP ANK SS 2 TB
NAVCOMM
IRDS INTERCONNECTION BOX OR MMIS DIGITAL TO DIGITAL CONVERTER
2 1
CP-1639B/ ALR-66A(V) ESM
DCU USQ-78(V) SYSTEM
NOTE
1 2
Figure 4B-1. DP/DCS Block Diagram
Change 10
4B-1
NAVAIR 01-75PAC-12
DIGITAL DATA COMPUTER MAU VME BUS
10BASE2 ETHERNET
KG-84C MVME 2700 PROCESSOR (GPC 0) ELECTRONIC FLIGHT DISPLAY SYSTEM EFDS J-BOX ARINC 429 ARINC 429 MVME 2700 PROCESSOR (GPC 1) MAG VARIATION MAG HEADING TAS/SIMULATED TAS SIMULATED HEADING SYNCHRO/DIGITAL CONVERTER FROM BARO/ALT TB 435 BARO/ALT ANEW 1 ACOUSTICS ANEW 0 HARPOON HARPOON CP-1138D TRANSITION I/O MODULE EIA-422 SCSI VDC REPLACEMENT DATA STORAGE SYSTEM (RDSS)
NAVIGATION SYSTEM
NAVIGATION INTERCONNECTION BOX
ACOUSTIC PROCESSING SUITE (AN/USQ-78(V))
IRDS PLATFORM
TB 454
AZIMUTH ANGLE ELEVATION ANGLE ANEW 2 COMPUTER MAINTENANCE PANEL 26 VAC DATA LINK
A507 COMM INTERFACE 2
NAVIGATION SYSTEM
TB 453
A/C PITCH (ECA 1) A/C ROLL (ECA 1)
ANEW 3
RADAR
RADAR INTERFACE UNIT

2 AN/AAS-36 IRDS INTERCONNECTION BOX
INS 1 W/GPS
ARINC 575 ANEW 4
IRDS
INERTIAL NAVIGATION SYSTEMS
INS 2 W/GPS
ARINC 575
MMIS
AN/ASX-6 DIGITAL TO DIGITAL 1 CONVERTER
INS 1
ARINC 575 NAVMUX/MES-AC
ANEW 5
ESM
CP-1639B/ALR-66
INS 2 GLOBAL POSITIONING SYSTEM GLOBAL POSITIONING SYSTEM (GPS)
ARINC 575 ARM/ORD CONTROL ARM/ORD SEARCH/WING STORES BOMB BAY STORES IRDS
2
ARINC 575 4 ARINC 575
ARM/ORD TEST PANEL A269 AFT ARM
DP/DCS
TB 435
MARK ON TOP ESM STATUS POWER SUPPLY A275 SRCH STORES
NAVIGATION SYSTEM
NAV INTERCONNECTION BOX
DRIFT ANGLE VALID STATUS AND MODE SELECTION ORD ALERT INS 1/2 NAV MODE/DIGITAL VALID COMPUTER MODE
115VAC 3
A395 FWD ARM
DPS/INS/ HARPOON SYSTEMS
TB 452
POWER DISTRIBUTION BOX CONTROL/STATUS (EIA-232) COMPUTER MAINTENANCE PANEL
115VAC 3
1 2 3 4
NOTE
AIRCRAFT INCORPORATING AFC 705 AIRCRAFT NOT INCORPORATING AFC 705 AIRCRAFT INCORPORATING AFC 719 AIRCRAFT NOT INCORPORATING AFC 719
MAGNETIC ANOMALY DETECTION SYSTEM
TB 433
SAD MARK
4B-2
Change 12
Figure 4B-2. DDC Simplified Block Diagram
NAVAIR 01-75PAC-12
(RACK C3) 962982 IRDS INTERCONNECTION BOX 7 A 2J108 GIMBAL CONTROL 2J109 CMPT/MAN TRACK (SEE NAVAIR 01-75PAC- -5) -12(FS 525) TB435 (PILOT CONTROL WHEEL) TB458 (FS 197) TB6 (FS 288) P/J292 MARK-ON-TOP (FS 525) TB435
(PILOT CONTROL WHEEL) 672243 MARK-ON-TOP SWITCH (SEE NAVAIR 01-75PAC- -1) -12-
27P
(RACK G1) CP-1639B/ALR-66A(V) PROCESSOR INTERFACE (PI) 7J3 ESM STATUS (SEE NAVAIR 01-75PAC- -5) -12-
(COPILOT CONTROL WHEEL) 672243 MARK-ON-TOP SWITCH (FS 525) TB435 (SEE NAVAIR 01-75PAC- -1) -12(SS 2)
28P
(COPILOT CONTROL WHEEL) TB457
(RACK D1) 673986 DIGITAL DATA UNIT (DDU) J3 INS 1 NAV MODE/ DIGITAL VALID J4 (SEE NAVAIR 01-75PAC- -3) -12INS 2 NAV MODE/ DIGITAL VALID
(FS 440) TB452
C-9801/AWG-19(V)1 CONTROL DISTRIBUTION BOX (CDB) (RACK B1) NAVIGATION INTERCONNECTION BOX (NAV INTERCONNECTION BOX) (SEE NAVAIR 01-75PAC- -6) -12(SS 3) MX-8109/ASA-71 MAD UNIT NUMBER 2 SELECTOR CONTROL
J6 COMPUTER MODE (RACK C3) TB433 SAD MARK C
2J1
1J17 TAC STEERING VALID INS STATUS DATA (SEE NAVAIR 01-75PAC- -1) -1212 VDC UNREG
(NAVCOM) AAU-28A SERVOED BAROMETRIC ALTIMETER (BARO ALT) J1 J2
(RACK C1) CPK-28/A24G- TRUE -9 AIRSPEED COMPUTER (TAS COMPUTER)
(THIS SHEET)
(RACK D2) CP-2451/ASQ-227(V) DIGITAL DATA COMPUTER (DDC) (SEE NAVAIR 01-75PAC- -3) -12(SEE NAVAIR 01-75PAC- -3) -12-
(RACK D1) A511 POWER DISTRIBUTION BOX 2J4 ORD ALERT 12 VDC UNREG (RACK D2) (FS 440) TB452 J21 J5 A2J8 STATUS/DATA C-12639/ASQ-227(V) COMPUTER MAINTENANCE PANEL (CMP)
26 VAC
(RACK C3) 962982 IRDS INTERCONNECTION BOX (RACK B2) TB454 26 VAC 2J109
A
(THIS SHEET) (SEE NAVAIR 01-75PAC- -2) -12J22 26 VAC J1 7 (SEE NAVAIR 01-75PAC- -5) -12-
NOTE
1 2 3 4 5 6 7 8
AIRCRAFT INCORPORATING AFC 672 AIRCRAFT INCORPORATING AFC 706 AIRCRAFT INCORPORATING AFC 563 AIRCRAFT INCORPORATING AFC 568 AIRCRAFT WITH AFC 563 AND AFC 568 REMOVED AIRCRAFT INCORPORATING AFC 705 AIRCRAFT NOT INCORPORATING AFC 705 AIRCRAFT NOT INCORPORATING AFC 719
J3 12 VDC UNREG (FS 525) TB435
26 VAC SYNCHRO EXCITATION
Figure 4B-3. DDC Signal Flow Diagram (Sheet 1 of 3)
Change 12
4B-3
NAVAIR 01-75PAC-12
A (RACK D2) CP-2451/ASQ-227(V) DIGITAL DATA COMPUTER (DDC) (RACK G1) CP-1639B/ALR-66A(V) PROCESSOR INTERFACE (PI) (SEE NAVAIR 01-75PAC- -5) -127J3 DATALINK OUTPUT DATA AND CONT J9 DATALINK INPUT DATA AND CONT J3 HARPOON DATA J4 HARPOON COMMANDS J1 CMPT/MAN TRACK ESM STATUS TAC STEERING VALID C MARK-ON-TOP INS 1 NAV MODE/ DIGITAL VALID INS 2 NAV MODE/ DIGITAL VALID COMPUTER MODE OFF LINE SAD MARK INS STATUS DATA ORD ALERT STATUS 2J8 CONTROL (SEE NAVAIR 01-75PAC- -6) -12J8 ARM/ORD CONTROL (SS 3) 10093201 DIGITAL TO DIGITAL CONVERTER 6 J1 MMIS DATA AND CONT J2 (SEE NAVAIR 01-75PAC- -5) -12MMIS DATA AND CONT (RACK H1/H2) J18 J15 J2 ETHERNET J4 (RACK D3) 9700822 REPLACEMENT DATA STORAGE SYSTEM (RDSS) J3 (SECTION 9) 8 (SEE NAVAIR 01-75PAC- -3) -12(SEE NAVAIR 01-75PAC- -6) -12(RACK C2) R-2332/AR GPS RECEIVER 7J1 STATUS (RACK B1) 2J9 A395 FORWARD ARMAMENT INTERCONNECTION BOX (RACK F2) SB-3152/AYA-8 ELECTRICAL TEST PANEL (ARM/ORD TEST PANEL) (SEE NAVAIR 01-75PAC- -6) -12J11 STATUS (SEE NAVAIR 01-75PAC- -6) -126J6 (SEE NAVAIR 01-75PAC- -8) -125J9 (SS 1) A269 AFT ARMAMENT INTERCONNECTION BOX J6 INPUT DATA AND CONT J4 OUTPUT DATA AND CONT (RACK G2) A275 SEARCH STORES INTERCONNECTION BOX (SEE NAVAIR 01-75PAC- -6) -12J3 1J2 (RACK B2) CP-1138(D)(V)1/UYK DATA PROCESSOR COMPUTER (DPC) (RACK E1C) CP-2435/USQ-78(V), CP-2560/USQ-78(V) 1 OR 2 CP-2590/USQ-78(V) DISPLAY COMPUTER (DCU) 7J2 (RACK B3) A507 COMMUNICATIONS INTERFACE NUMBER 2 (COMM INTERFACE 2)
J16 ESM DATA AND CONTROL
7J3
J15 GIMBAL CONTROL B 7
J10
J7
J14
TJ102-1 ARINC 575 ARINC 575 ARINC 575 J2B (RACK H1) INERTIAL NAVIGATION UNIT (INU 1)
SW LOAD XXXXXX-XXX (VER. RINU_XXX
J1B
(RACK H1) J/P648 BINARY DATA, CLK AND SYNC NAV DISCRETE
(RACK D1) J1 673986 DIGITAL DATA UNIT (DDU)
J1A
(SEE NAVAIR 01-75PAC- -3) -12TJ102-2 ARINC 575 ARINC 575 ARINC 575 J2B (RACK H1) INERTIAL NAVIGATION UNIT (INU 2)
SW LOAD XXXXXX-XXX (VER. RINU_XXX
J1A NAV DISCRETE J1B BINARY DATA, CLK AND SYNC
J2
SEE DETAIL A AND B

(SHEET 3)
4B-4
Change 12
NAVAIR 01-75PAC-12
(RACK D2) CP-2451/ASQ-227(V) DIGITAL DATA COMPUTER (DDC)
(RACK B1) NAVIGATION INTERCONNECTION BOX (NAV INTERCONNECTION BOX) 1J23 SYNCHRO CONVERTER MAG VAR SYNCHRO CONVERTER TAS/SIM TAS
J20
SYNCHRO CONVERTER MAG HEADING SYNCHRO CONVERTER SIM HEADING (RACK D3) CD-155/ASQ-227(V) VIDEO DISTRIBUTION CONTROLLER (VDC) A1J6 SCSI INTERFACE (RACK B1) AM-4923/A ELECTRONIC CONTROL AMPLIFIER (ECA-1) J2 (RACK B2) TB453 INS/SIM PITCH INS/SIM ROLL A1J6
(NAVCOMM STATION) AAU-28/A SERVOED BAROMETRIC ALTIMETER (BARO ALT) (SEE NAVAIR 01-75PAC- -3) -12J2 (FS 525) TB435 SYNC ALTIMETER TRANSMITTER J13 RADAR DATA (SEE NAVAIR 01-75PAC- -5) -121J2 (RACK C3) MX-7974/ASA-69 RADAR INTERFACE UNIT (RIU)
(RACK C3) 962982 IRDS INTERCONNECTION BOX 2J109 7
(RACK B2) TB454 AZIMUTH ELEVATION J19 ARINC 429 J5 (CENTER PEDESTAL) E10-19446-1 EFDS TERMINAL JUNCTION BOX (EFDS J-BOX)
(SEE NAVAIR 01-75PAC- -1) -12(RACK H1/H2) (RACK H1/H2) ARINC 575 J2B ARINC 575 TJ102-1 (RACK H1/H2) ARINC 575 ARINC 575 J2B ARINC 575 TJ102-1 (RACK H1/H2) CONTROL DISCRETES J1 (RACK H1/H2) (RACK H1/H2) A2J23 TELETYPE/ EIA-422
J18
J18
(RACK C2) J3 KG-84B SECURITY UNIT
TJ102-3 (RACK H1/H2) ARINC 575
(SEE NAVAIR 01-75PAC- -3) -12(NAVCOMM) C-11828/U REMOTE CONTROL UNIT (RCU)
J2B TJ102-4 5 6 ARINC 575 TJ102-2 3 4 6 TJ102-3 ARINC 575 TJ102-2
J2B
DETAIL A
DETAIL B
Change 10
4B-5
NAVAIR 01-75PAC-12
(RACK D2) (RACK C3) TB433 MAD SYSTEM (FS 525) TB435 PILOT/COPILOT CONTROL WHEEL C2 C3 C11 5 IRDS INTERCONNECTION BOX C10 C13 C14 C26 (FS 440) TB452 POWER DISTRIBUTION BOX D15 A4 A5 A6 INS DDU A7 A13 A14 A11 A12 C27 C11 C12 SAD MARK SAD MARK RTN J1 60 61 24 25 76 77 78 79 84 85 INTERFACES TO AIRCRAFT NAV SYSTEM AND INTERFACES TO DISCRETE AIRCRAFT SWITCH CLOSURES AND STATUS INDICATORS D2 GPC 2 ETHERNET MEDIUM ATTACHMENT UNIT (MAU) PROVIDES IEEE 802.3 STANDARD COMPLIANT ETHERNET TRANSCEIVERS FOR A 10 MBPS INTERFACE WITH RDSS J2 SCSI D1 GPC 1 TRANSITION I/O MODULE MULTIPLEXES SIGNALS BETWEEN MVME 2700 PROCESSOR AND STANDARD PROTOCOL INTERFACES A2J23 TELETYPE A1J6 (RACK D3) 65 A1J6 VDC 14 J3 DDC D6 NAVMUX/MES-AC VME BUS (RACK C2) KG-84B A
MARK-ON-TOP MARK-ON-TOP RTN IRDS CMPT TRACK IRDS CMPT TRACK RTN IRDS MAN TRACK IRDS MAN TRACK RTN ESM STATUS ESM STATUS RTN
PRIMARY PROCESSING RESOURCE AND GLOBAL MEMORY
PRIMARY PROCESSING RESOURCE AND GLOBAL MEMORY
ESM SYSTEM
10BASE2 ETHERNET 3
ORD ALERT INS 1 DIGITAL VALID INS 1 DIGITAL VALID RTN INS 1 NAV MODE INS 1 NAV MODE RTN INS 2 NAV MODE INS 2 NAV MODE RTN INS 2 DIGITAL VALID INS 2 DIGITAL VALID RTN
1 32 33 28 29 36 37 38 39
(RACK D3) RDSS J4
J21 J5
(RACK D2) CMP
A2J8 EIA-232
25
E12 HACLCS (RACK B1) NAV INTERCONNECTION BOX 1J17 F A ZP ZN D ZE ZF ZC ZD Y Z W X G H S T J K U V ZI ZJ E13
CMPTR MODE CMPTR MODE RTN
46 47
D8
(CENTER PEDESTAL) ARINC 429 J19 2 ARINC 429 TERMINAL JUNCTION #2 (RACK H1/H2) TJ102-1 J5 EFDS J-BOX
INTERFACES BETWEEN DDC AND EFDS
FLY TO DISTANCE VALID 1000 MILE SHUTTER OPEN BEARING VALID COMPUTER DRIFT ANGLE VALID TAC STEERING VALID SYS STAT-INS 1 SYS STAT-INS 1 RTN SYS STAT-INS 2 SYS STAT-INS 2 RTN ATT ATT RTN HDG HDG RTN HDG HDG RTN SEL SEL RTN EHSI/EFDI TAC/NAV MODE SELECT EHSI/EFDI TAC/NAV MODE SELECT RTN FLIGHT STATION INERTIAL SW FLIGHT STATION INERTIAL SW RTN COMPUTER TRACK COMPUTER TRACK RTN
9 10 11 12 13 34 35 40 41 42 43 44 45 48 49 50 51 30 31 52 53 62 63
(RACK H1) INU 1 J2B
D6
NAVMUX/MES-AC
J18 ARINC 575
INTERFACES TO AIRCRAFT NAV SYSTEM AND INTERFACES TO DISCRETE AIRCRAFT SWITCH CLOSURES AND STATUS INDICATORS
ARINC 575
TJ102-2
(RACK H1) INU 2 J2B
SEE DETAIL A AND B

(SHEET 3)
5 J3 (RACK C2) GPS RECEIVER
NOTE
1 2 3 4 5
4B-6
Change 12
Figure 4B-4. DDC Functional Signal Flow Diagram (Sheet 1 of 3)
AIRCRAFT INCORPORATING AFC 563 AIRCRAFT INCORPORATING AFC 568 AIRCRAFT WITH AFC 563 AND AFC 568 REMOVED AIRCRAFT INCORPORATING AFC 705 AIRCRAFT NOT INCORPORATING AFC 705 AIRCRAFT NOT INCORPORATING AFC 719
NAVAIR 01-75PAC-12
(RACK D2) DDC (CONT) A (RACK D1) A511 POWER DISTRIBUTION BOX 2J2 H A B 115 VAC 400 Hz O A 115 VAC 400 Hz O B 115 VAC 400 Hz O C A B C D H VME BUS D15 ANEW 0 (RACK B2) J3 30 1J2 HARPOON DATA HARPOON COMMANDS (RACK E1) J6 79 J3 APS INPUT DATA J4 APS OUTPUT DATA DCU DPC
J31
POWER SUPPLY PROVIDES: +5 VDC 125 AMPS, +12 VDC 9 AMPS (FAN), -12 VDC 2 AMPS, +12 VDC 2 AMPS.
PROVIDES INTERFACE BETWEEN DDC AND HARPOON SYSTEM
J4
30
D16
ANEW 1
(RACK B1) NAV INTERCONNECTION BOX 1J23 K M L A C B D F E G J H (RACK B2) TB453 B17 B19 B21 CENTRAL REPEATER SYSTEM B23 B24 B25
NEUTRAL CHASSIS GND J20 D5 MAG VAR S1 MAG VAR S2 MAG VAR S3 MAG HDG S1 MAG HDG S2 MAG HDG S3 TAS/SIM TAS S1 TAS/SIM TAS S2 TAS/SIM TAS S3 SIM HDG S1 SIM HDG S2 SIM HDG S3 1 2 3 5 6 7 9 10 11 14 15 16 CONVERTS SYNCHRO INPUTS FROM NAV SYSTEM, BARO ALT, IRDS, AND NAV SIM TO DIGITAL FORMAT SYNCHRO/DIGITAL CONVERTER
PROVIDES INTERFACE BETWEEN DDC AND APS SYSTEM
J7
79
(RACK B3) D17 ANEW 2 J10 DATALINK OUTPUT DATA AND CONTROL J9 DATALINK INPUT DATA AND CONTROL (RACK C3) D18 RIU J13 RADAR DATA 28 1J2 ANEW 3 PROVIDES INTERFACE BETWEEN DDC AND RADAR SYSTEM 79 7J3 A507 COMM INTERFACE 2
PROVIDES INTERFACE BETWEEN DDC AND DATA LINK
79
7J2
(RACK C3) PITCH S1 PITCH S2 PITCH S3 ROLL S1 ROLL S2 ROLL S3 18 19 20 22 23 24 D20 ANEW 5 (RACK G1) PI J16 ESM DATA AND CONTROL 28 7J3 5 6J6 J15 IRDS SERVO DATA 2J108
5
J1
5
(SS 3) DIGITAL TO DIGITAL CONVERTER

4
D19
ANEW 4
26
IRDS INTERCONNECTION BOX
J2
PROVIDES INTERFACE BETWEEN DDC AND IRDS SYSTEM
73 J14 MMIS DATA AND CONTROL MMIS DATA AND CONTROL 73

4
(RACK G2) A275 SEARCH STORES INTERCONNECTION BOX
(RACK B2) TB435 F24 BARO ALT F25 F26 (RACK B2) TB454 A23 A24 A25 IRDS INTERCONNECTION BOX
5
BARO ALT S1 BARO ALT S2 BARO ALT S3
27 28 29
PROVIDES INTERFACE BETWEEN DDC AND ESM SYSTEM
(SS 1) 5J9 A269 AFT ARMAMENT INTERCONNECTION BOX
11 J11 D7 ARM/ORD PROVIDES INTERFACE BETWEEN DDC AND ARM/ORD SYSTEM J8 CONTROL (RACK F2) ARM/ORD TEST PANEL 25 STATUS STATUS STATUS CONTROL 21
ELEVATION S1 ELEVATION S2 ELEVATION S3 AZIMUTH S1 AZIMUTH S2 AZIMUTH S3
31 32 33 35 36 37 VME BUS
(RACK B1) 2J9 A395 FORWARD ARMAMENT INTERCONNECTION BOX
2J8
A27 A28 A29
80
7J1
017-8077
Change 10
4B-7
NAVAIR 01-75PAC-12
(RACK H1/H2) J18 ARINC 575 TJ102-3 TJ102-1 ARINC 575 TJ102-4 TJ102-1 J2B ARINC 575 J2B J18 ARINC 575
(RACK H1/H2)
J2B TJ102-4 TJ102-1
TJ102-3 TJ102-1 J2B
DETAIL A
DETAIL B
4B-7A/(4B-7B blank)
Change 10
NAVAIR 01-75PAC-12
VIDEO DISTRIBUTION CONTROLLER (VDC) MAU
10BASE2 ETHERNET
RDSS
HARD DRIVE
SCSI TRANSITION I/O MODULE MVME 2700 PROCESSOR (GPC 1) MVME 2700 PROCESSOR (GPC 0) TRANSITION I/O MODULE SCSI EIA-232D EIA-232D CENTRONICS EIA-232D A2J16 SPARE A2J23 SPARE PRINTER CMP TTL DISCRETE I/F DDC
POWER DISTRIBUTION
TACCO POWER CONTROL
ETHERNET ETHERNET OVERTEMP VME BUS EIA-422
SS 2 DISPLAY ACOUSTIC 1 VIDEO ACOUSTIC 2 VIDEO EIA-343A RGB INPUTS EIA-343A RGB INPUTS SS 1 DISPLAY FSVM EIA-343A RGB OUTPUTS SS 3 DISPLAY TACCO DISPLAY NAVCOMM DISPLAY ETHERNET SWITCHER 10 VID BUS EIA-343A RGB & SELECTS EIA-170 RGB PILOT DISPLAY
ACOUSTIC PROCESSING SUITE
DCU
10/100BASET ETHERNET
10/100BASET ETHERNET A1J4 (SPARE)
MMVP 5
EIA-343A RGB EIA-485
SS 2 PEP, ANK, TB
MMVP 4
EIA-343A RGB EIA-485 SS 1 PEP, ANK, TB
MMVP 3 Y DEFLECTION X DEFLECTION RIU VIDEO UNBLANK RVID MMVP 1 MMVP 2
EIA-343A RGB EIA-485
SS 3 PEP, ANK, TB
RADAR SYSTEM
EIA-343A RGB EIA-485 TACCO PEP, ANK, TB
EIA-343A RGB EIA-485 NAVCOMM PEP, ANK, TB
MMVP 0
EIA-170 RGB EIA-485 PILOT & ORDNANCE DEP
4B-8
Figure 4B-5. VDC Simplified Block Diagram
NAVAIR 01-75PAC-12
(RACK D3) (FLIGHT STATION INSTRUMENT PANEL) 80-5170 PILOT COLOR HIGH RESOLUTION DISPLAY (PCHRD) J3 (NAVCOMM ) CONSOLE (FLIGHT STATION CENTER CONSOLE) 2000 DATA ENTRY PANEL (DEP) J2 79C3015-00 FLAT PANEL DISPLAY (FPD) J2 EIA-343 RGB VIDEO J3 J3 EIA-485 700101 PROGRAMMABLE ENTRY PANEL (PEP) EIA-170 RGB VIDEO EIA-485 A3J1 J2 A3J3 RADAR Y-DEFLECTION EIA-485 A3J4 RADAR X-DEFLECTION (SEE NAVAIR 01-75PAC-12-5) 1J7 RADAR VIDEO 1J6 J1 CD-155/ASQ-227(V) VIDEO DISTRIBUTION CONTROLLER (VDC) A3J2 RADAR UNBLANK 1J8 (RACK C3) MX-7974/ASA-69 RADAR INTERFACE UNIT (RIU) 1J9
(RACK F2) 2000 DATA ENTRY PANEL (DEP)
J2
(TACCO) CONSOLE 79C3015-00 FLAT PANEL DISPLAY (FPD) J2 EIA-343 RGB VIDEO J3 EIA-485 J31 115 VAC 3 700101 PROGRAMMABLE ENTRY PANEL (PEP) (SS 3) CONSOLE 79C3015-00 FLAT PANEL DISPLAY (FPD) J2 EIA-343 RGB VIDEO J3 J4 A1J2 CENTRONICS INTERFACE EIA-485 A1J6 SCSI INTERFACE A1J6 (RACK D2) CP-2451/ASQ-227(V) DIGITAL DATA COMPUTER 2J4 (RACK D1) A511 POWER DISTRIBUTION BOX J3 (RACK D1) DPS ELECTRONIC CIRCUIT BREAKER PANEL 2J9 VDC A B C
(SEE NAVAIR 01-75PAC-12-2) (NAVCOMM) J2 PT-540(V)7/U HARD COPY RECORDER (HCR) OR TP-4840 THERMAL PRINTER
700101 PROGRAMMABLE ENTRY PANEL (PEP)
A2J8 EIA-232D INTERFACE (RACK D2) (TACCO) TACCO POWER CONTROL

POWER CONTROL
J45 DISCRETES J21 EIA-422 VDC OVERTEMP
C-12639/ASQ-227(V) COMPUTER MAINTENANCE PANEL
VDC OV TEMP VDC ARM/ORD PNL DDC
1J2
OFF SEI
OFF OFF RDSS BARO ALT DR VIDEO R
OFF
OFF
OFF
OFF
ANT COMB DAMA MATT OASIS TDP MINI
OFF
OFF
OFF
OFF
(SEE NAVAIR 01-75PAC-12-2) J2
Figure 4B-6. VDC Signal Flow Diagram (Sheet 1 of 2)
4B-9
NAVAIR 01-75PAC-12
(RACK E1C) (RACK D3) SS 1 I/O CONNECTOR PANEL (SS 1) 79C3015-00 FLAT PANEL DISPLAY (FPD) J1 EIA-343 RGB VIDEO RED J3 EIA-343 RGB VIDEO GREEN J5 EIA-343 RGB VIDEO BLUE EIA-343 RGB VIDEO J33 EIA-343 RGB VIDEO RED EIA-343 RGB VIDEO GREEN J3 EIA-485 J3 P3 EIA-485 A1J3 (SS 2) 79C3015-00 FLAT PANEL DISPLAY (FPD) J2 J1 EIA-343 RGB VIDEO RED J3 EIA-343 RGB VIDEO GREEN J5 EIA-343 RGB VIDEO BLUE EIA-343 RGB VIDEO (SEE NAVAIR 01-75PAC-12-8) J6 P2 ETHERNET DATA EIA-343 RGB VIDEO BLUE ACOUSTIC 2 VIDEO J5 EIA-343 RGB VIDEO GREEN EIA-343 RGB VIDEO BLUE J13 J1 P1 CD-155/ASQ-227(V) VIDEO DISTRIBUTION CONTROLLER (VDC) J32 EIA-343 RGB VIDEO RED ACOUSTIC 1 VIDEO J12 CP-2435/USQ-78(V), 1 CP-2560/USQ-78(V) OR 2 CP-2590/USQ-78(V) DISPLAY COMPUTER (DCU)
(SS 1) 700101 PROGRAMMABLE ENTRY PANEL (PEP)
J18
(SS 2) 700101 PROGRAMMABLE ENTRY PANEL (PEP) J3 EIA-485 J7 P7 EIA-485
NOTE
1 2
AIRCRAFT INCORPORATING AFC 672 AIRCRAFT INCORPORATING AFC 706
(RACK D2) CP-2451/ASQ-227(V) DIGITAL DATA COMPUTER (DDC)
(RACK D3) REPLACEMENT DATA STORAGE SYSTEM (RDSS)
J2 ETHERNET DATA
J4
J5 ETHERNET DATA (SEE SECTION 9C)
J41
4B-10
Change 4
Figure 4B-6. VDC Signal Flow Diagram (Sheet 2 of 2)
NAVAIR 01-75PAC-12
(RACK D3) VDC
VID BUS VME BUS V15 ETHERNET SWITCHER CENTRAL COMPONENT OF ETHERNET HUB V15 ETHERNET SWITCHER CENTRAL COMPONENT OF ETHERNET HUB (FLT STA) PCHRD J3 6 5 4 (RACK F2) DEP J2 1 2 3 4 5 6 H EIA-485 CLK L EIA-485 CLK H EIA-485 DATA L EIA-485 DATA J3 1 2 3 4 5 6 EIA-170 VIDEO BLUE EIA-170 VIDEO GREEN EIA-170 VIDEO RED (FLT STA) DEP J2 1 2 3 4 5 6 H EIA-485 CLK L EIA-485 CLK H EIA-485 DATA L EIA-485 DATA 1 2 3 4 J1 A1 A2 A3 V18 FSVM J3 A1 A2 A3 EIA-343 VIDEO BLUE EIA-343 VIDEO GREEN EIA-343 VIDEO RED V18 FSVM J2 A B C G
A B
(TACCO) CONSOLE B J5 J3
FPD
DETERMINES WHICH VIDEO SOURCE IS CURRENTLY DISPLAYED V8 MMVP 0
R J1
ACCEPTS GRAPHIC COMMANDS AND INSTRUCTIONS FROM THE GPCS AND CONVERTS COMMANDS INTO BIT IMAGES FOR DISPLAY AT PCHRD AND ORDNANCE AND FLIGHT STATION DEP.
J3 1 2 3 4 H EIA-485 CLK L EIA-485 CLK H EIA-485 DATA L EIA-485 DATA 1 2 3 4
J3 1 2 3 4
PEP
PASSES OPERATOR REQUESTS TO THE GPCS.
ACCEPTS GRAPHIC COMMANDS AND INSTRUCTIONS FROM THE GPCS AND CONVERTS COMMANDS INTO BIT IMAGES FOR DISPLAY AT TACCO FPD AND PEP. PASSES OPERATOR REQUESTS TO THE GPCS.
(NAVCOMM) CONSOLE FPD J5 J3 J2 A B C V18 J2 EIA-343 VIDEO BLUE EIA-343 VIDEO GREEN PEP 1 2 3 4 J3 1 2 3 4 J3 EIA-343 VIDEO RED H EIA-485 CLK L EIA-485 CLK H EIA-485 DATA L EIA-485 DATA A1 A2 A3 1 2 3 4 V18 FSVM FSVM DETERMINES WHICH VIDEO SOURCE IS CURRENTLY DISPLAYED J4 A1 A2 A3 V15 ETHERNET SWITCHER B G CENTRAL COMPONENT OF ETHERNET HUB V15 ETHERNET SWITCHER CENTRAL COMPONENT OF ETHERNET HUB EIA-343 VIDEO BLUE EIA-343 VIDEO GREEN EIA-343 VIDEO RED J2 A B C
(SS 3) CONSOLE
B G R
J5 J3 J1
FPD
J1 R
V11 ACCEPTS GRAPHIC COMMANDS AND INSTRUCTIONS FROM THE GPCS AND CONVERTS COMMANDS INTO BIT IMAGES FOR DISPLAY AT NAVCOMM FPD AND PEP. VID BUS PASSES OPERATOR REQUESTS TO THE GPCS.
MMVP 3 1 2 3 4 H EIA-485 CLK L EIA-485 CLK H EIA-485 DATA L EIA-485 DATA
J3 1 2 3 4
J3 1 2 3 4
PEP
ACCEPTS GRAPHIC COMMANDS AND INSTRUCTIONS FROM THE GPCS AND CONVERTS COMMANDS INTO BIT IMAGES FOR DISPLAY AT SS 3 FPD AND PEP. VME BUS
Figure 4B-7. VDC Functional Signal Flow Diagram (Sheet 1 of 5)
4B-11
NAVAIR 01-75PAC-12
(RACK D3) VDC (CONT)
VID BUS
VME BUS
V15 ETHERNET SWITCHER (SS 1) CONSOLE SS 1 PEP I/O PANEL J1 P1 J1 EIA-343 RGB VIDEO RED J3 EIA-343 RGB VIDEO GREEN J5 EIA-343 RGB VIDEO BLUE C C EIA-343 RGB VIDEO B A CENTRAL COMPONENT OF ETHERNET HUB
J5 EIA-343 RGB VIDEO A3 V18 FSVM
(RACK E1C) DCU
FPD
EIA-343 RGB VIDEO
A2
DETERMINES WHICH VIDEO SOURCE IS CURRENTLY DISPLAYED
V18
FSVM
J32 A1 EIA-343 RGB VIDEO RED EIA-343 RGB VIDEO GREEN EIA-343 RGB VIDEO BLUE
J12 A B C J13 EIA-343 RGB VIDEO RED EIA-343 RGB VIDEO GREEN EIA-343 RGB VIDEO BLUE A B C
PEP
J3 1 2 3 4 H EIA-485 CLK L EIA-485 CLK H EIA-485 DATA L EIA-485 DATA
J3 1 2 3 4
P3 1 2 3 4 H EIA-485 CLK L EIA-485 CLK H EIA-485 DATA L EIA-485 DATA
MMVP 4 A1 V12 ACCEPTS GRAPHIC COMMANDS AND INSTRUCTIONS FROM THE GPCS AND CONVERTS COMMANDS INTO BIT 1 IMAGES FOR DISPLAY AT SS 1 FPD AND PEP. 2 3 4 PASSES OPERATOR REQUESTS TO THE GPCS.
DETERMINES WHICH VIDEO SOURCE IS CURRENTLY DISPLAYED
A2 A3 J33 A1 A2 A3
V15 ETHERNET SWITCHER (SS 2) CONSOLE FPD J1 EIA-343 RGB VIDEO RED J3 EIA-343 RGB VIDEO GREEN J5 EIA-343 RGB VIDEO BLUE C C EIA-343 RGB VIDEO A1 B A J2 P2 J6 V18 A EIA-343 RGB VIDEO A3 FSVM DETERMINES WHICH VIDEO SOURCE IS CURRENTLY DISPLAYED V13 MMVP 5 CENTRAL COMPONENT OF ETHERNET HUB
V15 ETHERNET SWITCHER CENTRAL COMPONENT OF ETHERNET HUB
A1J3 ETHERNET DATA
J18
(RACK D3) J41 MAU ETHERNET DATA J5 RDSS
EIA-343 RGB VIDEO
A2
PEP
J3 1 2 3 4 H EIA-485 CLK L EIA-485 CLK H EIA-485 DATA L EIA-485 DATA
J7 1 2 3 4
P7 1 2 3 4 H EIA-485 CLK L EIA-485 CLK H EIA-485 DATA L EIA-485 DATA 1 2 3 4
ACCEPTS GRAPHIC COMMANDS AND INSTRUCTIONS FROM THE GPCS AND CONVERTS COMMANDS INTO BIT IMAGES FOR DISPLAY AT SS 2 FPD AND PEP.
VID BUS
VME BUS
4B-12
NAVAIR 01-75PAC-12
VID BUS
VME BUS
(RACK C3) RIU 1J9 O C I A3J2 O C I V21 RVID TRANSITION I/O MODULE PROVIDES ELECTRICAL CONVERSION NECESSARY TO CONNECT THE GPC I/O SIGNALS TO PERIPHERAL 1J8 O C I A3J1 O RADAR VIDEO C I RECEIVES 4 RADAR SIGNALS AND CONVERTS THEM TO 10VIDBUS DIGITAL MONOCHROME VIDEO FORMAT. THE OUTPUT IS MADE AVAILABLE TO THE MMVP ON THE 10VIDBUS. EQUIPMENT. INTERFACES INCLUDE FOUR SERIAL INTERFACES, ONE SCSI, ONE PARALLEL PRINTER INTERFACE, AND ONE ETHERNET PORT. A1J6 6 7 8 9 10 11 12 13 14 15 21 22 23 24 25 26 27 28 29 O RADAR Y-DEFLECTION C I 30 31 40 41 42 43 44 45 46 47 48 1J7 O C I A3J4 O RADAR X-DEFLECTION C I 50 55 57 58 59 60 61 62 63 64 VME BUS SCSI ID 2 RETURN RETURN RETURN RETURN RETURN RETURN RETURN RETURN RETURN SCSI ID 0 GROUND RETURN RETURN RETURN RETURN RETURN RETURN RETURN RETURN SCSI ID 1 GROUND RETURN DATA BUS (BIT 0) DATA BUS (BIT 1) DATA BUS (BIT 2) DATA BUS (BIT 3) DATA BUS (BIT 4) DATA BUS (BIT 5) DATA BUS (BIT 6) DATA BUS (BIT 7) DATA BUS (PARITY) SCSI ID 2 GROUND ATTENTION BUS BUSY ACKNOWLEDGE RESET MESSAGE SELECT DATA/COMMAND REQUEST OUTPUT/INPUT A1J6 24 1 3 5 7 9 11 13 15 17 19 31 35 37 39 41 43 45 47 21 49 2 4 6 8 10 12 14 16 18 23 32 36 38 40 42 44 46 48 50
(RACK D2) DDC
RADAR UNBLANK
1J6 O C I
A3J3
4B-13
NAVAIR 01-75PAC-12
VME BUS HARD DRIVE PROVIDES MAGNETIC MEDIA STORAGE CAPACITY FOR THE VDC.
V1
GPC 0
PROVIDES CENTRAL PROCESSING CAPABILTY
VME BUS
SCSI
X1 TRANSITION I/O PROVIDES INTERFACE BETWEEN GPC 1 AND THE HARD DRIVE.
V15
ETHERNET SWITCHER ETHERNET
CENTRAL COMPONENT OF ETHERNET HUB V2 GPC 1 PROVIDES CENTRAL PROCESSING CAPABILTY
VME BUS VME BUS
4B-14
NAVAIR 01-75PAC-12
(RACK D3) VDC (CONT) V18 FSVM J21 5 6 A VME BUS VDC OVERTEMP H VDC OVERTEMP L 1J2 D V VDC OV TEMP (TACCO STA) TACCO POWER CONTROL
PROVIDES 12 EIA-422A INPUT (RACK D2) CMP DISCRETE RECEIVERS AND 8 EIA-422A OUTPUT DISCRETE DRIVERS. IT ALSO PROVIDES FOR 8 TTL INPUT DISCRETES AND FOR 16 TTL OUTPUT DISCRETES. J2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 REMOTE MC SET REMOTE MC RESET VDC BIT FAULT 1 +5 VDC VDC BIT FAULT 2 +5 VDC POWER GOOD OUT 1 +5 VDC VDC OVERTEMP 1 VDC OVERTEMP 2 IBIT SIG GND EBIT SIG GND A2J8 16 15 18 17 19 TXD EIA-232D RCV EIA-232D SIG GND CTS DTR 2 3 7 4 5 J45 1 9 2 10 3 11 4 12 5 13 6 14 7 15 PROVIDES 12 EIA-422A INPUT DISCRETE RECEIVERS AND EIA-422A OUTPUT DISCRETE DRIVERS. IT ALSO PROVIDES FOR 8 TTL INPUT DISCRETES AND FOR 16 TTL OUTPUT DISCRETES. FSVM V18 A1J2 1 2 3 4 5 6 7 8 9 10 11 12 13 15 16 X1 TRANSITION I/O MODULE X1 TRANSITION I/O MODULE 18 19 20 21 22 23 24 25
CHASSIS GND
(NAVCOMM) PRINTER J2 DATA STROBE DATA BIT 0 DATA BIT 1 DATA BIT 2 DATA BIT 3 DATA BIT 4 DATA BIT 5 DATA BIT 6 DATA BIT 7 DATA ACKNOWLEDGE BUSY PAPER ERROR SELECT FAULT INPUT PRIME DATA STROBE RTN DATA BIT 0 RTN DATA BIT 1 RTN DATA BIT 2 RTN DATA BIT 3 RTN DATA BIT 4 RTN DATA BIT 5 RTN DATA BIT 6 RTN DATA BIT 7 RTN DATA ACKNOWLEDGE RTN BUSY RTN PAPER ERROR RTN GROUND GROUND 1 2 3 4 5 6 7 8 9 10 11 12 13 32 31 19 20 21 22 23 24 25 26 27 28 29 30 16 33
PROVIDES ELECTRICAL CONVERSION NECESSARY TO CONNECT THE GPC I/O SIGNALS TO PERIPHERAL EQUIPMENT. INTERFACES INCLUDE FOUR SERIAL INTERFACES, ONE SCSI, ONE PARALLEL PRINTER INTERFACE, AND ONE ETHERNET PORT.
PROVIDES ELECTRICAL CONVERSION NECESSARY TO CONNECT THE GPC I/O SIGNALS TO PERIPHERAL EQUIPMENT. INTERFACES INCLUDE FOUR SERIAL INTERFACES, ONE SCSI, ONE PARALLEL PRINTER INTERFACE, AND ONE ETHERNET PORT.
VME BUS
(RACK D1) A511 POWER DISTRIBUTION BOX
2J4 C P N 115 VAC A 115 VAC B 115 VAC C
J31 A B C D H NEUTRAL CHASSIS GND
POWER SUPPLY PROVIDES: +5 VDC 125 AMPS, +12 VDC 9 AMPS (FAN), -12 VDC 2 AMPS, +12 VDC 2 AMPS.
4B-15
NAVAIR 01-75PAC-12
(RACK D1) DPS ELECTRONIC CIRCUIT BREAKER PANEL PWR DIST BOX 28 VDC 28 VDC 2J1 N
(RACK D1) POWER DISTRIBUTION BOX 2K12 J 2J2 115 VAC A DDC 115 VAC 115 VAC B 115 VAC C H A B H A B B 2J8 1J1 C
(TACCO STA) TACCO POWER CONTROL DDC S2 DC VDC
(RACK D2) DIGITAL DATA COMPUTER POWER SUPPLY THE VME POWER SUPPLY IS A SELFCONTAINED SRA WHICH ACCEPTS 115 VAC 400HZ INPUT POWER. THE INPUT POWER IS FILTERED, RECTIFIED, AND THEN ROUTED TO A POWER CONVERTER THAT PRODUCES 270 VDC. THE 270 VDC IS THEN ROUTED TO 4 REGULATORS THAT OUTPUT: +12 VDC, +12 VDC FAN, -12 VDC, +5 VDC. THE VME POWER SUPPLY ALSO CONTAINS A CONTROL FUNCTION ASSEMBLY WHICH PROVIDES SYSTEM RESET, AC FAIL, POWER ON, AND POWER GOOD FUNCTIONS. B C
S3 DC 115 VAC A 115 VAC B 115 VAC C J31 A B C D H NEUTRAL CHASSIS GND
J22 26 VAC H 26 VAC L
A
(THIS SHEET)
(RACK D3) J31 A B C D (TACCO STA) 2K9 2J8 B 2J4 115 VAC A VDC 115 VAC 115 VAC B 115 VAC C H J ZE C P N 115 VAC A 115 VAC B 115 VAC C 1J1 VDC OV TEMP TACCO POWER CONTROL 1J2 D V VDC OVERTEMP H VDC OVERTEMP L NEUTRAL H VIDEO DISTRIBUTION CONTROLLER POWER SUPPLY THE VME POWER SUPPLY IS A SELFCONTAINED SRA WHICH ACCEPTS 115 VAC 400HZ INPUT POWER. THE INPUT POWER IS FILTERED, RECTIFIED, AND THEN ROUTED TO A POWER CONVERTER THAT PRODUCES 270 VDC. THE 270 VDC IS THEN ROUTED TO 4 REGULATORS THAT OUTPUT: +12 VDC, +12 VDC FAN, -12 VDC, +5 VDC. THE VME POWER SUPPLY ALSO CONTAINS A CONTROL FUNCTION ASSEMBLY WHICH PROVIDES SYSTEM RESET, AC FAIL, POWER ON, AND POWER GOOD FUNCTIONS.
2J9
CHASSIS GND J21 5 6
ZC
CHASSIS GND
J1
(RACK D2) COMPUTER MAINTENANCE PANEL T1 TRANSFORMER T1 CONVERTS 115 VAC 400HZ TO 26 VAC REFERENCE VOLTAGE. PS1 POWER SUPPLY PS1 ACCEPTS 115 VAC 400HZ AND PRODUCES 12 VDC. 2 3 26 VAC H 26 VAC L F17 F12 (SEE DDC SIGNAL FLOW) J3 1 5 +12 VDC +12 VDC RTN (FS 440) TB452 D13 D14 (SEE DDC SIGNAL FLOW)
A
(THIS SHEET) 115 VAC A COP 115 VAC 115 VAC B 115 VAC C
26 VAC H 26 VAC L
B C J6 A C E G D
(FS 525) TB435
NEUTRAL CHASSIS GND 115 VAC C 017-8078
4B-16
Figure 4B-8. DDC, VDC, and CMP Power Distribution Functional Signal Flow Diagram
NAVAIR 01-75PAC-12
1. C-12639/ASQ-227(V) COMPUTER MAINTENANCE PANEL (CMP) 2. CP-2451/ASQ-227(V) DIGITAL DATA COMPUTER (DDC) 3. CD-155/ASQ-227(V) VIDEO DISTRIBUTION CONTROLLER (VDC)
3 RACK D3
2 RACK D2
RACK D1
017-6611
Figure 4B-9. DDC, VDC, and CMP Location Diagram
4B-17
NAVAIR 01-75PAC-12
NO. 1 2 3
SWITCH/INDICATOR Maintenance Panel Display UNIT SEL BIT ENBL/NO BIT/ IDLE
POSITION
FUNCTION Displays RUN, BIT, FAULT information, and instruction messages. Selects either DDC or VDC function. When power is initiated or MCLR is executed, the position of this switch will cause the following to happen:
COMPUTER OPERATOR PANEL
BIT ENBL NO BIT IDLE 4,16

1
Executes FULL BIT. (This switch position is also used with FULL BIT CYCLE and MODULE BIT CYCLE.) Executes POWER UP BIT only, then initializes VDC. Executes POWER UP BIT, then idles. A green indicator that illuminates when DDC or VDC power supply outputs are within specifications and no overtemperature condition exists. A red indicator that illuminates when an overtemperature condition has been detected in the DDC or VDC. Master clears selected device. A red indicator that illuminates when a Built-In Test fault condition exists in either the DDC or VDC. Provides circuit protection for 12 VDC circuitry. A green indicator that illuminates when power is applied to the CMP. When set in the ON position, applies AC power to the CMP. Provides circuit protection for 26 VAC circuitry. Allows operator to select functions displayed on Maintenance Panel Display. When power is initiated or MCLR is executed, the position of this switch will cause the following to happen:
POWER GOOD
N/A
5,15 6,14 7,13
OVERTEMP MCLR BIT FAULT 12 VDC AC AC Power ON/OFF 26 VAC KEYBOARD BIT ENBL/NO BIT/ IDLE
N/A N/A N/A Push/Pull N/A ON/OFF Push/Pull N/A
UNIT SEL
2
8 9 10 11 12 17
IDLE OVERTEMP POWER GOOD
3
DDC
BIT ENBL NO BIT IDLE POWER GOOD
17
VDC
BIT ENBL
1 4 7
2 5 8 0
3 6 9
ENTER
NO BIT
BIT ENBL NO BIT IDLE
OVERTEMP
Executes FULL BIT. (This switch position is also used with FULL BIT CYCLE and MODULE BIT CYCLE.) Executes POWER UP BIT, then loads TMS. Executes POWER UP BIT, then idles.
MCLR
BIT FAULT
BIT FAULT
MCLR
4
16
CIRCUIT BREAKERS
26 VAC
15
AC
ON
12 VDC
14
4
OFF
2
7
13
12
11
10
4B-18
Figure 4B-10. Computer Maintenance Panel Controls and Indicators
NAVAIR 01-75PAC-12
4B-1. 4B-2. COMPUTER MAINTENANCE PANEL COMPUTER MAINTENANCE PANEL BIT 1. The CMP BIT is used to verify the proper operation of the 8-line by 21-character alphanumeric display, keypad, and switches on the CMP. CMP BIT can be selected from either the DDC or VDC BIT menus. NOTE 4.
VDC MAIN MENU 1. RUN BUILTIN TEST 2. DISPLAY VERSION 3. DISPLAY STATUS 4. BURN NEW PROGRAM 5. HELP
Select COP BIT from the DDC or VDC BIT MENU:

DDC BIT MENU 1. FULL BIT 2. FULL BIT CYCLE 3. MODULE BIT 4. MODULE BIT CYCLE 5. COP BIT VDC BIT MENU 1. FULL BIT 2. FULL BIT CYCLE 3. MODULE BIT 4. MODULE BIT CYCLE 5. COP BIT
S S
2. a. b. c. 3.
In order to return to previous menu on the CMP, depress 0 (zero) and ENTR. CMP BIT is referred to COP BIT on the DDC or VDC BIT MENU.
CMP BIT Description DISPLAY TEST. Alternate pixels are displayed for 4 seconds each, followed by the display of all displayable ASCII characters. After viewing and accepting the results, select ENTR to exit the test. KEYPAD TEST. The operator must depress each key on the keypad. CMP BIT will display the name of the last depressed key until the operator depresses the ENTR key. SWITCH TEST. The operator must change the setting of each CMP switch. CMP BIT will display the name and setting of each changed switch.
5.
Select desired test from the DDC or VDC COP BIT MENU:
DDC COP BIT MENU
To initiate the CMP BIT, select RUN BUILT-IN TEST from the DDC or VDC MAIN MENU:
DDC MAIN MENU 1. RUN BUILTIN TEST 2. LOAD AND EXECUTE 3. BURN NEW PROGRAM 4. DISPLAY VERSION 5. DISPLAY STATUS 6. HELP
1. DISPLAY TEST 2. KEYPAD TEST 3. SWITCH TEST VDC COP BIT MENU
1. DISPLAY TEST 2. KEYPAD TEST 3. SWITCH TEST
Figure 4B-11. Computer Maintenance Panel BIT
4B-19
NAVAIR 01-75PAC-12
POWER ON
2
OFF
XXXXXXXXXXXXX XXXXXXXXXXXX XXXXXXXXXXXXXX XXXXXXXXXXXXX XXXXXXXXXXXXX
3
POWER ON
4
POWER GOOD
5
BIT FAULT
6
OVERTEMP
NO. 1 2 3 4 5 6
SWITCH/INDICATOR
TYPE Elapsed Time Meter
FUNCTION Indicates amount of time power has been applied to unit and displays up to 9999 hours. Prevents damage to the DDC or VDC due to an overload condition and controls the application of power to the unit. A green LED that illuminates when power is applied to the DDC or VDC. A green LED that illuminates when the power supply outputs are within specifications and no overtemperature condition exists. A red LED that illuminates when the DDC or VDC has failed Built-in Test (BIT). A red indicator that illuminates when an overtemperature condition has been detected in the DDC or VDC. The overtemperature sensor is located in the cooling air stream of the DDC and VDC and is set to sense the overtemperature condition (68-70 degrees Celsius) prior to damage of DDC or VDC components.
POWER ON/OFF POWER ON POWER GOOD BIT FAULT OVERTEMP
Circuit Breaker Indicator Indicator Indicator Indicator
4B-20
Figure 4B-12. DDC and VDC Control Panel Controls and Indicators
MVME 2700 PROCESSOR 1 (GPC 0) MVME 2700 PROCESSOR 2 (GPC 1) SPARE SLOT SPARE SLOT SDC NAVMUX ARM/ORD ARINC 429 SPARE SLOT SPARE SLOT SPARE SLOT SPARE SLOT SPARE SLOT SPARE SLOT ANEW 0 ANEW 1 #1 ANEW 2 ANEW 3 VME FSVM ANEW 4 ANEW #4 ANEW 5 R-VID SPARE SLOT POWER SUPPLY ACCESS PANEL
D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21
VME CARD CAGE
Figure 4B-13. DDC Module Function and Interchangeability (Sheet 1 of 2)

AIR FILTER ACCESS PANEL
X1 TRANSITION I/O MODULES ACCESSIBLE FROM REAR ACCESS PANEL
Change 3 4B-21
NAVAIR 01-75PAC-12
MAU BEHIND PANEL
NAVAIR 01-75PAC-12
Table 4C-1. DDC Module Function and Interchangeability
DESIGNATOR D1 D2 D5 D6 NOMENCLATURE GPC 0 GPC 1 SDC NAVMUX FUNCTION Processor provides the main processing resource within the DDC. Along with control and processing, it provides EIA-232 interface with the CMP, SCSI interface with the VDC, Ethernet interface with the RDSS, and serial interface with the KG-84B and VME Bus. Processor provides the main processing resource within the DDC. Along with control and processing, it provides EIA-232 interface with the CMP, SCSI interface with the VDC, Ethernet interface with the RDSS, and serial interface with the KG-84B and VME Bus. Synchro inputs from NAV system, Barometric Altimeter, IRDS Platform (Aircraft Not Incorporating AFC 705), and NAV Simulator are converted to Digital. Allows the DDC to interface between the aircraft NAV system, discrete aircraft switch closures and status indicators. The NAVMUX section of the module provides 2 Type 1 ARINC 575, 1 Type 2A ARINC 575, 1 Type 2B ARINC 575 serial inputs, and 4 Type 1 ARINC 575 outputs. The Aircraft status section receives SAD Mark, NAV Status, ORD Alert, ESM Status, Mark-On-Top, and IRDS Status (Aircraft Not Incorporating AFC 705). Interfaces the DDC and the ARM/ORD equipment. Supports the exchange of ARM/ORD commands, selections, responses and equipment indications. It interfaces with the VME Bus for receiving commands and returning status using a 32-bit data transfer. All commands over the VME Bus are transmitted in a redundant format to prevent a single-bit bus failure from performing an unauthorized action. It also interfaces with the ARM/ORD System to exchange commands and receive equipment status indications. All relay drivers are of a dual-signal driver configuration to guard against erroneous operation due to hardware failure. Provides data transmission to the EFDS. Provides communication between DDC and Harpoon Missile System. Provides communication between DDC and USQ-78(V) System. Provides communication between DDC and Data Link System. Provides communication between DDC and APS-115 System. Provides communication between DDC and IRDS System (Aircraft Not Incorporating AFC 705) or MMIS (Aircraft Incorporating AFC 705). IDENTICAL ITEMS FOR ALTERNATE REPAIRS GPC 1 GPC 0 None None
D7
ARM/ORD
None
D8 D15 D16 D17 D18 D19
ARINC 429 ANEW 0 ANEW 1 ANEW 2 ANEW 3 ANEW 4
None ANEW 0 through 5 are interchangeable only after slot addressing configuration has been changed. See DDC Module Configuration diagram for correct configuration for all applicable modules. None None None
D20 X1 Control Panel MAU PS1
ANEW 5 GPC Transition I/O Module Media Adapter Unit Power Supply
Provides communication between DDC and ALR-66 System. Multiplexes signals between GPC 0 and a fixed number of standard protocol interfaces. (1) SCSI to the VDC. (2) EIA-232 to the CMP. (3) EIA-422 to the KG-84B. Mounted on the DDC Control Panel, the MAU provides the interface drivers for the Ethernet interface to the RDSS. Interface control is located on GPC 0. Provides required voltages to operate DDC.
4B-22
Change 10
Figure 4B-13. DDC Module Function and Interchangeability (Sheet 2 of 2)
NAVAIR 01-75PAC-12
8 EF 76 D 5 C 4 3 B A9 1 2 0
GPC 0 and GPC 1 D1 and D2

CHS BFL CPU PCI FUS
8 EF 76 D 5 C 4 3 B 2 A 901
8 EF 7 6 D 5 C 4 3 B A9 12 0
S3
S4
S5
P1
SW3
P1
P1
S1 5
8 EF 76 D 5 C 4 3 B A9 1 2 0
S2
S2 0
S3 0
S4 0
S5 1
8 EF 7 6 D 5 C 4 3 B A9 12 0
ON SYS ON
P2
EF 8 76 D 5 C 4 3 B 2 A 901
P2
SW1 SW4 SW2 SW5

SW2 1--8 ON SW3 SW4 1-4 1-4 DOWN DOWN
BIT
8 EF 7 6 D 5 C 4 3 B 2 A 90 1
S4
S3
ON
P2
P2
S1 4 S2 8 S3 0 S4 0
1--3 ON J9 2--3 J17 2--3 J18 2--3 J20 2--3 4--5 OFF 6-8 ON
J9 .
J17 .
J18 .
J20 .
TRANSITION I/O X1
NAVMUX D6
ARM/ORD D7
P1
ON ON ON
P1
SLOT D15 D16 D17 D18 D19 D20 SRS DEF ANEW 0 ANEW 1 ANEW 2 ANEW 3 ANEW 4 ANEW 5 A31-A28 1 2 2 3 3 4 A27-A24 8 0 8 0 8 0 A23-A20 0 0 0 0 0 0
P1
LEGEND 8 section slider switch.
ON
SW1
SW1 1--8 ON
SW2
SW2 1--8 ON SW3 1-5 ON 6-7 OFF 8 ON
SW3
1 2 3 4
MBASE MEM I/O BASE
5 6 7
BIT
.. ..
E F0 1 2 D 3 C 4 B 5 A9 876 E F0 1 2 D 3 C 4 B 5 A9 876
A31 A28 A27 A24 A32 SELECT A24
4 section rocker switch.
8 EF 7 6 D 5 C 4 3 B A9 1 2 0
Black is position of switch.
P2
P2
. . ..
NOTE A32-A24 Select switch is always set to A32.
P2
.
Black indicates down position of rocker.
E F0 1 2 D 3 C 4 B 5 A 9 876
2 or 3 pin board connecter. Shaded area indicates position of jumper.
A23 A20
OK
16 position switch.
SDC D5
IRQ
ARINC 429 D8
..
RUN
ANEW
NOTE Module size not to scale. Switch location relative.
0 EF 1 2 D 3 C 4 B 5 A 9 876
(0 through F) Associated table indicates position.
S1
1 OFF 2-8 ON
8 EF 76 D 5 C 4 3 B A9 1 2 0
S2
SW1
SW5
S1
Figure 4B-14. DDC Module Configuration
4B-23
4B-24
HARD DRIVE HARD DRIVE MOUNTED TO THE LEFT OF VME CARD CAGE MODULES. MVME 2700 PROCESSOR 1 (GPC 0) V1 V2 V3 V4 V5 V6 V7 V8 V9 V10 V11 MMVP 4 MMVP 5 SPARE SLOT ETHERNET SWITCHER ANEW SLOT SPARE#1 SPARE SLOT FSVM VME FSVM ANEW SLOT SPARE#4 SPARE SLOT R-VID RVID V12 V13 V14 V15 V16 V17 V18 V19 V20 V21 MVME 2700 PROCESSOR 2 (GPC 1) SPARE SLOT SPARE SLOT SPARE SLOT SPARE SLOT SPARE SLOT MMVP 0 MMVP 1 MMVP 2 MMVP 3 VME CARD CAGE POWER SUPPLY ACCESS PANEL
NAVAIR 01-75PAC-12
Figure 4B-15. VDC Module Function and Interchangeability (Sheet 1 of 2)

AIR FILTER ACCESS PANEL
X1, X2 AND X3 TRANSITION I/O MODULES ACCESSIBLE FROM REAR ACCESS PANEL
NAVAIR 01-75PAC-12
Table 4C-1. VDC Module Function and Interchangeability
DESIGNATOR V1 V2 V8 V9 V10 V11 V12 NOMENCLATURE GPC 0 GPC 1 MMVP 0 MMVP 1 MMVP 2 MMVP 3 MMVP 4 FUNCTION Processor provides the main processing resource within the VDC. Along with control and processing, it provides EIA-232 interface with the CMP, SCSI interface with the DDC, Centronics interface with the printer and Ethernet interface to the Ethernet Switcher. Processor provides the main processing resource within the VDC. Along with control and processing, it provides SCSI interface with the Hard Drive and Ethernet interface to the Ethernet Switcher. The graphics processing module. Accepts graphics commands and primitive instruction lists (display lists) and converts these commands into bit images for display. Receives and stores up to four live digitized video channels for display at the Flight Station. It receives host commands via either its VME bus interface and/or a 10/100BaseT Fast Ethernet interface. The graphics processing module. Accepts graphics commands and primitive instruction lists (display lists) and converts these commands into bit images for display. Receives and stores up to four live digitized video channels for display at the NAVCOMM Console. It receives host commands via either its VME bus interface and/or a 10/100BaseT Fast Ethernet interface. The graphics processing module. Accepts graphics commands and primitive instruction lists (display lists) and converts these commands into bit images for display. Receives and stores up to four live digitized video channels for display at the TACCO Console. It receives host commands via either its VME bus interface and/or a 10/100BaseT Fast Ethernet interface. The graphics processing module. Accepts graphics commands and primitive instruction lists (display lists) and converts these commands into bit images for display. Receives and stores up to four live digitized video channels for display at the SS 3 Console. It receives host commands via either its VME bus interface and/or a 10/100BaseT Fast Ethernet interface. The graphics processing module. Accepts graphics commands and primitive instruction lists (display lists) and converts these commands into bit images for display. Receives and stores up to four live digitized video channels for display at the SS 1 Console. It receives host commands via either its VME bus interface and/or a 10/100BaseT Fast Ethernet interface. The graphics processing module. Accepts graphics commands and primitive instruction lists (display lists) and converts these commands into bit images for display. Receives and stores up to four live digitized video channels for display at the SS 2 Console. It receives host commands via either its VME bus interface and/or a 10/100BaseT Fast Ethernet interface. The Ethernet Switcher module provides the Ethernet hub function. Provides Ethernet connections to: (1) RDSS and DDC via the MAU; (2) Two 10/100BaseT ports, A1J3 to AN/USQ-78(V) and A1J4 as a spare. Receives EIA-343A and EIA-170 RGB analog signals and makes the appropriate analog output selections for possible outputs. None V21 X1(A) X1(B) X2 X3 Control Panel MAU PS1 Hard Drive RVID GPC 0 P2 Transition I/O Module GPC 1 P2 Transition I/O Module EIA-485 P2 Transition I/O Module Discrete P2 Transition I/O Module Media Adapter Unit Power Supply Hard Drive Receives the APS-115 radar signals and converts them into 10VIDbus digital video format. Multiplexes signals between GPC 0 and a fixed number of standard protocol interfaces: (1) Centronics interface to printer. (2) SCSI to DDC. (3) RS-232 to CMP. Multiplexes signals between GPC 1 and a fixed number of standard protocol interfaces: (1) Ethernet to Ethernet Switcher. (2) SCSI to VDC HARD DRIVE. Provides mechanical conversion to connect the MMVP EIA-485 I/O signals to chassis mounted I/O connectors. Provides mechanical conversion to connect the MMVP Discrete I/O signals to chassis mounted I/O connectors. Mounted on the VDC Control Panel, the MAU provides the interface drivers for the Ethernet interface to the RDSS. Interface control is located on GPC 0. Provides required voltages to operate VDC. Provides magnetic media storage within the VDC. None GPC Transition I/O GPC Transition I/O None None None None None IDENTICAL ITEMS FOR ALTERNATE REPAIRS GPC 1 GPC 0 MMVP modules are interchangeable.
V13
MMVP 5
V15
Ethernet Switcher
None
V18
FSVM
Figure 4B-15. VDC Module Function and Interchangeability (Sheet 2 of 2)
4B-25
NAVAIR 01-75PAC-12
CHS BFL CPU PCI FUS SYS
GPC 0 and GPC 1 V1 and V2
P1
SW3
-5V B
-5V A BIT
ON
S1
SW1 1--8 OFF
ON
P1 P2
P2
J9 2--3 J17 2--3 J18 2--3 J20 2--3
P2
ON
SW1 SW4 ON SW2 SW5

SW2 1--8 ON SW3 SW4 SW5 1 OFF 2-8 ON
SW1 1--8 ON
1-4 1-4 DOWN DOWN
J9 .
J17 .
J18 .
J20 .
TRANSITION I/O X1
FSVM V18
LEGEND 8 section slider switch.
ON
ON
Black is position of switch.
S1
SW1
BIT RADAR ACTIVE
1--8 OFF
SP EL EF
+3.3 BIT EA
P1 P2
P1 P2
4 section rocker switch. Black indicates down position of rocker. 2 or 3 pin board connecter.
Shaded area indicates position of jumper. NOTE Module size not to scale. Switch location relative.
RVID V21
MMVP MMVP V8-V13 V8 - V13 -
4B-26
Figure 4B-16. VDC Module Configuration
NAVAIR 01-75PAC-12
4B-1. 4B-2. DDC DESCRIPTION AND CHARACTERISTICS. The DDC has several self-test capabilities that are performed either automatically or under operator control at the Computer Maintenance Panel (CMP). The two basic tests are: Power-Up BIT and FULL BIT. Also included are procedures for error log checking and cycle and individual module BIT testing. Power-Up BIT is automatically executed upon: 1) application of power; 2) selection of MCLR on CMP; or 3) when the power supply recycles in response to a line transient. Upon power-up, the DDC executes power up (confidence test) to accomplish basic operational testing. Power-Up BIT completes in approximately one minute. FULL BIT can be: 1) executed at initialization; 2) selected manually from the CMP or; 3) initiated from the STP. FULL BIT provides for detection of 98 percent of all failures except failures in line drivers and receivers on I/O circuit cards and fault detection circuits. Line driver and receiver failures are detected by the STP which encompasses testing of peripheral systems. Isolation does not include backplane, CMP, or power supply failures. Failing power supplies will be reported via the CMP and DDC POWER GOOD indicators. FULL BIT completes in approximately 5 minutes. FULL BIT provides informational and error messages on the CMP. Error messages include the step number of the failing subtest and isolation candidate(s). Upon display of a detected failure, options to continue at the next test, retest from the beginning of the last test, or terminate the test are provided. An M out of N testing philosophy has been incorporated into FULL BIT to reduce the reporting of intermittent failures. When a particular failure occurs, the detecting subtest is subjected to retesting N times. If the failure reaches the threshold of M failure occurrences in the N retest times, the failure is logged in an Error Log as a hard failure and reported to the CMP. If the threshold M is not reached, the failure is logged as a soft failure in the Error Log. The Error Log is accessible at the CMP and includes amplifying data about each failure. Additionally, the Error Logs are accessible via the STP. Test Initiation. Power-Up BIT (confidence test) is automatically executed: 1) upon application of power; 2) selection of MCLR on CMP or; 3) when the power supply recycles in response to a line transient. FULL BIT can be: 1) executed at initialization; 2) selected manually from the CMP or; 3) initiated from the STP. This selection process is determined by the position of the BIT ENBL/NO BIT/IDLE switch on the CMP. With the BIT ENBL/NO BIT/IDLE switch set to BIT ENBL and power is applied, Power-Up BIT and one full cycle of FULL BIT will execute. While FULL BIT is executing the CMP displays RUNNING BIT. With the BIT ENBL/NO BIT/IDLE switch set to NO BIT, Power-Up BIT will execute and the DDC will execute the application program (this may include a program load) and the CMP will display messages monitoring current DDC activity. With the BIT ENBL/NO BIT/IDLE switch set to IDLE and power is applied, Power-Up BIT will execute and then the DDC enters the idle mode with the DDC MAIN MENU displayed on the CMP waiting for operator action. FULL BIT can also be selected from the STP. (For procedures, see NAVAIR 01-75PAC-12-12.) In addition to the BIT indicators and displays at the CMP, there are BIT indicators on each of the DDC modules. These indicators can be used in the troubleshooting sequence and will be illuminated when BIT has successfully executed on each module tested. The BIT indicators are extinguished during BIT execution, when BIT testing is suspended, or the module under test fails BIT. These indicators are only visible with the access cover removed. Should a failure occur refer to the troubleshooting procedures for module fault isolation and replacement. 4B-8. 4B-9.
A properly tested, maintained and grounded ESD wrist strap shall be worn by any person that removes or replaces any module. The wrist strap shall be worn during the entire disconnect/connect process and when removing and replacing ESD protective connector caps.
4B-3.
DDC TEST AND TROUBLESHOOTING PROCEDURES. Preliminary Switch Settings. Set the Armament Control Panel MASTER ARM and SRCH PWR switches to OFF. NOTE If unable to obtain either master arm or search power OFF status, refer to NAVAIR 01-75PAC-12-6.
4B-4.
4B-5.
4B-10. DDC TROUBLESHOOTING INITIALIZATION. 1. At the DPS electronic circuit breaker panel: a. b. c. 2. 3. Verify the PWR DIST BOX circuit breaker is closed. Verify the COP (CMP) circuit breaker is closed. Verify the DDC circuit breaker is closed.
4B-6.
At the TACCO Power Control panel, verify that the DDC/OFF switch is in the DDC position. At the CMP: a. b. c. Set the UNIT SEL switch to DDC. Set the DDC BIT ENBL/NO BIT/IDLE switch to IDLE. Set the AC ON/OFF switch to the ON position and observe that the green AC indicator is illuminated. NOTE
4B-7.
S S
4. At the DDC: a. b. 5.
The BIT FAULT indicator will extinguish at completion of BIT (approximately 1 minute) if no fault is identified. This test will disrupt system operations.
Set the POWER ON/OFF switch to the ON position. Observe the POWER ON, POWER GOOD, and BIT FAULT indicators are illuminated and fans are operating.
At the CMP: a. b. Observe the DDC POWER GOOD indicator is illuminated. Observe the DDC OVERTEMP indicator is extinguished.
CAUTION
Contains parts and assemblies susceptible to damage by Electrostatic Discharge (ESD). Refer to NAVAIR 01-1A-23 (WP 005 00).
6.
If a failure is indicated, perform troubleshooting procedure to identify the failed module.
Figure 4B-17. DDC Characteristics and Troubleshooting (Sheet 1 of 7)
4B-27
NAVAIR 01-75PAC-12
7. If indications are normal, the following display will be observed on the CMP.
NOTE A failed fan may not be rotating or may be rotating backward. Fans are located immediately above the air filter. b. Using a flashlight verify both fans are operating normally. If one or more fans has failed, perform the appropriate fan removal and installation procedures. (See NAVAIR 01-75PAC-2-5.)
4B-11. DDC BIT TROUBLESHOOTING PROCEDURES. 1. If DDC is not already powered on, set POWER ON/OFF switch to ON. When the POWER ON/OFF switch is set to ON, power is applied to the DDC and the smart modules (GPCs, ANEWs and SDC) initialize by verifying their own processors using internal verification firmware. When Power-Up BIT is completed, the ANEWs and SDC modules idle in their respective control firmware waiting for commands from the DDC GPCs. The master DDC GPC reads the position of the DDC BIT ENBL/NO BIT/IDLE switch and stores this information in its own NVRAM. NOTE
4B-12. DDC OPERATOR INITIATED BIT TROUBLESHOOTING PROCEDURES. 4B-13. If further troubleshooting is required, four additional BIT routines are provided: FULL BIT, FULL BIT CYCLE, MODULE BIT, and MODULE BIT CYCLE. These BIT routines can be used as necessary to troubleshoot the DDC for specific module failures and intermittent failures. 1. After Power-Up BIT, the master GPC reads the DDC BIT ENBL/NO BIT/IDLE switch information. Using the switch information, the DDC performs the requested function. With the switch set to IDLE, the DDC goes into the idle mode and the DDC MAIN MENU is displayed on the CMP:
2.
A POWER SUPPLY OVERTEMP condition does not result in a front panel OVERTEMP indication. It causes the power supply to shut down resulting in the POWER GOOD indicator not to illuminate. An OVERTEMP indication is caused by the actuation of a sensor placed in the DDC cooling fans resultant air flow. If the air flow temperature exceeds 68-70 degrees Celsius the OVERTEMP indicator illuminates. Maintenance procedures are located in NAVAIR 01-75PAC-2-5.
2.
If RUN BUILT-IN TEST is selected from the DDC MAIN MENU, the DDC BIT MENU is displayed. Select the BIT process desired.
DDC BIT MENU 1. FULL BIT 2. FULL BIT CYCLE 3. MODULE BIT 4. MODULE BIT CYCLE 5. COP BIT 6. ANEW LOOPBACK
S
3. 4.
Observe POWER ON and POWER GOOD indicators. If either indicator is extinguished, replace the power supply. Observe BIT FAULT indicator, if illuminated: a. b. At Rack D2, loosen eighteen captive screws securing the DDC logic module access cover and remove cover. Observe fault indicators on modules. MODULE GPC NAV/MUX ARM/ORD ARINC ANEW c. d. INDICATOR BFL LED BIT LED BIT LED BIT OK RUN LED NORMAL INDICATION OFF GREEN GREEN GREEN GREEN
NOTE
S S
1.
In order to return to previous screen on the CMP, depress 0 (zero) and ENTR. ANEW LOOPBACK Test is not used in this configuration.
4B-14. DDC BIT ERROR LOGS. The purpose of the BIT Error Log function is for the DDC to store/display BIT errors. The operator can then examine the BIT Error Logs from STP (refer to NAVAIR 01-75PAC-12-12) or from the CMP by selecting DISPLAY STATUS from the DDC MAIN MENU. a. b. The DDC BIT Error Log contains information from the DDC. The errors identify test, step number, subtest number, reporting GPC, retry count, and amplifying data. Errors are recorded when BIT is executing. The NAVCOMM PEP, TACCO PEP and SS 3 PEP BIT Error Logs reflect errors that resulted from internal BIT being performed. The Flight DEP and ARM/ORD DEP BIT Error Logs originate from the Flight and ARM/ORD DEP BIT. The Error Logs contain a Pass/Fail/True/False answer to specific internal BIT tests. The VDCU BIT Error Log provides the results of the VDC BIT. It provides a choice of suspected failed modules to be replaced, the failed test and subtest and any amplifying data.
Refer to NAVAIR 01-75PAC-2-5 for module removal and replacement procedures for the failed module and perform DDC initialization procedure. Align the logic module access cover on front of DDC and tighten the eighteen (18) captive screws.
5.
Observe OVERTEMP indicator, if illuminated: a. Check the air filter and clean as necessary to permit full air flow (see NAVAIR 01-75PAC-2-5). c.
4B-28
NAVAIR 01-75PAC-12
2. To view the DDC BIT Error Log, select DISPLAY STATUS from the DDC MAIN MENU:
DDC MAIN MENU 1. RUN BUILTIN TEST 2. LOAD AND EXECUTE 3. BURN NEW PROGRAM 4. DISPLAY VERSION 5. DISPLAY STATUS 6. HELP 12 1
EMPTY NEXT
Selecting NEXT displays the following:

SLOT 13 14 15 16 17 18 1 DCS
3.
Select BIT ERROR LOG from the DDC STATUS MENU:

DDC STATUS MENU 1. BIT ERROR LOG 2. DCS STATUS 3. AIRCRAFT STATUS 4. SWITCH
ANEW0 ANEW1 ANEW2

ANEW3
STATUS EMPTY EMPTY PASS PASS PASS PASS
LOG
NEXT

SLOT 19 20 21 DCS
4B-15. DDC DCS STATUS. 1. The operator may view just the configuration of the VME card cage and the status of the modules contained within by using the DCS STATUS function. This is displayed on the CMP and provides slot number, SRA designation, status and the Error Log containing the status of the module. To view the DDC status pages, select DISPLAY STATUS from the DDC MAIN MENU:
ANEW4 ANEW5
STATUS PASS PASS EMPTY
LOG
4B-16. DDC AIRCRAFT STATUS. 1. The purpose of the Aircraft Status function is to allow the operator to monitor all Aircraft Status discretes using the CMP. Whenever an Aircraft Discrete changes state, the operator will be alerted to its new state. The DDC must be in the idle condition in order to initiate this function. This function is only selectable from the CMP. An example of the statuses displayed are shown in the NAVAIR 01-75PAC-12-12. To view the DDC status pages, select DISPLAY STATUS from the DDC MAIN MENU:
2.
2.
3.
Select DCS STATUS from the DDC STATUS MENU:

3.
Select AIRCRAFT STATUS from the DDC STATUS MENU:

4.
Once DCS STATUS has been selected, the following is displayed on the CMP:
SLOT 01 02 03 04 05 06 1 DCS GPC0
GPC1
SDC NAVMUX NEXT
STATUS PASS PASS EMPTY EMPTY PASS PASS
LOG
NOTE In order to return to previous menu on the CMP, depress 0 (zero) and ENTR. 4B-17. DDC SWITCH STATUS. 1. The purpose of the Switch Status function is to allow the operator to set and clear the Software Selectable Switches. The function of these switches is determined by the software installed at the time. To view the DDC Soft Switch Status, select SWITCH from the DDC STATUS MENU:

SLOT 07 08 09 10 11 DCS
ARM/ORD
ARINC 429
STATUS PASS PASS EMPTY EMPTY EMPTY
LOG
2.
4B-29
NAVAIR 01-75PAC-12
3. Once SWITCH has been selected, the following is displayed on the CMP:
SWITCH 01 02 03 04 05 06 07
SELECT TOGGLES SET CLEAR SET CLEAR CLEAR CLEAR CLEAR
7.
Where: XXX = Approximate BIT execution time in seconds. When executing initiated BIT and a failure occurs, the failure data is displayed on the CMP as follows:
UUUUUUUV FAILED BY GPCW LOGZZ STEP >XX.YYY REPLACE >DXX CONTINUE RESET TERMINATE
Where: UUUUUUU = Module under test

V W ZZ XX YYY DXX
4B-18. DDC FULL BIT TESTING. 1. 2. 3. FULL BIT testing is to aid the operator in identifying a failure in one of the installed modules. A failure is a condition where a module fails, but cannot be identified during the normal system operation. When the operator selects FULL BIT testing, the DDC Control Firmware will cycle through all installed modules. To initiate FULL BIT test, select RUN BUILT-IN TEST from the DDC MAIN MENU:
= = = = = =
(GPC0, GPC1, ARINC, SDC, ANEW0, ANEW1, ANEW2, ANEW3, ANEW4, ANEW5, NAVMUX, and ARMORD) Module ID (0,1,2.....) GPC ID (0,1) Error log index (031) Subtest number (0,1,2.....) Step number (0250) Slot numbers (D1D21). Replace failed modules starting with the first
(left most) DXX slot number.
4B-19. DDC FULL BIT CYCLE TESTING. 1. FULL BIT CYCLE testing is to aid the operator in identifying an intermittent failure. An intermittent failure is a condition where a module fails, but not often enough during normal operation to be identified. The cycling of BIT provides a means to subject the suspected module or group of modules to repeated testing without operator intervention with the intention of making the intermittent module fail. The operator may select BIT testing to cycle on a selected module or all modules. These selections are made by using the CMP keypad. The CMP keypad is used to select FULL BIT CYCLE on all modules. NOTE
2.
4.
Select FULL BIT from the DDC BIT MENU:

S S
3.
In order to return to previous menu on the CMP, depress 0 (zero) and ENTR. ANEW LOOPBACK Test is not used in this configuration.
To initiate the FULL BIT CYCLE, select RUN BUILT-IN TEST from the DDC MAIN MENU:
NOTE
S S
5.
In order to return to previous menu on the CMP, depress 0 (zero) and ENTR. ANEW LOOPBACK Test is not used in this configuration. 4.
Once FULL BIT has been initiated and the DDC reinitialized, the following is displayed on the CMP:
RUNNING BIT TIME >XXX 0> AAAAAAA 1> AAAAAAA
Select FULL BIT CYCLE from the DDC BIT MENU:

Where:
XXX = AAAAAAA =
Cycle count Module under test (GPC0,

ANEW5,NAVMUX, and ARMORD).
GPC1, ARINC, SDC, ANEW0, ANEW1, ANEW2, ANEW3, ANEW4,
5. 6. 7.
Set the DDC BIT ENBL/NO BIT/IDLE switch to BIT ENBL to enable cycling. Depress ENTR on the CMP. This will cause the DDC to reinitialize, starting the FULL BIT CYCLE test. When FULL BIT CYCLE is being executed and after the DDC has reinitialized, the following is displayed on the CMP:
CYCLE XXX TIME >YYY 0>AAAAAAA 1>AAAAAAA
6.
When all modules are tested, the following message is displayed on the CMP for approximately 10 seconds, then the CMP will return to the DDC MAIN MENU:
BIT TIME >XXX COMPLETED SOFT ERRORS >000 HARD ERRORS >000
4B-30
NAVAIR 01-75PAC-12
Where:
XXX YYY AAAAAA
= Cycle count = Approximate time in seconds = Module under test (GPC0, GPC1 ARINC,
ANEW4, ANEW5, NAVMUX, and ARMORD).
4.
SDC, ANEW0, ANEW1, ANEW2, ANEW3,
Set the DDC BIT ENBL/NO BIT/IDLE switch to BIT ENBL to enable cycling. Select MODULE BIT from the DDC BIT MENU:
5.
8. 9.
To terminate FULL BIT CYCLE testing, set the DDC BIT ENBL/NO BIT/IDLE switch to NO BIT. This action terminates FULL BIT CYCLE testing at the end of the current cycle. When cycling is terminated, the following message is displayed on the CMP:
6.
Once MODULE BIT has been initiated, the following is displayed on the CMP:
DDC SLOT 01 02 03 04 05 06 NEXT MODULE BIT GPC0
Where: 10.
XXX
= Approximate BIT execution time in seconds.
2 3 4 5 6 7
GPC1
When executing FULL BIT CYCLE testing and a failure occurs, the failure data is displayed on the CMP as follows:
SDC NAV/MUX

1 2 3 4 5 6 7
07 08 09 10 11 12 NEXT
ARM/ORD
ARINC
Where:
UUUUUUU= V W ZZ XX YYY DXX
= = = = = =
GPC1, ARINC, SDC, ANEW0, ANEW1, ANEW2, ANEW3, ANEW4, ANEW5, NAVMUX, and ARMORD) Module ID (0,1,2.....) GPC ID (0,1) Error log index (031) Subtest number (0,1,2.....) Step number (0250) Slot numbers (D1D21). Replace failed modules starting with the first
Module under test (GPC0,

1 2 3 4 5 6 7
13 14 15 16 17 18 NEXT
4B-20. DDC MODULE BIT TESTING. 1. 2. MODULE BIT testing allows the operator to perform BIT testing on a single module in a specific slot. The testing segregates the module from any interference that may have resulted from parallel testing during normal BIT. During MODULE BIT testing, BIT is performed on a selected module. This is the same BIT performed when BIT is executed on the entire DDC. The only difference is that it is the only testing being done in the system during execution. To initiate MODULE BIT testing, select RUN BUILT-IN TEST from the DDC MAIN MENU:
ANEW0 ANEW1 ANEW2

ANEW3

1 2 3 4 5 6 7
19 20 21 01 02 03 NEXT
3.
ANEW4 ANEW5 GPC0 GPC1
4B-31
NAVAIR 01-75PAC-12
7. When a selected module is being tested and after the DDC has reinitialized, the following message is displayed on the CMP:
MODULE BIT SLOT> XX
2.
During MODULE BIT CYCLE testing, BIT is performed on a selected slot. This is the same BIT performed when BIT is executed on the entire DDC. The only difference is that it is the only testing being done in the system during execution. NOTE
Where: followed by:
XX
= Slot under test.
S S
3.
In order to return to previous menu on the CMP depress 0 (zero) and ENTR. ANEW Loopback Test is not used in this configuration.
RUNNING BIT TIME ->YYY >XXX 0-> AAAAAAA 1-> AAAAAAA
To initiate the MODULE BIT CYCLE, select RUN BUILT-IN-TEST from the DDC MAIN MENU:
Where:
YYY AAAAAAA
= Approximate time in seconds = Module under test (GPC0, GPC1,
ARINC, SDC, ANEW0, ANEW1, ANEW2, ANEW3, ANEW4, ANEW5, NAVMUX, and ARMORD)
8.
When the test is completed, the following message is displayed on the CMP for approximately 10 seconds, then the CMP will return to the DDC MAIN MENU:
BIT TIME>XXX COMPLETED SOFT ERRORS>000 HARD ERRORS>000
4.
Select MODULE BIT CYCLE from the DDC BIT MENU:

Where: a.
XXX
= Approximate BIT execution time in seconds. 5.

When executing MODULE BIT and a failure occurs, the failure data is displayed on the CMP as follows: 6. 7.
Set the DDC BIT ENBL/NO BIT/IDLE switch to BIT ENBL to enable cycling. Depress ENTR on the CMP. This will cause the DDC to reinitialize, starting the MODULE BIT CYCLE testing. Once MODULE BIT CYCLE has been selected, the following is displayed on the CMP:
DDC SLOT 01 02 03 04 05 06 NEXT MODULE BIT GPC0
1 2
GPC1, ARINC, SDC, ANEW0, ANEW1, ANEW2, ANEW3, ANEW4,
GPC1
Where: UUUUUUU = Module under test (GPC0,

ANEW5, NAVMUX, and ARMORD) V W ZZ XX YYY DXX
3 4 5 6 7
= Module ID (0,1,2.....) = GPC ID (0,1) = Error log index (031) = Subtest number (0,1,2.....) = Step number (0250) = Slot numbers (DD21). Replace failed modules starting with the first (left most) Dxx slot number.
SDC NAV/MUX

1 2 3 4 5 6 7
07 08 09 10 11 12 NEXT
ARM/ORD
ARINC
4B-21. DDC MODULE BIT CYCLE TESTING. 1. MODULE BIT CYCLE testing is to allow the operator to perform cyclic BIT testing on a single module in a specific slot. MODULE BIT CYCLE testing is to aid the operator in identifying an intermittent failure. An intermittent failure is a condition where a module fails, but not often enough during normal operation to be identified. The cycling of BIT provides a means to subject the suspected module to repeated testing without operator intervention.
4B-32
NAVAIR 01-75PAC-12
Selecting NEXT, displays the following:
1 2 3 4 5 6 7
13 14 15 16 17 18 NEXT
9.
To terminate DDC MODULE BIT CYCLE testing, set the DDC BIT ENBL/NO BIT/IDLE switch to NO BIT. This action terminates MODULE BIT CYCLE testing at the end of the current cycle. When the test is completed, the following message is displayed on CMP for approximately 10 seconds, then the CMP will return to the DDC MAIN MENU:
ANEW0 ANEW1 ANEW2

ANEW3
10.
Selecting NEXT, displays the following:

1 2 3 4 5 6 7
19 20 21 01 02 03 NEXT
ANEW4 ANEW5
Where: 11.
XXX
GPC0 GPC1
When executing MODULE BIT CYCLE testing and a failure occurs, the failure data is displayed on the CMP as follows:
UUUUUUUV FAILED BY GPCW LOGZZ STEP >XX.YYYY REPLACE >DXX CONTINUE RESET TERMINATE
8.
Once the selected module is tested, the following is displayed on the CMP:
MODULE BIT SLOT> XX
Where: followed by:
XX
= Slot under test. Where: UUUUUUU = Module under test (GPC0,

CYCLE YYY TIME >XXX 0>AAAAAAA 1>BBBBBBB V W ZZ XX YYY DXX GPC1, ARINC, SDC, ANEW0, ANEW1, ANEW2, ANEW3, ANEW4, ANEW5, NAVMUX, and ARMORD) Module ID (0,1,2.....) GPC ID (0,1) Error log index (031) Subtest number (0,1,2.....) Step number (0250) Slot numbers (D1D21). Replace failed modules starting with the first
Where:
YYY XXX AAAAAAA
= Cycle count = Approximate time in seconds = Module under test (GPC0, GPC1,
ANEW5, NAVMUX, and ARMORD).
ARINC, SDC, ANEW0, ANEW1, ANEW2, ANEW3, ANEW4,
= = = = = =
4B-33
NAVAIR 01-75PAC-12
4B-1. 4B-2. VDC DESCRIPTION AND CHARACTERISTICS. The VDC provides graphics processing of the DDC commands for display and integration of sensor video. The VDC also provides gathering, digitizing, distributing, controlling, frame buffering, and reformatting of sensor video from aircraft subsystems. These signals are sent in real time to displays and controllers at SS 3, TACCO, NAVCOMM, Flight, SS 1, SS 2, and ORD stations. The VDC has two operational modes: On-line and Off-line; and four non-operational modes: Self-Test, Start-Up, On-Line Set-Up, and Down Loading Mode. In non-operational modes the VDC is incapable of normal use because it is engaged in down-loading firmware or conducting tests. OPERATIONAL MODES. 1. On-Line Mode a. In the On-Line Mode, the VDC receives and acts on requests from the DDC. If no messages are received from the DDC during any 2 second interval, the VDC automatically reverts back to the Off-Line Mode. To return to the On-Line Mode the DDC sends an initialize request to the VDC. Two kinds of requests from the DDC will cause the VDC to leave its operational On-Line Mode because they preclude normal operation, which run self-test and down-load firmware requests. Run self-test requests will cause the VDC to revert to the Self-Test Mode. The VDC conducts all the BIT tests in its Self-Test Mode, and then proceeds as when powered up, through the Start-Up Mode to the Off-Line Mode. For the VDC to operate on-line, the DDC must send an initialize request. 4B-8. 4B-6. The VDC has several self-test capabilities that are performed either automatically or under operator control at the Computer Maintenance Panel (CMP). The two basic tests are: Power-Up BIT and FULL BIT. Also included are procedures for error log checking and cycle and individual module BIT testing. Power-Up BIT (confidence test) is automatically executed: 1) upon application of power; 2) selection of MCLR on CMP or; 3) when the power supply recycles in response to a line transient. Upon power-up, the VDC executes power up (confidence test) to accomplish basic operational testing. Power-Up BIT completes in approximately one minute. FULL BIT can be: 1) executed at initialization; 2) selected manually from the CMP or; 3) initiated from the STP. FULL BIT provides for detection of 98 percent of all failures except failures in line drivers and receivers on I/O circuit cards and fault detection circuits. Line driver and receiver failures are detected by the STP which encompasses testing of peripheral systems. Isolation does not include backplane, CMP, or power supply failures. Failing power supplies will be reported via the CMP and VDC POWER GOOD indicators. FULL BIT completes in approximately 5 minutes. FULL BIT provides informational and error messages on the CMP. Error messages include the step number of the failing subtest and isolation candidate(s). Upon display of a detected failure, options to continue at the next test, retest from the beginning of the last test, or terminate the test are provided. 4. 3. On-Line Set-Up Mode a. When the VDC receives a VDC initialize request from the DDC, it enters the On-Line Set-up Mode, in which it performs initialization necessary to begin on-line operation and enters the On-Line Mode.
4B-3.
Down Loading Mode a. The down-load firmware request causes the VDC to down-load firmware to the VDC GPC or one of the MMVPs. Once down-loading has been completed, the VDC passes through the Start-up Mode to the Off-Line Mode. The VDC then must receive a VDC initialize request to bring it to the On-Line Mode.
4B-4.
4B-7.
b. c.
2.
Off-Line Mode (Local Mode) a. The Off-Line Mode is a degraded mode of operation employed when communication with the DDC is unavailable. In this mode, the VDC supports operator actions such as video selection and hard copy printing of screen images that can be handled in the absence of the DDC. The VDC remains in the Off-Line Mode until it is shut down or it receives a VDC initialize request from the DDC. When the VDC is in the Off-Line Mode, it is capable of receiving requests from the DDC, but it is not yet properly initialized to respond to most requests. The only request it can acknowledge is the VDC initialize request. If any other request from the DDC is received while the VDC is in the Off-Line Mode, the VDC will respond with a VDC off-line error notification, and the request will not be acknowledged.
4B-9.
b.
4B-10. An M out of N testing philosophy has been incorporated into FULL BIT to reduce the reporting of intermittent failures. When a particular failure occurs, the detecting subtest is subjected to retesting N times. If the failure reaches the threshold of M failure occurrences in the N retest times, the failure is logged in an Error Log as a hard failure and reported to the CMP. If the threshold M is not reached, the failure is logged as a soft failure in the Error Log. The Error Log is accessible at the CMP and includes amplifying data about each failure. Additionally, the Error Logs are accessible via the STP. 4B-11. Test Initiation. Power-Up BIT (confidence test) is automatically executed: 1) upon application of power; 2) selection of MCLR on CMP or; 3) when the power supply recycles in response to a line transient. FULL BIT can be: 1) executed at initialization; 2) selected manually from the CMP or; 3) initiated from the STP. This selection process is determined by the position of the BIT ENBL/NO BIT/IDLE switch on the CMP. With the BIT ENBL/NO BIT/IDLE switch set to BIT ENBL and power applied, Power-Up BIT and one full cycle of FULL BIT will execute. While FULL BIT is executing the CMP displays RUNNING BIT. With the BIT ENBL/NO BIT/IDLE switch set to IDLE and power is applied, Power-Up BIT will execute and then the DDC enters the idle mode with the VDC MAIN MENU displayed on the CMP waiting for operator action. With the BIT ENBL/NO BIT/IDLE switch set to NO BIT, Power-Up BIT will execute and the VDC will execute the application program (this may include a program load) and the CMP will display messages monitoring current VDC activity. FULL BIT can also be selected from the STP. (For procedures, see NAVAIR 01-75PAC-12-12.) Should a failure occur, refer to the troubleshooting procedures for module fault isolation and replacement.
4B-5.
NON-OPERATIONAL MODES. 1. Self-Test Mode a. 2. When the VDC is powered up, it enters the Self-Test Mode and performs Power-Up BIT on its own hardware. The Self-Test Mode normally takes 55 seconds to complete.
Start-Up Mode a. When the Self-Test Mode has been completed, the VDC enters the Start-Up Mode. In this mode the VDC performs any initialization needed and then enters the Off-Line Mode.
4B-34
Figure 4B-18. VDC Characteristics and Troubleshooting (Sheet 1 of 8)
NAVAIR 01-75PAC-12
b. 5. CAUTION Observe the POWER ON, POWER GOOD, and BIT FAULT indicators are illuminated and fans are operating.
At the CMP: a. b. Observe the VDC POWER GOOD indicator is illuminated. Observe the VDC OVERTEMP indicator is extinguished. NOTE The BIT FAULT indicator will extinguish at completion of BIT (approximately 1 minute) if no fault is identified.
S S
Contains parts and assemblies susceptible to damage by Electrostatic Discharge (ESD). See NAVAIR 01-1A-23 (WP 005 00). A properly tested, maintained and grounded ESD wrist strap shall be worn by any person that removes or replaces any module identified as being ESD sensitive. The wrist strap shall be worn during the entire disconnect/connect process and when removing and replacing ESD protective connector caps.
6. 7.
If a failure is indicated, perform troubleshooting procedure to identify the failed module. If indications are normal, the following display will be observed on the CMP.
4B-12. VDC TEST AND TROUBLESHOOTING PROCEDURES. 4B-13. VDC TROUBLESHOOTING INITIALIZATION. 1. At the DPS electronic circuit breaker panel: a. b. c. 2. 3. Verify the PWR DIST BOX circuit breaker is closed. Verify the COP (CMP) circuit breaker is closed. Verify the VDC circuit breaker is closed. 2.
4B-14. VDC BIT TROUBLESHOOTING PROCEDURES. 1. If VDC is not already powered on, set POWER ON/OFF switch to ON. When the POWER ON/OFF switch is set to ON, power is applied to the VDC and the smart modules (GPCs and MMVPs) initialize by verifying their own processors using internal verification firmware. When Power-UP BIT is completed, the MMVPs idle in their respective control firmware waiting for commands from the VDC GPCs. The master VDC GPC reads the position of the VDC BIT ENBL/NO BIT/IDLE switch and stores this information in its own NVRAM. NOTE
At the TACCO Power Control panel, verify that the VDC/OFF switch is in the VDC position. At the CMP: a. b. c. Set the UNIT SEL switch to VDC. Set the VDC BIT ENBL/NO BIT/IDLE switch to IDLE. Set the AC ON/OFF switch to the ON position and observe that the green AC indicator is illuminated. NOTE
A POWER SUPPLY OVERTEMP condition does not result in a front panel OVERTEMP indication. It causes the power supply to shut down resulting in the POWER GOOD indicator not to illuminate. An OVERTEMP indication is caused by the actuation of a sensor placed in the VDC cooling fans resultant air flow. If the air flow temperature exceeds 68--70 degrees Celsius the OVERTEMP indicator illuminates. Maintenance procedures are located in NAVAIR 01-75PAC-2-5.
S
3. 4.
S S
4. At the VDC: a.
The BIT FAULT indicator will extinguish at completion of BIT (approximately 1 minute) if no fault is identified. This test will disrupt system operations.
Observe POWER ON and POWER GOOD indicators. If either indicator is extinguished, replace the power supply. Observe BIT FAULT indicator, if illuminated: a. b. At Rack D3, loosen eighteen captive screws securing the VDC logic module access cover and remove cover. Observe fault indicators on modules.
Set the POWER ON/OFF switch to the ON position.
4B-35
NAVAIR 01-75PAC-12
MODULE GPC MMVP FSVM RVID INDICATOR BFL LED BIT LED BIT LED BIT LED NORMAL INDICATION OFF GREEN GREEN GREEN NOTE In order to return to previous menu on the CMP, depress 0 (zero) and ENTR. 4B-17. VDC BIT ERROR LOGS. 1. The purpose of the BIT Error Log function is for the VDC to store/display BIT errors. The operator can then examine the BIT Error Logs from STP (see NAVAIR 01-75PAC-12-12) or from the CMP by selecting DISPLAY STATUS from the VDC MAIN MENU. a. b. The VDC BIT Error Log contains information from the VDC. The errors identify test, step number, subtest number, reporting GPC, retry count, and amplifying data. Errors are recorded when BIT is executing. The NAVCOMM PEP, TACCO PEP and SS 3 PEP BIT Error Logs reflect errors that resulted from internal BIT being performed. The Flight DEP and ARM/ORD DEP BIT Error Logs originate from the Flight and ARM/ORD DEP BIT. The Error Logs contain a Pass/Fail/True/False answer to specific internal BIT tests. The VDCU BIT Error Log provides the results of the VDC BIT. It provides a choice of suspected failed modules to be replaced, the failed test and subtest, and any amplifying data.
c. d. 5.
Refer to NAVAIR 01-75PAC-2-5 for module removal and replacement procedures for the failed module and perform VDC initialization procedure. Align the logic module access cover on front of VDC and tighten the eighteen (18) captive screws.
Observe OVERTEMP indicator, if illuminated: a. Check the air filter and clean as necessary to permit full air flow (see NAVAIR 01-75PAC-2-5). NOTE A failed fan may not be rotating or may be rotating backward. Fans are located immediately above the air filter. b. Using a flashlight verify, both fans are operating normally. If one or more fans has failed, perform the appropriate fan removal and installation procedures. (See NAVAIR 01-75PAC-2-5.) 3. 2. c.
To view the VDC BIT Error Log, select DISPLAY STATUS from the VDC MAIN MENU:
4B-15. VDC OPERATOR INITIATED BIT TROUBLESHOOTING PROCEDURES. 4B-16. If further troubleshooting is required, four additional BIT routines are provided: FULL BIT, FULL BIT CYCLE, MODULE BIT and MODULE BIT CYCLE. These BIT routines can be used as necessary to troubleshoot the VDC for specific module failures and intermittent failures. 1. After Power-Up BIT, the master GPC reads the VDC BIT ENBL/NO BIT/IDLE switch information. Using the switch information, the VDC performs the requested function. With the switch set to IDLE, the VDC goes into the idle mode and the VDC MAIN MENU is displayed on the CMP:
Select BIT ERROR LOG from the VDC STATUS MENU:

VDC STATUS MENU 1. BIT ERROR LOG 2. DCS STATUS 3. SWITCH
4B-18. VDC DCS STATUS. 1. The operator may view just the configuration of the VME card cage and the status of the modules contained within by using the DCS STATUS function. This is displayed on the CMP and provides slot number, SRA designation, status and the Error Log containing the status of the module. To view the VDC status pages, select DISPLAY STATUS from the VDC MAIN MENU:
2.
2.
If RUN BUILT-IN TEST is selected from the VDC MAIN MENU, the VDC BIT MENU is displayed. Select the BIT process desired.
VDC BIT MENU 1. FULL BIT 2. FULL BIT CYCLE 3. MODULE BIT 4. MODULE BIT CYCLE 5. COP BIT
3.
Select DCS STATUS from the VDC STATUS MENU:

4B-36
NAVAIR 01-75PAC-12
4. Once DCS STATUS has been selected, the following is displayed on the CMP:
SLOT 01 02 03 04 05 06 1 NEXT DCS GPC0 GPC1 STATUS PASS PASS EMPTY EMPTY EMPTY EMPTY LOG 02 03 04 05 06 07
CLEAR SET CLEAR CLEAR CLEAR CLEAR
4B-20. VDC FULL BIT TESTING. 1.

LOG

SLOT 07 08 09 10 11 12 1 MMVP0 MMVP1 MMVP2 MMVP3 MMVP4 NEXT DCS STATUS EMPTY PASS PASS PASS PASS PASS
FULL BIT testing is to aid the operator in identifying a failure in one of the installed modules. A failure is a condition where a module fails, but cannot be identified during the normal system operation. When the operator selects FULL BIT testing, the VDC Control Firmware will cycle through all installed modules. To initiate FULL BIT testing, select RUN BUILT-IN TEST from the VDC MAIN MENU:
2. 3.

SLOT 13 14 15 16 17 18 1 FSVM NEXT ETHERNET DCS MMVP5 STATUS PASS EMPTY EMPTY EMPTY EMPTY PASS LOG
4.
Select FULL BIT from the VDC BIT MENU:

NOTE In order to return to previous menu on the CMP, depress 0 (zero) and ENTR.
LOG

SLOT 19 20 21 RVID DCS STATUS EMPTY EMPTY PASS
5.
Once FULL BIT has been initiated and the VDC has reinitialized, the following is displayed on the CMP:
RUNNING BIT TIME >XXX 0> AAAAAA 1> AAAAAA
4B-19. VDC SWITCH STATUS. 1. 2. The purpose of the Switch Status function is to allow the operator to set and clear the Software Selectable Switches. The function of these switches is determined by the software installed at the time. To view the VDC Soft Switch Status, select SWITCH from the VDC STATUS MENU:
Where:
XXX AAAAAA
= Cycle count = Module under test (GPC0,

MMVP4, MMVP5).
GPC1, FSVM, RVID, MMVP0, MMVP1, MMVP2, MMVP3,
6.
When all modules are tested, the following message is displayed on the CMP for approximately 10 seconds, then the CMP will return to the VDC MAIN MENU:
3.
Once SWITCH has been selected, the following is displayed on the CMP:
SWITCH 01
SELECT TOGGLES SET
Where: 7.
XXX
When executing initiated BIT and a failure occurs, the failure data is displayed on the CMP as follows:
4B-37
NAVAIR 01-75PAC-12
UUUUUUUV FAILED BY GPCW LOGZZ STEP >XX.YYY REPLACE >VXX CONTINUE RESET TERMINATE CYCLE XXX TIME >YYY 0> AAAAAA 1> AAAAAA
Where:
XXX YYY AAAAAA
MMVP4, MMVP5).
FSVM, RVID, MMVP0, MMVP1, MMVP2, MMVP3,
Where:
UUUUUUU V W ZZ XX YYY VXX
= Module under test (GPC0, = = = = = =
GPC1, FSVM, RVID, MMVP0, MMVP1, MMVP2, MMVP3, MMVP4, MMVP5) Module ID (0,1,2.....) GPC ID (0,1) Error log index (031) Subtest number (0,1,2.....) Step number (0250) Slot numbers (V1V21). Replace failed modules starting with the
8. 9.
To terminate FULL BIT CYCLE testing, set the VDC BIT ENBL/NO BIT/IDLE switch to NO BIT. This action terminates FULL BIT CYCLE testing at the end of the current cycle. When cycling is terminated, the following message is displayed on the CMP:
first (left most) VXX slot number.
4B-21. VDC FULL BIT CYCLE TESTING. Where: 1. FULL BIT CYCLE testing is to aid the operator in identifying an intermittent failure. An intermittent failure is a condition where a module fails, but not often enough during normal operation to be identified. The cycling of BIT provides a means to subject the suspected module or group of modules to repeated testing without operator intervention with the intention of making the intermittent module fail. The operator may select BIT testing to cycle on a selected module or all modules. These selections are made by using the CMP keypad. The CMP keypad is used to select FULL BIT CYCLE on all modules. NOTE In order to return to previous menu on the CMP, depress 0 (zero) and ENTR. 3. To initiate the FULL BIT CYCLE, select RUN BUILT-IN TEST from the VDC MAIN MENU:
VDC MAIN MENU 1. RUN BUILTIN TEST 2. DISPLAY VERSION 3. DISPLAY STATUS 4. BURN NEW PROGRAM 5. HELP XXX
10.
When executing FULL BIT CYCLE testing and a failure occurs, the failure data is displayed on the CMP as follows:
UUUUUUUV FAILED BY GPCW LOGZZ STEP >XX.YYY REPLACE >VXX CONTINUE RESET TERMINATE
2.
Where:
= Module under test name (GPC0, = = = = = =

MMVP4, MMVP5) Module ID (0,1,2.....) GPC ID (0,1) Error log index (031) Subtest number (0,1,2.....) Step number (0250) Slot numbers (V1V21). Replace
GPC1, FSVM, RVID, MMVP0, MMVP1,MMVP2, MMVP3,
failed modules starting with the first (left most) VXX slot number.
4.
Select FULL BIT CYCLE from the VDC BIT MENU:

4B-22. VDC MODULE BIT TESTING. 1. 2. MODULE BIT testing allows the operator to perform BIT testing on a single module in a specific slot. The testing segregates the module from any interference that may have resulted from parallel testing during normal BIT. During MODULE BIT testing, BIT is performed on a selected module. This is the same BIT performed when BIT is executed on the entire VDC. The only difference is that it is the only testing being done in the system during execution. To initiate MODULE BIT testing, select RUN BUILT-IN TEST from the VDC MAIN MENU:
5. 6. 7.
Set the VDC BIT ENBL/NO BIT/IDLE switch to BIT ENBL to enable cycling. Depress ENTR on the CMP. This will cause the VDC to reinitialize, starting the FULL BIT CYCLE test. When FULL BIT CYCLE is being executed and after the VDC has reinitialized, the following is displayed on the CMP:
3.
4B-38
NAVAIR 01-75PAC-12
4. 5. Set the DDC BIT ENBL/NO BIT/IDLE switch to BIT ENBL to enable cycling. Select MODULE BIT from the VDC BIT MENU:
VDC BIT MENU 1. FULL BIT 2. FULL BIT CYCLE 3. MODULE BIT 4. MODULE BIT CYCLE 5. COP BIT 1 2 3 4 5 6 7

VDC SLOT 19 20 21 01 02 03 NEXT RVID GPC0 GPC1 MODULE BIT
6.
Once MODULE BIT has been initiated, the following is displayed on the CMP:
VDC 1 2 3 4 5 6 7 SLOT 01 02 03 04 05 06 NEXT MODULE BIT GPC0 GPC1
7.
When a selected module is being tested and after the VDC has reinitialized, the following message is displayed on the CMP:
MODULE BIT SLOT> XX
Where: 8.
XX
= Slot under test.
When the test is completed, the following message is displayed on CMP for approximately 10 seconds, then the CMP will return to the VDC MAIN MENU:

VDC 1 2 3 4 5 6 7 SLOT 07 08 09 10 11 12 NEXT MMVP0 MMVP1 MMVP2 MMVP3 MMVP4 MODULE BIT
Where: 9.
XXX
When executing MODULE BIT and a failure occurs, the failure data is displayed on the CMP as follows:
UUUUUUUV FAILED BY GPCW LOGZZ STEP >XX.YYY REPLACE >VXX CONTINUE RESET TERMINATE

VDC 1 2 3 4 5 6 7 SLOT 13 14 15 16 17 18 NEXT FSVM V W ZZ XX YYY VXX MODULE BIT MMVP5
Where:
UUUUUUU
4B-39
NAVAIR 01-75PAC-12
4B-23. VDC MODULE BIT CYCLE TESTING. 1. MODULE BIT CYCLE testing is to allow the operator to perform cyclic BIT testing on a single module in a specific slot. MODULE BIT CYCLE testing is to aid the operator in identifying an intermittent failure. An intermittent failure is a condition where a module fails, but not often enough during normal operation to be identified. The cycling of BIT provides a means to subject the suspected module to repeated testing without operator intervention. During MODULE BIT CYCLE testing, BIT is performed on a selected slot. This is the same BIT performed when BIT is executed on the entire VDC. The only difference is that it is the only testing being done in the system during execution. NOTE In order to return to previous menu on the CMP, depress 0 (zero) and ENTR. 3. To initiate the MODULE BIT CYCLE, select RUN BUILT-IN TEST from the VDC MAIN MENU:
VDC MAIN MENU 1. RUN BUILTIN TEST 2. DISPLAY VERSION 3. DISPLAY STATUS 4. BURN NEW PROGRAM 5. HELP 1 2 3 4 5 6 7 1 2 3 4 5 6 7

VDC SLOT 07 08 09 10 11 12 NEXT MMVP0 MMVP1 MMVP2 MMVP3 MMVP4 MODULE BIT
2.

VDC SLOT 13 14 15 16 17 18 NEXT FSVM MODULE BIT MMVP5

VDC 1 2 3 4 5 6 7 SLOT 19 20 21 01 02 03 NEXT RVID GPC0 GPC1 MODULE BIT
4.
Select MODULE BIT CYCLE from the VDC BIT MENU:

5. 6. 7.
Set the VDC BIT ENBL/NO BIT/IDLE switch to BIT ENBL to enable cycling. Depress ENTR on the CMP. This will cause the VDC to reinitialize, starting the MODULE BIT CYCLE testing. Once MODULE BIT CYCLE has been selected, the following is displayed on the CMP:
VDC 1 2 3 4 5 6 7 SLOT 01 02 03 04 05 06 NEXT MODULE BIT GPC0 GPC1
8.
Once the selected module is tested, the following is displayed on the CMP:
MODULE BIT SLOT> XX
Where: followed by:
XX
= Slot under test.
CYCLE XXX TIME >YYY 0> AAAA
Where:
XXX YYY AAAAAA
MMVP3, MMVP4, MMVP5).
FSVM, RVID, MMVP0, MMVP1, MMVP2,
4B-40
NAVAIR 01-75PAC-12
9. To terminate VDC MODULE BIT CYCLE testing, set the VDC BIT ENBL/NO BIT/IDLE switch to NO BIT. This action terminates MODULE BIT CYCLE testing at the end of the current cycle. When the test is completed, the following message is displayed on the CMP for approximately 10 seconds, then the CMP will return to the VDC MAIN MENU:
BIT TIME >XXX COMPLETED SOFT ERRORS >000 HARD ERRORS >000 UUUUUUUV FAILED BY GPCW LOGZZ STEP >XX.YYY REPLACE >VXX CONTINUE RESET TERMINATE
10.
Where:
Where: 11.
XXX
When executing MODULE BIT CYCLE testing and a failure occurs, the failure data is displayed on the CMP as follows:
4B-41
NAVAIR 01-75PAC-12
ANK ORDNANCE DEP EIA-485
EIA-422
TB
EIA-422
ANK
EIA-422
TB
TB EIA-422 ANK EIA-422
EIA-422
TACCO PEP
NAVCOMM PEP
SS 3 PEP
EIA-485
EIA-485
EIA-485
PILOT DEP EIA-485 PEP PWR SUPPLY AND SWITCH PEP PWR SUPPLY AND SWITCH PEP PWR SUPPLY AND SWITCH
AC PWR VIDEO DISTRIBUTION CONTROLLER (VDC)
AC PWR
AC PWR
EIA-170 RGB
EIA-343 RGB
EIA-343 RGB
EIA-343 RGB
PILOT CHRD
TACCO FPD
NAVCOMM FPD
SS 3 FPD
4B-42
Figure 4B-19. Console Functional Block Diagram (Sheet 1 of 2)
NAVAIR 01-75PAC-12
EIA-485
ANK
EIA-422
TB
EIA-422
ANK
EIA-422
TB
EIA-422
SS 1 PEP
SS 2 PEP
EIA-485
EIA-485
PEP PWR SUPPLY AND SWITCH
PEP PWR SUPPLY AND SWITCH
AC PWR
AC PWR
VIDEO DISTRIBUTION CONTROLLER (VDC)
EIA-343 RGB
EIA-343 RGB
SS 1 FPD
SS 2 FPD
Figure 4B-19. Console Functional Block Diagram (Sheet 2 of 2)
4B-43
NAVAIR 01-75PAC-12
(RACK D1) DPS CKT BKR PANEL PILOT DEP 5A ORD DEP 5A
(RACK D1) DPS CKT BKR PANEL TACCO FPD NAVCOMM FPD SENSOR STA NO. 3 FPD 5A
(RACK D1) DPS CKT BKR PANEL TACCO PEP NAVCOMM PEP SENSOR STA NO. 3 PEP
5A
5A
7 A
7 A
7 A
115 VAC B 115 VAC A
115 VAC B
115 VAC B
115 VAC B 115 VAC 3 115 VAC 3 115 VAC 3
(TACCO) 7368010 CONSOLE J6 J2 J1 J1 J2 J13 J6
(NAVCOMM) 7376530 CONSOLE J2 J1 J1 J2 J13 J6
(SS 3) 7368050 CONSOLE J2 J1 J1 J2 J13 ANK
PEP POWER SWITCH PEP POWER LED
PEP POWER SUPPLY
PEP
ANK
PEP POWER SWITCH
PEP POWER SUPPLY
PEP
ANK
PEP POWER SWITCH PEP POWER LED
PEP POWER SUPPLY
PEP
J12
TB
J12 PEP POWER LED
TB J1
J3 FPD
J4
J1
FPD POWER SWITCH
FPD BARO SWITCH
J9 FPD
J1
FPD POWER SWITCH
FPD BARO SWITCH
J9
FPD
FPD POWER SWITCH J3 J4 J5 J5 NOT USED
FPD BARO SWITCH
J9
J12
TB
J3 J5 J3 J1
J4 J4 NOT USED J5 J3 J1
J4 NOT USED
NOT USED
J5
J3
J1
J5 NOT USED (RACK F2) DEP
J2
J3
J2
J3
J2
J3
J4 NOT USED
EIA-485 CLK HI/LO DATA HI/LO GROUND
EIA-485 CLK HI/LO DATA HI/LO GROUND EIA-343 RGB
EIA-485 CLK HI/LO DATA HI/LO GROUND
J1
EIA-343 RGB (FWD LOAD CENTER) J3 J2 EIA-485 TERMINATOR 7367689-00 (FLIGHT STATION) FWD CIRCUIT BREAKER PANEL (MAIN DC BUS) PILOT PED SIGNAL CHRD LIGHTS J3 5A 28 VDC 5A J3 J1 28 VDC J1 PCHRD POWER SWITCH J2 EIA-343 RGB EIA-170 RGB (FLIGHT STATION) PCHRD J3 J4 (RACK D3) CD-155/ASQ-227(V) VIDEO DISTRIBUTION CONTROLLER (VDC)
EIA-485
DEP
J1
J2
EIA-485 CLK HI/LO GROUND DATA HI/LO
4B-44
Figure 4B-20. Console Signal Flow Diagram (Sheet 1 of 2)
NAVAIR 01-75PAC-12
(SENSOR STATION 2) ACOUSTIC SYSTEM CIRCUIT BREAKER PANEL ACOUSTIC SYSTEM 1
FPD DISPLAY 5A PROGRAMMABLE ENTRY PANEL 5A
ACOUSTIC SYSTEM 2
FPD DISPLAY 5A PROGRAMMABLE ENTRY PANEL 5A
115 VAC A
115 VAC 3
115 VAC A
115 VAC 3
(SS 1) CONSOLE PEP FPD POWER RELAY NO. 1 J2 115 VAC 3 J1 J1 J2 PEP J13 ANK
(SS 2) CONSOLE PEP FPD POWER RELAY NO. 1 J2 115 VAC 3 J1 J1 J2 PEP J13 ANK
PEP POWER SUPPLY
PEP POWER SUPPLY
J3 115 VAC A BARO SWITCH FPD J9
J4
115 VAC A J12 TB BARO SWITCH FPD J9
J3
J4
J12
TB
J5
J3
J1
HAND CONTROLLER
J5
J3
J1
HAND CONTROLLER
J14 SS 2
J14 J5
J5 SS 1 P5 SS 1 I/O CONNECTOR PANEL J1 P1 J3 P3 J5 P5 J10 P10 NOT USED J2 P2 J7 P7 J9 P9
P5
J10 P10 NOT USED
TERMINATOR 7367689-00
TERMINATOR 7367689-00 J6 EIA-343 RGB EIA-485 CLK HI/LO DATA HI/LO GROUND J5 EIA-343 RGB EIA-485 CLK HI/LO DATA HI/LO GROUND (RACK D3) CD-155/ASQ-227(V) VIDEO DISTRIBUTION CONTROLLER (VDC)
Figure 4B-20. Console Signal Flow Diagram (Sheet 2 of 2)
4B-45
NAVAIR 01-75PAC-12
(FORWARD LOAD CENTER) FWD CIRCUIT BREAKER PANEL (MAIN DC BUS) PILOT CHRD 28 VDC 28 VDC 28 VDC 28 VDC RTN 28 VDC RTN PED SIGNAL LIGHTS 28 VDC (RACK D1) DPS CIRCUIT BREAKER PANEL 115 VAC A ORD DEP 115 VAC A 5A DC NEUTRAL (FLIGHT STATION) DEP THE DEP DISPLAYS TABULAR OR GRAPHIC DATA. WHEN DISPLAYING SWITCH LEGENDS, THE DEP IS ABLE TO CHANGE THE STATE (COLOR OR BRIGHTNESS) WHEN A SWITCH IS ACTIVATED BY THE OPERATOR. THE DEP IS ABLE TO BLINK ALL DISPLAYABLE DATA AND DISPLAY DASHED VECTORS AND CIRCLES. THE PILOT DEP INTERFACES WITH THE VDC VIA AN EIA-485 INTERFACE, AND PROVIDES PILOT, COPILOT, AND FLIGHT ENGINEER CONTROL OF THE PCHRD IN THE COMPUTER ON-LINE AND VDC LOCAL MODES. J3 1 2 3 4 5 6 EIA-485 CLOCK HI EIA-485 CLOCK LO EIA-485 DATA HI EIA-485 DATA LO EIA-485 ID1 GROUND GROUND DC DC 28 VDC LIGHTING 5A 28 VDC LIGHTING RTN J1 A D E (RACK F2) DEP THE ORDNANCE DEP FUNCTIONS THE SAME AS THE PILOT DEP. THE ORDNANCE DEP IS SERIALLY CONNECTED TO THE PILOT DEP AND INTERFACES WITH THE VDC ON AN EIA-485 INTERFACE VIA THE PILOT DEP. IF THE ORDNANCE DEP IS REMOVED, THE TERMINATOR ON J3 MUST BE MOVED TO THE PILOT DEP J3. DC J3 1 2 3 4 EIA-485 CLOCK (VDC TERM) EIA-485 CLOCK RETURN EIA-485 DATA (VDC TERM) EIA-485 DATA RETURN J3 4 5 6 IN THE VDC OFF-LINE (LOCAL MODE), THE PCHRD SUPPORTS ONE WINDOW AND CAN DISPLAY RADAR. GROUND (FLIGHT STATION) J1 A B C D F G H PCHRD THE PCHRD IS A SELFCONTAINED DISPLAY, FEATURING A HIGH PERFORMANCE AMLCD.
5A
IN THE VDC ON-LINE MODE, THE PCHRD DISPLAYS GRAPHICS, VECTORS, AND TABLEAUS.
J2 1 2 3 4 5 6
PILOT DEP 115 VAC B 5A DC 115 VAC B NEUTRAL GROUND DC
J1 A D E
(RACK D3) VDC THE FSVM MODULE PROVIDES AN EIA-170 RGB VIDEO INTERFACE TO THE PCHRD FOR THE DISPLAY OF COLOR OR MONOCHROME VIDEO. THE MMVP 0 MODULE SENDS/RECEIVES OPERATOR REQUESTS TO/FROM THE PILOT AND ORDNANCE DEPS VIA AN EIA-485 INTERFACE. J1 A3 A2 A1 EIA-170 RED EIA-170 GREEN EIA-170 BLUE
J2 1 2 3 4 5 6 EIA-485 CLOCK HI EIA-485 CLOCK LO EIA-485 DATA HI EIA-485 DATA LO EIA-485 ID0 GROUND
J1 1 2 3 4 5 6
4B-46
Figure 4B-21. Console Functional Signal Flow Diagram (Sheet 1 of 6)
NAVAIR 01-75PAC-12
(TACCO) CONSOLE J2 1 2 3 4 12 13 19 21 36 10 18 31 28 37 7 33 5 VDC EIA-422 TXD + L_OUTENBL L_PRESENT GND GND EIA-422 TXD 5 VDC 5 VDC EIA-422 TXD 5 VDC GND GND EIA-422 TXD + SPARE L_PRESENT J12 2 6 3 7 4 5 11 1 J3 EIA-485 CLOCK RETURN FPD POWER SWITCH J1 A D H CHASSIS 2 OFF ON FPD BARO SWITCH REMOVES POWER FROM FPD IF CABIN ALTITUDE RISES ABOVE 20000 FEET. RESTORES POWER WHEN CABIN ALTITUDE RETURNS BELOW 20000 FEET. NC 3 115 VAC B EIA-485 DATA (VDC ) EIA-485 DATA RETURN EIA-485 CLOCK EIA-485 CLOCK RETURN EIA-485 DATA EIA-485 DATA RETURN CHASSIS GROUND 2 3 4 6 7 8 9 13 6 22 8 9 24 32 5 VDC EIA-422 TXD 5 VDC GND GND EIA-422 TXD + TB ENABLE EIA-485 CLOCK (VDC) 1 10 12 SPARE RIGHT TB THE TB INTERFACES WITH THE PEP USING A 3-BYTE FORMAT ON AN EIA-422 INTERFACE CHANNEL. TB MOVEMENTS ARE ENCODED USING ACCELERATION TECHNIQUES, WHICH ALLOW FOR FINE AND RAPID MOVEMENTS. IT ALSO INPUTS KEY DEPRESSIONS FOR HOOK AND VERIFY ACTIONS FROM ANY OF THE THREE HOOK VERIFY KEYS. THE TB RECEIVES 5 VDC OPERATING POWER FROM THE PEP. LEFT TB TRACKBALL MAY BE INSTALLED TO FACILITATE LEFT OR RIGHT SIDE UTILIZATION. J13 2 5 10 1 7 4 6 3 ANK THE ANK PROVIDES AN OPERATOR INTERFACE FOR ENTERING DATA INTO THE DDC VIA THE PEP AND VDC. THE ANK INTERFACES WITH THE PEP VIA AN EIA-422 INTERFACE. THE ANK RECEIVES 5 VDC OPERATING POWER FROM THE PEP.
PEP POWER SUPPLY (RACK D1) DPS CIRCUIT BREAKER PANEL TACCO PEP 115 VAC A 115 VAC B 115 VAC C 7 1/2 A DC TACCO FPD 115 VAC B CHASSIS J6 A B C D H OFF 2 5 8 ON NEUTRAL CHASSIS GND + VOLTAGE TO PWR LED GND TO PWR LED 1 DC PEP PWR LED 2 K C H A J2 3 6 9 115 VAC A 115 VAC B 115 VAC C F E D PEP POWER SWITCH THE PEP POWER SUPPLY PROVIDES POWER FOR THE PEP, ANK, AND TB. 5, 12, 55 AND 135 VDC POWER ARE SUPPLIED TO THE PEP. J1 A B C D E F G J K L M N P R S U V PSADJ GND PSADJ 5 VDC LOW POWER (LOGIC) GND V(H) RETURN V(H) 55 VDC CHASSIS GND 12 VDC (- SENSE -) (+) SENSE 5 VDC 5 VDC LOW POWER (LOGIC) GND 55 VDC RETURN LOW POWER (12VDC) GND LOW POWER (LOGIC) GND
PEP J1 A M L K J H G E D C B N P R T U V THE PEP IS A PLASMA DISPLAY THAT DISPLAYS TABULAR OR GRAPHIC DATA AND IS CAPABLE OF BEING DIVIDED INTO FIXED OR VARIABLE SIZE AREAS WITH DIFFERENT DATA MAPPED INTO EACH AREA. THE PEP REPORTS TOUCH PANEL EVENTS AND PROCESSES ANK AND TB INPUTS TO THE VDC VIA AN EIA-485 INTERFACE. THE PEP IS ABLE TO BLINK ALL DISPLAYABLE DATA AND DISPLAY DASHED VECTORS AND CONICS. THE PEP PROVIDES 5 VDC POWER TO THE ANK AND TB.
5A
J11 10 12 11 1 3 6 2 4 7 5
115 VAC B
J4 1 (RACK D3) VDC THE FSVM MODULE PROVIDES AN EIA-343 RGB VIDEO INTERFACE TO THE FPD FOR THE DISPLAY OF COLOR OR MONOCHROME VIDEO. THE MMVP 2 MODULE SENDS/RECEIVES OPERATOR REQUESTS TO/FROM THE PEP VIA AN EIA-485 INTERFACE. J9 A NEUTRAL CHASSIS GND J3 A1 A2 A3 1 2 3 4 J2 A B C EIA-343 BLUE EIA-343 GREEN EIA-343 RED J3 J5 D H FPD THE FPD IS A 20 INCH FULL COLOR DISPLAY WHICH USES AN AMLCD. IT PROVIDES TEXT, GRAPHICS, CHARACTERS, CONICS, RADAR VIDEO, IFF VIDEO DISPLAY. THE FPD INTERFACES WITH THE VDC VIA AN EIA-343 VIDEO INTERFACE. THE FPD HAS AN INPUT POWER FUSE ACCESSIBLE FROM THE REAR OF THE FPD. 2 3 4 6 7 8 9 15 17 EIA-485 CLOCK (VDC TERM) EIA-485 CLOCK RETURN EIA-485 DATA (VDC TERM) EIA-485 DATA RETURN EIA-485 CLOCK EIA-485 CLOCK RETURN EIA-485 DATA EIA-485 DATA RETURN PEP CODE
NOTE
FPD J2, J4, AND J6 ARE TERMINATED WITH 75 OHM TERMINATORS. TERMINATORS REMAIN WITH FPD UPON TURNIN.
J1
22
CHASSIS GROUND
J3
1 2 3 4
J4
1 2 3 4 NOT USED
J5
4 3 2 1 NOT USED
EIA-485 CLOCK (VDC) EIA-485 CLOCK RETURN EIA-485 DATA (VDC ) EIA-485 DATA RETURN
4B-47
NAVAIR 01-75PAC-12
(NAVCOMM) CONSOLE J2 1 2 3 4 12 13 19 21 36 10 18 31 28 37 7 33 5 VDC EIA-422 TXD + L_OUTENBL L_PRESENT GND GND EIA-422 TXD 5 VDC 5 VDC EIA-422 TXD 5 VDC GND GND EIA-422 TXD + SPARE L_PRESENT J12 2 6 3 7 4 5 11 1 J3 EIA-485 CLOCK RETURN FPD POWER SWITCH J1 A D H CHASSIS 2 OFF ON FPD BARO SWITCH REMOVES POWER FROM FPD IF CABIN ALTITUDE RISES ABOVE 20000 FEET. RESTORES POWER WHEN CABIN ALTITUDE RETURNS BELOW 20000 FEET. NC 3 115 VAC B EIA-485 DATA (VDC ) EIA-485 DATA RETURN EIA-485 CLOCK EIA-485 CLOCK RETURN EIA-485 DATA EIA-485 DATA RETURN CHASSIS GROUND 2 3 4 6 7 8 9 13 6 22 8 9 24 32 5 VDC EIA-422 TXD 5 VDC GND GND EIA-422 TXD + TB ENABLE EIA-485 CLOCK (VDC) 1 10 12 SPARE RIGHT TB THE TB INTERFACES WITH THE PEP USING A 3-BYTE FORMAT ON AN EIA-422 INTERFACE CHANNEL. TB MOVEMENTS ARE ENCODED USING ACCELERATION TECHNIQUES, WHICH ALLOW FOR FINE AND RAPID MOVEMENTS. IT ALSO INPUTS KEY DEPRESSIONS FOR HOOK AND VERIFY ACTIONS FROM ANY OF THE THREE HOOK VERIFY KEYS. THE TB RECEIVES 5 VDC OPERATING POWER FROM THE PEP. LEFT TB TRACKBALL MAY BE INSTALLED TO FACILITATE LEFT OR RIGHT SIDE UTILIZATION. J13 2 5 10 1 7 4 6 3 ANK THE ANK PROVIDES AN OPERATOR INTERFACE FOR ENTERING DATA INTO THE DDC VIA THE PEP AND VDC. THE ANK INTERFACES WITH THE PEP VIA AN EIA-422 INTERFACE. THE ANK RECEIVES 5 VDC OPERATING POWER FROM THE PEP.
PEP POWER SUPPLY (RACK D1) DPS CIRCUIT BREAKER PANEL NAVCOMM PEP 115 VAC A 115 VAC B 115 VAC C 7 1/2 A DC NAVCOMM FPD 115 VAC B 5A DC 1 PEP PWR LED 2 CHASSIS J6 A B C D H OFF J2 3 6 9 ON NEUTRAL CHASSIS GND + VOLTAGE TO PWR LED GND TO PWR LED K C H A 115 VAC A 115 VAC B 115 VAC C F E D PEP POWER SWITCH THE PEP POWER SUPPLY PROVIDES POWER FOR THE PEP, ANK, AND TB. 5, 12, 55 AND 135 VDC POWER ARE SUPPLIED TO THE PEP. J1 A B C D E F G J K L M N P R S U V PSADJ GND PSADJ 5 VDC LOW POWER (LOGIC) GND V(H) RETURN V(H) 55 VDC CHASSIS GND 12 VDC (- SENSE -) (+) SENSE 5 VDC 5 VDC LOW POWER (LOGIC) GND 55 VDC RETURN LOW POWER (12VDC) GND LOW POWER (LOGIC) GND
PEP J1 A M L K J H G E D C B N P R T U V THE PEP IS A PLASMA DISPLAY THAT DISPLAYS TABULAR OR GRAPHIC DATA AND IS CAPABLE OF BEING DIVIDED INTO FIXED OR VARIABLE SIZE AREAS WITH DIFFERENT DATA MAPPED INTO EACH AREA. THE PEP REPORTS TOUCH PANEL EVENTS AND PROCESSES ANK AND TB INPUTS TO THE VDC VIA AN EIA-485 INTERFACE. THE PEP IS ABLE TO BLINK ALL DISPLAYABLE DATA AND DISPLAY DASHED VECTORS AND CONICS. THE PEP PROVIDES 5 VDC POWER TO THE ANK AND TB.
2 5 8
J11 10 12 11 1 3 6 2 4 7 5
115 VAC B
J4 1 (RACK D3) VDC THE FSVM MODULE PROVIDES AN EIA-343 RGB VIDEO INTERFACE TO THE FPD FOR THE DISPLAY OF COLOR OR MONOCHROME VIDEO. THE MMVP 1 MODULE SENDS/RECEIVES OPERATOR REQUESTS TO/FROM THE PEP VIA AN EIA-485 INTERFACE. J9 A NEUTRAL CHASSIS GND J2 A1 A2 A3 1 2 3 4 J2 A B C EIA-343 BLUE EIA-343 GREEN EIA-343 RED J3 J5 D H FPD THE FPD IS A 20 INCH FULL COLOR DISPLAY WHICH USES AN AMLCD. IT PROVIDES TEXT, GRAPHICS,CHARACTERS, CONICS,RADAR VIDEO, IFF VIDEO DISPLAY. THE FPD INTERFACES WITH THE VDC VIA AN EIA-343 VIDEO INTERFACE. THE FPD HAS AN INPUT POWER FUSE ACCESSIBLE FROM THE REAR OF THE FPD. 2 3 4 6 7 8 9 15 PEP CODE 18 EIA-485 CLOCK (VDC TERM) EIA-485 CLOCK RETURN EIA-485 DATA (VDC TERM) EIA-485 DATA RETURN EIA-485 CLOCK EIA-485 CLOCK RETURN EIA-485 DATA EIA-485 DATA RETURN
NOTE
FPD J2, J4, AND J6 ARE TERMINATED WITH 75 OHM TERMINATORS. TERMINATORS REMAIN WITH FPD UPON TURNIN.
J1
22
CHASSIS GROUND
J3
1 2 3 4
J4
1 2 3 4 NOT USED
J5
4 3
2 1
NOT USED
EIA-485 CLOCK (VDC) EIA-485 CLOCK RETURN EIA-485 DATA (VDC ) EIA-485 DATA RETURN
4B-48
NAVAIR 01-75PAC-12
(SS 3) CONSOLE PEP POWER SUPPLY (RACK D1) DPS CIRCUIT BREAKER PANEL SENSOR STA NO. 3 PEP 115 VAC A 115 VAC B 115VAC C 7 1/2 A DC SENSOR STA NO. 3 FPD 115 VAC B 5A CHASSIS PEP POWER SWITCH THE PEP POWER SUPPLY PROVIDES POWER FOR THE PEP, ANK, AND TB. 5, 12, 55 AND 135 VDC POWER ARE SUPPLIED TO THE PEP. J2 3 6 9 ON 115 VAC OA 115 VAC OB 115 VAC OC F E D J1 A B C D E F G J K NEUTRAL CHASSIS GND + VOLTAGE TO PWR LED GND TO PWR LED 1 2 PEP PWR LED DC K C H A L M N P R S U V PSADJ GND PSADJ 5 VDC LOW POWER (LOGIC) GND V(H) RETURN V(H) 55 VDC CHASSIS GND 12 VDC (- SENSE -) (+) SENSE 5 VDC 5 VDC LOW POWER (LOGIC) GND 55 VDC RETURN LOW POWER (12VDC) GND LOW POWER (LOGIC) GND J1 A M L K J H G E D C B N P R T U V PEP THE PEP IS A PLASMA DISPLAY THAT DISPLAYS TABULAR OR GRAPHIC DATA AND IS CAPABLE OF BEING DIVIDED INTO FIXED OR VARIABLE SIZE AREAS WITH DIFFERENT DATA MAPPED INTO EACH AREA. THE PEP REPORTS PANEL TOUCH EVENTS, AND PROCESSES ANK AND TB INPUTS TO THE VDC VIA AN EIA-485 INTERFACE. THE PEP IS ABLE TO BLINK ALL DISPLAYABLE DATA AND DISPLAY DASHED VECTORS AND CONICS. THE PEP PROVIDES 5 VDC POWER TO THE ANK AND TB. J2 1 2 3 4 12 13 19 21 36 10 18 31 28 37 7 33 5 VDC EIA-422 TXD + L-OUTENBL L-PRESENT GND GND EIA-422 TXD 5 VDC 5 VDC EIA-422 TXD 5 VDC GND GND EIA-422 TXD + SPARE L-PRESENT J12 RIGHT TB THE TB INTERFACES WITH 2 THE PEP USING A 3-BYTE FORMAT ON AN EIA-422 6 INTERFACE CHANNEL. TB 3 MOVEMENTS ARE ENCODED 7 USING ACCELERATION TECHNIQUES, WHICH ALLOW 4 FOR FINE AND RAPID 5 MOVEMENTS. IT ALSO 11 INPUTS KEY DEPRESSIONS FOR HOOK AND VERIFY 1 ACTIONS FROM ANY OF THE 10 THREE HOOK VERIFY KEYS. 12 THE TB RECEIVES 5 VDC OPERATING POWER FROM THE PEP. J11 10 12 11 1 6 22 8 9 24 32 5 VDC EIA-422 TXD 5 VDC GND GND EIA-422 TXD + 3 6 2 4 7 5 LEFT TB TRACKBALL MAY BE INSTALLED TO FACILITATE LEFT OR RIGHT SIDE UTILIZATION. J13 2 5 10 1 7 4 6 3 ANK THE ANK PROVIDES AN OPERATOR INTERFACE FOR ENTERING DATA INTO THE DDC VIA THE PEP AND VDC. THE ANK INTERFACES WITH THE PEP VIA AN EIA-422 INTERFACE. THE ANK RECEIVES 5 VDC OPERATING POWER FROM THE PEP.
J6 A B C D H 2 5 8
OFF
J3 EIA-485 CLOCK RETURN EIA-485 DATA (VDC ) EIA-485 DATA RETURN 115 VAC B FPD BARO SWITCH REMOVES POWER FROM FPD IF CABIN ALTITUDE RISES ABOVE 20000 FEET. RESTORES POWER WHEN CABIN ALTITUDE RETURNS BELOW 20000 FEET. NC EIA-485 CLOCK EIA-485 CLOCK RETURN EIA-485 DATA EIA-485 DATA RETURN CHASSIS GROUND 2 3 4 6 7 8 9 13 TB ENABLE J4 1 (RACK D3) VDC THE FSVM MODULE PROVIDES AN EIA-343 RGB VIDEO INTERFACE TO THE FPD FOR THE DISPLAY OF COLOR OR MONOCHROME VIDEO. THE MMVP 3 MODULE SENDS/RECEIVES OPERATOR REQUESTS TO/FROM THE PEP VIA AN EIA-485 INTERFACE. J9 A NEUTRAL CHASSIS GND J4 A1 A2 A3 1 2 3 4 J2 A B C EIA-343 BLUE EIA-343 GREEN EIA-343 RED J3 J5 D H FPD THE FPD IS A 20 INCH FULL COLOR DISPLAY WHICH USES AN AMLCD. IT PROVIDES TEXT, GRAPHICS, CHARACTERS, CONICS, RADAR VIDEO, IFF VIDEO DISPLAY. THE FPD INTERFACES WITH THE VDC VIA AN EIA-343 VIDEO INTERFACE. THE FPD HAS AN INPUT POWER FUSE ACCESSIBLE FROM THE REAR OF THE FPD. 2 3 4 6 7 8 9 15 16 17 PEP CODE EIA-485 CLOCK (VDC TERM) EIA-485 CLOCK RETURN EIA-485 DATA (VDC TERM) EIA-485 DATA RETURN EIA-485 CLOCK EIA-485 CLOCK RETURN EIA-485 DATA EIA-485 DATA RETURN 22 CHASSIS GND J5 EIA-485 CLOCK (VDC) FPD POWER SWITCH J1 A D H CHASSIS 2 OFF ON 3 1
115 VAC B
NOTE
FPD J2, J4, AND J6 ARE TERMINATED WITH 75 OHM TERMINATORS. TERMINATORS REMAIN WITH FPD UPON TURN-IN.
J1
J3 EIA-485 CLOCK (VDC) EIA-485 CLOCK RETURN EIA-485 DATA (VDC ) EIA-485 DATA RETURN
1 2 3 4
J4
1 2 3 4 NOT USED
SPARE
4 3 2 1 NOT USED
4B-49
NAVAIR 01-75PAC-12
(SS 1) CONSOLE (REFER TO NAVAIR 01-75PAC-12-8) PEP/FPD POWER RELAY NO. 1 P/J 456 A PROGRAMMABLE ENTRY PANEL B C 5A P/J 460 FPD DISPLAY A 5A (REFER TO NAVAIR 01-75PAC-12-8) B REFER TO NAVAIR 01-75PAC-12-8 28 VDC ASP POWER DC GROUND V 115 VAC A C2 C1 115 VAC A BARO SWITCH J9 A FPD THE FPD IS A 20 INCH FULL COLOR DISPLAY WHICH USES AN AMLCD. IT PROVIDES TEXT, GRAPHICS, CHARACTERS, CONICS, RADAR VIDEO, IFF VIDEO DISPLAY. THE FPD INTERFACES WITH THE VDC VIA AN EIA-343 VIDEO INTERFACE. THE FPD HAS AN INPUT POWER FUSE ACCESSIBLE FROM THE REAR OF THE FPD. G H J 115 VAC A 115 VAC B 115 VAC C A2 B2 D2 A1 B1 D1 115 VAC A 115 VAC B 115 VAC C J1 A B C D E F G J K L M N P R S U V PSADJ GND PSADJ 5 VDC LOW POWER (LOGIC) GND V(H) RETURN V(H) 55 VDC CHASSIS GND 12 VDC (- SENSE -) (+) SENSE 5 VDC 5 VDC LOW POWER (LOGIC) GND 55 VDC RETURN LOW POWER (12VDC) GND LOW POWER (LOGIC) GND A M L K J H G E D C B N P R T U V J2 8 6 9 32 22 24 7 33 +5 VDC +5 VDC GND EIA-422 TXD+ EIA-422 TXDGND SPARE L PRESENT J11 2 3 4 5 6 7 11 1 12 10 RIGHT TB THE TB INTERFACES WITH THE PEP USING A 3-BYTE FORMAT ON AN EIA-422 INTERFACE. TB MOVEMENTS ARE ENCODED USING ACCELERATION TECHNIQUES, WHICH ALLOW FOR FINE AND RAPID MOVEMENTS. IT ALSO INPUTS KEY DEPRESSIONS FOR HOOK AND VERIFY ACTIONS FROM ANY OF THE THREE HOOK VERIFY KEYS. THE TB RECEIVES 5 VDC OPERATING POWER FROM THE PEP. TERMINATOR LEFT TB POSITION
(SS 2) ACOUSTIC SYSTEM CIRCUIT BREAKER PANEL ACOUSTIC SYSTEM NO. 1
PEP POWER SUPPLY THE PEP POWER SUPPLY PROVIDES POWER FOR THE PEP, ANK, AND TB. 5, 12, 55 AND 135 VDC POWER ARE SUPPLIED TO THE PEP.
PEP
J2 F E D
THE PEP IS A PLASMA DISPLAY THAT DISPLAYS TABULAR OR GRAPHIC DATA AND IS CAPABLE OF BEING DIVIDED INTO FIXED OR VARIABLE SIZE AREAS WITH DIFFERENT DATA MAPPED INTO EACH AREA. THE PEP REPORTS PANEL TOUCH EVENTS AND PROCESSES ANK AND TB INPUTS TO THE VDC VIA AN EIA-485 INTERFACE. THE PEP IS ABLE TO BLINK ALL DISPLAYABLE DATA AND DISPLAY DASHED VECTORS AND CONICS. THE PEP PROVIDES 5 VDC POWER TO THE ANK AND TB.
SPARE TB ENABLE
J12 12 10 11 1 2 3 4 5 6 7 J13
NOTE
CHASSIS C
J3 1 2 3 4 10 11 13
FPD J2, J4, AND J6 ARE TERMINATED WITH AC 75 OHM TERMINATORS. TERMINATORS REMAIN WITH FPD UPON TURN-IN. LEFT HAND CONTROLLER
36 18 28 37 10 31
+5 VDC +5 VDC GND EIA-422 TXD+ EIA-422 TXDGND
TRACKBALL MAY BE INSTALLED TO FACILITATE LEFT OR RIGHT SIDE UTILIZATION.
ANK THE ANK PROVIDES AN OPERATOR INTERFACE FOR ENTERING DATA INTO THE DDC VIA THE PEP AND VDC. THE ANK INTERFACES WITH THE PEP VIA AN EIA-422 INTERFACE. THE ANK RECEIVES 5 VDC OPERATING POWER FROM THE PEP.
EIA-343 RGB
EIA-343 RGB
EIA-343 RGB
1 3 2 4 5 6 7 NOT USED 8 9 10 11 12 13 14 15
1 3 2 4 5 6 7 8 9 10 11 12 13 14 15
1 3 2 4 5 6 7 8 9 10 11 12 13 14 15
1 3 2 4 5 6 7 8 9 10 11 12 13 14 15
+15V SIG RTN -15V PWR RTN BORESIGHT UNCAGE TAKE CONTROL STICK ELEVATION STICK AZIMUTH TRACK MODE VIDEO SELECT BIT 0 AUX AUDIO SELECT BIT 1 TRACK STICK IRDS OVERRIDE SLAVE STICK P14 1 3 2 4 5 6 7 8 9 10 11 12 13 14 15
EIA-485 CLOCK (VDC) EIA-485 CLOCK RETURN EIA-485 DATA (VDC) EIA-485 DATA RETURN
(SENSOR STATION 1) I/O CONNECTOR PANEL J10 P10
J5 9 10 11 12 13 14 15
J3
J1
(SENSOR STATION 1) P5 J5
P15
4 1 21 13 2 19 12 3
L PRESENT +5 VDC +5 VDC GND EIA-422 TXD+ EIA-422 TXDGND L OUTENBL
1 2 3 4 5 6 7 10
J4 1 2 3 4 15 17 10 20 EIA-485 CLOCK (VDC TERM) EIA-485 CLOCK RETURN EIA-485 DATA (VDC TERM) EIA-485 DATA RETURN
RIGHT HAND CONTROLLER
(RACK D3) VDC THE FSVM MODULE PROVIDES AN EIA-343 RGB VIDEO INTERFACE TO THE FPD FOR THE DISPLAY OF COLOR OR MONOCHROME VIDEO. THE MMVP 4 MODULE SENDS/RECEIVES OPERATOR REQUESTS TO/FROM THE PEP VIA AN EIA-485 INTERFACE. J5 A1 A2 A3 1 2 3 4
(SENSOR STATION 1) I/O CONNECTOR PANEL
J1 P1
A A
B B
C C
J3 P3
1 2 3 4 1 2 3 4
J5 P5
4 3 2 1
EIA-343 RGB EIA-343 RGB EIA-343A RGB EIA-485 CLOCK (VDC) EIA-485 CLOCK RETURN EIA-485 DATA (VDC) EIA-485 DATA RETURN
TERMINATOR
4B-50
NAVAIR 01-75PAC-12
(SS 2) CONSOLE (SS 2) ACOUSTIC SYSTEM CIRCUIT BREAKER PANEL ACOUSTIC SYSTEM NO. 2 P/J 456 A PROGRAMMABLE ENTRY PANEL B C 5A E F D 115 VAC A 115 VAC B 115 VAC C A2 B2 D2 A1 B1 D1 115 VAC A 115 VAC B 115 VAC C BARO SWITCH P 5A 115 VAC A C2 C1 115 VAC A (REFER TO NAVAIR 01-75PAC- -8) -12PEP/FPD POWER RELAY NO. 1 PEP POWER SUPPLY THE PEP POWER SUPPLY PROVIDES POWER FOR THE PEP, ANK, AND TB. 5, 12, 55 AND 135 VDC POWER ARE SUPPLIED TO THE PEP. J1 A B C D E F G J K L M N P R S U V J1 PSADJ GND PSADJ 5 VDC LOW POWER (LOGIC) GND V(H) RETURN V(H) 55 VDC CHASSIS GND 12 VDC (- SENSE -) (+) SENSE 5 VDC 5 VDC LOW POWER (LOGIC) GND 55 VDC RETURN LOW POWER (12VDC) GND LOW POWER (LOGIC) GND A M L K J H G E D C B N P R T U V PEP J2 8 6 9 32 22 24 7 33 +5 VDC +5 VDC GND EIA-422 TXD+ EIA-422 TXD GND SPARE L PRESENT J11 2 3 4 5 6 7 11 1 12 10 RIGHT TB THE TB INTERFACES WITH THE PEP USING A 3-BYTE FORMAT ON AN EIA-422 INTERFACE. TB MOVEMENTS ARE ENCODED USING ACCELERATION TECHNIQUES, WHICH ALLOW FOR FINE AND RAPID MOVEMENTS. IT ALSO INPUTS KEY DEPRESSIONS FOR HOOK AND VERIFY ACTIONS FROM ANY OF THE THREE HOOK VERIFY KEYS. THE TB RECEIVES 5 VDC OPERATING POWER FROM THE PEP. TERMINATOR LEFT TB POSITION
J2 F E D FPD THE FPD IS A 20 INCH FULL COLOR DISPLAY WHICH USES AN AMLCD. IT PROVIDES TEXT, GRAPHICS, CHARACTERS, CONICS, RADAR VIDEO, IFF VIDEO DISPLAY. THE FPD INTERFACES WITH THE VDC VIA AN EIA-343 VIDEO INTERFACE. THE FPD HAS AN INPUT POWER FUSE ACCESSIBLE FROM THE REAR OF THE FPD.
J9 A
A FPD DISPLAY
THE PEP IS A PLASMA DISPLAY THAT DISPLAYS TABULAR OR GRAPHIC DATA AND IS CAPABLE OF BEING DIVIDED INTO FIXED OR VARIABLE SIZE AREAS WITH DIFFERENT DATA MAPPED INTO EACH AREA. THE PEP REPORTS PANEL TOUCH EVENTS AND PROCESSES ANK AND TB INPUTS TO THE VDC VIA AN EIA-485 INTERFACE. THE PEP IS ABLE TO BLINK ALL DISPLAYABLE DATA AND DISPLAY DASHED VECTORS AND CONICS. THE PEP PROVIDES 5 VDC POWER TO THE ANK AND TB.
SPARE TB ENABLE
J12 12 10 11 1 2 3 4 5 6 7 J13
(REFER TO NAVAIR 01-75PAC-12-8)
NOTE
FPD J2, J4, AND J6 CHASSIS ARE TERMINATED WITH 75 OHM TERMINATORS. TERMINATORS REMAIN AC WITH FPD UPON TURN-IN.
J3 1 2 3 4 10 11 13
REFER TO NAVAIR 01-75PAC-12-8
28 VDC ASP POWER DC GROUND
36 18 28 37 10 31
+5 VDC +5 VDC GND EIA-422 TXD+ EIA-422 TXD GND
TRACKBALL MAY BE INSTALLED TO FACILITATE LEFT OR RIGHT SIDE UTILIZATION.
ANK THE ANK PROVIDES AN OPERATOR INTERFACE FOR ENTERING DATA INTO THE DDC VIA THE PEP AND VDC. THE ANK INTERFACES WITH THE PEP VIA AN EIA-422 INTERFACE. THE ANK RECEIVES 5 VDC OPERATING POWER FROM THE PEP.
LEFT HAND CONTROLLER (SENSOR STATION 1) I/O CONNECTOR PANEL J10 P10 1 3 2 4 5 6 7 NOT USED 8 9 10 11 12 13 14 15 1 3 2 4 5 6 7 8 9 10 11 12 13 14 15 (SENSOR STATION 2) P5 1 3 2 4 5 6 7 8 9 10 11 12 13 14 15 J5 1 3 2 4 5 6 7 8 9 10 11 12 13 14 15 +15V SIG RTN -15V PWR RTN BORESIGHT UNCAGE TAKE CONTROL STICK ELEVATION STICK AZIMUTH TRACK MODE VIDEO SELECT BIT 0 AUX AUDIO SELECT BIT 1 TRACK STICK IRDS OVERRIDE SLAVE STICK P14 1 3 2 4 5 6 7 8 9 10 11 12 13 14 15 P15 1 3 2 4 5 6 7 8 9 10 11 12 13 14 15
J5
J3
J1
4 1 21 13 2 19 12 3
L PRESENT +5 VDC +5 VDC GND EIA-422 TXD+ EIA-422 TXD GND L OUTENBL
1 2 3 4 5 6 7 10
EIA-343 RGB
EIA-343 RGB
EIA-343 RGB
J4 1 2 3 4 6 7 8 9 15 17 19
RIGHT HAND CONTROLLER
(RACK D3) VDC THE FSVM MODULE PROVIDES AN EIA-343 RGB VIDEO INTERFACE TO THE FPD FOR THE DISPLAY OF COLOR OR MONOCHROME VIDEO. THE MMVP 5 MODULE SENDS/RECEIVES OPERATOR REQUESTS TO/FROM THE PEP VIA AN EIA-485 INTERFACE. J6 A1 A2 A3 1 2 3 4
(SENSOR STATION 1) I/O CONNECTOR PANEL
J2 P2
A A
B B
C C
J7 P7
1 2 3 4 1 2 3 4
J9 P9
4 3 2 1
EIA-343 RGB EIA-343 RGB EIA-343 RGB EIA-485 CLOCK (VDC) EIA-485 CLOCK RETURN EIA-485 DATA (VDC) EIA-485 DATA RETURN
TERMINATOR
4B-51
NAVAIR 01-75PAC-12
FLAT PANEL DISPLAY
PEP POWER SUPPLY
BARO SWITCH
BARO SWITCH
PROGRAMMABLE ENTRY PANEL
ALPHANUMERIC KEYBOARD
TRACKBALL KEYBOARD COVER
NOTE FPD, PEP, PEP Power Supply, ANK, Trackball, and Keyboard Cover are similarly located at the SS 3 and NAVCOMM consoles.
Diagram 4C-1. TACCO Console
Diagram 4C-2. SS 3 Console
4B-52
Figure 4B-22. Console Equipment Location (Sheet 1 of 2)
NAVAIR 01-75PAC-12
BARO SWITCH
Diagram 4C-3. NAVCOMM Console
Figure 4B-22. Console Equipment Location (Sheet 2 of 2)
4B-53
NAVAIR 01-75PAC-12
BARC
RFD 251
INDEX NO. 1 2 3 4 5 6
SWITCH/INDICATOR POWER indicator OVERTEMP indicator FAULT indicator Power on/off pushbutton Up Arrow pushbutton CAL Indicator
FUNCTION Green LED illuminates when power is applied and power supply voltages are in tolerance. Green LED blinking indicates FPD is in standby. Red LED illuminates when internal temperature exceeds 90_C. RED LED blinking indicates FPD is warming up, wait up to 2.5 minutes. Red LED illuminates when a hardware failure is detected. Enables the operator to set the FPD in and out of standby status (no display and POWER indicator blinking). Used to increase the selected values or move forward through the active input screens. Yellow LED illuminates indicating calibrated condition. Press up and down arrow pushbuttons simultaneously to immediately set background and picture to a calibrated mode (background = 50 and picture = 100). The CAL indicator will not illuminate when FPD is in standby status. Used to decrease the selected values or move backward through the active input screens. Selects item to adjust: 1. Press one time: a. Brightness control bar appears at bottom of screen. Adjust brightness by pressing the no pushbuttons. Brightness control bar disappears after 3--5 seconds of inactivity. Contrast control bar appears at bottom of screen. Adjust contrast by pressing the no pushbuttons. Contrast control bar disappears after 3--5 seconds of inactivity. Input control bar appears at bottom of screen. If applied input signal is the actual input, a box with word INPUT appears and disappears after 3--5 seconds of inactivity. Various patterns (TEST PATTERN, INFO PATTERN, WHITE BOX, WHITE FIELD, BLACK FIELD, RED FIELD, GREEN FIELD, BLUE FIELD, Horizontal Graybars, Vertical Graybars, Grill ON/OFF, LFC BIT 1 to 6, and INPUT) can be selected sequentially by using the no pushbuttons. Password input appears. Password is necessary to access the On Screen Display (OSD) menus. Change Password and/or select menus by using the no pushbuttons.
7 8
Down Arrow pushbutton SEL pushbutton
FUNCTIONS
SEL
CAL
POWER OVERTEMP FAULT
b. c.
FPD FRONT VIEW

SEL
FUNCTIONS CAL
POWER OVERTEMP FAULT
1 2 3
2.
Press two times: a. b. c.
4 3.
Press three times: a. b. c.
NOTE Terminators connected to J02, J04 and J06 remain with the FPD when turned into supply. 4B-1. 4B-2. FPD CHARACTERISTICS. The FPD is a 20 diagonal full color display with a minimum screen area of 12.55 inches by 10.04 inches and incorporates a light-weight Active Matrix Liquid Crystal Display (AMLCD). It is capable of displaying text, graphics, characters, conics, radar video, and IFF video. The VDC supplies RGB colors to the TACCO, SS 1, SS 2, SS 3, and NAVCOMM FPDs through the EIA-343 bus.
4.
Press four times: a. b.
4B-3.
4B-54
Figure 4B-23. FPD Controls, Indicators, and Characteristics (Sheet 1 of 2)
NAVAIR 01-75PAC-12
INDEX NO. 1 1 2 2 COMPONENT Red (J01), Green (J03), Blue (J05) input connectors. Red (J02), Green (J04), Blue (J06) output connectors. Fuse F1 Horizontal Sync (J07), Vertical Sync (J08), Remote (J11), and Control (J10) connectors. FUNCTION Red, Green, and Blue signals enter the FPD at these connectors.
R G
5
J01 J02 J03 J04
These connectors must be terminated with 75 Ohm terminator (part number V313173) for this sync on green application. These terminators must remain on the FPD when the unit is removed and returned for repair. Input power fuse (part number 0034.3124). Not Used.
3 4 5
Power connector (J09). 115 VAC single phase input power.
J05 J06 HS CS J07 VS J08
REMOTE J11
LABEL INDICATION TO REMOVE COVER
FUSE
T 6.34 250V - SERIES FDT 164 250V - SERIES RFDXXXXX XXXXX WDC FD- SERIES RFD- SERIES -
POWER J09
CONTROL J10
3 4
ID LABEL CAUTION LABEL ATTENTION LABEL CERTIFICATION LABEL
FPD REAR VIEW
017-3757
Figure 4C-23. FPD Controls, Indicators, and Characteristics (Sheet 2 of 2)
4B-55
NAVAIR 01-75PAC-12
4B-1. 4B-2. FPD TROUBLESHOOTING. FPD troubleshooting is centered around the three indicators on the FPD front panel and the BIT displays. At power initialization, the following indications should appear: 1. 2. 3. POWER indicator illuminates. FAULT and OVERTEMP indicators are extinguished. Using the SEL switch-indicator, select INPUT (displayed on screen). Repeatedly depress up-arrow switch-indicator, test patterns will be displayed in the following order (See Diagram 4B-1 - 4B-17): 1. TEST PATTERN 2. INFO PATTERN 3. WHITE BOX 4. WHITE FIELD 5. BLACK FIELD 6. RED FIELD 7. GREEN FIELD 8. BLUE FIELD 9. Hor. Graybars (bars look vertical) 10. Ver. Graybars (bars look horizontal) 11. Grill ON/OFF 12. LFC BIT 1 13. LFC BIT 2 14. LFC BIT 3 NOTE 15. LFC BIT 4 16. LFC BIT 5 17. LFC BIT 6
S S
Use of the down-arrow key will allow test patterns to be viewed in reverse order. Test patterns must be selected using the arrow keys quickly. If the test pattern is allowed to stay on the screen for more than 3 seconds, the FPD will proceed to the Display Adjustment Mode. In the Display Adjustment Mode, the Information Bar will change to an Alignment Bar and the arrows keys will then adjust the display.
Diagram 4B-1. Test Pattern
4.
If any of these indications are not correct, first check fuse located on rear of FPD near J9. If replacement of fuse does not correct the problem, replace FPD.
Diagram 4B-2. Info Pattern
4B-56
Figure 4B-24. FPD BIT Procedures (Sheet 1 of 4)
NAVAIR 01-75PAC-12
Diagram 4B-3. White Box
Diagram 4B-4. White Field
Diagram 4B-5. Black Field
Diagram 4B-6. Red Field
Diagram 4B-7. Green Field
Diagram 4B-8. Blue Field
4B-57
NAVAIR 01-75PAC-12
Diagram 4B-9. Horizontal Graybars
Diagram 4B-10. Vertical Graybars
Diagram 4B-11. Grill ON/OFF
Diagram 4B-12. LFC BIT 1
4B-58
NAVAIR 01-75PAC-12
4B-59
NAVAIR 01-75PAC-12
4B-1. 4B-2.
FPD ALIGNMENT PROCEDURES.
FPD adjustment parameters are contained in Table 4B-1 and Table 4B-2. The firmware version of the FPD identifies which table to use. The firmware version number will appear on the FPD menu. Table 4B-1 settings are used with FPD Firmware Version 1.x. Table 4B-2 settings are used with FPD Firmware Version 3.x.
NOTE
S S S
Before attempting an FPD alignment, the FPD must have power on and the proper video input (DP/DCS or Acoustic) must be selected and displayed while entering the video parameters and when saving the scanset. (The scanset is associated with the current video source). Scanset 0 is for the DP/DCS settings; Scanset 1 is for Acoustics. Saving parameters in a scanset will overwrite the previous settings. The parameters listed in Table 4B-1 and Table 4B-2 are starting values. Each FPD and video source has different tolerances that may affect the displayed video. From these values, fine--tune the image, if necessary, using an appropriate full screen DP/DCS or Acoustic operational display image. (See Acoustic Fine-Tune Alignment paragraph.) The up and down pushbuttons are used in adjusting values up or down (adjustment mode exits if no pushbutton is pressed within six seconds).
S
1. 2.
3.
4.
Apply power to FPD. Adjust FPD for Brightness: a. Press the SEL pushbutton once. b. Using the up and down arrow pushbuttons, change the brightness as desired. Adjust FPD for Contrast: a. Press the SEL pushbutton twice. b. Using the up and down arrow pushbuttons, change the contrast as desired. Adjust FPD for Centering: a. Press the SEL pushbutton four times to get to the password menu. b. Enter the password code of 0000 by pressing the up arrow, then SEL, four times in that order. The RFD251 menu will be displayed when a valid password is entered. (This menu will also display the firmware version.) c. Using the up and down arrow pushbuttons, highlight TIMING MENU and press the SEL pushbutton. (Highlighted selections are in blue.) d. Highlight NR PIXELS and press the SEL pushbutton. e. Adjust the value according to Table 4B-1 or Table 4B-2 as appropriate, and press the SEL pushbutton. f. Highlight SAMPLE DELAY and press the SEL pushbutton. g. Adjust the value according to Table 4B-1 or Table 4B-2 as appropriate, and press the SEL pushbutton. h. Highlight PNL PHASE and press the SEL pushbutton. i. Adjust the value according to Table 4B-1 or Table 4B-2 as appropriate, and press the SEL pushbutton. j. This step for Firmware Version 3.x only. Highlight AUTO
PHASE ADJ and press the SEL pushbutton. Adjust the value according to Table 4B-2 and press the SEL pushbutton. l. This step is for Firmware Version 3.x only. Highlight APA PHASE and press the SEL pushbutton. m. Adjust the value according to Table 4B-2 and press the SEL pushbutton. n. Highlight MAIN and press the SEL pushbutton. o. Highlight GEOMETRY MENU and press the SEL pushbutton. p. Highlight HOR START and press the SEL pushbutton. q. Adjust the value according to Table 4B-1 or Table 4B-2 as appropriate, and press the SEL pushbutton. r. Highlight VER START and press the SEL pushbutton. s. Adjust the value according to Table 4B-1 or Table 4B-2 as appropriate, and press the SEL pushbutton. t. Highlight RESOLUTION and press the SEL pushbutton. u. Adjust the value according to Table 4B-1 or Table 4B-2 as appropriate, and press the SEL pushbutton. v. Highlight MAIN and press the SEL pushbutton. w. Highlight COLOR MENU and press the SEL pushbutton. x. Highlight MANUAL CALIBRATION and press the SEL pushbutton. y. Highlight RED OFFSET and press the SEL pushbutton. z. Adjust the value according to Table 4B-1 or Table 4B-2 as appropriate, and press the SEL pushbutton. aa. Repeat steps y and z for GREEN OFFSET, BLUE OFFSET, RED GAIN, GREEN GAIN, and BLUE GAIN. ab. Highlight COLOR MENU and press the SEL pushbutton. ac. Highlight MAIN and press the SEL pushbutton. ad. Highlight ADV. SETTING MENU and press the SEL pushbutton. ae. This step is for Firmware Version 3.x only. Highlight HOTKEY and press the SEL pushbutton. af. Adjust the value according to Table 4B-2 and press the SEL pushbutton. ag. This step is for Firmware Version 3.x only. Highlight HOTKEY OSD and press the SEL pushbutton. ah. Adjust the value according to Table 4B-2 and press the SEL pushbutton. ai. This step is for Firmware Version 3.x only. Highlight AUTOSET and press the SEL pushbutton. aj. Adjust the value according to Table 4B-2 and press the SEL pushbutton. ak. Highlight LFC and press the SEL pushbutton. al. Adjust the value according to Table 4B-1 or Table 4B-2 as appropriate, and press the SEL pushbutton. am. Highlight TEMP OFFSET and press the SEL pushbutton. an. Adjust the value according to Table 4B-1 or Table 4B-2 as appropriate, and press the SEL pushbutton. ao. Highlight MAIN and press the SEL pushbutton. ap. The INPUT STATUS MENU does not have adjustable parameters. It is for information only. k.
Highlight REMOTE MENU and press the SEL pushbutton. Highlight BAUDRATE and press the SEL pushbutton. Adjust the value according to Table 4B-1 or Table 4B-2 as appropriate, and press the SEL pushbutton. at. Highlight TIMEOUT and press the SEL pushbutton. au. Adjust the value according to Table 4B-1 or Table 4B-2 as appropriate, and press the SEL pushbutton. av. Highlight MAIN and press the SEL pushbutton. aw. Highlight DATABASE MENU and press the SEL pushbutton. ax. Highlight SCANSET and press the SEL pushbutton. ay. Adjust the value according to Table 4B-1 or Table 4B-2 as appropriate, and press the SEL pushbutton. az. Highlight SAVE and press the SEL pushbutton. The message SAVING SUCCESSFUL should be displayed. If an error message is displayed make sure the Scanset value is in accordance with Table 4B-1 or Table 4B-2 as appropriate. ba. Highlight MAIN and press the SEL pushbutton. bb. Press the SEL pushbutton again to quit.
Table 4B-1. FPD Menu Settings (Firmware Version 1.x)
aq. ar. as.
SCANSET 0 DP/DCS TIMING MENU NR PIXELS SAMPLE DELAY PNL PHASE GEOMETRY MENU HOR START VER START RESOLUTION RES. Note 1 COLOR (MANUAL CALIBRATION) RED OFFSET GREEN OFFSET BLUE OFFSET RED GAIN GREEN GAIN BLUE GAIN ADV. SETTING AUTOSET LFC TEMP OFFSET
INPUT STATUS MENU Note 2
SCANSET 1 ACOUSTIC 1680 10 2 or 14
1704 105 37
70 22 SXGA 1280x1024
71 31 SXGA 1280x1024
48 48 48 79 79 79 Not implemented On 20 (0oC/0oF)

Not adjustable, information only.
48 48 48 79 79 79 Not implemented On 20 (0oC/0oF)

Not adjustable, information only.
4B-60
Figure 4B-25. FPD Alignment Procedures (Sheet 1 of 2)
NAVAIR 01-75PAC-12
Table 4B-1. FPD Menu Settings (Firmware Version 1.x) (Continued) Table 4B-2. FPD Menu Settings (Firmware Version 3.x) (Continued)
SCANSET 0 DP/DCS BLUE GAIN ADV. SETTING HOTKEY HOTKEY OSD 0 As required Note 4 As required Note 4 ENABLED N/A As required Note 4 On As required Note 4 1 As required Note 4 As required Note 4 ENABLED N/A As required Note 4 On As required Note 4 INPUT STATUS MENU Note 2 REMOTE MENU BAUDRATE TIMEOUT DATABASE MENU SCANSET LOAD SAVE STATUS HFREQ, VFREQ, HOR RES, VER RES Note 3 CLEAR DATABASE MANUAL SEARCH 0 As required As required ENABLED N/A As required Note 4 On As required Note 4
Note 4 Note 4
SCANSET 0 DP/DCS
REMOTE MENU BAUDRATE TIMEOUT DATABASE MENU SCANSET LOAD SAVE STATUS HFREQ, VFREQ, HOR RES, VER RES Note 3 CLEAR DATABASE MANUAL SEARCH 19200 200
SCANSET 1 ACOUSTIC
19200 200
SCANSET 1 ACOUSTIC 100
RFD251 menu will be displayed when a valid password is entered. 2. 3. 4. Enter the password code of 0000. Using the up and down arrow pushbuttons, highlight GEOMETRY and press the SEL pushbutton. Using the up and down arrow pushbuttons, highlight HOR START and press the SEL pushbutton.
NOTE
100
None Off S On 50 (0oC/0oF) Not adjustable, information only. 19200 200
None Off S On 50 (0oC/0oF) Not adjustable, information only. 19200 200
AUTOSET LFC TEMP OFFSET
The following adjustment will vary between CPU modules due to output tolerance. 5. Value should have been set according to Table 4B-1 or Table 4B-2 as appropriate. Observe the green outline around the displayed box at the bottom of the screen. Adjust the value using the up and down pushbuttons to the point that both sides of the box are visible. a. If both sides adjust correctly, press SEL pushbutton and go to step l. b. If both sides of the box will not stay visible simultaneously, press the SEL pushbutton, and go to the next step. c. Using the up and down arrow pushbuttons, highlight TIMING MENU and press the SEL pushbutton. d. Highlight NR PIXELS and press the SEL pushbutton. e. Ensure the value is set according to Table 4B-1 or Table 4B-2 as appropriate, adjust if necessary and press the SEL pushbutton. f. Highlight PNL PHASE and press the SEL pushbutton. g. Starting from the value in Table 4B-1 or Table 4B-2, adjust the value a few points either way until both sides of the box become visible and press the SEL pushbutton. h. Using the up and down arrow pushbuttons, highlight GEOMETRY and press the SEL pushbutton. i. Using the up and down arrow pushbuttons, highlight VER START and press the SEL pushbutton. j. The value should have been set according to Table 4B-1 or Table 4B-2 as appropriate. Observe the green outline around the displayed box at the bottom of the screen. Adjust the value using the up and down pushbuttons to the point that the lower outline will disappear if it is moved down further. Press the SEL pushbutton. k. Using the up and down arrow pushbuttons highlight MAIN and press the SEL pushbutton. l. Using the up and down arrow pushbuttons, highlight DATABASE and press the SEL pushbutton. m. Using the up and down arrow pushbuttons, highlight SCANSET and press the SEL pushbutton. n. Adjust the value to 1 and press the SEL pushbutton. o. Using the up and down arrow pushbuttons, highlight SAVE and press the SEL pushbutton. The message SAVING SUCCESSFUL will be displayed. p. Using the up and down arrow pushbuttons, highlight MAIN and press the SEL pushbutton, RFD251 LFC menu displays. q. Using the up and down pushbuttons, highlight QUIT and press SEL pushbutton. Adjustment complete.
Notes 1. The RES setting automatically changes with the resolution adjustment. 2. The INPUT STATUS MENU parameters are not adjustable. They are information provided about the input signals parameters (horizontal and vertical frequency, pixel clock frequency, input signal lines, sync, sync polarity and backporch clamping). 3. These parameters are not adjustable. They are information only. 4. The LOAD, SAVE, CLEAR and MANUAL SEARCH functions are by operator choice.
1 As required Note 4 As required Note 4 ENABLED N/A As required Note 4 On As required Note 4
Table 4B-2. FPD Menu Settings (Firmware Version 3.x)

SCANSET 0 DP/DCS TIMING MENU NR PIXELS SAMPLE DELAY PNL PHASE AUTO PHASE ADJ APA PHASE GEOMETRY MENU HOR START VER START RESOLUTION RES. Note 1 COLOR (MANUAL CALIBRATION) RED OFFSET GREEN OFFSET BLUE OFFSET RED GAIN GREEN GAIN 110 110 110 100 100 110 110 110 100 100 72 29 SXGA 1280x1024 31 17 SXGA 1280x1024 1704 105 37 On 110 1704 50 40 On 110 SCANSET 1 ACOUSTIC
Notes 1. The RES setting automatically changes with the resolution adjustment. 2. The INPUT STATUS MENU parameters are not adjustable. They are information provided about the input signals parameters (horizontal and vertical frequency, pixel clock frequency, input signal lines, sync, sync polarity and backporch clamping). 3. These parameters are not adjustable. They are information only. 4. The LOAD, SAVE, CLEAR and MANUAL SEARCH functions are by operator choice.
4B-3.
ACOUSTIC FPD FINE-TUNE ALIGNMENT:

NOTE
The AOP must be executing and displaying System Status and Flex mode boxes on bottom of FPD screen to perform the procedure. 1. At FPD, press the SEL pushbutton four times to display password entry.
NOTE
The up and down arrow pushbuttons change the number. The SEL pushbutton enters the number. The
Figure 4B-25. FPD Alignment Procedures (Sheet 2 of 2)
4B-61
NAVAIR 01-75PAC-12
NO. 1
OFF NIGHT AUTO DAY
SWITCH/INDICATOR OFF/NIGHT/AUTO/DAY OFF
FUNCTION Controls the PCHRD operating mode. Turns off the display when not in use. For use in limited ambient light levels. For use in changing ambient light levels. Two sensors on the front of the display control automatic adjustment of the display based on sensed ambient light levels. For use in normal daytime light levels. Initiates the Manual BIT and Maintenance BIT sequences. The information displayed before initiating BIT is replaced by a test pattern and the BIT results. When pressed and released a second time, the previously displayed information is restored. The BRT switch scrolls BIT manual test status and parameters. Press and release again to restore previously displayed information. When not in Manual BIT and when the TST button is depressed and held approximately seven (7) seconds the Maintenance BIT page appears that displays information including lamp current, fan current, and display elapsed operating time. Allows the brightness to be manually increased or decreased independent of the operating mode selected. The brightness can be rapidly changed by holding the button or and incrementally changed by pressing and releasing or . In Maintenance BIT they are used to scroll through the selections. Allows the contrast to be manually increased or decreased. The contrast can be rapidly changed by holding the button or or incrementally changed by pressing and releasing or . The CON switch, in Maintenance BIT, is used to modify the configuration parameters.
NIGHT AUTO
CON
DAY 2 TST
BRT
CON
BRT
TST
4B-1. 4B-2.
PCHRD CHARACTERISTICS. The PCHRD is a self-contained instrument, featuring a high performance AMLCD. It contains all supporting micro-electronics, including display drivers, processors, aircraft interface electronics for standard video applications, and a variable speed fan. The PCHRD requires no external fans or cooling air. 1. The display offers a viewing area of 6.24H x 8.31W. At full brightness, the video display provides a white field more than 200 Feet Lambert (FL) to assure high contrast in full sunlight conditions. 2. The PCHRD contains safeguards to protect internal circuits during accidental removal and replacement with power applied. Input circuits will not suffer any damage with associated equipment not installed or installed in the power off condition. All output circuits are designed to prevent damage when the interface is shorted or open. All power supplies have short circuit, open circuit, and over voltage protection that will shut down the display should any of these conditions exists. CAUTION The display should not be turned on below 25_C. 3. The PCHRD contains two (2) temperature sensors that perform different functions. The rear temperature sensor is monitored by the PCHRD to determine an out of specification operating temperature. The PCHRD shuts down if the sensor reaches 85_C. The PCHRD will continue to monitor the temperature and if it drops below 85_C the PCHRD will again function. The front sensor is used to control the fan. At temperatures above 44_C the fan will activate. At ambient temperatures below 0_C, the AMLCD and fluorescent backlight require a warm-up period of about 10 minutes to meet full luminance and performance requirements. The PCHRD has no override mode or condition and there is no indication of an over temperature condition.
4B-3.
The PCHRD is a WRA installed in the Flight Station instrument panel.
4B-62
Figure 4B-26. PCHRD Controls, Indicators and Characteristics
NAVAIR 01-75PAC-12
4B-1. 4B-2. PCHRD BIT PROCEDURES. The PCHRD contains BITE to perform fault monitoring and fault isolation to the WRA. BIT for the PCHRD consists of Power-Up BIT, Manual BIT, Continuous BIT, and Maintenance BIT. 1. Power-Up BIT occurs when the display is first turned on. No display is present. The lamp temperature is also checked.
PASSED RUN BIT DISPLAY TEST PATTERN DISPLAY STATUS CONFIGURATION PARAMETERS EXIT MENU
ELAPSED TIME IS
XXXX: XX: XX
2.
Manual BIT is initiated when the TST button is depressed. A test pattern is displayed and text describing test results follows (see Diagram 4B-1). Depressing the TST button a second time exits Manual BIT and allows the PCHRD to display previously selected video. The Manual BIT is used by the operator to fault isolate the PCHRD.
CLICK THE TEST BUTTON TO RETURN TO VIDEO MODE
MAINTENANCE PAGE MENU
TEST PATTERN
SYNC
FRONT TEMP BACK TEMP FAN CURRENT FILAMENT CURRENT PHOTOCELL LEVEL
33 DEGREES 36 DEGREES OK OK 81
BOOT SOFTWARE ID P3 BOOT X.X CHECKSUM XXXXXXXX FLASH SOFTWARE ID P3 APP X.X CHECKSUM XXXXXXXX ELAPSED TIME IS XXXXXX
CLICK THE TEST BUTTON TO RETURN TO VIDEO MODE BIT PASSED AT XXX: XX: XX
STATUS
CONFIGURATION PARAMETERS
BOOT: P3 APPL: P3
BOOT X.X APP X.X
Diagram 4B-2. PCHRD Maintenance Pages

PRESS TEST TO EXIT
4B-3.
Fault isolation is performed utilizing Manual BIT. Should a failure occur, refer to the testing and troubleshooting procedure.
Diagram 4B-1. PCHRD Test Pattern
3.
Continuous BIT is an internal self-test that takes place continuously during normal operation and is transparent to the operator. It monitors lamp current and fan current, and will shut the display down if either becomes too high and threatens to damage the equipment. It also performs temperature control by monitoring lamp temperature and adjusting the fan speed as required.
CAUTION
S S
Contains parts and assemblies susceptible to damage by Electrostatic Discharge (ESD). See NAVAIR 01-1A-23 (WP 005 00). A properly tested, maintained and grounded ESD wrist strap shall be worn by any person that removes or replaces any module identified as being ESD sensitive. The wrist strap shall be worn during the entire disconnect/connect process and when removing and replacing ESD protective connector caps.
4.
Maintenance BIT is initiated when not in Manual BIT and the TST button is depressed and held approximately seven seconds. A maintenance page appears that displays information including lamp current, fan current, and display elapsed operating time (see Diagram 4B-2). The BRT switch is used to scroll through the selections. The CON switch in the Maintenance BIT is used to modify the configuration parameters. The TST button will return the display to the main menu or on-line.
Figure 4B-27. PCHRD BIT Procedures (Sheet 1 of 2)
4B-63
NAVAIR 01-75PAC-12
4B-4. PCHRD TESTING AND TROUBLESHOOTING PROCEDURES. 1. At the Forward Electrical Load Center Main Bus circuit breaker panel, ensure the PILOT CHRD circuit breaker is closed. 2. 3. 4. Place the PCHRD OFF/NIGHT/AUTO/DAY switch to DAY. Start Manual BIT by pressing and releasing TST button. Verify PCHRD test pattern is displayed as follows: SYNC/BIT FAILED Internal PCHRD failure 5. If the test pattern is not displayed as shown, check the following indications: TROUBLE Internal PCHRD failure CORRECTIVE ACTION Replace PCHRD. Refer to applicable PCHRD removal and installation procedures. (See NAVAIR 01-75PAC-2-5.) Replace PCHRD. Refer to applicable PCHRD removal and installation procedures. (See NAVAIR 01-75PAC-2-5.)
TEST PATTERN INDICATION No test pattern
SYNC
SYNC Status
NO SYNC/BIT FAILED
The PCHRD TST verifies the integrity of Check video cabling from VDC to video cabling from J1 of VDC to J3 of PCHRD for connectivity. PCHRD. If the video cabling connection is interrupted, the test pattern will indicate NO SYNC and BIT FAILED.
BIT PASSED AT XXX: XX: XX
BIT Status
6.
If test pattern is displayed as shown but the source video is not displayed, verify operation of VDC. (See VDC Characteristics and Troubleshooting.)
BOOT: P3 APPL: P3
BOOT X.X APP X.X
PRESS TEST TO EXIT
Diagram 4B-1. PCHRD Test Pattern
4B-64
Figure 4B-27. PCHRD BIT Procedures (Sheet 2 of 2)
NAVAIR 01-75PAC-12
1
NUM LOCK CAPS LOCK
4B-1. 4B-2.
ANK CHARACTERISTICS. The ANK, in conjunction with the TB, provides operator interface at the TACCO, SS 3, and NAVCOMM consoles for entering information to the PEP. The ANK is an 84-key keyboard integrated into the consoles used to control and enter data into the DDC. The TACCO, SS 1, SS 2, SS 3 , and NAVCOMM consoles each have identical ANKs. The ANK interfaces to the PEP using an EIA-422 interface. The ANK operates on 5 V dc 0.025 V dc received from the PEP.
SCROLL LOCK
PAD LOCK
PWR
4B-3.
Esc F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12
Pad Lk
Num Lock
Prt Sc SysRq
Scroll Lock
Pause Break
~ `
Home
Tab
! 1 Q A
@ 2 W S Z
Ctrl
# 3 E D X
Alt
$ 4 R F C
% 5 T G V
^ 6 Y H B
& 7 7Home U J N
* 8
4
( 9 I
5
9
PgUp
) 0 O6
*
3
+ =
Back space
P -: ; +
{ [
} ]
\ Enter
Pg Up
4B-4.
TESTING AND TROUBLESHOOTING PROCEDURES. NOTE This procedure assumes the Technician Readiness Test Procedures has been performed and the STP software is loaded and running. 1. Initiate ANK test in accordance with instructions found in NAVAIR 01-75PAC-12-2 for TACCO, NAVAIR 01-75PAC-12-5 for SS 3, NAVAIR 01-75PAC-12-3 for NAVCOMM, or NAVAIR 01-75PAC-12-8 for SS 1 and SS 2. NOTE
Caps Lock
K
0 Ins
L
< ,
Pg Dn
End
PgDn
SHIFT
> . Del
? /
SHIFT
End
Alt
Ins
Del
Fn
NO. 1 2 3 4 5
SWITCH/INDICATOR NUM LOCK CAPS LOCK SCROLL LOCK PAD LOCK PWR
FUNCTION Indicates numeric keypad is locked in for inputting data. Indicates all letter keys are locked in the uppercase. Indicates the scroll text function is locked out. Indicates lockout all key inputs except the F12/PAD LK key. Indicates power is applied to the ANK. 3. 4. 2.
A 30 second timer is active until all keys have been tested. Monitor the FPD for instructions to perform the test. Test verifies the correct receipt of the operator keystroke inputs from the ANK. The DDC will display possible problems and corrective actions on the FPD and/or print them on the printer. If the ANK fails test, refer to the ANK removal and installation procedures. (See NAVAIR 01-75PAC-2-5.)
Figure 4B-28. ANK Controls, Indicators, and Characteristics
4B-65
NAVAIR 01-75PAC-12
NO. 1 1 4B-1. 4B-2. SWITCH/INDICATOR SOFTKEYS FUNCTION Keys displayed on the PEP plasma panel provide a switch input capability to the DDC via the VDC using touch sensors.
PEP CHARACTERISTICS. The PEP is a plasma display panel that displays tabular data (alphanumeric) or graphic data (alphanumeric, vectors, and conics) and is capable of being divided into fixed or variable size areas with different data mapped into each area. The PEP reports touch panel events, and processes ANK and TB inputs to the VDC via an EIA-485 interface. The PEP is capable of changing the displayed switch legends state when a switch is activated by the operator. The PEP is able to blink all displayable data and display dashed vectors and conics. The plasma display has software programmable menus displayed as operator selectable softkeys. Operator pressed softkeys are sensed and sent to the DDC via the VDC. Softkey groupings, graphics, text, and BIT are programmed through the EIA-485 interface. The PEP also connects to an ANK and TB using EIA-422 interfaces. ANK and TB actions connect via the EIA-485 interface. The PEP Power Supply is a WRA that supplies power for the PEP, ANK, and TB. The PEP Power Supply is located behind the FPD at each station. Testing and troubleshooting for the PEP, PEP Power Supply, and PEP Power Cable may be accomplished both off-line without the VDC energized and on-line, assuming the STP is loaded and running in the DDC and the VDC is energized. Fault isolation is performed utilizing BIT and the DDC. Fault Isolation is to the PEP or the PEP Power Supply.
4B-3.
4B-4. 4B-5.
4B-66
Figure 4B-29. PEP Controls, Indicators, and Characteristics
NAVAIR 01-75PAC-12
4B-1. 4B-2. PEP TESTING AND TROUBLESHOOTING PROCEDURES. PEP OFF-LINE TEST PROCEDURE. NOTE If the VDC has been energized, to re-activate the PEP off-line testing, the VDC must be de-energized and the PEP PWR ON/OFF switch cycled to OFF and back to ON. 1. When power is applied and Power-Up BIT is completed, the PEP displays the following: 1. 4B-3. 3. If selected BIT passes, the corresponding legend will display PASS. If selected BIT fails, the corresponding legend will display FAIL (see Diagram 4B-1).
PEP ON-LINE TEST PROCEDURE. NOTE This procedure assumes the Technician Readiness Test Procedures have been performed and the STP software is loaded and running. Initiate PEP Test in accordance with instructions found in NAVAIR 01-75PAC-12-2 for TACCO, NAVAIR 01-75PAC-12-5 for SS 3, NAVAIR 01-75PAC-12-3 for NAVCOMM, or NAVAIR 01-75PAC-12-8 for SS 1 and SS 2.
SELECT BIT TEST TO RERUN
4B-4.
PEP TROUBLESHOOTING PROCEDURE. NOTE
PROCESSOR - PASS
PORT A - PASS
PROCESSOR
EXECUTE
MEMORY
EXECUTE EXECUTE
S
FIRMWARE - X.XX PEP SDLC ADDRESS - YYY
CPU MEMORY - PASS
PORT B - PASS
CHECKSUM ROM
If PEP will not initialize, perform PEP cleaning procedures in accordance with NAVAIR 01-75PAC-2-5. The test automatically terminates when no key input is detected for 30 seconds.
ROM CHECKSUM - PASS
ALPHA - PASS
BIT MAP MEMORY
EXECUTE
S
1.
DISPLAY STATUS
EXECUTE EXECUTE
BIT MEMORY - PASS
NUMERIC - PASS
HOST PORT KBD INTERFACE
ALPHA KEYBOARD - ATTACHED SERIAL TRACKBALL - ATTACHED
POWER SUPPLY - PASS
TRACKBALL - PASS
EXECUTE
Initiate PEP Test in accordance with instructions found in NAVAIR 01-75PAC-12-2 for TACCO, NAVAIR 01-75PAC-12-5 for SS 3, NAVAIR 01-75PAC-12-3 for NAVCOMM, or NAVAIR 01-75PAC-12-8 for SS 1 and SS 2. If PEP fails test, refer to applicable PEP removal and installation procedures. (See NAVAIR 01-75PAC-2-5 or NAVAIR 01-75PAC-2-15.)
TKB INTERFACE
EXECUTE
DISPLAY - PASS
TOUCH - PASS
POWER SUPPLY
EXECUTE
2. 4B-5.
PEP POWER SUPPLY TESTING AND TROUBLESHOOTING PROCEDURE. 1. 2. Ensure VDC POWER ON/OFF switch is OFF. For SS 3, TACCO or NAVCOMM, set the PEP power switch to the OFF position, then back to the ON position. For SS 1 and SS 2, cycle power to the PEP via applicable Programmable Entry Panel circuit breaker. Observe that the PEP POWER indicator is illuminated, indicating normal output power. Observe the POWER SUPPLY Test result displayed on the PEP reads PASS (see Diagram 4B-1). If either of the above conditions are absent, refer to applicable PEP power supply removal and installation procedures. (See NAVAIR 01-75PAC-2-5 or NAVAIR 01-75PAC-2-15.)
Diagram 4B-1. PEP Power Up Test Display Where: = Firmware Version YYY = PEP SDLC Address NOTE If no off-line test is selected for a period of 5 minutes, the PEP will automatically switch to screen saver. 2. After completion of Power-Up BIT, an individual BIT may be selected by depressing the desired BIT soft key and the EXECUTE soft key on the PEP test display (see Diagram 4B-1).
3. 4. 5. 6. 4B-6.
X.XX
PEP POWER CABLE TESTING AND TROUBLESHOOTING PROCEDURE. 1. If the PEP POWER indicator remains extinguished and/or the PEP POWER SUPPLY Test does not indicate PASS after the PEP power supply has been replaced with a known good unit, replace the PEP power cable.
Figure 4B-30. PEP Testing and Troubleshooting Procedures
4B-67
NAVAIR 01-75PAC-12
NO. 1 2 3
1
SWITCH/INDICATOR Brightness control pushbutton Brightness control pushbutton Power ON/OFF switch Softkeys
FUNCTION Increases intensity each time it is pushed. Decreases intensity each time it is pushed. Controls DEP power. Firmware determined keys displayed on the DEP plasma panel provide switch input capability to the DDC.
4B-1.
2
DEP CHARACTERISTICS. The DEP is a plasma display panel that displays tabular (alphanumeric) or graphic data (alphanumeric, vectors, and conics). When displaying switch legends, the unit is capable of changing the state when a switch is activated by the operator. The DEP is able to blink all displayable data and display dashed vectors and conics. The plasma display has software programmable menus displayed as operator selectable softkeys. Softkey selections are sensed and sent to the DDC. Softkey groupings, graphics, text, and BIT are programmed through an EIA-485 interface. The plasma resolution active display area is 3.7 inches high by 7.5 inches wide with 256 lines of 512 pixels. The display has a refresh rate of 60 Hz so there is no perceptible flicker. There are two DEPs, one at the flight station center pedestal and one at the ordnance station. The Pilot DEP provides Pilot, Copilot, and Flight Engineer control of the PCHRD during DDC (On-Line) and VDC Off-Line (local mode) of operation. The Ordnance DEP provides operator control at the Ordnance Station. The DEP contains BIT for fault monitoring and fault isolation to the WRA. BIT for the DEP consists of operator-initiated, Power-Up BIT (see DEP Testing and Troubleshooting Procedures), and In-Flight Performance Monitoring (IFPM) tests. When local video is selected, the DEP is not under DDC control. Therefore, the video displayed will be determined by the VDC.
4B-2.
4B-3.
4B-4. 4B-5.
4B-6.
4B-7.
4B-68
Figure 4B-31. DEP Controls and Indicators
NAVAIR 01-75PAC-12
4B-1. 4B-2. NOTE This procedure assumes the Technician Readiness Test Procedures have been performed and the STP software is loaded and running. 1. When power is applied and Power-Up BIT is completed, the DEP displays the Power-Up screen (see Diagram 4B-1). 3. DEP TESTING AND TROUBLESHOOTING PROCEDURES. 2. After completion of Power-Up BIT, individual BIT selections may be accessed by depressing BIT Menu (see Diagram 4B-1). Power-Up Test Menu is displayed. For On-Line Flight Station DEP test instructions, see NAVAIR 01-75PAC-12-1 and for Ordnance Station On-line DEP test instructions, see NAVAIR 01-75PAC-12-6. If DEP fails the test, replace the DEP. For DEP removal and installation procedures, see NAVAIR 01-75PAC-2-5 for flight and ordnance DEPs.
4.
Firmware SDLC Power-On BIT Passed Power-Up Reset
Touch to Initiate BIT Menu
Power-Up
Test Pattern
DEP Off-Line BIT Menu Firmware Version X.XX SDLC Address 6 Power-On BIT Passed
RAM Test ROM Test Display Test Touch Panel Test Processor Test Retired Beams Power-Up Test
PASS PASS PASS PASS PASS 0
TEST PATTERN PROCESSOR TEST TOUCH PANEL TEST POWER-UP TEST/RE-BOOT EXIT THE TEST MENU
PRESS EITHER INTENSITY BUTTON TO RETURN TO MENU
ROTATE THE DISPLAY
Power-Up Test Menu Diagram 4B-1. DEP Screen Displays
Touch Panel Test
Figure 4B-32. DEP Testing and Troubleshooting Procedures
4B-69
NAVAIR 01-75PAC-12
NO. 1 1 2 3 4 SWITCH/INDICATOR Recenter key Release key Trackball Hook Verify key FUNCTION When depressed, centers the cursor on the FPD. If the cursor is hooked, it is released and centered. When depressed, releases the cursor for normal movement after being hooked. Controls movement of the cursor on the FPD. When the cursor on the FPD is positioned on a target and this key is pressed, the target is hooked. The cursor will flash and the available target identification will be displayed. The cursor cannot be repositioned until released.
4B-1. 4B-2.
TRACKBALL CHARACTERISTICS. The Trackball (TB), in conjunction with the ANK, provides operator interface capability at each of the tactical control consoles. The TB is comprised of a 2.5 inch ball and three momentary pushbutton switches. The TACCO, SS 1, SS 2, SS 3, and NAVCOMM consoles each have identical TBs that can be mounted to accommodate left or right-handed operators. TESTING AND TROUBLESHOOTING PROCEDURES. NOTE
4B-3.
S S
1.
This procedure assumes the Technician Readiness Test Procedures has been performed and the STP software is loaded and running. When the Trackball Recenter is depressed, the hook symbol does not recenter but releases.
Initiate Trackball Test in accordance with instructions found in NAVAIR 01-75PAC-12-2 for TACCO, NAVAIR 01-75PAC-12-5 for SS 3, NAVAIR 01-75PAC-12-3 for NAVCOMM, or NAVAIR 01-75PAC-12-8 for SS 1 and SS 2 . If Trackball fails test, refer to applicable Trackball removal and installation procedures. 01-75PAC-2-5 or NAVAIR 01-75PAC-2-15.) (See NAVAIR
2.
4B-70
Figure 4B-33. Trackball Controls and Indicators
NAVAIR 01-75PAC-12
(NAVCOMM) TP-4840 PRINTER OR (RACK D1) DPS ELECTRONIC CIRCUIT BREAKER PANEL HCR J1 5A 115 VAC B J2 CENTRONICS INTERFACE A1J2 PT-540(V)7/U HARD COPY RECORDER (HCR)
(RACK D3) CD-155/ASQ-227(V) VIDEO DISTRIBUTION CONTROLLER (VDC)
Figure 4B-34. Printer Signal Flow Diagram
4B-71
NAVAIR 01-75PAC-12
(RACK D1) DPS ELECTRONIC CIRCUIT BREAKER PANEL HCR 5A J1 DC 115 VAC B NEUTRAL (RACK D3) VDC TRANSITION I/O MODULE THE TRANSITION I/O MODULE CONNECTS THE PRINTER AND VDC USING A PARALLEL CENTRONICS INTERFACE. IT PERMITS EACH OPERATOR (TACCO, SS1, SS2, SS 3, NAVCOMM) TO PRINT A COPY OF THE DISPLAYED TABLEAU, SENSOR GRAPHICS, AND TEXT DATA ON THE PRINTER. IT CONTAINS A PRINT BUFFER THAT STORES THE PIXEL VALUES FOR AT LEAST FOUR (4) 1280 X 1024 BIT SENSOR IMAGES AND GRAPHICS, PLUS THE COMMANDS REQUIRED TO CONTROL THEM. A REQUEST FOR A HARD COPY PRINTOUT FROM ANY OPERATOR VIEWING DATA WILL NOT DISRUPT THE DISPLAY FOR MORE THAN 0.5 SECOND. A1J2 1 2 3 4 5 6 7 8 9 10 11 12 13 15 16 18 19 20 21 22 23 24 25 STROBE DATA BIT 0 DATA BIT 1 DATA BIT 2 DATA BIT 3 DATA BIT 4 DATA BIT 5 DATA BIT 6 DATA BIT 7 ACKNOWLEDGE BUSY PAPER ERROR SELECT FAULT INPUT PRIME STROBE RTN DATA BIT 0 RTN DATA BIT 1 RTN DATA BIT 2 RTN DATA BIT 3 RTN DATA BIT 4 RTN DATA BIT 5 RTN DATA BIT 6 RTN DATA BIT 7 RTN ACKNOWLEDGE RTN BUSY RTN PAPER ERROR RTN GROUND GROUND J2 1 2 3 4 5 6 7 8 9 10 11 12 13 32 31 19 20 21 22 23 24 25 26 27 28 29 30 16 33 GROUND B C D (NAVCOMM) PRINTER RECEIVES 115 VAC B AIRCRAFT POWER ON J1 FROM THE HCR CIRCUIT BREAKER ON THE DPS ELECTRONIC CIRCUIT BREAKER PANEL. THE PRINTER CONVERTS DATA RECEIVED FROM THE VDC PARALLEL CENTRONICS INTERFACE INTO PRINTABLE DATA AND PROVIDES A HARD COPY PRINT OUT OF THE RECEIVED DATA.
4B-72
Figure 4B-35. Printer Functional Signal Flow Diagram
NAVAIR 01-75PAC-12
Table 4B-1. PT-540(V)7/U Front Panel Controls and Indicators
NO. 1 2
7 6 8 9 5
FAULT
SWITCH/INDICATOR
POWER circuit breaker BAUD RATE switch POWER ON indicator READY indicator ON LINE switch FAULT indicator
FUNCTION
Turns power on/off and provides overload protection for the HCR. Selects baud rate for selected serial interface. This switch has no effect when the INTERFACE SELECTION switch is in the PARALLEL position. Illuminates green when circuit breaker is set to on position, allowing ac power to be applied to the HCR and power supply to supply +5V dc. Illuminates green when HCR is in on-line mode; extinguishes when printer is in off-line mode. Enables HCR to be toggled between on-line and off-line modes. Illuminates red or blinks to indicate HCR faults as follows: Continuously illuminated: Out of paper or door open. Blinks once with pause: Logic module fault. Blinks twice with pause: Power supply fault. Blinks three times with pause: Motor fault. Blinks four times with pause: Printhead over/under temperature fault. When pressed for more than half a second, initiates a self test when HCR is in off-line mode. After successful completion of self-test, prints a test pattern and advances paper to next position. When pressed for more than half a second, prints buffer and advances paper when HCR is in off-line mode. Stops advancing paper when released. Illuminates yellow when fan-folded paper reaches twenty (20) sheets or less. HCR stops accepting data when a paper low condition exists. When pressed, prints buffer and advances fan-folded paper to top of next sheet when HCR is off-line. Illuminates yellow when parity checking was selected and received data has incorrect parity. A diamond symbol is printed in place of misreceived character. Blinks yellow when data is received by HCR on an active interface. When data transfer is completed, illuminates as long as there is unprinted data in buffer. Selects on-line interface. Normal selection is PARALLEL. Indicates accumulated time in hours that HCR is on. Activated by receipt of a bell code. When printer is in off-line mode, pressing both SELF TEST and PAPER ADV at the same time clears the printer buffer and extinguishes the BUSY indicator.
3 4 5
10 11
SELF TEST ON LINE
PAPER ADV
PAPER LOW
4 3
READY
FORM FEED
PARITY ERROR BUSY
12
POWER ON
SELF TEST switch
13
BAUD RATE INTERFACE SELECTION
ITA-2 USQ/ 69 188C PARALLEL RS 232 188144 ETHERNET
8 9 10
PAPER ADV switch PAPER LOW indicator FORM FEED switch PARITY ERROR indicator BUSY indicator INTERFACE SELECTION switch ELAPSED TIME meter BUZZER (internal not shown) BUFFER CLEAR
600/ 153.6K 300/ 76.8K 150/ 38.4K
1200 2400 4800 9600 75/19.2K
14
11 12 13
1
ON
OFF POWER
ELAPSED TIME
14
Diagram 4B-1. PT-540(V)7/U Front Panel Controls and Indicators
Figure 4B-36. PT-540(V)7/U HCR Controls and Indicators (Sheet 1 of 2)
4B-73
NAVAIR 01-75PAC-12
Table 4B-2. PT-540(V)7/U HCR Internal Switches
SWITCH NO. SWITCH DESIGNATION Parity enable switch FUNCTION Switch is active only if front panel INTERFACE SELECTION switch is set to 188-144, RS-232, or 188C. When switch is on, parity is enabled. When switch is off, parity is disabled. Switch is active only if front panel INTERFACE SELECTION switch is set to 188-144, RS-232, or 188C. When switch is on, selects even parity. When switch is off, selects odd parity. Normal selection of INTERFACE SELECTION switch is PARALLEL. Switch is active only if front panel INTERFACE SELECTION switch is set to 188-144, RS-232, or 188C. When switch is on, selects 1 stop bit (Baudot - 1 stop bit). When switch is off, selects 2 stop bits (Baudot - 1.5 stop bits). Switch is active only if front panel INTERFACE SELECTION switch is set to 188-144, RS-232, or 188C. When switch is on, primary baud rates can be selected by front panel BAUD RATE switch (i.e., 75, 150, 300, 600, 1200, 2400, 4800, and 9600). When switch is off, secondary baud rates can be selected by front panel BAUD RATE switch (i.e., 19.2K, 38.4K, 76.8K, and 153.6K). Switch is active only if front panel INTERFACE SELECTION switch is set to 188-144, RS-232, or 188C. When switch is on, hardware CTS/DTR handshake is selected. When switch is off, software XON/XOFF handshake is selected. Switch is only active if front panel INTERFACE SELECTION switch is set to 188C, 188-144, or RS-232. When switch is on, 7 data bits are selected. When switch is off, 8 data bits are selected. When switch is on and the 188C interface is selected, the OL-267 configuration is automatically set (4800 baud, no parity, 8 data bits, 1 stop bit, DTR handshaking, ASCII characters) overriding switch 1 -- 6 settings. When switch is on and any other interface is selected, there is no effect. When switch is off, the OL-267 configuration is disabled and the 188C is set by switches 1 - 6. When switch is on, the HCR automatically adds an LF code after any CR code received. When switch is off, VDC must send LF after a CR code. Switch is active only if front panel INTERFACE SELECTION switch is set to 188-144 or 188C. When switch is on, the 96 symbol ASCII character set is selected. When switch is off, the IBM emulation mode and IBM character set is selected. Switch is active only if front panel INTERFACE SELECTION switch is set to RS-232. When switch is on, the 96 symbol ASCII character set is selected. When switch is off, the IBM emulation mode and IBM character set is selected. Switch is active only if front panel INTERFACE SELECTION switch is set to PARALLEL. When switch is on, the 96 symbol ASCII character set is selected. When switch is off, the IBM emulation mode and IBM character set is selected. Normal selection is PARALLEL. Switch is active only if front panel INTERFACE SELECTION switch is set to ETHERNET. When switch is on, the 96 symbol ASCII character set is selected. When switch is off, the IBM emulation mode and IBM character set is selected. Selects input ac voltage range: 110 for 103 to 127 VAC; 220 for 207 to 264 VAC.
NOTE The HCR contains 13 internal switches. Twelve (12) switches are located on the right side under the top cover of the logic board. The other internal switch is the AC input voltage selection switch, located on top of the power supply.
Parity selection switch
3
110 VAC 1 2 3 4 5 6 7 8 9 10 11 12
Stop bit selection switch
ON
Alternate baud rate selection switch
Handshake selection switch
Data bit number switch
OL-267 configuration switch
8 9
Auto line feed selection for IBM emulation mode switch Character set selection switch for MIL-STD-188--144 and MIL-STD-188C interface Character set selection switch for RS-232 interface
10
Diagram 4B-2. PT-540(V)/7U HCR Internal Switches

11
Character set selection switch for parallel interface
12
Character set selection switch for Ethernet interface
PS
Input ac selection switch
4B-74
Figure 4B-36. PT-540(V)7/U HCR Controls and Indicators (Sheet 2 of 2)
NAVAIR 01-75PAC-12
4B-1. 4B-2. HCR DESCRIPTION AND CHARACTERISTICS The HCR, located at the NAVCOMM station, is a self contained unit incorporating a paper storage and transport mechanism, control and drive electronics, buffering devices, and power supply. The HCR interfaces with the VDC via a Centronics parallel interface. At standard TTL levels, the HCR receives parallel asynchronous 8-bit data. The received data will print in accordance with the 96 symbol ASCII subset. Internal switches provide character set selection. The HCR has eight functional sections. These are: power, data input and storage, front panel, controller, motor drivers/print control, motor, timing, and print. 4B-4. Two types of self-tests can be performed with the HCR; Power-On BIT and Operator Initiated Self-Test. Power-On BIT is a diagnostic BIT resident in memory and performed each time the HCR power circuit breaker is set to ON. Power-On BIT is completed in less than 5 seconds and performs tests on the Microprocessor ROM and RAM memories, indicators (all turn on momentarily), and power supply. If BIT is not successfully completed, the FAULT indicator illuminates and the HCR stays off line. Operator Initiated Self-Test is a self-test initiated by the operator at the HCR front panel. It causes the printer to advance the paper to the top of the form, print a shifting pattern of 80-column alphanumeric text, then it advances the paper to the top of the next form. If a failure occurs, perform HCR troubleshooting procedures.
4B-3.
Figure 4B-37. PT-540(V)7/U HCR Characteristics
4B-75
NAVAIR 01-75PAC-12
4B-1. 4B-2. HCR SERVICING PROCEDURES. PAPER CASSETTE ASSEMBLY REMOVAL. (Refer to Diagram 4B-1.) WARNING
To prevent electrical shock, verify HCR circuit breaker is open and tagged before attaching cable assemblies or installing modules. Do not begin procedure for 1 minute after power is removed. Avoid contacting electrical terminals to prevent injury. 1. 2. At NAVCOMM station, set HCR POWER ON/OFF circuit breaker to OFF. At DPS electronic circuit breaker panel, open and tag HCR circuit breaker.
5
CAUTION
1. Cassette Guide Rail 2. Printhead 3. Door
To prevent misalignment of door hinge, extend HCR for unobstructed space to allow free movement of door. 3. Lift latches on front of printer and open door. NOTE Paper cassette contains up to 550 sheets of paper and is heavier than it appears.
4. Hole Sensor 5. Cassette
4 3
Diagram 4B-1. HCR Paper Cassette Assembly Removal and Installation 4B-3. PAPER CASSETTE ASSEMBLY PAPER LOADING. (Refer to Diagram 4B-2.) 1. Load fan-fold paper with cassette resting on a flat surface and front of cassette facing operator. Release hinged top by spreading latches outward and pushing up front of top. Lift paper holder rod out of cassette. Insert one (1) package of fan-fold paper (P/N 19059-701150) into cassette with holes in paper on left side of cassette and with pages having extra holes on bottom. Insert paper holder rod under first layer of paper, then into rear slots in sidewall of cassette. Unfold two (2) sheets of paper, then position paper over the bars and front of cassette. DO NOT tear paper off. Close top of cassette. The friction latches will retain the top when the cassette is closed.
CAUTION
2. 3.
To avoid severe printhead damage, do not contact printhead surface with cassette during removal. Firmly support cassette until it is removed from the unit. 4. 5. Grasp front of cassette assembly and gently pull forward until cassette is free of printer. If cassette contains enough paper for self-test operation, proceed to paragraph 4B-4. If cassette requires paper, proceed to paragraph 4B-3.
4. 5. 6. 7.
4B-76
Figure 4B-38. PT-540(V)7/U HCR Servicing Procedures (Sheet 1 of 2)
NAVAIR 01-75PAC-12
8
NOTE Use paper loading label located on inner door to check final paper path.
1
4. 5.
2
While holding door almost closed, make sure paper is centered on both lower idler roller (2) and top idler roller(6) (refer to Diagram 4B-3). Close door (3) and secure each side by pushing in until both latches lock, then pull paper up to remove any slack (refer to Diagram 4B-3). Close and remove tag at HCR circuit breaker.
1. 2. 3. 4. 5. 6. 7. 8.
Rear Slot Paper (sheet) Bar Latch (2) Fan-fold (paper) Paper Holder Rod Paper Cassette Top (cover)
6.
7 6 5 4 3 6 7 8
FRONT
1. 2. 3. 4. 5. 6. 7. 8. 9.
Cassette Lower Idler Roller Door Paper Latch (2) Top Idler Roller Take-Up Roller Paper path Pinch Roller
Diagram 4B-2. Paper Cassette Paper Loading 4B-4. PAPER CASSETTE ASSEMBLY INSTALLATION. CAUTION
3 5 9
To avoid severe printhead damage, do not contact printhead surface with cassette during installation. Firmly support cassette until it is mounted on the guide rails. 1. 2. 3. Roll cassette (5) straight into printer on cassette guide rails (1) until spring contact is made (refer to Diagram 4B-1). Pull approximately 25 inches of paper out of cassette and route paper between lower idler roller (2) and slot in door (3) (refer to Diagram 4B-3). Pull paper up on outside of door to top idler roller (6), then push paper through slot in door (3) and over take-up roller (7) (refer to Diagram 4B-3).
Diagram 4B-3. HCR Paper Routing
Figure 4B-38. PT-540(V)7/U HCR Servicing Procedures (Sheet 2 of 2)
4B-77
NAVAIR 01-75PAC-12
4B-1. 4B-2. HCR OPERATIONAL PROCEDURES. POWER INITIALIZATION. 1. At the DPS electronic circuit breaker panel: a. 2. Verify HCR circuit breaker is closed. 3. 4. 5. 6. 7. 4B-4. 2. Press and release ON LINE switch and verify READY indicator extinguishes. NOTE When placed in on-line mode, the HCR sends an on-line status signal to the VDC and the HCR is enabled to receive data and continue printing. Press and release ON LINE switch and verify READY indicator illuminates. Press and release ON LINE switch and verify READY indicator extinguishes. Press and hold PAPER ADV switch and verify paper advances. Release PAPER ADV switch and verify paper stops advancing. Press and release FORM FEED and verify printer advances paper to top of next sheet.
At the NAVCOMM station: a. Set HCR POWER ON/OFF circuit breaker to ON and verify the following indications: (1) (2) (3) (4) POWER ON indicator illuminates. ELAPSED TIME meter display illuminates. HCR performs power-on BIT. Paper is advanced to top of form and stops. NOTE Allow approximately 5 seconds after setting POWER circuit breaker to ON for BIT to finish before performing any HCR procedures.
NORMAL SETUP. 1. 2. 3. 4. Check that HCR contains sufficient amount of paper. Verify POWER ON/OFF circuit breaker is OFF. Set the INTERFACE SELECTION switch to PARALLEL. Remove cover (see NAVAIR 01-75PAC-2-5) and set internal switches on logic module (pushing the switch inboard turns switch on). Set ac switch on power supply to 110 VAC and install cover in accordance with NAVAIR 01-75PAC-2-5. Set POWER ON/OFF circuit breaker to ON. Allow 5 seconds for completion of power-on BIT. Perform self-test.
3.
After successful completion of BIT, READY indicator illuminates and HCR sends on-line status to VDC indicating it is ready to receive data. If FAULT indicator illuminates after BIT, perform HCR troubleshooting procedures.
4B-3.
CONTROL PANEL ASSEMBLY FUNCTIONAL CHECKS. 1. Verify power is applied, cassette is installed and loaded, and READY indicator is illuminated. NOTE When placed in off-line mode, the HCR stops printing at the current line and sends an off-line status signal to the VDC to inhibit data transfer from the VDC.
5. 6. 7.
4B-78
Figure 4B-39. PT-540(V)7/U HCR Operating Procedures
NAVAIR 01-75PAC-12
4B-1. 4B-2. HCR TEST PROCEDURES. POWER-ON BIT. 1. 2. At the DPS electronic circuit breaker panel, verify HCR circuit breaker is closed. At the NAVCOMM station: a. b. 4B-3. Verify cassette is loaded with paper and installed. Perform power initialization.
SELF-TEST. 1. 2. 3. 4. 5. 6. 7. Press and release ON LINE switch and verify READY indicator extinguishes. Press SELF-TEST switch longer than 0.5 second and release. Verify paper advances to top of form if not already at top of form. HCR prints an 80 column self-test pattern. Press FORM FEED, paper advances to top of next form. If printout does not match Diagram 4B-1, perform HCR troubleshooting procedures. Press and release ON LINE switch and verify READY indicator is illuminated. If READY indicator does not illuminate, perform HCR troubleshooting procedures.
(NOT ACTUAL SIZE)
Diagram 4B-1. Sample Self-Test Pattern
Figure 4B-40. PT-540(V)7/U HCR Test Procedures
4B-79
NAVAIR 01-75PAC-12
4B-1. 4B-2. HCR TROUBLESHOOTING PROCEDURES. TROUBLESHOOTING GUIDE. (See Table 4B-1.) 1. Initiate Self-Test procedure. NOTE Refer to NAVAIR 01-75PAC-2-5 for HCR removal and installation procedures. Table 4B-1. Troubleshooting Guide FAILURE DESCRIPTION Control panel POWER ON indicator is illuminated and not HCR able to invoke self-test, paper advance, on line, or form feed HCR functions. DDC unable to receive status from the HCR or receiving in- HCR correct status. DDC unable to transmit control or data to HCR. Motor does not function or is noisy. Printed characters have vertical distortion. HCR HCR Check Drive Belt; replace if necessary. If Drive Belt replacement does not correct the problem, replace HCR. REPLACEMENT ASSEMBLY Table 4B-1. Troubleshooting Guide (Cont) FAILURE DESCRIPTION Self-test printout is missing one or more column alphanumeric characters or lines. Self-test printout has vertical white streaks. Check Printhead alignment before replacing Printhead Assembly. Self-test printout is printed on only half of the paper or missing every other dot column. HCR HCR HCR REPLACEMENT ASSEMBLY
PAPER LOW and FAULT indicators are illuminated, HCR HCR has an ample supply of paper, and door is latched. With the door closed, paper advances a few inches and Door improperly latched. FAULT indicator illuminates. POWER ON indicator will not illuminate and: a. ON LINE, FORM FEED, and PAPER ADV switches will a. Power circuit breaker tripped not function and drive motor does not run. b. After resetting POWER ON/OFF switch, ON LINE, FORM b. HCR FEED, and PAPER ADV switches will not function. After self-test is completed, paper continuously advances HCR from HCR. Paper will not advance, but drive motor runs. Drive Belt
4B-80
Figure 4B-41. PT-540(V)7/U HCR Troubleshooting Procedures
NAVAIR 01-75PAC-12
Table 4B-1. TP-4840 Printer Front Panel Controls and Indicators NO. 1 1 2
QUICK DISCONNECT THUMB SCREWS (2)
SWITCH/INDICATOR Paper Take-Up Assembly Power ON/OFF Switch Quick Disconnect Thumb Screws (2) PUSH OPEN RESET Pushbutton Switch LOW PPR Indicator
FUNCTION Applies power to Paper Take-Up Assembly. Used to remove Paper Take-Up Assembly from Printer Assembly. When pressed simultaneously, opens front panel. When pressed and held for three seconds, clears temporary soft fonts, macros, and data stored in buffer memory. When illuminated (amber), indicates that printer paper roll contains approximately 10 feet or less of paper. A red warning stripe will be visible on printer paper when six feet or less of paper remains. The function of this indicator is determined by the state of the FEED indicator. 1. When FEED indicator is extinguished, pressing pushbutton causes paper to advance. 2. When FEED indicator is flashing, it alerts operator that data is currently being received. 3. When FEED indicator is illuminated (amber), it alerts operator that data remains in the printer page buffer that has not been printed. Pressing pushbutton causes data to be printed and FEED indicator to be extinguished. NOTE The TP-4840 Printer is a page printer and will only print when its print buffer (one page or 66 lines) is full or when the FEED pushbutton is depressed. If a print-out is less than a page (66 lines) in length, and the print-out must be seen immediately, then the FEED pushbutton must be depressed.
2
PUSH OPEN PUSH TO CLOSE PUSH OPEN
QUICK DISCONNECT THUMB SCREWS (2)
3 4 5
6
PWR FAULT TEST FEED LOW PPR RESET
FEED Indicator and Pushbutton Switch
7
FRONT VIEW
4 1
LOCKING END CAP
SPRING LATCH
OFF
ON
7 8
TEST Pushbutton Switch FAULT Indicator
When pressed, causes printer to print test pattern, initiate internal diagnostics, and print results (passed or failed with error code). When illuminated (amber), indicates that printer is out of paper, front cover is not secured properly, or internal Built-In Test (BIT) function has detected a problem in the printer logic. When illuminated (white), indicates printer power is on.
PWR Indicator and Pushbutton Switch
PAPER PATH
SIDE VIEW
Figure 4B-42. TP-4840 Printer Controls and Indicators
4B-81
NAVAIR 01-75PAC-12
4B-1. 4B-2. 4B-3. TP-4840 PRINTER DESCRIPTION AND CHARACTERISTICS. The TP-4840 Printer is made up of three sub-assemblies. These are: Printer, Paper Take-Up Assembly, and Shock mount frame. See Diagram 4B-1. The Printer is a lightweight, microprocessor-controlled thermal printer designed for use in airborne environments. The Printer can emulate an HP LaserJet Printer utilizing the HP Printer Command Language Version 5 (PCL5) via a parallel interface. The printer interfaces with the VDC via a Centronics parallel interface. At standard TTL levels, the Printer receives parallel asynchronous 8-bit data. The received data will print in accordance with the 96 symbol ASCII. The Printer consists of a mechanical printer assembly and an electronics assembly. The mechanical printer assembly houses the printer chassis, control panel, and front cover; the electronics assembly houses the PCL5 controller and printer control unit modules, motherboard, power supply assembly and I/O cable assembly. Two types of self-tests can be performed with the Printer; Power-on BIT and Operator Initiated Self-Test. Power-On BIT is a non-printing self-test accomplished as part of the power up sequence and takes approximately 15 seconds to complete. During this time the FEED lamp is illuminated. When the FEED lamp extinguishes, power-on BIT is completely done and the paper will advance slightly. Power-On BIT performs tests on microprocessor RAM, SRAM, and DRAM memories and on internal timers. The FAULT indicator illuminates if Power-On BIT detects a problem in the printer logic. Operator Initiated Self-Test is a self-test initiated by the operator at the printer front panel. It causes the printer to print a test pattern, initiate internal diagnostics, and print results. If a failure occurs, perform printer troubleshooting procedures.
PAPER TAKE-UP ASSEMBLY
4B-4.
SHOCK MOUNT FRAME PRINTER PUSH OPEN PUSH TO CLOSE PUSH OPEN
4B-5.
Diagram 4B-1. TP-4840 Printer
4B-82
Figure 4B-43. TP-4840 Printer Characteristics
NAVAIR 01-75PAC-12
4B-1. 4B-2. TP-4840 PRINTER SERVICING PROCEDURES. PAPER LOADING. 1. 2. At DPS electronic circuit breaker panel, open and tag HCR circuit breaker. At NAVCOMM station: NOTE The NAVCOMM writing table must be removed and the printer support tray fully extended from the NAVCOMM console to provide access to the Paper Take-Up assembly. a. Remove the NAVCOMM writing table. 4B-3. WARNING PAPER REMOVAL FROM THE PAPER TAKE-UP ASSEMBLY. 1. Slide the NAVCOMM writing table away from the enclosure as far as possible. WARNING 13. 14. 9. 10. 11. 12. At DPS electronic circuit breaker panel, remove tag and close HCR circuit breaker. Set the Paper Take-Up assembly power switch to the ON position. Depress the PWR indicator/switch until indicator is illuminated. Verify the take-up motor engages and wraps the paper around the spool until taut. When paper is taut, the motor will disengage. Slide the printer support tray into the console and secure with two captive locking screws. Install the NAVCOMM writing table.
There are no slide stops on the printer support tray slides. Exercise extreme caution when extending the printer support tray. b. c. d. e. 3. Unlatch the printer support tray from the NAVCOMM console by rotating the two captive locking screws. Slide the printer support tray out of the console until Paper Take-Up Assembly clears NAVCOMM console. Depress the PWR indicator/switch until indicator is extinguished. Place the Paper Take-Up Assembly power switch to the OFF position. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16.
There are no slide stops on the printer support tray slides. Exercise extreme caution when extending the printer support tray. Unlatch the printer support tray from the NAVCOMM console by rotating the two captive locking screws. Slide the printer support tray out of the console as far as necessary. Depress the PWR indicator/switch until indicator is extinguished. Place the Paper Take-Up Assembly power switch to the OFF position. Locate the Locking End Cap Assembly located on the right hand side of the Paper Take-Up Assembly. Press down on the spring latch, located in the middle of the Locking End Cap Assembly, and rotate the Locking End Cap Assembly counterclockwise. Cut paper and roll up excess. Remove the Spool Assembly (paper take-up tube). Slide paper off the Spool Assembly. Reinstall spool assembly. Reinstall the Locking End Cap Assembly by pressing down the spring latch and rotating the assembly clockwise. Set the Paper Take-Up assembly power switch to the ON position. Depress the PWR indicator/switch until indicator is illuminated and secure with two captive locking screws. Slide the printer support tray into the console, and secure two captive locking screws. Install the NAVCOMM writing table.
Open front cover assembly by pushing two fasteners towards the control panel and swing the door open to its detent position. NOTE The paper supply roll shaft must be retained for continued usage.
4.
Snap paper supply roll shaft with empty paper supply roll out of printer chassis. Discard empty paper supply roll, but retain paper supply roll shaft. a. b. c. Insert paper supply roll shaft into new paper supply roll. Snap paper supply roll shaft into printer chassis, and pull out approximately 2 feet of paper. Close front cover assembly.
5.
Fold the end of the paper to a 45-degree angle by bringing the left hand corner towards the right side of the paper until the left edge of the paper is resting approximately 3/4 inch from the right hand edge of the paper. Crease the paper to retain the 45-degree fold. Route the paper under the two paper guides at the bottom and at the top of the Paper Take-Up writing surface. Bend the top right-hand corner under the paper so the flap is approximately 3/4 inch long and crease the paper to retain fold. Insert the end of the paper into the slot in the take-up spool (rotate the spool by hand to gain access to the slot).
6. 7. 8.
Figure 4B-44. TP-4840 Printer Servicing Procedures (Sheet 1 of 2)
4B-83
NAVAIR 01-75PAC-12
4B-4. RETRACTING PAPER FROM THE PAPER TAKE-UP ASSEMBLY. NOTE The Paper Take-Up power switch can be either ON or OFF when retracting paper for viewing data. 1. Grasp each side of the paper, in the area of the writing tablet, and pull back to unwind the paper from the Spool Assembly (paper take-up tube). When the task of reviewing the printout has been completed, release the paper. Set the Paper Take-Up Assembly power switch to ON, if not already in this position. Verify that the Paper Take-Up Assembly motor starts rewrapping the paper around the spool and shuts off once the paper is taut. 1. 2. 2. 3. 4. 3. 4. 5. 6. 4B-5. SPLICING PAPER FROM THE PAPER TAKE-UP ASSEMBLY. CAUTION The Paper Take-Up Assembly power switch must be set to the OFF position when performing this procedure. Grasp each side of the paper, in the area of the writing tablet, and pull back to unwind the paper from the Spool Assembly (paper take-up tube). Remove the appropriate section of paper. Overlap the two sections of paper by approximately 2 inches, and tape the sections together. Turn the Paper Take-Up Assembly power switch to the ON position. Verify the Paper Take-Up Assembly power switch starts rewrapping the paper around the spool and shuts off once the paper is taut. Close and remove tag at HCR circuit breaker.
4B-84
Figure 4B-44. TP-4840 Printer Servicing Procedures (Sheet 2 of 2)
NAVAIR 01-75PAC-12
4B-1. 4B-2. TP-4840 PRINTER OPERATIONAL PROCEDURES. POWER INITIALIZATION. 1. At the DPS electronic circuit breaker panel: a. 2. Verify HCR circuit breaker is closed. 4B-5. 4B-6. 3. 2. With power applied to the printer, observe that control panel PWR switch/indicator indicator bar is illuminated white. If not, press PWR switch/indicator and verify indicator bar is illuminated. Perform self-test.
TP-4840 PRINTER TEST PROCEDURES. SELF-TEST. 1. 2. 3. 4. 5. 6. Ensure printer is loaded with paper. With power applied to the printer, observe that control panel PWR indicator is illuminated white. If not, press PWR switch/indicator and verify indicator is illuminated. Open front cover to detent position and verify that LOW PPR and FAULT indicators illuminate amber. Close and secure front cover assembly and verify LOW PPR and FAULT indicators extinguish. If the FEED indicator bar is extinguished, press the FEED pushbutton and verify that paper continues to exit printer as long as pushbutton is pressed. If the FEED indicator bar is illuminated, press the FEED pushbutton and verify data from the page buffer is printed and the indicator bar extinguishes. Press the FEED pushbutton again and verify paper continues to exit as long as pushbutton is pressed. Momentarily press TEST pushbutton and observe that test pattern is printed. Press and hold FEED pushbutton until test sample is fully visible. Compare test sample with Diagram 4B-1. Check the quality of printout is such that characters and symbols are easily recognizable without clipping or degradation and that density of all characters is uniform. If printer has printed -Diagnostic Selftest: Passed!, proceed to step 10. If printer has printed -Diagnostic Selftest: Failed!, perform Printer Troubleshooting Procedures. 10. Depress PWR switch/indicator and verify that PWR indicator bar extinguishes.
At the NAVCOMM station: a. Depress PWR switch/indicator and verify the following indications: (1) Indicator bar on PWR switch/indicator illuminates. NOTE Allow approximately 15 seconds after setting PWR switch/indicator to ON for BIT to finish before performing any procedures.
3.
After successful completion of BIT, the printer sends on-line status to VDC indicating it is ready to receive data. If FAULT indicator illuminates after BIT, perform printer troubleshooting procedures.
4B-3.
CONTROL PANEL ASSEMBLY FUNCTIONAL CHECKS. 1. 2. 3. Verify power is applied and paper is installed. If the FEED indicator is extinguished, press the FEED pushbutton and verify that paper continues to exit printer as long as pushbutton is pressed. If the FEED indicator is illuminated, press the FEED pushbutton and verify data from the page buffer is printed and the indicator extinguishes. Press the FEED pushbutton again and verify paper continues to exit as long as pushbutton is pressed. NOTE FEED indicator will flash when host is sending data to printer. 7. 8. 9.
4B-4.
NORMAL SETUP. 1. Check that printer contains sufficient amount of paper.
Figure 4B-45. TP-4840 Printer Operating, Testing, and Troubleshooting Procedures (Sheet 1 of 2)
4B-85
NAVAIR 01-75PAC-12
4C-7. 4C-8. TP-4840 PRINTER TROUBLESHOOTING PROCEDURES. TROUBLESHOOTING GUIDE. (See Table 4B-1.) 1. Initiate SELF-TEST procedure.
NOTE
Refer to NAVAIR 01-75PAC-2-5 for printer removal and installation procedures.
Table 4B-1. Troubleshooting Guide FAILURE DESCRIPTION Control panel PWR switch/indicator is illuminated and not Printer able to invoke TEST or FEED functions. Central computer unable to receive status from the printer or Printer receiving incorrect status. Central computer unable to transmit control or data to printer. Printer Motor does not function or is noisy. Test Pattern not as specified. Printer Printer REPLACEMENT ASSEMBLY
Control panel FAULT indicator is illuminated, printer has an Printer ample supply of paper, and door is latched. Paper does not advance when FEED pushbutton is pressed. Printer Abnormal message printout (test pattern normal). Printer Printer will not print in test or on-line mode and has ample Printer supply of paper and door is latched. PWR switch/indicator will not illuminate and: a. FEED switch will not function. b. After resetting PWR switch/indicator, FEED switch/indicator will not function. a. HCR circuit breaker tripped b. Printer
(NOT ACTUAL SIZE) Diagram 4B-1. Sample Self-Test Pattern
Printed characters have vertical distortion.
Printer
4B-86
Figure 4B-45. TP-4840 Printer Operating, Testing, and Troubleshooting Procedures (Sheet 2 of 2)
SECTION 5
LOGIC UNIT 1
THIS SECTION CONTAINS DATA APPLICABLE TO AIRCRAFT NOT INCORPORATING AFC 506 OR AFC 607
SECTION 5 LOGIC UNIT 1
NAVAIR 01-75PAC-12
(RACK D2) CP-901(V)( )/ASQ-114 (V) DIGITAL DATA COMPUTER (CENTRAL COMPUTER) (SEE SECTION 4) A1J84 GROUP 0 OUTPUT DATA CH00 OUTPUT CONTROL A1J88 CH01, 02, AND 03 OUTPUT CONTROL A1J72 CH01 INPUT DATA AND INPUT CONTROL A1J68 CH00 INPUT DATA AND INPUT CONTROL (RACK C 1) COMMUNICATION INTERFACE NUMBER 1 (COMM INTERFACE 1) (SEE NAVAIR 01-75PAC- -3) -1260 WPM 3000 100 OPR TEST TEST SELECT 1 2 24 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 1514 1312 11 1/4 AMP 25
PWR SUP M -1 M -2 M -3 M -4 M - 21 M -5 M -6 M -7 M -8 M - 23 M -9 M - 10 M - 11 M - 12 M - 28 M - 29 M - 30 M - 31 M - 32 M - 24 M - 25 M - 26 M - 27 FAULT M - 22
A B
3J5 GROUP 0 OUTPUT DATA CH02 OUTPUT CONTROL SS 1 SWITCH INPUTS SS 1 LAMP OUTPUTS D
TEST OFF OPR
+4V RET
SCOPE OUT
-10V
SPARE
SYNC OUT
(CENTER CONSOLE) C-7629/AYA- CONTROL-8 -INDICATOR (PILOT KEYSET) (SEE SECTION 3)

INTENSITY ADJ
5J2 PILOT KEYSET SWITCH INPUTS 5J1 PILOT KEYSET LAMP OUTPUTS
(FS 288) J/P288
E F
J/P290
(RACK D 3) CV-2461A/A SIGNAL DATA CONVERTER (SDC) (SEE NAVAIR 01-75PAC- -2) -12XXXX XXXXXXXX XXXXXXXX
M - 13
M - 14
M - 15
M - 16 M - 33 M - 34 M - 35
J2 GROUP 0 OUTPUT DATA CH 3 OUTPUT CONTROL (SENSOR STATION 1) C-7627(P)/AYA- CONTROL -8 INDICATOR (SS1 UNIVERSAL KEYSET) (SEE SECTION 3)
INTENSITY ADJ PWR SUP M -1 M -2 M -3 M -4 M - 21 FAULT M - 22
M - 17
M - 18
M - 19
M - 20
(NAVCOMM STATION) C-7627(P)/AYA- CONTROL-8 -INDICATOR (NAVCOMM UNIVERSAL KEYSET) (SEE SECTION 3)
INTENSITY ADJ PWR SUP M -1 M -2 M -3 M -4 M - 21 M -5 M -6 M -7 M -8 M - 23 M - 24 M - 25 M - 26 M - 27 FAULT M - 22
XXXX XXXX XXXXXXXXXXXX XXXX XXXX XX XXXXXXXXXXXX
12 10J2 10J1
4J2 NAVCOMM LAMP OUTPUTS 4J1 NAVCOMM SWITCH INPUTS J
XXXX XXXX
XX
XX
XX
XX
XX
XX XX XX M -5 M -6 M -7 M -8
M - 23 XX XX XX XX M -9 M - 10 M - 11 M - 12 M - 28 M - 13 M - 14 M - 15 M - 16 M - 33 M - 17 XXXXX XXX XXXXXXXX XXXXX XXX M - 18 M - 19 M - 20
M - 24
M - 25
M - 26
M - 27
M -9
M - 10
M - 11
M - 12 M - 28 M - 29 M - 30 M - 31 M - 32
M - 29
M - 30
M - 31
M - 32
M - 13
M - 14
M - 15
M - 16 M - 33 M - 34 M - 35
M - 34
M - 35
M - 17
M - 18
M - 19
M - 20
(SENSOR STATION 2) C-7627(P)/AYA- CONTROL-8 -INDICATOR (SS 2 UNIVERSAL KEYSET) (SEE SECTION 3)
INTENSITY ADJ PWR SUP M -1 M -2 M -3 M -4 M - 21 M -5 M -6 M -7 M -8 M - 23 M -9 M - 10 M - 11 M - 12 M - 28 M - 13 M - 14 M - 15 M - 16 M - 33 M - 17 M - 18 M - 19 M - 20 M - 34 M - 35 M - 29 M - 30 M - 31 M - 32 M - 24 M - 25 M - 26 M - 27 FAULT M - 22
(RACK F 2) 12 11J2 SS 2 SWITCH INPUTS 11J1 SS 2 LAMP OUTPUTS

O R D N A N C E P A N E L BIN
C-7628/AYA- CONTROL-8 -INDICATOR (ORDNANCE PANEL) (SEE SECTION 3)

POWER SUPPLY FAULT
6J1 ORDNANCE PANEL, SWITCH INPUTS, AND LAMP OUTPUTS ( TACCO STATION ) A324 TACCO POWER CONTROL (SEE NAVAIR 01 -75PAC- -2) -12POWER CONTROL
SLT
LAMP INTENSITY PRO- 1 PRO- 2 LOAD PRO- 3 PRO- 4 UNLOAD COMPUTER * M -1 * M -2 * M -3 START RUN STOP BOOT STRAP MANUAL OV TEMP POWER ON
AUTO RECY OV TEMP
OFF OV TEMP
(TACCO STATION) IP-917/ASA-70 MULTIPURPOSE DATA DISPLAY (MDD) (SEE SECTION 3) 1J14 TACCO SWITCH INPUTS 1J13 TACCO KEYBOARD AND SWITCH INPUTS 1J11 TACCO LAMP OUTPUTS 1J12 TACCO BIT CODES AND LAMP OUTPUTS
(RACK D 1) A291 5 A383 6 A511 7 A521 11 POWER DISTRIBUTION BOX (SEE NAVAIR 01-75PAC- -2) -122J8 POWER CONTROL 1J1
OFF KEYSETS
OFF MAG TAPE DATA CONV
OFF RDR SCAN
OFF
OFF
OFF
OFF
N 1J1 OVERTEMP
TACO MPD
SS3 MPD
ARO
PILOT DIS
OFF
OFF
OFF
OFF
2J4 ORD ALERT 115 VAC 3
SHEET 2 P
(5-1 blank)/5-2
Change 2
Figure 5-1. LU 1 Signal Flow Diagram (Sheet 1 of 4)
NAVAIR 01-75PAC-12
A B
GROUP 0 OUTPUT DATA CH00 OUTPUT CONTROL CH01, 02, AND 03 OUTPUT CONTROL (RACK D2) CH01 INPUT DATA AND INPUT CONTROL 1J1
LU1
CH00 ODR GR0 OUTPUT DATA, CH0 OA MAINTENANCE CONTROL PANEL / MAINTENANCE CONTROL PANEL LOGIC / POWER MONITOR AND SYSTEM INITIALIZATION (MCP/MCPL/PM & SI) (1A1, 1A9) CH01 IA, EIE CH00 OUTPUT DATA, OA, IA CH00 IDR AND DIAGNOSTICS INPUT DATA TEST INDICATOR AUXILIARY READOUT LOGIC (AROL) (1A23)
1J7 DISPLAY DATA 1J8 DISPLAY DATA 1J34 ACPA PWR ON-OFF, MODE STATUS PIC 0 AND 1 COMMANDS/STATUS PIC 2 AND 3 COMMANDS/STATUS 1J35 PIC 4 AND 5 COMMANDS/STATUS CH01 OUTPUT DATA (0B 00-11) CH01 OUTPUT DATA (OB 00-11) SONOBUOY RECEIVER LOGIC (SRL) (1A19, 1A20, 1A21) PIC 6 AND 7 COMMANDS/STATUS 1J36 STATUS 1J37 PIC 12 AND 13 COMMANDS/STATUS PIC 14 AND 15 COMMANDS/STATUS 1J38 PIC 16-19 COMMANDS/STATUS LOD 1J21 SS 3 LAMP OUTPUTS DOM CH6 OA DIM CH6 ENTER, IMPUT DATA CRT LOGIC (1A5) 1J22 SS 3 SWITCH INPUTS 1J33 SAD MARK MARK-ON-TOP DIM CH0 ENTER INPUT DATA DOM CH0 OA DOM CH7 OA DIM CH7 ENTER, IMPUT DATA STATUS LOGIC (1A8, 1A22) 1J32 SRS POWER ON STATUS ESM STATUS IRDS MODE STATUS F G H NAVAGATION STATUS INS 1 AND 2 NAV MODE DIGITAL VALID HACLCS COMPUTER MODE/READY ORD ALERT C D E PIC 8 AND 9 COMMANDS/STATUS PIC 10 AND 11 COMMANDS/STATUS B A
1J2
1J3
SHEET 4
D E F
CH00 INPUT DATA AND INPUT CONTROL GROUP 0 OUTPUT DATA CH02 OUTPUT CONTROL
1J4
CH00 1B 06-009 CH00 E1, EIE, IA
CH01 OUTPUT DATA AND CONTROL
DIM/DOM CH5, 10 IB 00-11 IA
1J5
1J6 G GROUP 0 OUTPUT DATA CH 3 OUTPUT CONTROL 1J26 SS 1 SWITCH INPUTS H SS 1 LAMP OUTPUTS 1J28 SS 2 SWITCH INPUTS J SS 2 LAMP OUTPUTS 1J17 TACCO SWITCH INPUTS TACCO KEYBOARD AND SWITCH INPUTS K TACCO LAMP OUTPUTS TACCO BIT CODES AND LAMP OUTPUTS PILOT KEYSET SWITCH INPUTS L PILOT KEYSET LAMP OUTPUTS 1J30 NAV/COM LAMP OUTPUTS M NAV/COM SWITCH INPUTS 1J25 N ORDNANCE PANEL, SWITCH INPUTS, AND LAMP OUTPUTS 1J31 NAV/COM UNIVERSAL KEYSET LOGIC (1A15) 1J24 1J20 1J18 TACCO TRAY LOGIC (1A10, 1A11, 1A12) 1J29 SS 2 UNIVERSAL KEYSET LOGIC (1A13) 1J27 SS 1 UNIVERSAL KEYSET LOGIC (1A13)
CH01 IDR, EI, AND INPUT DATA CH 01 ODR DIGITAL INPUT MULTIPLEXER (DIM) (1A16, 1A17, 1A18) DIGITAL OUTPUT MULTIPLEXER (DOM) (1A3) DOM CH5, 10 ARE RESERVED FOR TEST LOOP OPERATION WHICH RETURN BITS 00-11 TO THE MCP THROUGH THE DIM
SHEET 4
DOM CH8 OA DIM CH8 ENTER, IMPUT DATA
DIM CH1 ENTER INPUT DATA DOM CH1 OA
SHEET 4
1J19
G E
SHEET 3
SHEET 4
SHEET 1
1J23 PILOT KEYSET LOGIC (1A4) DIM CH4 ENTER INPUT DATA DOM CH4 OA DOM CH13 OA DOM CH13 OUTPUT DATA DOM CH15 OA DOM OUTPUT DATA DOM CH14 OA DOM CH12 OA 1J14
ACPA DATA 1J10 ACPA COMMANDS 1J16 ESM DATA DOM CH 9 OA DIM CH 9 ENTER, INPUT DATA 1J13 SEA WATER TEMP 1J12 ESM COMMANDS 1J11 GIMBAL CONTROL 1J9 RIU COMMANDS ORD ALERT L K J
SHEET 4
SHEET 4
(FS 440) TB452 P OVERTEMP
CH01 OUTPUT DATA (OB 00-11) 1J39 OVERTEMP 1FL1J1 POWER SUPPLIES 1PS1, 1PS2, 1PS3
ORDNANCE PANEL LOGIC (1A6)
SHEET 4
115 VAC 3
FL1
115 VAC 3
Figure 5-1. LU 1 Signal Flow Diagram (Sheet 2 of 4) Change 2 5-3
NAVAIR 01-75PAC-12
(TACCO STATION) IP-919/ASA-70 AUXILIARY READOUT DISPLAY (ARO) (SEE NAVAIR 01-75PAC- -2) -12(NAVCOMM STATION) IP-919/ASA-70 AUXILIARY READOUT DISPLAY (ARO) (SEE NAVAIR 01-75PAC- -2) -12-
3J2 A DISPLAY DATA
7J2 (SAME AS TACCO ARO)
DISPLAY DATA
(RACK D1) INS 1 NAV MODE/DIGITAL VALID INS 2 NAV MODE/DIGITAL VALID J3 673986 DIGITAL 8 DATA UNIT (DDU)
(SENSOR STATION 3) MX-8109/ASA-71 MAD UNIT NUMBER 2 SELECTOR CONTROL SUBASSEMBLY (SEE NAVAIR 01-75PAC- -5) -12(PILOT CONTROL WHEEL TERM.) TB260 SHEET 2
INS 1 AND 2 NAV MODE/DIGITAL VALID
J4
(RACK C3) TB433 2J1
10 (FS 525) TB435 (FS 288) J/P292 (FS 197) TB6
(COPILOT CONTROL WHEEL TERM.) TB267
10 27P MARK-ON-TOP 27P MARK-ON-TOP (PILOT CONTROL WHEEL) 672243 MARK-ON-TOP SWITCH (COPILOT CONTROL WHEEL) 672243 MARK-ON-TOP SWITCH J2 (RACK B2) TB453 (RACK B1) J1 AM-4923/A ELECTRONIC CONTROL AMPLIFIER (ECA 1) (SEE NAVAIR 01-75PAC- -1) -12-
(RACK B1) C D E SAD MARK DISPLAY DATA NAVIGATION STATUS 1J17 NAVIGATION INTERCONNECTION BOX (NAV INTERCONNECTION BOX) (SEE NAVAIR 01-75PAC- -1) -121J10 HDG FAULT 1J16 F G H SRS POWER ON STATUS ESM STATUS IRDS MODE STATUS 1J19 INS 2 SYSTEM STATUS 1J18 INS 1 SYSTEM STATUS BRG FAULT SIMULATED HDG COMMAND
(PILOT CONTROL WHEEL TERM.) TB458
(COPILOT CONTROL WHEEL TERM.) TB457
9 J1
(RACK B2) AM-4923/A ELECTRONIC CONTROL AMPLIFIER (ECA 2) (SEE NAVAIR 01-75PAC- -1) -12-
J2
DUAL INERTIAL NAVIGATION SYSTEM (INS) (SEE NAVAIR 01-75PAC- -3) -12(EQUIPMENT SHELF BETWEEN RACK F1 AND F2) (SEE DETAIL A) R-1997/ARS-3 RECEIVER-CONVERTER (SEE NAVAIR 01-75PAC- -8 -124J2 J2 J2 (EQUIPMENT SHELF BETWEEN RACK F1 AND F2) 15 R-2271/ARS-5 RECEIVER-CONVERTER (SRS RECEIVER-CONVERTER) (SEE NAVAIR 01-75PAC- -8 -12-
(RACK C1) A270 NAVIGATION SIMULATOR (NAV SIMULATOR) (SEE NAVAIR 01-75PAC- -1) -12NAVIGATION
HDG TAS
SIMULATOR
ESM DATA (FS 525) TB435
ROLL
PITCH
(RACK G1) ESM SYSTEM (SEE NAVAIR 01-75PAC- -5) -12o o o o
ESM COMMANDS
GIMBAL CONTROL 2J109
DETAIL A (RACK C3) 962982 IRDS INTERCONNECTION BOX (SEE NAVAIR 01-75PAC- -5) -12-
2J108
Figure 5-1. LU 1 Signal Flow Diagram (Sheet 3 of 4) 5-4 Change 2
NAVAIR 01-75PAC-12
(SENSOR STATION 1) C-7617/ARR72(V) DUAL CHANNEL 12 CONTROL INDICATOR (DCCI) (SEE NAVAIR 01-75PAC- -4) -12-
NOTE
(RACK C1) RO-308/SSQ-36 BATHYTHERMOGRAPH DATA RECORDER (BT RECORDER) 12 (SEE NAVAIR 01-75PAC- -4) -12J3 SHEET 2 1 2 3 4 5 AIRCRAFT BUNO 160290 AND SUBSEQUENT AIRCRAFT BUNO 156514, 157310 THROUGH 161121, 161123 THROUGH 161131 AIRCRAFT BUNO 156507 THROUGH 156513, 156515 THROUGH 156530 AIRCRAFT BUNO 161122, 161132 AND SUBSEQUENT AIRCRAFT BUNO 156507 THROUGH 159329 NOT INCORPORATING AFC 450 AIRCRAFT BUNO 158928, 159503 THROUGH 159886, 159888, 159889 THROUGH 161131 AIRCRAFT BUNO 159887 INCORPORATING AFC 450 AND 161132 AND SUBSEQUENT AIRCRAFT BUNO 161132 AND SUBSEQUENT AND AIRCRAFT INCORPORATING AFC 408 AIRCRAFT BUNO 156514, 157310 AND SUBSEQUENT AIRCRAFT BUNO 156507 THROUGH 156513, 156515 THROUGH 156530 AIRCRAFT BUNO 156508 THROUGH 158927, 158929 THROUGH 159329 INCORPORATING AFC 450 AIRCRAFT NOT INCORPORATING AFC 450 AIRCRAFT BUNO 160290 AND SUBSEQUENT AND AIRCRAFT INCORPORATING AFC 405 AIRCRAFT INCORPORATING AFC 450 AIRCRAFT BUNO 161763 THROUGH 163295 REMOVED ON AIRCRAFT INCORPORATING AFC 619.
4J2 PIC 0 AND 1 COMMANDS/STATUS
S O N O C O N T
SEAWATER TEMP
COMP OVRD
6 7
(SENSOR STATION 1) 4J2 PIC 2 AND 3 COMMANDS/STATUS C-7617/ARR72(V) DUAL CHANNEL 12 CONTROL INDICATOR (DCCI) (SEE NAVAIR 01-75PAC- -4) -12(SENSOR STATION 1) 4J2 PIC 4 AND 5 COMMANDS/STATUS C-7617/ARR72(V) DUAL CHANNEL 12 CONTROL INDICATOR (DCCI) (SEE NAVAIR 01-75PAC- -4) -12(SENSOR STATION 1) 4J2 PIC 6 AND 7 COMMANDS/STATUS SHEET 2 C-7617/ARR72(V) DUAL CHANNEL 12 CONTROL INDICATOR (DCCI) (SEE NAVAIR 01-75PAC- -4) -12(SENSOR STATION 2) 4J2 PIC 8 AND 9 COMMANDS/STATUS C-7617/ARR72(V) DUAL CHANNEL 12 CONTROL INDICATOR (DCCI) (SEE NAVAIR 01-75PAC- -4) -12(SENSOR STATION 2) 4J2 PIC 10 AND 11 COMMANDS/STATUS C-7617/ARR72(V) DUAL CHANNEL 12 CONTROL INDICATOR (DCCI) (SEE NAVAIR 01-75PAC- -4) -12(SENSOR STATION 2) 4J2 PIC 12 AND 13 COMMANDS/STATUS C-7617/ARR72(V) DUAL CHANNEL 12 CONTROL INDICATOR (DCCI) (SEE NAVAIR 01-75PAC- -4) -12(SENSOR STATION 2) 4J2 PIC 14 AND 15 COMMANDS/STATUS C-7617/ARR72(V) DUAL CHANNEL 12 CONTROL INDICATOR (DCCI) (SEE NAVAIR 01-75PAC- -4) -12(RACK G 1) SA-1605/ARR-72(V) AUDIO SWITCHING ASSEMBLY (AUDIO SWITCHING UNIT) 12 (SEE NAVAIR 01-75PAC- -2) -123J6 PIC 16 - 19 COMMANDS/STATUS/LOD SHEET 2 SS 3 LAMP OUTPUTS 5J11 (SENSOR STATION 3) IP918/ASA-70 SENSOR DATA DISPLAY (SDD) (SEE NAVAIR 01-75PAC- -2) -121J2 SHEET 2 SHEET 2 SHEET 2 ACPA PWR ON-OFF, MODE STATUS ACPA DATA
8 9 10 11 12 13 (SENSOR STATION 2) J8 14 15 16
(SENSOR STATION 2) J14 CP-1281/ALQ-158(V) COUNTERMEASURES COMPUTER (ACPA COMPUTER) 14 (SEE NAVAIR 01-75PAC- -8) -12-
H
ACPA COMMANDS
J15
HACLCS COMPUTER MODE/READY
C-9801/AWG-19(V) CONTROL 13 DISTRIBUTION BOX (CDB) (SEE NAVAIR 01-75PAC- -6) -12(RACK C3) MX-7974/ASA-69 RADAR INTERFACE UNIT (RIU) (SEE NAVAIR 01-75PAC- -5) -12-
RIU COMMANDS
B
SS 3 SWITCH INPUTS
5J12
00500104
Figure 5-1. LU 1 Signal Flow Diagram (Sheet 4 of 4) 5-5
NAVAIR 01-75PAC-12
(RACK D2) LU 1 J1/P5 (RACK D1) DPS ELECTRONIC CIRCUIT BREAKER PANEL LOGIC UNIT NO. 1 A B C PWR DISTR BOX DC (TACCO STATION) TACCO POWER CONTROL LOGIC UNITS 1 28 VDC N 2K9 115 VAC A 115 VAC B 115 VAC C (RACK D1) POWER DISTRIBUTION BOX MAIN POWER 2J4 C P N (FS 440) TB452 1FL1J1 C23 C24 C25 A B C D AC FILTER (FL1) 115 VAC A 115 VAC B 115 VAC C NEUTRAL CB1 B1 FAN 5 6 7 8 9 10 14 15 1J1 B OFF ZT ZS CONTROL (FS 440) TB452 D2 D3 OVERTEMP OVERTEMP RET 2J8 B CHAS 1J39 A B P6/J8 H L A CHAS DC M J3 1PS2 +12 VDC J2 R6 +6 VDC R7 -12 VDC J4 R9 - VDC -6 J5 R10 GND J1 FAST +5 VDC J5 R10 R E D B FAST +5 VDC F5IV 20 VAC 20 VAC RET J GND A5 13 - VDC -6 A7 9 8 F P -12 VDC -12 VDC 16 17 L +6 VDC A6 J8/P6 N +12 VDC P10/J10 A4 J7 J6 16 14.5 VAC A 14.5 VAC B 14.5 VAC C 26.8 VAC A 26.8 VAC B 26.8 VAC C 26.8 VAC A 26.8 VAC B 26.8 VAC C OFF
DS1
D ELAPSED TIME CHAS TRANSFORMER T1 11 12 13 DC 11 VAC A 11 VAC C 11 VAC B A B C P
1PS3 +12 VDC POWER SUPPLY
M H N R +12 VDC UNREG RET +12 VDC UNREG
2J9 H J ZE
M1
1PS1 POWER SUPPLY P10/J40 12 11 A1 A2 A3 7 8 9 1 2 3 J4 J5 J2 +12 VDC UNREG R1 +5 VDC REG R2 +6 VDC REG R4 +15 VDC REG R3 -15 VDC REG R5 -10 VDC REG R6 12 2 3 1 A1 A2 A3 11 15 DC -10 VDC +5 VM -10 VM AOVM 13 -15 VDC DC 17 +15 VDC DC R1 P11/J41 A5 A6 A7 16 +6 VDC R2 +5 VDC
DC
Figure 5-2. LU 1 Overall Power Distribution Signal Flow Diagram (Sheet 1 of 2) 5-6
NAVAIR 01-75PAC-12
(RACK D2) LU 1 (CONT) S1 ART 45 Z3 -10 VDC (ART 45) Z2 +6 VDC Z1 +5 VDC S2 DOM Z5 +6 VDC Z4 +5 VDC S3 DIM Z8 -10 VDC Z7 +6 VDC Z6 +5 VDC +5 VDC (DIM) +5 VDC (DIM) +6 VDC (DIM) 27 136 -10 VDC (DIM) +5 VDC (DOM) +5 VDC (DOM) DIM SUBUNIT XA17 1A17 20 TIMING LOGIC MULTIPLEXER DIGITAL INPUT UK 3 NAVCOMM Z12 +5 VDC 1A18 XA18 134 DIGITAL INPUT. EXTERNAL CHANNEL MULTIPLEXER ASSY 136 +5 VDC Z14 +5 VDC 1A16 XA16 136 DIGITAL INPUT. EXTERNAL CHANNEL MULTIPLEXER ASSY 4 Z15 +5 VDC +5 VDC (TACCO) +5 VDC (TACCO) S8 TACCO Z13 +5 VDC (UK 3 NAVCOMM) +5 VDC (UK 3 NAVCOMM) +5 VDC (UK 3 NAVCOMM) +5 VDC (UK 3 NAVCOMM) +5 VDC (UK 3 NAVCOMM) +5 VDC (UK 3 NAVCOMM) 85 XA21 133 INPUT-OUTPUT RECEIVER PROCESSOR LOGIC ASSY 134 +6 VDC (DOM) +5 VDC (ART 45) +5 VDC (ART 45) +6 VDC (ART 45) XA7 1A7 5 1 2 96 95 ART 45 (NOT USED) -10 VDC Z10 +6 VDC Z9 +5 VDC 1A3 XA3 84 DIGITAL OUTPUT MULTIPLEXER ASSY +5 VDC (SRL) +5 VDC (SRL) +6 VDC (SRL) S4 SRL Z11 -10 VDC (SRL) S9 STATUS Z18 -10 VDC SONO-RECEIVER. CONTROL LOGIC ASSY Z17 +6 VDC Z16 1A19 XA19 -OUTPUT 133 INPUTRECEIVER PROCESSOR LOGIC ASSY 134 Z20 1A21 +5 VDC Z21 +12 VDC UNREG +12 VDC UNREG (ORD) S11 CRT Z22 XA15 1A15 134 UNIVERSAL KEYSET LOGIC ASSY XA14 1A14 134 UNIVERSAL KEYSET LOGIC ASSY XA13 1A13 134 UNIVERSAL KEYSET LOGIC ASSY TACCO TRAY LOGIC UNIT ASSY XA10 1A10 134 MONOFUNCTION TACCO TRAY LOGIC ASSY 1A11 XA11 133 MATRIX TACCO TRAY LOGIC ASSY +6 VDC Z24 +5 VDC +5 VDC (ARO) +5 VDC (ARO) +5 VDC S12 PILOT Z23 +5 VDC S13 ARO Z25 +6 VDC (ARO) XA23 133 134 131 132 1A23 AUXILIARY READOUT DISPLAY INTERFACE LOGIC ASSY +5 VDC (PILOT) XA4 4 1A4 PILOT CRT/ORD LOGIC ASSY +5 VDC (CRT) +5 VDC (CRT) XA5 1A5 4 PILOT CRT/ORD LOGIC ASSY +5 VDC (STATUS) +5 VDC (SRL) +5 VDC (ORD) +5 VDC (DOM) +5 VDC (ARO) +5 VDC (DIM) +5 VDC (TACCO) +5 VDC (UK 3 NAVCOMM) +5 VDC (UK 2 SS2) +5 VDC (UK 1 SS1) +5 VDC (CRT) +5 VDC (PILOT) +5 VDC (ART 45) +6 VDC +5 VDC +5 VM AOVM -10 VM F5IV FAST 5 VDC +12 VDC UNREG +5 VDC (ORD) +5 VDC (ORD) +5 VDC Z19 +12 VDC UNREG S10 ORD XA6 4 1A6 PILOT CRT/ORD LOGIC ASSY +5 VDC -10 VDC +5 VDC (STATUS) +5 VDC (STATUS) +12 VDC UNREG (STATUS) +12 VDC UNREG +6 VDC (STATUS) XA8 1A8 8 TIMING AND 90 CONTROL LOGIC ASSY 78 -10 VDC (STATUS)
SRL SUBUNIT XA20 1A20 129 130 38 133 133
STATUS SUBUNIT XA22 1A22 17 MULTIPLEXER STATUS LOGIC 18 ASSY 133 +12 VDC UNREG +12 VDC UNREG RET +5 VDC +6 VDC -10 VDC 20 VAC 20 VAC RET F5IV AOVM -10 VM +5 VM
P1/J119
-10 VDC
1A1 MAINT CONTROL 36 PANEL ASSY 37 46 47 84 83 82 54 63 12 13 14 15 85
P4/J122 85 DC 84 82
XA9 1A9 PM AND SI 14 13 3 1 82 2 49 47 48 50 16 15 4 72 96 83 84 86 39 10 1J33 65 66 78 79 80 81 47 61 37 52
134
1A12 XA12 133 MATRIX TACCO TRAY LOGIC ASSY +12 VDC UNREG +12 VDC UNREG
NOT USED
134
Figure 5-2. LU 1 Overall Power Distribution Signal Flow Diagram (Sheet 2 of 2) 5-7
NAVAIR 01-75PAC-12
(RACK B1) NAV INTERCONNECTION BOX 1J17 ZE W Y ZC G J S U ZI (RACK B1) FORWARD INTERCONNECTION BOX 7 1J15 A C E G (RACK D1) DDU 1 J3 Y K J4 S P (SENSOR STATION 3) SELECTOR CONTROL SUBASSEMBLY (SENSOR STATION 2) CDB 9 INS 1 DIGITAL VALID INS 1 NAV MODE INS 2 DIGITAL VALID INS 2 NAV MODE (RACK C3) TB433 SAD MARK C11 (PILOT CONTROL WHEEL) TB260 HACLCS COMPUTER MODE/READY 2 27P 9 (COPILOT CONTROL WHEEL) MARK-ON-TOP SWITCH MARK-ON-TOP C9 (COPILOT CONTROL WHEEL) TB267 C9 (PILOT CONTROL WHEEL) TB458 MARK-ON-TOP 3 D12 C12 3 (COPILOT CONTROL WHEEL) TB458 D12 C12 2 (FS 197) TB6 A9 (FS 288) J/P292 D (FS 525) TB435 C2 1 INS 1 DOPPLER DAMP INS 1 INERTIAL MODE INS 2 DOPPLER DAMP INS 2 INERTIAL MODE INS 1 NO-GO HDG NO-GO ATTD NO-GO INS 2 NO-GO SIMULATED HDG SELECTED HSI AND FDS TAC NAV MODE NAVCOM INS SELECT FLT STATION INS SELECT COMPUTER TRACK (FS 440) TB452 A4 A6 A11 A13 12 4 15 14 13 18 17 16 29 2 30 31 49
(RACK D2) LU 1 STATUS LOGIC (1A8, 1A22) 1J32 13 14
(FS 525) TB435 C11 C13 COMPUTER TRACK MANUAL TRACK
(RACK C3) J109 W ZG IRDS INTERCONNECTION BOX
J2 9 SRS POWER ON STATUS 82
SONOBUOY REFERENCE SET RECEIVER-CONVERTER
1J3 10 12 1 11 (FS 525) TB435 27 1J34 1J35 31, 63 1J36 1J37 31, 63 35 19 1J38 31, 63 PIC 16-19 STATUS (NOT USED) 4 3J6 C26 ESM STATUS ALTITUDE RELIABLE SELF TEST UNDERWAY INITIATE SELF TEST DOPPLER INVALID STATUS 5 6
DOPPLER NAVIGATION SYSTEM 11 DOPPLER 11 A INTERCONNECTION BOX J L C
ESM SYSTEM
PIC 0- STATUS -7
4J2 31
(SENSOR STATION 1) DCCI (4 PLACES) 8
PIC 8-15 STATUS
4J2 31
(SENSOR STATION 2) DCCI (4 PLACES) 8
2J1 D
(RACK G1) AUDIO SWITCHING UNIT 8
31
J8 111
(SENSOR STATION 2) 1J34 31 32 POWER ON/OFF AUTO/MANUAL MODE 3J14 35 3 (RACK D2) CENTRAL COMPUTER ACPA COMPUTER 10
(PILOT CONTROL WHEEL) MARK-ON-TOP SWITCH
1J3 CH 01 INPUT DATA AND INPUT CONTROL DIM CH 7, 11 ENTER, INPUT DATA DIM (1A16/ 1A17/ 1A18) DOM CH 7 OA DOM (1A3)
27P 9
68
A1J72
NOTE
1 2 3 4 5 6 7 AIRCRAFT BUNO 161001, 161005 AND SUBSEQUENT AND AIRCRAFT INCORPORATING AFC 408 AIRCRAFT BUNO 156507 THROUGH 156513, 156515 THROUGH 156530 AIRCRAFT BUNO 156514, 157310 AND SUBSEQUENT AIRCRAFT BUNO 160290 AND SUBSEQUENT APN-187 DOPPLER NAVIGATION SET ONLY APN-227 RADAR NAVIGATION SET ONLY AIRCRAFT BUNO 156507 THROUGH 161000, 161002 THROUGH 161004, AND AIRCRAFT NOT INCORPORATING AFC 408 AIRCRAFT NOT INCORPORATING AFC 450 AIRCRAFT BUNO 160290 AND SUBSEQUENT AND AIRCRAFT INCORPORATING AFC 405 AIRCRAFT INCORPORATING AFC 450 REMOVED ON AIRCRAFT INCORPORATING AFC 619
MCP/MCPL/PM AND SI 1A1,1A9)
8 9 10 11
Figure 5-3. LU 1 Status Functional Signal Flow Diagram 5-8
NAVAIR 01-75PAC-12
START LOGIC UNIT INPUT POWER WIRING PROBLEM INSTALL NEW PS1
SEE CAUTIONS AND NOTES ON SHEET 3 BEFORE CONTINUING WITH TEST IS PCP MAIN POWER CIRCUIT BREAKER (CB1) ON YES MEASURE LOGIC UNIT INPUT POWER TO GROUND ON PINS CB1-A1, CB1-B1 AND CB1-C1 (SEE ILLUSTRATION A)
NO NO NO SET PCP MAIN POWER CIRCUIT BREAKER TO ON

DOES PCP MAIN POWER CIRCUIT BREAKER TRIP
IS PS1 FAULT LAMP ON YES MEASURE VOLTAGE BETWEEN PS1J2 AND PS1J1
NO
IS FAN (B1) RUNNING YES MEASURE VOLTAGE BETWEEN PS1J3 AND PS1J1
NO
IS VOLTAGE +115V
DOES PCP MAIN POWER CIRCUIT BREAKER TRIP NO REMOVE PS1A4, PS1A7 AND PS1A8 FROM OLD PS1
YES
OVERLOAD OR LOGIC UNIT WIRING PROBLEM
YES
YES REMOVE PS1 NO MEASURE LOGIC UNIT INPUT POWER TO GROUND ON PINS CB1-A2, CB1-B2 AND CB1-C2 (SEE ILLUSTRATION A) INSTALL NEW PS3
IS VOLTAGE +5V YES MEASURE VOLTAGE BETWEEN PS1J4 AND PS1J1
1
ROUTINE C
REMOVE NEW PS1 AND REPLACE OLD PS1 LESS REMOVED ASSEMBLIES
REMOVE PS3J1
SHEET 3
DOES PS2 HAVE CIRCUIT BREAKER NO YES SET PS2 CIRCUIT BREAKER TO OFF NO
IS VOLTAGE +12V YES REMOVE PS2F1
NO
REINSTALL NEW PS1 CHASSIS WITH OLD PS1 ASSEMBLIES
ARE ALL MCP LAMPS ON YES REPLACE PS2F1 OR SET PS2 CIRCUIT BREAKER TO ON
NO
IS PROBLEM RELATED TO ANY ONE SUBUNIT
NO
IS VOLTAGE +115V
YES
DOES PCP MAIN POWER CIRCUIT BREAKER TRIP NO REPLACE PS1A4
YES
YES DOES PCP MAIN POWER CIRCUIT BREAKER TRIP
2
ROUTINE A
NO
YES PCP SUBUNIT SWITCH PROBLEM
NO REPLACE PCP MAIN POWER CIRCUIT BREAKER (CB1)
SHEET 2
DOES PCP MAIN POWER CIRCUIT BREAKER TRIP NO
YES
NO
INSTALL NEW PS1A7
SET PCP MAIN POWER CIRCUIT BREAKER TO ON
ARE ALL MCP LAMPS ON YES INSTALL NEW PS2 NO SET PCP MAIN POWER CIRCUIT BREAKER TO OFF
NO REPLACE FAN (B1) END
INSTALL NEW PS1A4
DOES PCP MAIN POWER CIRCUIT BREAKER TRIP YES
REPLACE PS1A7
REPLACE PS3J1
IS VOLTAGE -15V YES MEASURE VOLTAGE BETWEEN PS1J7 AND PS1J1
NO
4
ROUTINE B
REPLACE PCP MAIN POWER CIRCUIT BREAKER (CB1) SET PCP MAIN POWER CIRCUIT BREAKER TO ON
DOES PCP MAIN POWER CIRCUIT BREAKER TRIP NO
YES
SHEET 2
SET PCP MAIN POWER CIRCUIT BREAKER TO ON
INSTALL NEW PS1A7
A1
B1
C1
IS VOLTAGE -10V YES INSTALL NEW PS1A5
NO
INSTALL NEW PS1A8
NO
REPLACE PS2F1 OR SET PS2 CIRCUIT BREAKER TO ON
NO
REPLACE PS1A8
CB1 YES INSTALL NEW PS3 REPLACE PS2F1 OR SET PS2 CIRCUIT BREAKER TO ON DOES PCP MAIN POWER CIRCUIT BREAKER TRIP YES
YES LOGIC UNIT PRIMARY POWER WIRING AND/OR T1 PROBLEM REPLACE PS1
NO
END
NO INSTALL NEW PS1A8
A2
B2
REPLACE PS3J1
ILLUSTRATION
C2
YES INSTALL NEW PS2
BACK OF POWER CONTROL PANEL
Figure 5-4. Logic Unit Power Supply Troubleshooting Procedures (Sheet 1 of 3) 5-9
NAVAIR 01-75PAC-12
MEASURE VOLTAGE BETWEEN PS1J6 AND PS1J1
IS VOLTAGE -15V YES MEASURE PS2 VOLTAGES
NO
DOES PS2 HAVE CIRCUIT BREAKER YES
NO
CHECK PS2F1 FOR CONTINUITY
MEASURE PS2 VOLTAGES
ARE VOLTAGES GOOD YES CHECK PS1A8 FUSE(S) FOR CONTINUITY (SEE ILLUSTRATION B)
NO
PERFORM SUBROUTINE A1
SHEET 3
ROUTINE C
4
IS PS2 CIRCUIT BREAKER OFF YES NO YES IS PS2F1 GOOD NO REPLACE PS2F1
ARE VOLTAGES GOOD YES CHECK PS1A7 FUSE (S) FOR CONTINUITY (SEE ILLUSTRATION B)
NO
SET PS2 CIRCUIT BREAKER TO ON
DID PS2F1 BLOW YES
NO
IS PS1A8 FUSE(S) GOOD
NO
REPLACE PS1A8 FUSE(S)
YES NO
IS VOLTAGE -15V YES
DOES PS2 CIRCUIT BREAKER TRIP
NO INSTALL NEW PS1A8
YES IS PS1A7 FUSE(S) GOOD YES MEASURE VOLTAGE BETWEEN PS1J6 AND PS1J1 INSTALL NEW PS2 IS VOLTAGE -15V NO INSTALL NEW PS1A5 YES
END
NO REPLACE PS1A7 FUSE(S)
SUBROUTINE A1
B
3
ROUTINE C
IS VOLTAGE +15V YES END YES IS VOLTAGE +15V NO INSTALL NEW PS1A5
NO
REINSTALL INSTALL OLD PS1A7 NEW PS1A7
SHEET 3
IS VOLTAGE -15V YES MEASURE VOLTAGE BETWEEN PS1J4 AND PS1J1 REINSTALL OLD PS1A8
NO
PS1 CHASSIS WIRING PROBLEM
PDIS7/A8 MEASURE VOLTAGE BETWEEN PS1J6 AND PS1J1 FUSE
IS VOLTAGE +15V NO
YES
REINSTALL OLD PS1A7
IS VOLTAGE -15V
NO
INSTALL NEW PS1A8
IS VOLTAGE -15V NO
YES
YES
ROUTINE A
PS1 CHASSIS WIRING PROBLEM
END
ROUTINE B
INSTALL NEW PS1A8
END
ILLUSTRATION
NAVAIR 01-75PAC-12
CAUTION
NO
DO PS1A1, PS1A2 AND PS1A3 CONTAIN EXTERNAL FUSES
ARE VOLTAGES GOOD YES
NO
PERFORM SUBROUTINE A1 (SHEET 2)
REMOVE PS1A1, PS1A2 AND PS1A3 CHECK PINS J1- AND J1-H -L FOR CONTINUITY (SEE ILLUSTRATION C)
WAS CONTINUITY CHECK GOOD YES REPLACE PS1A1, PS1A2, AND PS1A3 PS1A1 (SAME AS PS1A2 AND PS1A3)
NO
INSTALL NEW PS1A1, PS1A2, AND PS1A3
IF MAIN POWER SWITCH DOES NOT REMAIN ON WHEN SET TO ON, DO NOT ATTEMPT TO HOLD SWITCH TO ON OR SEVERE DAMAGE MAY RESULT. DO NOT REPLACE BLOWN FUSES UNTIL DIRECTED TO DO SO. A BLOWN FUSE IS LIKELY TO BE CAUSED BY THE FAILURE OF SOME NON- ORGANIZATIONAL REPLACEABLE PART, THEREFORE THE ASSEMBLY SHOULD BE RETURNED TO THE APPROPRIATE REPAIR ACTIVITY. MAIN POWER MUST BE TURNED OFF WHENEVER AN ASSEMBLY OR ORGANIZATIONAL REPLACEABLE PART IS REMOVED OR REPLACED. SEE MAINTENANCE INSTRUCTION MANUAL, NAVAIR 01-75PAC-2-5.3, NAVAIR 01-75PAC-2-5.4, OR NAVAIR 01-75PAC-2-5.5 FOR REMOVAL AND REPLACEMENT PROCEDURES.
YES REPLACE PS1A1F1, PS1A2F1 OR PS1A3F1
MEASURE PS2 VOLTAGES
D MEASURE VOLTAGE BETWEEN PS1J2 AND PS1J1
ARE VOLTAGES GOOD YES REMOVE PS1A1, PS1A2 AND PS1A3
NO
NOTE
NO 1. ALL VOLTAGES TAKEN IN REFERENCE TO PS1J1 GROUND. 2. ALL VOLTAGES HAVE A TOLERANCE OF 10% EXCEPT PS1J1 = +12VDC 20%. 3. SEE NAVAIR 01-75PAC-2-5.7 FOR DETAIL WIRING DIAGRAMS AND PROCEDURES. 4. FOR POWER CONTROL PANEL SUBUNIT PROCEDURES, SEE NAVAIR 01-75PAC-2-5.3, NAVAIR 01-75PAC-2-5.4, AND NAVAIR 01-75PAC-2-5.5.
IS VOLTAGE +5V J1-L
YES ILLUSTRATION
CHECK PINS J1-H AND J1-L FOR CONTINUITY (SEE ILLUSTRATION C)
J1-H
C
ROUTINE A
3
DID PS1A1F1, PS1A2F1 OR PS1A3F1 BLOW
TABLE 1 NO MEASURE VOLTAGE BETWEEN PS1J2 AND PS1J1 TEST POINT J1 J2 J3 J4 J5 J6 J7 PS1 VOLTAGE GROUND +5V DC +12V DC +15V DC +5V DC -15V DC -10V DC PS2 VOLTAGE +5V DC +12V DC +6V DC -12V DC -6V DC GROUND
WAS CONTINUITY CHECK GOOD YES INSTALL NEW PS1A6
NO
INSTALL COMPLETE NEW SET PS1A1, PS1A2, PS1A3 AND PS1A6
IS VOLTAGE +5V
NO INSTALL NEW PS2
YES NO
DID OLD PS1A1, PS1A2, AND PS1A3 CONTAIN EXTERNAL FUSES
YES INSTALL COMPLETE NEW SET PS1A1, PS1A2, PS1A3, AND PS1A6 IS VOLTAGE +5V NO PS1 CHASSIS WIRING PROBLEM
YES MEASURE VOLTAGE BETWEEN PS1J2 AND PS1J1 MEASURE VOLTAGE BETWEEN PS1J2 AND PS1J1 REPLACE FUSES AND REINSTALL OLD ASSEMBLIES INTO PS1 MEASURE VOLTAGE BETWEEN PS1J2 AND PS1J1
DID PS1A1F1, PS1A2F1 OR PS1A3F1 BLOW
YES NO
INSTALL NEW PS1A5
NO
IS VOLTAGE +5V
YES PS1 CHASSIS WIRING PROBLEM
END YES IS PS1A7 FUSE(S) GOOD NO REPLACE PS1A7 FUSE(S) MEASURE VOLTAGE BETWEEN PS1J4 AND PS1J1 IS VOLTAGE +15V NO
YES
END
IS VOLTAGE +5V
NO
INSTALL NEW PS1A4
YES END
IS VOLTAGE +5V NO CHECK PS1A7 FUSE(S) FOR CONTINUITY (SEE ILLUSTRATION B)
YES
INSTALL NEW PS1A7
YES REINSTALL OLD PS1A6 NO PS1 CHASSIS WIRING PROBLEM
IS VOLTAGE +5V YES
REINSTALL NEW PS1A1, PS1A2, AND PS1A3
IS VOLTAGE +15V YES
NO
YES
IS VOLTAGE -15V NO PS1 CHASSIS WIRING PROBLEM
REINSTALL OLD PS1A5
ROUTINE B
5
MEASURE VOLTAGE BETWEEN PS1J6 AND PS1J1 IS PS1A8 FUSE(S) GOOD YES CHECK PS1A8 FUSE(S) FOR CONTINUITY (SEE ILLUSTRATION B) NO REPLACE PS1A8 FUSE(S) MEASURE VOLTAGE BETWEEN PS1J6 AND PS1J1 IS VOLTAGE -15V NO
IS VOLTAGE +5V
NO
REINSTALL NEW PS1A6 YES
INSTALL COMPLETE NEW SET PS1A1, PS1A2, PS1A3, AND PS1A6 NO
NO IS VOLTAGE +5V IS VOLTAGE -15V YES NO
YES
YES END
YES REINSTALL NEW PS1A5 END YES END
YES IS VOLTAGE -15V
IS VOLTAGE +5V
INSTALL NEW PS1A8
NO REINSTALL OLD PS1A6 MEASURE VOLTAGE BETWEEN PS1J2 AND PS1J1 IS VOLTAGE +5V NO REINSTALL NEW PS1A6 PS1 CHASSIS WIRING PROBLEM
ROUTINE C
END
NAVAIR 01-75PAC-12
13
13
13
13
13
13 13
13
14
14 14
12
12 12
18
1A1A2
1A1A1
GRD INHIBIT J6 J7
1PS2 INTERNAL POWER SOURCE TYPICAL STICK TYPE MODULE CONNECTOR PIN ARRAY
INPUT FILTER 2 LU1 1

R1 CR5
- 6 VDC
J5
- 12 VDC
CR6
+12 VDC
T1 TRANSFORMER
+6 VDC
A8 A7 A6 A5
A4 A3 A2 A1
A9 A8 A7
A6 A5 A4 A3
A2 A1
J3
J4
CR3 CR4
INT PWR SOURCE ASSEMBLY
J2 FAST 5 VDC
MFG 99971 PT 764256151 P/O MX- 8023/AYA- 8 P/O MX- 8023/AYA- 8 -
C1
J1
MAINTENANCE CONTROL PANEL (TOP VIEW)
CR2 CR7 CR1
CR8
1A1
CIRCUIT BREAKER POWER CONTROL (ACCESS OANEL AND WIRES REMOVED) DETAIL
MODULE SUBASSEMBLY (TYPICAL) DETAIL
J1 1PS3 INTERNAL POWER SOURCE DETAIL
FL1 - INPUT FILTER DETAIL
A
DOM 1- 16 1- 17 1- 18 -
2A1A2
2A1A1 EXTENDER 1A10 1A11 1A12 1A13 1A14 1A15 1A16 1A17 1A18 1A19 1A20 1A21 1A22 1A23 A1 +5 VDC REGULATOR -15 VDC ADJ A7 +15 VDC AND +6 VDC REGULATOR J2 J1 A4 3-PHASE RECTIFIER FILTER B ADJUST +15 VDC (+0.75). MEASURE BETWEEN TEST JACKS 4 AND 1 (GND) +15 VDC ADJ
VOLTAGE ADJUSTMANT
DOM 1- 3 OFF UK2 UK3 SS2 NAV/COM 1- 14 1- 15 OFF
ART 45 1- 7 -
TACCO 1- 10 UK1 1- 11 SS1 1- 12 1- 13 -
SRL 1- 19 1- 20 1- 21 -
PILOT 1- 4 -
CRT 1- 5 -
ORD 1- 6 OFF
STATUS 1- 8 1- 22 -
ARO 1- 23 ELAPSED TIME OFF
MAIN POWER
OFF
EXTENDER 1A3 1A4 1A5 1PS1 1A6 BLANK PANEL 1A8 1A9
ADJUST -15 VDC (+0.75). MEASURE BETWEEN JACKS 6 AND 1 (GND) A7, A8 REGULATOR
LU 1 (FRONT VIEW)
J119
J120
J121
J122 C A2 +5 VDC REGULATOR J3 J4 J5 J6 J7 A1, A2, A3 +5 VDC REGULATOR FAULT
ADJUST +5 VDC (+0.25). MEASURE BETWEEN TEST JACKS 2 AND 1 (GND)
A8 -15 VDC AND -10 VDC REGULATOR
A3 +5 VDC REGULATOR
+5 VDC ADJ
PS1 POWER SUPPLY (FRONT PANEL) A6 5 VDC REGULATOR CONTROL 1PS1 POWER SUPPLY (RIGHT SIDE VIEW) DETAIL
E
J2 J3 J4
1PS1 POWER SUPPLY (LEFT SIDE VIEW)
CAUTION
TO PRECLUDE ANY POSSIBILITY OF DAMAGING THE LOGIC UNIT, MODULES A1, A2, A3 AND A6 SHOULD BE CONSIDERED DEFECTIVE IF 5 VDC IS NOT PRESENT. ALL FOUR SHOULD BE REPLACED AT THE SAME TIME.
A5 PROTECTION MODULE ASSEMBLY
J5
J6
J7
LU 1 (REAR VIEW)
Figure 5-5. LU 1 Module Location Diagram 5-12
J8
NAVAIR 01-75PAC-12
MODULE TYPE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47
FUNCTION Switch Encoder and Enter Generator Not Used Decoder and Buffers Input Amplifiers and Gating Data and Control Line Drivers, and Gating Timing and Control Exclusive OR Relay Drivers Universal Register Data Multiplexer R.S. Register MCP Control Module MCP Gated Input Amplifiers Data Transfer and MultipIexer SRL Interface Expanded Input Gating Deflection Signal 91 ohm Driver Clock Generator and Drivers Video and Unblank 91 ohm Digital Driver Digital to Analog Converters for Conics, Vectors Butterworth Filter Deflection Signal 91 ohm Driver Special Gating and Interface Digital to Analog Converter for Gross Position High Speed Synchronous Counter PDL - Timing and Control Gating MPD - Auto-Test Gating MPDL - End of Operation Detector and ODR Generator MPDL - Type Mode Timing Gates Digital Integrator and Change of Status Detector Precision Reference, Voltage Regulator and Character Size Control Special Test Timing and Control Logic Not Used Not Used Shift Register MTC - Decoder Function Register MTC - Status Register and Special Gating MTC - Data Path Gating and Storage MTC - Tape Mark Decoder MTC - Control Register Logic MTC - Control Register Logic MTC - Control Register Logic MTC - Control Register Logic MTC - Special Timing and Control Logic MTC - Gap Timer Decoder ADL Character Generator Line Drivers and Receivers
Subunit/Assembly
Assembly No. 1 3 1 1 1 1 1 1 1 4 5 2 6 7 8 1A3 1A4 1A5 1A6 1A7 1A8 1A22 1A10 1A11 1A12 1A13 1A14 1A15 1A16 1A17 1A18 1A19 1A21 1A20 1A23 1A1 1A9 10 14 1 1 9 12 2 2 3 10 6 48 3 8 1 1 1 4 1 6 1 1 6 1 1 1 1 3 8 2 1 1 1 1 1 2 2 1 1 1 2 1 1 1 4 1 1 1 1 1 2 1 2 5 5 7 7 7 2 3 3 3
Total Each Module Type Per Subunit or Assembly (Logic Unit 1) Module Type 9 10 11 12 13 14 15 16 18 19 20 21 22 23 24 25 26 27
Total Modules Per Subunit or 28 29 30 31 32 36 37 38 39 40 41 42 43 44 45 Assembly 5 5 5 5
DOM Subunit Pilot Keyset Logic Subunit CRT Tray Logic Subunit ORD Panel Logic Subunit ART - 45 Logic Subunit 1 Status Logic Subunit Timing and Control Multiplexer TACCO Tray Logic Subunit Monofunction Matrix Matrix SS1 Universal Keyset Logic Subunit SS2 Universal Keyset Logic Subunit NAVCOMM Universal Keyset Logic Subunit DIM Subunit Internal Channel Input Timing Logic External Channel Input SRL Subunit Processor Input/Output Processor Input/Output Control AROL Subunit MCP Subunit PM & SI Subunit TOTAL EACH MODULE TYPE NOTE 1 Blank Panel
6 1 1 8 11 5 8 8 9 9 9 1 2 4 9 6 8 8 4 9 9 9 11 3 1 5 4 20 2 1 2 13 17 8 167
Figure 5-6. LU 1 Module Type and Function 5-13
NAVAIR 01-75PAC-12
11 11
3 11 11
11
11 11
23
11 11 11 11 23
10 15 15 15 15
15
A4
A3
A5
A2 A1
A6 A5 A4 A3 A2
A1
A1 A2 A8 A7
A6 A3 A5 A4
A9 A8 A7 A6
A5 A4 A3 A2 A1
A9
A8 A7 A6 A5 A4 A3
A2
A1
J7 J6 J5 J4 J3 J2 J1 J12 J11 J10 J9 J8 J15
J7 J6 J5 J4 J3 J2 J1 J14 J13 J12 J11 J10 J9 J8
J3 J2 J1
J12 J11 J10 J9 J8 J7 J19 J18
J6 J5 J4 J3 J2 J1 J17 J16 J15 J14 J13
J12 J11 J10 J9 J8 J7
J6 J5 J4 J3 J2 J1 J14 J13
DIGITAL OUTPUT MULTIPLEXER (1A3)
STATUS LOGIC SUBUNIT TIMING AND CONTROL (1A8)
TACCO TRAY LOGIC SUBUNIT MATRIX (1A11, 1A12)
DIGITAL INPUT MULTIPLEXER SUBUNIT TIMING UNIT (1A17)
SONOBUOY RECEIVER LOGIC SUBUNIT CONTROL (1A20)
30
5 30
8 30
30 30 5 30 8
8 30 30
11 11 11 11
11 11 11
16 30 30 30 30 10
30 30 30 30 4
A5
A4 A3
A2 A1
A8 A7 A6 A5 A4 A3 A2 A1
A9 A8 A7 A6 A2 A5 A4 A3
A1
A6
A5
A4
A3
A2
A1
A A 11 10 A9 A8 A7 A6
A5 A4 A3 A2 A1
J7 J6 J5 J4 J3 J2 J1 J8
J7 J6 J5 J4 J3 J2 J1 J13 J12 J11 J10 J9 J8
J8 J7
J6 J5 J4 J3 J2 J1
J12 J11 J10 J9 J8 J7
J6 J5 J4 J3 J2 J1 J17 J16 J15 J14 J13
J9 J8 J7 J6 J5 J4
J3 J2 J1
PILOT KEYSET, CATHODE RAY TUBE TRAY AND ORDNANCE PANEL (1A4, 1A5, 1A6)
POWER MONITOR AND SYSTEM INTIALIZE LOGIC (1A9)
UNIVERSAL KEYSET LOGIC (1A13, 1A14, 1A15)
DIGITAL INPUT MULTIPLEXER SUBUNIT EXTERNAL CHANNEL INPUT (1A18)
STATUS LOGIC SUBUNIT MULTIPLEXER (1A22)
11 11
16
10
14
15 15 15 15
10
15 15 15 15
5 10
A5 A4
A3
A1
A2
A4
A3
A2
A1
A1 A3 A5 A7
A9
A6 A8 A4 A2
A A 11 10 A9 A8 A7 A6 A5 A4 A3 A2 A1
J10 J9 J8 J7
J6 J5 J4 J3 J2 J1
J12 J11 J10 J9 J8 J7 J14 J13
J6 J5 J4 J3 J2 J1
J6 J5 J4 J3 J2 J1
J12 J11 J10 J9 J8 J7 J22 J21 J20 J19 J18
J6 J5 J4 J3 J2 J1 J17 J16 J15 J14 J13
TACCO TRAY LOGIC SUBUNIT (1A10)
DIGITAL INPUT MULTIPLEXER SUBUNIT INTERNAL CHANNEL INPUT (1A16)
SONOBUOY RECEIVER LOGIC SUBUNIT PROCESSOR INPUT/OUTPUT (1A19, 1A21)
AUXILIARY READOUT LOGIC (1A23)
Figure 5-7. LU 1 Subassembly Module Location Diagram 5-14
NAVAIR 01-75PAC-12
EQUIPMENT/MODULE/PART SUBSYSTEM
Maintenance Control Panel (MCP)
DESIGNATOR
1A1
NOMENCLATURE
Maintenance Control Panel Assembly Module Assembly Type 9 Module Assembly Type 18 Module Assembly Type 4
FUNCTION
Controls modes of operation of LU 1 - interface between Central Computer Frequency Counter, Clock Generator Clock Pulse Buffer-DriverGenerator-Shaper ARO/DlM-DOM Input Amp/Control Gates - Verify OA Gates; Cptr Ctl Sig Transfer ARO and verify Storage Register Reset Logic Control Lamps Gate/Control Signal Generator; Mode Sel Ctl Sigs DlM-DOM and offline Storage Register-Reset Logic-Control Lamps Gate/ Control Signal Generator Test Storage Register-Reset Logic-Control Lamps Gate and Control Signal Generator Computer Input Multiplexer DIM/DOM-ARO; CH00, IB0-5, IB19-24 MON; IB0-5, 19-24 Lamp Computer Input Multiplexer DIM/DOM-ARO; CH01, IB6-11, CH00 2528 MON; IB6-12 25-29 Lamp Computer Input Multiplexer DIM/DOM-ARO; CH01, IB15-18, CH00 IB13-18 MON; IB13-18 Lamp MCP Data Register; Data Transfer; CH00, CH01, Lamp OB00-03 MCP Data Register; Data Transfer; CH00, CH01, Lamp OB04-07 MCP Data Register; Data Transfer; CH00, CH01, Lamp OB08-11
IN-FLIGHT SPARES
No
IDENTICAL ITEMS FOR ALTERNATE REPAIR
EQUIPMENT/MODULE/PART SUBSYSTEM DESIGNATOR

1A1A2A4
NOMENCLATURE
Module Assembly Type 13 Module Assembly Type 13 Module Assembly Type 13 Module Assembly Type 13 Module Assembly Type 13 Lamps (72 ea) 1-30 and 64-70 31-63 and 71-72 Extender Card DOM Assembly
FUNCTION
MCP Data Register; Data Transfer; CH00, CH01, Lamp OB12-15 MCP Data Register DOM/ ARO; Data Transfer; CH00, CH01, Lamp OB16-19 MCP Data Register ARO; Data Transfer; CH00, CH01, Lamp OB20-23 MCP Data Register ARO; Data Transfer; CH00, CH01, Lamp OB24-27 MCP Data Register ARO; Data Transfer; CH00, CH01, Lamp OB28, 29 Indicators Switch-Indicators Fault Isolation Transmit Data Bits from Computer to Peripheral Chans Enter Generator and Test Data Register-used for test only, Type 11, OB0-3 Test Data Register - used for test only, Type 11, OB4-11 OA/Data Inverter-Driver, used for test, used as driver-inverter for Channels 12-15, Type 5, OB0-5, CH01 OA/ODR/Data InverterDriver, provides drive and logic inversion for computer and Channels 12-15, Type 5, OB6-11, CH01 Address Decoder, ODR Control, Den Generator Channels 0-11, CH01 OB15-18 Communication Between Pilot and Central Computer through DIM/DOM
IN-FLIGHT SPARES
Yes
None
All type 13 identical - 8 in LU 1, 8 in LU 2, 8 in LU 3, 8 in LU 4 (32 total) All type 13 identical - 8 in LU 1, 8 in LU 2, 8 in LU 3, 8 in LU 4 (32 total) All type 13 identical - 8 in LU 1, 8 in LU 2, 8 in LU 3, 8 in LU 4 (32 total) All type 13 identical - 8 in LU 1, 8 in LU 2, 8 in LU 3, 8 in LU 4 (32 total) All type 13 identical - 8 in LU 1, 8 in LU 2, 8 in LU 3, 8 in LU 4 (32 total) 33 Light 34 Switch
1A1A1A1
Yes
All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 18 identical - 1 in LU 1, 1 in LU 2, 1 in LU 3, 1 in LU 4 (4 total) All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in Logic 4 (44 total) All type 12 identical - 3 in LU 1, 4 in LU 2, 3 in LU 3, 4 in LU 4 (14 total)
1A1A2A5
Yes
1A1A1A2
Yes
1A1A2A6
Yes
1A1A1A3
Yes
1A1A2A7
Yes
1A1A1A4
Module Assembly Type 12
Yes
1A1A2A8
Yes
1A1DS1 1A1DS72 Extender Card Digital Output Multiplexer 1A2 1A3
No
1A1A1A5
Yes
All type 12 identical - 3 in LU 1, 4 in LU 2, 3 in LU 3, 4 in LU 4 (14 total) All type 12 identical - 3 in LU 1, 4 in LU 2, 3 in LU 3, 4 in LU 4 (14 total) All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 total) All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 total)
No No None
1A1A1A6
Yes
1A3A1
Module Assembly Type 11 Module Assembly Type 11 Module Assembly Type 5
Yes
All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total)
1A1A1A7
Yes
1A3A2
Yes
1A1A1A8
Yes
1A3A3
Yes
1A3A4 Yes All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 total) 1A3A5 Yes All type 13 identical - 8 in LU 1, 8 in LU 2, 8 in LU 3, 8 in LU 4 (32 total) All type 13 identical - 8 in LU 1, 8 in LU 2, 8 in LU 3, 8 in LU 4 (32 total) All type 13 identical - 8 in LU 1, 8 in LU 2, 8 in LU 3, 8 in LU 4 (32 total) Pilot Keyset Logic 1A4
1A1A1A9
Yes
1A1A2A1
Yes
All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 total) 1A5, 1A6 (all respective modules)
1A1A2A2
Yes
Pilot Keyset Logic Assembly
No
1A1A2A3
Yes
NOTE
1. 2. Yes, in the In-flight Spares column indicates a spare is available in the in-flight maintenance kit. No indicates that no spare is available. LU 4 installed in BUNO 158928 and 159503 and subsequent. 3 4. Sonobuoy Reference system installed on BUNO 159889, 160290 and subsequent. All modules/units listed are replaceable in flight.
Figure 5-8. LU 1 Module and Subassembly Function and Interchangeability (Sheet 1 of 7) 5-15
NAVAIR 01-75PAC-12
1A4A1
NOMENCLATURE
FUNCTION
Buffer/Decoder - from MCPL and DOM to Registers, Type 3, Output Bits 0-4 & 6-8 Storage Register 0,1, from 1A4A1 to Keyset lights, Type 11, MFUN Lt Sw 1-8; OB0-4 Storage Register 2, 3, from 1A4A1 to Keyset lights, Type 11, MFUN Lt Sw 9-16; OB0-4 Storage Register 4 from 1A4A1 to Keyset lights, Type 11, MFUN Lt Sw return; OB0-4 Encoder and Enter Generator - from Keyset and IFPM to DIM, Type 1, Input Bits 0-7 and Ch 4 Ent Communication Between SS3 and Central Computer through DIM/DOM Buffer/Decoder from MCPL and DOM to Registers, Type 3, Output Bits 0-4, 6-8 CH01 OB0-4 Storage Register 0, 1, from 1A5A1 to Keyset lights, Type 11, MFUN Lt Sw 3 thru 10; OB0-4 Storage Register 2, 3, from 1A5A1 to Keyset lights, Type 11, MFUN Bkg Lt 1-8; OB0-4 Storage Register 4, from 1A5A1 to Keyset lights, Type 11, MTX sel lights OB0-4 Encoder and Enter Generator -from Keyset and IFPM to DIM Type 1, Input Bits 0-7 & Channel 6 Enter Communication Between Ord and Central Computer through DIM/DOM Buffer/Decoder - from MCPL & DOM to Registers, Output Bits 0-4 & 6-8 CH01, OB0
IN-FLIGHT SPARES
Yes

All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 total) All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total)

1A6A2
NOMENCLATURE
FUNCTION
Storage Register 0,1, from 1A6A1 to Keyset lights, BIN PRO; OB0-4 Storage Register 2, 3 from 1A6A1 to Keyset lights, SLT PRO; OB0-4 Storage Register 4 from 1A6A1 to Keyset lights, Load Unload & Ord Alert; OB0-4 Encoder and Enter Generator - from Keyset and IFPM to DIM; IB0-5 Generates clock and test bits, controls transmission of status information by 1A22 status logic multiplexer Decoder, Buffers Output Bits 0-11 Decodes Output Bits 9-11 for Scan words 1-5 Universal Register, Interrogate words 1 thru 5; Output Bits 0-7 Timing and Control Stat Clk Gen; Ent Gen 7, 11 Data and Control Line Drivers; Stat Tst Ent Gen; word 1, 2; CH01, Output Bits 8-11 Universal Register; CH01, Output Bits 0-9; Drove F/Fs Relay Driver - NAV Info Monitors status of Power Supply, sends Info to Central Computer, sends Initializing Signal to LU 1 Assemblies System Initialize Control Shift Register System Initialize ControlShift Register System Initialize Driver System lnitialize Driver
IN-FLIGHT SPARES
Yes

All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total)
1A4A2
Yes
1A6A3
Yes
1A6A4 Yes All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) 1A6A5 Yes All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total)
Yes
1A4A3
1A4A4
Module Assembly Type 1 Timing and Control Status Logic Assembly
Yes
All type 1 identical - 10 in LU 1 (10 total) None
1A4A5
Yes
All type 1 identical - 10 in LU 1 (10 total)
Status Logic Timing and Control
1A8
No
1A8A1 Yes 1A4, 1A6 (all respective modules) 1A8A2 Yes All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 total) All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total)
CRT Tray Logic
1A5
CRT Tray Logic Assembly Module Assembly Type 3
Module Assembly Type 3 Module Assembly Type 9 Module Assembly Type 6 Module Assembly Type 5
Yes
All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 6 identical - 2 in LU 1, 4 in LU 2 (6 total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 8 identical - 3 in LU 1, 9 in LU 2, 1 in LU 3 (13 total) None
Yes
1A5A1
1A8A3 1A8A4
Yes Yes
1A5A2
Yes
1A5A3
Yes
All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total)
1A8A5
Module Assembly Type 9 Module Assembly Type 8 Power Monitor and System Initialize Assembly
Yes
1A8A6 Yes All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) Power Monitor and System lnitialize (PM and SI) 1A9
Yes No
1A5A4
1A5A5
Yes
1A9A1
Yes
All type 30 identical - 13 in LU 1, 12 in LU 2, 3 in LU 3, 2 in LU 4 (30 total) All type 30 identical - 13 in LU 1, 12 in LU 2, 3 in LU 3, 2 in LU 4 (30 total) All type 8 identical - 3 in LU 1, 9 in LU 2, 1 in LU 3 (13 total) All type 8 identical - 3 in LU 1, 9 in LU 2, 1 in LU 3 (13 total)
Ordnance Panel Logic
1A6
Ordnance Panel Logic
No
1A4, 1A5 (all respective modules)
1A9A2
Yes
1A6A1
Yes
All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 total)
1A9A3 1A9A4
Yes Yes
NAVAIR 01-75PAC-12
1A9A5
NOMENCLATURE
FUNCTION
System Initialize Shift Register Interrupt Driver; CH00 Input Bits 6-9 System Initialize Control Shift Relay/Shift Register Power Supply Input/Storage Reg. Comparator, Interrupt Flip-Flop, Clock Buffer; CH00 Input Bits 6-9 Sig. TACCO Tray - Mono Function Communicate Between TACCO Tray and Computer; Sw Encdr & Data Mplx OR Module from 1A12, 1A10A2, and 1A10A3 to DIM, DOM, Input Bits 0-7, Data Mplx Switch Encoder and Enter Generator from TACCO Tray to DIM and 1A10A1, Lwr Panel MFUN & Keyboard Data Switch Encoder and Enter Generator from TACCO Tray to DIM and 1A10A1, Upr Panel MFUN Sw Data; Input Bit 0-5.7 Storage Register 21, 22 from 1A11 to Lights, A & B MTX Sel Lt Codes Storage Register 23, 24 from 1A11 and 1A12 to Lights C MTX Sel Light Codes TACCO Tray Matrix
IN-FLIGHT SPARES
Yes


1A11A3
NOMENCLATURE
FUNCTION
Switch Encoder and Enter Generator from TACCO Tray Switches to DIM and 1A10, MTX Sel Input Bits 0-7 & CH00 Ent; Output Bits 0-5.7 Storage Register 11, 12, MFUN 1-8 Switch Codes Storage Register 13, 14, MFUN 9-11, 13, 16, 19-21 Switch Codes & Returns Storage Register 15, 16, MFUN 22-29 Switch Codes Storage Register 17, 18, MFUN 30-34 & 43-45 Switch Codes Storage Register 19, 20, MFUN 39-42, 46, 48-50 Switch Codes TACCO Tray, Matrix
IN-FLIGHT SPARES
Yes

1A9A6
Yes
1A9A7
Yes
1A11A4 1A11A5
Module Assembly Type 11 Module Assembly Type 11 Module Assembly Type 11 Module Assembly Type 11 Module Assembly Type 11 TACCO Tray Matrix Logic Assembly Module Assembly Type 3
Yes Yes
All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) 1A11
1A9A8
Yes
1A11A6 1A11A7
Yes Yes
TACCO Tray Logic (Mono Function)
1A10
TACCO Tray Mono Function Logic Assembly
No
None
1A11A8 Yes All type 16 identical - 2 in LU 1, 2 in LU 2, 12 in LU 3, 5 in LU 4 (21 total) All type 1 identical - 10 in LU 1 (10 total)
Yes
1A10A1
TACCO Tray Logic (Matrix)
1A12
No
1A10A2
Yes
1A12A1
1A10A3
Yes
Buffer and Decoder - from 1A11 to 1A10 and Storage Register, MTX Background Lts & MFUN 51, 52, 65, 66 Light Switch Register 1-10 Ent Buffer and Decoder - from DOM and MCPL to Storage Reg, MTX BGD Lts & MFUN 51, 52, 65, 66 Lt Sw Reg 1-10, 24 Strobe Switch Encoder & Enter Generator from TACCO Tray Switches & IFPM to 1A10 and DIM, All OB05.7 MTX RDOUT Sw Inputs; MTX ENDLR Storage Register 1, 2; MTX A BGD Lt Sw Codes 1-8 Storage Register 3, 4; MTX A BGD Lt Sw Codes 9-12 & MTX B BGD Lt Sw Codes 1-4 Storage Register 5, 6; MTX B BGD Lt Sw Codes 5-12 Storage Register 7, 8; MTX C BGD Lt Sw Codes 1-8 Storage Register 9, 10; MTX C BGD Lt Sw Codes 9-12
Yes
1A12A2
Yes
1A10A4
Module Assembly Type 11 Module Assembly Type 11
Yes
All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total)
1A12A3
Yes
1A10A5
Yes
TACCO Tray Logic (Matrix)
1A11
TACCO Tray Matrix Logic Assembly Module Assembly Type 3
No
1A12
1A12A4 1A12A5
Yes Yes
1A11A1
Buffer and Decoder from MCPL to Lights via Storage Register to 1A10 and 1A11; Reg 11-29 En; CH01,Output Bits 0-4 Buffer and Decoder from DOM and MCPL to Storage Registers and 1A10; Reg 11-23 Strobes CH01 Output Bits 6-10
Yes
1A12A6 1A12A7 1A12A8
Yes Yes Yes
All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) All type 11 identical - 48 in LU 1, 1 in LU 3, l in LU 4 (50 total)
1A11A2
Yes
NAVAIR 01-75PAC-12
SS1 Universal Keyset Logic
DESIGNATOR
1A13
NOMENCLATURE
Universal Keyset Logic Assembly
FUNCTION
Communication Between SS1 Universal Keyset and Central Computer through DIM/DOM Encoder & Enter Generator from Keyset and lFPM to DIM; Keyset Input Data Buffer & Decoder from MCPL and DOM to Registers; Drivers, Inverters; Output Data to Keyset CH01, OB04, 6-9 Storage Register 0, 1, from 1A13A2 to Keyset Lights; PRO 1, 2 Storage Register 2, 3, from 1A13A2 to Keyset Lights; PRO 3, 4 Storage Register 4, 5, from 1A13A2 to Keyset Lights; PRO 5, 6 Storage Register 6, 7, from 1A13A2 to Keyset Lights; PRO 7, 8 Storage Register 8, 9, from 1A13A2 to Keyset Lights; PRO 9; MTX BGD Lt 1-4 Storage Register 10, 11, from 1A13A2 to Keyset Lights; MTX BGD Lt 5-8 & All MTX Sel Storage Register 12, 13, from 1A13A2 to Keyset Lights; MFUN Lt Sw Codes 17-19 & 33-37 Communication Between SS2 Keyset and Computer via DIM/DOM Encoder and Enter Generator from Keyset and IFPM to DIM; Keyset Input Data Buffer and Decoder - from MCPL and DOM to Registers Output Data to Keyset Storage Register 0, 1, from 1A14A2 to Keyset Lights; PRO 1, 2 Storage Register 2, 3 from 1A14A2 to Keyset Lights; PRO 3, 4
IN-FLIGHT SPARES
Yes


1A14A5
NOMENCLATURE
FUNCTION
Storage Register 4, 5, from 1A14A2 to Keyset Lights; PRO 5, 6 Storage Register 6, 7, from 1A14A2 to Keyset Lights; PRO 7, 8 Storage Register 8, 9, from 1A14A2 to Keyset Lights; PRO 9 MTX BGD Lt 1-4 Storage Register 10, 11, from 1A14A2 to Keyset Lights; MTX BGD Lt 5-8 & All MTX Sel Storage Register 12, 13, from 1A14A2 to Keyset Lights; MFUN Lt Sw 17-19, 33-37 Communication Between NAVCOMM Universal Keyset and Central Computer via DIM/DOM Encoder and Enter Generator from Keyset and IFPM to DIM; Keyset Input Data Buffer and Decoder from MCPL and DOM to Registers; Output Data to Keyset Storage Register 0, 1, from 1A15A2 to Keyset Lights; PRO 1, 2 Storage Register 2, 3, from 1A15A2 to Keyset Lights; PRO 3, 4 Storage Register 4, 5, from 1A15A2 to Keyset Lights; PRO 5, 6 Storage Register 6, 7, from 1A15A2 to Keyset Lights; PRO 7, 8 Storage Register 8, 9, from 1A15A2 to Keyset Lights; PRO 9 MTX BGD Lt 1-4 Storage Register 10, 11, from 1A15A2 to Keyset Lights; MTX BGD Lt 5-8 & all MTX Sel Storage Register 12, 13, from 1A15A2 to Keyset Lights; MFUN Lt Sw Codes 17-19, 33-37
IN-FLIGHT SPARES
Yes

All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total)
1A13A1
Yes
All type 1 identical - 10 in LU 1 (10 total) All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 total)
1A14A6
Yes
1A13A2
Yes
1A14A7
Yes
1A14A8 Yes All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) NAVCOMM Universal Keyset Logic 1A14A9
1A13A3
Module Assembly Type 11 Module Assembly Type 11 Module Assembly Type 11 Module Assembly Type 11 Module Assembly Type 11 Module Assembly Type 11
Yes
1A13A4
Yes
Yes
1A13A5
Yes
1A15
Universal Keyset Logic Assembly
No
1A13A6
Yes
1A15A1
Module Assembly Type 1 Module Assembly Type 3 Module Assembly Type 11 Module Assembly Type 11 Module Assembly Type 11 Module Assembly Type 11 Module Assembly Type 11 Module Assembly Type 11
Yes
All type 1 identical - 10 in LU 1 (10 total) All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 total) All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total)
1A13A7
Yes
1A15A2
Yes
1A13A8
Yes
1A15A3
Yes
1A13A9
Yes
1A15A4
Yes
SS2 Universal Keyset Logic
1A14
Logic Assembly, Universal Keyset Module Assembly Type 1 Module Assembly Type 3 Module Assembly Type 11 Module Assembly Type 11
No
1A13, 1A15 (all respective modules) All type 1 identical - 10 in LU 1 (10 total) All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 total) All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total)
1A15A5
Yes
1A14A1
Yes
1A15A6
Yes
1A14A2
Yes
1A15A7
Yes
1A14A3
Yes
1A15A8
Yes
1A14A4
Yes
1A15A9
Yes
NAVAIR 01-75PAC-12
Digital Input Multiplexer (DIM)
DESIGNATOR
1A16
NOMENCLATURE
DIM Internal Channel Input
FUNCTION
First and Second Level Multiplexing Internal Channels Input Bits 0-11 to Computer and MCPL (A1) Line Driver - From Multiplexer 1A16A2/A3 to Computer and MCPL - IB 1, 4, 5, 8-11 CH01 Multiplexer Chan 0, 5, 7, 8, 10; IB 6-11; Data Mltpxr No. 2 Multiplexer - Chan 0-8 Enables - Chan 0-8 to Line Drivers; IB 0-7; Data Mltpxr No. 1 Line Driver - From Multiplexer 1A16A2/A3 to Computer and MCPL; CH01, 2, 3, 6, 7, 8,10 Provides Control Signals for Subassemblies and Central Computer Input Amplifiers and Buffers Chan 0-11 Storage Register - Chan 1115; Enter & Enable Storage Register - Chan 610; Enter & Enable Storage Register - Chan 15; Enter & Enable Storage Register - S1 Ch 0; Enter Input Amplifiers and Buffers Ch 12-15; Coincidence Detector; CH IA Control 1A Gating to Peripheral (Ch 5, 7, 8, 10, 11, 15) Data Enable Generator Buffer/Decoder Ch Enable Decoder Line Drivers and Control Signal Gating; IDR/EI Control Amplifiers and First Level Multiplexing for BT Recorder Ext Chan (12-15) and IFPM Chan 10
IN-FLIGHT SPARES
No

None

1A18A1
NOMENCLATURE
Module Assembly Type 4 Module Assembly Type 4 Module Assembly Type 4 Module Assembly Type 4 Module Assembly Type 4 Module Assembly Type 4 Input/Output Receiver Processor Logic Assembly Module Assembly Type 15 Module Assembly Type 15 Module Assembly Type 15 Module Assembly Type 15 Module Assembly Type 15 Module Assembly Type 15 Module Assembly Type 15 Module Assembly Type 15 Module Assembly Type 10 Logic Assembly, Sono Receiver Control
FUNCTION
Concentrator - Chan 5, 10, 12-15, Date Bits 10, 11 Concentrator - Chan 5, 10, 12-15, Data Bits 8, 9 Concentrator - Chan 5, 10, 12-15, Data Bits 4, 5 Concentrator - Chan 5, 10, 12-15, Data Bits 4, 5 Concentrator - Chan 5, 10, 12-15, Data Bits 2, 3 Concentrator - Chan 5, 10, 12-15, Data Bits 0, 1 SS1 Sono Receiver Processor Input/Output
IN-FLIGHT SPARES
Yes

All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) 1A21 (all respective modules)
1A16A1
Yes
All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 total) All type 10 identical - 6 in LU 1, 4 in LU 2, 2 in LU 3, 8 in LU 4 (20 total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) None Sonobuoy Receiver Logic SS1 (SRL)
1A18A2
Yes
1A18A3
Yes
1A16A2
Yes
1A18A4
Yes
1A16A3
Yes
1A18A5
Yes
1A16A4
Yes
1A18A6
Yes
1A17
DIM Timing Logic
No
1A19
No
1A17A1 1A17A2 1A17A3 1A17A4 1A17A5 1A17A6
No Yes Yes Yes Yes No
All type 23 identical - 2 in LU 1, 2 in LU 4 (4 total) All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) All type 23 identical - 2 in LU 1, 2 in LU 4 (4 total)
1A19A1 1A19A2 1A19A3 1A19A4 1A19A5 1A19A6 1A19A7
Receiver Select Register Ch 0 Receiver Select Register Ch 1 Receiver Select Register Ch 2 Receiver Select Register Ch 3 Receiver Select Register Ch 4 Receiver Select Register Ch 5 Receiver Select Register Ch 6 Receiver Select Register Ch 7 Input Multiplexer from Registers to 1A20 Provides control for selecting 31 RF channels for assignment to 20 acoustic channels Select/Interrogate Rec Gr 1, 2, 3, Data Buffer and Inverter
All type 15 identical - 20 in LU 1 (20 total) All type 15 identical - 20 in LU 1 (20 total) All type 15 identical - 20 in LU 1 (20 total) All type 15 identical - 20 in LU 1 (20 total) All type 15 identical - 20 in LU 1 (20 total) All type 15 identical - 20 in LU 1 (20 total) All type 15 identical - 20 in LU 1 (20 total) All type 15 identical - 20 in LU 1 (20 total) All type 10 identical - 6 in LU 1, 4 in LU 2, 2 in LU 3, 8 in LU 4 (20 total) None
1A17A7
Module Assembly Type 6 Module Assembly Type 3 Module Assembly Type 5 DIM External Channel Input
Yes
All type 6 identical - 2 in LU 1, 4 in LU 2 (6 total) All type 3 Identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) None Sonobuoy Receiver Logic (SRL) (SS-3 TACCO LOD)
1A19A8 1A19A9
1A17A8
Yes
1A17A9
Yes
1A20
No
1A18
No
1A20A1
Yes
NAVAIR 01-75PAC-12
1A20A2
NOMENCLATURE
Module Assembly Type 5 Module Assembly Type 15 Module Assembly Type 15 Module Assembly Type 15 Module Assembly Type 15 Module Assembly Type 10 Module Assembly Type 9 Module Assembly Type 4 Logic Assembly, Input/ Output Receiver Processor Module Assembly Type 15 Module Assembly Type 15 Module Assembly Type 15 Module Assembly Type 15 Module Assembly Type 15 Module Assembly Type 15 Module Assembly Type 15 Module Assembly Type 15 Module Assembly Type 10 Multiplexer Status Logic Assembly
FUNCTION
Data Buffer
IN-FLIGHT SPARES
Yes

All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) All type 15 identical - 20 in LU 1 (20 total) All type 15 identical - 20 in LU 1 (20 total) All type 15 identical - 20 in LU 1 (20 total) All type 15 identical - 20 in LU 1 (20 total) All type 10 identical - 6 in LU 1, 4 in LU 2, 2 in LU 3, 8 in LU 4 (20 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) 1A19 (all respective modules)

1A22A1
NOMENCLATURE
Module Assembly Type 4 Module Assembly Type 30 Module Assembly Type 30 Module Assembly Type 30 Module Assembly Type 30 Module Assembly Type 10 Module Assembly Type 30 Module Assembly Type 30 Module Assembly Type 30 Module Assembly Type 30 Module Assembly Type 16 Logic Assembly, Auxiliary Readout Display Interface Module Assembly Type 9
FUNCTION
Input Amplifier - Doppler Info Change of Status Detector Bit 7 - Doppler and SAD; Word Reg; WD 1-4 B07 Change of Status Detector Bit 6; Word Reg; WD 1-4 B06 Change of Status Detector Bit 5; Word Reg; WD 1-4 B05 Change of Status Detector Bit 4; Word Reg; WD 1-4 B04 Data Multiplexer
IN-FLIGHT SPARES
Yes

All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) All type 30 identical - 13 in LU 1, 12 in LU 2, 3 in LU 3, 2 in LU 4 (30 total) All type 30 identical - 13 in LU 1, 12 in LU 2, 3 in LU 3, 2 in LU 4 (30 total) All type 30 identical - 13 in LU 1, 12 in LU 2, 3 in LU 3, 2 in LU 4 (30 total) All type 30 identical - 13 in LU 1, 12 in LU 2, 3 in LU 3, 2 in LU 4 (30 total) All type 10 identical - 6 in LU 1, 4 in LU 2, 2 in LU 3, 8 in LU 4 (20 total) All type 30 identical - 13 in LU 1, 12 in LU 2, 3 in LU 3, 2 in LU 4 (30 total) All type 30 identical - 13 in LU 1, 12 in LU 2, 3 in LU 3, 2 in LU 4 (30 total) All type 30 identical - 13 in LU 1, 12 in LU 2, 3 in LU 3, 2 in LU 4 (30 total) All type 30 identical - 13 in LU 1, 12 in LU 2, 3 in LU 3, 2 in LU 4 (30 total) All type 16 identical - 2 in LU 1, 2 in LU 2, 12 in LU 3, 5 in LU 4 (21 total) None
1A20A3 1A20A4 1A20A5 1A20A6 1A20A7
Receiver Select Register Ch 16 Receiver Select Register Ch 17 Receiver Select Register Ch 18 Receiver Select Register Ch 19 Input Multiplexer
Yes Yes Yes Yes Yes
1A22A2
Yes
1A22A3
Yes
1A22A4
Yes
1A22A5
Yes
1A20A8
Manual Mode Interrogate Register Input Multiplexer from Audio Switching Matrix SS2 Sono Receiver Processor Input/Output
Yes
1A22A6
Yes
1A20A9
Yes
1A22A7
Change of Status Detector Bit 3; Word Reg; WD 1-4 B03 Change of Status Detector Bit 2; Word Register; WD 1-4 B02 Change of Status Detector Bit 1; Word Register; WD 1-4 B01 Change of Status Detector Bit 0; Word Reg; WD 1-4 B00 Expanded Input Gating; Freeze Gen; WD 1-4 B0-7 EXOR; WD 5 B0-6 EXOR Provides Interface Between the 2 AROs and Computer
Yes
Sonobuoy Receiver Logic (SRL) SS2
1A21
No
1A22A8
Yes
1A21A1 1A21A2 1A21A3 1A21A4 1A21A5 1A21A6 1A21A7 1A21A8 1A21A9
Receiver Select Register Ch 8 Receiver Select Register Ch 9 Receiver Select Register Ch 10 Receiver Select Register Ch 11 Receiver Select Register Ch 12 Receiver Select Register Ch 13 Receiver Select Register Ch 14 Receiver Select Register Ch 15 Data Multiplexer - from registers to 1A20 Transmits status of Doppler Radar, Inertial Navigation, and Camera Film or Sonobuoy Reference System 3 to computer via DIM. Transmits Central Computer information to Doppler Radar and SAD
All type 15 identical - 20 in LU 1 (20 total) All type 15 identical - 20 in LU 1 (20 total) All type 15 identical - 20 in LU 1 (20 total) All type 15 identical - 20 in LU 1 (20 total) All type 15 identical - 20 in LU 1 (20 total) All type 15 identical - 20 in LU 1 (20 total) All type 15 identical - 20 in LU 1 (20 total) All type 15 identical - 20 in LU 1 (20 total) All type 10 identical - 6 in LU 1, 4 in LU 2, 2 in LU 3, 8 in LU 4 (20 total) None Auxiliary Readout Logic (AROL)
1A22A9
Yes
1A22A10
Yes
1A22A11
Yes
1A23
No
1A23A1
ARO 1; 2 Character 1 and 2 Register; CH00, OB 15-18, 21-24 (#2), 05, 11 (#1); Unblank ARO 1; 2 Character 1 and 2 Register; CH00, OB0-4, 06-10 (#l); Unblank Character Test Clocks CH00 IB0-5 Mon Character Reset Logic CH00 IB 10, 11, 13-16 Mon; Unblank
Yes
1A23A2
Yes
1A23A3
Yes
Status Logic
1A22
No
1A23A4
Yes
NAVAIR 01-75PAC-12
1A23A5
NOMENCLATURE
FUNCTION
Timing and Control Counter Control and Logic; ARO Horiz & Vert B 1-5; CH00 IB 17-21 Mon Input Word Multiplexer Clock & Sync Line Driver; ODR, IDR; CH00 IB 22-28 Reset Counter, Master Timing Counter, Counter/Timing Control X, Y Position Counter
IN-FLIGHT SPARES
Yes

All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) All type 10 identical - 6 in LU 1, 4 in LU 2, 2 in LU 3, 8 in LU 4 (20 total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) 2PS1, 3PS1 1PS1A1, 1PS1A2, 1PS1A3; Same in 2PS1 and 3PS1 1PS1A1, 1PS1A2, 1PS1A3; Same in 2PS1 and 3PS1 One each in 1PS1A1, 1PS1A2, 1PS1A3; Same in 2PS1 and 3PS1 1PS1A1, 1PS1A2, 1PS1A3; Same in 2PS1 and 3PS1 Same in 2PS1 and 3PS1 Same in 2PS1 and 3PS1 Same in 2PS1 and 3PS1 Same in 2PS1 and 3PS1 Same in 2PS1 and 3PS1 Same in 2PS1 and 3PS1

1PS1A8F1 1PS1DS1 Internal Power Source +12 vdc Unregulated Power Supply 1PS2
NOMENCLATURE
Fuse Cartridge Lamp Incandescent CM8-815AS15 Internal Power Source Assembly Unregulated 12 vdc Assembly
FUNCTION
Protection for 1PS1A8 Power Supply Lamp System Initialize Voltage PM/SI ac for MCP dc for PS1 Provides +12 vdc Unreg for LU 1 used for Lamps and Relay Drivers
IN-FLIGHT SPARES
No No No

Same in 2PS1 and 3PS1 Same in 2PS1 and 3PS1 Same in 2PS2 and 3PS2
1A23A6
Module Assembly Type 10 Module Assembly Type 5 Module Assembly Type 9 Module Assembly Type 9 Module Assembly Type 9
Yes
1A23A7
Yes
1PS3
No
Same in 2PS3 and 3PS3
1A23A8
Yes
1A23A9
Yes
1A23A10
Test Data Register ARO 2 Character 1 and 2 Register; CH00 OB 12-14, 19, 20, 25-27, 29; IDR Master Reset Logic Initialize - Clock Shaper, Generator; CH00 OB28; Unblank Provides dc for MCP and all internal Logics in LU 1 +5 vdc Regulator +5 vdc Regulator Protection for Regulators (One Each in 1PS1A1, A2, A3) Regulates +5 vdc 14.5 vac 3 400 Hz In, +17 vdc Out Protect PS1 from Overvoltage and Overload 3 Rectifier and Filter Regulates 15 vdc and 6 vdc Protection for 1PS1A7 Regulates -15 vdc and -10 vdc
Yes
1A23A11
Module Assembly Type 9 LU 1 Power Supply Assembly Regulator Assembly 5 vdc Regulator Assembly 5 vdc Fuse Cartridge, 8A
Yes
LU 1 Power Supply
1PS1 1PS1A1 1PS1A2 1PS1A1F1, A2F1, A3F1 1PS1A3 1PS1A4 1PS1A5 1PS1A6 1PS1A7 1PS1A7F1 (276004) 1PS1A8
Yes No No No
Regulator Assembly 5 vdc Rectifier and Filter Assembly Protection Module Assembly Control Assembly, Regulator 5 vdc Regulator Assembly 15 vdc and 6 vdc Fuse, Cartridge Regulator Assembly -15 vdc and -10 vdc
No No No No No No No
Figure 5-8. LU 1 Module and Subassembly Function and Interchangeability (Sheet 7 of 7) 5-21/(5-22 blank)
SECTION 6
LOGIC UNIT 2
(RACK F2) (RACK D3) OR 1 RD-319/AYA-8 RD-319A/AYA-8 2 MAGNETIC TAPE TRANSPORT (MTT A) (SEE SECTION 9A OR 9B) 8J2 READ DATA AND STATUS 8J1 WRITE DATA AND COMMANDS ORDNANCE CONTROL ARMAMENT CONTROL 2J1 (RACK D1) MX-8024( )/AYA- DATA ANALYSIS LOGIC UNIT (LU 2) -8 2J10
NAVAIR 01-75PAC-12
SB-3152/AYA-8 ELECTRICAL TEST PANEL (ARM/ORD TEST PANEL)
(RACK B1) A395 FORWARD ARMAMENT INTERCONNECTION BOX (SEE NAVAIR- -75PAC- -6) -01-122J8
2J11 (RACK D3) 1 RD-319/AYA-8 MAGNETIC TAPE TRANSPORT (MTT B) (SEE SECTION 9A) (SAME AS MTT A) 8J2 READ DATA AND STATUS 8J1 WRITE DATA AND COMMANDS 2J5 (RACK D2) A507 COMMUNICATIONS INTERFACE NUMBER 2 (DATA LINK INTERFACE) (SEE NAVAIR 01-75PAC- -3) -12DISPLAY REGISTER 29 19 9 X 28 27 26 25 24 23 22 21 20 10 0 0 18 17 16 15 14 13 12 11 8 E 7 1 6 0 5 4 3 3 2 2 1 1
2J12
2J13
MAGNETIC TAPE CONTROL LOGIC (MTCL) (2A2 THROUGH 2A9, 2A15, 2A16)
CONTROL
2J9 STATUS
7J3 CH 11 ODR, OA, EF, EFR GR2 OB 00-29 (RACK D2/D3 OVERHEAD) A505 AN/ASQ-114 DMTS INTERFACE BOX (DMTS INTERCONNECTION BOX) (SEE SECTION 9) J8 GR2 OB 00-29 AND CH11 ODR, OA, EF, EFR 3 4 4
2J6
CH10 ODR, EFR CH10 OB 00-29, OA MAINTENANCE CONTROL PANEL/MAINTENANCE CONTROL PANEL LOGIC/POWER MONITOR AND SYSTEM INITIALIZE (MCP/MCPL/PM & SI) (2A1, 2A10, 2A17)
INT EFRIDRODR INTERRUPT CODE SHIFT/OUTPUT EFL QAINHIBITIA INPUT REGEXT OPERATE STOP SLOW REG FUNCTION INHIBIT INHIBIT 1KC
CH09 IA OB 00-29, EF CH09 EFR CH09 OB 00-29, OA CH09 ODR
REGISTER SELECT ADP ADP NET FP
I/O CONTROL CLOCK SELECT EVEN, REC ZERO SBC ODD,ERR OPERATE OFF TEST PICKET LBC
J2
J4
7 6 5 98 4 MODE SELECT TRANSIT SELECT TEST SELECT 1 43 3 2 2 22 GO 0 98 7 12 1 1 11 22 MASTER CONTROL RESET OPR TEST LAMP TEST
ORDNANCE OUTPUT LOGIC (OOL) (2A13, 2A19)
2J18
J1 J3 3 A1J82 3 CH 8 OA, ODR, GR2 OB 00-29 A1J86 CH 9, 10, 11 OUTPUT CONTROL A1J66 CH 8 INPUT DATA AND CONTROL A1J70 CH 9 INPUT DATA AND CONTROL A1J74 CH 10 INPUT DATA AND CONTROL
CH9 ODR, OA, EF, EFR
3 CH09 IB 00-11, IA 3 2J1 4 2J2 4 2J3 CH08 ODR CH08 IB 06-09 CH08 OB 00-03, 10-29, IA
TRIGGER ON
2 2 AMP
1 1 AMP - 10V
DATA IND
+10V +5V
OFF
SCOPE RET
(RACK D2) CP-901(V)( )/ASQ-114(V) DIGITAL DATA COMPUTER (CENTRAL COMPUTER) (SEE SECTION 4)
GR2 OB AND CH8 ODR, OA
CH09, 10 OA, EF
ARMAMENT OUTPUT LOGIC (AOL) (2A14, 2A20)
2J17 INS 1 DATA 2J15 INS 1 CONTROL INS 2 DATA INS 2 CONTROL
(RACK B1) DUAL-INERTIAL NAVIGATION SYSTEM (DUAL INS) (SEE NAVAIR- -75PAC- -6) -01-12(RACK G2) A275 SEARCH STORES INTERCONNECTION BOX (SEE NAVAIR 01-75PAC- -6) -126J6
(SENSOR STATION 1) A269 AFT ARMAMENT INTERCONNECTION BOX (SEE NAVAIR 01-75PAC- -6) -125J9 STATUS
4 51 61
1 1 1 32 1 1 0
NAVIGATION MULTIPLEXER (NM) (2A11) 2J8
2J4 ARMAMENT/ORDNANCE INPUT LOGIC (AOIL) (2A12, 2A18) OOL/AOL ERROR, IFPM
2J9
STATUS
OFF ON
2J14 (RACK D1)
4 FROM CENTRAL COMPUTER TO CENTRAL COMPUTER IB 00-29 EI, ODR, EFR, IDR
2J16
2FL1J1 FL1 POWER SUPPLIES (2PS1, 2PS2, 2PS3) OVERTEMP 2J19 (FS 440) TB452 115 VAC 3 2J4
DATA * CONTROLS
OB 00-29 EIE, OA, EF, IA
A383 2 1 A511 5 A521 6 POWER DISTRIBUTION BOX (SEE NAVAIR 01-75PAC-12-2)
A291
* CONTROLS CONSIST OF ONE OR MORE OF THE LISTED TERMS NOTE 1 2 3 4 5 6 7 AIRCRAFT BUNO 156507 THROUGH 159329 NOT INCORPORATING AFC 450 AIRCRAFT BUNO 159328 AND 159503 THROUGH 159886, 159888, 159889 THROUGH 161131 AIRCRAFT BUNO 161132 AND SUBSEQUENT AND AIRCRAFT INCORPORATING AFC 450 AIRCRAFT BUNO 156507 THROUGH 159888 AND 159890 THROUGH 161131 NOT INCORPORATING AFC 450 AIRCRAFT BUNO 159887 INCORPORATING AFC 450 AND 161132 AND SUBSEQUENT AIRCRAFT BUNO 156508 THROUGH 158927, 158929 THROUGH 159329 INCORPORATING AFC 450 REMOVED ON AIRCRAFT INCORPORATING AFC 619
2J8
CONTROL 1J2 OVERTEMP
(TACCO STATION) A324 TACCO POWER CONTROL (SEE NAVAIR 01-75PAC- -2) -12-
Figure 6-1. LU 2 Signal Flow Diagram
Change 2
6-1
NAVAIR 01-75PAC-12
(RACK D2) LU 2 J1/P5 (RACK D1) DPS ELECTRONIC CIRCUIT BREAKER PANEL LOGIC UNIT NO. 2 A B C PWR DISTR BOX DC (TACCO STATION) TACCO POWER CONTROL LOGIC UNITS 2 28 VDC N 2K5 115 VAC A 115 VAC B 115 VAC C (RACK D1) POWER DISTRIBUTION BOX MAIN POWER 2J4 F G H (FS 440) TB452 1FL1J1 C20 C21 C22 A B C D AC FILTER (FL1) 1 2 3 4 115 VAC A 115 VAC B 115 VAC C NEUTRAL CB1 B1 FAN OFF
DS1
D ELAPSED TIME CHAS TRANSFORMER T1 11 12 1 2 3 4 5 6 7 8 9 10 14 15 1J1 A CONTROL (FS 440) TB452 D4 D5 OVERTEMP OVERTEMP RET ZI U 1J39 A B P6/J8 H L CHAS DC A M J3 2J8 A CHAS 2PS2 +12 VDC J2 R6 +6 VDC R7 -12 VDC J4 R9 - VDC -6 J5 R10 GND J6 FAST +5 VDC J1 R4 R E D B J GND C -6 VDC F P -12 VDC -12 VDC K +6 VDC J8/P6 N +12 VDC 16 14.5 VAC A 14.5 VAC B 14.5 VAC C 26.8 VAC A 26.8 VAC B 26.8 VAC C 26.8 VAC A 26.8 VAC B 26.8 VAC C 13 DC 11 VAC A 11 VAC C 11 VAC B A B C P
M H N R +12 VDC UNREG RET +12 VDC UNREG
2J9 ZW ZV ZD
M1
2PS1 POWER SUPPLY P10/J40 12 11 A1 A2 A3 7 8 9 1 2 3 J6 J4 J5 +5 VDC REG J2 R2 +6 VDC REG R4 +15 VDC REG R3 -15 VDC REG R5 -10 VDC REG P10/J10 A4 J7 R6 12 2 3 1 A6 A1 A2 A3 16 17 A7 11 15 DC 9 8 A5 -10 VDC +5 VM -10 VM AOVM 13 -15 VDC DC 17 +15 VDC P11/J41 A5 A6 A7 16 +6 VDC R6 DC R7 +5 VDC +12 VDC UNREG J3
DC
OFF
FAST +5 VDC F5IV 20 VAC 20 VAC RET
6-2
Figure 6-2. LU 2 Overall Power Distribution Functional Signal Flow Diagram (Sheet 1 of 2)
NAVAIR 01-75PAC-12
(RACK D2) LU 2 (CONT) +12 VDC UNREG +12 VDC UNREG RET DS2 LAMP TEST +12 VDC UNREG RET S1 NM Z8 +5 VDC +5 VDC (NM) +5 VDC (NM) Z6 +6 VDC Z7 -10 VDC S2 AOIL Z12 +5 VDC Z11 +6 VDC S3 OOL Z10 +5 VDC Z9 +6 VDC +5 VDC (OOL) +5 VDC (OOL) XA4 OOL SUBUNIT XA19 2A12 136 ORDNANCE OUTPUT 134 LOGIC CONTROL ASSY XA13 2A18 135 RELAY DRIVER 136 ORDNANCE OUTPUT LOGIC ASSY +6 VDC AOL SUBUNIT XA14 2A14 135 ARM OUTPUT LOGIC RELAY DRIVER ASSY XA20 2A20 134 ARM OUTPUT LOGIC 4 CONTROL ASSY +5 VDC 2A4 132 MAG TAPE FUNCTION 1 REG CONTROL ASSY 2 XA5 1 2 Z2 XA4 +6 VDC (MTC) 136 48 2 Z4 +5 VDC (MTC) XA16 +6 VDC (AOIL) +5 VDC (AOIL) AOIL SUBUNIT XA12 1 2A12 ARM/ORD INPUT 117 CONTROL ASSY XA18 2 1 2A18 DATA ARM ORDNANCE INPUT LOGIC ASSY -10 VDC -10 VDC (NM) Z3 -10 VDC (MTC) +6 VDC (NM) 99 100 XA11 2 58 57 2A11 NAVIGATION MULTIPLEXER ASSY +5 VDC +12 VDC UNREG RET +12 VDC UNREG Z1 XA8 8 104 44 XA2 2A8 MAG TAPE DATA PATH NO. 2 CONTROL ASSY K1 MTC POWER +12 VDC UNREG (MTC) XA7 2 136 48 READY DS3 LOAD POINT DS4 WRITE LOCKOUT DS5 WRITE LOCKOUT DS6 LOAD POINT DS7 READY S5 MTC Z5 XA16 +5 VDC (MTC POWER) 2 MTC SUBUNIT XA15 1 2A15 MAG TAPE COUNTER CONTROL ASSY 2A16 MAG TAPE STATUS LOGIC NO. 2 CONTROL ASSY 2A7 MAG TAPE DATA PATH NO. 1 CONTROL ASSY +5 VDC +12 VDC UNREG RET +12 VDC UNREG -10 VM +5 VM AOVM FAST 5 VDC DC +5 VDC MTT A MTT B XA10 5 P4/J93 +5 VDC -10 VDC DC -10 VDC DC 2A10 OR ASSY
2A1
84 LU 2 MAINTENANCE 82 CONTROL PANEL ASSY 85 P2/J91 82 85 P1/J90 84 46 47 36 37 21 20 19 22 85
2A2 135 STATUS LOGIC NO. 1 MAGNETIC TAPE 136 CONTROL ASSY 2A3 MAG TAPE PARITY CONTROL ASSY
XA3 115 116 135 136
XA17 +5 VDC (NM) +5 VDC (AOIL) +5 VDC (OOL) +5 VDC (AOL) -10 VM +5 VM AOVM FAST 5 VDC F5IV 20 VAC 20 VAC RET +6 VDC +5 VDC +5 VDC (MTC)
2A17
109 POWER MONITOR 110 AND SYSTEM 71 INITIALIZE ASSY 72 113 114 111 112 66 68 70 122 76 75 12 11 14 13 7 8 4 105 106
+6 VDC (OOL)
S4 AOL Z14 +5 VDC Z13 +6 VDC +5 VDC (AOL) +5 VDC (AOL)
2A5 MAG TAPE DIAGNOSTIC CONTROL ASSY 2A4 MAG TAPE DATA PATH NO. 1 CONTROL ASSY
+6 VDC (AOL)
2A16
136 MAG TAPE CONTROL 134 REGISTER ASSY
6-3
NAVAIR 01-75PAC-12
A
J90 PS3 2 L1 1
R1 CR5
J91
J92
J93
2A1A2
2A1A1
CR6
CR3 CR4
C1
CR2 CR7 CR1
CR8
J1
2PS3 INTERNAL POWER SOURCE (TYPICAL)
DETAIL
FL 1 INPUT FILTER
POWER
SAFETY GROUND IS WIRED THROUGH PIN F OF FL1J1
CIRCUIT BREAKER LU 2 (REAR VIEW)

P/O MX- 8023/AYA- 8 P/O MX- 8023/AYA- 8 PT 764256151
DETAIL
+6 VDC J3
INHIBIT J7
- 6 VDC J5
TYPICAL STICK TYPE MODULE CONNECTOR PIN ARRAY

C C
2A1A2
2A1A1
D
S3 S2 S1
2A2 2A3 2A4 2A5 2A6 2A7
S5
S4
OFF MTT ELAPSED TIME B A DS7 DS6 DS5 DS4 DS3 DS2 M1 ADDRESS A1 B2 A2 S7 B1
POWER CONTROL (ACCESS PANEL AND WIRES REMOVED) DETAIL
GRD
J6
- 12 VDC
J4
+12 VDC
2PS2 INTERNAL POWER SOURCE
J2
T1 TRANSFORMER
MFG 99971
J1
M3
M2
DS1 MAIN POWER
TAPE REMAINING
TAPE REMAINING CB1
LAMP TEST
NOTE
1 POWER SUPPLY 2PS1 IS IDENTICAL TO POWER SUPPLY 1PS1 LOCATED IN LU 1. SEE SECTION 5 FOR POWER SUPPLY MODULE LOCATION AND TROUBLESHOOTING PROCEDURES.
2A8
2A15 2A16 2A17 2A18 2A19 2A20 2PS1 EXTENDER
2A9 2A10 2A11 2A12 2A13 2A14
LU 2 (FRONT VIEW) 6-4 Figure 6-3. LU 2 Module Location Diagram
NAVAIR 01-75PAC-12
MODULE TYPE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47
FUNCTION Switch Encoder and Enter Generator Not Used Decoder and Buffers Input Amplifiers and Gating Data and Control Line Drivers, and Gating Timing and Control Exclusive OR Relay Drivers Universal Register Data Multiplexer R.S. Register MCP Control Module MCP Gated Input Amplifiers Data Transfer and MultipIexer SRL Interface Expanded Input Gating Deflection Signal 91 ohm Driver Clock Generator and Drivers Video and Unblank 91 ohm Digital Driver Digital to Analog Converters for Conics, Vectors Butterworth Filter Deflection Signal 91 ohm Driver Special Gating and Interface Digital to Analog Converter for Gross Position High Speed Synchronous Counter PDL - Timing and Control Gating MPD - Auto-Test Gating MPDL - End of Operation Detector and ODR Generator MPDL - Type Mode Timing Gates Digital Integrator and Change of Status Detector Precision Reference, Voltage Regulator, and Character Size Control Special Test Timing and Control Logic Not Used Not Used Shift Register MTC - Decoder Function Register MTC - Status Register and Special Gating MTC - Data Path Gating and Storage MTC - Tape Mark Decoder MTC - Control Register Logic MTC - Control Register Logic MTC - Control Register Logic MTC - Control Register Logic MTC - Special Timing and Control Logic MTC - Gap Timer Decoder ADL Character Generator Line Drivers and Receivers
Subunit/Assembly
Assembly No. 1 3 4 5 2 2 2 1 2 3 2 2 1 3 1 1 1 2 1 1 3 5 4 1 2 1 1 2 3 6 7 8 9 10 11
Total Each Module Type Per Subunit or Assembly (Logic Unit 2) Module Type 12 13 14 15 16 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 36 37 38 39 40 41 42 43 44 45 2 2 1 1 2 1 1 3 2 5 3 3 6 1 1 1 1 1 1 1 4 2 2 2 1 1 1 1 1
Total Modules Per Subunit or Assembly 7 7 6 8 11 9 7 8 10 11 10 9
MTC Subunit Data Path No. 1 Data Path No. 1 Data Path No. 2 Function Register Control Register Counter Status Logic No. 1 Status Logic No. 2 Parity Logic Diagnostic Control AOL Subunit Control Relay Driver OOL Subunit Control Relay Driver AOIL Subunit Control Data NM Subunit MCP Subunit OR Logic Subunit PM & SI Subunit TOTAL EACH MODULE TYPE
2A9 2A7 2A8 2A4 2A16 2A15 2A2 2A6 2A3 2A5 2A20 2A14
2A19 2A13
2 2
1 2 3
10 7
2A12 2A18 2A11 2A1 2A10 2A17
1 1 1 2
2 5
1 1
2 3 3
1 1 1 4 8 1 4
1 1 9 2 1 3 12 1 16 6 1 1 1 1 1 19 1 2
9 11 12 22 4 7 185
1 15 6 21 4 7
1 4 4 8 16 2
9 28
Figure 6-4. LU 2 Module Type and Function
6-5
NAVAIR 01-75PAC-12
37 37
37 14
37 37
44 44 44 9
37 9
14
44
38
38
16 10
14
14 44 44 44
9 44 9
30 30 30 30 16 10
30 30 30 30 30
A7
A6
A5
A4 A3
A2 A1
A A 11 10 A9 A8 A7 A6 A5 A4 A3 A2 A1
A6
A5
A4 A3
A2
A1
A9 A8 A7
A6
A5 A4
A3 A2 A1
A9
A8
A7 A6 A5 A4
A3 A2 A1
A A 11 10 A9 A8 A7 A6
A5 A4 A3 A2 A1
J12J11J10J9 J8 J7 J15 J14J13
J6 J5 J4 J3 J2 J1
J12J11J10J9 J8 J7 J22 J21J20J19J18
J6 J5 J4 J3 J2 J1 J17J16 J15 J14J13
J10 J9 J8 J7
J6 J5 J4 J3 J2 J1
J12 J11J10J9 J8 J7
J6 J5 J4 J3 J2 J1
J12J11 J10 J9 J8 J7
J6 J5 J4 J3 J2 J1 J15 J14J13
J1 J2 J 3
MAGNETIC TAPE CONTROL STATUS LOGIC NO. 1 (2A2)
MAGNETIC TAPE CONTROL DIAGNOSTIC CONTROL (2A5)
MAGNETIC TAPE CONTROL DATA PATH 2 (2A8)
ARMAMENT LOGIC, CONTROL (2A12)
MAGNETIC TAPE CONTROL, COUNTER (2A15)
ARMAMENT/ORDNANCE INPUT LOGIC DATA (2A18)
14 37 37 37 37
7 37
44 44 44
37 44
44 44 37
14
14
14
14
9 3
45 39 41 43
42 40
8 30 30 30 30 5 30 8
8 30 30
A 10
A9
A8 A7 A6 A5 A4 A3 A2 A1
A8 A7 A6
A5 A4
A3 A2 A1
A4
A3
A2
A1
A7 A6
A4 A5
A2 A3 A1
A A 11 10 A9 A8 A7 A6 A5 A4
A3 A2 A1
A4 A3 A2 A1 A8 A7 A6 A5 A4 A3 A2 A1
J12 J11 J10 J9 J8 J7 J22 J21J20 J19 J18
J6 J5 J4 J3 J2 J1 J17 J16 J15 J14 J13
J12 J11 J10 J9 J8 J7 J22 J21J20 J19 J18
J6 J5 J4 J3 J2 J1 J17 J16 J15 J14 J13
J5 J4 J3 J2 J1
J1
J11J10 J9 J8 J7
J6 J5 J4 J3 J2 J1
J12 J11J10 J9 J8 J7
J6 J5 J4 J3 J2 J1
MAGNETIC TAPE CONTROL PARITY LOGIC (2A3)
MAGNETIC TAPE CONTROL STATUS LOGIC (2A6)
OR LOGIC (2A10)
ORDNANCE OUTPUT LOGIC. RELAY DRIVER (2A13)
MAGNETIC TAPE CONTROL. CONTROL REGISTER (2A16)
ORDNANCE OUTPUT LOGIC CONTROL (2A19)
14
36
44 37 9
5 14 14
44
38
38
5 14
30 30
30
9 18
9 9
10
A8
A7
A6
A5
A4 A3 A2 A1
A7
A6 A5 A4
A3
A2
A1
A A A 12 11 10 A9 A8 A7 A6 A5 A4 A3 A2 A1
A9 A8 A7
A6
A5 A4 A3 A2
A1
A7
A6 A5
A4 A3 A2 A1
A 10 A9 A8 A7
A6 A5
A4 A3 A2 A1
J12 J11J10 J9 J8 J7
J6 J5 J4 J3 J2 J1 J15 J14 J13
J12 J11J10 J9 J8 J7
J6 J5 J4 J3 J2 J1 J14 J13
J12 J11J10 J9 J8 J7
J6 J5 J4 J3 J2 J1 J15 J14 J13
J2 J1
J8 J7 J6 J5 J4 J3 J15 J14 J13J12 J11
J2 J1 J10 J9
J7 J6 J5 J4 J3 J2
J1
MAGNETIC TAPE CONTROL FUNCTION REGISTER (2A4)
MAGNETIC TAPE CONTROL PATH 1 (2A7 AND 2A9)
NAVIGATION MULTIPLEXER (2A11)
ARMAMENT OUTPUT LOGIC. RELAY DRIVER (2A14)
POWER MONITOR AND SYSTEM INITIALIZE (2A17)
ARMAMENT OUTPUT LOGIC CONTROL (2A20)
6-6
Figure 6-5. LU 2 Subassembly Module Location Diagram
NAVAIR 01-75PAC-12
Maintenance Control Panel
DESIGNATOR
2A1
NOMENCLATURE
Panel Assembly, Maintenance Control Module Assembly Type 9
FUNCTION
Controls and provides interface between Central Computer and LU 2 6-Stage Ripple Counter; Instruction Decoder; Command Time & Sequence Logic Storage Register; SPCL TST Enbl Logic; Word CTR and All Zeros Detector; MTC Reset and MTC Ext Funct Enbl Logic Command Logic; SPCL TST Enbl Logic; Word CTR and All Zeros Detector; MTC Reset and MTC Ext Funct Enbl Logic 6-Stage Word Counter; SPCL TST Enbl Logic; Word CTR and All Zeros Detector Automatic EF Enable Logic; SPCL TST Enbl Logic; Word CTR and All Zeros Detector; MTC Reset and MTC Ext Funct Enbl Logic Word Counter Clock and Reset Logic; Instruction Decoder; MTC Reset and Ext Funct Enbl Logic MCP Instruction Enable Logic; SPCL TST Enbl Logic Instruction Decoder; Funct Code Interface Logic MCP Data Register 6 Bits 19-22; Input Line AmpIifiers; Computer Output Gates
IN-FLIGHT SPARES
No

None

2A1A1A10
NOMENCLATURE
FUNCTION
MCP Data Register 7 Bits 23-26; Input Line AmpIifiers; Computer Output Gates MCP Data Register 8 Bits 27-29; Input Line AmpIifiers; Computer Output Gates MCP Data Register 4 Bits 12-15 to MTC, 2A14, 2A20, 2A11; Input Line Amplifiers; Computer Output Gates MCP Data Register 5 Bits 16-18; Input Line Amplifiers; Computer Output Gates MCP Data Register 1 Bits 00-03; Input Line AmpIifiers; Computer Output Gates MCP Data Register 2 Bits 04-07; Input Line Amplifiers; Computer Output Gates MCP Data Register 3 Bits 08-11; Input Line Amplifiers; Computer Output Gates Input Amplifiers; Control Gates Input Amplifiers; Control Gates Control Gating Logic
IN-FLIGHT SPARES
Yes

All type 13 identical - 8 in LU 1, 8 in LU 2, 8 in LU 3, 8 in LU 4 (32 total) All type 13 identical - 8 in LU 1, 8 in LU 2, 8 in LU 3, 8 in LU 4 (32 total) All type 13 identical - 8 in LU 1, 8 in LU 2, 8 in LU 3, 8 in LU 4 (32 total)
2A1A1A1
Yes
All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU4 (112 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total)
2A1A1A11
Yes
2A1A1A2
Yes
2A1A2A1
Yes
2A1A1A3
Yes
2A1A2A2
Yes
All type 13 identical - 8 in LU 1, 8 in LU 2, 8 in LU 3, 8 in LU 4 (32 total) All type 13 identical - 8 in LU 1, 8 in LU 2, 8 in LU 3, 8 in LU 4 (32 total) All type 13 identical - 8 in LU 1, 8 in LU 2, 8 in LU 3, 8 in LU 4 (32 total) All type 13 identical - 8 in LU 1, 8 in LU 2, 8 in LU 3, 8 in LU 4 (32 total) All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) All type 4 identical - 9 in LU 1, 6 in LU 2,1 in LU 3, 28 in LU 4 (44 total) All type 12 identical - 3 in LU 1, 4 in LU 2, 3 in LU 3, 4 in LU 4 (14 total) All type 12 identical - 3 in LU 1, 4 in LU 2, 3 in LU 3, 4 in LU 4 (14 total) All type 12 identical - 3 in LU 1, 4 in LU 2, 3 in LU 3, 4 in LU 4 (14 total) All type 12 identical - 3 in LU 1, 4 in LU 2, 3 in LU 3, 4 in LU 4 (14 total)
2A1A1A4
Yes
2A1A2A3
Yes
2A1A1A5
Yes
2A1A2A4
Yes
2A1A2A5 No All type 37 identical - 16 in LU 2, 27 in LU 4 (43 total) 2A1A2A6 No All type 37 identical - 16 in LU 2, 27 in LU 4 (43 total) 2A1A2A7 Yes All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 total) All type 13 identical - 8 in LU 1, 8 in LU 2, 8 in LU 3, 8 in LU 4 (32 total)
2A1A1A6
Yes
2A1A1A7
Yes
Yes
2A1A1A8
2A1A2A8
Yes
2A1A1A9
Yes
2A1A2A9
Mode & Ch Control and Reset Gating Logic Control and Gating Logic
Yes
2A1A2A10 NOTE 1. 2. 3. Yes, in the In-flight Spares column indicates a spare is available in the in-flight maintenance kit. No indicates that no spare is available. LU 4 installed in Aircraft BUNO 158928 and 159503 through 161596. All modules/units listed are replaceable in flight. 2A1A2A11
Yes
Control and Gating Logic
Yes
Figure 6-6. LU 2 Module and Subassembly Function and Interchangeability (Sheet 1 of 10)
6-7
NAVAIR 01-75PAC-12
2A1DS1 thru 2A1DS83 Magnetic Tape Control Status Logic No. 1 2A2
NOMENCLATURE
DS1-30, 61-69, 74 B1 Light Ind DS31-60, 70-73 Switch, Push Mag Tape Control Assembly Status Logic No. 1 Module Assembly Type 14 Module Assembly Type 37 Module Assembly Type 37
FUNCTION
Light, Indicators Switch, Push Mag Tape Control, Status Logic 1
IN-FLIGHT SPARES
Yes

47 Lights 36 Switches

2A3A4
NOMENCLATURE
FUNCTION
Lateral and Longitudinal Parity Check; CH10 CT Enbl 5A; CH10 TIB1, B2, B6; CH10 AZO Lateral and Longitudinal Parity Check; CH10 T100, 16, 17; CH10 CT Enbl 4B, 5A; CH10 T BC; CH10 DI ICB; CH10 Sel IBC; CH10 TB Sel 2
IN-FLIGHT SPARES
No

All type 37 identical - 16 in LU 2, 27 in LU 4 (43 total)
No
None
2A3A5
No
2A2A1
Multiplexer to 2A7/2A8/ 2A9; CH10 SR1-16; CH10 T Rd Stb Status Register; CH10 SR2, 3, 9; CH10 DI19, 22, 24, 26; CH10 GT4 Status Register; CH10 SR7, 11-13; CH10 CR4, 7,10, 17; CH10 DI15, 25; CH10 TI20, 21; CH10 GT12, 19 Status Register; CH10 SR5, 6, 7, 8; CH10 MCB; CH10 DD4; CH10 T Rd Stb; CH10 TI23 Input Amplifier; CH10 SR4; CH10 TB Rdy Ind, SeI 2, IBC; CH10 TI5, 7, 9, 11, 18, 19; CH10 CT Enbl 4B Input Amplifier; CH10 TA Rdy Ind, WL Ind Sel 2; CH10 TI8, 10, 12, 14, 15; CH10 TB Sel 2; CH10 CT Enbl 4A Input Amplifier; CH10 TA SeI 2; CH10 TB Sel 2; CH10 TI00-04; CH10 CT EnbI 4A Mag Tape Control, Parity
Yes
All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 total) All type 37 identical - 16 in LU 2, 27 in LU 4 (43 total) All type 37 identical - 16 in LU 2, 27 in LU 4 (43 total)
2A2A2
No
2A3A6
Search and Loop Compare Logic; CH10 CT Enbl 5B; CH10 BTR B, 2, 4; CH10 TI10, 11, 12, 13, 14; CH10 T BA, B
No
2A2A3
No
2A3A7
Search and Loop Compare Logic; CH10 TI 15,16,17, 18; CH10 T B8, 4, 2, 1 Multiplexer; CH10 T E1-6; CH10 TA SeI 1; CH10 Inst Input; CH10 Comp Output; CH10 LAPE, LOPE; CH10 WRA CIk 1-5 Control Line Driver; CH10 TA BC; CH10 TB BC; CH10 TA Fwd, Rvs; CH10 TB Fwd, Rvs; CH10 TA Rd; CH10 TB Rd Control Line Driver; CH10 TA Rewind, Sel, Adr 1, Adr 2, Write; CH10 TB Rewind, Sel, Adr 2, Write Mag Tape Control Function Register
No
All type 37 identical - 16 in LU 2, 27 in LU 4 (43 total) All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3; 15 in LU 4 (67 total)
2A2A4
No
2A3A8
Yes
2A2A5
Yes
All type 4 identical -9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total)
2A3A9
Yes
2A2A6
Yes
All type 4 identical -9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total)
2A3A10
Yes
2A2A7
All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) No None
All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) None
Magnetic Tape Control Parity
2A3
Mag Tape Control Assembly, Parity Module Assembly Type 9 Module Assembly Type 7
Magnetic Tape Control Function Register
2A4
Mag Tape Control Assembly Function Register Module Assembly Type 3 Module Assembly Type 9
No
2A4A1
2A3A1
Lateral and Longitudinal Parity Check; CH10 T IBC; CH10 DN Clk Lateral and Longitudinal Parity Check; CH10 T BC; CH10 Rd; CH10 Comp Output; CH10 LAPE Lateral and Longitudinal Parity Check; CH10 T BC; CH10 TTMI; CH10 TI B19; CH10 LOPE; CH10 Inst Input
Yes
4 Bit Decoder; CH10 DI01-31 Storage Register; CH10 B 17-21, 24-27; CH10 MTC Clk; CH10 MCC
Yes
All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total)
2A4A2
Yes
2A3A2
No
2A3A3
No
6-8
NAVAIR 01-75PAC-12
2A4A3
NOMENCLATURE
FUNCTION
MTC Status Register and Special Gating; CH10 MCC; CH10 DI25, 32; CH10 GT2, 12,13, 20; CH10 CR4, 17; CH10 TI 00, 01, 04-07; CH10 CC1; CH10 Rd Stb Special Timing Control Logic; CH10 Set SR12; CH10 Dl10A, 14, 16, 32; CH10 DG1; CH10 LAPE; CH10 CR5, 13, 15, 17, 19; CH10 TI 02, 03; CH10 CT Enbl 2 Decoding Logic; CH10 DD1-4; CH10 DI7, 11-20, 22, 24-30, 32 Multiplexer; CH10 CS Bit 1, 2; CH10 DD1-3 DN; CH10 DD4; CH10 DI11-32; CH10 TO A Enbl 1-5 Control Line Driver TO MTT; CH10 TA DD1-3; CH10 TB DD1-3; CH10 DD1-3 DN; CH10 TTM2; CH10 T TST Enbl 1 Line Driver to MTT; CH10 TTM4; CH10 T TST Enbl 2-5; CH10 TA TST Enbl 3-5; CH10 TB TST Enbl 3-5 Mag Tape Control Diagnostic Control
IN-FLIGHT SPARES
No


2A5A6 2A5A7
NOMENCLATURE
FUNCTION
Timing and Control 2 Logic; CH10 TI 08-10, 19 Timing and Control 3 Logic; CH10 MTC Clk; CH10 A MCP 4 Bit Decoder 1; CH10 CTT M1-8; CH10 CT Enbl 7 4 Bit Decoder 2; CH10 TST Enbl 1-5; CH10 CT Enbl 1-6 Status Register 2 and Special Gating; CH10 CT EnbI 2, 4; CH10 TO A Enbl 1-5; CH10 TO C EnbI 1-4; CH10 TO D Enbl 1-4 Status Register 3 and Special Gating; CH10 EF MCP; CH10 CT Enbl 3, 5; CH10 TO Enbl 1-5; CH10 TO B, E Enbl 1-5; CH10 TO C, D Enbl 5 Mag Tape Control Status Logic 2
IN-FLIGHT SPARES
Yes Yes

All type 44 identical - 19 in LU 2, 3 in LU 3, 14 in LU 4 (36 total) All type 44 identical - 19 in LU 2, 3 in LU 3, 14 in LU 4 (36 total) All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 total) All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 total) All type 37 identical - 16 in LU 2, 27 in LU 4 (43 total)
2A5A8 Yes All type 44 identical - 19 in LU 2, 3 in LU 3, 14 in LU 4 (36 total) 2A5A9
Yes
2A4A4
Yes
2A5A10 No None
No
2A4A5
2A4A6
Yes
All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) Magnetic Tape Control Status Logic No. 2
2A5A11
No
2A4A7
Yes
2A6
2A4A8
Yes
Mag Tape Control Assembly Status Logic No. 2 Module Assembly Type 37
No
None
2A6A1
Magnetic Tape Control Diagnostic Control
2A5
Mag Tape Control Assembly Diagnostic Control Module Assembly Type 9 Module Assembly Type 9 Module Assembly Type 37 Module Assembly Type 9 Module Assembly Type 44
No
None
Status Register; CH10 SR 1, 2, 13, 14, 16; CH10 TI 22; CH10 CT EnbI 4A; CH10 D16, 10A, 12, 13, 17; CH10 CR2, 10, 12; CH10 Comp Out, DG1, CC1 SRC Status Register; CH10 DI3, 11,16, 18; CH10 SR 2, 8-13, 15; CH10 CR2, 4, 8, 9, 14; CH10 CC4, SRC A MCP, EFR MTC Timing and Control Logic; CH10 CR4, 6; CH10 DI11, 14, 16; CH10 SR 8-14,16; CH10 GT 3,19; CH10 MCB, lDR MTC Control Logic 1; CH10 CR 1, 2, 4, 5, 7, 8, 12, 14, 15; CH10 DI10A, 16,18, 20; CH10 WRA Clk 1-5; CH10 CC1, 4; CH10 DG1, 2; CH10 Char 1-5
No
2A5A1
Storage Register 2; CH10 B 7-12 Storage Register 1; CH10 FR CLK DN Status Register 1; CH10 B 00-05;CH10 FR CLK DN Storage Register 3; CH10 TI DB 8-10,19 Timing and Control 1 Logic; CH10 A MCP
Yes
All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 37 identical - 16 in LU 2, 27 in LU 4 (43 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 44 identical - 19 in LU 2, 3 in LU 3, 14 in LU 4 (36 total)
2A6A2
Yes
2A5A2
Yes
2A6A3
2A5A3
No
Yes
2A5A4
Yes
2A6A4
Yes
2A5A5
Yes
6-9
NAVAIR 01-75PAC-12
2A6A5
NOMENCLATURE
FUNCTION
Status Register Control Gating Logic; CH10 CR4, 10, 11, 13, 14, 17, 19; CH10 DI 4, 14, 16; CH10 T lB Enbl, B Enbl 1, T lB Enbl DN, TI 29, MA Clear MA CLR Inst Control Logic 2; CH10 CR10,17; CH10 DI10A, 18, 23; CH10 SR1,TP MK Enbl, AZO, CTT M2, B Enbl ON, Inst Input, TI28, GT8, EF MCP Control Logic 3 to 2A2/ 2A3/2A7/2A8/2A9/2A15; CH10 B 24-27; CH10 DI25, 26, 31; CH10 TA Sel 1, 2; CH10 TB SeI 1, 2; CH10 CS Bit 1, 2 Control Logic 4 to 2A3/ 2A7/2A8/2A9; CH10 DI9, CT Enbl 7; CH10 ST Word Enbl 1-3; CH10 B Enbl 1-4 Mag Tape Control, Data Path No. 1 Gating and Word Register; CH10 TA IB8 TA SeI 1; CH10 TB B8, TB IB8, TB SeI 1; CH10 DI10B, ST Word Enbl 1; CH10 SR 4, 10, 16 Gating and Word Register; CH10 TA IB4, TA Sel 1; CH10 TB B4, TB IB4, TB SeI 1; CH10 DI10B, ST Word Enbl 1; CH10 SR 3, 9, 15 Control Logic to MCPL and Central Computer; CH10 BTR B4, 8; CH10 T B Enbl, 4, 8; CH10 TA B4, 8; CH10 TB B4, 8; CH10 TPMK Enbl Data Transfer and Multiplexer; CH10 TO Enbl 4, TO A1-6, TO B1-6, TO C1-6,TO D1-6, TO E1-6
IN-FLIGHT SPARES
No


2A7A5
NOMENCLATURE
FUNCTION
Data Transfer and Multiplexer; CH10 TO Enbl 3, TO A1-6, TO B1-6, TO C1-6,TO D1-6, TO E1-6 Data Line Drivers; CH10 lB 2, 3, 8, 9, 10, 14, 15, 20, 26, 27 Data Line Drivers to MCPL, MTT, Central Computer; CH10 CTT M1, 6, 8; CH10 TA,TB 8B; CH10 IDR, -MTC, -TSTM, -VERM; CH10 Inter, EFR, DR, -MTC, -TSTM, -VERM Mag Tape Control, Data Path No. 2 Gating and Word Register; CH10 T B1, 2; CH10 Char 1-5; CH10 B1, 7, 9, 13, 25; CH10 WRA Clk 1-5; CH10 CCT M1, 3, 4; CH10 SR2, 8, 14; CH10 TA IB2,TA Sel 1,TB Sel 2, DI10B, BTR B2, ST Word Enbl 2 Gating and Word Register; CH10 B0, 6, 12, 18, 24; CH10 TA IB1, TA Sel 1, T B1, TB Sel 1; CH10 CTT M3, 4; CH10 SR 1, 3, 7; CH10 DI10B, BTR B1, WRA CIk 1-5 Control Logic; CH10 BTR B1, 2; CH10 T B EnbI; CH10 TP MK Enbl Data Line Drivers to MCPL, Computer; CH10 IB00, 01, 06, 07, 12, 13, 18, 19, 25 Data Line Drivers to MTT, MCPL, Computer; CH10 TA B 1, 2; CH10 TB B 1, 2; CH10 CTTM1, IB24 Data Transfer and Multiplexer; CH10 T Enbl 5, T A1-6,T B1-6, T C1-6, T D1-6, T E1-6
IN-FLIGHT SPARES
Yes

2A7A6
Yes
2A6A6
Yes
2A7A7
Yes
2A6A7
Yes
All type 44 identical - 19 in LU 2, 3 in LU 3, 14 in LU 4 (36 total) Mag Tape Control Data Path No. 2 2A8 Mag Tape Control Assembly Data Path No.2 Module Assembly Type 38
No
None
2A6A8
Yes
2A8A1
No
Mag Tape Control Data Path No. 1
2A7
Mag Tape Control Assembly Data Path No.1 Module Assembly Type 38
No
2A9
2A7A1
Yes
2A8A2
No
2A7A2
Yes
2A8A3
Yes
All type 44 identical - 19 in LU 2, 3 in LU 3, 14 in LU 4 (36 total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 total)
2A8A4 Yes All type 44 identical - 19 in LU 2, 3 in LU 3, 14 in LU 4 (36 total)
Yes
2A7A3
2A8A5
Yes
2A7A4
Yes
2A8A6
Yes
6-10
NAVAIR 01-75PAC-12
Mag Tape Control Data Path No. 1
DESIGNATOR
2A9
NOMENCLATURE
Mag Tape Control Assembly Data Path No.1 Module Assembly Type 38
FUNCTION
Mag Tape Control, Data Path No. 1 Gating and Word Register; CH10 SR6, 12; CH10 B5, 11, 13, 23, 29, CH10 CTT M1, 5; CH10 WRA Clk 1-5; CH10 WRB Clk, TA Sel 1, TA IB B, TB IB B; CH10 T B B, TB Sel 1, DI10B, BTR B3, Char 1-5, T IB Enbl Gating and Word Register; CH10 B 04, 10, 16, 22; CH10 TA IB A,TB IB B, TA Sel 1,TB SeI 1; CH10 WRA CIk 1-5; CH10 SR5, 11; CH10 Char 1-5, CTT M (1, 5, 6) Control Logic; CH10 BTR B A, B; CH10 T B Enbl, TMAZ1; CH10 T A, B Data Transfer and Multiplexer from 2A3/2A4/ 2A5/2A15; CH10 TO Enbl 2, TO A1-6,TO B1-6,TO C1-6,TO D1-6,TO E1-6 Data Transfer and Multiplexer from 2A3/2A4/ 2A5/2A15; CH10 TO Enbl 1, TO A1-6, TO B1-6, TO C1-6, TO D1-6, TO E1-6 Data Line Drivers to Central Computer; MCPL; CH10 lB 04, 05, 10, 11, 16, 17, 22, 23, 29 Data Line Drivers to MTT, MCPL, Central Computer; CH10 TA B A, B; CH10 TB B A, B; CH10 lB 28, CTT M6; CH10 DR MON, DR TST M, MTC; CH10 EFR MON, TST M, MTC Gating for Chan 8, 9, 10 NAV, MTT, Arm/Ord
IN-FLIGHT SPARES
No

2A7

2A10A1
NOMENCLATURE
FUNCTION
Gated OR Logic Chan 8, 9,10 Data Input Indicator 0-5; CH10 ON-L, IB00-05; CH09 ON-L, IB00-05; CH08 ON-L, IB00-03; Gated OR Logic Chan 8, 9, 10 Data Input Indicator 6-17; CH10 ON-L, lB06-11; CH09 ON-L, lB06-09; CH08 ON-L, IB06-11 Gated OR Logic Chan 8, 9, 10 Data Input Indicator 18-23; CH10 ON-L, IB1217; CH09 ON-L, IB12-14; CH08 ON-L, IB12-17 Gated OR Logic Chan 8, 9, 10 Data Input Indicator 24-29; CH10 ON-L, IB1829; CH08 ON-L, IB18-29 Allows Central Computer to obtain Nav Data from Doppler and INS 1/2 Shift Register; CH08 A; CH08 B 10-l7 Shift Register - Data Enable, Gating Flip-Flop; CH08 A; CH08 B 18-25 Shift/4-bit Storage Register from MCPL; CH08 A, OA MCP; CH08 OB00-03, 26-29 Decoder/Clock Pulse and IA Gates; CH08 IA MCP Data Line Drivers; CH08 lB10-17; CH08 ON-L, VER, FDR Data Transfer Logic
IN-FLIGHT SPARES
Yes

2A9A1
No
All type 38 identical - 6 in LU 2 (6 total) 2A10A2 Module Assembly Type 14
Yes
2A10A3 No All type 38 identical - 6 in LU 2 (6 total) 2A10A4
2A9A2
Yes
Yes
2A9A3
Yes
Navigation Multiplexer
2A11
Multiplexer Assembly, Navigation Module Assembly Type 9 Module Assembly Type 9 Module Assembly Type 9
No
2A9A4
Yes
All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3,15 in LU 4 (67 total)
2A11A1
Yes
All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total)
2A11A2 Yes All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3,15 in LU 4 (67 total)
Yes
2A9A5
2A11A3
Yes
2A9A6
Yes
2A11A4
Yes
2A9A7
Yes
2A11A5
Yes
2A11A6
Yes
2A11A7 No None 2A11A8
Data Line Drivers; CH08 ODR; CH08 IB18-25 Data/Control Line Drivers; CH08 IB00-03, 26-29
Yes
OR Assembly
2A10
OR Assembly
Yes
6-11
NAVAIR 01-75PAC-12
2A11A9
NOMENCLATURE
Module Assembly Type 4 Module Assembly Type 6 Module Assembly Type 5 Module Assembly Type 5 Control Assembly, Arm Ord Input Logic
FUNCTION
Navigation Data/Enter Input Amplifiers Control Flip/Flop-Timing; CH08 ODR MON, lDR MON SEL and IDR Control Nav Chan Line Drivers Nav Chan Line Drivers Clock and ODR Control Arm/Ord Input Logic receives Status Data and transmits to Central Computer Switch Reference Circuits AOIL Test Data Register; CH09 OB00-09; CH09 EF MCP, OA MCP, OA+EF Timing and Control - Interrogate Register; CH09 OB08-11; CH09 EF MCP Arm/Ord Data Multiplexer; CH09 OB00-07 Timing and Control; CH09 OB08-11; CH09 EIE MCP, EF MCP Timing and Control; CH09 OA+EF; CH09 OB00, 08-11 Data Line Drivers; CH09 IB00-09, 12-14 Data Line Drivers/Control Line Drivers and Control; CH09 ON-L, lDR MON, INT MON, INTER, VERM, lDR Timing and Control; CH09 IA MCP Ord Output Logic receives data from MCP and sends data to Relay Boxes
IN-FLIGHT SPARES
Yes

All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) All type 6 identical - 2 in LU 1, 4 in LU 2 (6 total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) None

2A13A1
NOMENCLATURE
FUNCTION
Status/Launch Relay Drivers, Upper and Lower to Arm/Ord Test Panel; CH09 OB00-09; LCHR SEL01-05L Status/Launch Relay Drivers, Upper and Lower to Arm/Ord Test Panel; LCHR SEL06-13 L, UP Status/Launch Relay Drivers, Upper and Lower to Arm/Ord Test Panel; LCHR SEL01-13 L, UP Launch Comparator - to AOC; LCHR SEL01-03 L, UP Status Comparator; SONO DPTH SEL L, UP; SONO LIFE SEL L, UP; LCHR DO CH01-03 L, UP 4 Bit Decoder; LCHR SEL01-04,16-19; LCHR SEL08-13 L, UP 4 Bit Decoder; LCHR SEL01-04, 16-19; LCHR SEL01-06 L, UP Armament Output Logic
IN-FLIGHT SPARES
Yes

2A11A10
Yes
2A13A2
2A11A11
Yes
Yes
2A11A12
Yes
2A13A3
Yes
All type 8 identical - 3 in LU 1, 9 in LU 2, 1 in LU 3, (13 total)
Armament Ordnance Input Logic Control
2A12
No
2A13A4
No
2A12A1 2A12A2
Module Assembly Type 8 Module Assembly Type 9 Module Assembly Type 9 Module Assembly Type 10 Module Assembly Type 16 Module Assembly Type 3 Module Assembly Type 5 Module Assembly Type 5
Yes Yes
All type 8 identical - 3 in LU 1, 9 in LU 2, 1 in LU 3 (13 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 10 identical - 6 in LU 1, 4 in LU 2, 2 in LU 3, 8 in LU 4 (20 total) All type 16 identical - 2 in LU 1, 2 in LU 2, 12 in LU 3, 5 in LU 4 (21 total) All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total)
2A13A5
No
2A13A6
Module Assembly Type 3 Module Assembly Type 3 Relay Driver Assembly, Armament Ouput Logic Module Assembly Type 3 Module Assembly Type 8
Yes
2A12A3
Yes
All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 total) All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 total) None
2A13A7
Yes
2A12A4
Yes
2A12A5
Yes
Armament Output Logic Relay Driver
2A14
No
2A14A1
2A12A6
Yes
5 Bit Decoder; STA SEL & RLS B00-04, B15-17; STA SEL & RLS 09-15 UP Launch Relay Drivers (Lower); STA SEL & RLS01-18 STA & RLS0118L; STA SEL & REL0108 UP, 16-18 UP Launch Comparator; STA SEL & REL1-18L, UP Launch Relay Drivers (Upper); STA SEL & RLS 01-18 UP 5 Bit Decoder; STA SEL & RLS B00-02, B15-19 Status Relay Drivers (Upper);TRP PRS STA 1-8; TRP PRS STA 1-8L
Yes
2A14A2
Yes
2A12A7
Yes
2A12A8
Yes
2A14A3 2A14A4
No Yes
All type 7 identical - 7 in LU 2, 3 in LU 3, 8 in LU 4 (18 total) All type 8 identical - 3 in LU 1, 9 in LU 2, 1 in LU 3 (13 total) All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 total) All type 8 identical - 3 in LU 1, 9 in LU 2, 1 in LU 3 (13 total)
2A12A9 Ordnance Output Logic Relay Driver 2A13
Module Assembly Type 6 Ord Output Logic Assembly Relay Driver
Yes No
All type 6 identical - 2 in LU 1, 4 in LU 2 (6 total) None
Armament Ordnance Logic
2A14A5
Yes
2A14A6
Yes
6-12
NAVAIR 01-75PAC-12
2A14A7 2A14A8
NOMENCLATURE
FUNCTION
Diagnostic Data Logic; TRP PRS STA 1-8L, UP Status Relay Drivers (Lower); TRP PRS STA 1-8 UP 3 Bit Decoder; CH9 AA; TRP PRS STA B00-02, B15-17; TRP PRS STA 1-8 L, UP Mag Tape Control Counter
IN-FLIGHT SPARES
No Yes

All type 7 identical - 7 in LU 2, 3 in LU 3, 8 in LU 4 (18 total) All type 8 identical - 3 in LU 1, 9 in LU 2, 1 in LU 3 (13 total) All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 total) None

2A15A8
NOMENCLATURE
FUNCTION
Multiplexer; CH10 TO CENBL 1-5; CH10 TO C1-5; CH10 CR8-10, 1214, 16, 18; CH10 TA, TB W STB DN; CH10 TA,TB W RES DN; CH10 TA,TB MA CLRDN; CH10 EOT1, EOT2, GT2, DG2, T RD STB, EFR MTC, ODR MTC, IDR MTC Density Generator
IN-FLIGHT SPARES
Yes

2A14A9
Yes
Magnetic Tape Control
2A15
Mag Tape Control Assembly, Counter Module Assembly Type 9
No
2A15A9
Module Assembly Type 9 Magnetic Tape Control Assembly Control Register Module Assembly Type 5
Yes
2A15A1
Density Generator and End of Tape Counter; CH10 MTC CLK, D126, EOT1 Character Reset Counter and End of Tape Counter; CH10 CR4, 8, 10, 12-14, 16; CH10 DI 14, 20, 26, 27, 32; CH10 GT2, DG2, CT Enbl 3B,TI13, FWD 1, EOT2; CH10 DD1-3 Character and End of Tape Counter; CH10 MCC Character Counter Timing, Control and Decoding Logic; CH10 TI14-16; CH10 DG1,TP MK Enbl, DI 10B; CH10 CC1-4; CH10 REV1, FWD1 Character Counter Timing Control and Density Generator; CH10 CR13, DD2, MCB Character Counter Logic and Density Generator; CH10 Char 1-5; CH10; DG2, CR9, B Enbl DN Multiplexer; CH10 TO B Enbl 1-5; CH10 TO B1-5; CH10 GT1, 3-21; CH10 CR1-3, 5-7, 11, 15; CH10 EOF, SR15
Yes
All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 44 identical - 19 in LU 2, 3 in LU 3,14 in LU 4 (36 total)
Magnetic Tape Control Control Register
2A16
Mag Tape Control Control Register
No
2A15A2
Yes
2A16A1
2A15A3
Yes
Control Line Drivers to 2A15 and MTT; CH10 TA, TB W RES DN; CH10 TA, TB MA CLR, DN; CH10 TA TB W STB DN; CH10 TI 24, 25; CH10 DI11, 25; CH10 DG2, MCB, OA MCP, IA MCP, CT Enbl 3A Control Register; CH10 CR1-3, 5-17; CH10 DI4, 5, 10A, 12, 17, 18, 25, 32; CH10 GT2, 4, 19; CH10 CC1, 4; CH10 DG1, 2; CH10 MCA, MCB, MCC, MTC, CIk, ODR MTC, T RD STB Control Logic, CH10 CC2-4; CH10 MTC Clk, MCC; CC, CIk, IDR MTC; CH10 CR1, 3, 8-14, 16, 18; CH10 GT2-4, 12-16, 19; CH10 DI10A, 11, 20 25-29, 32 Control Logic Line Driver and Register; CH10 CC1, 4; CH10 SR1, 3, 14; CH10 T10,1, 3, 4, 12, 24; CH10 CR1, 3, 6-18; CH10 DI1, 3, 4, 7, 9, 10A, 11, 16-18, 20; CH10 GT2, 14,15,19; CH10 CT EnbI 3A
Yes
2A16A2
2A15A4
Yes
No
None
2A15A5
Yes
2A16A3
No
None
2A15A6
Yes
All type 44 identical - 19 in LU 2, 3 in LU 3,14 in LU 4 (36 total) 2A16A4 Module Assembly Type 43
No
None
2A15A7
Yes
6-13
NAVAIR 01-75PAC-12
2A16A5
NOMENCLATURE
FUNCTION
Control Register; CH10 IR F/F1-4; CH10 T10-2, 29; CH10 F1, 3; CH10 CT Enbl 6, 3A; CH10 CR3, 5, 7-13,16,18; CH10 GT2, 3, 7, 9-11,13, 15,17, 18; CH10 DI2, 12,13,16,17, 25-27, 29, 30 Tape Mark Decoder Control Logic; CH10 TI B1, 2, 4, A, B; CH10 TI07-11, 28; CH10 CT Enbl 3A, 5B; CH10 GT2, 4, 19; CH10 CR3, 8-10,14,16; CH10 DI26, 27, 32; CH10 EOF, MCC Gap Timer Decoder Logic; CH10 MCC, MTC Clk, CH10 DI2, 9, 12, 21, 25, 26, 28; CH10 CR10-16, 18; CH10 GT4, 6, 7, 9-21; CH10 OB24-27 Gap Timer 4 Bit Decoder and Logic; F4-11; CH10 DI3, MTC Clk Gap Timer 4 Bit Decoder and Logic; F0-3; CH10 GT1-3, 5; CH10 CR16, 17 Gap Timer 12 Stage Counter and F-12 Register; CH10 CR4, GT1 Gap Timer 12 Stage Counter; F0, 1; CH10 GT8 Power Monitor and System Initialize
IN-FLIGHT SPARES
No

None

2A17A4
NOMENCLATURE
FUNCTION
Power Monitor - Digital Delay, Status F/F, Det; CH08 EIE Pwr MON; Subunit S1 Enbl; 100 Hz; 62.5 kHz MCPL Digital Delay; Subunit S1 Enbl; 250 kHz NM, MTC, AOL, OOL, AOlL Digital Delay; Subunit S1 Enbl; 400 Hz DTL Gate and Driver; Ground; OOL S1; MTC S1; NM S1 Arm/Ord Input - Provides interface between Central Computer and Arm/Ord Status Switch Input Integrators Status Registers; CH09 OB00-03, A0; Kill Str PL MON 01-04, 10-12; DCOD 011, 100 Switch Input Integrators Status Register; DCOD 011,100 Switch Input Integrators Status Registers; CH09 OB04-07 A0; Kill Str PL MON 05-8,13-16; DCOD 011, 100 Switch Input Integrators Status Registers; DCOD 011, 100 Switch Input Integrators Status Registers; CH09 OB08, 09; Kill Str PL MON 17, 18 AOIL Data Multiplexer; DCOD 001, 011, 100, 101, 110, 111, AOIL OB00-07 Status Update Detector; DCOD 011,100, 101, 110
IN-FLIGHT SPARES
Yes

2A17A5 No None 2A17A6
2A16A6
Module Assembly Type 30 Module Assembly Type 30 Module Assembly Type 8 Arm, Ord Input Logic Assembly, Data
Yes
All type 30 identical - 13 in LU 1, 12 in LU 2, 3 in LU 3, 2 in LU 4 (30 total) All type 30 identical - 13 in LU 1, 12 in LU 2, 3 in LU 3, 2 in LU 4 (30 total) All type 8 identical - 3 in LU 1, 9 in LU 2, 1 in LU 3 (13 total) None
Yes
2A17A7
Yes
2A16A7
No
None
Armament/ Ordnance Input Logic Data
2A18
No
2A18A1 Yes All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 total) All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) None 2A18A5 2A18A2
2A16A8
Module Assembly Type 3 Module Assembly Type 3 Module Assembly Type 9 Module Assembly Type 9 Power Monitor and System Intialize Assembly Module Assembly Type 18
Yes
2A16A9
Yes
Yes
2A16A10
Yes
2A18A3
Yes
2A16A11
Yes
2A18A4
Power Monitor and System Initialize
2A17
No
Yes
Yes
2A17A1
1.92 and 2.0 MHz Oscillators, 1.0 MHz, 250 kHz, 960 kHz Drivers; 5,100, 400 Hz; 1, 2 MHz; 250, 960 kHz 1-Stage Counter, 3-Stage Counter A and B; 400 Hz Line Driver Int Control Logic; CH08 IB06-09; CH08 IA Pwr MON, EIE Pwr MON; CH08 Inter, IH Dlyd; 100 Hz
Yes
2A18A6
Yes
2A17A2
Yes
2A18A7
Yes
2A17A3
Yes
6-14
NAVAIR 01-75PAC-12
2A18A8
NOMENCLATURE
FUNCTION
Switch Input Integrators Status Registers; DCOD 101, 110; Spl Wpn Sel MON 2A, 4A, CH09 OB00, 01, A0 Switch Input Integrators Status Registers; CH09 OB02, 03, A0; Spl Wpn Sel MON 8A; DCOD 101, 110 Switch Input Integrators Status Registers; DCOD 101,110; CH09 OB04, 06 Press Door MON 3 Switch Input Integrators Status Registers; CH09 OB07, 08; Press Door MON 4, 5; 001, 011, 100, 101,110 COINC Ord Output Logic Receive commands from Central Computer to provide control to Ord System Word Comparator; CH09 OB00-29 Category Decoder Inverter; CH09 OB05-11, 19-21 Category Decoder Inverter, CH09 IA MCP; DCOD 111; CH09 OB0006, 15-18, 23-26 6 Bit Status Register, Upper and Lower; LCHR DO Cmd 1-3L; Sono Dpth SeI L; Sono Life Sel L; LCHR SeI 4, 6-13 L, UP 10 Bit Launch Register, Upper and Lower; LCHR Sel 1-4,17-19; LCHR DO Cmd 1-3 L, UP 4 Bit Decoder; Sus Rls Shal L, UP; Sus RIs Dp L, UP; DCOD 111; CH09 OB22 IA MCP
IN-FLIGHT SPARES
Yes


2A19A7
NOMENCLATURE
FUNCTION
Pro Diagnostic Data Logic to 2A12 LCHR DO Cmd 1-3 L, UP; LCHR Sel 1-4, 16-19; OOL Tst OB00-07; AOL, AOlL, IDR Tst O 6 Bit Status Register, Upper and Lower Control Signal Gating and Timing Control; Sus LNCH Tst A, B Enbl; Lch Stat Tst A, B Enbl; ORD Tst A, B Enbl; AOL, AOIL, IDR Tst ; CH09 EFR, ON-L, VER M EFT MON, EFR MCP
IN-FLIGHT SPARES
Yes

2A19A8 2A18A9 Module Assembly Type 30 Yes All type 30 identical - 13 in LU 1, 12 in LU 2, 3 in LU 3, 2 in LU 4 (30 total)
Yes
2A19A9
Yes
2A18A10
Yes
All type 30 identical - 13 in LU 1, 12 in LU 2, 3 in LU 3, 2 in LU 4 (30 total) All type 30 identical - 13 in LU 1, 12 in LU 2, 3 in LU 3, 2 in LU 4 (30 total) Armament Output Logic Control
2A18A11
Yes
2A19A10 2A20
Module Assembly Type 6 Control Assembly, Arm, Output Logic Module Assembly Type 5
Timing Control; OOL Tst M Arm Output Logic
Yes No
Ordnance Output Logic Control
2A19
Control Assembly, Ord Output Logic
No
None
2A20A1
Timing and Control Logic; CH09 VER M, ODR, ODR MON; OA MCP; AOL Tst Timing and Control Register 5 Bit Launch Register, Lower - Upper; CH09 OB00-04, 15-19 15 Bit Status Register, Lower - Upper; CH09 OB00, 01, 03, 04,15-19 Category Decoder; CH09 OB00, 01, 03, 04, 12-19, 27-29, OA A Word Comparator; CH09 OB00-29 Diagnostic Data Logic; Trp Prs Sta B00, 01, 03, 15-17; Sta SeI & Rls B00-04,1519; Rkt Sngl Sel L; Rkt Rip Sel L; AOL Tst DB00-07 15 Bit Status Register, Lower - Upper; Trp Prs Sta B00-02, 15-17
Yes
All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 total) All type 7 identical - 7 in LU 2, 3 in LU 3, 8 in LU 4 (18 total) All type 10 identical - 6 in LU 1, 4 in LU 2, 2 in LU 3, 8 in LU 4 (20 total)
2A19A1 2A19A2
No Yes
All type 7 identical - 7 in LU 2, 3 in LU 3, 8 in LU 4 (18 total) All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 total) All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total)
2A20A2
Yes
2A20A3
Yes
2A19A3
Yes
2A20A4
Yes
2A19A4
Yes
2A20A5
Yes
2A20A6 Yes All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) 2A20A8 2A20A7
No Yes
2A19A5
2A19A6
Yes
Yes
All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 In LU 4 (112 total)
6-15
NAVAIR 01-75PAC-12
2A20A9
NOMENCLATURE
FUNCTION
15 Bit Status Register, Lower - Upper; CH09 A A; OOL Tst M; Rkt Sngl Sel L, UP; Rkt Rip Sel L, UP Timing and Control Logic; CH09 A A Provides dc for MCP and all internal Logics in Logic Units Regulates +5 vdc Regulates +5 vdc Protection for Regulators (one for each) Regulates +5 vdc 14.5 vac 3, 400 Hz In, +17 vdc Out Protects PS from over and under-voltage and Overload 3 Rectifier and Filter Regulate +15 vdc and +6 vdc Protection for 2PS1A7 Regulate -15 vdc and -10 vdc Protection for 3PS1A8 Power Supply Lamp System lnitialize Volt PM SI ac for MCP, dc for PS1 Provides 12 vdc Unreg for LU 2 used for Lamps and Relay Drivers
IN-FLIGHT SPARES
Yes

2A20A10 LU 2 Power Supply 2PS1
Module Assembly Type 6 Power Supply Assembly Logic Unit Regulator Assembly 5 vdc Regulator Assembly 5 vdc Fuse, Cartridge, 8 Amp
Yes Yes
All type 6 identical - 2 in LU 1, 4 in LU 2 (6 total) 1PS1, 3PS1
2PS1A1 2PS1A2 2PS1A1F1 A2F1 A3F1 2PS1A3 2PS1A4 2PS1A5 2PS1A6 2PS1A7 2PS1A7F1 (276004) 2PS1A8 2PS1A8F1 2PS1DS1 Internal Power Source +12 vdc Unregulated Power Supply 2PS2
No No No
2PS1A1, 2PS1A2, 2PS1A3 Same in 1PS1 and 3PS1 2PS1A1, 2PS1A2, 2PS1A3 Same in 1PS1 and 3PS1 One each in 2PS1A1, 2PS1A2, 2PS1A3, Same in 1PS1 and 3PS1 2PS1A1, 2PS1A2, 2PS1A3 Same in 1PS1 and 3PS1 Same in 1PS1 end 3PS1 Same in 1PS1 and 3PS1 Same in 1PS1 and 3PS1 Same in 1PS1 and 3PS1 Same in 1PS1 and 3PS1 Same in 1PS1 and 3PS1 Same in 1PS1 and 3PS1 Same in 1PS1 and 3PS1 Same in 1PS2 and 3PS2
Regulator Assembly 5 vdc Rectifier and Filter Assembly Protection Module Assembly Control Assembly, Regulator, 5 vdc Regulator Assembly, 15 vdc and 6 vdc Fuse, Cartridge Regulator Assembly -15 vdc and -10 vdc Fuse, Cartridge Lamp Incandescent CM8-815AS15 Internal Power Source Assembly 12 vdc Unregulated Assembly
No No No No No No No No No No
2PS3
No
Same in 1PS3 and 3PS3
6-16
SECTION 7
LOGIC UNIT 3
NAVAIR 01-75PAC-12
(RACK D3) J-3346A/AQA-7(V) DIGITAL INTERFACE UNIT (DIU) (SEE NAVAIR 01-75PAC- -4) -12CP-1525/USQ-78(V) 6 DISPLAY COMPUTER UNIT (DCU) (SEE NAVAIR 01-75PAC- -8) -12(RACK D2) CP-901(V)( )/ASQ-114(V) DIGITAL DATA COMPUTER (CENTRAL COMPUTER) (SEE SECTION 4)
J6 6 22J5 CH04 OUTPUT CONTROL AND DATA J5 6 22J4 CH04 INPUT CONTROL AND DATA
(RACK D1) 3J4 MX-8034/AYA- DATA ANALYSIS LOGIC UNIT (LU 3) -8 MAINTENANCE CONTROL PANEL/MAINTENANCE CONTROL PANEL LOGIC/POWER MONITOR AND SYSTEM INITIALIZE (MCP/MCPL/PM & SI) (3A1) 4
(PILOT INSTRUMENT PANEL) IP-886A/ASA-66 TACTICAL DATA DISPLAY (SEE NAVAIR 01-75PAC- -1) -121J5 VERT INPUT 3J24 J/P234 HORIZ INPUT 3J25 3J26 PDL DIAGNOSTICS, OA SYNC, CLOCKS J/P240 VIDEO INPUT CH06 ODR J/P238 UNBLANKING INPUT 1J7
1 2 3 4 5 6
PILOT DISPLAY LOGIC (PDL) (3A2, 3A3, 3A4, 3A5, 3A6)
3J23
(FS 288) J/P236
1J4
A1J67 CH07 IB 26-29 A1J83 CH04 OUTPUT CONTROL, GROUP 1 OUTPUT DATA A1J87 CH05, 06 AND 07 OUTPUT CONTROL A1J79 CH07 INPUT CONTROL AND DATA 3J3 CH07 ODR 3J2 3J1
CH05, 06 AND 07 OA, EF CH07 IA, EI, EIE
CH06 OA, DATA
1J3
(SENSOR STATION 3) 3J10 MODE SEL, OFF LINE ANALOG SWITCH SENSOR STATION STATION 3 MULTIPURPOSE DISPLAY LOGIC (SS3 MPDL) (3A10, 3A11, 3A12) CH05 ODR SS3 MPDL DIAGNOSTICS, CLOCKS, ANALOG ENABLES, CONTROLS 3J20 VECTOR UNBLANK 3J20 CH07 IB 00-25; CH05, CH06, AND CH07 OB 14-29 CH05, CH06, CH07 EFR CH07 IDR CH07 IB 00-25 TACCO MULTIPURPOSE DISPLAY LOGIC (TACCO MPDL) (3A16, 3A17, 3A18) TACCO DIAGNOSTICS, CLOCK, ANALOG ENABLES, CONTROLS MASTER TIMING LOGIC (MTL) (3A7, 3A8, 3A9) VECTOR SWEEP ENABLE NOTE 1 2 3 4 5 6 AIRCRAFT BUNO 156507 THROUGH 159329 NOT INCORPORATING AFC 450 AIRCRAFT BUNO 158928 AND 159503 THROUGH 159886, 159888, 159889 THROUGH 161131 AIRCRAFT BUNO 159887 INCORPORATING AFC 450 AND 161132 AND SUBSEQUENT AIRCRAFT BUNO 156507, 158928, 159503 THROUGH 159886, AND 159888, 159890 THROUGH 161409 AND 161411 THROUGH 161596 AND NOT INCORPORATING AFC 450 AIRCRAFT BUNO 156508 THROUGH 158927, 158929 THROUGH 159329 INCORPORATING AFC 450 AIRCRAFT INCORPORATING AFC 450 (RACK D1) 2J4 (FS 440) 3FL1J1 TB452 FL1 POWER SUPPLIES (3PS1, 3PS2, 3PS3) FUNCTION GENERATOR LOGIC (FGL) (3A13, 3A14, 3A15) DIAGNOSTICS, CLOCK 3J16 OVERTEMP 115 VAC 3 CONTROL 1J1 2J8 A291 1 A511 FGL RESET; INPUTS REGISTER BITS 05-14, 20-29 3 A383 2 A521 5 5J26 OVERFLOW INDICATOR 3J8 SELECTION AND POSITION COMMANDS 3J9 VECTOR/ANALOG DATA 5J19 5J7 5J6 5J5 IP-918/ASA-70 SENSOR DATA DISPLAY (SDD) (SEE NAVAIR 01-75PAC- -2) -12-
(TACCO STATION) IP-917/ASA-70 MULTIPURPOSE DATA DISPLAY (MDD) (SEE SECTION 3) 1J6 SELECTION AND POSITION COMMAND 1J7 VECTOR/ANALOG DATA 1J5 MODE SEL, OFF LINE ANALOG SWITCH OVERFLOW INDICATOR 1J26 VECTOR SWEEP ENABLE 1J19 VECTOR UNBLANK 1J29 FGL Y DEFLECTION 1J30 FGL X DEFLECTION 1J18 FGL VIDEO 1J23 FGL UNBLANK 3J19 3J18 3J17 3J15 3J14 3J13 3J7 3J6 3J5
POWER DISTRIBUTION BOX (SEE NAVAIR 01-75PAC- -2) -12(RACK D1) A324 TACCO POWER CONTROL (SEE NAVAIR 01-75PAC- -2) -12-
FROM CENTRAL COMPUTER DATA * CONTROLS OB 00-29 EIE, OA, EF, IA
TO CENTRAL COMPUTER IB 00-29 EI, ODR, EFR, IDR
* CONTROLS CONSIST OF ONE OR MORE OF THE LISTED TERMS
Figure 7-1. LU 3 Signal Flow Diagram
7-1
NAVAIR 01-75PAC-12
(RACK D1) LU 2 J1/P5 (RACK D1) DPS ELECTRONIC CIRCUIT BREAKER PANEL LOGIC UNIT NO. 3 A B C PWR DISTR BOX DC (TACCO STATION) TACCO POWER CONTROL LOGIC UNITS 3 28 VDC N 2K10 115 VAC A 115 VAC B 115 VAC C (RACK D1) POWER DISTRIBUTION BOX MAIN POWER 2J4 M A B (FS 440) TB452 3FL1J1 C17 C18 C19 A B C D AC FILTER (FL1) 1 2 3 4 115 VAC A 115 VAC B 115 VAC C NEUTRAL CB1 B1 FAN OFF
DS1
D ELAPSED TIME M1 1 2 3 4 5 6 7 8 9 10 14 15 1J1 C CONTROL (FS 440) TB452 D6 D7 OVERTEMP OVERTEMP RET T ZA 1J16 A B J8/P6 H L CHAS DC A M J3 2J8 M CHAS 3PS2 +12 VDC J2 R6 +6 VDC R7 -12 VDC J4 R9 - VDC -6 J5 R10 GND J6 FAST +5 VDC J1 R4 R E D B J GND C - VDC -6 F P -12 VDC -12 VDC K +6 VDC J8/P6 N +12 VDC 16 14.5 VAC A 14.5 VAC B 14.5 VAC C 26.8 VAC A 26.8 VAC B 26.8 VAC C 26.8 VAC A 26.8 VAC B 26.8 VAC C CHAS TRANSFORMER T1 11 12 13 DC 11 VAC A 11 VAC C 11 VAC B A B C P
+12 VDC UNREG
M H N R +12 VDC UNREG RET B
2J9 P ZI ZX
3PS1 POWER SUPPLY P10/J40 12 11 A1 A2 A3 7 8 9 1 2 3 J7 J4 J5 +5 VDC REG J2 R2 +6 VDC REG R4 +15 VDC REG R3 -10 VDC REG R6 -15 VDC REG P10/J10 A4 J6 R5 13 -15 VDC G 12 -10 VDC F 17 +15 VDC E J30/P11 A5 A6 A7 16 +6 VDC D +5 VDC C +12 VDC UNREG
DC
OFF
A6
16 19 A7 9 8 A5
FAST +5 VDC F5IV 20 VAC 20 VAC RET
7-2
NAVAIR 01-75PAC-12
(RACK D1) A LU 3 (CONT) +12 VDC UNREG R1 +12 VDC UNREG +9 VDC B +12 VDC UNREG RET S4 TACO Z1 +5 VDC Z3 +15 VDC Z2 C +5 VDC +6 VDC D +6 VDC -10 VDC E +15 VDC Z4 -10 VDC (TACCO) +15 VDC (TACCO) +6 VDC (TACCO) +15 VDC (TACCO) TACCO MPDL SUBUNIT XA16 47 70 68 78 74 2 F -10 VDC XA17 G -15 VDC 6 1 3A17 TYPE TIMING MPDL ASSY +5 VDC +6 VDC 20 VAC 20 VAC RET XA18 2 3A18 DATA INPUT MPDL ASSY XA8 1 2 125 5 6 3A8 DIAGNOSTIC TIMING MASTER TIMING LOGIC ASSY XA7 +5 VDC +6 VDC 4 2 3A7 TYPE TIMING MPDL ASSY 3A16 TACCO TIMING MPDL ASSY +5 VDC (TACCO) VR3 +9 VDC +6 VDC +15 VDC -10 VDC 3A20 POWER CONTROL COMPONENT BOARD ASSY 20 19 12 VR3 +9 VDC 16 17 15 POWER CONTROL COMPONENT BOARD ASSY PROVIDES POWER (+5 VDC) TO THE OVERFLOW INDICATOR ON THE TACCO MDD. +5 VDC OVERFLOW INDICATOR - VDC -5 OVERFLOW INDICATOR MTL SUBUNIT SHT 3 +9 VDC +5 VDC
XA9 105 106 81 82 113 114 101 102 109 110
3A9
SYNC TIMING MASTER TIMING LOGIC ASSY
+12 VDC UNREG
S1 SS3 Z5 +9 VDC +5 VDC (SS3) Z7 VR2 +9 VDC
+5 VDC
3A20 POWER CONTROL COMPONENT 23 21 BOARD ASSY 14 POWER CONTROL 22 COMPONENT BOARD ASSY PROVIDES POWER (+5 VDC) TO 25 THE OVERFLOW INDICATOR ON THE TACCO SDD.
+5 VDC OVERFLOW INDICATOR - VDC -5 OVERFLOW INDICATOR
SHT 3
SS3 MPDL SUBUNIT +15 VDC Z6 +6 VDC Z8 -10 VDC -10 VDC (SS3) +6 VDC (SS3) +15 VDC (SS3) +15 VDC (SS3) XA10 47 70 68 78 74 2 3A10 SS3 TIMING MPDL ASSY
XA11 6 1
3A11 TYPE TIMING MPDL ASSY
XA12 2
3A12 DATA INPUT MPDL ASSY
7-3
NAVAIR 01-75PAC-12
(RACK D1) LU 3 (CONT) FG SUBUNIT 3A13 X AXIS FUNCTION GENERATOR ASSY XA13 S2 PDL Z10 +6 VDC Z11 +15 VDC Z9 +5 VDC Z12 +12 VDC UNREG -15 VDC +12 VDC UNREG RET -10 VDC S3 FGL Z15 +15 VDC Z16 +9 VDC (FGL) Z17 +12 VDC UNREG Z13 +5 VDC Z14 +6 VDC +6 VDC (FGL) 4 +5 VDC (PDL) +5 VDC (FGL) +5 VDC (FGL) -15 VDC 5 3 VR5 +12 VDC UNREG (FGL) 18 K2 FGL RELAY 2 +6 VDC (PDL) +15 VDC (PDL) +5 VDC (PDL) -10 VDC +9 VDC +5 VDC (TACCO) +15 VDC (TACCO) DC R3 R4 1 +5 VDC (PDL) -15 VDC 10 -10 VDC +12 VDC UNREG +5 VDC (PDL) +15 VDC (PDL) VR4 -15 VDC 3A20 POWER CONTROL 24 COMPONENT BOARD ASSY 11 9 6 26 8 K1 PDL RELAY +6 VDC (PDL) +15 VDC (PDL) +6 VDC (PDL) +6 VDC (PDL) +15 VDC (PDL) +5 VDC (PDL) -15 VDC MTL SUBUNIT XA2 43 44 25 26 3 4 57 58 101 102 7 XA3 21 22 43 44 25 26 3 4 57 58 93 94 XA6 21 22 43 44 25 3A1 P1/J157 MAINTENANCE CONTROL PANEL 82 84 P2/J158 -12 VDC UNREG RET -12 VDC UNREG 65 66 63 64 P1/J159 -10 VDC +5 VDC +6 VDC +5 VDC (TACCO) +5 VDC (PDL) FAST +5 VDC F5IV +5 VDC (SS3) +5 VDC (FGL) A 82 77 84 83 74 73 79 80 81 78 - VDC -5 OVERFLOW INDICATOR +5 VDC OVERFLOW INDICATOR +5 VDC OVERFLOW INDICATOR - VDC -5 OVERFLOW INDICATOR 3J7 6 7 3J10 7 6 TO SDD (SEE SECTION 3) TO MDD (SEE SECTION 3) -10 VDC +5 VDC (FGL) +6 VDC (FGL) +15 VDC (FGL) 3A6 -15 VDC 3A3 ANALOG X AXIS PILOT DISPLAY ASSY +6 VDC (FGL) +15 VDC (FGL) 3A2 ANALOG Y AXIS PILOT DISPLAY ASSY -10 VDC +9 VDC (FGL) +5 VDC (FGL) 77 78 105 106 127 128 23 24 19 20 15 16 57 58
XA14 57 58 77 78 105 106 23 24 19 20 15 16
3A14 Y AXIS FUNCTION GENERATOR ASSY
PILOT TIMING AND CONTROL INTERFACE LOGIC +5 VDC (FGL)
XA15 5
3A15
CONIC TUNING FUNCTION GENERATOR
XA5 2 1
3A5 CHARACTER GENERATOR DISPLAY INTERFACE LOGIC
-10 VDC +5 VDC
SHT 2
XA4
3A4 PILOT DATA CONTROL DISPLAY INTERFACE LOGIC 2
SHT 2
7-4
NAVAIR 01-75PAC-12
A
2 L1 1
R1 CR5
J156
PS3
J157
J158
J159
CR6
CR3 CR4
C1
3A1A2
3A1A1
CR2 CR7 CR1
30
30
30
12
12
12
13
14
32
32
13
13
13
13
14
13
13
13
CR8
J1
3PS3 INTERNAL POWER SOURCE (TYPICAL) DETAIL
A
POWER
A11 A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A12 A11 A10 A9
A8
A7
A6
A5
A4
A3
A2
A1

B
INPUT FILTER
LOGIC UNIT 3 (REAR VIEW) CIRCUIT BREAKER

3A1
3PS2
P/O MX- 8023/AYA- 8 P/O MX- 8023/AYA- 8 PT 764256151
MFG 99971
INTERNAL POWER SOURCE
T1 TRANSFORMER
- 12 VDC GRD +12 VDC
3A1A2
3A1A1
3A2 3A3 3A4 3A5 3A6 3A7 3A8 3A9 3A10/3A16 3A11/3A17 3A12/3A18
INHIBIT J7
ELAPSED TIME
TYPICAL STICK TYPE MODULE CONNECTOR PIN ARRAY
MAIN POWER
POWER CONTROL (ACCESS PANEL AND WIRES REMOVED) DETAIL
J6
DETAIL
TACO 3A16 3A17 3A18
POWER CONTROL PDL FGL 3A2 3A13 THRU 3A14 3A6 3A15
SS3 3A10 3A11 3A12
- 6 VDC J5
J4
+6 VDC J3
J2
J1
3A13 3A14 3A15 3A10/3A16 3A11/3A17 3A12/3A18 EXTENDER 3PS1
NOTE
1 POWER SUPPLY 3PS1 IS IDENTICAL TO POWER SUPPLY 1PS1 LOCATED IN LU 1. SEE SECTION 5 FOR POWER SUPPLY MODULE LOCATION AND TROUBLESHOOTING PROCEDURES.
LOGIC UNIT 3 (FRONT VIEW) Figure 7-3. LU 3 Module Location Diagram 7-5
NAVAIR 01-75PAC-12
MODULE TYPE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47
FUNCTION Switch Encoder and Enter Generator Not Used Decoder and Buffers Input Amplifiers and Gating Data and Control Line Drivers, and Gating Timing and Control Exclusive OR Relay Drivers Universal Register Data Multiplexer R.S. Register MCP Control Module MCP Gated Input Amplifiers Data Transfer and MultipIexer SRL Interface Expanded Input Gating Deflection Signal 91 ohm Driver Clock Generator and Drivers Video and Unblank 91 ohm Digital Driver Digital to Analog Converters for Conics, Vectors Butterworth Filter Deflection Signal 91 ohm Driver Special Gating and Interface Digital to Analog Converter for Gross Position High Speed Synchronous Counter PDL - Timing and Control Gating MPD - Auto-Test Gating MPDL - End of Operation Detector and ODR Generator MPDL - Type Mode Timing Gates Digital Integrator and Change of Status Detector Precision Reference, Voltage Regulator and Character Size Control Special Test Timing and Control Logic Not Used Not Used Shift Register MTC - Decoder Function Register MTC - Status Register and Special Gating MTC - Data Path Gating and Storage MTC - Tape Mark Decoder MTC - Control Register Logic MTC - Control Register Logic MTC - Control Register Logic MTC - Control Register Logic MTC - Special Timing and Control Logic MTC - Gap Timer Decoder ADL Character Generator Line Drivers and Receivers
Subunit/Assembly
Assembly No. 1 3 1 1 1 1 3 3 4 5 3 3 6 7 8 9 2 3 4 2 3 4
Total Each Module Type Per Subunit or Assembly (Logic Unit 3) Module Type 10 11 12 13 14 15 16 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 36 37 38 39 40 41 42 43 44 45 2 2 5 2 2 5 1 1 1 1 1 5 1 1 1 3 1 1 1 2 3 2 1 2 2 1 3 8 1 2 3 1 2 1 1 1 4 4 7 1 2 1 1 3 2 1 1 1 1 1 1 1 1 1 1 1 1 2 1 1 1 2 1 1 1 1 1 1 1
Total Modules Per Subunit or Assembly 12 12 12 12 12 12 4 4 10 12 11 23 6 10 6
TACCO MPDL Subunit Timing Type Timing Data Input Sensor MPDL Subunit Timing Type Timing Data Input PDL Subunit Y-Axis Analog X-Axis Analog Data Control Character Generator Timing and Control MCP Subunit MTL Subunit Diagnostic Output Diagnostic Timing Sync Timing FG Subunit Y-Axis X-Axis Conic Timing TOTAL EACH MODULE TYPE
3A16 3A17 3A18 3A10 3A11 3A12 3A2 3A3 3A4 3A5 3A6 3A1 3A7 3A8 3A9
3A13 3A14 3A15 11 1 18
1 1 5 3 1 36 2 1 3 4 8 32 12 1
1 1
1 1
1 1 1 1 1 2 3 4 3 2 2 3
6 5 11 180
10 1
7-6
NAVAIR 01-75PAC-12
14 14
9 14 14
9 25
14
14
14
14 14 5
5 19 9 29 9
3 28 25
19 19
22
21
20
A 10 A9
A8 A7 A6 A5 A4
A3 A2 A1
A6 A5
A4
A3
A2
A1
A A A 12 11 10 A9 A8 A7 A6 A5 A4 A3 A2 A1
A6 A5
A4
A3
A2
A1
J12J11J10J9 J8 J7 J15 J14J13
J6 J5 J4 J3 J2 J1
J9 J8 J7
J6 J5 J4 J3 J2 J1
J12J11J10J9 J8 J7 J13
J6 J5 J4 J3 J2 J1
J5 J4 J3 J2 J7
J1 J6
PILOT DISPLAY INTERFACE LOGIC DATA CONTROL (3A4)
MASTER TIMING LOGIC DIAGNOSTIC OUTPUT (3A7)
SENSOR AND TACCO MULTIPURPOSE DISPLAY LOGIC TIMING (3A10 AND 3A16)
Y-AXIS FUNCTION GENERATOR (3A13)
24
22
21
20
3 16 16 16 16 16 16 16 3
44 5
28 3
9 10
10
25 18
9 25
9 29 14 16 5
14 25 9
31
22
21
20
A4
A3
A2
A1
A A A 10 A3 A9 A8 11 12 A7 A5 A6 A4 A2 A1
A 10 A9 A8 A7 A6 A5
A4
A3 A2 A1
A A A 12 11 10 A9 A8 A7 A6 A5 A4 A3 A2 A1
A5
A4
A3
A2
A1
J6 J5 J4 J3 J2 J1 J9 J8 J7
J12J11J10J9 J8 J7 J18
J6 J5 J4 J3 J2 J1 J17J16J15 J14J13
J12J11J10J9 J8 J7 J17J16 J15 J14J13
J6 J5 J4 J3 J2 J1
J12J11J10J9 J8 J7
J6 J5 J4 J3 J2 J1 J15 J14J13
J4 J3 J2 J6
J1 J5
Y-AXIS ANALOG PILOT DISPLAY INTERFACE LOGIC (3A2)
PILOT DISPLAY INTERFACE LOGIC CHARACTER GENERATOR (3A5)
MASTER TIMING LOGIC DIAGNOSTIC TIMING (3A8)
SENSOR AND TACCO MULTIPURPOSE DISPLAY LOGIC TYPE TIMING (3A11 AND 3A17)
X-AXIS FUNCTION GENERATOR (3A14)
31
22
21
20
11 26
14 44 16 19 19 9
25
19 19
3 14 14 14 27 16 14
9 14 9
9 14 14 25
9 44 14
14
A4
A3
A2
A1
A A 11 10 A9
A8 A7 A6 A5 A4 A3 A2 A1
A6
A5 A4
A3
A2
A1
A A A 12 11 10 A9 A8 A7 A6 A5 A4 A3 A2 A1
A A 11 10 A9 A8 A7 A6 A5 A4
A3 A2 A1
J6 J5 J4 J3 J2 J1 J7
CHARACTER
J12J11J10J9 J8 J7 J16 J15 J14
J6 J5 J4 J3 J2 J1 J13
J12J11J10J9 J8 J7
J6 J5 J4 J3 J2 J1 J16 J15 J14J13
J12J11J10J9 J8 J7 J16 J15 J14J13
J6 J5 J4 J3 J2 J1
J12J11J10J9 J8 J7 J16 J15 J14J13
J6 J5 J4 J3 J2 J1
WIDTH HEIGHT
X-AXIS ANALOG PILOT DISPLAY INTERFACE LOGIC (3A3)
PILOT DISPLAY INTERFACE LOGIC TIMING AND CONTROL (3A6)
MASTER TIMING LOGIC SYNC TIMING (3A9)
SENSOR AND TACCO MULTIPURPOSE DISPLAY LOGIC DATA INPUT (3A12 AND 3A18)
CONIC TIMING FUNCTION GENERATOR (3A15)
Figure 7-5. LU 3 Subassembly Module Location Diagram
7-7
NAVAIR 01-75PAC-12
7-1.
DISPLAY OF A CHARACTER PLOT WORD AT SS 3 OR TACCO STATION.

1. At POWER CONTROL panel, set MAIN POWER switch up, SS 3 multipurpose display logic subunit power switch to SS3, and TACCO multipurpose display logic subunit switch to TACO. At MCP, set MODE SELECTOR to OFF LINE, CHANNEL selector to the desired display channel (SS or TACO), and press ENTER. Verify OFF LINE and proper channel (SS or TACO) indicators are on. Press all RESET pushbutton switches. Set MCP DATA REGISTER to 00052 000148. (Display the character A and flash it.) Press RESET CONTROL switch. Set CONTROL OA-ODR-AUTO-MAN switch to AUTO. A flashing character A now appears on the selected display. Failure of the character to appear or be flashing indicates a failure. See NAVAlR 01-75PAC-2-5.5 for further troubleshooting. To return LU 3 back to an online condition, set the CONTROL OA-ODR-AUTO-MAN switch to MAN, and MODE SELECTOR to ON LINE.
a.
At POWER CONTROL panel, set MAIN POWER switch up, SS 3 multipurpose display logic subunit power switch to SS3, and TACCO multipurpose display logic subunit power switch to TACO.
6. 7. 8. 9.
Set MCP DATA REGISTER TO 05000 000008. Press CONIC ONE switch-indicator. Press RESET DATA switch. Set MCP DATA REGISTER to 00000 050008. Press CONIC TWO switch-indicator. Set SYNC switch to CONT. Press RESET CHAN and CONTROL switches. Set CONTROL OA-ODR-AUTO-MAN switch to AUTO. A circle, 4 inches in diameter, appears in the center of the TACCO display. Failure of conic to appear indicates a failure. See NAVAIR 01-75PAC-2-5.5 for further troubleshooting. To return LU 3 back to online condition, set the CONTROL OA-ODR-AUTO-MAN switch to MAN, SYNC switch to OFF, and MODE SELECTOR to ON LINE.
b.
2. 3. 4. 5. 6. 7.
At MCP, set MODE SELECTOR to TEST, CHANNEL selector to the desired display channel (SS or TACO), and press ENTER.
c.
Verify TEST and proper channel (SS or TACO) indicators are on.
10. 11. 12.
d.
Press all RESET pushbutton switches.
e.
Set TEST MODE SELECTION switch to TYPE.
13. 14.
f.
Set MCP DATA REGISTER to character data word 10101 010108.
g.
Set SYNC switch to CONT. 15.
8.
7-2.
LU 3 TEST MODE PROCEDURES.

1. VECTOR DISPLAY AT TACCO OR SS 3 DISPLAY: a. At POWER CONTROL panel, set MAIN POWER switch up, SS 3 multipurpose display logic subunit power switch to SS3, and TACCO multipurpose display logic subunit power switch toTACO. At MCP, set MODE SELECTOR to TEST, CHANNEL selector to the desired display channel (SS or TACO), and press ENTER. Verify TEST and proper channel (SS or TACO) indicators are on. Press all RESET pushbutton switches. Set TEST MODE SELECTION switch to VECTOR. Set MCP DATA REGISTER to 40003 000008. Set SYNC switch to CONT. Press RESET CONTROL. Set CONTROL OA-ODR-AUTO-MAN switch to AUTO. A 7-inch vector from center to lower left of display appears on the selected display. Failure of vector display indicates a failure. See NAVAlR 01-75PAC-2-5.5 for further troubleshooting. To return LU 3 back to an online condition, set the CONTROL OA-ODR-AUTO-MAN switch to MAN, SYNC switch to OFF, and MODE SELECTOR to ON LINE. 2. 1.
h.
Press RESET CHAN and CONTROL switches.
i.
Set CONTROL OA-ODR-AUTO-MAN switch to AUTO. 88888 should now appear on the selected display. Failure of data to appear indicates a fault. See NAVAIR 01-75PAC-2-5.5 for further troubleshooting.
7-4.
LU 3 TO PILOT TACTICAL DATA DISPLAY TEST.

1. At POWER CONTROL panel, set MAIN POWER switch up and pilot display logic subunit power switch to PDL. At MCP, set MODE SELECTOR to TEST, set CHANNEL selector to PD, and press ENTER. Verify TEST and PD indicators are on. Press all RESET pushbutton switches. Set MCP DATA REGISTER to 60052 000538. (Display and flash characters A and B.) Set SYNC switch to CONT. Press RESET CONTROL switch. Set CONTROL OA-ODR-AUTO-MAN to AUTO. Flashing characters A and B appear on the pilot Tactical Data Display. Failure of the characters to appear or flash indicates a failure. See NAVAIR 01-75PAC-2-5.5 for further troubleshooting. To return LU 3 back to an online condition, set the CONTROL OA-ODR-AUTO-MAN switch to MAN, SYNC switch to OFF, and MODE SELECTOR to ON LINE.
b. c. d. e. f. g. h. i.
j.
To return LU 3 back to an online condition, set the CONTROL OA-ODR-AUTO-MAN switch to MAN, SYNC switch to OFF, and MODE SELECTOR to ON LINE.
2.
3.
7-3.
LU 3 TACCO CONIC DISPLAY TEST PROCEDURES.

At POWER CONTROL panel, set MAIN POWER switch up and TACCO multipurpose display logic subunit power switch to TACO.
4. 5.
6. At MCP, set MODE SELECTOR to TEST, set CHANNEL selector to TACO, and press ENTER. 7. 8.
3.
Verify TEST and TACO indicators are on.
j.
4.
Press all RESET pushbutton switches. 9.
2.
CHARACTER DISPLAY AT TACCO OR SS 3 DISPLAY:
5.
Set TEST MODE SELECTION switch to CONIC.
7-8
Figure 7-6. LU 3 Offline Troubleshooting Procedures
NAVAIR 01-75PAC-12
EQUIPMENT/ MODULE/ PART SUBSYSTEM Maintenance Control Panel Logic (3A1) DESIGNATOR 3A1 NOMENCLATURE Maintenance Control Panel Assembly, LU 3 FUNCTION Controls modes of operation of LU 3 - Interface between Central Computer and LU 3 MCP Data Register Bits 04-07; CH07 On-L, 0B 04-07; CH06 On-L, 0B 04-07; CH05 On-L, 0B 04-07; 0B 04-07 Lamp MCP Data Register Bits 08-11; CH07 0B 08-11; CH06 0B 08; CH05 0B 08-11; 0B 08-11 Lamp MCP Data Register Bits 12-15; CH07 0B 12-15; CH06 0B 14, 15; CH05 0B 12-15; 0B 12-15 Lamp Conic Data Register Signals to Data Multiplexer; Strd Sw B 05-14; TACCO Spl Tst B 05-14 Data Multiplexer; TACCO Spl Tst B 20-29; CH06 On-L, ODRMA, Test; CH05 On-L; CH07 On-L Conic Data Register Signals to Data Multiplexer; Strd Sw B20-29 MCP Data Register Bits 20-23; CH05 ODRM; CH07 0B 20-23; CH06 0B 20-23; CH05 0B 20-23; 0B 20-23 Lamp MCP Data Register Bits 24-27; CH07 0B 24-27; CH06 0B 24-27; CH05 0B 24-27; 0B 24-27 Lamp MCP Data Register; CH07 0B 28, 29; CH06 0B 28, 29; CH05 0B 28, 29; 0B 28, 29 Lamp MCP Data Register; CH07 0B 16-19; CH06 0B 16-19; CH05 0B 16-19; 0B 16-19 Lamp Sync Pulse/Special Test Generator; CH07 On-L; Test; TACCO MS Sw B01-03; TACCO ACH SEL B01, 02; TACCO CSL B01-03 Anlg CH2, Spl Tst B 15-18, 04 IN-FLIGHT SPARES No None IDENTICAL ITEMS FOR ALTERNATE REPAIR EQUIPMENT/ MODULE/ PART SUBSYSTEM DESIGNATOR 3A1A1A12 NOMENCLATURE Module Assembly Type 32 FUNCTION Sync Pulse/Special Test Generator; CH05 On-L; PDL Spl Tst B 26, 29; SS3 MS Sw B 01-03, CSL B 01-03, ACH Sel B 00-02, Anlg CH2, Spl Tst B 15-18, 04 Lamp Buffer DS1-DS26 IN-FLIGHT SPARES Yes IDENTICAL ITEMS FOR ALTERNATE REPAIR All type 32 identical - 2 in LU 3 (2 Total)
3A1A1A1
Yes
All type 13 identical - 8 in LU 1, 8 in LU 2, 8 in LU 3, 8 in LU 4 (32 Total)
3A1A2A1
Yes
3A1A1A2
Yes
All type 13 identical - 8 in LU 1, 8 in LU 2, 8 in LU 3, 8 in LU 4 (32 Total) All type 13 identical - 8 in LU 1, 8 in LU 2, 8 in LU 3, 8 in LU 4 (32 Total)
3A1A2A2
3A1A1A3
Yes
MCP Data Register Bits 00-03; CH05 0B 00-03; CH06 0B 00-03; CH07 0B 00-03; 0B 00-03 Lamp Control Signal Generator Chan 5, 6, 7; CH05 EF, OA, EF MCP, OA MCP, CH06 EF, OA, EF MCP, OA MCP; CH07 EF, OA, IA, IE, IA MCP, EF MCP, OA MCP Control Signal Generator; CH05 On-L, Off-L, Test; CH06 Off-L, Test; CH07 Off-L, Test VER, IDR, IDRM Control Signal Generator; CH05 On-L, VER, ODR, ODRMB; CH06 On-L, VER, ODR, ODRMB; CH07 On-L, VER, ODR, ODRMB Control Signal Generator; CH05 Off-L, VER, EFR; CH06 Off-L, VER, EFR; CH07 Off-L, VER, EFR, On-L; CH TACCO Lamp; Off-L Mode Lamp Power Monitor Line Driver, Power Status Bit 26-29; CH05 ODRM; CH07 IB 2629; CH07 Inter, Inter Lamp, IA MCP, IE MCP; On-L Mode Lamp Power Monitor Outputs to Power Monitor Line Driver System Initialize FG and MTL Digital Delay; CH05 On-L; CH06 On-L; CH07 On-L NOTE
Yes
3A1A2A3
Yes
3A1A1A4
Yes
All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 Total) All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 Total) 3A1A2A4 Module Assembly Type 12
3A1A1A5
Yes
Yes
3A1A1A6
Yes
3A1A2A5
Yes
3A1A1A7
Yes
3A1A2A6
Yes
3A1A1A8
Yes
All type 13 identical - 8 in LU 1, 8 in LU 2, 8 in LU 3, 8 in LU 4 (32 Total) 3A1A2A7 Module Assembly Type 5
Yes
3A1A1A9
Yes
All type 13 identical - 8 in LU 1, 8 in LU 2, 8 in LU 3, 8 in LU 4 (32 Total) All type 13 identical - 8 in LU 1, 8 in LU 2, 8 in LU 3, 8 in LU 4 (32 Total) All type 32 identical - 2 in LU 3 (2 Total) 3A1A2A8 Module Assembly Type 30 Module Assembly Type 30
3A1A1A10
Yes
Yes
3A1A2A9 Yes
Yes
3A1A1A11
1. 2. 3.
Yes in the In-Flight Spares column indicates a spare is available in the in-flight maintenance kit. No indicates that no spare is available. LU 4 installed in BUNO 158928 and 159503 and subsequent. All modules/units listed are replaceable in flight.
7-9
NAVAIR 01-75PAC-12
EQUIPMENT/ MODULE/ PART SUBSYSTEM DESIGNATOR 3A1A2A10 3A1A2A11 NOMENCLATURE Module Assembly Type 8 Module Assembly Type 30 Light, Indicator (36 ea) Switch, Push (41 ea) Pilot Display Assembly, Analog Y-Axis Module Assembly Type 20 FUNCTION DTL Gate and Driver Control Signal to Subunits System lnitialize MPDL/ PDL Digital Delay Pilot and MPD Logic Lights, Indicating IN-FLIGHT SPARES Yes Yes IDENTICAL ITEMS FOR ALTERNATE REPAIR All type 8 identical - 3 in LU 1, 9 in LU 2, 1 in LU 3 (13 total) All type 30 identical - 13 in LU 1, 12 in LU 2, 3 in LU 3, 2 in LU 4 (30 Total) 36 Used 3A4A4 Switch, Push No 41 Used EQUIPMENT/ MODULE/ PART SUBSYSTEM DESIGNATOR 3A4A2 NOMENCLATURE Module Assembly Type 9 FUNCTION X Conic Character Register from PDL and MCPL; CH06 0B 15-23; CHAR/ CONIC X B 00-08 X Gross Position Transfer Register; GPX 0-7 Character Data Transfer and Raster Generator; CH06 0B 00-07; CB 0-5; CHAR/CONlC X B 00-05; CHAR/CONIC Y B 00-05; RAS B 00-04 Diagnostic Gating; GPX 0-5; GPY 0-5; CB 0-5; PDL DN B 00-05; CHAR/CONIC X B 00-05; CHAR/CONlC Y B 00-05 Y Gross Position Register; GPY 0-7 Y Conic Character Register; CH06 0B 00-08; CHAR/CONIC Y B 00-08 X and Y Conic Module; GPX 6, 7; GPY 6, 7; PDL DN B 06-11; CONIC/AZ X B 00-08; CONIC/AZ Y B 00-08; CHAR/CONlC X B 00-08; CHAR/CONIC Y B 00-08 Azimuth Data Transfer; CONIC/AZ X B 00-08; CONIC/AZ Y B 00-08; AZ X 0-8; AZ Y 0-8 Conic Data Transfer; CONIC/AZ X B 00-08; CONIC/AZ Y B 00-08; CONIC X 0-8; CONIC Y 0-8 Pilot Display Character Generator IN-FLIGHT SPARES Yes IDENTICAL ITEMS FOR ALTERNATE REPAIR All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 Total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 Total) All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 Total)
3A4A3
3A1DS1 26, 30, 63, 67-74 3A1DS28, 29, 30-62, 64-66, 75-77 Pilot Display Logic Y-Axis Analog 3A2
No
Yes
Yes
Pilot Display Y-Axis Analog D/A Converter from PDL 3A4/3A3 to PDL 3A3 and 3A2A3; RAS BO 03-05; CONIC Y 0-8; AZ Y 0-8; Y Azimuth Filter from 3A2A1 to 3A2A3 Summing Amplifier Y Deflection to Pilot Display; Y Gross Pos; Y Gross Bias; Y Raster; Y Defl D/A Converter from PDL 3A3/3A4/3A6 to 3A3 and 3A2A2; GPY 0-7 Pilot Display X-Axis Analog D/A Converter from PDL 3A4/3A6 to PDL 3A3A2/ 3A3A3; X Azimuth; RAS B 00-02; AZ X 0-8; CONIC X 0-8 Filter from 3A3A1 to 3A3A3 Summing Amplifier X Deflection to Pilot Display; X Gross Pos; X Gross Bias; X Raster; X Defl Reference and Voltage Regulator Characterize (X and Y); GPX 0-7 Pilot Display Data Control
No
None 3A4A5 Module Assembly Type 14
Yes
3A2A1
No
All type 20 identical - 4 in LU 3, 2 in LU 4 (6 Total) 3A4A6 Module Assembly Type 9 Module Assembly Type 9 Module Assembly Type 7
Yes
3A2A2 3A2A3
No Yes
All type 21 identical - 4 in LU 3, 2 in LU 4 (6 Total) All type 22 identical - 4 in LU 3 (4 Total)
All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 Total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 Total) All type 7 identical - 7 in LU 2, 3 in LU 3, 8 in LU 4 (18 Total)
3A4A7
Yes
3A4A8 No All type 24 identical - 1 in LU 3, 1 in LU 4 (2 Total) None
No
3A2A4
Module Assembly Type 24 Pilot Display Assembly Analog X-Axis Module Assembly Type 20
Pilot Display Logic X-Axis Analog
3A3
No
3A4A9
Yes
3A3A1
No
All type 20 identical - 4 in LU 3, 2 in LU 4 (6 Total)
3A4A10
Yes
3A3A2 3A3A3
No Yes
All type 21 identical - 4 in LU 3, 2 in LU 4 (6 Total) All type 22 identical - 4 in LU 3 (4 Total)
Pilot Display Logic Character Generator
3A5
Pilot Display Interface Logic Assembly Character Generator Module Assembly Type 3 Module Assembly Type 3 Module Assembly Type 3 Module Assembly Type 3
No
None
3A5A1 No All type 31 identical - 2 in LU 3, 1 in LU 4 (3 Total) None 3A5A3
3A3A4
Module Assembly Type 31 Pilot Display Interface Logic Assembly, Data Control Module Assembly Type 25
Decoder and Buffers; INT RAS B 04, 05 Decoder and Buffers
Yes
All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 Total) All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 Total) All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 Total) All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 Total)
3A5A2
Yes
Pilot Display Logic Data Control
3A4
No
3A4A1
Gross Position Register and Input Counter; CH06 0B 15-22
Yes
Decoder and Buffers; INT MOD 2 RAS B 00, 02 Decoder and Buffers; INT RAS B 03; INT MOD 2 RAS B 00-02
Yes
3A5A4
Yes
7-10
NAVAIR 01-75PAC-12
EQUIPMENT/ MODULE/ PART SUBSYSTEM DESIGNATOR 3A5A5 NOMENCLATURE Module Assembly Type 16 Module Assembly Type 16 Module Assembly Type 16 Module Assembly Type 16 Module Assembly Type 16 Module Assembly Type 3 Module Assembly Type 16 Module Assembly Type 16 Pilot Display Interface Logic Assembly, Timing and Control Module Assembly Type 25 Module Assembly Type 9 Module Assembly Type 9 Module Assembly Type 19 Module Assembly Type 19 Module Assembly Type 16 Module Assembly Type 44 FUNCTION Expanded Input Gating; CHAR + Expanded Input Gating IN-FLIGHT SPARES Yes IDENTICAL ITEMS FOR ALTERNATE REPAIR All type 16 identical - 2 in LU 1, 2 in LU 2, 12 in LU 3, 5 in LU 4 (21 Total) All type 16 identical - 2 in LU 1, 2 in LU 2, 12 in LU 3, 5 in LU 4 (21 Total) All type 16 identical - 2 in LU 1, 2 in LU 2, 12 in LU 3, 5 in LU 4 (21 Total) All type 16 identical - 2 in LU 1, 2 in LU 2, 12 in LU 3, 5 in LU 4 (21 Total) All type 16 identical - 2 in LU 1, 2 in LU 2, 12 in LU 3, 5 in LU 4 (21 Total) All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 Total) All type 16 identical - 2 in LU 1, 2 in LU 2, 12 in LU 3, 5 in LU 4 (21 Total) All type 16 identical - 2 in LU 1, 2 in LU 2, 12 in LU 3, 5 in LU 4 (21 Total) None EQUIPMENT/ MODULE/ PART SUBSYSTEM DESIGNATOR 3A6A9 NOMENCLATURE Module Assembly Type 26 Module Assembly Type 11 FUNCTION PDL Timing and Control, CH06 VER, On-L, ODR; MODE 02-07 Address and Mode Select System; MODE 02-07, 10; CH06 OA; ADR Mode 02-07, 10 Address and Mode Select System; CH06 OA, 0B; 26-29, 40 Hz Clk; 768 kHz Clk Master Timing Logic Diagnostic Output IN-FLIGHT SPARES No IDENTICAL ITEMS FOR ALTERNATE REPAIR All type 26 identical - 1 in LU 3, 1 in LU 4 (2 Total) All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 Total)
3A5A6
Yes
3A6A10
Yes
3A5A7
Expanded Input Gating; CHAR 1, 2, 3, 4, 5, 6, 7 Expanded Input Gating; CHAR 8, 9, 0, -, +, D Expanded Input Gating; CHAR X, R, S, A, B, C, E, F Decoder and Buffers; CB 0-5 Expanded Input Gating; CHAR N, G, H, J, l, K, M, P, Y Expanded Input Gating; CHAR L, Q, T, V, U, W, X, Z Pilot Display Timing and Control Clock Generator Timing and Control for 3A6 and 3A4; INT RAS B 00-02 Timing and Control Register; CTR F/F DLY 1-4; 1.536 MHz Clk Timing and Control Register and State Generator; CH06 OA, 0B 29 Video Amplifier Video on CRT for Conic and Characters Video Amplifier Video on CRT for Conic and Characters Expanded Input Gating; CH 06 OA MCP, INT RAS B 03, 04, 05A Special Timing and Control, CHAR/CONIC X B 06-08; CHAR/CONIC Y B 06-08; MODE 2 Diagnostic Gating; MODE 02-07; CHAR/CONIC X B 06-08; CHAR/CONIC Y B 06-08; GPX 6, 7; DPL DN B 06-11
Yes
3A6A11
Yes
3A5A8
Yes
All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 Total) None
3A5A9
Yes
Master Timing Logic Diagnostic Output
3A7
Master Timing Logic Assembly, Diagnostic Output Module Assembly Type 5 Module Assembly Type 14
No
3A5A10
Yes
3A7A1
Data Drivers to Central Computer and MCPL; CH07 IB 00-07 Data Multiplexer MPDL 1 and 2, Bits 00-05 to Central Computer; CH07 IB 00-05; TACCO SS3, FGL, PDL DN B 00-05, Enbl Data Multiplexer MPDL 1 and 2, Bits 6-11, Function Gen. Radar; CH07 IB 06-11; TACCO SS3, FGL, PDL DN B 06-11, Enbl Data Multiplexer MPDL 1 and 2, 3A17, 3A18, 3A12, 3A11 in Outputs to Central Computer Bits 12-23; TACCO SS3 DN B 12-23, Enbl Data Driver and Subunit Identifier to Central Computer and MCPL; CH07 IB 17-25 SS3 and TACCO DN B 17-23 Data Driver to Central Computer and MCPL; CH07 IB 08-16; SS3 and TACCO Diagnostic Timing and Control
Yes
3A5A11
Yes
3A7A2
Yes
3A5A12
Yes
3A7A3
Yes
Pilot Display Logic Timing and Control
3A6
No
3A6A1
Yes
All type 25 identical - 10 in LU 3, 11 in LU 4 (21 Total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 Total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 Total) All type 19 identical - 8 in LU 3, 2 in LU 4 (10 Total) All type 19 identical - 8 in LU 3, 2 in LU 4 (10 Total) All type 16 identical - 2 in LU 1, 2 in LU 2, 12 in LU 3, 5 in LU 4 (21 Total) All type 44 identical - 19 in LU 2, 3 in LU 3, 14 in LU 4 (36 Total) Master Timing Logic Diagnostic Timing
3A7A4
Yes
3A6A2
Yes
3A6A3
Yes
3A7A5
Yes
3A6A4
Yes
3A7A6
Yes
3A6A5
Yes
3A8
3A6A6
Yes
Master Timing Logic Assembly, Diagnostic Timing Module Assembly Type 9 Module Assembly Type 18
No
3A6A7
Yes
3A8A1
Counter Register; 50, 57.1, 400 Hz Clk; 62.5 kHz Clk; 1, 2 MHz Clk Oscillator Shaper; 50,400 Hz Clk; 1, 2, 62.5, 250 MHz Clk; 1.536, 2 MHz OSC; MTL, SS3, TACCO 2.0 MHz Clk; FGL, PDL 1.536 MHz Clk
Yes
3A8A2 Yes All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 Total)
Yes
3A6A8
7-11
NAVAIR 01-75PAC-12
EQUIPMENT/ MODULE/ PART SUBSYSTEM DESIGNATOR 3A8A3 3A8A4 NOMENCLATURE Module Assembly Type 25 Module Assembly Type 10 FUNCTION 10-Bit Time Counter; DCTC B 20-29 3 Channel 8 Bit Multiplexer; CH05 0B 22-29; CH06 0B 22-29; CH07 0B 22-29; CH05 EF MCP; CH06 EF MCP, DCTC B 22-29 3 Channel 8 Bit Multiplexer; CH05 0B 14-19; CH06 0B 14-19; CH07 0B 14-19; CH05 EF MCP; CH06 EF MCP; DCTC B 14-21 6-Bit Storage IDR FlipFlop; DCTC B 14-19; CH07 IDRM 6-Bit Loop and Subunit Decoder; On Loop B 0103; On SU LP B 01-03; SU LP 1-7; DN Loop B 01-03; DN SU LP B 0103; CH05-07 EF MCP 1A Synchronizer, EFR Flip-Flop, Clock Gating; 400 Hz, 1.536 MHz, 2.0 MHz Clk ETR Drivers and Gating Logic; CH07 VER, On-L, IDR Gating Logic; CH05-07 VER, On-L, Off-L Sync Timing IN-FLIGHT SPARES Yes Yes IDENTICAL ITEMS FOR ALTERNATE REPAIR All type 25 identical - 10 in LU 3, 11 in LU 4 (21 Total) All type 10 identical - 6 in LU 1, 4 in LU 2, 2 in LU 3, 8 in LU 4 (20 Total) EQUIPMENT/ MODULE/ PART SUBSYSTEM DESIGNATOR 3A9A6 NOMENCLATURE Module Assembly Type 5 FUNCTION Gating Logic; 1 MHz Clk; 57.1 Hz Sync; CH05 Sync; CH07 Sync; INT RSC Enbl (TACCO); INT RSC Enbl (SS3) SS3 Display Logic Timing IN-FLIGHT SPARES Yes IDENTICAL ITEMS FOR ALTERNATE REPAIR All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 Total)
3A8A5
Yes
Multipurpose Display Logic TACCO/SS3 Timing
3A10
Multipurpose Display Logic Assembly TACCO/SS Timing
No
3A16 (all respective modules)
3A10A1
9-Stage Margin Register Counter; IR B 03,04, 17-20 Timing and Control Logic; CH05 ODR Mon 2 Function and Field Decoder; INT RSC, LLLTV, SSC, FGL, Vector Field Register and 3Stage Word Counter; IR B 15-18 Timing and Control Logic; 1 MHz, 500 kHz Clk; INT Vector; INT Video Set Register A 4-Stage Video Counter; SS3 2.0 MHz Clk Digital to Analog Converter; Vector Unblk; SS3 Pwr Init; Vector Sweep Enbl Signal Gating and Drivers B; INT ACH 1-4 Defl Enbl; ACH 1-4 Defl Enbl; INT ACH 1-4 Vid Enbl; ACH 1-4 Vid Enbl Signal Gating and Drivers A; IR B 06-16; Vector Slope B 01-09; INT Vector Slope B 01-09 Signal Gating and Drivers C; IR B 15-17; CH05 VER, On-L Diagnostic Gating A Slope, Video, Unblank Bit to MLT 3A7; SS3 DN B 06-11; Loop 1-5; IR B 06-11; INT Vector Slope B 04-09
No
All type 25 identical - 10 in LU 3, 11 in LU 4 (21 Total) All type 28 identical - 3 in LU 3, (3 Total) All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 Total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 Total) All type 29 identical - 4 in LU 3 (4 Total)
3A8A6
Yes
3A10A2
No Use 3A8A8 Yes
3A8A7
Yes
3A10A3
3A10A4 No Use 3A10A2 Yes All type 28 identical - 3 in LU 3, None in LU 4 (3 Total)
Yes
3A8A8
3A10A5
No
3A8A9
Module Assembly Type 5 Module Assembly Type 44 Master Timing Logic Assembly Sync Timing Module Assembly Type 9
All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 Total) All type 44 identical - 19 in LU 2, 3 in LU 3, 14 in LU 4 (36 Total) None
3A10A6
Yes
3A8A10 Master Timing Logic Sync Timing 3A9
Yes No
All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 Total) All type 19 identical - 8 in LU 3, 2 in LU 4 (10 Total)
3A10A7
Yes
3A9A1
8-Stage Ring Counter and Storage Register; MTL 40 Hz Sync; 2, 10 MHz Clk; INT 40 Hz Clk Timing Logic; 57.1 Hz Sync; INT 40 Hz Clk Storage Register; INT 40 Hz Sync; INT 40 Hz Clk; 400 Hz Clk Video and Unblanking Digital Drivers - MCPL and MTL (3A7); INT RSC Unblk; INT RSC Enbl (SS3); RSC Unblk (TACCO); RSC Unblk (SS3) Video and Unblanking Digital Drivers - FDL, MPDL 1 and 2; INT RSC Enbl (SS3); RSC Enbl Out
Yes
All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 Total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 Total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 Total) All type 19 identical - 8 in LU 3, 2 in LU 4 (10 Total)
3A10A8
Yes
3A9A2
Yes
3A10A9
Yes
All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 Total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 Total) All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 Total)
3A9A3
Yes
3A10A10
Yes
3A9A4
Yes
3A10A11
Yes
3A9A5
Yes
7-12
NAVAIR 01-75PAC-12
EQUIPMENT/ MODULE/ PART SUBSYSTEM DESIGNATOR 3A10A12 NOMENCLATURE Module Assembly Type 14 FUNCTION Diagnostic Gating BSlope, Deflection and Axis Bits to 3A7; SS3 DN B 00-05; Loop 1-5; IR B 00-05; INT Vector Slope B 01-03; Word 1-3; SU LP 6 SS3 Display Logic Type Timing Control Line Drivers; Strd Output B 06-14; Mon Vert Pos B 01-09; Vert Pos B 06-14; Enbl XY Pos & Char 4-6 Y Gross Position Register to Position Drivers; Trans Output B 06-14; Strd Output B 06-14; Trans Y Pos Ctr 9-Stage Y Position Counter; Trans Output B 06-14; IB 06-14; Vert Pos Ctr Clk Character Decoder; IR B 00-29; Char B 01-06; Char Sel B 01-06; Mon Char Sel B 01-06 Character Gating Drivers; Enbl XY Pos & Char; Spot Focus; Char Focus; Cursor Focus; Mon Spot Focus; Mon Char Focus; Mon Cursor Focus Diagnostic Gating to 3A12; SS3 Pwr Init; Anlg CH Enbl Diagnostic Gating Multiplexer to MTL 3A7/3A8; Loop 1-5; SS3 DN B 1823; IR B 24-27; Mon Vert Pos B 04-09; Mon X Pos B 04-09; Mon Char Sel B 01-06 Timing and Control: 500 kHz Clk; Vert, Horiz Pos Ctr Clk; Trans X, Y Pos Ctr Five Stage Character Counter; SS3 Pwr Init; Char Ctr Clk; Char 1-5 Enbl IN-FLIGHT SPARES Yes IDENTICAL ITEMS FOR ALTERNATE REPAIR All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 Total) EQUIPMENT/ MODULE/ PART SUBSYSTEM DESIGNATOR 3A11A10 NOMENCLATURE Module Assembly Type 25 FUNCTION 9-Stage X Position Counter; Trans Output B 21-29; IR B 21-29; Trans B 21-29; Horiz Pos Ctr Clk Gross Position Register; Strd Output B 21-29; Trans Output B 21-29 Control Line Drivers; Strd Output B 21-29; Mon X Pos B 01-09; Horiz Pos B 01-09; Enbl X Y Pos & Char 1-3 SS3 Display Logic Data Input IN-FLIGHT SPARES Yes IDENTICAL ITEMS FOR ALTERNATE REPAIR All type 25 identical - 10 in LU 3, 11 in LU 4 (21 Total)
3A11A11 No Yes 3A17 (all respective modules) 3A11A12 All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 Total) Multipurpose Display Logic Data Input 3A12
Multipurpose Display Logic Type Timing
3A11 3A11A1
Multipurpose Display Logic Assembly Type Module Assembly Type 5
Yes
Yes
3A11A2
Yes
Multipurpose Display Logic Assembly, Data Input Module Assembly Type 9
No
3A18 (all respective modules)
3A12A1 Yes All type 25 identical - 10 in LU 3, 11 in LU 4 (21 Total) 3A12A2 Yes All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 Total) 3A12A3 Yes All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 Total)
3A11A3
Bits 00-09 Input Register to 3A10/3A11; CH05 Output B 00-09; Test B 00-09; IR B 00-09 Bits 20-29 Input Register to 3A10/3A11; IR A1, A2; Test B 20-29; IR B 20-29; CH05 Output B 20-29 Diagnostic Gating Logic; Loop 1-5; IR B 12-23; SS3 DN B 12-17; Char 1-5 Enbl; SS3 CSL B 01-03; Mon X Pos B 01-03; Mon Vert Pos B 01-03 Bits 10-19 Input Register; CH05 Output B 10-19; IR A3, A4; Test B 10-19; IR B 10-19 Signal Gating - D; Test B 03, 04, 15-20; CT 5, 8; MTX, Align Test Enbl, B 15-20; Conic Tst Enbl, B 17, 18; Type Tst Enbl, B 15, 18-20; Vector Tst Enbl, B 15-17 Clock Control; Test Ctr Clk, CH05 On-L Counter Decoder; CT 1A4A, 5-8; Type Tst B 00, 04, 11, 19, 20, 22, 24-27; Conic Tst B 06-11, 14, 17, 18, 21-27; Vector Tst B 06-17; 21-29; Align Tst B 15-20; MTX Tst B 15-20
Yes
Yes
3A11A4
3A11A5
Yes
3A11A6
Yes
3A12A4
Yes
3A11A7
Yes
3A12A5
Yes
3A11A8
No
All type 29 identical - 4 in LU 3 (4 Total)
3A12A6
Yes
All type 16 identical - 2 in LU 1, 2 in LU 2, 12 in LU 3, 5 in LU 4 (21 Total) All type 27 identical - 2 in LU 3 (2 Total)
3A11A9
Yes
3A12A7
No
7-13
NAVAIR 01-75PAC-12
EQUIPMENT/ MODULE/ PART SUBSYSTEM DESIGNATOR 3A12A8 NOMENCLATURE Module Assembly Type 14 FUNCTION Signal Gating - B; CT 3A, 4A, 5, 6; Test B 11-14, 21-23; Type Tst Enbl, B 11, 22, 26, 27; Conic Tst Enbl B 11, 14, 21-25; Vector Tst Enbl B 06-13; 21-24; 26-28 Signal Gating - C; Test B 24-29; CT 1A, 2A, 3A; Conic Tst Enbl, B 21-29; Type Tst Enbl, B 24-28; Vector Tst Enbl, B 21-29 Signal Gating - A; Test B 00-10; CT 1A, 2A, 6; MTX, Align, Type, Conic, Vector Tst Enbl; Type Tst B 00, 03-05; Conic Tst B 06-10; Vector Tst B 06-13 Trigger Generator and Test Decoder; CH05 OA MCP; SS3 CSL B 01-03; SS3 Anlg CH2; CT 1A4A, 6-8 8 Stage Counter; Test Ctr Clk; CT 5-8 Function Generator Y Axis Exclusive OR Logic from 3A15; C S Clk 2, 3; CBY 0-9; BY 0-9; SIN Clk 2, 3; CAY 0-9; AY 0-9 D/A Converter and Summing Amplifier to 3A14 Low Pass Filter Filtered Analog Signals to 3A1/ 3A4 Deflection Signal Driver V Deflection Signal to TACCO Display Video and Unblank Digital Driver from 3A15 Video and Unblank Digital Driver to 3A1, 3A5 Function Generator X Axis Exclusive OR Logic from 3A15; C S Clk 1, 2; CBX 0-9; BX 0-9; SIN Clk 1, 2; CAX 0-9; AX 0-9 IN-FLIGHT SPARES Yes IDENTICAL ITEMS FOR ALTERNATE REPAIR All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 Total) EQUIPMENT/ MODULE/ PART SUBSYSTEM DESIGNATOR 3A14A2 3A14A3 3A14A4 Yes All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 Total) Function Generator Logic Conic Timing 3A14A5 3A15 NOMENCLATURE Module Assembly Type 20 Module Assembly Type 21 Module Assembly Type 22 Module Assembly Type 31 Function Generator Assembly, Conic Tuning Module Assembly Type 9 FUNCTION D/A Converter Butterworth Filter to 3A14A4 Deflection Signal Driver X Def to TACCO Display Precision Reference and Voltage Regulator Function Generator Conic Timing IN-FLIGHT SPARES No No Yes No No IDENTICAL ITEMS FOR ALTERNATE REPAIR All type 20 identical - 4 in LU 3, 2 in LU 4 (6 Total) All type 21 identical - 4 in LU 3, 2 in LU 4 (6 Total) All type 22 identical - 4 in LU 3 (4 Total) All type 31 identical - 2 in LU 3, 1 in LU 4 (3 Total) None
3A12A9
3A12A10
Yes
3A15A1
AY Data Bit Register from 3A16/3A18; IR B 05-14, 20-29; AX 0-9; AY 0-9; Control 1 BY Data Bit Register from 3A16/3A18; IR B 05-14, 20-29; BX 0-9; BY 0-9; Control 2 AY-AX Data Transfer Gating Logic - to FG 3A13/3A14; AY 0-9; AX 0-9; CAY 0-9; CAX 0-9 BX-BY Data Transfer Gating Logic - to FG 3A14/3A15; BY 0-9; BX 0-9; CBY 0-9; CBX 0-9 Timing and Logic Control - to 3A8/3A13/3A14; COS Clk 1-3; SIN Clk 1-3; AX 7-9; AY 7-9 Timing Registers; COS Clk; Clock Control; Time Control Timing and Control Logic; SIN Clk; Clock Control; 24 kHz, 768 kHz Diagnostic Gating to MTL 3A7 and 3A13; AX 4-9; AY 4-9; BX 4-9; BY 4-9; FG DB 6-11; Loop 1-4 Diagnostic Gating to MTL 3A7; AX 0-3; AY 0-3; BX 0-3; BY 0-3; FG DB 0-5; Loop 1-4 BX Data Bit Registerfrom 3A16/3A18; Control 2 AX Data Bit Register from 3A16/3A18; Control 1
Yes
All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 Total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 Total) All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 Total) All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 Total) All type 44 identical - 19 in LU 2, 3 in LU 3, 14 in LU 4 (36 Total)
3A15A2 Yes All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 Total)
3A12A11
Yes
3A15A3
Yes
3A12A12
Module Assembly Type 9 Function Generator Assembly Y Axis Module Assembly Type 7
Yes
3A15A4
Function Generator Logic Y Axis
3A13
No
Yes
3A13A1
No
All type 7 identical - 7 in LU 2, 3 in LU 3, 8 in LU 4 (18 Total)
3A15A5
Yes
3A13A2 3A13A3
Module Assembly Type 20 Module Assembly Type 21 Module Assembly Type 22 Module Assembly Type 19 Module Assembly Type 19 Function Generator Assembly X Axis Module Assembly Type 7
No No
All type 20 identical - 4 in LU 3, 2 in LU 4 (6 Total) All type 21 identical - 4 in LU 3, 2 in LU 4 (6 Total) All type 22 identical - 4 in LU 3 (4 Total) All type 19 identical - 8 in LU 3, 2 in LU 4 (10 Total) All type 19 identical - 8 in LU 3, 2 in LU 4 (10 Total) None
3A15A6
Yes
All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 Total) All type 25 identical - 10 in LU 3, 11 in LU 4 (21 Total) All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 Total) All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 Total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 Total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 Total)
3A15A7
Yes
3A13A4
Yes
3A15A8
Yes
3A13A5 3A13A6 Function Generator Logic X Axis 3A14
Yes Yes No
3A15A9
Yes
3A15A10
Yes
3A14A1
No
All type 7 identical - 7 in LU 2, 3 in LU 3, 8 in LU 4 (18 Total)
3A15A11
Yes
7-14
NAVAIR 01-75PAC-12
EQUIPMENT/ MODULE/ PART SUBSYSTEM Multipurpose Display Logic TACCO/SS3 Timing DESIGNATOR 3A16 3A16A1 NOMENCLATURE Multipurpose Display Logic Assembly Module Assembly Type 25 Module Assembly Type 28 FUNCTION TACCO Display Timing TACCO/SS Timing 9-Stage Margin Register Counter; Trans B 21-29; IR B 21-29 Timing and Control Logic; Word 1, 2; CH07 ODR Mon 2; 1 MHz Clock Function and Field Decoder; IR B 03, 04; Control 1, 2 (TACCO) Field Register and 3 Stage Word Counter; IR B 15-18; FLD B 15-18; TACCO Pwr Init Timing and Control Logic; IR B 03, 04, 17-20; 1 MHz, 500 KHz Clk; TACCO Pwr Init; Word 1, 2; INT Vector, Video Clk Set Register A 4-Stage Video Counter; 500 MHz Clock; TACCO 2 MHz Clk; TACCO Pwr Init; INT Video; Video Clk Digital to Analog Converter; TACCO Pwr Init; Vector Sweep Enbl; Vector Unblk; INT Vector Unblk Signal Gating and Drivers B; INT Video; INT ACH 1-4 Defl, VID Enbl; ACH 1-4 Defl, VID Enbl Signal Gating and Drivers A; IR B 06-16; Word 2; Vector Slope B 01-09; INT Vector Slope B 01-09 Signal Gating and Drivers C; CH07 VER, On-L, ODR; Word 2; IR B 17; CHAR 1 Enbl; 1 Hz Clock Diagnostic Gating A-slope, Video Unblank Bit to MTL 3A7; Loop 1-5; TACCO DN B 06-11; Control 1, 2 (TACCO); INT Vector slope B 04-09; INT 1-4 VID Enbl IN-FLIGHT SPARES No Yes IDENTICAL ITEMS FOR ALTERNATE REPAIR 3A10 (all respective modules) All type 25 identical - 10 in LU 3, 11 in LU 4 (21 Total) All type 28 identical - 3 in LU 3 (3 Total) EQUIPMENT/ MODULE/ PART SUBSYSTEM DESIGNATOR 3A16A12 NOMENCLATURE Module Assembly Type 14 FUNCTION Diagnostic Gating B-slope, Deflection and Axis Bits to 3A7; Loop 1-5; TACCO DN B 00-05; IR B 00-05; Word 1-3; INT Vector Slope B 01-03; INT ACH 1-4 Defl Enbl TACCO Display Logic Type Timing IN-FLIGHT SPARES Yes IDENTICAL ITEMS FOR ALTERNATE REPAIR All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 Total)
3A16A2
No
3A16A3
Yes
All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 Total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 Total) All type 29 identical - 4 in LU 3 (4 Total)
Multipurpose Display Logic Assembly Type Timing
3A17
Multipurpose Display Logic Assembly, Type Timing Module Assembly Type 5
No
3A11
3A17A1
3A16A4
Yes
Control Line Drivers; Strd Output B 06-14; Mon Vert Pos B 01-09;Vert Pos B 01-09; Enbl XY Pos & Char 4-6 Y Gross Position Register - to Position Drivers; Trans Y Pos Ctr; Trans Output B 06-14; Strd Output B 06-14 9-Stage Y Position Counter; Vert Pos Ctr Clk; Trans Out B 06-14; IR B 06-14 Character Decoder; CHAR 1-4 Enbl; IR B 00-29; Char B 01-06; Char 01-06; Mon Char Sel B 01-06 Character Gating Drivers; Spot, Focus; Char Focus; Cursor Focus; Mon Spot Focus; Mon Char Focus; Mon Cursor Focus Diagnostic Gating to 3A12; TACCO Pwr Init; Anlg CH Enbl; Char B 01-06 Diagnostic Gating Multiplexer to MTL 3A7/3A8; TACCO DN B 18-23; Loop 1-5; IR B 24-29; Mon Char Sel B 01-06; Mon X Pos B 04-09; Mon Vert Pos B 04-09 Timing and Control; Horiz Pos Ctr Clk; Vert Pos Ctr Clk; Trans Y, X Pos Ctr; TACCO Pwr Init Five Stage Character Counter; Char Ctr Clk; Char 2-5 Enbl; TACCO Pwr Init
Yes
3A16A5
No
3A17A2
Yes
3A16A6
Yes
3A17A3
Yes
3A17A4 Yes All type 19 identical - 8 in LU 3, 2 in LU 4 (10 Total) 3A17A5 Yes All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 Total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 Total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 Total) 3A17A6
3A16A7
Yes
3A16A8
Yes
3A16A9
Yes
Yes
3A17A7
Yes
3A16A10
Yes
3A16A11
Yes
3A17A8
No-Use from 3A10, 3A11 Yes
All type 29 identical - 4 in LU 3, (4 Total)
3A17A9
7-15
NAVAIR 01-75PAC-12
EQUIPMENT/ MODULE/ PART SUBSYSTEM DESIGNATOR 3A17A10 NOMENCLATURE Module Assembly Type 25 FUNCTION 9-Stage X Position Counter; Trans Output B 21-29; Horiz Pos Ctr; Trans B 21-29; IR B 21-29 Gross Position Register; Trans Output B 21-29; Strd Output B 21-29 Control Line Drivers; Strd Output B 21-29; Mon X Pos B 01-09; Horiz Pos B 01-09; Enbl XY Pos & Char 1-3 TACCO Display Logic Data Input Bits 00-09 Input Register to 3A16/3A17; IR B 00-09; A1, A3; Test B 00-09; CH07 Output B 00-09 Bits 20-29 Input Register to 3A16/3A17; IR A1, A2 Diagnostic Gating Logic; TACCO ON B 12-17, Loop 1-5; IR B 12-23; Char 1-5 Enbl; TACCO CSL B 01-03, Mon X, Vert Pos B 01-03 Bits 10-19 Input Register; IR OA3, OA4, B 10-19; Test B 10-19; CH07 Output B 10-19 Signal Gating - D; CT 5, 8; Type Tst Enbl, B 15, 18-20; MTX Tst Enbl B 15-19; Align Tst Enbl, B 17-20; Conic Tst Enbl, B 17, 18; Vector Tst Enbl, B 15-17 Clock Control; CH07 ODR Mon 2, On-L; Test Ctr Clk; 500 kHz Clk; Test B 03, 04, 15-20 Counter Decoder; CT 1A4A, 5-8; Type Tst B 00; 04, 11, 15, 19, 20, 22, 24, 26-28; Conic Tst B 06-11, 14, 17, 18, 21-29; MTX Tst B 15-20; Align Tst B 15-20; Vector B 06-17, 21-29 IN-FLIGHT SPARES Yes IDENTICAL ITEMS FOR ALTERNATE REPAIR All type 25 identical - 10 in LU 3, 11 in LU 4 (21 Total) EQUIPMENT/ MODULE/ PART SUBSYSTEM DESIGNATOR 3A18A8 NOMENCLATURE Module Assembly Type 14 FUNCTION Signal Gating - B; CT 3A, 4A, 5, 6; Test B 11-14; 21-23; Type Tst Enbl, B 11, 22, 26, 27; Conic Tst Enbl, B 11, 21-25 Vector Tst Enbl, B 06-14, 16, 21-24, 26-28 Signal Gating - C; CT 1A, 2A, 3A; Test B 24-29; Type Tst Enbl, B 24, 26-28; Conic Tst Enbl, B 14, 21-29 Signal Gating - A; Test B 00-10; CT 1A-3A, 6-8; MTX, Align Tst Enbl; Type Tst Enbl, B 00, 03-05; Conic Tst Enbl, B 06-10; Vector Tst Enbl B 06-13 Trigger Generator and Test Decoder; CH07 OA MCP; CT 1A, 4A, 5-8; TACCO CSL B 01-03; MTX, Align, Vector Conic Tst Enbl; Anlg CH Enbl 8-Stage Counter; Tst Ctr Clk; CT 5, 6; CH07 ODR Mon 2 Provides power for all subassemblies +5 vdc Regulator IN-FLIGHT SPARES Yes IDENTICAL ITEMS FOR ALTERNATE REPAIR All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 Total)
3A17A11
Yes
3A17A12
Yes
3A18A9
Yes
Multipurpose Display Logic Data Input
3A18
Multipurpose Display Logic Assembly, Data Input Module Assembly Type 9
No
3A12
3A18A10
Yes
3A18A1
Yes
All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 Total) 3A18A11 All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 Total) All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 Total) Module Assembly Type 3
Yes
3A18A2
Yes
3A18A3
Yes
3A18A12
Module Assembly Type 9 Power Supply Assembly, Logic Unit Regulator Assembly 5 vdc Regulator Assembly 5 vdc Fuse, Cartridge 8 Amp
Yes
All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 Total) 1PS1, 2PS1 1PS1A1, 1PS1A2, 1PS1A3, 2PS1A1, 2PS1A2, 2PS1A3, 3PS1A2, 3PS1A3 1PS1A1, 1PS1A2, 1PS1A3, 2PS1A1, 2PS1A2, 2PS1A3, 3PS1A1, 3PS1A3 One each in 3PS1A2, 3PS1A3. Same in 1PS1 and 2PS1 1PS1A1, 1PS1A2, 1PS1A3, 2PS1A1, 2PS1A2, 2PS1A3, 3PS1A1, 3PS1A2 Same in 1PS1 and 2PS1 Same in 1PS1 and 2PS1
3A18A4
Yes
LU 3 Power Supply
3PS1 3PS1A1
Yes No
3A18A5
Yes
3PS1A2
+5 vdc Regulator
No
3A18A6
Yes
All type 16 identical - 2 in LU 1, 2 in LU 2, 12 in LU 3, 5 in LU 4 (21 Total) All type 27 identical - 2 in LU 3 (2 Total)
3PS1A1F1, A2F1, A3F1 3PS1A3
Protection for Regulators, one in each in 3PS1A1, A2, A3 +5 vdc Regulator
No
Regulator Assembly 5 vdc Rectifier and Filter Assembly Protection Module Assembly Control Assembly Regulator, 5 vdc Regulator Assembly, 15 vdc and 6 vdc Fuse, Cartridge
No
3A18A7
No-Use 3A12A7
3PS1A4 3PS1A5
14.5 vac 3, 400 Hz In +17 vdc Out Protect PS from Over and Under-Voltage and Overload 3 Rectifier and Filter +15 vdc and +6 vdc Protection for 3PS1A7
No No
3PS1A6 3PS1A7 3PS1A7F1 (276004)
No No No
Same in 1PS1 and 2PS1 Same in 1PS1 and 2PS1 Same in 1PS1 and 2PS1
7-16
NAVAIR 01-75PAC-12
EQUIPMENT/ MODULE/ PART SUBSYSTEM DESIGNATOR 3PS1A8 3PS1A8F1 (273804) 3PS1DS1 Internal Power Source +12 vdc Unregulated Power Supply 3PS2 3PS3 NOMENCLATURE Regulator Assembly -15 vdc and -10 vdc Fuse, Cartridge Lamp Incandescent CM8-815AS15 Internal Power Source Assembly 12 vdc Unreg Assembly FUNCTION -15 vdc and -10 vdc Protection for 3PS1A8 Power Supply Lamp System Initialize Voltage ac for MCP, dc for 3PS1 12 vdc Unreg for LU 3 for Lamps and Relay Drivers IN-FLIGHT SPARES No No No No No IDENTICAL ITEMS FOR ALTERNATE REPAIR Same in 1PS1 and 2PS1 Same in 1PS1 and 2PS1 Same in 1PS1 and 2PS1 Same in 1PS2 and 2PS2 Same in 1PS3 and 2PS3
7-17/(7-18 blank)
SECTION 8
LOGIC UNIT 4
THIS SECTION CONTAINS DATA APPLICABLE TO AIRCRAFT BUNO 158928 AND 159503 THROUGH 161596 NOT INCORPORATING AFC 506 OR AFC 607
NAVAIR 01-75PAC-12
(RACK D3) MX-9360/AYA-8B DATA ANALYSIS LOGIC UNIT (LU4) (RACK D2) CP-901(V)( )/ASQ-114 (V) DIGITAL DATA COMPUTER (CENTRAL COMPUTER) (SEE SECTION 4) A1J69 CH 13 INPUT DATA AND CONTROLS A1J73 CH 14 INPUT DATA AND CONTROLS 12J9 CH 13 OB 0- 15-8, -29 12J24 A1J77 CH 15 INPUT DATA AND CONTROLS A1J85 CH 13, 14, 15 OUTPUT CONTROL A1J81 GROUP 3 OUTPUT DATA, CH 12 OUTPUT CONTROL CH 06 INPUT DATA AND CONTROLS, (HAWK II DIAGNOSTICS) 12J23 CH 14 INPUT DATA CH 14 OUTPUT DATA SCC SI CH 14 CONTROLS CH 14 INPUT DATA CH 13 CONTROL MONITOR DM CH 2 IB 12-17, IDR, ODR, OA, IA CH 13 OB 0-29 CH 15 OB 0-29 (FS 440) TB 452 POWER SUPPLY (12PS1) CH 15 CONTROL MONITOR CH 15 INPUT DATA AND CONTROLS CH 15 OUTPUT CONTROLS POWER SUPPLY (12PS2) FL1 CONTROL 2J7 115 VAC 3 12J11 DRUM POWER ASSEMBLY (12A32) DRUM AUXILIARY MEMORY SUBUNIT (DAMS) (12A2, 12A5-12A15) 12J16 DATA MULTIPLEXER SUBUNIT (DMS) (12A17-12A21, 12A24-12A26) DM CH5 INPUT SPARE 3 12J6 DM CH5 OUTPUT SPARE 3 12J17 DM CH6 INPUT SPARE 4 12J4 DM CH6 OUTPUT SPARE 4 12J21 DM CH7 INPUT SPARE 5 (RACK D1) A511 2 A383 1 POWER DISTRIBUTION BOX (SEE NAVAIR 01-75PAC- -2) -122J8 OVERTEMP SHUTDOWN 12J1 DM CH7 OUTPUT SPARE 5 12J19 OMEGA DATA 12J2 OMEGA COMMANDS 7 7 12J14 SPARE COMPUTER CHANNEL (SCC) (12A3, 12A4) CH 14 CONTROLS CH 14 INPUT DATA CH 14 OUTPUT DATA AND CONTROL 12J22 12J7 DM CH 2 INPUT DATA (00-11) 12J8 SPARE COMPUTER CHANNEL 14 VIDEO INPUT 12J18 MAINTENANCE CONTROL PANEL/MAINTENANCE CONTROL PANEL LOGIC (MCP/MCPL) (12A1) AUXILIARY DISPLAY LOGIC (ADL) (12A27-12A30) 12J12 HORIZONTAL INPUT 12J13 VERTICAL INPUT 12J25 UNBLANK INPUT 1J3 1J4
(SENSOR STATION 1 AND 2) IP-886/ASA-66( ) TACTICAL DATA DISPLAY
-75PAC- -4) -121J5 (SEE NAVAIR 015 1J7
A1J75
12J10
(TACCO STATION) 2J1 960907 TACCO AUX POWER CONTROL (SEE NAVAIR 01-75PAC- -2) -1212J26 MDM OVERTEMP PS2 OVERTEMP PS1 OVERTEMP
(RACK G1) 1J1 OR-90/ARN-99(V) OMEGA RECEIVER-CONVERTER (SEE NAVAIR 01-75PAC- -3) -126
DRUM POWER ASSY ENABLE DRUM CONT SI
MDM O/T SHUTDOWN (12A33) SI AND POWER SWITCHING ASSEMBLY (12A33)
MDM SI, DRUM CONT SI DM SI
1J2
NOTE
1 2 3 4 5 6 7 AIRCRAFT BUNO 158928, 159503 THROUGH 161131 AIRCRAFT BUNO 161132 AND SUBSEQUENT AIRCRAFT BUNO 160290 AND SUBSEQUENT AND AIRCRAFT INCORPORATING AFC 405 AIRCRAFT BUNO 160290 AND SUBSEQUENT AIRCRAFT BUNO 158928, 159503 THROUGH 161596 NOT INCORPORATING AFC 450 REMOVED ON AIRCRAFT INCORPORATING AFC 610 CAPPED AND STOWED ON AIRCRAFT INCORPORATING AFC 610
(RACK B1) 12J20 HARPOON COMMANDS 12J3 HARPOON DATA J2 CP-1138( )(V)1/UYK DATA PROCESSOR COMPUTER (DPC) (HACLCS) 3
(SEE NAVAIR 01-75PAC- -6) -12(RACK F1)
12J15 SRS DATA 12J5 SRS COMMANDS
J2
J3
R-1997/ARS-3 RECEIVER-CONVERTER (SEE NAVAIR 01-75PAC- -4) -124
CONTROLS CONSIST OF ONE OR MORE OF THE FOLLOWING TERMS FROM CENTRAL COMPUTER CONTROLS DATA EIE, OA, EF, IA OB 00-29 TO CENTRAL COMPUTER EI, ODR, EFR, IDR IB 00-29 DM CH 0 TEST LOOP
Figure 8-1. LU 4 Signal Flow Diagram 8-1
NAVAIR 01-75PAC-12
(RACK D1) DPS ELECTRONIC CIRCUIT BREAKER PANEL LOGIC UNIT NO. 4 A B C PWR DISTR BOX DC (TACCO STATION) TACCO AUX POWER CONTROL LOGIC UNITS 4 (FS 440) 2J1 TB452 G OFF D DC N M J K U L MDM OVERTEMP MDM OVERTEMP RET PS1 OVERTEMP PS1 OVERTEMP RET PS2 OVERTEMP PS2 OVERTEMP RET 12J26 1 2 4 5 6 7 CHAS CHAS 115 VAC C 115 VAC B 115 VAC A D10 LU 4 POWER ON 28 VDC N 2K13 AC SAFETY SAFETY P10 12A33 MDM OVERTEMP SHUTDOWN 2J8 F 115 VAC NEUTRAL J1 N P CHAS J1 PS1 SWITCHED 12 VDC FL3 J B M CHAS P H A AC CHAS C3 C1 B3 B1 A3 A1 X2 12A32 P9 DRUM POWER ASSEMBLY PHASE A DS1 (XDS1) A PUSH TO RESET CB1 C2 AC B2 A2 DRUM POWER PHASE B PHASE C 115 VAC A 115 VAC B 115 VAC C (RACK D1) POWER DISTRIBUTION BOX (RACK D3) 2J7 V R D 115 VAC A 115 VAC B 115 VAC C 115 VAC NEUTRAL 12J11 2 4 6 8 1 LU 4 115 VAC A 115 VAC B 115 VAC C 115 VAC NEUTRAL R1 R2 R3 1 2 3 4 FL1 A B C D 115 VAC A 115 VAC B 115 VAC C 115 VAC NEUTRAL PS1 SWITCHED 12 VDC A B C D E
2J9 ZU EE FF
DS2 (XDS2) A
DS3 (XDS3) A
SHEET 2
SHEET 2
12A2
DRUM MEMORY P2
12A2FL2 DRUM POWER J11 1 2 3 MDM A MDM B MDM C C K N
X1 DC
K1
8-2
NAVAIR 01-75PAC-12
(RACK D1) LU 4 (CONT) ELAPSED TIME MAIN POWER CB1 A B C D E 115 VAC A 115 VAC B 115 VAC C 115 VAC NEUTRAL PS1 SWITCHED 12 VDC J27 6 24 TB1 DAMS 5 VDC 27 34 37 44 PS1 400 HZ SIG DAMS +6 VDC DAMS -10 VDC DAMS +15 VDC 42 17 36 16 12PS1 POWER P1 SUPPLY ASSY P1 2 3 4 5 22 9 8 45 14 15 25 35 38 CHAS P8 J2 H SCC 5 VDC SW K J27 115 VAC NEUTRAL 115 VAC C 115 VAC B 115 VAC A PS1 OVERTEMP PS1 12 VDC UNREG TB4 POWER CONTROL J30 GRD J30 CHAS 115 VAC A 115 VAC B 115 VAC C 115 VAC NEUTRAL PS2 OVERTEMP FAN B1 METER MAIN POWER M1 A DS1 (XDS1) J28 5 4 3 2 22 38 CHAS PS1 400 HZ SIG RET SIG PS1 12 VDC UNREG RET SIG J1 U ZS ZU ZW ZY ZT ZR T V ZZ P C 12A31 SI AND POWER SWITCHING P7 IF 12PS1 12 VDC UNREGULATED VOLTAGE FAILS, 12PS2 AUTOMATICALLY PROVIDES POWER TO MCP AND SCC P7 J1 HH EE BB FF ZC ZA X ZB Z ZD DD M B D PS 400 HZ SIG PS 400 HZ SIG RET 12 VDC UNREG 1 12 VDC UNREG 1 RET 12 VDC UNREG 2 12 VDC UNREG 2 RET MCP & SCC -10 VDC MCP & SCC 6 VDC MDM OVERTEMP MDM OVERTEMP RET B C D E F G H J MCP & SCC 5 VDC A
12PS2 POWER SUPPLY P1
SHEET 1
SHEET 1
12A6 COMPUTER INPUT
XA6 15 123 35 73 103 7 65 129 SIG
12A5 COMPUTER INPUT
XA5 15 123 35 73 103 7 65 129 SIG
12A12 DATA CONTROL
XA12 135 100 35 73 103 7 65 129 SIG
12A13 INSTRUCTION CONTROL 1
XA13 91 66 35 73 103 7 65 129 SIG
XA14 12A14 INSTRUCTION CONTROL 2 51 67 35 73 103 7 65 129 SIG 12A11 INSTRUCTION STATUS XA11 35 73 103 7 65 129 SIG
12A33 MDM OVERTEMP SHUTDOWN
J1
P10 A F H SIG ZB PS1 12 VDC UNREG RET CHAS
12A7 DATA PATH
XA7 35 73 103 7 65 129 48 SIG
12A8 DATA PATH
XA8 35 73 103 7 65 129 47 SIG
12A9 ADDRESS
XA9 35 73 103 7 65 129 SIG
12A10 ERROR STATUS
XA10 35 73 103 7 65 129 SIG
12A11 INSTRUCTION STATUS
XA11 35 73 103 7 65 129 SIG
8-3
NAVAIR 01-75PAC-12
DMS 6 VDC DMS -10 VDC 12A1 MCP J110 5 10 48 11 TB3 A MCP & SCC 5 VDC 79 82 83 84 85 B C D E F G H J SIG J111 56 65 45 35 46 36 MCP & SCC -10 VDC 5 8 11 S1 SCC XA3 1 103 73 35 123 15 7 65 129 SIG 12A4 OUTPUT INTERFACE XA4 1 103 73 35 123 15 7 65 129 SIG SIG J108 48 5 10 11 79 82 83 84 85 J109 5 11 74 82 83 84 85 SIG SIG P2 SIG ADL 5 VDC SW 12A1A1 MCP BOARD A P1 J112 48 5 10 11 74 82 83 84 85 J113 5 11 74 82 83 84 85 DMS -10 VDC DMS 6 VDC DMS 5 VDC P6 SIG 2 5 8 11 ADL S2 1 3 4 6 7 9 10 12 SIG ADL 5 VDC SW ADL 6 VDC SW ADL -10 VDC SW ADL 5 VDC SW TB4 DMS -15 VDC DMS 15 VDC 12A1A3 MCP BOARD C P5 POWER CONTROL J33 PWR MON J33 4 6 7 9 10 12 MCP & SCC 6 VDC SCC -10 VDC SCC 5 VDC SW SCC 6 VDC 48 54 5 53 11 74 82 83 84 85 SIG J28 PS2 400 HZ SIG PS2 12 VDC UNREG DMS -10 VDC DMS 6 VDC DMS 5 VDC TB2 42 9 36 17 24 27 44 34 37 26 16 45 35 25 15 8 14 12PS2 POWER SUPPLY P1 P4 ADL 15 VDC SW ADL -15 VDC SW ADL 9 VDC SW PS2 400 HZ SIG PS2 400 HZ SIG RET PS2 12 VDC UNREG PS2 12 VDC UNREG RET PS2 12 VDC UNREG PS2 12 VDC UNREG RET COM DMS -10 VDC DMS 6 VDC DMS 5 VDC J1 E A L H ZE ZF ZM ZJ ZP ZK ZH ZX CC AA ZV DMS 15 VDC DMS -15 VDC ADL GND SW S K W 12A1A2 MCP BOARD B P3 DMS 5 VDC ADL 9 VDC SW ADL -15 VDC SW ADL 15 VDC SW 12A31 P7 SYSTEM INITIALIZE AND POWER SWITCHING
A B C D E F
P8
J2 ZB ZA ZD SIG ADL 5 VDC SW G
PS 400 HZ SIG PS 400 HZ SIG RET 12 VDC UNREG 1 12 VDC UNREG 1 RET 12 VDC UNREG 2 12 VDC UNREG 2 RET MCP & SCC -10 VDC MCP & SCC 6 VDC
SCC 5 VDC SW
12A3 INPUT INTERFACE
H J K L
8-4
NAVAIR 01-75PAC-12
A B C D E F
DMS 6 VDC DMS -10 VDC DMS 5 VDC ADL 9 VDC SW ADLS -15 VDC SW ADLS 15 VDC SW XA30 33 39 ADL 5 VDC SW 35 73 103 ADL -10 VDC SW ADL 6 VDC SW 37 123 15 7 16 129 SIG XA29 ADL 5 VDC SW 35 73 103 7 65 129 SIG SIG XA28 ADL 5 VDC SW ADL -10 VDC SW ADL -15 VDC SW ADL 15 VDC SW ADL 6 VDC SW 3 4 93 94 57 58 25 26 43 44 21 ADL 6 VDC 22 SIG XA18 XA27 ADL 6 VDC ADL 15 VDC SW ADL -15 VDC SW ADL 6 VDC ADL 5 VDC SW 22 21 25 26 57 58 43 44 3 4 12A27 Y ANALOG 1 2 20 48 92 135 136 SIG SIG 15 123 1 35 73 103 7 65 129 SCC: 12A18 DM DATA GATE POWER DISTRUBUTION POWER SUPPLY 12PS1 DAMS: COMPUTER INPUT COMPUTER INPUT DATA PATH DATA PATH ADDRESS ERROR STATUS INSTRUCTION STATUS DATA CONTROL INSTRUCTION CONTROL 1 INSTRUCTION CONTROL 2 INSTRUCTION CONTROL 3 INPUT INTERFACE OUTPUT INTERFACE BOARD A BOARD B BOARD C 12A5 12A6 12A7 12A8 12A9 12A10 12A11 12A12 12A13 12A14 12A15 12A3 12A4 12A1A1 12A1A2 12A1A3 POWER SUPPLY 12PS2 ADL: X ANALOG Y ANALOG ADL DATA CONTROL TIMING & CONTROL DM DATA GATE DM DATA GATE DM DATA GATE DM DATA GATE INPUT INTERFACE *INPUT INTERFACE *INPUT INTERFACE INSTRUCTION & CONTROL OUTPUT INTERFACE 12A27 12A28 12A29 12A30 12A17 12A18 12A19 12A20 12A21 12A22 12A23 12A24 12A25 12A26 12A28 X ANALOG 1 2 20 48 92 135 136 SIG XA20 15 123 1 35 73 103 7 65 129 57 SIG 12A20 DM DATA GATE XA23 12A23 INPUT INTERFACE (NOT 123 INSTALLED) 15 1 35 73 103 7 65 129 SIG XA26 15 123 1 35 73 103 7 65 129 12A26 OUTPUT INTERFACE 12A29 ADL DATA CONTROL SIG XA19 15 123 1 35 73 103 7 65 129 57 12A19 DM DATA GATE XA22 12A22 INPUT INTERFACE (NOT 123 INSTALLED) 15 1 35 73 103 7 65 129 SIG XA25 15 123 1 35 73 103 7 65 129 SIG 12A25 INSTRUCTION AND CONTROL 12A30 TIMING AND CONTROL XA17 15 123 1 35 73 103 7 65 129 57 12A17 DM DATA GATE XA21 15 123 1 35 73 103 7 65 129 SIG 12A21 INPUT INTERFACE XA24 15 123 1 35 73 103 7 65 129 SIG 12A24 I/O SELECTION AND CONTROL
POWER CONTROL J35 PWR MON J35 G ADL 5 VDC SW
DMS:
H J K L
ADL 5 VDC SW ADL 6 VDC SW ADL -10 VDC SW ADL 5 VDC SW
MCP:
*ASSEMBLIES 12A22 AND 12A23 NOT SUPPLIED.
8-5
NAVAIR 01-75PAC-12
(RACK D3) LU 4 (RACK D2) CENTRAL COMPUTER PROVIDES DATA STORAGE AND CONTROL FUNCTIONS A1J77 CH 15 INPUT DATA CH 15 INPUT CONTROLS A1J85 CH 15 OUTPUT CONTROL A1J81 GROUP 3 OUTPUT DATA 8 12J14 12J7 MAGNETIC DRUM CONTROLLER (MDC) (12A5 - 12A15) COMPUTER INPUT MULTIPLEXER MULTIPLEXES DATA BEING READ FROM DRUM TO COMPUTER. AND MONITORS INPUT DATA FROM MDM. PROVIDES MULTIPLEXING OF MDC AND MDM STATUS WORDS. (12A5 & 12A6) MAINTENANCE CONTROL PANEL MULTIPLEXES OUTPUT DATA FROM COMPUTER AND MONITORS INPUT DATA FROM MDM. PROVIDES CONTROL OVER INTERFACE INPUT/OUTPUT CONTROL. (12A1) MODE CONT ON-LINE, VERIFY INPUT/OUTPUT CONT MON MONITOR WRITE DATA READ DATA MAGNETIC DRUM MEMORY (MDM) (12A2)
ADDRESS LOGIC STORES BEGIN AND END ADDRESSES. INCREMENTS BEGIN ADDRESS. COMPARES BEGIN AND END ADDRESSES. SUPPLIES TRACK ADDRESS TO MDM AND SUPPLIES WORD ADDRESS AND CONTROLS TO MDC. (12A19) DATA PATH SYNCHRONIZES DRUM DATA TRANSFER RATE TO COMPUTER DATA TRANSFER RATE AND VICE VERSA THROUGH USE OF TWO 32 WORD STORAGE REGISTERS. DEVELOPS BUFFER STATUS, EMPTY, LOADING, FULL OR UNLOADING FOR BOTH BUFFERS A AND B. (12A7 & 12A8) READ/WRITE CONTROL
68
BACK PANEL ASSEMBLY PROVIDES INTERCONNECT BETWEEN MDC AND MDM. TEST POINTS 1 6 11 J1 20 VDC J2 - VDC -5 J3 BCN J4 MV1 J5 CLKSEL 1 J6 12 VDC J7 GND J8 HPN 5 10 15 J9 TMC1N J10 CLKSEL 2 J11 5 VDC J12 SPARE J13 SPARE J14 MV1 J15 WADN (12A2A7)
MOTOR SPEED DETECTION AND MOTOR POWER MANUAL SELECTIONS AND INDICATIONS MAINTENANCE PANEL ASSEMBLY (12A2A6) ELECTRONIC PAGE ASSEMBLY PARITY DETECTOR I/O CIRCUITS AND REGISTERS, TRACK ADDRESS DECODE, QUAD HEAD SELECT, PARITY AND PREAMBLE DETECTOR, READ LOGIC, BYTE AND WORD CLOCK, AND TACHOMETER PULSE. (12A2A1) BIT CLOCK PULSES TO TEST POINTS READ/WRITE DATA, CLOCK PULSES, CHANNEL SELECTION CLOCK READ CHANNEL MAGNETIC DRUM ASSEMBLY CONTAINS 384 ADDRESSABLE TRACKS WITH 1024 WORD ADDRESSES PER TRACK. THE HEAD ASSEMBLIES, TEMPERATURE SWITCHES, PRESSURE SWITCH, ACCELEROMETERS, DRUM MOTOR AND ELAPSED TIME INDICATOR ARE IN THIS ASSEMBLY. (12A2A3) STATIC INVERTER UNIT 115 VAC 3 MOTOR SPEED DETECTION AND MOTOR POWER (12A2A5)
CH 15 OB 0-18
60
12J23
CONTROL
ELECTRONIC PAGE ASSEMBLY READ/WRITE DATA CHANNELS, CLOCK READ CHANNELS, BASIC CLOCK HOME PULSE, X-CLOCK, Y-CLOCK, AND READ/WRITE CHANNEL SELECT (1-8). (12A2A2) LOW VOLTAGE POWER SUPPLY PROVIDES 5 VDC, - VDC, -5 12 VDC AND 20 VDC AND POWER FAULT DETECTION (12A2A4)
COMPUTER INPUT MULTIPLEXER MULTIPLEXES DATA BEING READ FROM DRUM TO COMPUTER. AND MONITORS INPUT DATA FROM MDM. PROVIDES MULTIPLEXING OF MDC AND MDM STATUS WORDS. (12A5 & 12A6) DATA CONTROL LOGIC TIMING CONTROL OA, EF, IA AND CLOCKS BUFFER CLOCKS AND DRUM OB 0-7 INSTRUCTION CONTROL
INSTRUCTION CONTROL LOGIC DEVELOPS CHAN 15 EFR AND EI. RETIMES DRUM CLOCK SIGNALS. DEVELOPS I/O CONTROL SIGNALS AND ERROR REGISTER CLOCKS. STORES AND CONTROLS READ/WRITE INSTRUCTIONS. GENERATES MULTIPLEXER ENABLE SIGNALS AND TIMING CONTROL SIGNALS. (12A13, 12A14, 12A15) STATUS LOGIC DETECTS AND STORES ANY CHANGE AND CAUSES STATUS WORD TO BE REPORTED TO COMPUTER. (12A10 & 12A11)
TO COMPUTER CONTROLS CHANNEL 15 EFR AND EI DATA CONT - MULTIPLEXER ENABLES ODR, EI PARITY, DRUM AND MDC STATUS AND ERROR COUNT
5 VDC, - VDC, -5 12 VDC AND 20 VDC TO TEST POINTS 5 VDC, - VDC, -5 12 VDC AND 20 VDC
DEVELOPS ODR AND IDR INTERFACE CONTROL SIGNALS AND PROVIDES I/O BUFFER CONTROL SIGNALS AND CLOCKS. (12A12)
(SEE LU 4 OVERALL POWER DISTRIBUTION FUNCTIONAL SIGNAL FLOW DIAGRAM
115 VAC 3
RFI FILTER
B1 FAN
ELAPSED TIME INDICATOR (ET1)
8-6
Figure 8-3. LU 4 Drum Auxiliary Memory Subunit (DAMS) Functional Signal Flow Diagram
NAVAIR 01-75PAC-12
(RACK D2) CENTRAL COMPUTER A1J85 CH13 OUTPUT CONTROLS A1J69 CH13 INPUT CONTROLS CH13 INPUT DATA A1J81 GROUP 3 OUTPUT DATA AND CH12 OUTPUT CONTROLS 12J23 12J18 12J14
(RACK D3) LU 4
MCP (12A1)
CH13 INPUT DATA CH13 IA, OA DM CH2 EI
DATA MULTIPLEXER SUB UNIT (12A17-12A26)
DM CH2 ODR
DM CH2 OA
DM CH2 IDR
DM CH2 IA
(SENSOR STATION 2) DM IB 12-17 9 2J1 TACTICAL DATA DISPLAY CONTROL
40 HZ SYNC CH13 IA, OA ADL SI CH13 OB 00-29 CH13 OB 14-29 LOOP 1-5 DM CH2 ODR, EI, IDR, IA DM CH2 IB 06-11 VIDEO ADL SI 1 HZ FLASH ADL 40 HZ SYNC 1.536 MHZ ADL CLR TIMING AND CONTROL (12A30) ENBL CNTR BITS CLK SYMBOL EDC CLK ENBL Y RASTER BITS X RASTER BITS 12J25 4X ROM CHARACTER GENERATOR (12A29) UNBLANK 1J7 ADL DIAGNOSTIC AND CONTROL (12A1A3) BRIGHTNESS VIDEO CONTROL 1J2
(SENSOR STA. 1 AND 2) TACTICAL DATA DISPLAY
SULP
ADL INIT
OAS
12J24
1J3
MODE ADD CH13 OB 26-29 ADL OA
M10
MODE ADDRESS AND STORAGE (12A30) LOAD CONIC
CH13 OB 00-08 CH13 OB 15-23 CH13 OB 00-08 CH13 OB 15-23 INCREMENT GEN (12A29) GP0-GP7 INCREMENT
CON/CHAR VERT CON/CHAR HORIZ (12A29) VERT G POSITION HORIZ G POSITION (12A29) CLR AND SET GP VERT G POS HORIZ G POS INCREMENT CLR AND SET GP
MODE 2 AND CONIC (12A29)
CONIC/CHARACTER D/A CONVERTER (12A27, 12A27)
Y FILTER (12A27)
VERTICAL SUMMING NETWORK (12A27) HORIZONTAL SUMMING NETWORK (12A28)
12J13 VERTICAL
1J5
X FILTER (12A28)
12J12 HORIZONTAL
1J4
GROSS POSITION D/A CONVERTER (12A27)
Figure 8-4. LU 4 Auxiliary Display Functional Signal Flow Diagram, Aircraft BUNO 158928 and 159503 through 161596 Not Incorporating AFC 450
8-7
NAVAIR 01-75PAC-12
(RACK D3) LU 4 12J18 COMPUTER CH13 INPUT 12J14 COMPUTER CH13, 14, 15 INPUT CONTROL INPUT 12J12 12J13 HORIZONTAL INPUT 12A24 12A25 12A17 12A24 12A17 12A17, 12A18, 12A24, 12A25, 12A26 12A24 12A24 12A25 12A17 12A17, 12A21 ADL (12A27-12A30) VERTICAL INPUT VIDEO INPUT UNBLANK INPUT 12J24 12J25 12J15 SONOBUOY REFERENCE SYSTEM INPUT (DM CHANNEL 1) 12J5 SONOBUOY REFERENCE SYSTEM OUTPUT (DM CHANNEL 1) 12J6 DM CH5 INPUT SPARE (NO. 3) 12J6 DM CH5 OUTPUT SPARE (NO. 3) 12J4 DM CH6 INPUT DATA DM CH6 IDR, EI, IA, EIE DM CH3 ODR, EFR, OA, EF DM CH4 ODR, EFR, OA, EF DM CH7 ODR, EFR, OA, EF DM CH3, 4, 7 OUTPUT DATA 3 DMS INPUT INTERFACE (12A23) DM CH6 INPUT DATA DM CH6 IDR, EI, IA, EIE DM CH6 OUTPUT SPARE (NO. 4) 12J17 DM CH6 INPUT SPARE (NO. 4) 12J12 OMEGA OUTPUT DM CH0 TEST LOOP (IFPM) 12J3 HACLSC OUTPUT 12J1 DM CH7 OUTPUT SPARE (NO. 5) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
MCP (12A1)
CH13 IA, EIE CH13 INPUT DATA CH13 IDR, EI
CH13 ODR, EFR SYS INITIALIZE AND MCP CONTROL ODR, EFR. IDR, EI, MONITOR CH13 OUTPUT DATA CH13 OA, EF CH13 IA, EIE SYS INITIALIZE AND MCP CONTROL DM CH2 INPUT DATA DM CH2 ODR, EI, IDR, OA, IA DM CH1 INPUT DATA DM CH1 IDR, EI, IA, EIE DM CH1, 5, 6 ODR, EFR, OA, EF DM CH5 INPUT DATA DM CH5 IDR, EI, IA, EIE DMS INPUT INTERFACE (12A21) SENSOR STATION 1 AND 2 AUXILIARY DISPLAY
DM CH1 INPUT DATA DM CH1 IDR, EI, IA, EIE DM CH1, 5, 6 OUTPUT DATA DM CH1, 5, 6 ODR, EFR, OA, EF DM CH5 INPUT DATA DM CH5 IDR, EI, IA, EIE
12J19 15 OMEGA INPUT DM CH3 INPUT DATA
12A21, 12A25 DATA MULTIPLEXER SUBUNIT (12A12-12A17, 12A24-12A26) 12A24 12A17, 12A18, 12A19, 12A20, 12A25 12A17, 12A22, 12A25 12A22, 12A24, 12A25 12A24, 12A25 12A17, 12A18, 12A19, 12A20, 12A25 12A24, 12A25 12A17, 12A18, 12A19, 12A20, 12A25 12A17, 12A23 12A23, 12A24, 12A25 12A24, 12A24 12A25 12A24 12A24 12A24,12A17, 12A25
DMS OUTPUT INTERFACE (12A26) 3 DMS INPUT INTERFACE (12A21)
12J20 2 HACLCS INPUT
DM CH3 IDR, EI, IA, EIE DM CH4 INPUT DATA DM CH4 IDR, EI, IA, EIE DM CH7 INPUT DATA
12J21 DM CH7 INPUT SPARE (NO. 5)
DM CH7 IDR, EI, IA, EIE
NOTE
BUNO 160290 AND SUBSEQUENT BUNO 158928, 150503 THROUGH 160289 INCORPORATING AFC 405 AND BUNO 160290 AND SUBSEQUENT ASSEMBLIES 12A22 AND 12A23 NOT SUPPLIED 12A17 DATA GATE 0- 26 -5, 12A18 DATA GATE 6-11, 27 12A19 DATA GATE 12-17, 28 12A20 DATA GATE 18-23, 29 12A21 INPUT INTERFACE 12A22 DMS INPUT INTERFACE 12A23 DMS INPUT INTERFACE 12A24 I/O SELECT AND CONTROL 12A25 INSTRUCTIONS AND CONTROL 12A26 OUTPUT INTERFACE BUNO 158928 AND 150503 THROUGH 161596 NOT INCORPORATING AFC 450 REMOVED ON AIRCRAFT INCORPORATING AFC 610.
8-8
Figure 8-5. LU 4 Data Multiplexer Subunit (DMS) Functional Signal Flow Diagram
NAVAIR 01-75PAC-12 START

IS (MAIN POWER) LAMP ON
YES
SET (MAIN POWER) CIRCUIT BREAKER 12CB1 OFF
IS 12PS2 (POWER OUT) LAMP ON
YES
DID 12PS1 CIRCUIT BREAKER TRIP
NO
YES
SET (SCC) SWITCH S1 ON SET 12PS1 CIRCUIT BREAKER CB1 OFF

IS (POWER SUPPLY) PS1 POWER OUT LAMP ON
NO
NO SET 12PS1 INTO 12PS2 MOUNTING POSITION
YES LOGIC UNIT PRIMARY POWER WIRING PROBLEM
NO SET POWER SUPPLY 12PS2 INTO 12PS1 MOUNTING POSITION
SET 12PS1 AND 12PS2 MAIN POWER CIRCUIT BREAKERS OFF
IS BLOWER 12B1 OPERATING
NO
LOGIC UNIT PRIMARY POWER WIRING DIAGRAM
YES
IS MCP (MODE SELECTOR ON LINE) LAMP ON
YES
YES SET DRUM POWER ASSEMBLY CIRCUIT BREAKER 12A32CB1 OFF REPLACE (MAIN POWER) LAMP 12DS1 SET 12PS2 CIRCUIT BREAKER CB1 ON
NO SET POWER SUPPLY 12PS2 CIRCUIT BREAKER CB1 ON TROUBLE IN DM, SCC, OR ADL
NO SET 12PS1 CIRCUIT BREAKER CB1 ON
IS 12PS1 (POWER IN) LAMP ON
YES
SET (SCC) SWITCH S1 TO (OFF) SET POWER SUPPLY 12PS2 CIRCUIT BREAKER CB1 ON SET (ADL) SWITCH S2 TO (OFF)
YES
NO CHECK (POWER IN) LAMP CONDITION
TROUBLESHOOT POWER SUPPLY 12PS1
NO
YES TROUBLE IN DAMS
SET DRUM POWER ASSEMBLY CIRCUIT BREAKER 12A32CB1 ON
NO TROUBLE IN DMS OR MCP YES
SET 12PS2 CIRCUIT BREAKER CB1 OFF
IS (POWER IN) LAMP GOOD
NO
REPLACE 12PS1 (POWER IN) LAMP
IS MEMORY DRUM OPERATING
YES YES
IS MCP (MODE SELECTOR ON LINE) LAMP ON
SET (MAIN POWER) CIRCUIT BREAKER 12CB1 ON
NO SET POWER SUPPLY 12PS1 INTO 12PS2 MOUNTING POSITION NO SET POWER SUPPLY 12PS1 CIRCUIT BREAKER CB1 ON
YES
DID (MAIN POWER) CIRCUIT BREAKER 12CB1 TRIP
NO REPLACE MDM O/T SHUTDOWN ASSEMBLY 12A33
NO
SET POWER SUPPLY 12PS2 INTO 12PS1 MOUNTING POSITION
NO
REPLACE S1 AND POWER SWITCHING CONTROL 12A31
DOES (MAIN POWER) CIRCUIT BREAKER TRIP
YES SET (ADL) SWITCH S2 ON LOGIC UNIT PRIMARY POWER WIRING PROBLEM SET POWER SUPPLY CIRCUIT BREAKER CB1 ON
YES
YES REMOVE POWER SUPPLY 12PS1
NO REPLACE DRUM POWER ASSEMBLY 12A32
YES
YES
END
YES
SET MAIN POWER CIRCUIT BREAKER 12CB1 ON
NO
NO TROUBLE IN ADL, DM, OR MCP CIRCUIT NO LOGIC UNIT PRIMARY WIRING PROBLEM
YES
NO
LOGIC UNIT PRIMARY POWER WIRING PROBLEM
NO LOGIC UNIT PRIMARY POWER WIRING PROBLEM
YES REMOVE POWER SUPPLY 12PS2 TROUBLESHOOT POWER SUPPLY 12PS2 NO SET (MAIN POWER) CIRCUIT BREAKER 12CB1 ON
SET POWER SUPPLY 12PS1 CIRCUIT BREAKER ON
YES
NO YES
TROUBLE IN PRIMARY POWER WIRING, BLOWER B1, METER M1 OR CIRCUIT BREAKER CB1
TROUBLE IN MCP OR DAMS
NOTE
PANEL MARKINGS INDICATED BY PARENTHESES
Figure 8-6. LU 4 Power Distribution Troubleshooting Procedures
8-9
NAVAIR 01-75PAC-12 START

MEASURE VOLTAGE BETWEEN 12PS1J5 (CUR SENSE) AND 12PS1J4 (CUR RTN) IS VOLTAGE 60V, 14 KHZ SQUAREWAVE
A
YES
MEASURE VOLTAGE BETWEEN 12PS1J10 (12 VA) AND 12PS1J7 (GND) MEASURE VOLTAGE BETWEEN 12PS1J6 (+5V) AND 12PS1J7 (GND)
SEE NOTES BEFORE PROCEEDING WITH TEST
NO
IS VOLTAGE +300 MV OR GREATER
NO
SET POWER SUPPLY CIRCUIT BREAKER CB1 ON
REPLACE ASSEMBLY 12PS1A2
IS VOLTAGE +12V
YES
IS VOLTAGE +5V
YES
YES
MEASURE VOLTAGE BETWEEN 12PS1J2 (SW REGT) AND 12PS1J7 (GND)
NO
MEASURE VOLTAGE BETWEEN 12PS1J5 (CUR SENSE) AND 12PS1J4 (GND)
NO
MEASURE VOLTAGE BETWEEN 12PS1J2 (SW REGT) AND 12PS1J7 (GND)
IS (POWER OUT) LAMP ON
YES
NO
REPLACE (POWER OUT) LAMP
YES
IS VOLTAGE 300 MV OR GREATER
NO
MEASURE VOLTAGE BETWEEN 12PS1J10 (12 VA) AND 12PS1J7 (GND)
IS VOLTAGE 60 VPP, 10KHZ SQUAREWAVE
YES
NO
DOES POWER SUPPLY CIRCUIT BREAKER 12PS1CB1 TRIP
NO
IS VOLTAGE +12V
YES
YES
YES
NO
IS (POWER IN) LAMP ON
MEASURE VOLTAGE BETWEEN 12PS1J3 (CONV) AND 12PS1J7 (GND)
NO REPLACE ASSEMBLY 12PS1A4

MEASURE VOLTAGE BETWEEN 12PS1J3 (CONV) AND 12PS1J7 (GND)
YES NO
YES
IS VOLTAGE 120 VPP, 10 KHZ
NO
REPLACE (POWER IN) LAMP
NO
YES
MEASURE VOLTAGE BETWEEN 12PS1J10 (12VA) AND 12PS1J7 (GND)
IS VOLTAGE 120 VPP, 10 KHZ SQUAREWAVE
YES
NO
IS VOLTAGE +12V
YES
YES NO
SEE NOTE 3
NO
REPLACE 12PS1 AND RETURN TO START
NOTE
MEASURE VOLTAGE BETWEEN 12PS1J6 (+5V) AND 12PS1J7 (GND)
NO
IS POWER SUPPLY CIRCUIT BREAKER 12PS1CB1 ON
YES
YES
REPLACE POWER SUPPLY 12PS1
1. 2.
BEFORE PROCEEDING WITH TEST, VERIFY 115 VAC 3 POWER IS AVAILABLE TO POWER PLUG PS1P1. POWER SUPPLY PS1 IS SPECIFIED THROUGHOUT THESE INSTRUCTIONS; HOWEVER, ALL TESTS ARE EQUALLY APPLICABLE TO POWER SUPPLY PS2. CHECK VOLTAGES AT FOLLOWING TEST POINTS TO PS1J7(GND); PS1J6 (+5V), PS1J9 (+6V), PS1J1 (+15V), PS1J12 (-15V), PS1J13 (-10V), PS1J8 (+12V). NO-FAULT SIGNAL ROUTING INDICATED BY HEAVY LINE. ALL OTHER SIGNAL ROUTING INCIDENT TO DETECTED FAULT. PANEL MARKINGS INDICATED BY PARENTHESES.
YES
NO
TURN ON POWER SUPPLY CIRCUIT BREAKER 12PS1CB1
ARE ALL VOLTAGES PRESENT
NO REPLACE 12PS1 AND RETURN TO START
IS VOLTAGE +5V
YES
3.

NO
4.
NO
YES
YES REPLACE ASSEMBLY 12PS1A2
NO
END
5.
YES
END Figure 8-7. LU 4 Power Supply Troubleshooting Procedures (Sheet 1 of 2)
8-10
NAVAIR 01-75PAC-12
A
MEASURE VOLTAGE BETWEEN 12PS1J9 (+6V) AND 12PS1J7 (GND) MEASURE VOLTAGE BETWEEN 12PS1J11 (+15V) AND 12PS1J7 (GND) MEASURE VOLTAGE BETWEEN 12PS1J12 (-15V) AND 12PS1J7 (GND) MEASURE VOLTAGE BETWEEN 12PS1J13 (+10V) AND 12PS1J7 (GND) MEASURE VOLTAGE BETWEEN 12PS1J18 (+12V) AND 12PS1J7 (GND)
IS VOLTAGE +6V
YES
IS VOLTAGE +15V
YES
IS VOLTAGE -15V
YES
IS VOLTAGE -10V
YES
IS VOLTAGE +12V
YES
END
MEASURE VOLTAGE BETWEEN 12PS1J12 (-15V) AND 12PS1J7 (GND)
IS VOLTAGE +6V
YES
IS VOLTAGE +15V
YES
IS VOLTAGE -15V
YES
IS VOLTAGE -10V
YES
IS VOLTAGE +12V
YES
IS VOLTAGE +15V
YES
IS VOLTAGE -15V
YES
IS VOLTAGE -10V
YES
Figure 8-7. LU 4 Power Supply Troubleshooting Procedures (Sheet 2 of 2)
8-11
NAVAIR 01-75PAC-12
NOTE
STATIC INVERTER UNIT 12A2A5 CARRYING HANDLE LIMITED OPERATION IS POSSIBLE WHEN THE +6V, +15V, -15V, OR -10V OUTPUT IS MISSING. IF ONLY THE -15V OUTPUT IS MISSING. DRUM (DAMS) OPERATION REMAINS AVAILABLE PROVIDED THE POWER SUPPLY WITH THE MISSING -15V OUTPUT IS PLACED IN THE 12PS1 LOCATION IN LU 4. IF ANY LU 4 SHORT CIRCUITS ARE ENCOUNTERED AND REPAIRED. POWER SUPPLY CIRCUITS BREAKERS CB1 MUST BE RETOGGLED TO INITIALIZE THE LU 4. DRUM POWER ASSEMBLY 12A32
PUSH TO RESET J108 J109 J110 J111 J112 J113
J29 TB2 TB1
FL2J1
LOGIC PAGE ASSEMBLY 12A2A1 DRUM ASSEMBLY 12A2A3 10 DRUM POWER
SW REGT CONV CUR RTN CUR SENSE +5V GND IN OUT POWER
J28
J27
CIRCUIT BREAKER CB1
TB3
TB4
READ/WRITE CHANNEL PAGE ASSEMBLY 12A2A2 CARRYING HANDLE CAUTION

DO NOT REMOVE DRUM UNTIL AT LEAST 2 MINUTES HAVE ELAPSED AFTER MDM POWER GOES OFF DETAIL
PHASE A
PHASE B
PHASE C
OFF
AIR INLET/FILTER
DETAIL B 12PS1/12PS2 POWER SUPPLY (FRONT PANEL) AIR FILTER
LU 4 (REAR VIEW)
C
A
SLIDE
MAGNETIC DRUM ASSEMBLY 12A2
AIR FILTER
MEMORY PROTECT
POWER CONTROL MAINTENANCE CONTROL PANEL 12A1
SLIDE 12A1A3 12A1A2 12A3 12A4 DETAIL 12A1A1 12A17 12A18 12A19 12A20 12A21 BLANK PANEL BLANK PANEL 12A24 12A25 12A26 12A27 12A28 12A29 12A30 12PS1 12PS1 POWER SUPPLY POWER SUPPLY 12A31 12A33
D
ACCESS PANEL REMOVED FOR CLARITY A MAGNETIC DRUM ASSEMBLY 12A2
12A5 12A6 12A7 12A8 12A9 12A10 12A11 12A12 D 12A13 12A14
12A1A3
12A1A2
12A1A1
13 14
13 13
14 13
14 25 37
18
30 30
14
14 14 14 14
37 12 12
12 12 13
14 13 13 14 13
A A A 12 11 10
A9 A8
A7 A6 A5 A4 A3 A2 A1
A A A 12 11 10
A9 A8
A7
A5 A4 A3 A2 A1
A A 11 10
A9 A8
A7 A6 A5 A4 A3 A2 A1
12A15 BLANK PANEL
C MAINTENANCE CONTROL PANEL (TOP VIEW)

DETAIL
LU 4 (RIGHT HAND SIDE VIEW)
LU 4 (FRONT VIEW)
8-12
Figure 8-8. LU 4 Module Location Diagram
NAVAIR 01-75PAC-12 8-1. LU 4 MDC TM-3 OFF-LINE TEST PROCEDURES.

1. 2. 3. 4. 5. 6. 7. 8. 9. 10. At POWER CONTROL panel, set MAIN POWER and ADL switches up. At MCP, set MODE SELECTOR to OFF LINE, set CHANNEL selector to DAMS, set all other MCP switches down or OFF, and press ENTER. Verify OFF LINE and DAMS indicators are on. Press RESET CHANNEL and CONTROL switches, and verify CONTROL EFR switch-indicator is on. Set MCP DATA REGISTER to 01000 000008, and press CONTROL EF switch-indicator. Verify CONTROL ODR switch-indicator is on. Press RESET MCP switch. Press all MCP DATA REGISTER switch-indicators (29 to 0). Press CONTROL OA switch-indicator. Verify CONTROL IDR switch-indicator and all COMPUTER DATA INPUT register indicators are on (29 to 0). e. f. Verify CONTROL EFR switch-indicator is on. At MDM MCP, perform the following steps: 5. (1) (2) Set REMOTE-MAN 1-MAN 2 switch to MAN 1. Verify ENABLE switch is down. capability.) Press RESET control switch. Press START control switch. 10. (5) MDM TM 1 should now be in progress. Approximate run time is 2.5 minutes. TRACK ADDRESS, TCV/MODE, and DATA indicators should be flashing. A normal completion would be indicated by all TRACK ADDRESS and TCV/MODE indicators off, DATA indicators 2 and 4 on, and red ERROR indicator off. 11. Press RESET DATA switch. Set a data pattern in the MCP DATA REGISTER. If the corresponding bits in the COMPUTER DATA INPUT register also come on, the data paths are good. Bits 24 and 25 in COMPUTER DATA INPUT register do not come on. (Enables error detect 6. 7. 8. 9. (4) Press RESET CONTROL. Press CONTROL EF switch-indicator. Press RESET CONTROL and DATA switches. Set MCP DATA REGISTER to 51000 000008. (Sets DMS channel test.) Press CONTROL EF switch-indicator. c. d. Verify OFF LINE and DAMS indicators are on. Press all RESET pushbutton switches. 2.
NOTE
Any other condition could indicate an error or fault in the MDC or MDM. To isolate, perform MDM TM 1 from the MDM MCP. From MDM MCP: a. b. Disconnect 12J29. At LU 4 MCP, set MODE SELECTOR to OFF LINE, set CHANNEL selector to DAMS, and press ENTER.
g.
To return LU 4 to an on-line condition, reconnect 12J29, press all RESET switches, set MDM MCP REMOTE-MAN 1-MAN 2 switch to REMOTE, and set MODE SELECTOR switch to ON LINE.
8-3.
LU 4 DMS CHANNEL 3 AND 4 LOOP TEST. NOTE

When the DMS is taken off line, it automatically comes up in DMS Channel 0 loop test. The following procedure is for Channel 3 output and Channel 4 input. 1. 2. At POWER CONTROL panel, set all switches up. At MCP, set MODE SELECTOR to OFF LINE, set CHANNEL selector to DMS, and press ENTER. Verify that OFF LINE, DMS, EFR, and ODR indicators are on. Set MCP DATA REGISTER to 43000 000348. (Selects Channel 3 for output data and Channel 4 for input data.)
3. 4.
NOTE
If all indicators are on, the check is good. If one or more fail to come on, see NAVAIR 01-75PAC-2-5.1.1 for further troubleshooting. 11. To return LU 4 to an on-line condition, press all RESET switches and set MODE SELECTOR switch to ON LINE.
8-2.
LU 4 MDM TM 1 OFF-LINE TEST PROCEDURES.

1. From LU 4 MCP: a. b. c. d. e. f. g. h. Set MODE SELECTOR to OFF LINE, set CHANNEL selector to DAMS, and press ENTER. Set all toggle switches down. Verify OFF LINE and DAMS indicators are on. Press all RESET pushbutton switches, and verify CONTROL EFR switch-indicator is on. Set MCP DATA REGISTER to 03000 000008. (Sets MDM TM 1.) Press CONTROL EF switch-indicator. MDM TM 1 should now be in progress. Approximate running time is 2.5 minutes. Normal completion is indicated by the CONTROL El switch-indicator being on with a status word of 01XXX XX0008 in the COMPUTER DATA INPUT register. (X indicates bits may or may not be set.) (6) (3)
NOTE
Failure of bits in the COMPUTER DATA INPUT register to set in response to the corresponding bit in the MCP DATA REGISTER could indicate a fault. See NAVAIR 01-75PAC-2-5.1.1 for further troubleshooting. 12. To return LU 4 to an on-line condition, set MODE SELECTOR to ON LINE.
NOTE
If step f(6) passes, a probable failure in MDC is indicated. A fault detected in running of the MDM TM 1 from the LU 4 MCP, and MDM MCP, could indicate a failure in the MDM. See NAVAIR 01-75PAC-2-5.1.1 for further troubleshooting.
Figure 8-9. LU 4 Offline Troubleshooting Procedures
8-13
NAVAIR 01-75PAC-12
MODULE TYPE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47
FUNCTION Switch Encoder and Enter Generator Not Used Decoder and Buffers Input Amplifiers and Gating Data and Control Line Drivers, and Gating Timing and Control Exclusive OR Relay Drivers Universal Register Data Multiplexer R.S. Register MCP Control Module MCP Gated Input Amplifiers Data Transfer and MultipIexer SRL Interface Expanded Input Gating Deflection Signal 91 ohm Driver Clock Generator and Drivers Video and Unblank 91 ohm Digital Driver Digital to Analog Converters for Conics, Vectors Butterworth Filter Deflection Signal 91 ohm Driver Special Gating and Interface Digital to Analog Converter for Gross Position High Speed Synchronous Counter PDL - Timing and Control Gating MPD - Auto-Test Gating MPDL - End of Operation Detector and ODR Generator MPDL - Type Mode Timing Gates Digital Integrator and Change of Status Detector Precision Reference, Voltage Regulator and Character Size Control Special Test Timing and Control Logic Not Used Not Used Shift Register MTC - Decoder Function Register MTC - Status Register and Special Gating MTC - Data Path Gating and Storage MTC - Tape Mark Decoder MTC - Control Register Logic MTC - Control Register Logic MTC - Control Register Logic MTC - Control Register Logic MTC - Special Timing and Control Logic MTC - Gap Timer Decoder ADL Character Generator Line Drivers and Receivers TOTAL EACH MODULE TYPE PER SUBUNIT OR ASSEMBLY (LOGIC UNIT 4) MODULE TYPE 3 MAINTENANCE CONTROL PANEL Board A Board B Board C DRUM AUXILIARY MEMORYSUBUNIT Computer Input Computer Input Data Path Data Path Address Error Status Instruction Status Data Control Instruction Control 1 Instruction Control 2 Instruction Control 3 SPARE COMPUTER CHANNEL Input Interface Output Interface DATA MULTIPLEXER SUBUNIT Data Gate 0-5, 26 Data Gate 6-11, 27 Data Gate 12-17, 28 Data Gate 18-23, 29 Input Interface Select and Control Instruction and Control Output Interface AUXILIARY DISPLAY LOGIC Y-Analog X-Analog Data Control Timing and Control TOTAL EACH MODULE TYPE 12A27 12A28 12A29 12A30 1 5 28 24 1 5 2 8 38 8 1 1 4 2 1 8 15 1 5 2 1 2 2 2 2 2 1 1 11 1 1 2 1 8 1 27 14 1 3 1 1 1 1 1 1 1 1 1 4 4 9 11 224 12A17 12A18 12A19 12A20 12A21 12A24 12A25 12A26 1 1 3 3 3 3 4 2 2 1 2 2 2 2 1 1 1 4 4 4 1 1 1 1 1 1 1 1 1 1 1 6 6 6 6 5 12 11 5 12A3 12A4 4 1 1 4 5 5 12A5 12A6 12A7 12A8 12A9 12A10 12A11 12A12 12A13 12A14 12A15 2 2 2 2 2 3 1 1 3 1 4 2 3 2 2 2 4 5 2 1 4 7 1 3 4 7 4 4 1 1 1 2 2 4 4 4 4 7 7 12 8 9 11 11 12 10 12A1A1 12A1A2 12A1A3 2 3 1 4 4 5 7 9 10 11 12 13 14 16 17 18 19 20 21 23 24 25 26 30 31 35 37 44 46 47 4 4 2 5 3 1 1 2 1 1
TOTAL MODULES PER SUBUNIT OR ASSEMBLY
SUBUNIT/ASSEMBLY
ASSEMBLY NO.
11 11 12
8-14
NAVAIR 01-75PAC-12
10
10
25 7
9 25 7
25 16 16
25
44 44 44 44 9
37
44 9 37 44 47
44 9
37 9 44 37
A 10
A8
A6
A4
A2
A 11
A8
A5
A2
A A A 12 11 10 A9 A8 A7 A6 A5 A4 A3 A2 A1
A 12
A 10 A9 A8 A7 A6 A5
A3
A1
A A A 12 11 10 A9 A8
A6 A5 A4 A3 A2 A1
J12 J11 J10 J9 J8 J7 J22 J21J20 J19 J18
J6
J12 J11 J10 J9 J8 J7 J22 J21J20 J19 J18
J6 J5 J4 J3 J2 J1 J17 J16 J15 J14 J13
J12 J11 J10 J9 J8 J7 J22 J21J20 J19 J18
J6 J5 J4 J3 J2 J1 J17 J16 J15 J14 J13
J12 J11 J10 J9 J8 J7 J22 J21J20 J19 J18
J6 J5 J4 J3 J2 J1 J17 J16 J15 J14 J13
J12 J11 J10 J9 J8 J7 J22 J21J20 J19 J18
J6 J5 J4 J3 J2 J1 J17 J16 J15 J14 J13
SCC INPUT INTERFACE (12A3)
DAMS COMPUTER INPUT (12A5, 12A6)
DAMS ADDRESS (12A9)
DAMS INSTRUCTION STATUS (12A11)
DAMS INSTRUCTION CONTROL 1 (12A13)
35
35
35
35
37 9
25 25
25 37 25
25
47 37 44 37 37 9 37 37 37 9
37
37 37 37 37 9
37 37 37 47
3 3
A 10
A8
A6
A4
A2
A A 12 11
A9
A7
A5
A3
A1
A A 12 11
A9 A8
A6 A5 A4
A1
A A 11 10 A9 A8 A7 A6 A5 A4 A3 A2 A1
A A A 12 11 10 A9 A8 A7 A6 A5 A4 A3 A2 A1
J12 J11 J10 J9 J8 J7 J22 J21J20 J19 J18
J6 J5 J4 J17 J16 J15
J12 J11 J10 J9 J8 J7 J22 J21J20 J19 J18
J6 J5 J4 J3 J2 J1 J17 J16 J15 J14 J13
J12 J11 J10 J9 J8 J7 J22 J21J20 J19 J18
J6 J5 J4 J3 J2 J1 J17 J16 J15 J14 J13
J12 J11 J10 J9 J8 J7 J22 J21J20 J19 J18
J6 J5 J4 J3 J2 J1 J17 J16 J15 J14 J13
J12 J11 J10 J9 J8 J7 J22 J21J20 J19 J18
J6 J5 J4 J3 J2 J1 J17 J16 J15 J14 J13
SCC OUTPUT INTERFACE (12A4)
DAMS DATA PATH (12A7, 12A8)
DAMS ERROR STATUS (12A10)
DAMS DATA CONTROL (12A12)
Figure 8-11. LU 4 Subassembly Module Location Diagram (Sheet 1 of 2)
8-15
NAVAIR 01-75PAC-12
37 37 44 44 37 9
44 44 9
37
14 23 4 16
24
17
21
20
7 14
9 14 9
46
A A A 12 11 10 A9 A8 A7
A5 A4 A3
A1
A 10
A8
A6
A4
A2
A A 12 11
A9 A8 A7 A6 A5 A4 A3 A2 A1
A10
A6
A4
A1
A A A 12 11 10 A9 A8 A7 A6
A4
A2
J12 J11 J10 J9 J8 J7 J22 J21J20 J19 J18
J6 J5 J4 J3 J2 J1 J17 J16 J15 J14 J13
J12 J11 J10 J9 J8 J7 J22 J21J20 J19 J18
J6
J12 J11 J10 J9 J8 J7 J22 J21J20 J19 J18
J6 J5 J4 J3 J2 J1 J17 J16 J15 J14 J13
J12 J11 J10 J9 J8 J7 J22 J21 J18
J12 J11 J10 J9 J8 J7 J22 J21J20 J19 J18
J6 J5 J4 J3 J2 J1 J17 J16 J15 J14 J13
DMS INPUT INTERFACE (12A21)
DMS INSTRUCTION CONTROL (12A25)
ADL Y ANALOG (12A27)
ADL DATA CONTROL (12A29)
10
5 14 23
4 16
37 9
31
17
21
20
11 26
14 44 16 19 19 9
25
A 11
A9
A7
A5
A3
A1
A A A 12 11 10 A9 A8 A7 A6 A5 A4 A3 A2 A1
A 10
A8
A6
A4
A2
A8
A6
A4
A1
A A A 12 11 10
A8 A7 A6 A5 A4 A3 A2 A1
J12 J11 J10 J9 J8 J7 J22 J21J20 J19 J18
J6 J5 J4 J3 J2 J1 J17 J16 J15 J14 J13
J12 J11 J10 J9 J8 J7 J22 J21J20 J19 J18
J6 J5 J4 J3 J2 J1 J17 J16 J15 J14 J13
J12 J11 J10 J9 J8 J7 J22 J21J20 J19 J18
J6 J5 J4 J17 J16 J15
J12 J11 J10 J9 J8 J7 J18
CHARACTER
J12 J11 J10 J9 J8 J7 J22 J21J20 J19 J18
J6 J5 J4 J3 J2 J1 J17 J16 J15 J14 J13
WIDTH HEIGHT
DMS DATA GATE (12A17, 12A18, 12A19, 12A20)
DMS I/O SELECT AND CONTROL (12A24)
DMS OUTPUT INTERFACE (12A26)
ADL X ANALOG (12A28)
ADL TIMING AND CONTROL (12A30)
8-16
Figure 8-11. LU 4 Subassembly Module Location Diagram (Sheet 2 of 2)
NAVAIR 01-75PAC-12
Maintenance Control Panel
DESIGNATOR
12A1 12A1A1
NOMENCLATURE
Maintenance Control Panel MCP Board A
FUNCTION
Controls modes of operation of LU 4 Outputs Data, Spare Logic Test, MCP Acknowledge and Mode Control Channel Control, Group 3 output bits 00 thru 13 Special Test Instruction Select bits 00 thru 13 Ouput Data, Spare Logic Test, MCP Acknowledge and Mode Control Channel Control Group 3 output bits 00 thru 13 Special Test Instruction Select bits 00 thru 13 Channel Control Group 3 outputs bits 00 thru 13 Channel, Mode and Reset Select logic, ODR/OA Control Generation, Data Reset and Control Reset Generation Channel, Mode and Reset Select logic, IDR/IA Control Generation EFR/EF Control Generation and Verify Data Strobe Generation EI/EIE/IA Control Generation, Special Test logic for channel 13 and 15 off-line and multiple word Special Test logic channels 13 and 15 off-line and multiple word Computer Input Data Select, and Clock Generation
IN-FLIGHT SPARES
No No

None None

12A1A2A1
NOMENCLATURE
FUNCTION
Computer Data Input Select, bits 00 thru 11 logic and control Computer Data Input Selects bits 00 thru 11, SCC Computer Data input Inverters Bits 00 thru 29 Computer Data Input Select bits 12 thru 23 logic and control Computer Data Input Select, bits 12 thru 23 logic and control SCC Computer Data Input Inverters Bits 00 thru 29 Computer Data Input Select, bits 24 thru 29 logic control, SCC Computer Data Input Inverters Bits 00 thru 29 Power Monitor
IN-FLIGHT SPARES
Yes

12A1A2A2
Yes
12A1A1A1
Module Assembly Type 13 Module Assembly Type 14 Module Assembly Type 13 Module Assembly Type 13 Module Assembly Type 14 Module Assembly Type 13 Module Assembly Type 12
Yes
All type 13 identical - 8 in LU 1, 8 in LU 2, 8 in LU 3, 8 in LU 4 (32 total) All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 total) All type 13 identical - 8 in LU 1, 8 in LU 2, 8 in LU 3, 8 in LU 4 (32 total) All type 13 identical - 8 in LU 1, 8 in LU 2, 8 in LU 3, 8 in LU 4 (32 total) All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 total) All type 13 identical - 8 in LU 1, 8 in LU 2, 8 in LU 3, 8 in LU 4 (32 total) All type 12 identical - 3 in LU 1, 4 in LU 2, 3 in LU 3, 4 in LU 4 (14 total) 12A1A2A7 12A1A2A3 Module Assembly Type 14 Module Assembly Type 14
12A1A1A2
Yes
Yes
12A1A1A3
Yes
12A1A2A4
Yes
12A1A1A4
Yes
12A1A2A5
12A1A1A5
Yes
Yes
12A1A1A6
Yes
Yes
12A1A1A7
Yes
All type 30 identical - 13 in LU 1, 12 in LU 2, 3 in LU 3, 2 in LU 4 (30 total) All type 30 identical - 13 in LU 1, 12 in LU 2, 3 in LU 3, 2 in LU 4 (30 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 18 identical - 1 in LU 1, 1 in LU 2, 1 in LU 3, 1 in LU 4 (4 total) None
12A1A2A8
System Intialize, 40 Hz and 40 Hz sync generator 1 Hz Generator, Power Monitor 40 Hz and 40 Hz sync generator 1 Hz Generator, 40 Hz and 40 Hz Sync Generator and Power Monitor High Frequency Clock Generator, Power Monitor, 40 Hz and 40 Hz Sync Generator System lnitialize, High Frequency Clock Generator 40 Hz and 40 Hz Sync Generator Output Data, ADL diagnostics and computer acknowledge
Yes
12A1A2A9 Yes All type 12 identical - 3 in LU 1, 4 in LU 2, 3 in LU 3, 4 in LU 4 (14 total) All type 12 identical - 3 in LU 1, 4 in LU 2, 3 in LU 3, 4 in LU 4 (14 total) All type 12 identical - 3 in LU 1, 4 in LU 2, 3 in LU 3, 4 in LU 4 (14 total) 12A1A2A12 Yes All type 37 identical - 16 in LU 2, 27 in LU 4 (43 total) 12A1A3 No None
Yes
12A1A1A8
12A1A2A10
Yes
12A1A1A9
Yes
12A1A2A11
Yes
12A1A1A10
Yes
Yes
12A1A1A11
Module Assembly Type 37 MCP Board B
MCP Board C
No
12A1A2
1. 2.
NOTE Yes in the In-flight Spares column indicates a spare is available in the in-flight maintenance kit. No indicates that no spare is available. All modules/units listed are replaceable in flight.
8-17
NAVAIR 01-75PAC-12
12A1A3A1
NOMENCLATURE
FUNCTION
Diagnostic and output acknowledge control, ADL IDR, ODR and sync control, ADL diagnostic Loop Control Diagnostic and output acknowledge control, ADL IDR, ODR and sync control ADL IDR, ODR and sync control, diagnostic time slot counter ADL Diagnostic Multiplexer, Input Control select lDR, ODR, clock and sync control Input Control Select
IN-FLIGHT SPARES
Yes


12A2A1
NOMENCLATURE
Electronic Page Assembly
FUNCTION
I/O Circuits and Registers, Track Address Decode, Quad Head Select, Parity and preamble detector, Read logic, Byte and word clock and tachometer pulse Read/Write Data and Clock Read Channels, and Timing Generation (including basic, X - and Y - Clocks and Read/Write channel selection) Read/Write heads, temperature and pressure switches, accelerometer drum motor and ElapsedTime Indicator Provides +5, -5, +12 and -20 volts and power fault detection Motor speed detection and motor power Channel 14 (Spare Computer Channel) Input Channel 14 Input Interface Channel 14 Input Interface Channel 14 Input Interface Channel 14 Input Interface Channel 14 Input Interface Channel 14 (Spare Computer Channel) Output Channel 14 Output Interface
IN-FLIGHT SPARES
No

None
12A1A3A2
No
All type 37 identical - 16 in LU 2, 27 in LU 4 (43 total) 12A2A2 Electronic Page Assembly
No
None
12A1A3A3
Yes
All type 25 identical - 10 in LU 3, 11 in LU 4 (21 total) All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 total) All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) All type 13 identical - 8 in LU 1, 8 in LU 2, 8 in LU 3, 8 in LU 4 (32 total) All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 total) All type 13 identical - 8 in LU 1, 8 in LU 2, 8 in LU 3, 8 in LU 4 (32 total) All type 13 identical - 8 in LU 1, 8 in LU 2, 8 in LU 3, 8 in LU 4 (32 total) All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 total) All type 13 identical - 8 in LU 1, 8 in LU 2, 8 in LU 3, 8 in LU 4 (32 total) None Spare Computer Channel Subunit
12A1A3A4
Yes
12A2A3
Magnetic Drum Assembly
No
None
12A1A3A5
Module Assembly Type 4 Module Assembly Type 4 Module Assembly Type 13 Module Assembly Type 14 Module Assembly Type 13 Module Assembly Type 13 Module Assembly Type 14 Module Assembly Type 13 Magnetic Drum Memory
Yes
12A2A4
Low Voltage Power Supply Static Inverter Unit Input Interface
No
None
12A1A3A6
Output Control Select, DMS Master Clear Channel Control output bits 14 thru 29 Special Test Instructions Select Channel Control Output bits 14 thru 29 Channel Control output bits 14 thru 29 and Special Test Instructions Special Test Instruction Select Channel Control output bits 14 thru 29 To provide additional computer memory capacity
Yes
12A2A5 12A3
No No
None 12A21
12A1A3A7
Yes
12A1A3A8
Yes
12A3A2
Module Assembly Type 4 Module Assembly Type 4 Module Assembly Type 4 Module Assembly Type 4 Module Assembly Type 5 Output Interface Module Assembly Type 5
Yes
All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) All type 4 identical - 9 in LU 1. 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) None All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total)
12A1A3A9
Yes
12A3A4
Yes
12A1A3A10
Yes
12A3A6
Yes
12A1A3A11
Yes
12A3A8
Yes
12A1A3A12
Yes
12A3A10
Yes
Drum Auxiliary Memory Subunit
12A2
No
12A4 12A4A2
No Yes
8-18
NAVAIR 01-75PAC-12
12A4A6
NOMENCLATURE
Module Assembly Type 5 Module Assembly Type 5 Module Assembly Type 4 Computer Input
FUNCTION
Channel 14 Output Interface Channel 14 Output Interface Channel 14 Output Interface Channel 15 Computer Input DAMS Computer Input Multiplexer Bits 00 thru 22 Channel 15 EFR and ODR Control, Computer Input Multiplexer Bits 00 thru 22 DAMS Computer Input Multiplexer Bits 00 thru 22 DAMS Computer Input Multiplexer Bits 00 thru 14 Channel 15 Computer Input DAMS Computer Input Multiplexer Bits 15 thru 22 Channel 15 El and IDR Control and DAMS Computer Input Multiplexer Bits 15 thru 22 DAMS Computer Input Multiplexer Bits 15 thru 22 Channel 14 Output Interface DAMS Computer Input Multiplexer Bits 15 thru 22 Channel 15 Data Path
IN-FLIGHT SPARES
Yes

All type 5 identical - 12 in LU 1, 21 in LU 2,18 in LU 3, 24 in LU 4 (75 total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) 12A6

12A7A1
NOMENCLATURE
FUNCTION
Buffer Storage Data Path Channel 15 Output and Buffer Bits 00, 08, 15, 23, Byte and Buffer Data Select Buffer Storage Data Path Channel 15 Output and Buffer Bits 01, 09, 16, and 24, Byte and Buffer Data Select Data Path Parity Generator Channel 15 Output Bits 00 thru 14 Buffer A Word Counter and Decoder, Data Path Parity Check, Check Buffer Output Bits 00 thru 14 Buffer Storage Data Path Channel Output and Buffer Bits 02, 10, 17, 25 Byte and Buffer Select Buffer Storage Data Path Channel 15 Output and Buffer Bits 03, 11, 18, 26 Byte and Buffer Select Buffer A Word Counter/ Decoder and Buffer A Status Register Channel 15 Data Path Data Path Parity Output Bits 15 thru 29 Byte and Buffer Select Data Path Channel 15 Output and Buffer Bits 05, 13, 20, 28 Byte and Buffer Select Data Path Parity Output Bits 15 thru 29, Byte and Buffer Select Data Path Parity Output Bits 15 thru 29, Buffer B Word Counter and Decoder Data Path Channel 15 Output and Buffer Bits 06, 14, 21, 29 Byte and Buffer Select
IN-FLIGHT SPARES
Yes
12A4A8
Yes
12A7A3
12A4A10
Yes
Yes
Drum Auxiliary Memory Subunit
12A5
No
12A7A5 Yes All type 10 identical - 6 in LU 1, 4 in LU 2, 2 in LU 3, 8 in LU 4 (20 total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) 12A7A9 Yes All type 10 identical - 6 in LU 1, 4 in LU 2, 2 in LU 3, 8 in LU 4 (20 total) All type 5 identical - 12 in LU 1, 21 in LU 2,18 in LU 3, 24 in LU 4 (75 total) 12A5 12A7A12 Yes All type 10 identical - 6 in LU 1, 4 in LU 2, 2 in LU 3, 8 in LU 4 (20 total) All type 5 identical -12 in LU 1, 21 in LU 2,18 in LU 3, 24 in LU 4 (75 total) All type 10 identical - 6 in LU 1, 4 in LU 2, 2 in LU 3, 8 in LU 4 (20 total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) 12A8 12A8A5 12A7A11
No
12A5A2
12A7A7
No
12A5A5
Yes
12A5A8
Module Assembly Type 10 Module Assembly Type 5 Computer Input Module Assembly Type 10 Module Assembly Type 5
Yes
12A5A11
Yes
Yes
12A6 12A6A2
No
Module Assembly Type 9 Data Path Module Assembly Type 35 Module Assembly Type 35
Yes
All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) 12A7 All type 35 identical - 8 in LU 4 (8 total) All type 35 identical - 8 in LU 4 (8 total)
12A8 12A8A1
No Yes
12A6A5
Yes
12A8A3 Yes
Yes
12A6A8
Module Assembly Type 10 Module Assembly Type 5 Module Assembly Type 5 Data Path
12A4A4
Yes
No
All type 7 identical - 7 in LU 2, 3 in LU 3, 8 in LU 4 (18 total) All type 7 identical - 7 in LU 2, 3 in LU 3, 8 in LU 4 (18 total) All type 35 identical - 8 in LU 4 (8 total)
12A6A11
Yes
12A8A7
No
12A7
No
12A8A9
Yes
8-19
NAVAIR 01-75PAC-12
12A8A11
NOMENCLATURE
FUNCTION
Data Path Channel 15, Output Bits 07, Parity 22, Parity Buffer, Byte and Buffer Select Buffer B Word Counter and Decoder, Buffer B Status Register Empty loading/Full loading MDM Address Functions Instruction End Address Storage Register Bits 00 thru 09 Instruction End Address Storage, Register Bits 10 thru 18, Drum Track Address Drivers, Drum Address Select Invalid Instruction End Address and Drum Begin Address Comparator, Drum Begin Address Bits 17 thru 08 Instruction End Address Drum Begin Address Bits 17 thru 08 Instruction End Address, Drum Begin Address Bits 07 thru 00 and Bit 18; Instruction End Address; Drum Begin Address Combination Drum Begin Address Register and Counter Bits 00 thru 09 and Counter Bits 10 thru 08 Drum Begin Address Register and Counter Bits 10 thru 18 Instruction, Address and Computer Begin Address Comparator, Instruction End Address, Drum Begin Address Bits 17 thru 08 Computer Begin Address Register Bits 00 thru 09
IN-FLIGHT SPARES
Yes


12A9A10
NOMENCLATURE
FUNCTION
Computer Begin Address Register Bits 10 thru 18, Drum Track Address Drivers, Drum Address Select Invalid Drum Begin Address and Word Counter Comparator Bits 00 thru 09, Instruction End Address Drum Word Counter, Bits 00 thru 09 Process error functions Byte Error Register/ Counter Buffer Error Register/ Counter Error Status Clock Generation Overrun/Underrun Error Register Counter, Buffer/Byte Error Status Indicators and Read/Write Mode Indicators Parity Error Address Register/Counter, Bits 00 thru 09 Parity Error Address, Register/Counter Bits 10 thru 18 Buffer/Byte Error Status Indicators and Read/ Write Mode Indicators Buffer Byte/Error Status Indicators Process Instruction Status Functions Instruction Status Bits 00 thru 04 and Bit 22 Instruction Status Bits 05 thru 09 and Bits 25 thru 29 Instruction Status Bits 05 thru 09 and Bits 25 thru 29 Memory Protect Register
IN-FLIGHT SPARES
Yes

12A8A12
Yes
All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) None All type 25 identical - 10 in LU 3, 11 in LU 4 (21 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total)
12A9A11
No
12A9 12A9A1
Address Module Assembly Type 25 Module Assembly Type 9
No Yes
12A9A12 12A10 12A10A1 12A10A4 12A10A5 12A10A6
Module Assembly Type 25 Error Status Module Assembly Type 25 Module Assembly Type 25 Module Assembly Type 37 Module Assembly Type 25
Yes No Yes Yes No Yes
All type 25 identical - 10 in LU 3, 11 in LU 4 (21 total) None All type 25 identical - 10 in LU 3, 11 in LU 4 (21 total) All type 25 identical - 10 in LU 3, 11 in LU 4 (21 total) All type 37 identical - 16 in LU 2, 27 in LU 4 (43 total) All type 25 identical - 10 in LU 3, 11 in LU 4 (21 total)
12A9A2
Yes
12A9A3
No
12A9A4
Yes
12A9A5
Yes
12A10A8
Module Assembly Type 25 Module Assembly Type 25 Module Assembly Type 9 Module Assembly Type 37 Instruction Status Module Assembly Type 37 Module Assembly Type 9 Module Assembly Type 9
Yes
All type 25 identical - 10 in LU 3, 11 in LU 4 (21 total) All type 25 identical - 10 in LU 3, 11 in LU 4 (21 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 37 identical - 16 in LU 2, 27 in LU 4 (43 total) None All type 37 identical - 16 in LU 2, 27 in LU 4 (43 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total)
12A10A9
Yes
12A9A6
Yes
12A10A11
Yes
12A10A12 Yes All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 7 identical - 7 in LU 2, 3 in LU 3, 8 in LU 4 (18 total) 12A11 12A11A1 12A11A3 Yes All type 25 identical - 10 in LU 3, 11 in LU 4 (21 total)
No No No Yes
12A9A7
12A9A8
No
12A9A9
12A11A5
Yes
8-20
NAVAIR 01-75PAC-12
12A11A6
NOMENCLATURE
FUNCTION
Memory Protect Register, Clock Loss and Sync Error, Instruction Status Bits 05 thru 09 and Bits 25 thru 29 Clock Loss and Sync Error, Instruction Status Bits 05 thru 09 and Bits 25 thru 29 Write Address Decoder, Instruction Status Bits 00 thru 04 and Bit 22, Clock Loss and Sync Error Write Address Decoder, Instruction Status, Clock Loss and Sync Error Write Address Decoder Instruction Status, Clock Loss and Sync Error Memory Protect Register, Clock Loss and Sync Error, Instruction Status Controls data transfer between computer and MDM IDR Control ODR Control, Clock OA and IA, lDR Control, Parity Test Byte STB, Buffer Error STB ODR Control, Clock OA and IA ODR Control Logic, Parity Test Byte STB, Buffer Error STB Buffer A Input/Output Control, Special Buffer Clock, Buffer A and B Data Buffer A Input/Output Control, Drum Byte and Byte Gate, Special Buffer Clock
IN-FLIGHT SPARES
Yes


12A12A7
NOMENCLATURE
FUNCTION
Buffer A Input/Output Control, Drum Byte and Byte Gate, Buffer A and B Clocks Buffer A Input/Output Control, Buffer A and B Data Clocks Buffer A and B Data Clocks Buffer A and B Data Clocks Drum Input Data and Track Address Interface, Drum Output Data Interface Generates control functions related to reading and writing data on MDM Sect Sector End, Reset Normal Address Compare Set Begin I/O, Reset Begin I/O, Clock Sector Begin, MDM Test Start, Clock Sector End, Sector End, Sector Begin, Over/ Under Error Byte 1/2 Error Normal Address Compare, Control Read Sector, Begin Flip-Flop, Begin I/O, sector End, Delayed Lower Five Bits, Reset Normal Address Compare, Set Begin I/O. Reset Begin I/O, MDM Test Start, Sector Begin Clock Byte, Normal Address Compare, Control Read Sector, Begin I/O Sector End, Delayed Lower Five Bits, Over/ Under Error Byte 1/2 Error
IN-FLIGHT SPARES
No

12A12A8 Yes All type 44 identical - 19 in LU 2, 3 in LU 3, 14 in LU 4 (36 total) All type 44 identical - 19 in LU 2, 3 in LU 3, 14 in LU 4 (36 total)
12A11A7
No
All type 37 identical - 16 in LU 2, 27 in LU 4 (43 total) All type 44 identical - 19 in LU 2, 3 in LU 3, 14 in LU 4 (36 total) All type 37 identical - 16 in LU 2, 27 in LU 4 (43 total) All type 47 identical - 3 in LU 4 (3 total)
12A12A9
Yes
12A11A8
Yes
12A12A10 12A12A11
No Yes
12A11A9
Yes
All type 44 identical - 19 in LU 2, 3 in LU 3, 14 in LU 4 (36 total) 12A13 All type 44 identical - 19 in LU 2, 3 in LU 3, 14 in LU 4 (36 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) None
Instruction Control 1
No
None
12A11A10
Module Assembly Type 44 Module Assembly Type 9 Data Control
Yes
12A13A1
12A11A12
Yes
No
12A12
No
12A12A1 12A12A2
No Yes
All type 37 identical - 16 in LU 2, 27 in LU 4 (43 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 37 identical - 16 in LU 2, 27 in LU 4 (43 total) All type 37 identical - 16 in LU 2, 27 in LU 4 (43 total)
12A13A2
Yes
12A12A3 12A12A4
No No
12A13A3 No All type 37 identical - 16 in LU 2, 27 in LU 4 (43 total)
12A12A5
Yes
12A12A6
Yes
8-21
NAVAIR 01-75PAC-12
12A13A4
NOMENCLATURE
FUNCTION
Word Counter, Word Clock, Preamble Gate, Drum Track Reset, Clock Track, Test Sector F1, Test Sector F2, Set Sector End, Reset Normal Address, Set Begin I/O, Reset Begin I/O Control Read, Delayed Lower Five Bits Drum Track Reset, Clock Track, Test Sector F1/F2, Internal Buffer Address Compare, Normal Address Compare, Clock Error Byte Clock Error Inhibit, Test Control, Internal Buffer, Address, Normal Address, Clock Error, Set Sector End, Set Begin I/O Reset Begin I/O, Clock Sector Begin, MDM Test, Clock Sector End, Sector End, Sector Begin, Over/Under Error Byte 1/2 Error Instruction Control Word Counter Clock, Clock Word Clock, Preamble Gate 1, Byte Clock, Error Inhibit, Test Control, Clock Byte Clock 1 thru 3, Set Sector End Gate FlipFlop, Reset Normal Address Compare Inhibit, Set Begin Input/ Output Flip-Flop, Reset Begin Input/Output Flip-Flop, Clock Sector Begin, Magnetic Drum Memory Test Start, Clock Sector End, Sector End, Sector Begin Over/Under Error Byte 1/2 Error
IN-FLIGHT SPARES
No


12A13A10
NOMENCLATURE
FUNCTION
Word Counter Clock, Clock Word Clock, Preamble Gate 1 Clock Byte Clock 1 thru 3, Set Sector End Gate FlipFlop, Reset Normal Address Compare Inhibit, Set Begin Input/Output Flip-Flop, Reset Begin Input/Output Flip-Flop, Over/Under Error Byte 1/2 Error Word Counter Clock, Clock Word Clock, Preamble Gate 1, Byte Clock, Error Inhibit Test Control Byte Clock, Error Inhibit Test Control, Set Sector End Gate Flip-Flop, Reset Normal Address Compare Inhibit, Set Begin Input/Output Flip-Flop, Reset Begin Input/Output Flip-Flop, Normal Address Compare Inhibit, Control Read Sector Begin Flip-Flop, Begin Input/Output Flip-Flop, Sector End Gate FlipFlop, Delayed Lower Five Bits Flip-Flop, Clock Sector Begin, Magnetic Drum Memory Test Start, Clock Sector End, Sector End, Sector Begin Generates control functions related to reading and writing on MDM Bit Storage
IN-FLIGHT SPARES
No

12A13A5
Yes
12A13A11
Yes
12A13A6
Yes
12A13A12
Yes
12A13A8 12A13A9
Yes Yes
All type 47 identical - 3 in LU 4 (3 total) All type 44 identical - 19 in LU 2, 3 in LU 3, 14 in LU 4 (36 total)
12A14
Instruction Control 2
No
None
12A14A1
Yes
All type 9 identical - 10 in LU 1, 28 in LU 2 , 36 in LU 3, 38 in LU 4 (112 total) All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 total) All type 3 identical -14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 total)
12A14A2
Instruction DecodeUpper Half, Instruction Control Register Instruction Decode-Lower Half, MDM Test Mode Control Interface
Yes
12A14A3
Yes
8-22
NAVAIR 01-75PAC-12
12A14A4
NOMENCLATURE
FUNCTION
MDM Error Signal, Line Decoding and Byte Parity Control, MDM Test Mode Control, Instruction Control Register 7 Line Decoding and Byte Parity, MDM Test Mode Control Instruction Control Register 3, Instruction Control Register 4 and 5 Instruction Control Register 1 and 2, Instruction Control Register 4 and 5 Instruction Control Register 3 Logic Line Decoding and Byte Parity, Instruction Control Register 1 and 2, Instruction Control Register 3, Instruction Control Register 4 and 5, Instruction Control Register 6, Instruction Control Register 7 Instruction Control Register 4 and 5, Instruction Control Register 7 Instruction Control Register 1 and 2, Instruction Control Register 6 Instruction Control Register 1 and 2, Instruction Control Register 3, 4, and 5, Instruction Control Register 7, Data Enable Data Enable Generates control functions related to reading and writing on MDM
IN-FLIGHT SPARES
Yes


12A15A1
NOMENCLATURE
FUNCTION
Channel 15 EFR Monitor, Set Address Error, Clocked EF, Parity Error Address Clock Write Mode, Set Track Error, Read Mode, Delayed Read Channel 15 EFR Monitor Clocked EF, Chan 15 EI Monitor, Master Clear, Terminate Strobe, Sequential/Combination Error, Error Counter Reset, Reset Error B, Clear/ Standby Strobe, Drum Begin Address Chan 15 EFR Monitor, Clocked EF, Clock Memory Protect, Error Counter Reset, Reset Error B, Clock EF Enable, End, Clear/Standby Strobe, Drum Begin Address Chan 15 El Monitor, Master Clear, Clock Memory Protect, Terminate Strobe, Sequential Combination Error, Parity Error Address Clock Write Mode, Read Mode, Delayed Read/Write Mode, Mode, Read/Write Mode, Clock EF Enable Write 1, Write 2, Read 1, Read 2, Normal Write Mode, Set Address Error, Normal Read Mode, Chan 15 El Monitor, Master Clear, Set Track Error, Terminate Strobe, Sequential/Combination Error, Write Lockout Strobe, Delayed Read/ Write Mode, Read/Write Mode, Address Counter Reset, Computer Data Strobe 1
IN-FLIGHT SPARES
No

12A14A5
No
All type 37 identical - 16 in LU 2, 27 in LU 4 (43 total) 12A15A3 Module Assembly Type 9
No
12A14A6
No
12A14A7 12A14A8
No Yes
All type 37 identical - 16 in LU 2, 27 in LU 4 (43 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total)
12A15A4
Yes
12A15A5
Yes
All type 44 identical - 19 in LU 2, 3 in LU 3, 14 in LU 4 (36 otal)
12A14A9
No
All type 37 identical - 16 in LU 2, 27 in LU 4 (43 total) All type 37 identical - 16 in LU 2, 27 in LU 4 (43 total) All type 37 identical - 16 in LU 2, 27 in LU 4 (43 total) 12A15A7 Module Assembly Type 9
12A14A10
No
12A14A11
No
Yes
12A14A12 12A15
Module Assembly Type 37 Instruction Control 3
No No
8-23
NAVAIR 01-75PAC-12
12A15A8
NOMENCLATURE
FUNCTION
Write 1, Write 2, Read 1, Read 2, Normal Write Mode, Counter Begin Address Clock, Normal Read Mode, Clocked EF, Chan 15 El Monitor, Drum Begin Address Clock 2, Master Clear, Terminate Strobe, Sequential/Combination Error, Parity Error Address Clock Write Mode, Read Mode Write 1/2, Read 1/2, Normal Write Mode, Normal Read Mode, Parity Error Address, Error Counter Reset, Reset Error B, End, Clear/Standby Strobe, Drum Address Clock, Set Normal Completion, Set Address Error, Set Track Error, Write Lockout Strobe, Clock Memory Protect, Clock EF Enable Chan 15 EFR Monitor, Clocked EF, Parity Error Address, Clock Write Mode, Read Mode, Error Counter Reset, Reset Error B, End, Clear Chan 15 EFR Monitor, Error Counter Reset, Error B, End, Clear/Standby Stobe, Drum Begin Address, Drum Address Clock, Strobe Buffer Empty, Set Clear, Magnetic Drum Control, System Initialize and Master Clear Reset and Terminate Reset Normal Write Mode, Normal Read Mode, Clocked EF, Chan 15 El Monitor, Master Clear, Terminate Strobe, Sequential Combination Error, Error Counter Reset, Reset Error B
IN-FLIGHT SPARES
Data Multiplexer Subunit
DESIGNATOR
12A17
NOMENCLATURE
DMS Data Gate
FUNCTION
Processes bits 00 thru 05 and 26 Data Multiplexer Data Gate Bits 00 thru 05 and and 26 Data Multiplexer Data Gate Bits 00 thru 05 and 26 Data Multiplexer Data Gate Bits 00 thru 05 and 26 Data Multiplexer Data Gate Bits 00 thru 05 and 26 Data Multiplexer Data Gate Bits 00 thru 05 and 26 Data Multiplexer Data Gate Bits 00 thru 05 and 26 Processes bits 06 thru 11 and 27 Data Multiplexer Data Gate Bits 06 thru 11 and 27 Data Multiplexer Data Gate Bits 06 thru 11 and 27 Data Multiplexer Data Gate Bits 06 thru 11 and 27 Data Multiplexer Data Gate Bits 06 thru 11 and 27 Data Multiplexer Data Gate Bits 06 thru 11 and 27 Data Multiplexer Data Gate Bits 06 thru 11 and 27 Process bits 12 thru 17 and 28 Data Multiplexer Data Gate Bits 12 thru 17 and 28
IN-FLIGHT SPARES
No

12A18, 12A19, 12A20
No
12A17A1
Module Assembly Type 4 Module Assembly Type 4 Module Assembly Type 4 Module Assembly Type 10 Module Assembly Type 5 Module Assembly Type 5 DMS Data Gate Module Assembly Type 4 Module Assembly Type 4 Module Assembly Type 4 Module Assembly Type 10 Module Assembly Type 5 Module Assembly Type 5 DMS Data Gate Module Assembly Type 4
Yes
All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) All type 10 identical - 6 in LU 1, 4 in LU 2, 2 in LU 3, 8 in LU 4 (20 total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) 12A17, 12A19, 12A20 All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) All type 10 identical - 6 in LU 1, 4 in LU 2, 2 in LU 3, 8 in LU 4 (20 total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) 12A17, 12A18, 12A20 All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total)
12A17A3
Yes
12A17A5
Yes
12A15A9
Yes
12A17A7
Yes
12A17A9
Yes
12A17A11
Yes
12A18 12A18A1 Yes All type 44 identical - 19 in LU 2, 3 in LU 3, 14 in LU 4 (36 total)
No Yes
12A15A10
12A18A3
Yes
Yes
12A15A11
12A18A7
Yes
12A18A9
Yes
Yes
12A15A12
12A19 12A19A1
No Yes
8-24
NAVAIR 01-75PAC-12
12A19A3
NOMENCLATURE
Module Assembly Type 4 Module Assembly Type 4 Module Assembly Type 10 Module Assembly Type 5 Module Assembly Type 5 DMS Data Gate Module Assembly Type 4 Module Assembly Type 4 Module Assembly Type 4 Module Assembly Type 10 Module Assembly Type 5 Module Assembly Type 5 Input Interface Module Assembly Type 4 Module Assembly Type 4 Module Assembly Type 4
FUNCTION
Data Multiplexer Data Gate Bits 12 thru 17 and 28 Data Multiplexer Data Gate Bits 12 thru 17 and 28 Data Multiplexer Data Gate Bits 12 thru 17 and 28 Data Multiplexer Data Gate Bits 12 thru 17 and 28 Data Multiplexer Data Gate Bits 12 thru 17 and 28 Processes Bits 18 thru 23 and 29 Data Multiplexer Data Gate Bits 18 thru 23 and 29 Data Multiplexer Data Gate Bits 18 thru 23 and 29 Data Multiplexer Data Gate Bits 18 thru 23 and 29 Data Multiplexer Data Gate Bits 18 thru 23 and 29 Data Multiplexer Data Gate Bits 18 thru 23 and 29 Data Multiplexer Data Gate Bits 18 thru 23 and 29 Provides DMS/Computer Input Interface Chan 1 Input Interface
IN-FLIGHT SPARES
Yes

All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) All type 10 identical - 6 in LU 1, 4 in LU 2, 2 in LU 3, 8 in LU 4 (20 total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) 12A17, 12A18, 12A19 All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) All type 10 identical - 6 in LU 1, 4 in LU 2, 2 in LU 3, 8 in LU 4 (20 total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) 12A3 All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total)

12A21A8
NOMENCLATURE
Module Assembly Type 4 Module Assembly Type 5 I/O Select and Control Module Assembly Type 3 Module Assembly Type 9 Module Assembly Type 9 Module Assembly Type 37 Module Assembly Type 9 Module Assembly Type 4 Module Assembly Type 9 Module Assembly Type 16 Module Assembly Type 4 Module Assembly Type 23 Module Assembly Type 14 Module Assembly Type 5 Instruction and Control
FUNCTION
Chan 1 Input Interface
IN-FLIGHT SPARES
Yes

All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) None
12A19A5
Yes
12A21A10
Yes
12A19A7
Yes
12A24
Select and control multiplexed channel inputs and outputs Input Chan Select, Output Chan Select, DM Loop Test Input/Output Chan Select, DM Loop Test IDR Monitor
No
12A19A9
Yes
12A24A1
Yes
All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 37 identical - 16 in LU 2, 27 in LU 4 (43 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 16 identical - 2 in LU 1, 2 in LU 2 ,12 in LU 3, 5 in LU 4 (21 total) All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) All type 23 identical - 2 in LU 1, 2 in LU 4 (4 total) All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) None
12A19A11
Yes
12A24A2
Yes
12A20 12A20A1
No Yes
12A24A3
Yes
12A24A4 12A24A5
IDR Monitor, DM IDR IDR Monitor
Yes Yes
12A20A3
Yes
12A20A5
Yes
12A24A6
lDR Monitor, DM IDR
Yes
12A20A7
Yes
12A24A7
lDR Monitor, DM lDR
Yes
12A20A9
Yes
12A24A8
IDR Monitor
Yes
12A20A11
Yes
12A24A9
DM Chan EFR/ODR
Yes
12A21 12A21A2
No Yes
12A24A10
Chan 1 Input Interface, Input Chan Select, DM IDR DM Chan EF/OA
No
12A24A11
Yes
12A21A4
Yes
12A24A12
DM IDR, DM Chan EF/ OA, DM Chan EFR/ODR Controls data flow to and from MDM
Yes
12A21A6
Yes
12A25
No
8-25
NAVAIR 01-75PAC-12
12A25A1
NOMENCLATURE
Module Assembly Type 3 Module Assembly Type 9 Module Assembly Type 9 Module Assembly Type 4 Module Assembly Type 9 Module Assembly Type 16 Module Assembly Type 4 Module Assembly Type 23 Module Assembly Type 14 Module Assembly Type 5 Module Assembly Type 9 Output Interface Module Assembly Type 5 Module Assembly Type 5 Module Assembly Type 5
FUNCTION
Instruction
IN-FLIGHT SPARES
Yes

All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 totaI) All type 16 identical - 2 in LU 1, 2 in LU 2, 12 in LU 3, 5 in LU 4 (21 total) All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) All type 23 identical - 2 in LU 1, 2 in LU 4 (4 total) All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 total) All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) None

12A26A8
NOMENCLATURE
Module Assembly Type 5 Module Assembly Type 4 Y-Analog Module Assembly Type 20
FUNCTION
Chan 1, 5, and 6 Output Interface Chan 1, 5, and 6 Output Interface Control Y-deflection of AD display Y Conic D/A Converter, Y Azimuth D/A Converter, Y Raster D/A Converter, Y Filter Y Filter Y Output Amplifier X Gross Position D/A Converter, Y Gross Position D/A Converter Control X-deflection of AD display X-Filter, X-Azimuth, D/A Converter, X-Conic D/A Converter, X-Raster D/A Converter X-Filter X-Output Amplifier Power Regulators Generates Characters and Conics Horizontal Gross Position and Increment Control, Character Generator Vertical Gross Position, Character Generator Horizontal Gross Position and Increment Control
IN-FLIGHT SPARES
Yes

All type 5 identical - 12 in LU 1, 21 in LU 2, 18 in LU 3, 24 in LU 4 (75 total) All type 4 identical - 9 in LU 1, 6 in LU 2, 1 in LU 3, 28 in LU 4 (44 total) None All type 20 identical - 4 in LU 3, 2 in LU 4 (6 total)
12A25A2
DM Chan El
Yes
12A26A10
Yes
12A24A3
DM Chan El
Yes
Auxiliary Display Logic
12A27 12A27A1
No No
12A25A4
DM Chan El
Yes
12A25A5
DM Chan El, Chan 13 IA Steering, DM Chan EIE/lA DM Chan El
Yes
12A27A4 12A27A6 12A27A10
Module Assembly Type 21 Module Assembly Type 17 Module Assembly Type 24 X-Analog Module Assembly Type 20
No No No
All type 21 identical - 4 in LU 3, 2 in LU 4 (6 total) All type 17 identical - 2 in LU 4 (2 total) All type 24 identical - 1 in LU 3, 1 in LU 4 (2 total) None All type 20 identical - 4 in LU 3, 2 in LU 4 (6 total)
12A25A6
Yes
12A25A7
Data Gate, Bits 24 and 25
Yes
12A28 12A28A1
No No
12A25A8
Set Status El, DM Chan El, DM El, Chan 13 El Steering. Data Gate, Bits 24 and 25 DM Chan EIE/IA
No
12A25A9
Yes
12A28A4 12A28A6 12A28A8 12A29 12A29A2
Module Assembly Type 21 Module Assembly Type 17 Module Assembly Type 31 ADL Data Control Module Assembly Type 46 Module Assembly Type 9 Module Assembly Type 9
No No No No No
All type 21 identical - 4 in LU 3, 2 in LU 4 (6 total) All type 17 identical - 2 in LU 4 (2 total) All type 31 identical - 2 in LU 3, 1 in LU 4 (3 total) None All type 46 identical - 1 in LU 4 (1 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total)
12A25A11
DM El, DM Chan EIE/IA, Data Gate, Bits 24 and 25 Set Status El, DM El, Chan 13 IA Steering Multiplexed Output Interface Chan 1, 5, and 6 Output Interface Chan 1, 5, and 6 Output Interface Chan 1, 5, and 6 Output Interface
Yes
12A25A12
Yes
12A26 12A26A2
No Yes
12A29A4
Yes
12A26A4
Yes
12A29A6
Yes
12A26A6
Yes
8-26
NAVAIR 01-75PAC-12
12A29A7
NOMENCLATURE
FUNCTION
Horizontal Gross Position and Increment Control, Horizontal Conic/Character 1/2 Output Bits, Character Generator, Vertical Gross Position X-Conic Clock Control, Horizontal Conic/Character 1 Output Bits Horizontal Conic/Character 1/2 Output Bits X-Conic Clock Control, Horizontal Conic/Character 1/2 Output Bits X-Conic Clock Control, Horizontal Conic/Character 1/2 Output Bits Horizontal Gross Position, Vertical Gross Position, X-Conic Clock Control Mode and AD display controls 6-Bit Sync Counter Timing and Control, Azimuth Delay Intensity Control Unblank and Video Output Timing and Control, State Generator Timing and Control, Azimuth Delay Intensity Control Unblank and Video Output Azimuth Delay - Intensity Control Unblank and Video Output Timing and Control, State Generator, 6-Bit Sync Counter Timing and Control, Azimuth Delay Intensity Control Unblank and Video Output
IN-FLIGHT SPARES
Yes


12A30A8
NOMENCLATURE
FUNCTION
Timing and Control, ADL Diagnostic Multiplexer Timing and Control, Azimuth Delay Intensity Control Unblank and Video Output Mode Address and Storage Mode Address and Storage, Timing and Control Control system initialize functions Supplies primary 400-cycle to MDM Protects MDM from improper temperature levels Provides DC power for DAMS, MCP, and SCC Provides DC power for DMS and ADL
IN-FLIGHT SPARES
Yes

All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 total) All type 26 identical - 1 in LU 3, 1 in LU 4 (2 total)
12A30A10
No
12A29A8
Module Assembly Type 9 Module Assembly Type 14 Module Assembly Type 7 Module Assembly Type 9 Module Assembly Type 9 Timing and Control Module Assembly Type 25 Module Assembly Type 9
Yes
All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 14 identical - 4 in LU 1, 16 in LU 2, 32 in LU 3, 15 in LU 4 (67 total) All type 7 identical - 7 in LU 2, 3 in LU 3, 8 in LU 4 (18 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) None All type 25 identical - 10 in LU 3, 11 in LU 4 (21 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 9 identical - 10 in LU 1, 28 in LU 2, 36 in LU 3, 38 in LU 4 (112 total) All type 19 identical - 8 in LU 3, 2 in LU 4 (10 total) System Initialize
12A30A11
Module Assembly Type 11 Module Assembly Type 3 System Initialize and Power Switching Drum Power Assembly MDM O/T Shutdown
Yes
12A29A9
Yes
All type 11 identical - 48 in LU 1, 1 in LU 3, 1 in LU 4 (50 total) All type 3 identical - 14 in LU 1, 15 in LU 2, 11 in LU 3, 5 in LU 4 (45 total) None None None
12A30A12
Yes
12A29A10
No
12A31 12A32 12A33
No No No
12A29A11
Yes
12A29A12
Yes
12A30 12A30A1 12A30A2
No Yes Yes
LU 4 Power Supply LU 4 Power Supply
12PS1 12PS2
Power Supply Assembly Power Supply Assembly
No No
12PS2 12PS1
12A30A3
Yes
12A30A4
Yes
12A30A5
Yes
All type 19 identical - 8 in LU 3, 2 in LU 4 (10 total) All type 16 identical - 2 in LU 1, 2 in LU 2, 12 in LU 3, 5 in LU 4 (21 total) All type 44 identical - 19 in LU 2, 3 in LU 3, 14 in LU 4 (36 total)
12A30A6
Yes
12A30A7
Yes
8-27/(8-28 blank)
SECTION 9
DIGITAL MAGNETIC TAPE SYSTEM
THIS SECTION CONTAINS DATA APPLICABLE TO AIRCRAFT BUNO 161132 AND SUBSEQUENT NOT INCORPORATING AFC 607
SECTION 9 DIGITAL MAGNETIC TAPE SYSTEM
NAVAIR 01-75PAC-12
(RACK D2) CP-901(V)( )AN/ASQ-114(V) DIGITAL DATA COMPUTER (CENTRAL COMPUTER) (SEE SECTION 4) A1J74 CH 10 EXTERNAL INTERRUPT ENABLE CH 10 EXTERNAL INTERRUPT REQUEST CH 10 INPUT DATA ACKNOWLEDGE CH 10 INPUT DATA REQUEST CH 10 INPUT DATA BIT 00-29 (RACK D2/D3 OVERHEAD) A1J86 J2 A505 AN/ASQ-114 DMTS INTERFACE BOX (DMTS INTERCONNECTION BOX) (SEE SECTION 9) J7 EXTERNAL FUNCTION REQUEST EXTERNAL FUNCTION AVAILABLE OUTPUT DATA REQUEST OUTPUT DATA ACKNOWLEDGE A1J82 J1 OUTPUT DATA BIT 00-29 (RACK D3) TB172 (SEE ELECTRONICS RACKS OVERHEAT WARNING CKT W10) 1J3 1J2
(RACK D3) C-10553( )/ASH-33 DIGITAL TAPE CONTROL (DMTC)

DIGITAL MAGNETIC TAPE SET
(RACK D3) 1J9 DMTU SELECT A DMTU SELECT B SET WRITE COMMAND SET WRITE COMMAND RESET WRITE COMMAND REVERSE COMMAND FORWARD COMMAND REWIND COMMAND
ON PWR OFF LAMP TEST CLR
2J2
RD-450/ASH-33 DIGITAL DATA RECORDERREPRODUCER (DMTU A)
CONTROLLER 1 MORE INFO SEL MODE CLR
CONTROLLER 2 MORE INFO SEL MODE
MODE DISPLAY
PWR ON SEL RDY WRITE LOCKOUT AUTO BOT FWD STOP RVS LOW TAPE EOT 0 ADDRESS 3 RUN TIME TOTAL 1 2
FWD
I/O SEL CTRL ON LN CP901 SASP 1 OFF LN 1 CTRL ON LN 2 OFF LN CP901 SASP AYK - 14 OVER BIT PWR ERROR TEMP IPL RESET AYK - 14 CLR FAIL A A DMTU SEL B C B C D D
LOOP COMMAND WRITE DATA BIT 0- PARITY -7, WRITE STROBE DMTU SENSE/SENSE RTN SELECT ACK READY BOT EOT LOW TAPE WRITE LOCKOUT REWINDING READ DATA BIT 0- PARITY -7,
STOP
RWND
PROG SEL INCR 2 DECR
BIT CONTL 1 2 2 4 16 18 1 3 1 17 INIT INIT MACLRMACLR 2 1 16 1
OVER TEMP LAMP TEST PWR ON
PANEL DIM
MODE DIM
POWER ON
AUTO MNL
CH 08 OUTPUT CONTROL AND GROUP 2 OUTPUT DATA
1J13
OFF
NOTE
(TACCO STATION) A324 TACCO POWER CONTROL 1 2 AIRCRAFT BUNO 156507 THROUGH 158927 AND 158929 THROUGH 159329 AIRCRAFT BUNO 158928 AND 159503 AND SUBSEQUENT
2J1
(RACK D3)
POWER CONTROL
1J10 DMTU SELECT A

OV TEMP POWER ON
2J2 DMTU SELECT B SET WRITE COMMAND SET WRITE COMMAND RESET WRITE COMMAND REVERSE COMMAND FORWARD COMMAND REWIND COMMAND LOOP COMMAND WRITE DATA BIT 0- PARITY -7,
COMPUTER RUN START STOP BOOT STRAP MANUAL
RD-450/ASH-33 DIGITAL DATA RECORDERREPRODUCER (DMTU B)
AUTO RECY OV TEMP 1
OFF OV TEMP 3
ON PWR OFF LAMP TEST
PWR ON SEL RDY WRITE LOCKOUT AUTO BOT FWD STOP RVS LOW TAPE EOT 0 ADDRESS 3 RUN TIME TOTAL 1 2
OFF OFF OFF KEYSETS MAG TAPE DATA CONV RDR SCAN
FWD
STOP
OFF TACO MPD
OFF SS3 MPD
OFF ARO
OFF PILOT DIS
1J1
OFF OFF OFF OFF
2J8 MAG TAPE ON
(RACK D1) A521 1 A511 2 POWER DISTRIBUTION BOX (SEE NAVAIR 01-75PAC- -2) -12-
WRITE STROBE DMTU SENSE/SENSE RTN SELECT ACK READY 2J7 115 VAC A 115 VAC B 115 VAC C 1J1 BOT EOT LOW TAPE WRITE LOCKOUT REWINDING READ DATA BIT 0- PARITY -7, 2J6 MAG TAPE UNIT B 28 VDC MAG TAPE UNIT A 28 VDC 2J1
RWND
(RACK D1) DPS ELECTRONIC CIRCUIT BREAKER PANEL A MAG TAPE CONT B C MAG TAPE UNIT A MAG TAPE UNIT B DC DC 2J9 115 VAC A 115 VAC B 115 VAC C 2J3 28 VDC 28 VDC
AUTO MNL
Figure 9-1. DMTS Signal Flow Diagram
9-1
NAVAIR 01-75PAC-12
(RACK D3) DMTC A30 OPERATOR PANEL J14 (RACK D1) DPS ELECTRONIC CIRCUIT BREAKER PANEL MAG TAPE CONT 115 VAC A B C PWR DISTR BOX DC MAIN DC BUS ELEC 28 VDC N K2 SAFETY C CHAS COM HOURS M1 ET1 PS4P1 1 2 MAG TAPE A DC 28 VDC 2J3 D E DC 2J6 E F 2J1 A G DMTU A 28 VDC 28 VDC RET B1 FAN P1 T1 MAG TAPE B DC 28 VDC F G DC (TACCO STATION) TACCO POWER CONTROL MAG TAPE 1J1 D DC OFF MAG TAPE ON 2J8 K A B 1J13 OVR TMP (SEE ELECTRONICS RACKS OVERHEAT WARNING, CKT W10) OVR TMP B DC A44 RELAY GATE A45 TP5 (00.5VDC) 109 GROUND BUS TO XAO1 - XA24 PINS B37, A2, B75, B40 DT SENS A A41 VCC A15 OP BD 2 C PS3P1 1 3 5 PS3 5 VDC POWER SUPPLY J17 PROVIDES LOGIC (VCC) POWER FOR TTL COMPONENTS ON ALL CIRCUITS. ALSO PROVIDES LAMP POWER. - 15 VDC 5 VDC 113 (51 VDC) TP3 K1 67 5 VDC BUS TO XA01-XA10 AND XA15-XA24 PINS A1, A39, B38, B76 1 77 78 79 80 - 10 VDC SOURCE A29 INTERFACE J17 62 69 70 71 72 63 64 65 66 75 76 DC IDENO SEE DMTS SIGNAL FLOW DIAGRAM FOR CIRCUIT CONTINUATION J14 5 6 J16 21 1 24 4 - 10 VDC E10 R7 K18 (- 101 VDC) TP6 E5 115 H J 2J1 A G DMTU B 28 VDC T4 28 VDC RET B T3 C 3 6 A 2 5 2 6 B C TB2 1 4 PS2P1 1 PS2 A PROVIDES POWER FOR COMPONENTS ON MDB OUT AND OP2 BOARDS. GRD -15 VDC POWER SUPPLY PS2P1 5 9 A15 - 15 VDC OP BD 2 A43 A9 DC W6 E4 R6 E9 6 A B C PROVIDES POWER FOR COMPONENTS ON MDB OUT AND OP2 BOARDS. + GRD 2J9 ZY ZJ R (RACK D1) POWER DISTRIBUTION BOX 2J7 C S T 115 VAC A 115 VAC B 115 VAC C 1J1 D E F B FL1 FL2 FL3 S1 POWER ON A 2 B 3 C 1 2 PS4 +15 VDC POWER SUPPLY PS4P1 5 9 110 (12.51 VDC) TP1 E6 15 VDC (A12 - A53) (151 VDC) TP4 112 R3 E1 R2 1K PANEL DIM 9 8 2 6 B C TB3 1 7 PS1P1 1 A PROVIDES POWER FOR OP PANEL (EXCEPT MODE DISPLAY) GRD + TB3 PS1P1 9 5 12.5 V RTN 12.5 VDC 12 11 6 5 DC L1 6800 M PS1 12.5 VDC POWER SUPPLY 2 1 3 4 DC LAMP SUPPLY 4 TB3 10
Q1
E2
R7
(151 VDC) TP2 111 E7
(A12 - A47) 15 VDC - 15 VDC -
A14 - B39 A13 - A12 A15 - A4 5 VDC 5 VDC 5 VDC I/O OAA 5 VDC I/O DBA A30 OPERATOR PANEL A11 - VCC A12 - VCC A4 A18 - B18 A13 - VCC A14 - VCC J16 2 3 13 22 23 30 DC
E8 A53 FAN SENS DC PS3P2 22 9 5 17 DC (GND) TP5 E15 DC 6 7 8 18 19 20 21 5 VDC RTN THERMAL SWITCH 5 VDC PS3P2 1 2 3 4 14 15 16 GROUND BUS TO XA01-XA10 AND XA15-XA24 PINS A2, B7, B37, B40 R1 5 OHMS MODE DIM R5 E3 E14
114
017--1441
9-2
Figure 9-2. DMTS Power Distribution Diagram
NAVAIR 01-75PAC-12
(RACK D3) (RACK D2) CENTRAL COMPUTER J82 1 1 HI OUTPUT DATA 00-29 LO HI LO J1 1 1 (RACK D2-D3 OVHD) DMTS INTERCONNECTION BOX J7 2 2 HI OUTPUT DATA LO 1J3 HI LO 2 2 ANEW THIS SECTION CONSISTS OF CARDS A13 AND A14: ANEW IN AND ANEW OUT. ANEW OUT CONTAINS RECEIVERS FOR THE CENTRAL COMPUTER OUTPUT DATA. THE DATA IS STORED IN A 32-BIT RECEIVER REGISTER FOR MULTIPLEXING IN 8-BIT BYTES TO THE CONTROLLER. CIRCUITS ALSO PROVIDE CONTROL OF COMMANDS AND OUTPUT DATA WORDS. THE ANEW IN CONTAINS MULTIPLEXERS AND REGISTERS FOR DATA FROM THE CONTROLLER. STATUS AND INPUT DATA WORD CONTROL CIRCUITS PROVIDE FOR DATA TRANSFER TO THE CENTRAL COMPUTER. DMTC MULTIPLEXER SECTION
60
60
J86 29 39 30 40 17 25 18 26 HI CH10 EXTERNAL FUNCTION AVAILABLE LO HI CH10 EXTERNAL FUNCTION REQUEST LO HI CH10 OUTPUT DATA ACKNOWLEDGE LO HI CH10 OUTPUT DATA REQUEST LO LO LO HI LO HI LO HI HI
J2 23 29 14 20 12 18 10 16 3 8 4 9 1 6 2 7 HI EXTERNAL FUNCTION LO HI EXTERNAL FUNCTION REQUEST LO HI OUTPUT DATA ACKNOWLEDGE LO HI OUTPUT DATA REQUEST LO LO HI LO 92 89 88 LO HI 87 93 LO HI 91 86 HI 90
DATA
(SEE SHEET 3)
J74 3 3 4 9 3 8 2 7 1 6 HI CH10 OUTPUT DATA 00-29 LO HI CH10 EXTERNAL INTERRUPT ENABLE LO HI CH10 EXTERNAL INTERRUPT REQUEST LO HI CH10 INPUT DATA ACKNOWLEDGE LO HI CH10 INPUT DATA REQUEST LO LO LO HI LO HI LO HI HI LO HI
1J2
60
DATA
017--1442
(9-3 blank)/9-4
Figure 9-3. DMTS Functional Signal Flow Diagram (Sheet 1 of 15)
NAVAIR 01-75PAC-12
(RACK D3) DMTC (CONT)
OPERATOR PANEL CONTROLLER/FORMATTER 1 CONTROL THIS SECTION CONSIST OF THE FOLLOWING CARDS: OPERATOR PANEL A30 OPERATOR PANEL BOARD 1 A1 OPERATOR PANEL BOARD 2 A15 THE OPERATOR PANEL PROVIDES THE OPERATING CONTROLS AND DISPLAYS FUNCTIONS OF THE DMTC. (SEE SHEET 6)
DATA
THIS SECTION CONSIST OF THE FOLLOWING CARDS: CONTROLLER 1 A4 CONTROLLER 2 A3 CONTROLLER 3 A2 INPUT ADAPTER A5 OUTPUT ADAPTER A8 PHASE-ENCODER CHANNEL A A6 PHASE-ENCODER CHANNEL B A7 THE CONTROLLER/FORMATTER PROVIDES THE FUNCTION OF CONTROLLING AND FORMATTING ALL DATA TO AND FROM THE DMTU. (SEE SHEETS 7 AND 8)
DISPLAY MSG
(RACK D3) DMTU INTERFACE 1J9 4 THIS SECTION CONSIST OF CARDS A9 AND A23. THE A23 IS AN EXACT DUPLICATION OF THE A9 CARD. THE DMTU INTERFACE PROVIDES THE LINE DRIVERS FOR INPUT AND OUTPUT BUFFERING. (SEE SHEETS 11 AND 12) DATA 99 98 31 22 13 12 6 5 33 24 32 23 15 14 29 20 30 21 26 17 4 3 66 55 9 8 2 1 27 18 25 16 11 10 HI LO HI LO HI LO HI LO HI LO HI LO HI LO HI LO HI LO HI LO HI LO HI LO HI LO HI LO HI LO HI LO HI LO WDO-7.P 18 1J1 5 HI LO HI LO HI LO HI LO HI LO HI LO HI LO HI LO HI LO HI LO HI LO HI LO HI LO HI LO HI LO HI LO HI LO 18 99 98 31 22 13 12 6 5 33 24 32 23 15 14 29 20 30 21 26 17 4 3 66 55 9 8 2 1 27 18 25 16 11 10 DMTU A
WRISTB LPTST FORWD REV DMTUSELA DMTUSELB REWIND SETWRT RSETWRT AUTO REWIND WRTLOKOUT LOTAP EOT SELACK RDY BOT
CONTROLLER/FORMATTER 2
CONTROL
DISPLAY MSG THIS SECTION CONTAINS CARDS A16 THROUGH A22 AND IS AN EXACT DUPLICATION OF CONTROLLER/FORMATTER 1.
DATA
(SEE SHEETS 9 AND 10)
DATA
RDO-7.P
(RACK D3) DMTU B 1J10 SAME AS DMTU A 70 2J2
017--1443
9-5
NAVAIR 01-75PAC-12
(RACK D3) DMTC A14 1J3 HI DATA LO EF SEE SHEET 1 EFR OA ODR HI LO HI LO HI LO HI LO 6 90 91 86 87 93 92 89 88 6 30 30 6 6 A36 B3 A44 B73 A37 B2 A43 B74 THE ANEW OUT CONTAINS RECEIVERS FOR THE CENTRAL COMPUTER ANEW OUTPUT DATA. THE DATA IS STORED IN A 32-BIT RECEIVER REGISTER FOR MULTIPLEXING IN 8-BIT BYTES TO THE CONTROLLER. CIRCUITS ALSO PROVIDE CONTROL OF COMMANDS AND OUTPUT DATA WORDS. 100 ANEW LAYOUT A A67 B55 A73 A60 B71 A64 A63 A47 A49 B9 98 99 101 102 8 1J5 SOURCE DATA OUT 1 SOURCE CLOCK OUT 1 SOURCE DATA IN 1 SOURCE CLOCK IN 1 SEE SHEET 1 SINK DATA IN 1 SINK CLOCK IN 1 SINK DATA OUT 1 SINK CLOCK OUT 1 + + + + + + + + 47 48 50 49 32 33 35 34 36 37 (A11) 10 MHZ BIT COND-HALT LOOP OUPUT ACK IDENT-A C1W ENABLE DW ENABLE SR DAT OUT F0 F1 F2 39 38 40 41 43 42 103 104 105 106 107 B10 A61 (A12) B1 B43 B47 A52 B56 B8 A51 A56 B44 B60 B59 B64 B63 A76 A19 B24 B34 B69 B30 B35 B31 B36 B33 B70 B42 B67 B22 B72 A41 A42 B14 VCC A75 A71 A58 A59 VCC IDENT B0 1/2 SEL 0 +5 V I/O BA (A15) 8 IDENT B0 - 7 (A3, A17) MON 4 OUPUT AVAIL I/O C/D 0 STATUS AVAIL 0 ILLEGAL OP MON 1A MON 1B MON 2A MON 2B IDENT B0 QD (A4)
(A4)
(A18) (A15)
+5 V I/O BB F3 SK RESET SR CLOCK OUT D STATUS WRAP 3 WRAP 4 WRAP 5 WRAP 6 WRAP 7 SK IDLE SK CLOCK OUT A75 A74 B42 B39 A22 A25
A17 B62 A27 A68 B23 B11 B74 B25 A65 A23 A62 A56 B27 A21 B44 A13
B40 B41 A76 A73
WRAP 0 WRAP 1 WRAP 2
A13 (A4) OUTPUTACK1 REGSEL1 INPUTAVAIL1 DMTCC/D1 IB1/0 - 7 OUTPUTACK2 REGSEL2 INPUTAVAIL2 DMTCC/D2 (A17) 1J2 HI DATA LO HI LO HI LO HI LO HI LO 7 86 87 90 91 89 88 93 92 7 30 30 IB2/0 - 7 8 8 B22 B17 A38 A39 9 B21 B28 A44 A45 10 7 7 B71 B72 A46 A14 B70 B69 A47 A16 93 94
ANEW IN 91
A26 B13 B24 B20 A24 B19 B67 B8 B68
SK DAT OUT ACK IDR WRAP EIR WRAP 5 MHZ BIT RESET DATA COMMAND
VCC VCC B1 B12 THE ANEW IN CONTAINS MULTIPLEXERS AND REGISTERS FOR DATA FROM THE CONTROLLER. STATUS AND INPUT DATA WORD CONTROL CIRCUITS PROVIDE FOR DATA TRANSFER TO THE CENTRAL COMPUTER.
5 V I/O AA 5 V I/O AB (A15)
(A3)
I/O CLEAR
A28 A20 B26 B27 B73
IDENT B0 INPUT ACK 0 MON 1A MON 1B MON 2A MON 2B (A1B) (A4)
(A18)
88
89
90 B64
EIE SEE SHEET 1 EIR IDA IDR
92
95
96
97
C
017--1444
9-6
NAVAIR 01-75PAC-12
(RACK D3) DMTC (CONT) A12 RC1 1 TC1 1 RTAD31 - 1 SEND BITS R1 DMTC C/D 1 10 MHZ 1/RMD BIO 12 MHZ - 1 PRTY - ERR 1 3MHZ 1 BITC15 - 1 - CO5 1 BIT MODE 1 BIT MODE 1 BIT 1 BITTESTDATA 1 CLRCMD 1 CLRCMD 1 CMDCLR 1 BITCO4 - 08-, -11 CMDO- 1, 3-, -5 RMDBO, 1, 2, 4 TIDO - TID15 (A15) DMTC 1/2 SEL 1 UNC HLT1/SYNCSEL LOOP 1 OUTPUT ACK 1 IDENT A1 CIW ENABLED 1 (A11) A29 J17 5 V I/O BA 5 V I/O BB 5 V I/O AA 5 V I/O AB 65 66 63 64 THIS CIRCUIT CARD CONTAINS ISOLATION TRANSFORMERS FOR MDB SERIAL DATA BUS AND RELAYS TO SWITCH LOGIC POWER TO POSITIONS A11, A12, A25, A26, A27, AND A28. MDB INTERFACE DW ENABLED 1 SR DT OUT 1 - /DT SYN FO1/OA 1 F11/ENIO H CLK F21 F31/SHIFT CLKOUT SK RST 1 - /SYNC SEL SR CLK OUT 1/BTCMD5 SR END STATUS 1 SOURCE DATA OUT 1 (1J5) SOURCE CLOCK OUT 1 SOURCE DATA IN 1 J17 4 5 9 10 71 72 BUS AXFMR HI 1 BUS AXFMR LO 1 BUS BXFMR HI 1 BUS BXFMR LO 1 5 V1/01BA 5 V1/01BB SEE POWER DISTRIBUTION DIAGRAM 81 82 67 74 5 VI/0 1AA 5 VI/0 1AB IDEN 0 IDEN 1 (A11) (A15) +15 V -15 V SOURCE CLOCK IN 1 + + + + B36 B5 B61 A66 B65 B1 A36 B21 B2 B11 B35 A68 A13 B43 A58 A55 B62 A71 11 11 11 11 A15 B47 A52 B56 B8 A51 A56 B44 B60 B59 B64 B63 A76 A19 B24 A27 A74 A33 A38 B52 B50 B54 B51 A44 A45 A14 A57 VCC VCC A53 A47 78 79
A PDC OUT B10 B66 A43 A75 B74 A17 A54 B72 B69 B73 A41 B71 A61 B20 B19 B31 B45 B7 B57 B68 A49 A48 A42 B48 B49 A46 B22 B67 B42 12 B58 B18 A60 B55 A73 B9 82 83 B39 A70 84 85 A67 B41 MONITOR 2A MONITOR 2B MONITOR 1A MONITOR 1B (A18) IDENT B1 INPUT ACK 1 NRZOUT 1 2MHZ 1 VALID WORD 1 BUSAINH 1 COMMANDSYNC 1 SCMD03 1 SCMD24 1 SCMD25 1 ENENCODER 1 ENTFSTATUS 1 SET T/F 1 LDSYNCT/F 1 LDOXFEREG 1 LDLTCMO 1 CMDSYNC 1 CMDA31 1 CMDA31 1 MESSAGE ERROR 1 SEND DATA 1 TAKE DATA 1 NRZDATA 1 TRANSMIT 1 RECV 1/10 1 RECSHIFT 1 SKDTOUT1-/LDOUTSR SK CLK OUT 1-RMOB3 SK IDL1/INVLCDO/1 101-080-7 STOP XFER 1 SEND BYTE 1 STATUS AVAIL 1 OUTPUT AVAIL 1 I/O C/D1 IDENT Q1 8 D C B
(A11)
(A4, A18)
80
81
(A15)
(A4)
86
87
C
017--1445
9-7
NAVAIR 01-75PAC-12
(RACK D3) DMTC (CONT) A A11 B (A18) INDENT B1 INPUT ACK 1 NRZOUT 1 2MHZ 1 VALIDWORD 1 BUSAINH 1 COMMANDSYNC 1 SCMD03 1 SCMD24 1 SCMD25 1 ENENCODER 1 ENTFSTATUS 1 SET T/F 1 1DSYNCT/F 1 LDOXFEREG 1 LDLTCMO 1 CMDSYNC 1 CMDA31 1 CMDA31 1 MESSAGE ERROR 1 SEND DATA 1 TAKE DATA 1 NRZDATA 1 TRANSMIT 1 RECV 1/10 1 RECSHIFT 1 SK DTOUT1-/LDOUTSR SK CLK OUT1-RMOB3 SK IDL1/INVLCDO/1 101-OBO-7 (A3, A17) SINK DATA IN 1 SINK CLOCK IN 1 SINK DATA OUT 1 SINK CLOCK OUT 1 OUTPUT ACK 1 REG SEL 1 INPUT AVAIL 1 DMTC C/D1 OUTPUT ACK 2 REG SEL 2 INPUT AVAIL 2 DMTC C/D2 5 V I/01AB 5 V I/01AA 8 + + + + A28 A29 B53 B57 B68 B55 A55 A69 B60 A66 A54 B50 B49 B66 B18 B56 B65 B71 B61 B19 B67 B51 A46 A70 A76 B58 A26 A25 A22 74 12 A42 A50 A43 A48 A15 A53 A11 A41 B22 B17 B39 A49 B21 B28 A44 A45 VCC VCC 75 A27 A68 B23 B11 B74 B25 A65 A23 A62 A59 A56 A21 B44 A13 B26 B27 B73 B64 B35 B48 9 10 PDC IN A6 B36 B45 B47 B46 A17 A19 B24 B29 B63 A5 A3 B8 B62 B54 B20 B70 B34 68 69 11 11 70 71 11 11 72 73 B1 B12 DMTC 1/2 SEL 1 1 IOCLR UNC HLT 1/SYNCSEL LOOP 1 OUTPUT ACK 1 IDENT A1 CIW ENABLED 1 DW ENABLED 1 SR DT OUT 1 - /DT SYN F01/0A 1 F11/ENIOHCLK F21 F31/SHIFT CLK OUT SK RST 1 - /SYNCSEL SR CLK OUT - /BTCMD5 SR END STATUS1 MONITOR 1A MONITOR 1B MONITOR 2A MONITOR 2B I/O C/D1 OUTPUT AVAIL 1 1B1/0 - 7 1B2/0 - 7 RMDBO, 1, 2, 4 TIDO - TID15 (A12) B BIT CO4 - 08 - 11 -, CMDO - 1, 3 - 5 -, RC1 1 TC1 - 1 - RTAD31 1 SENDBITSR 1 DMTCC/D 1 10MHZ1/RMDBIO 12MHZ 1 PRTY ERR 1 3MHZ 1 BITC15 1 CO5 1 BITMODE 1 BITMODE 1 BIT 1 BIT TEST DATA 1 CLRCMD 1 CLRCMD - 1 - CMDCLR 1 -
(A12)
76
77
(1J5)
(A12)
(A4)
(A4)
(A18)
(A18)
(A29)
(A18) (A3) (A17)
(A4, A18)
C
017--935
9-8
NAVAIR 01-75PAC-12
(RACK D3) DMTC (CONT) A A15 (A4) (A4) (A3) (A18) (A18) (A17) (A2) (A1) OPERATOR PANEL BOARD 2 A63 A31 A32 A62 A49 A48 B16 B19 C1CS91 C1CS111 C2CS91 C2CS111 C2CS12 RTCLRS MSTCLR1 C1CS91 C1CS111 C2CS91 C2CS111 C2CS12 RTCLRS MSTCLR1 (A2) C1AS3MHZ (A3) C1DEC (A17) C2DEC J14 (A29) IDEN 1 IDEN 0 B60 B73 108 A20 A10 A58 A11 B14 A70 A64 A72 A67 A5 A42 14 14 14 DMTC 1/2 SEL 1 B 1 IOCLR B26 B31 14 14 14 14 14 PWRIND BITERR OVRTMP FAIL AYKDISAY BIL1G BIL1A BIL2G BIL2A OVRTMP PWRON C1IOG - 3G C1IOA - 3A C2IOG - 3G C2IOA - 3A MTASC1 - DSC1 MTASC2 - DSC2 C1BL1 - 4 C2BL1 - 4 39 40 41 42 43 52 53 54 55 56 57
14 14 14 14 14 14 14 14
A A1 A27 A25 A35 B15 B16 B74 B28 OPERATOR PANEL BOARD 1
C1BI1 C1BI2 C1BI3 C2BI1 C2BI2 C2BI3 C1AS3MHZ C1CS101 C2CS101
B37 B38 B65 A36 B4 A68 B39 A46 A47
CONTAINS SWITCH SELECT AND LAMP DRIVER CIRCUITS FOR OPERATOR PANEL OPERATION. CIRCUITS FOR POWER SUPPLY MONITORING, TEMPERATURE SENSING, AND LAMP TEST CIRCUITS ARE ALSO ON THIS CARD.
(A2, A3)
A30
OPERATOR PANEL
J14 13 14 15 16 17 18 19 20 21 22 (A2) (A3) (A16) J15

13
CONTAINS CNTL 1 AND 2 COMMAND. DECODE AND CONTROL CIRCUITS. MICRO-INSTRUCTIONS FROM THE A26 CONTROLLERS ARE USED TO SET, TEST, AND CLEAR MODE DISPLAY INDICATORS AND TO CAUSE DATA TO BE WRITTEN INTO RESPECTIVE B14 ALPHA-NUMERIC (A/N) DISPLAY A19 CHARACTER MEMORIES. THE A/N A30 DISPLAY DRIVERS AND MODE B21 SELECTOR MULTIPLEXERS ARE LOCATED ON THIS CARD. B32 B29 B31 B59 B50 B58 B51 B24 B52 B30
16 9 17 10 13
C1CS101
(A15) (A2, A3) (A15) (A16, A17)
C2CS101
(A13, A14) 1/2 SEL 0 (A18) B74
INTEGRATES PANEL LOGIC WITH CONTROLLERS. OP COMMANDS ARE DECODED DIRECTLY FROM INSTRUCTION WORD OUTPUT AND EXECUTED BY OPERATORS PANEL LOGIC. OP MODE SELECT, I/O SELECT, DMTU SELECT, AND CONTROLLER CLEAR LOGIC INTERFACE DIRECTLY FROM OP LOGIC TO CONTROLLER BOARDS. ONLY ONE CONTROLLER AT A TIME CAN CONTROL MESSAGE DISPLAY.
C1OFI C1ONI C2OFI MCS1G MCS1A MCS2G MCS2A AMPL1 AMPL2 C2ONI C1I05 - 08, 15 - 19 IB1/0 - 7 C2I05 - 8, 15 - 19 IB2/0 - 7 -
(A17) COLS1 - 5 DSPCLK AND01 C10NL C10FL C20NL C20FL CLR10 CLR20 SELMD1 SELMD2 MOIN1 MOIN2 BITS1
39 40 5 6 7 8 48 49 50 51 52 56 43
A6 A49 A61 B62 B64 B63 A48 B47 B11 B10 B12 A29 A8 (A2, A3)
J15 15 15 (A13) I/O CLEAR (A4, A18) B28 A60 A59 A52 A12 A69 A61 15 15 B69 IDENT QD B17 B70 A17 A18 B47 (A12) B66 B67 B48 B15 B20 A23 A19 C1IOS - 38 C2IOS - 38 CLEAR RESET0 IPLSL LTSW0 PSELB0 PSELB1 TAC1 - TDC1 TAC2 - TDC2 C1IBC0 C1IBC1 C1SEL0 C1SEL3 BIL1G0S C2IBC0 C2IBC1 BIL2G0S MSTCLR2 C2BL40S C1BL40S (A3, A4) (A20) (A9) (A23) 4 (A6, A7) TAC1, TACC1 4
14 14
22 23 24 45 46 47
14 14
44
BITS2 (A16, A17)
A12 3 4 5
J16
13 13
PRSO1 - 10 PROO1 - 10 PRLS11 PRLS21 PRLS31 PRLS41
13 13
(A14)
TAC2, TCC2 TAC2 TBC2
(A4) (A17) (A18) (A4) (A18) (A4)
14 34 15 11
A66 A65 A67 A68
98
B69 B68
C1TST1 C2TST2 (A4)
98
IDENT 01
B18
017--1447
9-9
NAVAIR 01-75PAC-12
(RACK D3) DMTC (CONT) A A4 C1BI1 SELACKA DIBITA1 DIBITA2 SELACKB DIBITB1 DIBITB2 WCK1 STATUS01 PEATST1 PEBTST1 STATUSI1 C1IDO-19 A22 B5 B1 B2 B4 B8 B7 B61 A32 A27 A28 A33 27 16 A58 A53 A26 A30 A67 32 28 CONTAIN SYSTEM CONTROL AND TEST LOGIC USED TO SENSE AND DIRECT OPERATION OF CONTROLLER/FORMATTER, I/O LOGIC, AND OPERATORS PANEL. ALSO ON THIS BOARD ARE CONTROL STORE SEQUENCE AND CONTROL LOGIC, (INCLUDING A MICROPROGRAM COUNTER AND INCREMENTER), A FOUR LEVEL STACK FOR BRANCH HANDLING AND ADDRESS SELECT. B67 B49 A21 B73 B56 B69 A75 A76 A66 C1RE C13MHZ C1DECCLK (A1) C1DEC (A8) C1INREGCLK C1INITALUN C1EXD1S C1ADAPREGC C1S/LCONTROL C1DBUF1 C1TSTC20 C1TSTC21 C1ADAP (A8) 18 B55 A14 A31 A16 A50 A13 A12 19 A74 B65 A71 B32 26 B57 B42 B23 30 B (A11) C1TST1 +5 V I/O 1AA STOP XFER1 SEND BYTE1 STATUS AVAIL1 OUPUT AVAIL1 I/O C/D1 C B6 B18 B24 B20 B58 B64 B31 B74 C1LWDIND B66 C1FEN (A8, A2) (A1) (A15) (A30) (A14) (A15) C1CS101 MSTCLR1 BITS1 IOO/OBO - 7 C1IBC0 C1IBC1 A17 B68 A6 8 A30 B9 B 017-1448 (A4) C1BITMODE2 (A8) (A11, A12) 101 - 0B0 - 7 8 33 B41 C1BITMODE1 C1LPT C1MJADD0 - 7 C1BI2 C1FE C1BS0 C1BS1 C1S0 C1S1 C1A00 - 11 INIT LOOP1 (A8, A9, A23) (A8, A9, A23) (A2) (A6) C1RDATA 0 - 3 20 (A15) (A9) (A9) (A23) (A23) STATA1 STATA2 STATB1 STATB2 18 A21 A28 A23 A26 B56 A20 B16 B26 B72 B19 B46 B45 A53 B59 24 B17 A18 B63 C1I00 - 19 16 B67 22 21 23 CONTROLLER 1 29 B68 B53 B52 B54 A23 (A8) (A6) (A7) (A5) (A2) OUTPUTACK1 REGSEL1 INPUT AVAIL1 DMTCC/D1 IWO (A11, A13) (A11, A13) (A11, A13) (A11, A13) INPUT AVAIL1 DMTC C/D1 C1RE C13MHZ C1DECCLK A3 CONTROLLER 2 A17 A18 A13 A38 A30 A28 CONTAINS MICROPROGRAM CONTROL STORE, INSTRUCTION REGISTER, AND CONTROL STORE SCAN LOGIC. 8K WORDS X 20 BITS CAN BE ACCOMMODATED. THE INSTRUCTION REGISTER BUFFERS THIS OUTPUT TO CONTROLLER BOARDS 1 AND 2. THE MICROPROGRAM SCAN LOGIC IS USED TO PERFORM SUM CHECK FOR ERRORS AND PART FAILURES WITHIN THE CONTROL STORE. THE CLOCK LOGIC CONSISTS OF A 12-MHZ CRYSTAL OSCILLATOR WHICH IS DIVIDED TO OBTAIN A 333-NSEC CLOCK CYCLE. A
(A2) (A9)
A2
CONTROLLER 3
(A23)
31
17 15
18
15
20
(A2)
(A30)
BITS1 C1IBCO C1IBC1 TAC1 TBC1 TCC1 TDC1 I/OCLR0 MSTCLR1
B72 A12 B14 B50 B57 B48 B46 A24 A70 B71 B48 A47 A43 A29 B9 B33 B40 B39 A72
(A15)
B22 B23 B24 B25 B64 B65 B66 B27
IW0 IW1 IW2 IW3 IW4 IW5 IW6 IW7 (A1, A11, A13)
A3 A4 A5 A6 A7 A8 A9 A10
(A8)
(A30)
IB1/0 - 7 (A15)
C1I06 - 08, 10, 11 -
(A9, A23)
(A15)
(A5)
B71 25 CONTAINS ARITHMETIC LOGIC CIRCUITS, STORAGE ELEMENTS, I/O INTERFACE, AND STATUS TEST LOGIC. A RAM WORKING STORAGE, 16 WORDS X 8 BITS, 16 WORDS X 8 BITS, PROVIDES A REGISTER FILE OF DATA COMMAND, AND STATUS INFORMATION TO WHICH THE CONTROLLERS REQUIRE READY ACCESS. A DATA STORE RAM, 256X8, PROVIDES BUFFERING OF OTHER DATA. A CONSTANT DATA RAM PROVIDES ANY CONSTANT INFORMATION REQUIRED BY THE CONTROLLER. AN I/O RAM IS USED TO DECODE COMMANDS RECEIVED THROUGH THE CONTROLLER I/O. INPUT MULTIPLEXER PROVIDES INPUT TO THE ALU LOGIC FROM I/O DATA INPUT REGISTER. CONSTANT AND DATA STORE MEMORIES, DMTU DATA INPUTS, AND VARIOUS STATUS INPUTS. B40 B41 B42 B43 A69 A68 A67 B44
CIB13 C1INMUX0 C1INMUX1 C1INMUX2 C1INMUX3 C1INMUX4 C1INMUX5 C1INMUX6 C1INMUX7
RCK1
C1I03.,06 - 13 A33 A34 A35 A36 A51 A52 A41 A42
(A8)
(A1) (A15)
C1CS101 C1BL40S BIL1G0S C1SELO C1SEL3 IDENTBO INPUTACKO MON1A MON1B MON4 OUTPUT AVAIL 0 I/OC/D 0 STATUS AVAIL 0 ILLEGAL OP
C1I11 - 13 -
(A6, A7)
C1I10 - 13 -
(A5)
(A15)
(A1) C1I05 - 08,15 - 19 10 11 12 16 C1I00 - 14 (A3, A4) (A1) 13 16 A31 A66 C1AS 3MHZ (A8, A16, A22) (A4, A15)
(A13) (A13, A14) (A11, A12)
B58 B57
C1DMTU SELA C1DMTU SELB
(A9, A23)
(A7)
C1RDATA 4 - 7 -
21
(A14)
(A1) (A15) (A30)
14 C1CS101 MSTCLR1 BITS1 C1FE C1BSO C1BS1 C1S0 C1S1 C1ADO - 11 C1LWDIND B46 B15 B17 A15 B52 B51 A12 A11 19 A16
B18 A37 A32 B53 B54 B6
C1BI1 C101 WRITE
(A16) M3MHZ KILL
12
(A12)
9-10
NAVAIR 01-75PAC-12
(RACK D3) DMTC (CONT) A A
C1BOTA C1BOTB (A15) (A4) MSTCLR1 INITLOOP1 C1BITMODE1 C1BITMODE2 C1FEN C1LWDWIND C1DEC C1ADAP C1AS3MHZ CILPT C1IO3, 06-13 IW0 IW1 IW2 IW3 IW4 IW5 IW6 IW7 REND11
B72 B71 B50 B20 A50 A49 B51 B46 B48 B57 B75 B55 B64 16 B43 B42 A75 A76 B41 B40 B39 A74 A68
A8
OUTPUT ADAPTER (A9) SEL ACKA ACC1RD 4- 7 B62 A3 B63 A4 B34 A42 B35 A41 B44 20 4 BODET1 CHDET1 POSDET1 ONEDET1 (A4) (A3) (A5) (A23) BDC1RD 4- 7 4 A56 25 26 43 44 45 A7 PHASE-ENCODER CHANNEL B (SAME AS A6 MODULE) 42 A65 A67 24 24 A62 A3 A4 A42 A41 DGATE51 DGATE71 DROP 0B1 - 3B1 ENV41 - 71 RPARB1 BODET1 CHDET1 POSDET1 ONEDET1 (A5)
58
A55
WCK1 STATUS 01
(A4)
(A9)
SEL ACKA ACC1 RDO- P -3, ADC1 RDO- 3, P 5
A56 25 26
-ENCODER CHANNEL A A6 PHASEDECODES PHASE-ENCODED (PE) DATA FROM DMTU, AND PRESENTS DATA TO CONTROLLER. THE DECODE LOGIC CONVERTS PE DATA TO BINARY LEVEL AND STORES IT IN SKEW BUFFER.
(A4)
CONTAINS DRIVE CLOCK GENERATOR A57 (3.84 MHZ CRYSTAL CONTROLLER OSCILLATOR), DRIVE CONTROL SEQUENCER, WRITE ENCODE REGISTER, AND BIT MULTIPLEXER.
(A23)
(A3) (A3) (A2) (A4) (A2)
22 A56 B58 B56 B73 B67
C1WDO- P -7, C1WDS C1FWD C1REWIND C1RINC C1SWC
9 (A9, A23)
PEATST2 CIRDATA0 - 3 -
49
50
51
B70
C1RVC
(A7, A9, A23)
B44 B40 21 A60 B47 DC
PEBTST1 4 CIR DATA 4 - 7 -
(A4) (A3)
(A3)
52
53
54
B60
G0P1 (A7)
B33
55
56
57 (A7) B69 RGATE1 B60 (A8) C1RVC G0P1 RGATE1 TAC1 TCC1 B70 A47 B69 A46 23 23 A63 A56 A58 B69 A57 A64 B54 36 B74 A75 A76 C1DAPA B32 42 (A2) C1I11 C1I12 C1I12 PARC1 PHENL PRESET1 RCLKS1 COPYA1 ECLK1 REN11 REN21
B40 B33 B60 A55 A57 B65 B68 B69 B73 A71 B39 B66 B67 B45 B50 B46 46 41 48
A60 A5 INPUT ADAPTER
(A30)
A44
DGATE51 (A7) DGATE71 DROP OB1-3B1 ENV41-71 RPAR81 BODET1 CHDET1 POSDET1 ONEDET1
A42 A45 24 24 A62 A64 A65 B41 B67 B45 B44 A74 A73
GENERATES PROPER TIMING TO READ PHASE ENCODED DATA FROM DMTU. THESE TIMING SIGNALS ARE PROVIDED TO PE CH A AND B. IT CONTAINS A TRACKING OSCILLATOR READ CONTROL SEQUENCER, CHARACTER CONTROL SEQUENCER, ERROR DETECTION, AND BIT MULTIPLEXER.
RCK1 STATUSI1 DROPOA1-3A1-3P1 ENVO1- P1 -3, RDARA1 DROPPA1 PARC1 PHENL PRESET1 RCLKS1 COPYA1 ECLK1 REN11 REN21
(A3) (A4)
43 23 44 23 A62 A72 B47 B73 A71 B39 B66 B67 B45 B50 B46 (A30) 45 47 (A5)
46
(A7)
41
48
(A6, A7)
34
35
37
TAC1 TCC1 C1I11 C1I12 C1I13
A55 A57 B65 B68 B69
C1I10 (A2) C1I11 C1I12 C1I13
38
39
40
(A2)
B
017--1449
9-11
NAVAIR 01-75PAC-12
(RACK D3) DMTC (CONT) A A18 CONTROLLER 1 (A16) C2BI1 C2I00 - 19 (A17) C2ADAP C2DEC (A19) (A21) (A20) (A22) (A9) STATUS12 PEBTST2 PEATST2 STATUS02 WCK2 SELACKA DIBITA1 DIBITA2 SELACKB DIBITB1 DIBITB2 STOPXFER1 (A12) SEND BYTE1 STATUS AVAIL1 (A11, A12) I/O C/D1 OUTPUT AVAIL1 OUTPUT AVAIL1 IDENT B1 INPUT ACK1 (A11) 5 V I/0 1AA A22 17 A66 A67 A27 A33 A28 A27 A32 B61 B5 B1 B2 B4 B8 B9 B24 B20 B58 (A19) B31 B64 B64 B10 B34 B17 32 28 B67 B49 A21 B73 B56 B69 27 A75 A76 A74 A71 B41 B42 30 B66 B74 26 33 28 A14 A31 A26 A50 A13 A12 C2INTREGCLK C2INITALUN C2EXDIS C2DAPRCGCLK C2S/LCONTROL C2LDBUF1 C2MJADDO - 7 C2TSTC20 C2TSTC21 INITLOOP2 C2LPT C2 BIT MODE 1 C2 BIT MODE 2 C2FEN C2LWDIND C2A00 - 11 C2RE C2BS0 C2BS1 C2S0 C2S1 (A16, A22) (A15) (A16) (A1) (A15) (A30) (A11, A12) 8 (A22) (A14) 101 - OBO - 7 IDO/OBO - 7 C2IBC0 C2IBC1 C2CS101 MSTCLR2 BITS2 12 8 A30 B9 A17 A68 A6 (A1) (A15) (A30) (A2) C1OI WRITE KILL M3MHZ A32 B6 A54 A47 B46 B15 B17 (A22, A9, A23) (A9) (A23) 27 A58 A53 A26 C2RE C2MHZ C2DECCLK (A16) (A20) (A21) C2I00 - 19 C2R DATA0 - 3 C2R DATA4 - 7 RCK2 STATA1 STATA2 STATB1 STATB2 B17 A18 B63 17 29 30 22 A53 A21 A28 A23 A26 B56 A20 B16 B26 B72 B19 27 B46 B45 (A18) C2A00 - 11 C2FE C2BS0 C2BS1 C2S0 C2S1 C2LWDIND 28 A15 B52 B51 A12 A11 A16 13 25 A17 CONTROLLER 2 (SAME AS A3 MODULE) 10 B71 B22 B23 B24 B25 B64 B65 B66 B27 B67 B59 B57 B58 B40 B41 B42 B43 A69 A68 A67 B44 IB2/0 - 7 C2B13 2W0 2W1 2W2 2W3 2W4 2W5 2W6 2W7 C2DEC C2ADAP C2DMTUSELB C2DMTUSELA C2INMUX0 C2INMUX1 C2INMUX2 C2INMUX3 C2INMUX4 C2INMUX5 C2INMUX6 C2INMUX7 (A1, A11, A13) (A15) 2W0 2W1 2W2 2W3 2W4 2W5 2W6 2W7 A3 A4 A5 A6 A7 A8 A9 A10 A23 2WO C2RE C23MHZ C2DECCLK IB2/0 - 7 A15 A38 A30 10 C2I03, 06 - 13 17 15 C2J10 - 13 (A19) (SAME AS A4 MODULE) B55 29 31 B68 B53 B52 B54 C2B12 OUPUTACK2 REGSEL2 INPUTAVAIL2 DMTCC/D2 (A15) (A11, A13) 14 B18 C2BI1 C2I00 - 19 A17 A18 C2I05 - 08 15 - 19 (A1) (A15, A18) (A17, A18) A
A16
CONTROLLER 3 (SAME AS A3 MODULE)
INPUT AVAIL 2 DMTC C/D2
(A22)
(A23)
C2I11 - 13 -
(A20, A21)
17
C2I06 - 08, 10, 11 -
(A9, A23)
(A22)
(A1, A18) (A18) (A9, A23)
A33 A34 A35 A36 A51 A52 A41 A42 10 11 12
(A11)
24
(A11)
MONITOR 2A MONITOR 2B 1/2SEL0 BIL2G0S C2BL40S MSTCLR2 I/OCLR0 C2IBC0 C2IBC1 C2CS101 TAC2 TBC2 TCC2 TDC2 BITS2 C2TST2
B39 B40 B43 A47 B48 B70 A24 B12 B14 B71 B50 B57 B48 B46 B72 B6
18
19
20
(A15)
21
23
C1AS 3MHZ
A66
16
(A1)
(A30)
C2CS101 MSTCLR2 BITS2
(A1)
B
017--1450
9-12
NAVAIR 01-75PAC-12
(RACK D3) DMTC (CONT) A A22 OUTPUT ADAPTER C2BOTA C2BOTB MSTCLR2 INITLOOP2 C2BITMODE1 C2BITMODE2 C2FEN C2LWDWIND C2DEC C2ADAP C1AS3MHZ C2LPT C2IO3. 06-13 2W0 2W1 2W2 2W3 2W4 2W5 2W6 2W7 REWD12 B72 B71 B50 B20 A50 A49 B51 B46 B48 B57 B55 B64 17 B43 B42 A75 A76 B41 B40 B39 A74 A68 55 56 57 A69 RGATE2 B60 B70 C2RVC (A9, A23, A21) 49 50 51 B60 52 53 54 G0P2 (A21) B33 B40 C2WDO - P -7, C2WDS C2FWD C2REWIND C2RWC C2SWC 9 (SAME AS AB MODULE) WCK2 STATUS 02 (A9) (A18) (A23) (A9) 5 5 ACC2 RDO - 3, P BDC2RDO - P -3, SEL ACKA A20 PHASE-ENCODER CHANNEL A (SAME AS A6 MODULE) A55 A57 A18 34 35 A56 A62 A3 B63 A4 B34 A42 B35 A41 29 B44 BODET2 CHDET2 POSDET2 ONEDET2 4 (A17) (A18) 42 (A19) 43 44 45 A65 B67 31 C2RDATA0 - 3 PEATST2 31 A62 DGATE52 DGATE72 DROP 0B2-3B2 ENV42 - 72 RPARB2 (A19) A21 PHASE-ENCODER CHANNEL B ACC2RD 4-7 BDC2RD 4-7 SEL ACKB 4 4 34 35 56 (SAME AS A6 MODULE) A3 A4 A42 A41 BODET2 CHDET2 POSDET2 ONEDET2 A
(A9) (A23) (A15) (A18)
(A9) (A23) (A23)
58
(A19)
(A17) (A17) (A12) (A18) (A16)
33 A56 B58 B56 B73 B67
(A9, A23)
30
C2R DATA0-7 PEBTST2
(A17)
(A17)
B44
(A18)
A60 A19 INPUT ADAPTER (SAME AS A5 MODULE) B70 A47 B69 A46 32 A44 32 A63 A56 41 C2DAPB RCK2 STATUS12 DROPOA2-3A2 ENVO2-32, P2 RPARA2 DROPPA2 4 5 32 32 A62 B72 B47 (A30) 31 31 A62 B64 B65 B41 B67 B45 B44 A74 A73 34 35 37 A58 B69 A57 A64 B54 36 B74 A75 A76 PARC2 PHEN2 PRESET2 RCLKS2 COPYA2 ECLK2 REN12 REN22 (A16) TAC2 TCC2 C2I11 C2I12 C2I13 A55 A57 B65 B68 B69 B73 A71 B39 B66 B67 B45 B50 B46 (A16) C2I11 C2I12 C2I13 PARC2 PHEN2 PRESET2 RCLKS2 COPYA2 ECLK2 REN12 REN22 B65 B68 B69 B73 A71 B39 B66 B67 B45 B50 B46 46 44 45 47 41 48 (A22) C2RVC G0P2 RGATE2 TAC2 TCC2 B32 42 43 A60 B47 DC B40 B33 B60 A55 A57 48
DGATE52 DGATE72 (A21) DROP OB2-3B2 ENV42-72 RPARB2 BODET2 CHDET2 POSDET2 ONEDET2 C2I10 C2I11 C2I12 C2I13
A42 A45
(A30)
(A20, A21)
38
39
40
46
(A19)
(A16)
(A21)
B
017--1451
9-13
NAVAIR 01-75PAC-12
(RACK D3) DMTC (CONT) A
A B
(A30)
TAC2 C1LPT INITLOOP 1 C1I06 C1I07 C1I08 C1I10 C1I11
A41 B65 B20
A9
DMTU A INTERFACE
35 A44 B70 B22 A15 A45 25 66 B59 B23
ACC2RDO-7.P C2BOTA SELACKA DIBITA1 BIBITA2 C1BOTA ACC1RDO-7.P STATA1 STATA2 9
(A20, A21) (A22) (A4, A6, A7, A18, A20, A21) (A4, A18) (A8) (A6, A7) (A3, A17)
(A4)
63 64
(A2)
B18 B55 B57 B46 B41
61
(A8)
C1WDO-7.P C1WDS C1FORWARD C1REWIND C1RWC C1SWC C1RVC C2I06 C2I07 C2I08 C2I10 C2I11
22 B34 B67 B68 B4 B51 B53 B19 B56 B58 B47 B6 B21 60 A37 B7 33 B31 B68 B27 B5 B52 A36 B8 62 67
(RACK D3) 1J10 4 B35 B36 B64 B63 B30 B33 B11 B12 B17 B16 B10 B9 B29 B32 B50 B49 B43 B42 4 99 98 31 22 13 12 6 5 33 24 32 23 15 14 29 20 30 21 18 HI LO HI LO HI LO HI LO HI LO HI LO HI LO HI LO HI LO WDO-7.P WRTSTBA LPTSTA FORWDA REVA DMTUSELAA DMTUSELBA REWIND SETWRTA RSETWRTA HI LO HI LO HI LO HI LO HI LO HI LO HI LO HI LO HI LO 2J2 4 99 98 31 22 13 12 6 5 33 24 32 23 15 14 29 20 30 21 DMTU A
(A16)
(A18) (A17)
INITLOOP2 C2DMTUSELA C2DMTUSELB C2WPO-7.P C2WDS C2FORWARD C2REWIND C2RWC C2SWC
59
(A22)
(A3)
C1DMTUSELA C1DMTUSELB
A42 A64 A43 B14 B48 B15 B13 B60 B62 B61 B73 65 B71 B74 B72 B26 B69 5
(A18) (A22)
C2LPT C2RVC
B66 B54
26 17 4 3 66 55 9 8 2 1 27 18 25 16 11 10 5
HI LO HI LO HI LO HI LO HI LO HI LO HI LO HI LO
AUTOA REWINDA WRTLOKOUTA LOTAPA EOTA SELACKA RDYA 18 BOTA RDO-7.P
26 17 4 3 66 55 9 8 2 1 27 18 25 16 11 10 5
017--1453
9-14
NAVAIR 01-75PAC-12
(RACK D3) A B DMTC (CONT) A23 DMTU B INTERFACE
(A30)
TBC2 CILPT INITLOOP 1 C1I06 C1I07 C1I08 C1I10 C1I11
A41 B65 63 B20 64 B18 B55 B57 B46 B41 61
35 A44 B70 B22 A15 A45 26 66 B59 B23
BDC2RDO-7.P C2BOTB SELACKB DITITB1 BITITB2 C1BOTB BOC1RDO-7.P STATB1 STATB2 9
(A20, A21) (A22) (A4, A18)
(A4)
(A2)
(A8) (A6, A7) (A3, A17)
(A8)
C2WDO-7.P C1WDS C1FORWARD C1REWIND C1RWC C1SWC C1RVC C2I06 C2I07 C2I08 C2I10 C2I11 INITLOOP2 C2DMTUSELA C2DMTUSELB C2WPO-7.P C2WDS C2FORWARD C2REWIND C2RWC C2RWC
22 B34 B67 B68 B4 B51 B53 B19 B56 B58 B47 B6 B21 60 A37 B7 33 B31 B68 B27 B5 B52 A36 B8 62 59 67
(RACK D3) 1J10 4 B35 B36 B64 B63 B30 B33 B11 B12 B17 B16 B10 B9 B29 B32 B50 B49 B43 B42 4 99 98 31 22 13 12 6 5 33 24 32 23 15 14 29 20 30 21 HI LO HI LO HI LO HI LO HI LO HI LO HI LO HI LO HI LO 18 2J2 WDO-7.P WTRSBB LPTSTB FORWDB REVB DMTUSELAB DMTUSELBB REWIND SETWRTB RSETWRTB HI LO HI LO HI LO HI LO HI LO HI LO HI LO HI LO HI LO 4 99 98 31 22 13 12 6 5 33 24 32 23 15 14 29 20 30 21 DMTU B
(A16)
(A18) (A17)
(A22)
(A3)
C1DMTUSELA C1DMTUSELB
A42 A64 A43 B14 B48 B15 B13 B60 B62 B61 B73 B71 B74 B72 B26 B69 5
26 17 4 3 66 55 9 8 2 1 27 18 25 16 11 10 5
(A18) (A22)
C2LPT C2RVC
B66 B54
65
AUTOB REWINDB WRTLOKOUTB LOTAPB EOTB SELACKB RDYB BOTB 18 RDO-7.P
26 17 4 3 66 55 9 8 2 1 27 18 25 16 11 10 5
017--1453
9-15
NAVAIR 01-75PAC-12
NOTE
1 2 3 4 6 7
CENTRAL COMPUTER TO DMTS INTERCONNECTION BOX OR LU 2 J82 TO J1 OR 2J1 OUTPUT DATA BITS
13 21 14 22 15 23 16 24 17 25 18 26 29 39 30 40 31 41 32 42 33 43 34 44 35 45 36 46 37 47 49 58 50 59 51 60 52 61 53 62 54 63 55 64 56 65 57 66 67 75 68 76 69 77 70 78 71 79 72 80 13 21 14 22 15 23 16 24 17 25 18 26 29 39 30 40 31 41 32 42 33 43 34 44 35 45 36 46 37 47 49 58 50 59 51 60 52 61 53 62 54 63 55 64 56 65 57 66 67 75 68 76 69 77 70 78 71 79 72 80 00 00 01 01 02 02 03 03 04 04 05 05 06 06 07 07 08 08 09 09 10 10 11 11 12 12 13 13 14 14 15 15 16 16 17 17 18 18 19 19 20 20 21 21 22 22 23 23 24 24 25 25 26 26 27 27 28 28 29 29 RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET
DMTS INTERCONNECTION BOX OR LU 2 TO DMTC J7 OR 2J26 TO 1J3 OUTPUT DATA BITS

13 21 14 22 15 23 16 24 17 25 18 26 29 39 30 40 31 41 32 42 33 43 34 44 35 45 36 46 37 47 49 58 50 59 51 60 52 61 53 62 54 63 55 64 56 65 57 66 67 75 68 76 69 77 70 78 71 79 72 80 8 9 11 10 12 13 15 14 16 17 19 18 20 21 23 22 25 26 28 27 29 30 32 31 35 36 38 37 39 40 42 41 46 47 49 48 50 51 53 52 56 57 59 58 60 61 63 62 67 68 70 69 71 72 74 73 77 78 80 79 00 00 01 01 02 02 03 03 04 04 05 05 06 06 07 07 08 08 09 09 10 10 11 11 12 12 13 13 14 14 15 15 16 16 17 17 18 18 19 19 20 20 21 21 22 22 23 23 24 24 25 25 26 26 27 27 28 28 29 29 RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET
DMTC TO CENTRAL COMPUTER J74 TO 1J2

13 21 14 22 15 23 16 24 17 25 18 26 29 39 30 40 31 41 32 42 33 43 34 44 35 45 36 46 37 47 49 58 50 59 51 60 52 61 53 62 54 63 55 64 56 65 57 66 67 75 68 76 69 77 70 78 71 79 72 80 8 9 11 10 12 13 15 14 16 17 19 18 20 21 23 22 25 26 28 27 29 30 32 31 35 36 38 37 39 40 42 41 46 47 49 48 50 51 53 52 56 57 59 58 60 61 63 62 67 68 70 69 71 72 74 73 77 78 80 79
A9 MODULE TO 1J9 TO DMTU A A9 TO 1J9 TO 1J1

A20 A21 A19 A18 A56 A57 A16 A17 B3 B2 A35 A34 A31 A33 A30 A32 B25 B24 91 83 86 78 90 82 95 94 92 84 89 81 88 80 87 79 93 85 91 83 86 78 90 82 95 94 92 84 89 81 88 80 87 79 93 85
1J3 TO A14 MODULE

8 9 11 10 12 13 15 14 16 17 19 18 20 21 23 22 25 26 28 27 29 30 32 31 35 36 38 37 39 40 42 41 46 47 49 48 50 51 53 52 56 57 59 58 60 61 63 62 67 68 70 69 71 72 74 73 77 78 80 79 B66 B32 B28 B68 B18 B19 B20 B21 B62 B25 B61 B23 B27 B29 B65 B26 B53 B17 B15 B16 B4 B41 B5 B6 B46 B11 B45 B7 B12 B13 B48 B49 A70 A35 A31 A34 A21 A22 A23 A24 A65 A28 A62 A26 A29 A32 A66 A30 A57 A20 A17 A18 A12 A45 A50 A48 A54 A13 A53 A49 0D00 0F00 0D01 0D01 0D02 PD02 0D03 0D03 0D04 0D04 0D05 0D05 0D06 0D06 0D07 0D07 0D08 0D08 0D09 0D09 0D10 0D10 0D11 0D11 0D12 0D12 0D13 0D13 0D14 0D14 0D15 0D15 0D16 0D16 0D17 0D17 0D18 0D18 0D19 0D19 0D20 0D20 0D21 0D21 0D22 0D22 0D23 0D23 0D24 0D24 0D25 0D25 0D26 0D26 0D27 0D27 0D28 0D28 0D29 0D29 RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET
1J2 TO A13 MODULE

8 9 11 10 12 13 15 14 16 17 19 18 20 21 23 22 25 26 28 27 29 30 32 31 35 36 38 37 39 40 42 41 46 47 49 48 50 51 53 52 56 57 59 58 60 61 63 62 67 68 70 69 71 72 74 73 77 78 80 79 B55 B36 B57 B36 B65 B35 B66 B35 B63 B34 B61 B34 B60 B33 B58 B33 B43 B32 B45 B32 B49 B31 B51 B31 B54 B30 B52 B30 B48 B29 B46 B29 A61 A10 A63 A10 A64 A9 A66 A9 A72 A8 A70 A8 A69 A7 A67 A7 A55 A6 A57 A6 A58 A5 A60 A5 A54 A4 A52 A4 ID00 ID00 RET ID01 ID01 RET ID02 ID02 RET ID03 ID03 RET ID04 ID04 RET ID05 ID05 RET ID06 ID06 RET ID07 ID07 RET ID08 ID08 RET ID09 ID09 RET ID10 ID10 RET ID11 ID11 RET ID12 ID12 RET ID13 ID13 RET ID14 ID14 RET ID15 ID15 RET ID16 ID16 RET ID17 ID17 RET ID18 ID18 RET ID19 ID19 RET ID20 ID20 RET ID21 ID21 RET ID22 ID22 RET ID23 ID23 RET ID24 ID24 RET ID25 ID25 RET ID26 ID26 RET ID27 ID27 RET ID28 ID28 RET ID29 ID29 RET
INPUT DATA BITS

00 00 01 01 02 02 03 03 04 04 05 05 06 06 07 07 08 08 09 09 10 10 11 11 12 12 13 13 14 14 15 15 16 16 17 17 18 18 19 19 20 20 21 21 22 22 23 23 24 24 25 25 26 26 27 27 28 28 29 29 RET RET RET RET RET RET RET RET RET RET RET RET RET
DATA BITS
WD0 WD0 WD1 WD1 WD2 WD2 WD3 WD3 WD4 WD4 WD5 WD5 WD6 WD6 WD7 WD7 WDP WDP RET RET RET RET RET RET RET RET RET
NOTE PIN NUMBERS ON MODULE A23, 1J10, AND DMTU B2J2 ARE THE SAME AS PIN NUMBERS ON A9, 1J9 AND 1J1.
RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET RET
DMTU A TO DMTC TO MODULE A9 1J1 TO 1J9 TO A9

64 53 60 49 65 54 58 47 63 52 61 50 59 48 57 46 62 51 64 53 60 49 65 54 58 47 63 52 61 50 59 48 57 46 62 51 A12 A13 A7 A6 A11 A10 A5 A4 A24 A25 A23 A22 A26 A28 A27 A29 A63 A62
DATA BITS
RD0 RD0 RD1 RD1 RD2 RD2 RD3 RD3 RD4 RD4 RD5 RD5 RD6 RD6 RD7 RD7 RDP RDP RET RET RET RET RET RET RET RET RET
NOTE PIN NUMBERS ON DMTU B 2J2, DMTC 1J10, AND MODULE A23 ARE THE SAME AS PIN NUMBERS ON 1J1, 1J9, AND A9.
9-16
NAVAIR 01-75PAC-12
NOTE (Continued)
8
A14 MODULE TO A3 AND A17 MODULES

A8 A5 A4 A9 A3 A10 A7 A6
9
A35 A34 A74 A73 B5 B4 B55 B51
A35 A34 A74 A73 B5 B4 B55 B51
I00/0B0 I00/0B1 I00/0B2 I00/0B3 I00/0B4 I00/0B5 I00/0B6 I00/0B7
A72 A51 B14 A14 A10 A12 A16 A18 A15
A65 A69 A28 A29 A30 A34 A32 A31 A72
T1D7 T1D8 T1D9 T1D10 T1D11 T1D12 T1D13 T1D14 T1D15
14
A15 MODULE TO A30 MODULE

B63 B27 B51 B62 B59 B58 B23 B55 B56 B61 B64 B65 B57 B54 B53 B52 B5 B42 B11 B44 A74 B7 B10 B13 J14-11 J14-9 J14-7 J14-5 J14-12 J14-10 J14-8 J14-6 J14-23 J14-25 J14-27 J14-29 J14-24 J14-26 J14-28 J14-30 J14-31 J14-33 J14-35 J14-37 J14-32 J14-34 J14-36 J14-38 J14-45 J14-46 J14-47 J14-44 J14-49 J14-50 J14-51 J14-48 C1I0G C1I1G C1I2G C1I3G C1I0A C1I1A C1I2A C1I3A C2I0G C2I1G C2I2G C2I3G C2I0A C2I1A C2I2A C2I3A MTASC1 MTBSC1 MTCSC1 MTDSC1 MTASC2 MTBSC2 MTCSC2 MTDSC2 C1BL1 C1BL2 C1BL3 C1BL4 C2BL1 C2BL2 C2BL3 C2BL4
J15-35 J15-32 J15-29 J15-26
A34 B6 B8 B12
TAC2 TBC2 TCC2 TDC2
18
23
B73 B36 B33 B28 B70 B69 B29 B30 A52 A51 A55 A56 A3 A49 A64 A63 C1MJADD-0 C1MJADD-1 C1MJADD-2 C1MJADD-3 C1MJADD-4 C1MJADD-5 C1MJADD-6 C1MJADD-7
A43 A64 B41 B61 A6 A63 A75 B58 B70 A54 A45 A50 A48 B60 B71 B59 B72 B4 DROP0A1 DROP1A1 DROP2A1 DROP3A1 ENV01 ENV11 ENV21 ENV31 ENVP1
16
A2 MODULE TO A1, A3, A4, A8

A2 A64 A68 A70 A73 A72 A71 A69 A65 B47 B46 B44 B43 B42 B45 B48 B49 A75 B41 B40 B39 A4 A10 A16 A11 A9 A15 A60 A61 A69 A65 A48 B70 A68 B28 A59 A54 A57 A20 A19 A18 A17 A3 B62 B61 B60 A3 A4 A5 A43 A42 A41 B50 A13 A15 A11 A14 A45 A51 A46 A44 A52 A16 A1 A8 C1I00 C1I01 C1I02 C1I03 C1I04 C1I05 C1I06 C1I07 C1I08 C1I09 C1I10 C1I11 C1I12 C1I13 C1I14 C1I15 C1I16 C1I17 C1I18 C1I19

A3 A63 A62 A65 A60 A25 A24 A27 A22
10
12
A2 A43 A44 A45 A46 A47 A48 A49 A50
A13 B9 B7 B2 B3 A35 A34 A30 A31
A1 A60 A59 A58 A57 A61 A62 A63 A64
A11 B9 B7 B2 B3 A35 A34 A30 A31 IB1/0 IB1/1 IB1/2 IB1/3 IB1/4 IB1/5 IB1/6 IB1/7
A11 AND A12 MODULES TO A3 AND A17

A11 A9 A8 A7 B59 A52 B43 A47 A49 A12 A8 A5 A4 A9 A3 A10 A7 A6 A3 A36 A33 A75 A72 B6 B3 B54 B50 A17 A36 A33 A75 A72 B6 B3 B54 B50 101-0B0 101-0B1 101-0B2 101-0B3 101-0B4 101-0B5 101-0B6 101-0B7
19
24
B49 A31 A32 A33 A34 B65 A73 B66 B62 A48 A54 A53 A52
A8 A45 A46 A47 A4 A5 A6 A7 A41 A42 A43 A44 B53 B54 B55 B56 A60 A59 A56 A58 A61 A62 A63 B50 C1A00 C1A01 C1A02 C1A03 C1A04 C1A05 C1A06 C1A07 C1A08 C1A09 C1A10 C1A11
A43 A64 B41 B61 A6 A63 A75 B58 B51 B52 B55 B56 B73 B39 A71 A72 DROP0B1 DROP1B1 DROP2B1 DROP3B1 ENV41 ENV51 ENV61 ENV71

A17 A63 A62 A65 A60 A25 A24 A27 A22 A13 B10 B6 B5 B4 A36 A37 A33 A32 A16 A43 A44 A45 A46 A47 A48 A49 A50 A1 A72 A73 A74 A75 A76 B39 B40 B41 A11 B10 B6 B5 B4 A36 A37 A33 A32 IB2/0 IB2/1 IB2/2 IB2/3 IB2/4 IB2/5 IB2/6 IB2/7
13

J16-25 J16-26 J16-7 J16-27 J16-8 J16-6 J16-28 J16-9 J16-29 J16-10 B71 B72 B73 B55 B56 B54 B53 B27 B23 B26 PRS01 PRS02 PRS03 PRS04 PRS05 RS06 PRS07 PRS08 PRS09 PRS10
A69 B44 B42 B45 B46
25
20

A9 A8 A50 A49 A46 A47 A48 A3 A55 A51 A50 A47 A44
B2 B3 A66 A71 A35 B40 A33 A73
A46 A54 A68 B56
17
11

B52 B30 B31 B32 B33 A74 B41 B42 B69 A75 B72 A61 A63 A60 A24 A71 A67 A57 B39 A64 B13 A72 B35 B40 A62 A26 B26 B29 B28 B25 B27 B34 B29 B32 B70 A59 A20 A21 A22 A25 A24 A23 BITC04BITC08BITC09BITC10BITC11CMD0CMD1CMD3CMD4CMD5RMDB0 RMDB1 RMDB2 RMDB4 T1D0 T1D1 T1D2 T1D3 T1D4 T1D5 T1D6
A48 A56 A57 A58
C1 RDATA 0 C1 RDATA 1 C1 RDATA 2 C1 RDATA 3
A51 A50 A47 A44 A70

A16 A17 B62 B61 B60 A3 A4 A5 A43 A42 A41 A50 A13 A15 A11 A14 A45 A51 A46 A44 A52 A16 A18 A10 A16 A11 A9 A15 A60 A61 A69 A65 A48 B70 A68 B28 A59 A54 A57 A20 A19 A18 A17 A22 A1 C2I00 C2I01 C2I02 C2I03 C2I04 C2I05 C2I06 C2I07 C2I08 C2I09 C2I10 C2I11 C2I12 C2I13 C2I14 C2I15 C2I16 C2I17 C2I18 C2I19
ACC1RD0 ACC1RD1 ACC1RD2 ACC1RD3 ACC1RD4 ACC1RD5 ACC1RD6 ACC1RD7 ACC1RDP
21
A46 A54 A68 B56 A47 A49 A54 A55 C1 RDATA 4 C1 RDATA 5 C1 RDATA 6 C1 RDATA 7
26
A1 MODULE TO A30
A54 A52 A51 A53 A22 A21 A55 A56 A24 A23 A45 A44 A43 A42 A41 J16-39 J16-17 J16-37 J16-38 J16-19 J16-40 J16-20 J16-38 J16-18 J16-16 J15-41 J15-42 J15-60 J15-61 J15-62 PR001 PR002 PR003 PR004 PR005 PR006 PR007 PR008 PR008 PR010 COLS1 COLS2 COLS3 COLS4 COLS5
15

J15-4 J15-3 J15-2 J15-1 J15-9 J15-10 J15-11 J15-12 J15-13 J15-33 J15-30 J15-27 B33 B35 B71 B29 B34 B36 B32 B72 B1 B41 B9 B43 C1I0S C1I1S C1I2S C1I3S C2I0S C2I1S C2I2S C2I3S TAC1 TBC1 TCC1 TDC1
A64 A68 A70 A73 A72 A71 A69 A65 B47 B46 B44 B43 B42 B45 B48 B49 A75 B41 B40 B39

A9 A8 A50 A49 A46 A47 A48 A3 A55
27
B49 B20 B65 A73 B66 B62 A48 A54 A53 A52 B19 B18 B17
A52 A49 A48 A45
22

A41 A43 A42 A44 A65 A46 A45 A47 A58 A58 A51 A60 A53 B1 A76 B39 A74 B44 A58 A51 A60 A53 B1 A76 B39 A74 B44
A70 B49 B48 B43 B47
C1WD0 C1WD1 C1WD2 C1WD3 C1WD4 C1WD5 C1WD6 C1WD7 C1WDP
A69
A52 A49 A48 A45
BDC1RD0 BDC1RD1 BDC1RD2 BDC1RD3 BDC1RD4 BDC1RD5 BDC1RD6 BDC1RD7 BDC1RDP

B73 B36 B33 A52 A51 A55 C2MJADD0 C2MJADD1 C2MJADD2
9-17
NAVAIR 01-75PAC-12
NOTE (Continued)
27
32

B28 B70 B69 B29 B30 A56 A3 A49 A64 A63 C2MJADD3 C2MJADD4 C2MJADD5 C2MJADD6 C2MJADD7

A43 A64 B41 B61 A6 A63 A75 B58 B70 C2A00 C2A01 C2A02 C2A03 C2A04 C2A05 C2A06 C2A07 C2A08 C2A09 C2A10 C2A11 A54 A45 A50 A48 B60 B71 B59 B72 B4 DROP0A2 DROP1A2 DROP2A2 DROP3A2 ENV02 ENV12 ENV22 ENV32 ENVP2
28

A8 A45 A46 A47 A4 A5 A6 A7 A41 A42 A43 A44 B53 B54 B55 B56 A60 A59 A56 A58 A61 A62 A63 B50
33

A41 A43 A42 A44 A65 A46 A45 A47 A48 A59 A52 A61 A54 A38 A75 B40 A73 B45 A59 A52 A61 A54 A38 A75 B40 A73 B45 C2WD0 C2WD1 C2WD2 C2WD3 C2WD4 C2WD5 C2WD6 C2WD7 C2WDP
29

34

A72 A71 A70 A69 A68 A67 A66 A65 A14 A51 A50 A47 A44 A51 A50 A47 A44 A70 ACC2RD0 ACC2RD1 ACC2RD2 ACC2RD3 ACC2RD4 ACC2RD5 ACC2RD6 ACC2RD7 ACC2RDP
30

31
35

A43 A64 B41 B61 A6 A63 A75 B58 B51 B52 B55 B56 B73 B39 A71 A72 DROP0B2 DROP1B2 DROP2B2 DROP3B2 ENV42 ENV52 ENV62 ENV72

A72 A71 A70 A69 A68 A67 A66 A65 A14 A52 A49 A48 A45 A52 B49 A48 A45 BDC2R0 BDC2R1 BDC2R2 BDC2R3 BDC2R4 BDC2R5 BDC2R6 BDC2R7 BDC2RP
A69
9-18
NAVAIR 01-75PAC-12
POWER ON, OVERTEMPERATURE, AND TAPE INSTALLATION
START 1
CAUTION
ARE TAPES INSTALLED IN THE DMTU
YES NO
YES IS WRITE LOCKOUT LIGHT ON FOR ALL DMTU YES
SWITCH PWR ON TO DMTC AND DMTU
POWER MUST BE APPLIED TO DMTU BEFORE INSERTING TAPE CARTRIDGE OR DAMAGE TO TAPE WILL RESULT
NO
POSITION SAFE SWITCH ON SCRATCH TAPES TO WRITE POSITION AND INSTALL SCRATCH TAPES IN DMTU, BUT DO NOT CLOSE DOORS
IS WRITE LOCKOUT LIGHT OFF FOR ALL DMTU YES IS RDY LIGHT OFF FOR EACH DMTU NO
NO
NO
IS RDY LIGHT ON FOR ALL DMTU
YES
REMOVE ALL TAPES
IS DMTC PWR ON LIGHT ON
YES
IS DMTC OVERTEMP LIGHT OFF NO
YES
IS POWER ON LIGHT ON FOR EACH DMTU NO
YES
IS RDY LIGHT OFF FOR EACH DMTU NO
YES
CLOSE ALL CARTRIDGE DOORS
FAULT DETECTION FAULT ISOLATION
NO
DMTU REMOVE POWER SUPPLY ACCESS COVER IS FAN OPERATING

NO
FAN
YES
MEASURE TP VOLTAGES
MEASURE VOLTAGE ON A15-TP5
NOTE
1 SEE SHEET 9 DMTC MODE DISPLAY LAMP TEST SEQUENCE SEE SHEET 9 LEVEL SELECT WAVEFORMS SEE SHEET 9 DMTC LAMP TEST COLORS SEE SHEET 10 BIT MODE OPTIONS SEE SHEET 5 MODE DISPLAY SWITCHES AND A/N CHARACTER ADVANCE 4 FOR OTHER CHARACTERS SEE SHEET 10 A/N DISPLAY INPUTS SEE SHEET 10 MODE DISPLAY SWITCH CONTACTS OVERTEMP AND PWR ON LIGHT SHOULD BE OBSERVED PERIODICALLY THROUGHOUT THE DMTC AND DMTU OPERATION
PS1
NO
TP1=12.5 (1)V
110
TP5= 0 (0.5)V
109 YES
NO
A15
2 3 4 5 6 7 8
YES
PS3 PS3
NO
TP3= 5 (1)V
113
YES
PS4
NO
TP4=15 (1)V
112
A29
YES NO YES YES
A15
NO
PS2
NO
TP2=-15 (1)V
111
TP6=-10 (1)V
115
REINSTALL POWER SUPPLY ACCESS COVER
REPLACE PWR ON LAMP
HAS FAILURE BEEN CORRECTED
YES
LAMP
Figure 9-4. DMTS Fault Detection/Isolation Diagram (Sheet 1 of 10)
9-19
NAVAIR 01-75PAC-12
LAMP TEST
PRESS AND HOLD LAMP TEST FOR EACH DMTU
ARE ALL DMTU INDICATOR LIGHTS ON
RELEASE LAMP TEST
YES
PRESS AND HOLD DMTC LAMP TEST
DOES MODE DISPLAY CYCLE PROPERLY 1
YES
DO A/N DISPLAYS TOTAL 32 QUESTION MARKS
YES
5
DO ALL LIGHTS COME ON WITH PROPER COLORS
YES
3
RELEASE DMTC LAMP TEST
NO FAULT DETECTION FAULT ISOLATION DMTU (LED PNL)

INTERCHANGE SWITCH ASSYS BACK TO ORIGINAL LOCATIONS DID PROBLEM TRANSFER WITH SUSPECT SWITCH ASSY INTERCHANGE SUSPECT SWITCH ASSY CONTAINING FAULTY LIGHT WITH ADJACENT SWITCH ASSY
NO
NO
NO
SUSPECT LAMP (OP PNL)
YES
YES
DOES A LIGHT FAIL TO COME ON PROPERLY 1
DOES FAILURE AFFECT ONLY A 4 - CHARACTER LED ASSY
YES
REMOVE A/N BEZEL AND REPLACE LED DIP; REINSTALL BEZEL
REPLACE SUSPECT LAMP
NO
INTERCHANGE SWITCH ASSYS BACK TO ORIGINAL LOCATIONS
NO
NO
IS A WRONG CHARACTER DISPLAYED IN BOTH A/N
NO
YES
YES
(OP PNL) LAMP
YES
REMOVE MODE DISPLAY IS THE WRONG CHARACTER ONE OF THE 63 AVAIL CHAR.
NO
LED DIP
NO
IS MORE INFO SEL MOD OR ON LN/OFF LN THE PROBLEM
YES
A1
YES A1
MODE DISPLAY YES

REINSTALL DISPLAY MODE MEASURE MODE DISPLAY INPUTS (J16) WHILE PRESSING LAMP TEST . MEASURE INPUTS WHILE LAMP TEST IS NOT PRESSED
NO NO
MEASURE A1-TP1 AND A1-TP2 WHILE PRESSING LAMP TEST. THEN MEASURE A1-TP1 AND A1-TP2 WITHOUT PRESSING LAMP TEST 6 1
NO
A1
ARE WAVEFORMS CORRECT 2
A15
2
OP PNL
YES
REMOVE OP PANEL
NO
INTERCHANGE A2 AND A16. RERUN LAMP TEST MEASURE J15 A/N COLUMN SELECT INPUTS 6
YES
A1
NO
HAS PROBLEM BEEN CORRECTED
NO YES A2
REINSTALL OP PANEL
A1
9-20
NAVAIR 01-75PAC-12
INITIAL SETUP AND AUTOMATIC BIT

VERIFY THAT CP901 AND DMTU A AND DMTU B ARE 3 ASSIGNABLE TO EITHER CTRL AND THAT EACH CTRL IS SELECTABLE TO ON LN THEN BACK TO OFF LN
ARE ARE ARE THESE THESE THESE FUNCTIONS FUNCTIONS FUNCTIONS OPERATING OPERATING OPERATING PROPERLY PROPERLY PROPERLY
YES A
NO
ASSIGN DMTU A AND DMTU B TO CTRL 1, SET DMTU A ADDRESS TO 1, SET DMTU B ADDRESS TO 0, ASSIGN CP901 TO CTRL 1
PRESS AND HOLD CTRL 1 MA CLR
ARE 4-SEGMENT BIT LIGHTS ON FOR CTRL 1 NO
YES
RELEASE CTRL 1 MA CLR
ARE 4-SEGMENT BIT LIGHTS OFF
YES

INTERCHANGE BOARDS A2 AND A16, A3 AND A17, AND A4 AND A18 RESPECTIVELY. ONE PAIR AT A TIME, BETWEEN EACH INTERCHANGE CHECK TO SEE IF PROBLEM HAS TRANSFERRED TO OTHER CTRL
NO
C D BOARD INDICATED NO RECORD FIRST SUSPECTED BOARD YES NO IS MORE INFO GREEN
YES
IS PROBLEM IN A 4-SEGMENT BIT LIGHT NO ATTEMPT TO ASSIGN AN I/O TO BOTH CTRLS. MONENTARILY PRESS INIT BIT ON
IS A15 DISPLAYED
YES
DID PROBLEM TRANSFER TO OTHER CTRL NO
YES
BOTH CTRL, CTRL 1 FIRST
NO OP PANEL
DOES SUSPECT SWITCH ACTUATE PROPERLY YES
MEASURE SUSPECT SWITCH ACTUATION WITH OHMMETER 7 7
MONENTARILY PRESS MORE INFO
RECORD SECOND SUSPECTED RECORD F
LAST BOARD INTERCHANGED
ARE 4-SEGMENT BIT LIGHTS OFF
NO REINSTALL OP PANEL BOARD INDICATED A1 REMOVE OP PANEL
IS PROBLEM WITH THE LIGHT FOR A1 YES
NO A15
YES
IS TEST ON DISPLAYED IN BOTH A/N YES
NO
YES IS MORE INFO SEL MODEL (CLR) OR ON LN/OFF LN THE PROBLEM
REPLACE SUSPECT A15 BOARD WITH A15 BOARD FROM STOCK
NO A15
YES
DOES ASSOCIATED SWITCH ACTUATE WHEN PRESSED
NO
YES HAS PROBLEM BEEN CORRECTED MONENTARILY PRESS CLR FOR BOTH CTRLS A15 IS PROBLEM WITH A LIGHT IN THE AYK-14 SECTION YES ATTEMPT TO ACTUATE ASSOCIATED SWITCH
YES
NO
IS DMTU THE PROBLEM
NO
NO
A1
DMTU
9-21
NAVAIR 01-75PAC-12
INITIAL SETUP AND AUTOMATIC BIT (CONT)
RERUN TEST EXCEPT SUBSTITUTE CTRL 2
NO DOES CTRL 1 A/N DISPLAY TEST OK (ALLOW 4 SEC) NO C D A15 NO YES E IS A SUSPECTED FAILED-BOARD DISPLAYED NO RESELECT DMTU TO OTHER CTRL AND PRESS INIT BIT FOR SUSPECT CTRL DOES 4-SEGMENT BIT LIGHT OR A/N DISPLAY A FAILURE YES IS AN I/O BOARD AND CTRL BOARD INVOLVED NO ARE 2 I/O BOARDS AND A CTRL BOARD INVOLVED NO MOMENTARILY PRESS INIT BIT FOR OTHER CTRL IS A DMTU AND DMTU INTF BOARD INVOLVED NO INTERCHANGE THIRD SUSPECTED BOARD WITH SAME BOARD FROM OTHER CTRL YES DOES A/N DISPLAY TEST OK IS AN I/O INPUT AND AN I/O OUTPUT INVOLVED NO INTERCHANGE FIRST SUSPECT BD WITH SAME BD FROM OTHER CTRL MOMENTARILY PRESS INIT BIT FOR SAME CTRL YES REPLACE SUSPECT I/O OUT BOARD WITH SAME BOARD FROM STOCK MOMENTARILY PRESS MOMENTARILY PRESS CTRL 1 CLR INIT BIT FOR PREVIOUS CTRL YES INTERCHANGE SUSPECT DMTU INTF BD WITH ANOTHER DMTU INTF BOARD IN THE DMTC MOMENTARILY PRESS INIT BIT AND MORE INFO FOR SAME CTRL REASSIGN I/O FROM SUSPECT CTRL TO OTHER CTRL IS A15 AND A29 INVOLVED NO YES MEASURE A15-TP 1, 2, 3, 4 6 ARE VOLTAGES CORRECT NO YES A29 NO IS INIT BIT GREEN YES REMOVE OP PANEL MEASURE MA CLR SWITCH ACTUATION WITH OHMMETER 7 OP PANEL NO DOES SWITCH ACTUATE PROPERLY YES REINSTALL OP PANEL MOMENTARILY PRESS CTRL 1 CLR HAS BIT TEST BEEN RUN ON CTRL 2
YES
DID TEST OK GO OFF
YES
YES 4
NO
A1
IS MORE INFO GREEN
NO
YES
REASSIGN I/O FROM SUSPECT CTRL TO OTHER CTRL
MOMENTARILY PRESS INIT BIT FOR OTHER CTRL
DOES A/N DISPLAY TEST OK YES
NO I/O BD
YES MOMENTARILY PRESS MORE INFO AND RECORD THIRD SUSPECTED BOARD
SUSPECT CTRL BD
YES
A15 DOES A/N DISPLAY THE SAME SUSPECT DMTU & DMTU INTF BD NO
YES DMTU
SUSPECT DMTU INTF NO
SUSPECT CTRL BD
DOES A/N DISPLAY TEST OK YES
I/O IN BOARD
NO MOMENTARILY PRESS INIT BIT FOR SAME CTRL DOES CTRL A/N DISPLAY TEST OK YES NO
SUSPECT I/O OUT BOARD YES
DOES A/N DISPLAY TEST OK NO
FIRST SUSPECT BOARD
THIRD SUSPECT BD
SECOND SUSPECT BD
9-22
NAVAIR 01-75PAC-12
MODE DISPLAY SWITCHES AND A/N CHARACTER ADVANCE
RERUN TEST, EXCEPT SUBSTITUTE CTRL 2 NO MOMENTARILY PRESS CTRL 1 SEL MODE 4 MOMENTARILY PRESS BIT OPTION MOMENTARILY PRESS OP OPTION MOMENTARILY PRESS CTRL 1 MORE INFO SEVERAL TIMES DOES CTRL 1 A/N CHARACTERS CHANGE WITH EACH SWITCH ACTUATION NO MOMENTARILY PRESS EACH OF THE OTHER 8 MODE DISPLAY SWITCHES EXCEPT HALT HAS THIS MODE DISPLAY TEST BEEN RUN FOR CTRL 2
YES
YES 5
YES IS CTRL 1 SEL MODE AMBER YES DOES MODE DISPLAY CONTAIN BIT MODE OPTIONS NO DOES MODE DISPLAY CONTAIN BIT TEST OPTIONS NO IS OP BORDER LIGHT ON
YES IS ONLY CTRL 1 MORE INFO LIGHT GREEN AND ONLY CTRL 1 A/N DISPLAY ! NO
YES
YES
NO
4 NO
DOES EACH BORDER LIGHT COME ON WHILE THAT SWITCH IS PRESSED YES
NO
MOMENTARILY PRESS HALT OPTION
IS OP BORDER LIGHT OFF NO
YES 7

A1 OP PNL
REMOVE MODE DISPLAY
REINSTALL MODE DISPLAY
NO REMOVE OP PANEL MEASURE SUSPECT SWITCH ACTUATION WITH OHMMETER 7 DOES SUSPECT SWITCH ACTUATE PROPERLY REINSTALL OP PANEL A1 MEASURE SUSPECT SWITCH ACTUATION WITH OHMMETER 7 YES DOES SUSPECT SWITCH ACTUATE PROPERLY
A1
YES
NO OP PANEL
9-23
NAVAIR 01-75PAC-12
DMTU MANUAL OPERATION
SET ALL DMTU TO MANUAL OPERATION
ARE ALL AUTO LIGHTS OFF
YES
OPERATE FWD, RWND AND STOP MANUAL CONTROLS FOR ALL DMTU
DO FWD , RVS AND STOP LIGHTS COME ON AND GO OFF PROPERLY NO
YES
IS PWR ON LIGHT ON FOR ALL DMTU NO
YES 9
NO

DMTU
DMTU
DMTU
MOMENTARILY PRESS ALL OPTION 7
IS ALL BORDER LIGHTS ON NO
YES
DOES CTRL 1 A/N DISPLAY TEST OK NO
YES
MOMENTARILY PRESS MODE DISPLAY HALT PRESS CTRL 1 SEL MODE MOMENTARILY PRESS EXIT OPTION
DOES CTRL 1 A/N DISPLAY DEFECTIVE MODULE NO
YES DEFECTIVE MODULE
MOMENTARILY PRESS MODE DISPLAY HALT MOMENTARILY PRESS LOOP 1 BIT MODE OPTION
DOES CTRL 1 A/N DISPLAY DEFECTIVE MODULE NO
YES DEFECTIVE MODULE
REPEAT ABOVE STEP FOR LOOPS 2 THROUGH 5
9-24
NAVAIR 01-75PAC-12
ON DMTU A SET ADDRESS TO 1, ON DMTU B SET ADDRESS TO 0 MOMENTARILY PRESS DMTU TEST OPTION FOR FIRST AVAILABLE DMTU
DMTU MOTION COMMANDS AND STATUS AT BOT

NO
HAVE BOTH DMTU BEEN TESTED ON CTRL 1
YES
MOMENTARILY PRESS EXIT
10
ASSIGN CP901 AND BOTH DMTU TO CTRL 1 AND MOMENTARILY PRESS CTRL 1 SEL MODE
MOMENTARILY PRESS DMTU TEST OPTION FOR OTHER DMTU
OPEN CARTRIDGE DOOR
CLOSE CARTRIDGE DOOR
CLR A/N; MOMENTARILY PRESS CTRL 1 SEL MODE
ASSIGN ANY I/O AND BOTH DMTU TO CTRL 2 AND MOMENTARILY PRESS CTRL 2 SEL MODE. PRESS TEST OPTION FOR FIRST AVAILABLE DMTU
NO MOMENTARILY PRESS READ REV SWITCH MOMENTARILY PRESS READ REV SWITCH MOMENTARILY PRESS IRG/FM
IS SEL LIGHT ON STEADY FOR THAT DMTU ONLY NO
YES
MOMENTARILY PRESS IRG/FM
YES
NO
DOES A/N DISPLAY BOT SIMULTANEOUS WITH SWITCH ACTUATION
YES
DOES A/N DISPLAY NOT READY
YES
DOES A/N DISPLAY BOT
YES
DOES A/N DISPLAY TEST OK
YES
DOES A/N DISPLAY TEST OK
YES
CLR A/N; MOMENTARILY PRESS CTRL 2 SEL MODE
NO
NO
NO
NO
EXIT THIS CTRL, REASSIGN I/O AND DMTU TO OTHER CTRL, SELECT SEL MODE AND SAME DMTU TEST FOR OTHER CTRL
RERUN TEST ON OTHER RERUN TEST ON OTHER CTRL STARTING AT CTRL STARTING AT LAST SUCCESSFUL DIAMOND LAST SUCCESSFUL DIAMOND OR BUBBLE OR BUBBLE
HAS PROBLEM BEEN CORRECTED IN OTHER CTRL NO
YES
EXIT THIS CTRL, REASSIGN I/O AND DMTU BACK TO ORIGINAL CTRL SELECT SEL MODE AND SAME DMTU TEST FOR ORIGINAL CTRL
INTERCHANGE SUSPECT OUTPUT ADAPT BOARD FROM THE ORIGINAL CTRL WITH SAME BOARD FROM OTHER CTRL
RERUN TEST ON ORIGINAL CTRL STARTING AT LAST SUCCESSFUL DIAMOND OR BUBBLE
YES INTERCHANGE SUSPECT DMTU INTF BOARD WITH OTHER DMTU INTF BOARD IN THE DMTC RERUN TEST ON SAME CTRL STARTING AT LAST SUCCESSFUL DIAMOND OR BUBBLE HAS PROBLEM BEEN CORRECTED IN SUSPECT DMTU
SUSPECT DMTU INTF
NO
SUSPECT DMTU
SUSPECT OUTPUT ADAPT
YES
NO
C1 BD
FAULT ISOLATION FAULT DETECTION

NO REMOVE SCRATCH TAPES AND POSITION KNOBS TO SAFE
10
MOMENTARILY PRESS CTRL 1 SEL MODE
MOMENTARILY PRESS DMTU TEST OPTION FOR FIRST AVAILABLE DMTU
DOES A/N DISPLAY WLO
YES
CLR A/N; PRESS HALT
MOMENTARILY PRESS CTRL 1 SEL MODE
HAVE BOTH DMTU BEEN TESTED ON CTRL 1 NO
YES
11
REINSTALL SCRATCH TAPES IN BOTH DMTU; CLOSE DOORS. RDY LIGHT COMES ON
ASSIGN ANY I/O AND BOTH DMTU TO CTRL 1
MOMENTARILY PRESS IRG/FM
9-25
NAVAIR 01-75PAC-12
DMTU COMMANDS AND STATUS AT EOT
RERUN TEST EXCEPT SUBSTITUTE CTRL 2
NO
YES
ON DMTC TURN POWER OFF, AND MAN/AUTO MODE SWITCH TO MAN MODE
CONFIGURE BOTH DMTU TO MANUAL 11 OPERATION
SWITCH BOTH DMTU TO AUTO, ASSIGN ANY I/O AND DMTU TO CTRL 1 AND MOMENTARILY PRESS CTRL 1 SEL MODE
PRESS HALT CLR MOMENTARILY PRESS A/N ANDFOR BOTH DMTU. RWND PRESS READ FWD ALLOW TAPE TO RUN UNTIL TAPE STOPS YES (APPROXIMATELY 2 MINUTES)
WHEN TAPES STOP, TURN POWER OFF TO BOTH DMTU
REMOVE SCRATCH TAPES AND POSITION SAFE SWITCH TO WRITE LOCKOUT
MOMENTARILY PRESS FWD FOR BOTH DMTU AND ALLOW TAPE TO RUN UNTIL TAPE STOPS. (3 1/2 MINUTES MAXIMUM)
MOMENTARILY PRESS DMTU TEST OPTION FOR FIRST AVAILABLE DMTU
NO
END OF TEST
ARE EOT AND LOW TAPE LIGHTS ON AND BOT LIGHT OFF NO YES
MOMENTARILY PRESS READ REV
PRESS HALT AND CTRL 1 SEL MODE
YES IS EOT , THEN LTW DISPLAYED IN A/N NO PRESS HALT ,CLR A/N AND PRESS READ FWD
YES
IS EOT LIGHT OFF
YES
IS FWD LIGHT ON
NO
NO

DMTU DMTU
IS RVS LIGHT ON
NO
EXIT THIS CTRL. REASSIGN I/O AND BOTH DMTU TO OTHER CTRL; SELECT SEL MODE AND SAME DMTU TEST FOR OTHER CTRL
RERUN TEST ON OTHER CTRL STARTING AT LAST SUCCESSFUL DIAMOND OR BUBBLE
HAS PROBLEM BEEN CORRECTED IN OTHER CTRL NO
YES
EXIT THIS CTRL. REASSIGN I/O AND DMTU BACK TO ORIGINAL CTRL. SELECT SEL MODE AND SAME DMTU TEST FOR ORIGINAL CTRL
INTERCHANGE SUSPECT OUTPUT ADAPT BOARD FROM THE ORIGINAL CTRL WITH SAME BOARD FROM OTHER CTRL C1 BD NO
YES
INTERCHANGE SUSPECT DMTU INTF BOARD WITH ANOTHER DMTU INTF BOARD IN THE DMTC
RERUN TEST ON SAME CTRL STARTING AT LAST SUCCESSFUL DIAMOND OR BUBBLE
HAS PROBLEM BEEN CORRECTED IN SUSPECT DMTU YES SUSPECT DMTU INTF
NO
SUSPECT DMTU
RERUN TEST ON ORIGINAL CTRL STARTING AT LAST SUCCESSFUL DIAMOND
YES SUSPECT OUTPUT ADAPT
9-26
NAVAIR 01-75PAC-12
1 DMTC MODE DISPLAY LAMP TEST SEQUENCE 1 MODE DISPLAY 6 MODE DISPLAY 11 MODE DISPLAY 12 MODE DISPLAY
2 MODE DISPLAY
BIT DMTU A DMTU B DMTU C DMTU D
7 MODE DISPLAY CONN/PIN
LEVEL SELECT WAVEFORMS - REFERENCE J16-2 (GND)

F = 1 SEC.
SCOPE SETTINGS DC
J16-14
4 (1) V
EXIT
D
J16-34 4 (1) V DC
3 MODE DISPLAY
ALL LOOP 1 LOOP 2 LOOP 3
8 MODE DISPLAY
J16-15
4 (1) V
DC
J16-33
4 (1) V
VIEW LOOKING AFT REAR VIEW OF MODE DISPLAY
DC
LOOP 4
LOOP 5
CYCLE
OP
HALT
1 21
J16
20 40
20 40
P1
1 21
4 MODE DISPLAY
9 MODE DISPLAY
3 DMTC LAMP TEST COLORS LAMP/SWITCH LAMP TEST COLORS RED GREEN AMBER AMBER AMBER RED GREEN/AMBER GREEN GREEN GREEN GREEN/AMBER LAMP/SWITCH CLR ON LN OFF LN CP901 AYK-14 DMTU A DMTU B DMTU C DMTU D BIT NUMBERS INIT MA CLR LAMP TEST COLORS GREEN AMBER AMBER AMBER AMBER AMBER AMBER AMBER AMBER AMBER AMBER
D
READ FWD READ REV
D
OVERTEMP LAMP TEST
IRG/FM
WRITE OS
WRITE FS
D
WRITE 5S WRITE AS WRITE EOF
CONT
HALT
PWR ON AYK-14 PWR
5 MODE DISPLAY
10 MODE DISPLAY
AYK-14 BIT ERR AYK-14 OVERTEMP
AYK-14 IPL/FAIL AYK-14 RESET
AYK-14 CLR MORE INFO SEL MODE
9-27
NAVAIR 01-75PAC-12
4
BIT MODE OPTIONS
A/N DISPLAY INPUTS
BIT TEST
DMTU A
DMTU B
DMTU C
DMTU D MODE EXIT DATA
CONN/PIN A1-TP 1 TO SIG RTN TP A1-TP 2 TO SIG RTN TP J15-41 TO J14-3 J15-42 TO J14-3 J15-60 TO J14-3 J15-61 TO J14-3 J15-62 TO J14-3 SUBMODE
WAVEFORM (LOGIC 1) WITH AND WITHOUT LAMP TEST EXCEPT WHEN STATED OTHERWISE
LOGIC ACTIVITY WITH LAMP TEST PRESSED: LOGIC 0 WHEN LAMP TEST NOT PRESSED
SCOPE SETTINGS 1 MS/DIV X 10 PROBE .1V/DIV .2 MS/DIV X 10 PROBE .2V/DIV 2 MS/DIV X 10 PROBE .2V/DIV
DISPLAY CLK
.2MS
1.2MS
4 ( 1)V
BIT TEST
ALL
LOOP 1
LOOP 2
LOOP 3 SUBMODE COLUMN SELECT
4 ( 1)V
8 MSEC SAME AS ABOVE
LOOP 4
LOOP 5
CYCLE
OP
HALT
SAME AS ABOVE
SAME AS ABOVE
DMTU TEST
READ FWD
READ REV
IRG/FM
WRITE 0S
WRITE FS
SAME AS ABOVE
LOGIC 0 = 0 (1)V LOGIC 1 = 4 ( 1)V
WRITE 5S
WRITE AS
WRITE EOF
CONT
HALT
VIEW LOOKING AFT J15 J14
MODE DISPLAY SWITCH CONTACTS - REFERENCE P1-30 SW NO. S1 S2 S3 S4 S5 CONN/PIN P1-25 P1-26 P1-7 P1-27 P1-8 SW NO. S6 S7 S8 S9 S10 CONN/PIN P1-6 P1-28 P1-9 P1-29 P1-10
PIN 1
PIN 1
9-28
NAVAIR 01-75PAC-12
TEST POINT
SIGNAL NAME
SIGNAL CHARACTERISTICS OPERATOR PANEL 1 A1
TEST POINT
21
SIGNAL NAME CIN090 CXDECCTRCMP INITALUNRCK-
SIGNAL CHARACTERISTICS Steering signal for selecting test sense. Operator Panel command decode enables these commands to execute at the Operator Panel when low. Tape Data In Buffer signal indicates when the input and output data counters are not equal. Signal low assertion initializes Tape Data In Buffer signal pulse of approximately 200 nsec duration. Signal low pulsing duration of approximately 8 sec from input adapter board used to strobe data into the Tape Data In Buffer. CONTROLLER BOARD 1 A4, A8
4 5 6 7 8
1 2 3 4
AND001 DISPCLK AN1CLR TBD DISPSYNC AN2CLR C2TST2 C1TST1 C1SYNC C2SYNC
Serial alphanumeric display data sent to Operator Panel. Pattern varies with data transmission. Display Clock to alphanumeric display on Operator Panel. Clock wave 1.5 MHz square wave in groups of seven during A/N load sequence. Indicates whether A/N display for Controller String 1 is loaded (h) or clear (L). TBD Synchronizes the memory address registers to the A/N display timing. Pulse every 85 sec for approximately 0.7 sec duration. Same as AN1CLR for Controller String 2. Same as C1TST1 for Controller String 2. OP sense inputs to Controller Board 1 to use in sensing OP status. Level indicates level of last signal tested. Output pulse low for oscilloscope test synchronization for Controller String 1; approximately 200 nsec duration. Same as C1SYNC for Controller String 2. CONTROLLER BOARD 3 A2, A6
22
23
24
4 5 6
5 6 7 8 9 10
25
26
1 2 3 4 5 6 7 8
CNTR ZERO RECXEXDISOUTACKB CXINITALUININPUT AVAILXCXINREGCLK I/OEN
When low, during Power-On Clear and Controller Board 3 Self-Test, this signal forces the program counter into tri-state. When low, enables the address register in the program sequence. When low precludes execution of an instruction during BIT operation and SKIP instruction execution. Output Acknowledge signal asserted low in response to an Output Available signal from an I/O. Low asserted signal pulse of approximately 200 nsec duration which initialized the tape data input buffer of Controller Board 2. Low asserted signal level when data is available for the I/O. Cleared by INACKresponse from I/O. Low asserted pulse of varying duration 100-200 nsec, to Controller Board 2 to strobe data into the I/O register. Low asserted signal when controller I/O is enabled for inputs from the I/O. Cleared by OUTPUT AVAIL- from I/O. INPUT ADAPTER A5, A19
27
28
29
10
30
1 2 3 4 5 6 7 8
CKSUMSTAT COLMNCMP STOPCKSUMSELDATA CXBI1C1DECCLK C1AS3MHZ C13MHZ
Error status of Checksum. Low for no error and high for Checksum error. Asserted high pulse which initiates transfer to next column select for Checksum. When asserted, low stops Checksum.
32 31
11
12
13
Data selected from ROM during Checksum. Waveform variable. BIT indicator - low true when ROM Checksum being performed. Set high by successful Checksum completion. Decode Clock 3 MHz frequency low time of approximately 85 nsec beginning at high transition of C13MHZ. 3 MHz Frequency Clock with low time of approximately 85 nsec beginning at low transition of C13MHZ. 3 MHz Square Wave Clock symmetrical. CONTROLLER BOARD 2 A3, A17
33
14
15
34
RCLOCK
Read Clock, 980 kHz nominal. The clock is steady when: D D The tape is not moving, or An IRG or a blank spot is moving past the read head.
16
17
The clock is jittery due to frequency compensation when a record is moving past the read head.
35
18
1 2 3
RWHIST DATA AVAIL OVERFLOW
Read/Write History indicates operation last performed on Tape Data In Buffer. High/Write to Buffer, Low/Read from Buffer. High true when Tape Data In Buffer contains data from the tape unit.
2 3
RSTRX RENIX-
8 sec pulse provided to the controller for the data sample during a Read. Frequency: 40 kHz. Low level, active from mid-preamble to mid-post-amble for a Read.
19
36 20
High assertion indicates more data has been loaded into Tape Data In Buffer than it can hold and some data has been written over.
Figure 9-5. DMTC Test Point Data (Sheet 1 of 4)
9-29
NAVAIR 01-75PAC-12
TEST POINT
37
SIGNAL NAME RGATE RP RCN1 RCTRO
SIGNAL CHARACTERISTICS High level, active during a Record Write or Read. The tape ramp up/down-time not included. Read Pulse, 1 sec, first RP occurs at mid-preamble. Frequency: data rate (40 kHz) in the data record. Active high from mid-preamble to end of post-amble. 500 kHz, 50 percent duty cycle pulse. PE DATA CHANNEL A6, A7, A20, A21
54
TEST POINT 6 7 8 9
SIGNAL NAME EQL DCN10 WCLKWPATT
SIGNAL CHARACTERISTICS Equal, high when the DCTR count equals the contents of the drive control PROM. Pulse width of approximately 50 nsec. Drive Control 10, active high. It becomes high when the tape speed reaches full speed and low when the tape comes to a stop. Write Clock, active low, 260 nsec pulse. Repetition rate, once per 12.5 sec. Write Pattern, same as WTOG except at the end of the preamble and at the beginning of a postamble when the synch bits are created. WPATT is high for 37.5 sec when these two synch bits are being created. Write Strobe Clock, 8 sec pulse, once per data cell (40 kHz). The controller uses the trailing edge of this signal to gate new data onto the bus to the output adapter. DMTU INTERFACE A9, A10, A23, A24
4 5 6 7
38
55
39
56
40
57
41
RDSEL
Read Select. When high, the PE Data accepts data from DMTU interface B/D. When low, the PE Data accepts data from DMTU interface A/C. The four (4) DMTU interface SRAs are paired A/C and B/D. Dropout detected in Track 3/7. A dropout is detected in Tracks 3/7. It becomes high at the detection of a dropout and resets at the detection of the postamble. Dropout detected in Track 1/5.
58
10
WCK-
42
DROP3
59
1 2 3 4
DMTUSELB DMTUSELA DIBITX2 DMTUSEL
One bit of two bit select code to DMTU. Second bit of two bit select code to DMTU. Output of 16 to 1 mux. Inputs to mux are 8 tape data lines to Controller 1 and 8 to Controller 2. Determines which Controller the DMTU corresponding to the particular DMTU interface board is connected. Logic 0 indicates Controller 1, Logic 1 indicates Controller 2. Active low indicates the corresponding DMTU has acknowledged the select sent by DMTC. Output of 12 to 1 mux. Mux inputs are 8 Command Lines, 2 Status Lines, and 2 BOT Lines. Active low indicates the corresponding DMTU is ready. Active low. Output of 4 to 1 mux whose inputs are SELACK-, RDY-, BOT-, and EOT-. Active low. Output of 4 to 1 mux whose inputs are LOTAP-, WTLKPT-, REWIND-, and AUTO-. PDC IN A11
60
43
3 4 5 6
DROP1 DROP2 DROP0 RCLKS-
61 44
Dropout detected in Track 2/6. Dropout detected in Track 0/4. Read clock, 980 kHz nominal. The clock is steady when: D D The tape is not moving, or An IRG or a blank spot is moving past the read head.
64 63 62
45
46
5 6 7 8 9
SELACKXDIBITX1 READYSTATX1STATX2-
The clock is jittery due to frequency compensation when a record is moving past the read head.
47
65
7 8
DROPP GRVC
Dropout detected in Track P/S. A dropout is detected in the parity track (PE Data A board). The same detect signal in PE Data B board is not used in the system. Reverse Command. When high, the tape is moving in reverse direction. The data input to PE data SRA is inverted before decoded. When low, the tape is moving in the forward direction, the PE data SRA decodes the data as is.
66
48
67
OUTPUT ADAPTER A8, A22

49
1 2 3 4 5
DCLKWTOGOSC DCN6 WEEN0
Drive Clock, 40 kHz, 8 sec pulse. Write Toggle, 40 kHz, 50 percent duty cycle during write sequence (preamble, data, and postamble). 3.84 MHz oscillator output, 50 percent duty cycle. Drive Control 6, 1 ms pulse at the end of a write sequence, 25 sec pulse at the end of a read sequence. Write Encode Enable 0, high during a record write, preamble and postamble inclusive.
68
1 2 3 4 5 6
IB7 SINK CLOCK OUT OUTPUT ACKX CLFSPAR ENABLEDATA BIT7
MSB of input data bus from either controller. Normally high, with 5-MHz clock (50 percent duty cycle) during I/F transmission. Low pulse, generated by the controller, used to clear the OUTPUTAVAILX - signal from the PDC OUT board. High pulse, 100 ns wide, issued after initiating a sequence (SEQREQ - set low). Low pulse, 100 ns wide, enables function selector at the end of each I/F transmission. MSB of input data bus at output of data register.
69
50
70
51
52
71
53
72
73
9-30
NAVAIR 01-75PAC-12
TEST POINT
SIGNAL NAME
SIGNAL CHARACTERISTICS PDC IN A11 (Continued)

92
TEST POINT 5 6 7 8 9 10
SIGNAL NAME INPUT CLK IB2/7 lB1/7 ACK ENABLE AIB31
SIGNAL CHARACTERISTICS High pulse, generated by presence of INPUTAVAlL- from controller. Used to generate four separate input data register clocks. MSB of input data bus from Controller 2 board. MSB of input data bus from Controller 1 board. Low pulse initiated approximately 400 nsec after INPUTAVAIL is received, and is returned high when INPUTAVAIL is removed. Low pulse, active during first data transfer of BIT. Reactivated every fourth data transfer. MSB of input data bus at input side of line driver. ANEW OUT A14
74
7 8 9 10
INPUT CLK WORD READY FPAC ENABLE 10MHZ SEL
High pulse, generated by presence of INPUTAVAIL - from controller. Used to generate four separate input data register clocks. High pulse, 100 ns wide, set active after fourth byte of data is strobed into register. High level, set active after I/F transmission is received, reset a start of next I/F transmission. High level, set active by PRESETFPAC- prior to sending I/F transmission. Reset after transition complete by RESET TO T.O.-. PDC OUT A12
93
75
94
76
95
77
96
97
78
1 2 3
FPAC ENABLE STORE WORDBUFF AVAIL
High level, set active after l/F transmission is received, reset at start of next transmission.
98
79
Low pulse, 100 ns wide, issued at the end of a 34-bit l/F transmission. Normally high level, set low after receiving 34-bit l/F transmission, reset high after all four bytes of data are transferred to the controller (four OUTPUTACKpulses). High level, set active after first I/F transmission of a sequence is received. Reset at the end of the sequence. Low pulse, 100 ns wide, enables function selector at the end of each l/F transmission. High level, active during either status or data transfers on the output bus. Reset after transfer is completed (OUTPUTACK- received). MSB of receiving register. During l/F transmission, signal level varies according to data pattern. Normally high, with 5-MHz clock (50 percent duty cycle) during l/F transmission.
105 99
ENA
High level used to enable MS Byte of data on output bus. Set high after receiving EFA or ODA and cleared after receiving first OUTPUTACK - from controller. High pulse approximately 200 nsec wide. Generated after receiving forced master clear or halt commands. High level, set when an illegal forced EPA is received. Reset when OUTPUTACK- is received. Low pulse, approximately 200 nsec wide generated after a requested EFA or ODA is received. High level, initiated by CLK- (TP4). Active during transfer of four bytes of data on output bus (four OUTPUTACK - pulses). High pulse, active during the time the EPA signal is present. High level, active during the time that output data is requested until the ODA signal is received. MSB of output data bus to the controller boards. High level, active during the time that a command is requested until the EFA signal is received. High pulse, active during the time that the ODA signal is present. OPERATOR PANEL 2 A15
80
2 3 4 5 6 7 8 9 10
FORCE EF ILLEGAL OP CLKINH STAT/CMD ODROB7 EFRDATA
81
4 5 6 7 8 9 10
WD SEQ ACT ENABLECLK INH OD31/CF3 SOURCE CLK OUT PE/IL INH
100
82
101
83
102
84
103
104 85
86
Normally low, set high only after receiving l/F transmission having either a parity error or illegal length. High level, active during transfer of four bytes of data on output bus (four OUTPUTACK- pulses). ANEW IN A13
106
87
107
88
1 2 3 4
STATUS 5 MHz DATA OUTPUT ACK
High level, active for executing status (ElR) transfer. Controlled by issuance of I/O command. 5-MHz clock, 50 percent duty cycle. High level, active for executing data (IDR) transfer. Controlled by issuance of I/O command. Low pulse, generated by the controller, used to clear the OUTPUTAVAlL from the ANEW OUT board.
108
1 2 3 4
IOEN1IOEN2IOEN3IOEN4OVRTEMP
When low, I/O 1 is enabled. When low, I/O 2 is enabled. When low, I/O 3 is enabled. When low, I/O 4 is enabled.
89
90
91
109
9-31
NAVAIR 01-75PAC-12
TEST POINT
SIGNAL NAME
SIGNAL CHARACTERISTICS CHASSIS MOUNTED TEST POINTS
110
TP1
+12.5V
Unfiltered, unregulated 12.5 vdc 8 percent for lamp power. Ripple of 6 percent RMS maximum at approximately 2.4 kHz. Rated load is 2.5 A. Output loads down during lamp test. Output varies directly with input voltage variations. Regulated 15 vdc 2.25 percent. Ripple and noise of 100 mv peak-to-peak maximum at approximately 35 kHz. Rated load is 2 A. Crowbar overvoltage protection trips between 17.5 and 19.9 V. Overcurrent protection trips between 110 and 140 percent of rated load. Overcurrent and overvoltage conditions shut down the supply and/or blow the circuit breaker. Power must be recycled to turn on after an overcurrent or overvoltage condition. Regulated 5 vdc 3.7 percent. Ripple and noise of 200 mv peak-to-peak maximum at approximately 18 kHz. Rated load is 30 A. Crowbar overvoltage protection trips between 5.7 and 6.9 V. Overcurrent protection trips between 110 and 140 percent of rated load. Overcurrent and overvoltage conditions shut down the supply and/or blow the circuit breaker. Power must be recycled to turn on after an overcurrent or overvoltage condition.
111
TP2 TP4
-15V +15V
112
113
TP3
+5V
114
TP5 TP6
GROUND -10V Negative 15 vdc from PS2 is divided down and regulated to -10 vdc by the MDB interface (A29) card.
115
9-32
NAVAIR 01-75PAC-12
PE CH PE CH IN ADAPT CNTL 1 CNTL 2 CNTL 3 OP 1 FAN GUARD A29 MDB INTF FAN
OUT ADATF DMTU INTF DMTU IMTF PDC IN PDC OUT ANEW IN ANEW OUT
COVER ASSY
A10
A13
A519
A15
A16
A17
A18
A20
A21
A22
A23
PS2 -15 VDC POWER SUPPLY OP 1 CNTL 3 CNTL 2 CNTL 1 IN ADAPT PE CH PE CH
A30 OPERATOR PANEL 12 VDC PANEL LAMPS A31 MODE DISPLAY MODULE
PS4 +15 VDC POWER SUPPLY
PS3 5 VDC POWER SUPPLY
A24
A14
A11
A1
A2
A3
A4
A5
A6
A7
A8
A9
A2
DMTU INTF DMTU INTF OUT ADATF
DETAIL A
PS1 12.5 VDC POWER SUPPLY
AIR FILTER RETAINER REMOVE BEZEL FOR ACCESS TO LAMPS AIR FILTER
COVER ASSY
COVER ASSY
017-1454
Figure 9-6. DMTS Module Location Diagram
9-33
NAVAIR 01-75PAC-12
INDEX NO. 1 2
CONTROL CONTROLLER 1 alphanumeric (A/N) display (O & M)
FUNCTION Displays operating and maintenance messages for CONTROLLER 1. The following constant ROM messages are stored for display as required:
DIGITAL MAGNETIC TAPE CONTROL

3 4 5 6 7
DIGITAL MAGNETIC
TAPE SET
CONTROLLER 1
MORE INFO SEL MODE CLR MORE INFO
CONTROLLER 2
SEL MODE CLR
MODE DISPLAY
10
I/O SEL
CTRL ON LN CP901 1 OFF LN CTRL ON LN 2 OFF LN CP901
DMTU SEL
A A
B B
C C
D D
11
C1 A4/A18 C2 A3/A17 OUT ADAPT A8/A22 PE CH A A6/A20 PE CH B A6/A21 IN ADAPT A5/A19 OP1 A1 OP2 A15 INTF A29 DMTU INTF A A9 DMTUA DMTU INTF B A23 DMTUB DMTU INTF C A10 DMTUC DMTU INTF D A24 DMTUD IO0 IN A13 IO0 OUT A14 IO1 in A11 FMK IO1 OUT A12 IO2 in A25 IO2 OUT A26 IO3 in A27 IO3 in A28 FAULT PARITY ERR
FRAME CNT EOT REW LTW BOT WLO TEST OK ADDRESS ERR NOT AVAIL
AYK-14
PROG SEL INCR 2 2 1
BIT CONTL 1 2 4 3 16 1 18 17
OVER TEMP LAMP TEST PWR ON
PWR IPL FAIL
BIT ERROR
OVER TEMP
12 13 14
AYK-14 RESET CLR
DECR
INIT INIT MACLR MACLR 2 1 16 1
PANEL DIM
MODE DIM
POWER ON
15
OFF
20
19
18
17
16
O = Operating M = Maintenance
9-34
Figure 9-7. DMTS Maintenance Controls and Indicators (Sheet 1 of 4)
NAVAIR 01-75PAC-12
INDEX NO.
CONTROL
FUNCTION
INDEX NO.
CONTROL
FUNCTION
CONTROLLER 1 MORE INFO momentary switch-indicator (M) CONTROLLER 1 SEL MODE momentary switch-indicator (M) CONTROLLER 1 CLR momentary switch-indicator (M) CONTROLLER 2 alphanumeric display (O and M) CONTROLLER 2 MORE INFO momentary switch-indicator (M) CONTROLLER 2 SEL MODE momentary switch-indicator (M) CONTROLLER 2 CLR momentary switch-indicator (M)
Normally off; when green indicates more information is available for A/N display; data is displayed when pressed Alternate action between CTRL 1 and CTRL 2; both can be green but only one can be amber (active) at one time. Available for any OFF LINE mode Normally green; always available. Clears A/N display when pressed Displays control and maintenance messages for CONTROLLER 2. (See index no. 1 for message list) Normally off; when green indicates more information is available for A/N display; data is displayed when pressed Alternate action between CTRL 1 and CTRL 2; both can be green but only one can be amber (active) at one time. Available for any OFF LINE mode Normally green; always available. Clears A/N display when pressed
MODE DISPLAY projection readouts (M)
Are off when either controller is selected ON LN CP-901 otherwise displays are as follows: 1. Press CTRL 1 or 2 to OFF LN. a. Press SEL MODE, group 2 is displayed
BIT TEST
DMTU A
DMTU B
DMTU C
DMTU D
EXIT
b. Press BIT TEST, group 3 is displayed
BIT TEST OPTIONS

ALL LOOP 1 LOOP 2 LOOP 3
LOOP 4
LOOP 5
CYCLE
OP
HALT
c. Press DMTU A, B, C, or D, group 4 is displayed
DMTU TEST OPTIONS

READ FWD READ REV IRG/FM WRITE OS WRITE FS
WRITE 5S
WRITE AS
WRITE EOF
CONT
HALT
9-35
NAVAIR 01-75PAC-12
INDEX NO. 10
CONTROL CTRL 1 (Controller 1) (O) CTRL 2 (Controller 2) (O) ON LN/OFF LN alternate action switch-indicator (O) I/O SEL CP-901 alternate action switch-indicator (O)
FUNCTION Controls and indicators for Controller 1 Controls and indicators for Controller 2 OFF LN comes on lights green; when pressed OFF LN goes off and ON LN comes on amber indicating that Controller is on line
INDEX NO. 15
CONTROL BIT (Built-In-Test) (M) CTRL 1 (Controller 1) CTRL 2 (Controller 2) INIT MACLR momentary switch-indicator. Must be off line to activate
FUNCTION
Normally green. Initiates built-in-test when pressed; changes to amber when active. A detected failure is indicated by associated four segment light (see next item) or by readout on alphanumeric display Indicator for CTRL 1 BIT. Normally off; during BIT; 2/4/3/1 sequence is flashed indicating that circuit boards in position A2, A4, A3, A1 have passed BIT. If any quadrant remains on, the board has failed. Indicator for CTRL 2 BIT. Normally off; during BIT, a 16/18/17/1 sequence is flashed indicating that circuit boards in position A16, A18, A17, A1 have passed BIT. If any quadrant remains on, the board has failed. Applies power; provides automatic power cutoff due to excessive current demand Activated when POWER switch is set to ON; indicates total power-on time Adjusts brightness level at MODE DISPLAY projection readouts
Alternate action between CP901 CTRL 1 and CP 901 CTRL 2; both can be green but only one can be amber (active) at one time Alternate action between SASP CTRL 1 and SASP CTRL 2; both can be green but only one can be amber (active) at one time. Alternate switch action precludes selection of both the CP901 and SASP by the same controller
2/4/3/1 indicator
SASP alternate action switch-indicator (O)
16/18/17/1 indicator
16
11
DMTU SEL A, B, C, D alternate action switch-indicator (O) Selects DMTU; if any DMTU is disconnected the associated indicator is off; up to four DMTU can be selected for a controller but cannot have same logic address; selected DMTU comes on amber for CTRL 1 and green for CTRL 2 (alternate action precludes a DMTU from being used by both controllers) Comes on red for overtemperature condition of 5 volt power supply or loss of cooling air flow Normally green, when pressed causes all other panel indicator lamps to come on (except PWR ON). Also causes question mark (?) to be displayed on alphanumeric display and causes 12 MODE option groups to be displayed Comes on amber when POWER switch is set to ON and all power supplies are normal 17 18 19 20
POWER ON/OFF switch-circuit breaker (O) Elapsed time indicator (O) MODE DIM control (O) AYK-14 (Not used on update II aircraft) PANEL DIM control (O)
12
OVER TEMP indicator (O)
13
LAMP TEST momentary switch-indicator (O)
Adjusts brightness level of panel indicators (except MODE DISPLAY, see index No. 18)
14
PWR ON indicator (O)
9-36
NAVAIR 01-75PAC-12 DIGITAL MAGNETIC TAPE UNIT

1 2 3 4 INDEX NO. 7
LAMP TEST
CONTROL RWND switch (O)
FUNCTION Actuates high speed reverse tape drive when AUTO/MNL switch (9) is set to MNL Selects one of four addresses Controls on-line (AUTO)/off-line (MNL) modes. When in AUTO, unit is controlled by Magnetic Tape Control Activated when tape drive is running. Indicates total tape motion time Activated when power is applied. Indicates total power on time Lights when tape is at end-of-tape strip Lights when tape is within 25 10 feet of end-of-tape strip Lights when unit is in any reverse drive mode Lights when unit is in stopped condition Lights when unit is in forward drive mode Lights when tape is at beginning-of-tape strip Lights when AUTO mode is selected and entered Lights when tape cartridge is file protected Indicates that power is good, cartridge is loaded, and access door is closed.
ON PWR OFF
8
PWR ON SEL RDY WRITE LOCKOUT AUTO BOT FWD STOP RVS LOW TAPE EOT 0 RWND FWD
ADDRESS selector (O) AUTO/MNL switch (O)
20 19 18 17 16 15 14 13 12
STOP
10 11 12
RUN TIME indicator (O) TOTAL TIME indicator (O) EOT indicator (O) LOW TAPE indicator (O) RVS indicator (O) STOP indicator (O) FWD indicator (O) BOT indicator (O) AUTO indicator (O) WRITE LOCKOUT indicator (O) RDY indicator (O)
8
1 2 AUTO MNL
ADDRESS 3 RUN
13 9 14 15 16 10 17 FUNCTION Controls primary power 18 19 20
11
TIME TOTAL
INDEX NO. 1
CONTROL PWR ON/OFF switch-circuit breaker (O) PWR ON indicator (O)
Indicates power is on and power supply voltages are good Indicates unit is selected Causes all panel indicator lamps to come on Actuates forward tape drive when AUTO/MNL switch (9) is set to MNL Initiates stop when AUTO/MNL switch (9) is set to MNL
3 4
SEL indicator (O) LAMP TEST switch (O)
FWD switch (O)
STOP switch (O)
(O) = Operating (M) = Maintenance
9-37
NAVAIR 01-75PAC-12
9-1. DMTS TAPE CARTRIDGE LOADING AND SERVICING 10. Insert tape cartridge into cartridge guide blocks. Press cartridge firmly into place by applying equal pressure at top and bottom of cartridge as shown.
CAUTION
Isopropyl alcohol has a flash point and explosion point of 57 degrees Celsius, do not use around an open flame or sparks. Use only enough isopropyl alcohol to be contained on terminal wipes. After use, dispose of wipes and swabs in a closed container such that spontaneous combustion will not occur. Do not use in the presence of aviators breathing oxygen.
SERVICING MATERIAL REFERENCE
Damage to DMTU and/or tape cartridge results if DMTU is operated without both locking tabs fully engaged in latched position. 11. Ensure tape cartridge is properly inserted and locking tabs snap into position. The tape transport does not operate properly unless both ends of cartridge are locked in place. Release door stop latch and close cartridge access door. Check that RDY indicator is on. If RDY indicator is not on, open the cartridge access door and repeat steps for proper loading of cartridge.
ITEM ISOPROPYL ALCOHOL LINT FREE WIPES
PART NUMBER
NOTE
DMTU must be cleaned prior to loading tape cartridge. 1. 2. 3. 4. Open access door on right side of DMTU and inspect magnetic head sensor assembly, and alignment pins for wear. Clean magnetic head, sensor assembly, and tape path using solvent and cotton swabs. Inspect capstan for evidence of wear, damage, and firmness of capstan roller. Clean capstan rollers using solvent and lint free wipes, and close access door. 12.
8759 CLEAN CARE WIPES, KENDALL COMPANY CONVENIENCE PRODUCTS BOSTON, MA.
COTTON SWABS (WOODEN SHAFT)
CARTRIDGE LOADING ACCESS DOOR 1/4 TURN FASTENERS
CAUTION
DMTU power switch must be set to ON before inserting tape cartridge or damage to tape results. 5. 6. 7. 8. 9. Set power switch to ON. Open cartridge access door until the door stop latch holds it open. Inspect tape cartridge for condition and damage. Open tape cartridge doors and inspect for despooled tape. Close cartridge doors. Orient tape cartridge as shown (ensure UP decal is toward you and the arrow is pointing up).
CARTRIDGE GUIDE CARTRIDGE GUIDE BLOCKS EJECT BUTTON
LOCKING TAB
J E C T
LOCKING TAB PRESS HERE WITH EQUAL SIMULTANEOUS PRESSURE 1/4 TURN FASTENERS DOOR STOP LATCH CARTRIDGE GUIDE BLOCKS
OR
PRESS HERE
CAUTION
The tape cartridge must be inserted squarely into DMTU to ensure access doors open properly. Damage to both the transport and tape cartridge results if cartridge is forced into DMTU with one or both of its access doors not opened properly. The cartridge doors contact their actuating tabs within the first inch of cartridge insertion; observe the front edge of cartridge as you insert it to ensure both doors open properly.
CARTRIDGE GUIDE
017-1455
9-38
Figure 9-8. DMTS Tape Cartridge Loading and Servicing
NAVAIR 01-75PAC-12
9-1. 9-2. 9-3. PUSHBUTTON SWITCH AND INDICATOR LAMP/LENS REMOVAL AND REPLACEMENT. The following paragraphs provide procedures for removing and replacing pushbutton switch lamp/lens assemblies and indicator lamp/lens assemblies. REMOVAL.
CAUTION
LAMP
PLASTIC SLIDING RETAINER PUSHBUTTON
The pushbutton switch assembly contains a plastic sliding retainer attached to the lamp/lens assembly. Use caution when sliding the lamp/lens assembly out of the switch housing to prevent damage to the plastic sliding retainer. 1. 2. 9-4. Grasp lamp/lens assembly at slots along sides and pull out until assembly is fully extended on plastic sliding retainer. Hold lamp/lens assembly with face of lens down. Grasp base of lamp and remove lamp from lamp/lens assembly.
REPLACEMENT. 1. Insert lamp in lamp/lens assembly.
CAUTION
ALIGN SLOT SWITCH HOUSING

017-1456
The lamp/lens assembly is indexed to the pushbutton switch housing. Forced insertion may cause damage to both assemblies. 2. 3. 4. Install lamp/lens assembly in pushbutton switch opening. Position assembly with legend up. Secure lamp/lens assembly in place by pressing firmly to operate switch, then release. Observe that lamp/lens assembly returns to normal position.
Figure 9-9. DMTC Switch-Indicator Removal and Replacement
9-39/(9-40 blank)
SECTION 9A
RD-319 MAGNETIC TAPE TRANSPORT
THIS SECTION CONTAINS DATA APPLICABLE TO AIRCRAFT BUNO 156507 THROUGH 158927 AND 158929 THROUGH 159329 NOT INCORPORATING AFC 506 OR AFC 607
SECTION 9A RD-319 MAGNETIC TAPE TRANSPORT
NAVAIR 01-75PAC-12
(RACK D2) MX-8024( )/AYA-8 DATA ANALYSIS LOGIC UNIT (LU 2) CONTAINS INTERFACE LOGIC AND BUFFERS FOR MANUAL OR COMPUTER CONTROL OF MTT A, AND MTT B (SEE SECTION 6) 2J10 DATA TRACK A, B, C DATA TRACK1, 2, 4, 8 READY STROBE READY SELECT ACKNOWLEDGE REWINDING (RACK D2) AN/ASQ-114(V) DIGITAL DATA COMPUTER SET (CENTRAL COMPUTER) (SEE SECTION 4)
29 28 L O G I C U N I T 2 27 26 25 24 23
(RACK D3) 8J2 RD-319/AYA-8 MAGNETIC TAPE TRANSPORT (MTT A) 7 CHANNEL DIGITAL READ AND WRITE TAPE TRANSPORT WITH DIAGNOSTIC SYSTEM
(TACCO STATION) A324 TACCO POWER CONTROL (SEE NAVAIR 01-75PAC- -2) -12POWER CONTROL
LOAD POINT END OF TAPE (EOT)

22 21 20 19 18
LOW TAPE WARNING

17 16 15 14 13 12 11 10 9 8
COMPUTER RUN START STOP BOOT STRAP MANUAL OV TEMP POWER ON
29
7 6 28 27 5 4 8 7 26 3 25 24 6 5 2 1 23 22 4 0 27 26 21 3 2 20 19 25 24 1 0 18 17 21 363534 20 19 16 15 3332 18 14 4140 31 17 8 13 12 3938 7 4645 37 11 44 6 5 10 9 5150 4342 ON 4 3 8 7 4948 2 1 5655 47 6 5 4 OFF 545352 0 3 2 1 0 B A
WRITE LOCKOUT TAPE REMAINING 2J11 DATA TRACK A, B, C DATA TRACK1, 2, 4, 8 WRITE STROBE WRITE RESET FORWARD REVERSE REWIND WRITE MTT SELECT MASTER CLEAR ADDRESS 1 AND 2 DENSITY - 800, 556, 200 BPI TEST ENABLE 1-5 READ ENABLE (RACK D3) 2J12 DATA AND STATUS SIGNALS 2J13 DATA AND STATUS SIGNALS 8J1 8J2 RD-319/AYA-8 MAGNETIC TAPE TRANSPORT (MTT B) 8J3 115 VAC 3 NEUTRAL GROUND CHAS AC 8J1
AUTO RECY OV TEMP 1
OFF OV TEMP 3
A1J74 COMPUTER INPUT CHANNEL 10 DATA AND CONTROL
2J5
OFF TACO MPD
OFF SS3 MPD
OFF ARO
OFF PILOT DIS
J2
J1
A1J86 COMPUTER OUTPUT CONTROL (CHANNEL 9, 10, 11) A1J82 GROUP 02 OUTPUT DATA CHANNEL 08 CONTROL
2J2
J3 J4 J5 J6 J7
1J1
OFF OFF OFF OFF
CONTROL
(RACK D1) 8J3 115 VAC 3 NEUTRAL GROUND CHAS AC 8J3 POWER DISTRIBUTION BOX (SEE NAVAIR 01-75PAC- -2) -122J8
2J1
(RACK D1) DPS ELECTRONIC CIRCUIT BREAKER PANEL MAG TAPE B A B C MAG TAPE A A B C
2J9 115 VAC 3 115 VAC 3
Figure 9A-1. MTT Signal Flow Diagram
9A-1
NAVAIR 01-75PAC-12
(RACK D3) MTT (A OR B) A7 POWER CONTROL ASSY A14 REAR COVER ASSY 2J7 E S T 1 115 VAC A 115 VAC B 115 VAC C AC 8J3 A B C D A14A1 EMI FILTER W3P15 A1 A2 A3 A4 W3P9/J1 115 VAC A 115 VAC B 115 VAC C NEUTRAL A1 A2 A3 A4 W3P8/J3 5 NOTE 1 PIN NUMBERS SHOWN ON 2J7 FOR MTT A. PIN NUMBERS FOR MTT B ARE AS FOLLOWS: 2J7-V FOR PHASE A, 2J7-R FOR PHASE B, AND 2J7-B for PHASE C. A8 CONTROL PANEL POWER ON OFF W3J9 POWER INTERLOCK RELAY DRIVE 40 41 28 TOTAL TIME M1 27 W3P8 9 2 AC VOLTAGE DIVIDER VR1 6.8 V DC 28 VDC 5 VDC SENSOR POWER TP1 5 (1) VDC A7A2 DC OVER AND UNDER VOLTAGE SENSOR J5 A7A2A2 14 DC OVERVOLTAGE SENSOR 15 DC Q2 13 1 DC +15 VDC -15 VDC 5.25 VDC J6 3 4 2 5 6 12 8 J6 J5 13 VDC REMOTE SENSE -10 VDC REMOTE SENSE - VDC REMOTE SENSE -3 13 VDC SCR CROWBAR GATE DC POWER COMMON DC 28 VDC SENSOR POWER 13 VDC FAULT LOGIC DRIVE 5.25 VDC FAULT LOGIC DRIVE -15 VDC FAULT LOGIC DRIVE -10 VDC FAULT LOGIC DRIVE - VDC FAULT LOGIC DRIVE -3 +15 VDC FAULT LOGIC DRIVE 5 VDC SENSOR POWER 20 37 19 13 11 9 16 14 5 VDC SHUNT REGULATOR DC DC TP3 28 (4) VDC TP2 1 115 VAC A 115 VAC B 115 VAC C W3P7 13 14 7 B2 ELECTRONIC HOUSING COOLING FAN 3 2 1 26 VAC A7T1 A1 A2 A3 A4 A5 A6 115 VAC A 115 VAC B 115 VAC C 115 VAC A 115 VAC B 115 VAC C A10B1 CAPSTAN MOTOR COOLING FAN 13 8 7 AC A7K1 AC DC A7K2 OV/UV CONTROL RELAY W3P10 3 4 7 115 VAC A 115 VAC B 115 VAC C W3P6 2 10 3 DC 1 2 5 115 VAC A 115 VAC B 115 VAC C A2A2 POWER AMP ASSY SUPPLY REEL COOLING FAN B3 TAPE DECK PRESSURE BLOWER W3P9 4 3 NEUTRAL 115 VAC C P17 1 2 A19 REEL RELAY POWER SUPPLY
P18 4 3 W3P11 2 10 3 +24 VDC RLY PWR +24 VDC RT RLY PWR A3A2 POWER AMP ASSY TAKE UP REEL COOLING FAN SEE MTT READ/WRITE SIGNAL FLOW DIAGRAM
T1 T3 T4
SHEET 2
W3P14 1 3 5
B1 DUAL BLOWER UNIT (VAC)
11 4 3
115 VAC A 115 VAC B 115 VAC C
+15 VDC REMOTE SENS DC
Q1
A8 CONTROL PANEL A7A1 AC VOLTAGE UNDERVOLTAGE SENSOR J4 3 15 MONITORS THE 28 VDC SENSOR POWER AND PROVIDES A SHUTDOWN SIGNAL TO DISCONNECT AC INPUT POWER IF SENSOR VOLTAGE EXCEEDS OR DECREASES BELOW PREDETERMINED LIMITS. THE 28 VDC SENSOR POWER IS DEVELOPED FROM THE 26 VAC INPUT VOLTAGE. 12 3 6 10 17 18 7 2 2 23 28 2 4 27 25 26 29 21 20 16 17 18 19 A1 A3 A2 DC POWER DRIVE INDICATOR +15 VDC FAULT INDICATOR DRIVE -15 VDC FAULT INDICATOR DRIVE 13 VDC FAULT INDICATOR DRIVE -10 VDC FAULT INDICATOR DRIVE 5.25 VDC FAULT INDICATOR DRIVE - VDC FAULT -3 INDICATOR DRIVE AC POWER INDICATOR DRIVE DC COMMON 5 VDC SENSOR POWER 13 VDC REMOTE SENSE - VDC REMOTE SENSE -3 -10 VDC REMOTE SENSE 13 VDC SCR CROWBAR GATE DRIVE DS43 61 14 67 9 62 13 66 8 71 60 DS22 DS56 DS21 DS25 DS20 DS24 DS19 DS23 DC +15 -15 +13 POWER -10 +5 -3 AC POWER ON
-15 VDC REMOTE SENS
Q3
J4 8 1 2
5.25 VDC REMOTE SENS
+15 VDC -15 VDC 5.25 VDC 13 VDC REMOTE SENSE -10 VDC REMOTE SENSE - VDC REMOTE SENSE -3
A7A2A1 1 5 DC 12 UNDERVOLTAGE 2 11 SENSOR 6 13 7 25 4 24 3 10 9
SHEET 3
+15 VDC REMOTE SENSE- - - - - - -(W3E2) (+15 VDC POWER BUS) -15 VDC REMOTE SENSE- - - - - - -(W3E1) (-15 VDC POWER BUS) 5.25 VDC REMOTE SENSE- - - - - - -(W3E3) (5.25 VDC POWER BUS) 017-4866
9A-2
Figure 9A-2. MTT AC and DC Power Control and Distribution Signal Flow Diagram (Sheet 1 of 4)
NAVAIR 01-75PAC-12
(RACK D3) MTT (A OR B) (CONT)
A9
POWER SUPPLY ASSEMBLY A9A2 4 7 8 10 9 EMI ENCLOSURE +13 VDC REGULATOR 4 5 6 CR3 CR2 CR1 L1 Q1 L2 Q2 E2 L3 Q3 3 1 2 A2TB3 E3 CR13 THRU CR18 CR7 THRU CR12 POWER COMPONENTS ASSEMBLY R15 R14 R13 A2J1/A1P1 7 8 10 9 3 2 1 4 12 13 A2E5 E1 E4 R1 CR4 A1W1 COMMON GND BUS A2TB2 1 2 3 A1W1 COMMON GND BUS 5 R10 e Q11 c b R9 A2TB1 6 5 4 10 6 9 5 8 4 3 2 1 R8 e b Q9 c R7 e b Q8 c R3 b e Q10 c R6 e R5 e Q6 c b Q7 c -15 VDC REGULATOR +15 VDC REGULATOR 5.25 VDC REGULATOR R4 CR6 e Q4 c CR5 e b Q5 c A2TB3 7 8 11 12 9 10 A2J1/A1P1 30 29 A2TB1 11 9 10 7 21 32 18 19 A2J1/A1P1 25 27 3 1 A FROM A3W1 13 VDC A1W1 COMMON GND BUS 15 VDC REMOTE SENSE 15 VDC REMOTE SENSE COMMON 5.25 VDC REMOTE SENSE 5.25 VDC REMOTE SENSE COMMON 5.25 VDC REMOTE SENSE COMMON 5.25 VDC REMOTE SENSE 15 VDC REMOTE SENSE COMMON 15 VDC REMOTE SENSE A1W1 COMMON GND BUS A3W1 13 VDC BUS 13 VDC REGULATED 5.25 VDC SCR DRIVE +23 VDC UNREGULATED +15 VDC SCR DRIVE +23 VDC UNREGULATED b A2TB1 15 16 14 8 SHEET 3 A2TB3 6 R12 Q12 c e b R2 A1W1 Q13 e c COMMON GND BUS b A2TB3 14 13 A2J1/A1P1 36 39 12 13 50 42 -15 VDC SENSE -15 VDC SENSE COMMON +15 VDC UNREGULATED -15 VDC UNREGULATED -23 VDC UNREGULATED C 3 SYNC 2 SYNC SYNC COMMON 1 SYNC 3 SCR DRIVE 2 SCR DRIVE 1 SCR DRIVE SCR DRIVE COMMON 13 VDC COMMON 13 VDC SENSE A9L1 INDUCTOR ASSY B -7 4 A2W12
A9T2
TRANSFORMER
W3P12/J1 115 VAC A SHEET 1 A1 A2 A3 1 2 3
115 VAC B 115 VAC C
K SHEET 3
B
5.25 VDC
C
SHEET 3
A9T1
1 2 3 7
D E F G
SHEET 3
A1W1 COMMON GND BUS
-15 VDC SENSE COMMON -15 VDC SENSE - VDC REGULATED -3 - VDC AND -3 -10 VDC COMMON
SHEET 3
R11
45 43 44 46 49 48
-23 VDC UNREGULATED -15 VDC SCR DRIVE -10 VDC FEEDBACK -10 VDC SCR DRIVE -10 VDC AUX POWER - VDC SCR DRIVE -3
9A-3
NAVAIR 01-75PAC-12
(RACK D3) MTT (A OR B) (CONT)
A9 POWER SUPPLY ASSEMBLY (CONT) A9A1A2 +13 VDC REGULATOR ASSY 3 SYNC 2 SYNC SYNC COMMON 1 SYNC 3 SCR DRIVE 2 SCR DRIVE 1 SCR DRIVE SCR DRIVE COMMON 13 VDC COMMON 13 VDC SENSE A1J3 A9A1A2A1 13 VDC REGULATOR 9 5 15 4 1 3 8 6 10 14 TP3 2 TP1 COMMON TP2 13 (1) VDC A1W1 COMMON GND BUS 13 VDC SCR CROWBAR GATE Q1 SHEET 2 A1TB1 2 3 4 5 6 A3W1 13 VDC BUS R1 TP4 1
A9A3 MAIN CABLE ASSY W3P12/A3J1 +15 VDC REGULATED -15 VDC REGULATED TP4 -15 (1) VDC A1W1 TP5 -10 (1) VDC 16 -15 VDC REMOTE SENSE COMMON (W3E4) (COMMON BUS) A6 A7 17 +15 VDC MTT POWER (W3E2) (+15 VDC POWER BUS) -15 VDC MTT POWER (W3E1) (-15 VDC POWER BUS) -15 VDC REMOTE SENSE (W3E1) (-15 VDC POWER BUS)
E G
H
SHEET 2 A3W4 -10 VDC BUS 12 13 14 MTT POWER (W3P4-46) TO A4 MTT POWER (W3P4-47) TO A4 -10 VDC REMOTE SENSE
R1
D F
+ +
A1TB1 B 5.25 VDC 1
C5 C7
C6 A1W1 COMMON + C8 GND BUS
2 TP2 5.25 (0.5) VDC 8
13 VDC CROWBAR GATE DRIVE 5.25 VDC REMOTE SENSE (W3E3) (5.25 VDC POWER BUS) 5.25 VDC REMOTE SENSE COMMON (W3E4) (COMMON BUS) +15 VDC VDC REMOTE SENSE COMMON (W3E4) (COMMON BUS) +15 VDC VDC REMOTE SENSE (W3E2) (+15 VDC POWER BUS) MTT POWER RETURN MTT POWER RETURN
R2 5.25 VDC CURRENT SENSE SIGNAL C4 DC
C
TP3 15 (1) VDC A1W1 COMMON GND BUS
7 10 11 A4 A5
A9A1A1 POSITIVE/NEGATIVE REG ASSY A9A1A1A1 POSITIVE VOLTAGE REGULATOR CIRCUIT CARD TP1 COMMON TP2 4 10 TP5 COMMON TP4 15 (1) VDC A1J1 11
A1J1 5.25 VDC REMOTE SENSE COMMON C 5.25 VDC REMOTE SENSE 15 VDC REMOTE SENSE COMMON 15 VDC REMOTE SENSE 3 4 8 6
W3P13/A3J2 16 A1 AS REQD C1 A3W1 13 VDC BUS A2 A4 A6 13 VDC CAPSTAN MOTOR DRIVE POWER (W3J6-A1) TO A5 13 VDC SUPPLY REEL DRIVE POWER (W3P6-A2) TO A2 13 VDC TAKEUP REEL DRIVE POWER (W3P11-A2) TO A3 13 VDC VDC REMOTE SENSE 5.25 VDC MTT POWER (W3E3) (5.25 VDC BUS)
13 VDC REGULATED 5.25 VDC SCR DRIVE +23 VDC UNREGULATED +15 VDC SCR DRIVE
12 1 15 14 TP3 3
SHEET 2
C2
TP1 13 (1) VDC
A3TP7 COMMON AS REQD A9A1A1A2 NEGATIVE VOLTAGE REGULATOR CIRCUIT CARD TP2 COMMON TP1 -15 (1) VDC TP4 - (0.5 VDC -3
A1W1 COMMON BUS
A3 A5 A7
CAPSTAN MOTOR DRIVE POWER RETURN (W3J6-A2) TO A5 SUPPLY REEL DRIVE POWER RETURN (W3P6-A3) TO A2 TAKEUP REEL DRIVE POWER RETURN (W3P11-A3) TO A3
A1J2 -15 VDC SENSE COMMON -15 VDC SENSE - VDC REGULATED -3 - VDC AND -3 -10 VDC COMMON 15 12 1 9 6 8 -23 VDC UNREGULATED -15 VDC SCR DRIVE -10 VDC FEEDBACK -10 VDC SCR DRIVE -10 VDC AUX POWER - VDC SCR DRIVE -3 7 5 2 3
DC
3 4 5 TP6 - (0.5) VDC -3 SHEET 2 A3W3 - VDC -3 BUS 6 7 8 9 10 11
- VDC MTT POWER (W3J7- TO A5 -3 -3) - VDC MTT POWER (W3J8-3 -10) TO A5 - VDC MTT POWER (W3P4-3 -52) TO A4 - VDC MTT POWER (W3P4-3 -53) TO A4 - VDC MTT POWER (W3P4-3 -54) TO A4 - VDC MTT POWER (W3P4-3 -55) TO A4 - VDC MTT POWER (W3P4-3 -74) TO A4 - VDC MTT POWER (W3P4-3 -75) TO A4 - VDC REMOTE SENSE -3 SHEET 1
TP3 -10 (1) VDC
9A-4
NAVAIR 01-75PAC-12
9A-1. GENERAL INFORMATION. Conditions: 400 Hz 3 power available and transport power switch turned on (no tape motions). 9A-3. +5.25 VDC Regulator test. Waveforms are as follows:
CAUTION
The +13 vdc power supply is rated at 75 amperes and provides power for the reels and capstan motor. 9A-2. +13 vdc power supply test. 115 volts, 3 power is applied to three silicon control rectifiers; one for each SCR. The +13 vdc regulator card (A9A1A2) then supplies a gating pulse for each of the three SCRs turning each on for a portion of its 120 degree time slot. The conduction time is then dependent of the load requirements of the system. The combined output of the SCRs is a 1200 Hz pulse train, and is applied to a filter to provide a smooth, regulated +13 vdc source. For additional troubleshooting procedures, see table 9A-2 in NAVAIR 01-75PAC-2-5. 1. Normal Waveforms. The upper trace is a 400 Hz square wave corresponding to 1 of the input power and derives its shape from the clamping action of two diodes. The lower trace shows three 400 Hz pulse trains 120 degrees apart resulting in a 1200 Hz pulse train; absence of one or more of these pulses indicates a missing phase.
NOTE
The transport tends to power up normally, but shuts down with a +13 vdc fault indication when reel or tape action is initiated with a series of rapid starts and stops.
Upper Trace:
Same as +13 vdc power supply normal waveforms Same as +13 vdc power supply normal waveforms 1 millisecond 1 volt, channels 1 and 2 10:1 probe Internal Same as +13 vdc power supply normal waveforms
Upper Trace:
Lower Trace:
Monitored at A9A1A1A1TP3. Monitored at TP2. Same card .5 milliseconds 100 millivolt, Channel 1 500 millivolt, channel 2 10:1 probe Internal Same as in +13 vdc power supply normal waveforms.
Lower Trace: Horizontal: Vertical:
2.
Phase A missing. This display shows the result of a faulted +13 vdc regulator card, with missing. The transport is running with only two thirds of its power capability, as one SCR is not receiving its firing pulses. The upper trace is missing since 1 is constantly monitored at that test point.
Horizontal: Vertical:
Trigger: Conditions:
1.
Upper Trace:
Same as +13 vdc power supply normal waveforms Same as +13 vdc power supply normal waveforms 1 millisecond
Upper Trace:
Lower Trace:
Same as +13 vdc power supply normal waveforms Same as +13 vdc power supply normal waveforms 1 millisecond 1 volt, channels 1 and 2 10:1 probe Internal Same as +13 vdc power supply normal waveforms 2.
Lower Trace:
Upper Trace: Lower Trace: Horizontal: Vertical:
Monitored at A9A1A2TP4 Monitored at TP3. Same card 1 millisecond 1 volt, channels 1 and 2 10:1 probe Internal
The upper trace is the output of an astable multivibrator with a variable duty cycle. The duty cycle changes with the load requirements of the system. This is accomplished by varying the RC time constant of a capacitor, allowing it to discharge through a transistor which is used as a variable impedance. As the output voltage tends to decrease, the impedance of the transistor (Q7) is made to decrease, which in turn decreases the RC time constant and increases the duty cycle of the multivibrator. The output of the multivibrator switches a series regulator and the corresponding bursts of current are subsequently filtered to provide a smooth, regulated 5.25 VDC level, as shown in the lower trace.
Horizontal: Vertical:
Horizontal: 1 volt, channels 1 and 2 10:1 probe Internal Same as +13 vdc power supply normal waveforms Vertical:
NOTE
Power to drive the +5.25 VDC supply is derived directly from the +13 VDC supply.
Trigger:
9A-5
NAVAIR 01-75PAC-12
(RACK D3) MTT
NOTE
1 2 3 CONNECTOR 2J11 USED ON MTT A, AND 2J13 USED FOR MTT B. CONNECTOR 2J10 USED ON MTT A, AND 2J12 USED FOR MTT B. DATA TRACK 1 2 4 8 A B C CONNECTOR MODULE NUMBER A4J3 A4J4 A4J5 A4J6 A4J7 A4J8 A4J9 A4A1 A4A2 A4A3 A4A4 A4A5 A4A6 A4A7
A12 MAGNETIC HEAD ASSEMBLY
A12P1
A4 ELECTRONIC HOUSING ASSEMBLY A4J29 13 TRACK 1 14 TRACK 2 15 16 17 18 19 31 32 33 34 35 36 37 TRACK 4 TRACK 8 TRACK A TRACK B TRACK C TRACK 1 TRACK 2 TRACK 4 TRACK 8 TRACK A TRACK B TRACK C A4J24 TO RESPECTIVE READ/WRITE 3 MODULE A4A2 THROUGH A4A7 A4J3 30 26 23
A4A1 READ/WRITE MODULE (TYPICAL OF MODULES A4A2 THROUGH A4A7) 8 TP1 PREAMP POST READ ENABLE TRACK READ STROBE TRIGGER FILTER 9 TP2 AMPLIFIER AND RECTIFIER 10 TP3 AMPLIFIER AND ZERO CROSSING DETECTOR 11 TP4 DE-SKEWING BUFFER A4J3 21 25 24 DATA READ TRACK 1 READ STROBE READ RESET A
TAPE MOTION FORWARD TRACK 1 TRACK 2 TRACK 4 TRACK 8 TRACK A TRACK B TRACK C BASE PLATE
A4A8
DATA CONTROL UNIT A4J11 34 33
A4J11 A4A8A1 DATA CONTROL LOGIC 44 TP1 35 13 A4A13 INPUT OUTPUT ELECTRONIC UNIT A4J21 1 A4A13A2 INPUT INTERFACE B READ MODE: IN THE READ MODE THIS MODULE RECEIVES SIGNALS FROM LU NO. 2 AND DATA READ/WRITE LOGIC TO CONTROL OPERATION OF THE READ FUNCTION. THE CONTROL LOGIC GENERATES READ RESET, READ STROBE, AND DATA STROBE OUTPUT SIGNALS. THE READ RESET PULSE IS 1 MICRO SECOND IN DURATION. IT IS GENERATED WHEN EACH STROBE PULSE OCCURS IF A DENSITY COMMAND IS PRESENT AND A TEST MODE DRIVE LOCKOUT IS NOT PRESENT OR IS GENERATED WHEN READY RESET IS PRESENT. THE READ STROBE TRANSFERS DATA WITHIN THE DE-SKEWING BUFFER IN THE DATA READ/WRITE LOGIC. IT IS GENERATED BY THE FIRST READ STROBE TRIGGER FROM THE DE-SKEWING BUFFER OF EACH TRACK. THE DATA STROBE OUTPUT IS SENT TO LU 2 TO SYNCHRONIZE TRANSFER DATA BETWEEN UNITS. WRITE MODE: IN THE WRITE MODE THIS MODULE RECEIVES SIGNALS FROM LU NO. 2 TRANSPORT CONTROL LOGIC AND THE CAPSTAN SERVO LOGIC TO CONTROL OPERATION OF THE DATA WRITE FUNCTION. THE DATA CONTROL LOGIC GENERATES THE WRITE INDICATOR, WRITE ENABLE, WRITE RESET, AND DATA STROBE SIGNALS. THE WRITE INDICATOR SIGNAL LIGHTS THE WRITE INDICATOR DS14 ON CONTROL PANEL A8 WHEN WRITE LOCKOUT SENSOR, FORWARD READY, MTT SELECT, AND WRITE ENABLE ARE PRESENT. THE HEAD DRIVER AMPS ARE ENABLED FOR ALL CHANNELS WHEN WRITE PERMIT, FORWARD READY, MTT SELECT, AND WRITE ENABLE ARE PRESENT. THE WRITE RESET SIGNAL IS A 2 MICRO SECOND PULSE WHICH OCCURS FOR STOP, READY RESET, OR WRITE RESET TO INITIALIZE THE LOGIC. THE WRITE STROBE IS AN EXTERNAL PULSE TRAIN WHICH SYNCHRONIZES RECORDING BETWEEN CHANNELS. IT OCCURS AT THE WRITE LOGIC WHEN ON SPEED, DATA STROBE INPUT, AND ALL REQUIRED WRITE DISCRETE ARE PRESENT.
(RACK D1) LU2
2J11 2J13 37
W1J1 35 MTT SELECT
P1 1 W1P2
A4J25 30 27 THIS MODULE PROVIDES 48 SIGNAL AMPLIFICATION, 32 ISOLATION, AND LOGIC 20 CIRCUITS FOR ALL INPUT SIGNALS AND DATA 18 RECEIVED FROM LU 2. 16 14 12 10
A4J21 44 45 46 37 38 39 40 41 42 43 800 BPI 556 BPI 200 BPI DATA WRITE TRACK 1 DATA WRITE TRACK 2 DATA WRITE TRACK 4 DATA WRITE TRACK 8 DATA WRITE TRACK A DATA WRITE TRACK B DATA WRITE TRACK C TRACK 2 READ STROBE 3 TRIGGERS FROM RESPESTIVE READ/WRITE MODULE TRACK 4 TRACK 8 TRACK A TRACK B TRACK C DATA STROBE WRITE RESET WRITE ENABLE MTT SELECT READ ENABLE FORWARD CLEAR A4A9 CONTROL LOGIC A4J12 17 A4A9A1 45 TRANSPORT 21 CONTROL LOGIC 40 FORWARD STOP READY READY RESET 6 17 10 8 43 42 41 40 39 38 50 48 49 14 45 30 29 28
47
DATA READ STROBE
52 54 56 15 13 12 4 3 2 1
67 65 58 1 3 5 10 12 18 20
800 BPI 556 BPI 200 BPI DATA WRITE TRACK 1 DATA WRITE TRACK 2 DATA WRITE TRACK 4 DATA WRITE TRACK 8 DATA WRITE TRACK A DATA WRITE TRACK B DATA WRITE TRACK C
40 38 36 5 7 9 11 13 15 18
SHEET 2
A4A14 INPUT OUTPUT ELECTRONIC UNIT A4J23 A4A14A2 35 INPUT INTERFACE A 39 43 41 37 THIS MODULE PROVIDES SIGNAL AMPLIFICATION, ISOLATION, AND LOGIC CIRCUITS FOR ALL INPUT 45 SIGNALS AND DATA 49A RECEIVED FROM LU 2. 15 33 47
17 35 18 33
27 29 31 37
DATA STROBE WRITE ENABLE WRITE RESET READ ENABLE
44 42 46 48 AW1P1 A4J24
A4J23 8 9 10 1 14 7 11
18 16 15 5 2
WRITE STROBE WRITE RESET WRITE POWER ENABLE READ INDICATOR DRIVE WRITE INDICATOR DRIVE
C D E F G
38 49 50 19 80
39 54 56 50 80
MASTER CLEAR ADDRESS 1 ADDRESS 2 FORWARD INPUT INTERLOCK A2 SUPPLY REEL DRIVE ASSEMBLY A2A3 SUPPLY REEL MOTION SENSOR W3J5 9
9 11 13 3 46
W3P4 87
A4J27 WRITE LOCKOUT
A4A9A2 READY LOGIC
A4J13 35 46
TP3 A5 CAPSTAN SERVO LOW LEVEL ELECTRONIC UNIT A5A1TP1 A5A2TP4 5 7 12 W3J8 37 89 ON SPEED 1 6
9A-6
Figure 9A-3. MTT Read/Write Functional Signal Flow Diagram (Sheet 1 of 5)
NAVAIR 01-75PAC-12
(RACK D3) MTT A4 ELECTRONIC HOUSING ASSEMBLY
A DATA READ FROM RESPECTIVE DATA READ/WRITE LOGIC MODULES A4A2 THROUGH A4A7 3
DATA READ TRACK 1 TRACK 2 TRACK 4 TRACK 8 TRACK A TRACK B TRACK C
A4A12 OUTPUT ELECTRONIC UNIT A4J19 A4A12A2 OUTPUT DIAGNOSTIC A4J19 MATRIX 44 37 DURING NORMAL OPERATION 36 43 DATA IS TRANSFERRED 35 42 DIRECTLY THROUGH THIS 34 MODULE. DURING 41 33 DIAGNOSTIC TEST THIS 40 32 MODULE IS ENABLED TO 39 31 ISOLATE MALFUNCTIONS 38 THROUGH THE DIAGNOSTIC ROUTINE
TRACK 1 TRACK 2 TRACK 4 TRACK 8 TRACK A TRACK B TRACK C
A4J18 A4A12A1 37 OUTPUT INTERFACE B 36 THIS MODULE PROVIDES 35 AMPLIFICATION OF DATA 34 READ SIGNALS SENT TO LU 2 33 32 31
A4J18 50 48 46 44 42 40 38
A4J26
W2P3 5 7 9 11 13 15 18 20 DATA READ TRACK 1 DATA READ TRACK 2 DATA READ TRACK 4 DATA READ TRACK 8 DATA READ TRACK A DATA READ TRACK B DATA READ TRACK C DATA READ STROBE
W2J2 1 3 4 8 10 16 17 24
2J10 (RACK D1) 2J12 LU 2 16 15 13 11 10 3 1 25
A4A13 INPUT OUTPUT ELECTRONIC UNIT B DATA READ STROBE A4A13A1 A4J20 12 OUTPUT INTERFACE A THIS MODULE PROVIDES AMPLIFICATION OF DATA STROBE OUTPUT SIGNAL SENT TO LU 2 A4J20 36 DATA WRITE TRACK 1 WRITE STROBE WRITE RESET WRITE POWER ENABLE 7 6 A4A14 INPUT ELECTRONIC UNIT DATA WRITE TRACK 1 DATA WRITE TRACK 2 DATA WRITE TRACK 4 A4A14A1 INPUT DIAGNOSTIC A4J22 MATRIX 35 36 37 38 39 40 41 DURING NORMAL OPERATION DATA IS TRANSFERRED DIRECTLY THROUGH THIS MODULE. DURING DIAGNOSTIC TEST THIS MODULE IS ENABLED TO ISOLATE MALFUNCTIONS THROUGH THE DIAGNOSTIC ROUTINE A4J22 20 21 28 29 30 31 32 5 8 A4A1 READ/WRITE MODULE (TYPICAL OF A4A2 THROUGH A4A7) PULSE WRITE AMPLIFIER CLOCK WRITE GATE POWER GATE HEAD DRIVER
A4J3 2 FROM PIN 2 OF RESPECTIVE READ/WRITE MODULE A4A2 THROUGH A4A7 7 6 5 4 3 2 1 26 25 24 23 22 21 20 A4J27 A4K2 REED RELAY 93 24 VDC RETURN W3P4 20 24 VDC TRACK 1 TRACK 2 TRACK 4 TRACK 8 TRACK A TRACK B TRACK C TRACK 1 TRACK 2 TRACK 4 TRACK 8 TRACK A TRACK B TRACK C W3P18 4 3
A12 MAGNETIC HEAD ASSEMBLY
WRITE FLIP-FLOP HEAD DRIVER
12 TP7 1
TAPE MOTION FORWARD TRACK 1 TRACK 2 TRACK 4 HEAD TRACK 8 FACE TRACK A TRACK B TRACK C BASE PLATE
TRACK 2 TRACK 4 TRACK 8 TRACK A TRACK B TRACK C DATA WRITE SIGNALS TO RESPECTIVE READ/WRITE MODULES
FROM PIN 1 OF RESPECTIVE READ/WRITE MODULE A4A2 THROUGH A4A7 3
A
SHEET 1
DATA WRITE TRACK 8 DATA WRITE TRACK A DATA WRITE TRACK B DATA WRITE TRACK C
A19 REED RELAY POWER SUPPLY J2 PROVIDES DELAYED RELAY POWER TO PREVENT ERRONEOUS DATA BEING RECORDED WHEN POWER IS APPLIED
C D E F G
WRITE STROBE WRITE RESET WRITE POWER ENABLE READ INDICATOR DRIVE WRITE INDICATOR DRIVE
A8 CONTROL PANEL
READ 20 READ INDICATOR DRIVE DS13 WRITE 21 WRITE INDICATOR DRIVE DS14 5.25 VDC
9A-7
NAVAIR 01-75PAC-12
9A-1. 9A-2. GENERAL INFORMATION. For additional troubleshooting procedures, see tables 9A-4 and 9A-6 in NAVAIR 01-75PAC-2-5. If the MTT does not load STP, or OP tape, perform the tests in the following paragraphs. ON SPEED TEST. 1. Set LU 2 controls as follows: a. b. c. Mode selector to OFF LINE CHANNEL selector MTC Press ENTER 4. Test Comments. a. The upper trace of the on-speed normal waveforms represents the dc output of a bandpass filter with its level dependent upon the input frequency. The beginning of the trace represents maximum error or zero cycles of the capstan tone generator. The next 3 milliseconds, shows the response of the filter during the greatest change in frequency. That is, prior to servo mode, enable the smooth portion of the waveform indicates acquisition of the capstan by the servo system, and a reduction in the rate of acceleration of the capstan. At 6 milliseconds, the waveform displays a slight overshoot of the zero baseline representing 30 KHz, or 75 IPS, but is well within the allowed 3 percent tolerance. (2.2 vdc equals 3 percent). The lower trace of the normal waveform is the on-speed logic level generated in the servo logic card, A5A2. It remains at a +5 vdc level until the capstan is within +1500 Hz of 30 KHz, or 95 percent of 75 IPS, at which time it drops to zero. 2.
9
3.
On LU 2, set controls in the MTT TEST section as follows: a. b. c. d. e. MODE to DRIVE SEQUENCE to BOTH CMD TIME to 10 MS Select MTT A or MTT B as appropriate ON-OFF to ON
8
detector where they are shaped and become positive going pulses of approximately 10 sec duration. This string of logic ones is then converted to NRZI MK-1 logic, which is the format utilized by the AN/AYA-8 System. e. The level shown at TP3 changes depending upon the mode of operation. The display shows the level for a post-read condition. This occurs when the MTT is writing and reading simultaneously. If the MTT were merely reading, the level would be approximately 3 volts P-P riding on a negative 0.3 vdc level. Increasing the negative level at that point has the effect of desensitizing the read logic. This is done in a post-read condition to ensure that each bit written on tape is of sufficient amplitude. For example, suppose that as the transport is writing, a slightly damaged particle of tape passes over the write head. A bit is written, but at a considerably reduced amplitude. When that magnetized particle passes over the reproduce head, the desensitized read logic fails to detect it, and a parity error results. If the transport were under computer control, it would attempt to rewrite the bit on tape.
9A-3.
9A-4.
First Trace:
Monitored at A4A1-A4A7TP1.
Second Trace: Monitored at A4A1-A4A7TP2. Third Trace: Fourth Trace: Horizontal: Vertical: Monitored at A4A1-A4A7TP3. Monitored at A4A1-A4A7TP4. 50 sec 500 millivolt, channel 1 10:1 Probe Internal 1.
10
NOTE
OFF LINE, MTC, and EFR lights should be on. d. e. Press all RESET pushbutton switches Press EF
11
NOTE
CONTROL EFR, EI, and COMPUTER DATA INPUT lights 14 and 0 should be on. 2. Set oscilloscope as follows: b.
9A-6.
READ/WRITE AMP TEST AT 556 BPI.
Trigger:
The above waveforms show the relative amplitudes and timing relationships of signals available in the read/write modules A4A1 through A4A7. All waveforms are time correlated as shown except for the last trace, which is the write pulse waveform. Test Comments. a. After a bit is written on tape, it must then pass over the reproduce head stack which is 0.3 inch away. At 75 ips, the transit time is 4 milliseconds or 4,000 sec. Obviously, this large time disparity cannot be represented effectively in the above waveform. The first and second traces in the display show the prerecorded signal being read directly off tape and amplified by a factor of approximately 200. The third trace illustrates the signal fed to a phase splitter, after which it is bridge rectified and clipped. The result is a series of negative going pulses (approximately 2 volts) riding on a negative 1 vdc level. The fourth trace peak to peak shows the pulses that are applied to a differentiating peak
Set up MTT to write all ones pattern at 556 BPI from LU 2 as directed in Paragraph 9A-8, Step 1.a. through f. and Paragraph 9A-8 Step 3.
9A-5.
READ/WRITE AMP TEST AT 200 BPI.
3.
1.
Set MTT to write all ones pattern at 200 BPI from LU 2 as directed in Paragraph 9A-8 Step 1.a. through f. b.
Monitored at A5A1TP1. Monitored at A4A8A1TP3. 1 Millisecond 500 Millivolt, channels 1 and 2 10:1 Probe External A5A2TP4
Monitored at A4A1-A4A7TP1 Horizontal: Vertical: 20 sec 200 millivolt, channel 1 10:1 Probe Internal
c.
Trigger:
d.
Trigger:
9A-8
NAVAIR 01-75PAC-12
9A-7. READ/WRITE AMP TEST AT 800 BPI. 1. Set up MTT to write all ones pattern at 800 BPI from LU 2. (See NAVAIR 01-75PAC-12-7.) e. MCP DATA REGISTER (1) f. Press Switch/Indicators 0 through 29 4. To obtain waveform 3, change packing density to 800 BPI by setting toggle switch 21 in MTT TEST section to up (800 BPI). Waveform should be a pulse 8.5 (+0,-1) sec in duration. Adjust A4A8, R1 as required to bring into parameters. Test Comments. a. This display shows the duration of the character gate at the selected packing densities. The AN/AYA-8 data system utilizes a parallel digital format, i.e., data is written in groups across the width of the tape. Data to be written is dumped on tape from all seven head tracks simultaneously. However, due to several factors all seven tracks are not necessarily read back at the same time. This is due in part to the fact that no transport is capable of moving tape in an absolute straight line at a constant speed. Imperfections in the tape path and friction and resonances generated by the roller bearings and static surfaces all result in instantaneous azimuth errors between the tape and the record/reproduce head. These errors contribute to a term called dynamic skew. The result is that, due to the tape being skewed in relation to the head stack, all data does not arrive at its corresponding head pole piece at the same instant. Since LU 2 and the central computer depend on precise timing relationships, it is critically important that these relationships be restored. This then is the purpose of the character gate. The character gate begins its timing sequence with the first bit of data detected on any track. It then waits for a predetermined amount of time. During this time all tracks should have read and stored their respective bits of data off tape. The character gate then simultaneously gates the information from all seven tracks out to LU 2. The beginning of each trace respresents receipt of the first data bit off tape. The trace remains at a +5 vdc level for a fixed amount of time, after which it goes low or zero vdc. At this point the data waiting in the storage flip-flops of each data card is gated out and processed by LU 2. 2.
11
b.
MTT TEST section (1) (2) (3) (4) Set MODE to NORMAL Set OPTION to REPEAT Set the following toggle switches to up: 0, 17, or 18, 19, 24, and 25. Set all other toggle switches to down 0, 0 (200 BPI). Set ON-OFF to ON
CONTROL Section (1) Set EF AUTO-MAN to AUTO 5.
c.
CONTROL section (1) (2) (3) Set IDR-EI to IDR Set IA AUTO-MAN to AUTO Set OA AUTO-MAN to AUTO
b.
d.
RESET Section (1) Press all RESET switches
Monitored at A4A1-A4A7TP1 Horizontal: Vertical: 20 sec 200 millivolt, channel 1 10:1 Probe Internal
e.
MCP DATA REGISTER (1) Press Switch/Indicators 0 through 29
f.
CONTROL Section (1) Set EF AUTO-MAN to AUTO
Trigger: 2.
Test Comments. Compare waveform with other two. Observe the additional smoothing effect at the higher frequency.
13
All traces monitored at A4A8TP1, but at different packing densities. Horizontal: Vertical: 5 sec 500 millivolt, channel 1 10:1 Probe Internal c.
9A-8.
DATA CHARACTER GATE TEST AND ADJUSTMENT. 1. Set up LU 2 as follows: a. b. Press all RESET pushbutton switches MTT TEST Section (1) (2) (3) (4) c. Set MODE to NORMAL Set OPTION to REPEAT Set toggle switches 0, 17, or 18, 19, 24 and 25 to up, and set all other toggle switches to down (200 BPI) Set ON-OFF to ON 2.
Both traces monitored at A4A1TP4 through A4A7TP4. Horizontal: Vertical: 50 sec 200 millivolt , channel 1 10:1 Probe Internal
Trigger:
d.
Waveform 1 taken at 200 BPI packing density. The positive pulse should be 23 (2) sec in duration. Adjust A4A8, R5 as required to bring into parameters.
Trigger:
CONTROL section (1) (2) (3) Set IDR-EI to IDR Set IA AUTO-MAN to AUTO Set OA AUTO-MAN to AUTO
3.
d.
RESET Section (1) Press all RESET switches
To obtain waveform 2, change packing density to 556 BPI by changing toggle switches in MTT TEST section of LU 2 as follows: toggle switch 21 to down, and toggle switch 20 to up (556 BPI) Waveform should be a pulse 10 (+0, -1) sec in duration. Adjust A4A8, R3 as required to bring into parameters.
9A-9.
DATA CROSSOVER TEST AND ADJUSTMENT. 1. Set up LU 2 as follows: a. Press all RESET pushbutton switches
Perform the following steps to make crossover adjustment: a. b. Monitor A4A1TP4 Adjust A4A1, R-43 ccw until signal inverts. (See Abnormal Waveform.)
9A-9
NAVAIR 01-75PAC-12
c. d. e. 3. Adjust A4A1, R-43 cw until signal inverts (See Normal Waveform.) Turn A4A1, R-43 cw three-fourths of a turn Repeat above steps for A4A2 through A4A7
12
Both traces monitored at A4A1TP7 through A4A7TP7. Horizontal: Vertical: 50 sec 200 millivolt, channel 1 10:1 Probe Internal
8
Monitored at A4A1TP1 Monitored at A4A7TP1 5 sec 200 millivolt channels 1 and 2 10:1 Probe Chop (alternate, external A4A1TP4).
Test Comments. The upper trace shows a series of logic ones produced by a normal data card. The lower trace is an abnormal output. These pulses obtain their shape from a Schmitt trigger, which is actually a threshold detector. As can be seen, a properly adjusted data card produces positive pusles of approximately 10 sec duration. However, if the threshold level is not properly set, the signal can be made to invert, resulting a positive pulses exceeing 50 sec duration. Any data pulses occuring outside the time limits of the character gate (approximately 23 sec at 200 bpi) automatically exceeds the timing constraints of the system, and causes a data failure (parity errors) on that channel.
Trigger: 2. Test Comments. a.
Monitored at A4A1TP1 Monitored at A4A7TP1 5 sec 200 millivolt channels 1 and 2 10:1 Probe Chop (alternate, external A4A1TP4).
Trigger:
The upper trace in the display shows a normal write-pulse generated by the data card. The spike on the leading edge of each pulse is caused by the inductive loading reflected by the head track. The lower trace is the unloaded output of the data write circuit. Absence of the spike on each leading edge indicates that this pulse is not actually arriving at the heads. The most likely cause is a failure to energize the reed relay which has its contacts in series with each head track. The purpose of the relay is to inhibit any power from being applied to the heads during power-up or shutdown of the MTT. This in turn prevents any spurious data from being written on tape. If the problem occurs on all 7 tracks, check the two connectors (WP3P-17 and WP3P-18) on the reed relay power supply located at the rear, lower center of the MTT.
b.
9A-10.
DATA WRITE TEST. 1. Set up LU 2 as follows: a. b. Press all RESET pushbutton switches MTT TEST section (1) (2) (3) Set MODE to NORMAL Set OPTION to REPEAT Set toggle switches 0, 17, or 18, 19, 24 and 25 to up, and set all other toggle switches to down 0, 0 (200 BPI) ON-OFF to ON 9A-11.
Trigger:
2.
Test Comments. a. If a set of record reproduce heads are mechanically rotated in such a manner that their azimuth plane is no longer parallel to the direction of tape travel, the resulting angular displacement is called static skew. When the condition exists, the data prerecorded on each track is no longer time coincident with data on the other tracks. This is because the data on each track does not pass over the record/reproduce head at the same instant. Correspondingly, the time delay is greatest when measured between the inside and outside tracks. The head skew normal waveform A shows the tracks to be within the 5 sec tolerance allowed the MTT.
c.
Monitored at A4A1TP1 Monitored at A4A7TP1 5 sec 100 millivolt, channels 1 and 2 10:1 Probe Chop (alternate, external A4A1TP4).
(4) c.
CONTROL section (1) (2) (3) Set IDR-EI to IDR Set IA AUTO-MAN to AUTO Set OA AUTO-MAN to AUTO Press all RESET switches
HEAD SKEW CHECK. CAUTION Unless head skew has been misadjusted, it should not require adjustment. If head skew is to be checked, proceed with caution. Heads can be permanently damaged if adjusting screw is turned more that three-fourths of a turn. b.
d.
RESET section (1)
c.
Trigger:
e.
MCP DATA REGISTER (1) Press Switch/Indicators 0 through 29
NOTE
Head skew does not cause or correct errors during sim SYGNOG.
3.
Test Comments. a. This display shows the head stack skewed by approximately 5 sec. If head stack is skewed by more than 5 sec, see MTT Alignment Procedures.
f.
CONTROL section (1) Set EF AUTO-MA to AUTO
NOTE
Head screw checks can be made using a certified azimuth tape prerecorded at 800 BPI only. The present part number for this tape is IBM 432641 (NSN 7045-00-079-4525). 1. Install certified azimuth skew tape.
NOTE
While performing head skew check, if tape stops at EOT, press reverse (never rewind) and then tape motion. When tape has returned to load point, continue check.
9A-10
NAVAIR 01-75PAC-12
(RACK D3) MTT A4 ELECTRONIC HOUSING ASSEMBLY (RACK D1) LU 2 2J13 MTT B 2J11 MTT A 19 29 31 37 FORWARD REVERSE REWIND MTT SELECT W1J1 50 48 46 35 W1P1/ A4J24 3 5 7 1 W3J9 47 46 45 44 43 42 STOP (LOCAL) TAPE MOTION (LOCAL) FORWARD (LOCAL) REVERSE (LOCAL) REWIND (LOCAL) DC SUPPLY LOOP POSITION INDICATORS DRIVE SIGNALS 79 1 2 T A K E U P 3 4 5 6 7 8 1 L O 2 O P 3 P O S I T I O N 4 5 6 74 7 8 75 76 24 26 25 5 6 78 77 23 21 22 2 1 NO. 1 (SUPPLY) NO. 2 (SUPPLY) NO. 3 (SUPPLY) NO. 4 (SUPPLY) NO. 5 (SUPPLY) NO. 6 (SUPPLY) NO. 7 (SUPPLY) NO. 8 (SUPPLY) TAKEUP LOOP POSITION INDICATORS DRIVE SIGNALS NO. 1 (TAKEUP) NO. 2 (TAKEUP) NO. 3 (TAKEUP) NO. 4 (TAKEUP) NO. 5 (TAKEUP) NO. 6 (TAKEUP) NO. 7 (TAKEUP) NO. 8 (TAKEUP) A1A3 TAKEUP REEL TACHOMETER TONE WHEEL TP1 A1 VACUUM COLUMN UNIT A1A2 SUPPLY REEL TACHOMETER TONE WHEEL TP1 W3J11 9 25 W3J14 9 W3P4/A4J27 57 58 59 60 61 16 41 7 W3J12 26 1 28 29 31 14 32 36 83 8 9 10 11 12 W3J13 17 16 13 31 6 7 29 11 W3J13 18 34 14 12 5 10 27 3 13 32 33 34 35 36 37 A10 CAPSTAN DRIVE UNIT W3P7 TONE SIGNAL GENERATOR 4 A5 CAPSTAN SERVO LOW LEVEL ELECTRONIC UNIT A5A2 CAPSTAN SERVO LOGIC W3J8 27 TP7 17 18 CONDITIONS CAPSTAN TONE SIGNAL FOR USE IN STOP RESET SPEED GENERATOR TP6 W3J8 5 18 4 37 36 STOP RESET IND DRIVE ON SPEED IND DRIVE 38 84 91 90 89 STOP (LOCAL) TAPE MOTION (LOCAL) FORWARD (LOCAL) REVERSE (LOCAL) REWIND (LOCAL) SUPPLY REEL TONE SIGNAL TAKEUP REEL TONE SIGNAL SUPPLY LOOP FAULT SENSOR EOT/TAPE BREAK SENSOR SUPPLY LOOP POSITION SENSOR NO. 2 SUPPLY LOOP POSITION SENSOR NO. 3 SUPPLY LOOP POSITION SENSOR NO. 4 SUPPLY LOOP POSITION SENSOR NO. 5 SUPPLY LOOP POSITION SENSOR NO. 6 SUPPLY LOOP POSITION SENSOR NO. 7 TAKEUP LOOP FAULT SENSOR TAKEUP LOOP POSITION SENSOR NO. 2 TAKEUP LOOP POSITION SENSOR NO. 3 TAKEUP LOOP POSITION SENSOR NO. 4 TAKEUP LOOP POSITION SENSOR NO. 5 TAKEUP LOOP POSITION SENSOR NO. 6 TAKEUP LOOP POSITION SENSOR NO. 7 LOAD POINT SENSOR CAPSTAN TONE STOP RESET ON SPEED SIGNAL SUPPLY TONE SIGNAL TAKEUP TONE SIGNAL SUPPLY REEL DIRECTION FORWARD SUPPLY REEL DIRECTION REVERSE SUPPLY REEL DIRECTION IND DRIVE 14 15 39 A3A3 TAKEUP REEL MOTION SENSOR W3J10 13 6 14 TAKEUP REEL DIRECTION FORWARD TAKEUP REEL DIRECTION REVERSE TAKEUP REEL DIRECTION IND DRIVE 40 SUPPLY REEL DIRECTION FORWARD SUPPLY REEL DIRECTION REVERSE TAKEUP REEL DIRECTION FORWARD TAKEUP REEL DIRECTION REVERSE CAPSTAN TONE A4A11 A4J16 10 SENSOR ELECTRONIC UNIT A4J16 A4A11A1 REEL SPEED COMPARATOR LOGIC 8 9 5 6 22 23 24 25 SUPPLY STOP MODE SPEED SENSOR SUPPLY DRIVE MODE SPEED SENSOR TAKEUP STOP MODE SPEED SENSOR TAKEUP DRIVE MODE SPEED SENSOR SUPPLY SPEED COMP-LO SUPPLY SPEED COMP-HI TAKEUP SPEED COMP-HI TAKEUP SPEED COMP-LO ON SPEED SIGNAL A4J11 1 A4A14 A4J23 33 31 21 35 INPUT ELECTRONIC UNIT A4A14A2 INPUT INTERFACE A4J23 7 6 5 1 A4A9 CONTROL LOGIC UNIT A4A9A2 READY LOGIC SUPPLY LOOP FAULT SENSOR TAKEUP LOOP FAULT SENSOR A4A8 A4J13 7 A4J13 35 46 20 10 11 14 READY READY RESET DOOR INTERLOCK DRIVE LOCKOUT IND DRIVE DRIVE LOCKOUT POWER FAIL BRAKE RELEASE FORWARD (REMOTE) REVERSE (REMOTE) REWIND (REMOTE) MTT SELECT A B C D
A8
CONTROL PANEL STOP TAPE MOTION FORWARD REVERSE REWIND
9 DATA CONTROL UNIT A4A8A2 DATA CONTROL LOGIC CONTROL DATA WRITE SYSTEM
26
W3J12 8 27 30 12 33 15 18 37
A1A1
SUPPLY
S U P P L Y
SUPPLY LOOP POSITION SENSOR NO. 2 SUPPLY LOOP POSITION SENSOR NO. 3 SUPPLY LOOP POSITION SENSOR NO. 4 SUPPLY LOOP POSITION SENSOR NO. 5 SUPPLY LOOP POSITION SENSOR NO. 6 SUPPLY LOOP POSITION SENSOR NO. 7 SUPPLY REEL DIRECTION FORWARD SUPPLY REEL DIRECTION REVERSE
A4A10 REEL SERVO LOGIC UNIT A4J14 A4A10A1 9 SUPPLY REEL A4J14 SERVO LOGIC 1 2 10 3 6 7 8 11 5 12 A4J15 A4A10A2 50 TAKEUP REEL 49 SERVO LOGIC 48 45 44 43 39 46 A4J15 40
SUPPLY POSITIVE DRIVE COMMAND SUPPLY SERVO BRAKE ACTUATE SUPPLY NEGATIVE DRIVE COMMAND TAKEUP NEGATIVE DRIVE COMMAND TAKEUP SERVO BRAKE ACTUATE TAKEUP POSITIVE DRIVE COMMAND
TAKEUP
THE CONTROL PANEL CONTAINS MONITOR LAMPS WHICH GIVE A VISUAL INDICATION OF LOOP POSITION
TAKEUP LOOP POSITION SENSOR NO. 2 TAKEUP LOOP POSITION SENSOR NO. 3 TAKEUP LOOP POSITION SENSOR NO. 4 TAKEUP LOOP POSITION SENSOR NO. 5 TAKEUP LOOP POSITION SENSOR NO. 6 TAKEUP LOOP POSITION SENSOR NO. 7 TAKEUP REEL DIRECTION FORWARD TAKEUP REEL DIRECTION REVERSE
41
42
CAPSTAN TONE SIGNAL
A2A3
SUPPLY REEL MOTION SENSOR
W3J5 13 6 14
COMPARES THE SPEED SENSED BY THE TACHOMETER AND CAPSTAN 12 SPEED SIGNAL PRODUCED BY CAPSTAN TONE WHEEL 11
SHEET 2
(9A-11 blank)/9A-12
Figure 9A-4. MTT Supply Reel, Takeup Reel, and Capstan Drive Signal Flow Diagram (Sheet 1 of 4)
NAVAIR 01-75PAC-12
(RACK D3) MTT (CONT) A5 CAPSTAN SERVO LOW LEVEL ELECTRONIC UNIT A5A2 CAPSTAN SERVO TP4 LOGIC TP2 16 15 A5A1 CAPSTAN SERVO DETECTOR TP4 20 TP5
A B C D
FORWARD (REMOTE) REVERSE (REMOTE) REWIND (REMOTE) MTT SELECT STOP RESET READY READY RESET DOOR INTERLOCK STOP (LOCAL) TAPE MOTION (LOCAL) FORWARD (LOCAL) REVERSE (LOCAL) REWIND (LOCAL) LOAD POINT SENSOR SUPPLY LOOP POSITION SENSOR NO. 2 SUPPLY LOOP POSITION SENSOR NO. 7 EOT/TAPE BREAK SENSOR TAKEUP LOOP POSITION SENSOR NO. 2 TAKEUP LOOP POSITION SENSOR NO. 7
A4A9 CONTROL LOGIC UNIT A4J12 A4A9A1 TRANSPORT 45 CONTROL 29 LOGIC 28 14 1 41 43 20 32 31 34 35 33 42 2 5 36 6 3
A4J12 38 39 9 12 10 11 7 8 15 18 21 30 16 19
A4J28/ W3P5 DRIVE MODE ENABLE REWIND ENABLE FORWARD COMMAND REVERSE COMMAND FORWARD DRIVE INDICATOR REVERSE DRIVE INDICATOR TAPE MOTION INDICATOR DRIVE STOP INDICATOR DRIVE REWIND INDICATOR DRIVE TAKEUP LOOP RESET REWIND MODE REVERSE CONDITION FORWARD CONDITION SUPPLY LOOP RESET FORWARD COMMAND REVERSE COMMAND TEST MODE DRIVE LOCKOUT DRIVE LOCKOUT 39 40 7 43 41 42
W3J8 16 34
W3J8 33 9 8 23
SERVO MODE ENABLE SERVO ERROR SERVO ERROR RET CAPSTAN TONE SERVO ERROR
W3J7 7 14 1 8
19
SERVO ERROR SERVO MODE ENABLE A6 CAPSTAN SERVO POWER AMPLIFIER UNIT A6A1 POWER J1 COMPONENTS ASSY 2 1 8 15 7 6 P1 A6A2 CAPSTAN LOGIC POWER AMP TP1 14 TP6 <0.5 VDC TAPE REC >3 VDC TAPE FWD TP5 <0.5 VDC TAPE FWD >3 VDC TAPE REV A6A1 POWER COMPONENTS ASSY P1 J1 12 14 W3J6 A4 A3 REVERSE DRIVE FORWARD DRIVE A10 CAPSTAN DRIVE UNIT
W3J6 12 10 7 6 9 8
W3P2 A2 A1 CAPSTAN MOTOR
A4A10 REEL SERVO LOGIC UNIT SUPPLY STOP MODE SPEED SENSOR SUPPLY DRIVE MODE SPEED SENSOR A4J14 33 A4A10A1 SUPPLY REEL SERVO LOGIC 34 A4J14 43 38 37 39 A4J15 14 13 12 8 SUPPLY SPEED COMP-LO SUPPLY SPEED COMP-HI TAKEUP SPEED COMP-HI TAKEUP SPEED COMP-LO
TAKEUP STOP MODE SPEED SENSOR TAKEUP DRIVE MODE SPEED SENSOR
A4J15 A4A10A2 TAKEUP REEL 18 SERVO LOGIC 17
FORWARD INDICATOR DRIVE REVERSE INDICATOR DRIVE TAPE MOTION INDICATOR DRIVE STOP INDICATOR DRIVE REWIND INDICATOR DRIVE DRIVE LOCKOUT INDICATOR DRIVE
13 14 2 11 15 22 24 23 25 36 5.25 VDC A8 CONTROL PANEL DS3 DS4 DS2 DS1 DS5 DS18 DS44 DS50 DS48 DS47 DS49 DS9 FORWARD REVERSE TAPE MOTION STOP REWIND DRIVE LOCKOUT TACH SUPPLY SPEED COMPL-LO SUPPLY SPEED COMPL-HI TAKEUP SPEED COMPL-HI TAKEUP SPEED COMPL-LO ADDRESS NO. 2 SHEET1 SUPPLY DIR DS46 TAKEUP DIR DS45 STOP RESET DS26 ON SPEED DS12 WRITE LOCKOUT DS15 ADDRESS NO. 1 DS8
W3J9 69 65 64 68 70 10 63 58 57 56 55 59 51
W3J9 3 4 54 18 16 7 SUPPLY REEL DIRECTION IND TAKEUP REEL DIRECTION IND STOP RESET IND ON SPEED IND
STOP (LOCAL) REWIND (LOCAL) FORWARD (LOCAL) TAPE MOTION (LOCAL) REVERSE (LOCAL) READY
A4A12 OUTPUT ELECTRONIC UNIT A4J19 15B A4A12A2 OUTPUT DIAGNOSTIC 16B MATRIX 17B 14B 5B 5A SWITCHES DATA LINES FOR DIAGNOSTIC TEST
TAKEUP NEGATIVE DRIVE COMMAND POWER FAIL BRAKE RELEASE DRIVE LOCKOUT TAKEUP POSITIVE DRIVE COMMAND TAKEUP SERVO BRAKE ACTUATE
89 91 92 88 90 9 A2 SUPPLY REEL DRIVE UNIT A2A2 POWER AMPLIFIER ASSY TP7 TP1 21 23 TP2 TP5 <3 VDC INDICATES DRIVE LOCKOUT 22 TP8 24 A2A1 MOTOR AND BREAK ASSY W3P6 5 1 A2 2 3 A1 REEL MOTOR 6 5 8 14 13 15 (SAME AS A2A2) A3 TAKEUP REEL DRIVE UNIT A3A2 POWER AMPLIFIER ASSY A3A1 MOTOR AND BREAK ASSY 5 1 A2 2 3 A1 (SAME AS A2A1)
A4A14 INPUT ELECTRONIC UNIT A4A14A1 INPUT DIAGNOSTIC MATRIX A4J22 33
W3P6 POWER FAIL BRAKE RELEASE SUPPLY POSITIVE DRIVE COMMAND DRIVE LOCKOUT SUPPLY NEGATIVE DRIVE COMMAND SUPPLY SERVO BRAKE ACTUATE TEST MODE DRIVE LOCKOUT 67 64 68 65 66 8 5 6 8 14 13 15
9A-13
NAVAIR 01-75PAC-12
9A-1. 9A-2. GENERAL INFORMATION. For additional troubleshooting procedures see tables 9A-3, 9A-4, 9A-5, and 9A-7 in NAVAIR 01-75PAC-2-5. If the MTT fails to drive forward or reverse at the proper speed, perform the tests in the following paragraphs. CAPSTAN DRIVE TEST. 1. Set LU 2 controls as follows: a. b. c. d. e. Select desired MTT (A1/B2 or B1/A2) MODE SELECTOR to OFF LINE CHANNEL SELECTOR to MTC Press all RESET pushbutton switches Press CONTROL EF b. 3. Test Comments. b. The filter, due to its narrow response characteristics, converts the signal into a sine wave as shown in the third trace. The signal then undergoes more stages of shaping and conditioning and finally arrives as the input to a second filter, which is effectively an integrating circuit. If the input to the capstan servo detector is exactly 30 kHz, then the input to the second filter would be a symmetrical square wave. An underspeed condition would cause the negative portion of the waveform to have a longer duration than the positive. The second filter then integrates the positive and negative portions of the waveform, and produces a corresponding positive level out. A symmetrical wave would cause the filter to produce a zero vdc level.
a.
9A-3.
9A-4.
The purpose of the servo mode enable signal is to allow the capstan time to achieve sufficient speed to put it within the range of servo capability. Prior to 3 milliseconds, the capstan is accelerating at its maximum rate, the servo disabled. After the servo mode enable signal goes low, the capstan then comes under control of the servo system.
17
NOTE
CONTROL EFR, EI, and COMPUTER DATA INPUT lights 14 and 0 should be on. 2. On LU 2, set controls in the MTT TEST section as follows: a. b. c. d. e. MODE selector to DRIVE SEQUENCE selector to BOTH CMD TIME to 10 MS Select MTT A or MTT B as appropriate ON-OFF switch to ON c.
The lower trace shows the servo mode enable signal generated as a result of a fixed delay in the capstan servo logic, A5A2. If the transport is in a ready status and tape motion is initiated from the control panel or externally commanded, a drive mode enable signal is generated immediately by the transport control logic, A4A9A1. The signal is supplied to the capstan servo logic where it is gated through an adjustable delay, nominally 3 milliseconds and then supplied to the capstan power amplifier where it effectively turns on the servo system. The upper trace is the input to the servo power amplifier. During the first 3 milliseconds, it remains at a fixed 13 vdc level, providing maximum drive to the capstan. After 3 milliseconds, the servo is then allowed to see the error signal from the capstan servo detector, A5A1. Note that the error signal is now riding on a nominal 6 vdc level. This is the average level required to maintain the capstan speed at 75 ips.
First Trace:
Montiored at A5A2TP7
18
Second Trace: Monitored at A5A2TP6 Third Trace: Fourth Trace: Horizontal: Vertical: Monitored at A5A1TP5 9A-5. Monitored at A5A1TP1
19
20
SUPPLY AND TAKEUP REEL TEST.
NOTE
20 sec 200 millivolt, channels 1 and 2 10:1 Probe Internal The following waveforms can be observed only during initial startup. 1. On MTT, press FORWARD pushbutton conditon. Then press TAPE MOTION pushbutton switch.
Trigger: 4.
Set MTT to run continuously, forward or reverse at 75 ips. Test Comments. a. The first trace shows the output of the capstan tone wheel preamplifier which is a sine wave of approximately 2 volts P-P. The tone wheel consists with 1500 lines photo-etched about its radius. The disc is concentrically mounted on the capstan motor shaft, and a constant light source is beamed through the disc and onto a phototransistor. As the shaft turns, light is alternately obstructed by a line and then allowed to pass, resulting in a frequency out of the transistor proportional to the motor rpm. This signal is fed to a section of the capstan servo logic card, A5A2, where it is amplified and converted to a square wave, as shown in the second trace. It is then fed to the capstan servo detector, A5A1, where it becomes the input to a bandpass filter.
5.
21 22
Upper Trace: LowerTrace: Horizontal: Vertical:
Montiored at A2A2TP1. Monitored at A2A2TP2. 5 milliseconds 500 millivolt, channels 1 and 2 10:1 probe Internal
14
Monitored at A6A2TP1 Monitored at A5A2TP2 1 millisecond 500 millivolt, channel 2 10:1 Probe External A5A2TP4
15
16
Trigger:
Trigger:
9A-14
NAVAIR 01-75PAC-12
2. On MTT, press REVERSE pushbutton switch, then press TAPE MOTION pushbutton switch. c. In the first display, the upper trace returns to a zero volt level for a longer average duration than does the lower trace, expecially with the long negative pulse at approximately 32 milliseconds. (A zero vdc level is a true condition. Two trues cannot be present simultaneously. However, both levels may be false, or +5 vdc. The latter condition would result in no drive to the reel. Also, zero vdc has priority over a +5 vdc level). The overall drive indicated in the forward condition would be positive. In the display for a reverse condition, the lower trace spends a longer duration at zero vdc, indicating an overall negative drive condition. 6. On MTT, set FORWARD pushbutton switch, then press TAPE MOTION pushbutton switch.
25 26
Monitored at A1A2TP1 Monitored at A1A3TP1 100 sec 50 millivolt channels 1 and 2 10:1 Probe Internal
21
Monitored at A2A2TP1 Monitored at A2A2TP2 5 milliseconds 500 millivolt, channels 1 and 2 10:1 Probe Internal
4.
22
On MTT, press FORWARD pushbutton. Then press TAPE MOTION pushbutton switch.
23 24
Monitored at A2A2TP7 Monitored at A2A2TP8 5 milliseconds 500 millivolt, channels 1 and 2 10:1 Probe Internal b.
The two waveforms displayed above show the relationship between the negative and positive drive pulses generated by the reel servo logic A4A10. The upper traces in both displays are the positive drive pulses to the supply reel; the lower traces are the negative pulses for the same. A positive drive pulse is defined as a signal that tends to turn the reel in such a direction as to put tape into the vacuum column. A negative drive pulse tends to cause the reel motor to pull tape out of the column. A no drive condition exists when the reel is coasting, as it would in the absence of a drive pulse or when tape motion has not been initiated. Thus, it can be seen with tape moving in a forward direction, the supply reel receives more positive drive pulses than negative drive pulses since its function is to keep tape moving into the vacuum column. The takeup reel receives more negative pulses than positive pulses since it is attempting to pull tape out of the column. 5.
Trigger: Test Comments. a.
b.
The logic levels seen at A2A2TP7 and A2A2TP8 have been inverted and power amplified to form the reel drive pulses displayed above. In this case, the positive pulses represent the true conditon, since the two power drivers of each power amplifier require positive levels to drive them into saturation. In analyzing the two waveforms, we can see that the lower trace spends a longer average duration at a positive level, thus an overall negative drive existed for the duration of the trace.
c.
b.
The waveforms displayed are generated much the same way as the capstan tone generator signal. In this case, however, the tape supplies the mechanical drive to each tachometer roller, rotating the shaft and producing the waveforms shown. Note that the frequency of the signal is not constant, but varies as the instantaneous velocity of the tape changes. Only the portion of the tape loop passing over the capstan and heads is maintained at a constant velocity, whereas the velocity of the tape at its point of entry into, and exit from the vacuum column is not constant. This accounts for the blinking tape loop position lights on the control panel. These signals are utilized by the reel speed comparator logic, A4A11A1, which compares the instantaneous frequency of each tachometer to that of the capstan. If a tachometer signal falls within 94 percent to 96 percent of the capstan speed. The comparator sends a +5 vdc level to the reel servo logic, A4A10, where it is processed and used as an override signal. If a tachometer failed to produce a signal of sufficient amplitude (approximately 1.5 volt P-P), the corresponding reel would behave in an erratic manner, that is, overshoot its programmed limits in the vacuum column to go into a loop fault condition.
9A-15
NAVAIR 01-75PAC-12
(RACK D3) MTT A OR B A4 ELECTRONIC HOUSING ASSEMBLY (RACK D1) LU 2 2J13 MTT B 2J11 MTT A 37 47 MTT SELECT (HI) MTT SELECT (LO) INPUT INTERLOCK A4A14 W1J1 35 36 80 81 W1P1/A4J24 1 2 46 47 DC A4A9A2 READY LOGIC A4A13 A4J23 1 67 69 75 77 TEST ENABLE 1 (DTE 1) TEST ENABLE 2 (DTE 2) TEST ENABLE 1 RET TEST ENABLE 2 RET 69 71 70 72 36 38 37 39 34B 36A 33B 35A INPUT/OUTPUT ELECTRONIC UNIT A4A13A2 INPUT INTERFACE B A4J21 50A 49A DTE 1 DTE 2 THE READY LOGIC MONITORS THE STATUS OF MTT AND GENERATES CONTROL SIGNALS TO 8 ENABLE TAPE OPERATION WHEN THE MTT IS IN A 43 READY CONDITION. THE READY LOGIC MONITORS VACUUM, POSITION OF THE DOOR, THE TAPE BREAK SENSOR, THE POWER INTERLOCK, AND THE TAPE LOOP FAULT SENSORS. WHEN ALL INPUTS ARE IN A READINESS CONDITION, THE 19 READY LOGIC GENERATES THE READY AND READY-RESET SIGNALS 18 AND REMOVES THE DRIVE LOCKOUT AND POWER FAILURE BRAKE SIGNALS. THE READY SIGNAL ENABLES THE TRANSPORT AND DATA CONTROL LOGIC. 33 34 31 32 30 29 44 3 9 1 7 2 5 6 A4J13 42 45 20 46 35 28 16 15 13 10 12 14 11 38 37 39 41 40 36 DOOR INTERLOCK READY RESET READY (DTRB 1-7) READY ACKNOWLEDGE DOOR INTERLOCK IND DOOR OVERRIDE IND VACUUM IND DRIVE LOCKOUT IND READY IND POWER FAIL BRAKE RELEASE DRIVE LOCKOUT POWER FAIL BRAKE RELEASE TEST (DTRB 1-2) DRIVE LOCKOUT TEST (DTRB 1-5) DOOR INTERLOCK TEST OVERRIDE (DTRB 1-3) STOP TEST OUTPUT (DTRB 1-1) LOOP FAULT TEST OUTPUT (DTRB 1-4) READY RESET TEST OUTPUT (DTRB 1-6) A4J23 35 36 47 INPUT ELECTRONIC UNIT A4A14A2 INPUT INTERFACE A A4J23 1 MTT SELECT A4J12 14 A4A9A1 TRANSPORT CONTROL LOGIC A4A9 CONTROL LOGIC UNIT A4J12 13 41 43 20 37 40 MTT SELECT STOP CONDITION MTT SELECT IND
A7
POWER CONTROL UNIT A7A1 AC OVER/UNDER VOLTAGE SENSOR J4 6 32 W3P4/A4J27 65 POWER INTERLOCK
A4A10 REEL SERVO LOGIC ASSY A4A10A1 SUPPLY REEL SERVO LOGIC A4A10A2 TAKEUP REEL SERVO LOGIC A4J14 43 A4J15 8 TAKEUP LOOP FAULT RESET SUPPLY LOOP FAULT RESET
A1 VACUUM COLUMN UNIT W3J13 A1A1 TAPE LOOP POSITION SENSOR 18 5 26 A4A14 INPUT ELECTRONIC UNIT 32 66 7 TAKEUP LOOP FAULT SENSOR TAKEUP BREAK SENSOR SUPPLY LOOP FAULT SENSOR A4A14A1 INPUT DIAGNOSTIC UNIT A4J22 6B 7B 8B 9B 10B A11 REGULATOR AND SWITCH ASSY W3P16 VACUUM SWITCH S1 2 1 DC A13 LOW TAPE SENSOR UNIT S1B DOOR INTERLOCK SWITCH S1A 64 VACUUM INTERLOCK 11B 33 DTA 1-6 DTA 2-8 DTA 1- (DOOR INTERLOCK TEST) -8 DTA 2-10 DTA 1-10 (VACUUM INTERLOCK TEST) DTA 2- (DOOR INTERLOCK TEST) -6 TEST MODE DRIVE LOCKOUT POWER INTERLOCK TAKEUP LOOP FAULT SENSOR TAKEUP BREAK SENSOR SUPPLY LOOP FAULT SENSOR VACUUM INTERLOCK DOOR CLOSED 62 63 DOOR CLOSED DOOR OVERRIDE DOOR OVERRIDE
W3J4 11 13 5 DC
9A-16
Figure 9A-5. MTT Ready Function Signal Flow Diagram (Sheet 1 of 2)
NAVAIR 01-75PAC-12
(RACK D3) MTT A OR B (CONT) ELECTRONIC HOUSING ASSEMBLY (CONT) A4J28/W3P5 A4A8 DATA CONTROL UNIT READY IND MTT SELECT IND DOOR INTERLOCK IND DOOR OVERRIDE IND VACUUM IND DRIVE LOCKOUT IND 19 16 38 37 36 22 W3J9 20 72 34 33 7 10 5.25 VDC A8 CONTROL PANEL DS10 DS7 DS52 DS53 DS51 DS18 READY MTT SELECT DOOR INTLK DOOR OVRD VACUUM DRIVE LOCKOUT
READY RESET READY ACKNOWLEDGE
A4J11 8 10
A4A8A2 DATA CONTROL LOGIC
A2 A4A13 INPUT/OUTPUT ELECTRONIC UNIT W3P6 5 8
REEL DRIVE UNIT
A2A2
POWER FAIL BRAKE RELEASE A4J20 7 A4A13A1 OUTPUT INTERFACE A A4J20 46 45 DRIVE LOCKOUT READY READY RETURN
67 68
SUPPLY POWER AMPLIFIER ASSY
A4J26/W2P3 36 37 A3 REEL DRIVE UNIT
W3J2 25 26
MTT B 2J12 MTT A 2J10 READY READY RETURN 27 34
(RACK D1) LU 2
A4A11
SENSOR ELECTRONIC UNIT
READY RESET
A4A11A2 TAPE REMAINING A4J17 LOGIC 2
A4J28/W3J5 POWER FAIL BRAKE RELEASE DRIVE LOCKOUT 91 92
W3P11 A3A2 TAKEUP POWER 5 AMPLIFIER ASSY 8
A4A12 OUTPUT ELECTRONIC UNIT A4J19 5A 10A 7A 9A 11A 5A 8A READY RESET 50 A4A12A2 OUTPUT DIAGNOSTIC MATRIX A1 VACUUM COLUMN UNIT
READY (DTRB 1-7) POWER FAIL BRAKE RELEASE TEST (DTRB 1-2) DRIVE LOCKOUT TEST (DTRB 1-5) DOOR INTERLOCK TEST OVERRIDE (DTRB 1-3) STOP TEST OUTPUT (DTRB 1-1) LOOP FAULT TEST OUTPUT (DTRB 1-4) READY RESET TEST (DTBR 1-6)
W3J12 3
A1A1
TAPE LOOP POSITION SENSOR
A6
CAPSTAN SERVO POWER AMPLIFIER ASSY A6A2 CAPSTAN SERVO POWER AMPLIFIER
DRIVE LOCKOUT
43
W3J6 8
Figure 9A-5. MTT Ready Function Signal Flow Diagram (Sheet 2 of 2)
9A-17
NAVAIR 01-75PAC-12
MTT A OR B A4 (RACK D1) LU 2 2J13 MTT B 2J11 MTT A 37 47 MTT SELECT MTT SELECT RET INPUT INTERLOCK ELECTRONIC HOUSING ASSEMBLY A4A14 W1J1 35 36 80 81 W1P1 1 2 46 47 DC MTT SELECT A4A13 INPUT/OUTPUT ELECTRONIC UNIT LOAD POINT A4A14 INPUT ELECTRONIC UNIT A4A14A1 INPUT DIAGNOSTIC UNIT A4J22 47B 36 A4J22 2B A4J28 W3P5 27 31 DTE 2 DTA 2-2 24 4 A4J23 INPUT ELECTRONIC UNIT A4A9 CONTROL LOGIC UNIT A4A9A2 READY LOGIC A4J13 46 READY RESET A4J12 43 W3J13 3 A1 VACUUM COLUMN UNIT A1A1 TAPE LOOP POSITION SENSOR GENERATES CONTROL SIGNAL TO STOP TAPE WHEN LOAD POINT IS REACHED DURING REWIND, TAPE LOADING, AND REVERSE DRIVE UNDER LOCAL CONTROL W3J13 4 A8 CONTROL PANEL 5.25 VDC LOAD POINT DS11 W3J9 19
A4J23 A4A14A2 INPUT INTERFACE A 35 36 47 A4J23 1
A4J12 A4A9A1 TRANSPORT CONTROL LOGIC 14 42
A4J27
W3P4
A4J23 A4A13A2 INPUT INTERFACE B 1 69 77 13 21 DTE 2 DTE 2 RET DATA TRACK 2 DATA TRACK 2 RET 71 72 3 4 58 39 7 8 36A 35A 20 19 A4A13A1 INPUT INTERFACE A
A4J21 49 38
A4J20 10 A4J26 40 39 W2P3 42 43 42 43
(RACK D1) MTT B - 2J12 MTT A - 2J10 32 33 LU 2
9A-18
Figure 9A-6. MTT Load Point Functional Signal Flow Diagram
NAVAIR 01-75PAC-12
(RACK D3) MTT A OR B A4 (RACK D1) LU 2 2J13 MTT B 2J11 MTT A 37 47 MTT SELECT MTT SELECT RET INPUT INTERLOCK W1J1 35 36 80 81 W1P1 1 2 46 47 DC A4A14A1 INPUT DIAGNOSTIC UNIT A4J22 19B 45B 35 SUPPLY REEL DIRECTION SENSOR TEST (DTA 4-1) DTE-4 DATA TRACK 1 ELECTRONIC HOUSING UNIT A4A13 INPUT ELECTRONIC UNIT A4J24 A4J23 A4A14A2 INPUT INTERFACE A 35 36 47
A4J23 1
MTT SELECT
A4A13 INPUT/OUTPUT ELECTRONIC UNIT A4J21 71 15 DTE 4 DATA TRACK 1 75 42 A4J25 1 5 32 A4J20 6 A4A13A1 INPUT INTERFACE A 34A A4A13A2 INPUT INTERFACE B A4J21 1 37 50B A4J20 48 47 A2A3 SUPPLY REEL DRIVE SENSOR L O G I C W3J5 15 8 55 53 W3P4 14 85 A4J27 READY RESET A4A9 CONTROL LOGIC UNIT A4J13 A4A9A2 READY LOGIC 46 A4J28 A4J26 LOW TAPE WARNING OUT LOW TAPE WARNING RET W3P3 46 47 50 51 W2J2 40 41 47 48 MTT A - 2J10 (RACK D1) MTT B - 2J12 LU 2 43 50 46 39
FORWARD/ REVERSE SHUTTER
L O G I C
13 11
SUPPLY REEL DIRECTION SUPPLY REEL STROBE PULSE
DS1
STROBE TUNE (LIGHT WHEEL PATH)
A4A11 ELECTRONIC SENSOR UNIT A4A11A1 REEL SPEED COMPARATOR SUPPLY TACH TONE IS GENERATED BY THE FIXED DIAMETER SUPPLY TACHOMETER ROLLER. THE NUMBER OF PULSES PER FOOT OF TAPE MOVING PAST THE ROLLER IS CONSTANT, PROVIDING A CONSTANT TACH TONE OUTPUT. LOW TAPE WARNING SIGNAL 86 A4A11A2 TAPE REMAINING LOGIC 10 A4J17 2 3 10 6 A8 CONTROL PANEL LOW TAPE 5.25 VDC DS16 W3J9 11 SUPPLY SERVO BRAKE ACTUATE A4A10 DUAL REEL SERVO LOGIC UNIT A4J14 A4A10A1 REEL SERVO LOGIC 10 COUNTER
NOR
A4J16 7
SUPPLY TACHOMETER TUNE OUTPUT
A13 LOW TAPE SENSOR
0 W3J4 LOW TAPE SENSOR (A13A1 AND A13A2) SUPPLY REEL X100 10 9
DS1
(LIGHT PATH)
A4J17 7 D/A CONVERTER 29 30 TAPE REMAINING OUT TAPE REMAINING RET
AND
Figure 9A-7. MTT Low Tape Sensor and Tape Remaining Functional Signal Flow Diagram
9A-19
NAVAIR 01-75PAC-12
(RACK D3) MTT A OR B A4 ELECTRONIC HOUSING UNIT (RACK D1) LU 2 2J13 MTT B 2J11 MTT A 37 47 MTT SELECT MTT SELECT RET INPUT INTERLOCK W1P1/ A4J24 1 2 46 47 A4A14 INPUT ELECTRONIC UNIT A4J23 A4A14A2 INPUT INTERFACE A A4J23 35 36 47 CAPSTAN 1 A1 VACUUM COLUMN UNIT A1A3 TAKE UP REEL TACHOMETER A1A2 SUPPLY REEL TACHOMETER
W1J1 35 36 80 81
DC A17 SUPPLY TAPE BREAK SENSOR EOT EOT REFLECTIVE MARKER ATTACHED TO TAPE
MTT SELECT A4A13 INPUT/OUTPUT ELECTRONIC UNIT A4J21 A4A13A2 INPUT INTERFACE B 1 A4J21 34B 50A 33B
A18 TAKEUP TAPE BREAK SENSOR
A1A1 TAPE LOOP POSITION SENSOR LOAD POINT REFLECTIVE MARKER ATTACHED TO TAPE
LOAD POINT
W3J9 74 79 15
A8
CONTROL PANEL DS27 DS28 DS17 5.25 VDC TAKEUP LOOP POSITION 1 SUPPLY LOOP POSITION 1 EOT/TAPE BREAK
71 15
DTE IN DTE RETURN
69 70 W2J2 39 46
36 37
TAKEUP BREAK SENSOR A4J28/W3P5 1 MTT SELECT W3J13/P2 23
TAKEUP SENSOR 1
SUPPLY SENSOR 1
SUPPLY BREAK SENSOR
2J12 MTT B 2J10 MTT A 42 49 END OF TAPE OUT END OF TAPE RET
DS1
W3J13/P2 17 W3J12/P1 TAKEUP LOOP POSITION 1
A4A9 CONTROL LOGIC UNIT A4J12 A4A9A1 TRANSPORT CONTROL LOGIC 14 CONTROL TAPE DRIVER DIRECTION A4J12 21 30 48 49 FORWARD CONDITION REVERSE CONDITION W3J12/P1 6 25
DS2
A4 ELECTRONIC HOUSING UNIT SUPPLY LOOP POSITION 1 EOT/TAPE BREAK IND TAPE BREAK SUPPLY LOOP FAULT W3P4/ A4J27 66 7 32 A4A9 CONTROL LOGIC UNIT A4J13 A4A9A2 1 7 9 READY LOGIC
2 DS3 3 DS4 4
8 2
5 26
A4A9A2 READY LOGIC RESETS TAPE LOOP SENSORS
A4J13 46 50 READY RESET 3 5 LIGHT PATH DS5 LIGHT PATH 1 5 EOT/TAPE BREAK 36
A4A9A1 TRANSPORT CONTROL LOGIC
DS6 6 A4A14 INPUT ELECTRONIC UNIT A4A14A1 INPUT DIAGNOSTIC MATRIX A4J22 6A 8A 7 4 5 DTA 1-5 DTA 1-7 24 7 W3J13/P2 10A 6 DTA 1-9 19 8 THE END-OF-TAPE, TAPE BREAK TAPE-FAULT LOGIC MONITORS THE MAGNETIC TAPE AND GENERATES CONTROL SIGNALS TO STOP MOVEMENT WHEN END OF TAPE IS REACHED, A BREAK IS DETECTED, OR A FAULT OCCURS DURING OPERATION DS8 8 4 END-OF-TAPE A4A13 INPUT/OUTPUT ELECTRONIC UNIT W3J13/P2 18 TAKEUP LOOP FAULT 82 W3P3/A4J20 44 45 42 41 A4J20 9 A4A13A1 OUTPUT INTERFACE A DS7 7 6 A4A12 OUTPUT ELECTRONIC UNIT A4J19 A4A12A2 OUTPUT DIAGNOSTIC 19B MATRIX DIAGNOSTIC TEST READBACK OF
017-4876 12-9A8
9A-20
Figure 9A-8. MTT Tape Break, End-Of-Tape and Tape Fault Sensor Functional Signal Flow Diagram
NAVAIR 01-75PAC-12 TAPE DECK DETAIL
MAGNETIC TAPE TRANSPORT
A12 MAGNETIC HEAD ASSEMBLY A10 CAPSTAN DRIVE UNIT
A1A2 SUPPLY REEL TACHOMETER A17 TAPE BREAK SENSOR HOUSING A15 SUPPLY TAPE CLEANER
D
A1A3 TAKEUP REEL TACHOMETER
A13 LOW TAPE SENSOR UNIT A2 or A3 REEL DRIVE UNIT A13S1 DOOR INTERLOCK SWITCH A1 VACUUM COLUMN UNIT A18 TAPE BREAK SENSOR HOUSING
A16 TAPE-UP TAPE CLEANER
DETAIL A A9 POWER SUPPLY ASSEMBLY

A9L1 INDUCTOR ASSY A9T2 TRANSFORMER MTT TAPE DECK (REAR) A9A1 CAPACITOR AND REGULATOR ASSY
A8 CONTROL PANEL UNIT
A2 SUPPLY REEL DRIVE ASSEMBLY
TAPE DECK REAR VIEW COMPONENTS

A6 CAPSTAN SERVO POWER AMPLIFIER ASSEMBLY
MP5 TAPE DECK AIR FILTER A9T1 TRANSFORMER TAPE DECK REAR ACCESS LOOSEN EIGHT CAPTIVE SCREWS AND CAREFULLY SWING TAPE TRANSPORT DECK FROM CASE
A9A1A2 13 VDC REGULATOR SUBASSEMBLY
A10 CAPSTAN DRIVE ASSEMBLY
A
A11 AIR PRESSURE REGULATOR AND SWITCH ASSEMBLY A19 FREE RELAY POWER SUPPLY
A9A2 POWER COMPONENTS SUBASSEMBLY A9A3 HARNESS HOUSING ASSY A9A3 TEST POINTS 1 THROUGH 7 A9A1A1 POSITIVE NEGATIVE VOLTAGE REGULATOR
A5 CAPSTAN SERVO LOW LEVEL ELECTRONIC ASSEMBLY
B1 DUAL UNIT VACUUM BLOWER
B3 TAPE DECK PRESSURE BLOWER
C
B2 ELECTRONIC HOUSING COOLING FAN
A3 TAKEUP REEL DRIVE ASSEMBLY
Figure 9A-9. MTT Module Location Diagram (Sheet 1 of 2)
9A-21
NAVAIR 01-75PAC-12
DETAIL B A4 ELECTRONIC HOUSING UNIT DETAIL E A1 VACUUM CONTROL UNIT

A4A12 OUTPUT ELECTRONIC SUBASSEMBLY A4A13 INPUT/OUTPUT ELECTRONIC SUBASSEMBLY A4A14 INPUT ELECTRONIC SUBASSEMBLY A4A1-A4A7 DATA READ/WRITE SUBASSEMBLIES A4A15 ELECTRONIC HOUSING SUBASSEMBLY A4A8 DATA CONTROL SUBASSEMBLY A4A9 CONTROL LOGIC SUBASSEMBLY A4A10 REEL SERVO LOGIC SUBASSEMBLY A4A11 SENSOR ELECTRONIC SUBASSEMBLY A1A2 SUPPLY REEL TACHOMETER REED RELAY TOOL KIT
A14A1 ELECTROMAGNETIC FILTER
A7A1 TAPE LOOP POSITION SENSOR
DETAIL D
VACUUM COLUMN FRONT SPACER
A14 REAR COVER ASSEMBLY

A1A3 TAKEUP REEL TACHOMETER A4A15 View A A1MP1 VACUUM COLUMN ASSEMBLY ALLEN SCREW
DETAIL C A7 POWER CONTROL ASSEMBLY
DETAIL F A2 OR A3 REEL DRIVE ASSEMBLY

A2A1 A3A2 REEL DRIVE MOTOR AND BRAKE SUBASSEMBLY A2A3 A3A3 REEL MOTION SENSOR BLOWER
COVER
A7A2A1 DC UNDERVOLTAGE SENSOR A7A2A2 DC OVERVOLTAGE SENSOR TP1 TP2 TP3
A7A3 CHASSIS AND POWER CONTROL ASSEMBLY CB1 A7A1 AC OVERVOLTAGE/UNDERVOLTAGE SENSOR A7A2 DC OVERVOLTAGE/UNDERVOLTAGE SENSOR SUBASSEMBLY
A2A2 A3A2 REEL DRIVE POWER AMPLIFIER
9A-22
Figure 9A-9. MTT Module Location Diagram (Sheet 2 of 2)
NAVAIR 01-75PAC-12
MAGNETIC HEAD CLEANING CAREFULLY LOOSEN CAPTIVE SCREW AND REMOVE CROSSTALK SHIELD USE A PRE-SATURATED 90% ISOPROPYL ALCOHOL PAD TO CLEAN POLE FACES USING SINGLE ROTATING STROKE ACROSS POLE FACE. TAPE PATH CLEANING WIPE CAPSTAN AND TACHOMETER ROLLERS WITH A PRE-SATURATED 90% ISOPROPYL ALCOHOL PAD VACUUM COLUMN CLEANING UNLOCK SIX TURNLOCK FASTENERS AND REMOVE VACUUM COLUMN COVER VACUUM CLEAN FIBER SURFACES AND WIPE SURFACES THAT CONTACT TAPE WITH PRE-SATURATED 90% ISOPROPYL ALCOHOL PAD. THERE SHOULD NOT BE ANY RIDGES OR IRREGULARITIES IN THE SURFACE WHEN CLEANED PROPERLY WIPE OTHER SURFACES WITH PRE-SATURATED 90% ISOPROPYL ALCOHOL PADS REINSTALL VACUUM COLUMN COVER AND VERIFY THAT THE SIX TURNLOCK FASTENERS ARE TIGHTLY SECURED TO ENSURE PROPER TAPE EDGE GUIDING THROUGH VACUUM COLUMN
CAUTION
EXERCISE CARE TO AVOID SCRATCHING OR DISLODGING SENSOR LENSES AND LAMPS IN VACUUM COLUMN COVERS.
WARNING
ISOPROPYL ALCOHOL HAS A FLASH POINT AND EXPLOSION POINT OF 57 DEGREES CELSIUS, DO NOT USE AROUND AN OPEN FLAME OR SPARKS, USE ONLY ENOUGH ISOPROPYL ALCOHOL TO BE CONTAINED ON TERMINAL WIPES. AFTER USE, DISPOSE OF WIPES AND SWABS IN A CLOSED CONTAINER SUCH THAT SPONTANEOUS COMBUSTION WILL NOT OCCUR. DO NOT USE IN THE PRESENCE OF AVIATORS BREATHING OXYGEN.
LOOP POSITION 2 LENSES LOOP POSITION 3 LENSES
CAPSTAN
TACHOMETER ROLLER TAPE CLEANER SUPPLY REEL
LOOP POSITION 4 LENSES LOOP POSITION 5 LENSES LOOP POSITION 6 LENSES LOOP POSITION 7 LENSES GUIDE PINS (2 PLACES) LOOP POSITION 8 LENSES
MAGNETIC HEAD
VACUUM COLUMN COVER LOOP POSITION 1 LENSES A1A1 TAPE LOOP POSITION SENSOR FIBER SURFACES
CROSSTALK SHIELD
LOW TAPE SENSOR LENSES
POLE FACES
TACHOMETER ROLLER TAPE BREAK SENSOR LENSES TAPE CLEANER
TAPE PATH LENS
LAMP HOLE WITH COMPRESSION SPRING
LOOP POSITION LENSES (16 PLACES) VACUUM COLUMN LENS LOCATIONS LENS FIBER SURFACE SERVICING MATERIAL REFERENCE ITEM PART NUMBER 15 7382 7382 22-00007-00 NSN 7045- -01115-7444 LENS CLEANING RUN TAPE ONTO SUPPLY REEL AND REMOVE FROM TRANSPORT UNLOCK SIX TURNLOCK FASTENERS AND LIFT VACUUM COLUMN COVER FROM TAPE DECK WIPE LENS SURFACES CLEAN WITH A PRE-SATURATED 90% ISOPROPYL ALCOHOL PAD CLEAN INNER SURFACES OF LENS WITHIN LAMP HOLD
TAPE CLEANER CLEANING
TAKE-UP REEL
LOW TAPE SENSOR LAMP TAPE BREAK SENSOR LAMP
WARNING
TO PREVENT CUT FINGERS AVOID SHARP EDGES ON TAPE CLEANER WHEN CLEANING.
SUPPLY AND TAKE UP REEL HUBS LOOP POSITION LAMP WIPE WITH A PRE-SATURATED 90% ISOPROPYL ALCOHOL PAD TEX WIPE 801
MP 5 TAPE DECK AIR FILTER REPLACEMENT REMOVE TWO SCREWS AND WASHERS REMOVE COVER REMOVE CLEANER ELEMENT, CLEAN WITH BRUSH AND VACUUM CLEANER, WIPE WITH A PRE-SATURATED 90% ISOPROPYL ALCOHOL PAD REINSTALL CLEANER ELEMENT CLEANER ELEMENT REMOVE SCREW AND LIFT OFF COVER REMOVE FILTER AND DISCARD REPLACE WITH NEW FILTER COVER COVER FILTER
CAUTION
FIRST ALIGN VACUUM COLUMN COVER WITH MOUNTING AT ROLLER END TO PREVENT DAMAGE TO ROLLER RUBBER SURFACE. COVER MUST BE TIGHTENED FROM BOTTOM TO TOP. TO INSTALL VACUUM COLUMN COVER ALIGN THE COVER ON VACUUM COLUMN AND START CENTER CAPTIVE STUD. REALIGN COVER USING BOTTOM COVER AND COLUMN. START REMAINING STUBS AND TIGHTEN THE TURNLOCK FASTENERS FROM THE BOTTOM OF THE COVER TO THE TOP
09A01001 017-4879 12-9A101
Figure 9A-10. MTT Servicing Procedures (Sheet 1 of 2)
9A-23
NAVAIR 01-75PAC-12
PNEUMATIC DIAGRAM
AIR FILTER CLEANING
B2 ELECTRONICS HOUSING COOLING FAN
AIR INLET FILTER A14MP6 A4 ELECTRONICS HOUSING LEGEND VACUUM EXHAUST AIR PRESSURIZING AIR
SUPPLY REEL DRIVE EXHAUST FILTER A14MP4
AIR INLET FILTER A14MP6
B3 TAPE DECK PRESSURE BLOWER
CAPSTAN SERVO AND ELECTRONICS HOUSING EXHAUST FILTER A14MP2
A5 CAPSTAN SERVO LOW LEVEL ELECTRONICS A6 CAPSTAN SERVO POWER AMPLIFIER
TAPE DECK AIR FILTER MP3
CAPSTAN DRIVE COOLING AIR A10 CAPSTAN DRIVE EXHAUST FILTER A14MP3
CAPSTAN DRIVE EXHAUST FILTER A14MP3 SUPPLY REEL DRIVE EXHAUST FILTER A14MP4
A2 SUPPLY REEL DRIVE
A10B1 CAPSTAN DRIVE COOLING FAN
POWER SUPPLY EXHAUST FILTER A14MP9
A2A2B1 SUPPLY REEL DRIVE COOLING FAN
A3 TAKE-UP REEL DRIVE A3A2B1 TAKE-UP REEL DRIVE COOLING FAN
SUPPLY TAPE CLEANER MP1
PIVOT CLAMP
TAKE-UP REEL DRIVE EXHAUST FILTER A14MP5
A9 POWER SUPPLY
CAPSTAN SERVO AND ELECTRONICS HOUSING EXHAUST FILTER A14MP2 TAKE-UP TAPE TAKE-UP REEL DRIVE EXHAUST FILTER A14MP5
POWER SUPPLY AIR INLET
POWER SUPPLY EXHAUST FILTER A14MP9 DUAL UNIT VACUUM BLOWER
CLEANER MP2
VACUUM COLUMN EXHAUST FILTER AIR INLET FILTER A14MP7 A14MP8
ALL AIR VACUUM COLUMN EXHAUST FILTER A14MP8 PRESSURE REGULATOR
VACUUM COLUMN A1MP1 AIR INLET FILTER A14MP7
MTT REAR
TAPE DECK
POWER SUPPLY AIR INLET CLEANING

REMOVE FLEXIBLE TUBING BETWEEN SUPPLY HOUSING AND DUAL BLOWER USE VACUUM CLEANER AND CLEAN HONEYCOMB LOCATED IN POWER SUPPLY HOUSING AIR INLET. A SMALL STIFFBRISTLED BRUSH MAY BE USED TO REMOVE PERSISTANT DIRT
INLET FILTERS
LOOSEN SLIDE FASTENERS AND LIFT FILTER FROM CASE USE A STIFF-BRISTLED BRUSH TO LOOSEN ACCUMULATED DIRT AND FOREIGN MATTER FROM FILTER SCREEN VACUUM CLEAN FILTER SCREEN AND REINSTALL
EXHAUST FILTERS
REMOVE RETAINING SCREWS FROM FILTER PLATE, AND LIFT FILTER FROM CASE WASH HONEYCOMB FILTER IN DETERGENT AND WARM WATER AIR DRY HONEYCOMB FILTER AND REINSTALL
BLOWERS
COOLING AND TAPE DECK BLOWER BLADES SHOULD BE CLEANED WHEN BLADES ACCUMULATE DIRT OR FOREIGN MATERIAL USE COTTON SWABS MOISTENED WITH FREON TF SOLVENT AND WIPE BLADES CLEAN
017-4880 12-9A102
9A-24
Figure 9A-10. MTT Servicing Procedures (Sheet 2 of 2)
NAVAIR 01-75PAC-12
9A-1. MTT LOADING PROCEDURE. This procedure permits loading of a system test tape or a scratch tape onto the MTT. FORWARD or REVERSE (one indicator is on, the other is off) POWER ON WRITE LOCKOUT LOW TAPE EOT TAPE BREAK DRIVE LOCKOUT AC POWER DC POWER VACUUM Takeup LOOP POSITION 1 through 8 Supply LOOP POSITION 1 through 8 STOP RESET (2) Indicators off: TAPE MOTION FORWARD or REVERSE (one indicator is on, the other is off) REWIND MTT SELECT ADDRESS NO. 1 ADDRESS NO. 2 READY LOAD POINT ON SPEED READ WRITE +15V POWER +13V POWER +5V POWER -10V POWER -3V POWER DOOR INTLK DOOR OVRD 3. Verify the following indicators are on or off as designated, at LU 2 POWER CONTROL panel: a. Indicators on: WRITE LOCKOUT b. Indicators off: LOAD POINT READY 4. Perform the following steps on MTT: a. Press and hold door interlock switch in. Verify that DOOR INTLK indicator comes on. Release door interlock switch and pull it out to override position. Verify that DOOR OVRD indicator comes on. m. n. o. k.
WARNING
The following steps c and d may result in supply and takeup reel hub motion if a component is malfunctioning. Exercise care while performing this test. c. Place thumb (or finger) in takeup light path between takeup tape break sensor housing A18 and tape cleaner A16. Verify that EOT/TAPE BREAK indicator remains on. Remove thumb (or finger) from light path. Place thumb (or finger) in supply reel light path between tape break sensor housing A17 and tape cleaner A15. Verify that EOT/TAPE BREAK indicator remains on. Remove thumb (or finger) from light path.
NOTE
D D 1. Verify that MTT has been cleaned prior to loading tape. Cycling LU 2 power may cause the MTT, with write permit ring installed, to write extraneous data on tape. Perform the following steps at LU 2 Maintenance Control Panel (MCP): a. b. c. d. e. f. g. h. i. j. 2. On the MCP set all toggle switches down (off). Rotate MODE SELECTOR knob to OFF LINE. Rotate CHANNEL knob to MTC. Press ENTER pushbutton switch, which is located between the MODE SELECTOR and the CHANNEL selector. Verify that MODE SELECTOR OFF LINE, and CHANNEL selector MTC indicators come on. Verify that CONTROL EFR switch-indicator comes on. Press the RESET MCP and CHAN pushbutton switches. Press CONTROL EF switch-indicator. Verify that CONTROL EFR and El indicators are on. There are 30 COMPUTER DATA INPUT indicators. Verify that 0 and 14 are the only ones that come on.
d.
WARNING
The following step causes both reel hubs to rotate. Exercise care and avoid making contact with reel hubs while performing this test. e. Simultaneously break takeup and supply light paths and verify that both takeup and supply hubs rotate. Also verify that EOT/TAPE BREAK indicator goes off. Remove fingers from light paths. Slowly turn supply tachometer roller A1A2 (in either direction) with finger and verify that supply SPEED COMP-Hl indicator comes on. Quickly spin supply tachometer roller (in either direction) with finger and verify that supply SPEED COMP-LO indicator comes on. Slowly turn takeup tachometer roller A1A3 (in either direction) with finger and verify that takeup SPEED COMP-Hl indicator comes on. Quickly spin the takeup tachometer roller (in either direction) with finger and verify that takeup SPEED COMP-LO indicator comes on. Release the door interlock switch to center (neutral). Verify that both DOOR INTLK and DOOR OVRD indicators are off. Rotate supply reel hub by hand in a clockwise direction and check that hub turns freely. Verify that supply DIR indicator comes on and that the TACH indicator blinks on and off. Rotate supply reel hub by hand in a counterclockwise direction and check that hub turns freely. Verify supply DIR is off and TACH indicator blinks on and off. Rotate takeup reel hub by hand in a clockwise direction and check that hub turns freely. Verify takeup DIR indicator comes on. Rotate takeup reel hub by hand in a counterclockwise direction and check that hub turns freely. Verify takeup DIR indicator goes off. Quickly spin the capstan A10 by hand in either direction, and verify that STOP RESET indicator goes off. Also verify that SUPPLY and TAKEUP SPEED COMP-Hl and COMP-LO indicators go off. Stop rotating capstan A10 and verify that STOP RESET indicator comes on.
f. g. h. i. j.
Perform the following steps at the MTT: a. Verify that MTT SELECT AND ADDRESS No. 1 and 2 indicators do not come on. If on, repeat steps 1.a. through 1.j.
NOTE
If the MTT SELECT AND ADDRESS No. 1 or 2 indicators come on at any time during tape loading, repeat steps 1.a. through j. If indicator(s) fail to go off, see MTT Servicing Procedures. b. c. d. Verify that MTT POWER ON-OFF switch, on the MTT control panel, is OFF. Open tape transport door and momentarily press door interlock switch button to verify that interlock is mechanically free. Set MTT POWER ON-OFF switch to ON and verify that following indicators are on or off as designated. All other indicators can be disregarded at this time. (1) Indicators on: STOP
l.
b.
p.
Figure 9A-11. MTT Tape Handling Procedure (Sheet 1 of 3)
9A-25
NAVAIR 01-75PAC-12
5. Load tape as described in the following steps: e. f. Return interlock to center. Rotate supply reel counterclockwise and check reel for any apparent wobble. Reposition reel if necessary to correct wobble. If wobble is still present, replace reel. Rotate takeup reel counterclockwise and check reel for any apparent wobble. Reposition reel if necessary to correct wobble. If wobble is still present, replace reel. Unwind approximately 5 feet of tape from supply reel, taking care that tape does not touch aircraft floor. w. t. Verify that DRIVE LOCKOUT indicator comes on, and DOOR INTLK, DOOR OVRD, and READY indicators are off. Rotate supply and takeup reels clockwise until takeup LOOP POSITION indicators 3 through 8, and supply LOOP POSITION indicators 7 and 8 come on. Release hold on supply and takeup reels and place door interlock switch to override. Verify that tape loops return to dead zone (supply and takeup LOOP POSITION indicators 1 through 4 are off, and 5 through 8 are on). Set door interlock switch to center and rotate both supply and takeup reels counterclockwise until supply LOOP POSITION indicators 3 through 8 and takeup LOOP POSITION indicators 7 and 8 come on. Release hold on supply and takeup reels and set door interlock switch to override and verify that tape loops reposition into the dead zone (supply and takeup LOOP POSITION indicators 1 through 4 are off, and 5 through 8 come on). Press FORWARD pushbutton switch and verify that FORWARD indicator comes on. Press REVERSE pushbutton switch and verify FORWARD indicator goes off and REVERSE indicator comes on. Press FORWARD pushbutton switch and verify REVERSE indicator goes off and FORWARD indicator comes on. At LU 2 POWER CONTROL panel, verify that the MTT ADDRESS A1 B2-A2 B1 switch is set for the MTT being loaded. On MTT control panel, press TAPE MOTION pushbutton switch. Verify TAPE MOTION indicator comes on and STOP indicator goes off. When tape reaches load point, TAPE MOTION indicator goes off, and LOAD POINT and STOP indicators come on. On LU 2 POWER CONTROL panel, verify MTT LOAD POINT and READY A or B indicators (corresponding to MTT being loaded) come on. On the MTT control panel, press TAPE MOTION pushbutton switch and wait about 15 seconds before proceeding. After 15 seconds, press STOP pushbutton switch and observe that the STOP indicator comes on. Press REVERSE pushbutton switch and observe that the REVERSE indicator comes on. Press TAPE MOTION pushbutton switch. After 5 seconds, press STOP switch and verify that the STOP indicator comes on. Press REWIND pushbutton switch, and verify REWlND and REVERSE indicators come on.
CAUTION
g. Power should not be removed during loading process. If power is lost or removed during tape loading procedure, tape should be manually rewound onto supply reel and loading procedure restarted again. Tape may be damaged if this caution is not observed.
u.
v.
h.
NOTE
D Handling of tape should be kept to a minimum. End portions of the tape which are not used for data (approximately 25 feet of tape at each end before the markers) may be handled. Use care to avoid having tape touch dusty or dirty surfaces. Dirt collected on the tape may cause permanent loss of data when stacked on the reel. A dirty tape may also contaminate tape transport. If a scratch tape is being installed, verify that a write permit ring is in the reel. Write permit ring is colored and can be observed by looking at side of reel center. If a system test tape is being installed, verify that a write permit ring is not in the reel. If the system test tape reel has a write permit ring, lift the colored tab and put the ring out of the reel. In the IBM format, the tape has a reflective marker at the load point and a reflective marker at the end-of-tape point. Both markers are 3/16 inch by 1 inch, and are positioned 1/32 inch from the edge of the tape. The end-of-tape reflective marker is located on the side of the tape closest to the MTT tape deck and the load point reflective marker on the tape farthest from the MTT tape deck. a. On supply reel hub, release locking lever and install scratch tape (with write permit ring installed) or system test tape squarely and firmly on hub and close locking lever. If a scratch tape is installed, verify that MTT WRITE LOCKOUT and LOW TAPE indicators are off. On LU 2 POWER CONTROL panel, verify that WRITE LOCKOUT indicator goes off. If a system test tape was installed, verify that MTT WRITE LOCK- OUT indicator comes on and the LOW TAPE indicator goes off. On LU 2 POWER CONTROL panel, verify that WRITE LOCKOUT indicator comes on. Pull the interlock out to override. With moderate pressure try to turn takeup and supply reels to check brake tension and reel hub tension. The reels should not rotate. If the reel rotates and the hub remains stationary, hub tension is incorrect. To increase hub tension, pull the locking lever out and rotate it clockwise until positive action is felt on the hub when the lever is closed. If both reel and hub rotate freely, the brake has failed and the transport should not be used. If both reel and hub rotate under moderate pressure, the hub is loose on the motor shaft and needs to be tightened prior to use.
WARNING
x. Use extreme care while working in area of reel holes to avoid the possibility of personal injury. i. Thread tape into MTT following path indicated on the MTT inside cover. Do not attempt to fill supply and takeup sides of vacuum column at this point. Wind tape leader onto takeup reel with no tape-end fold over until friction buildup enables the reel to be rotated without tape slipping on reel. Hold capstan drive with one hand to prevent rotation and slowly rotate the supply reel with other hand to introduce tape into vacuum column. Stop rotating supply reel when supply LOOP POSITION indicators 2 through 8 go off (indicator 1 comes on when indicator 8 goes off). ab. l. m. Pull tape out of vacuum column until supply LOOP POSITION indicator 8 comes on and indicator 1 goes off. Rotate capstan roller counterclockwise and supply reel clockwise to introduce tape into takeup vacuum column. Stop introducing tape when takeup LOOP POSITION indicators 2 through 8 go off (indicator 1 comes on when indicator 8 goes off). Pull tape out of vacuum column until takeup LOOP POSITION indicator 8 comes on and indicator 1 goes off. Slowly rotate supply and takeup reels to a tape position where supply and takeup LOOP POSITION indicators 1 through 4 are off and 5 through 8 are on (dead zone). Hold both reels in this position. Release hold on supply and takeup reels and set door interlock switch to override. Verify that DRIVE LOCKOUT indicator is off and VACUUM, DOOR OVRD, and READY indicators come on. Verify that supply and takeup reels are locked and do not rotate. Hold supply and takeup reels to prevent reel movement and operate door interlock switch to center. ai. y.
j.
z.
aa.
k.
ac.
b.
n. o.
ad.
ae.
c. d.
p. q. r. s.
af.
ag. ah.
9A-26
NAVAIR 01-75PAC-12
aj. ak. When TAPE MOTION stops, verify that the LOAD POINT and STOP indicators are on. Close MTT door.
9A-2. TAPE REMOVAL 1. At LU 2 MCP: a. b. c. d. e. f. g. 2. Verify MTT TEST ON-OFF toggle switch is OFF. Verify all CONTROL toggle switches are down (off). Rotate MODE SELECTOR to OFF LlNE. Rotate CHANNEL selector to MTC. Press ENTER pushbutton switch. Press RESET MCP and RESET CHAN pushbutton switches. Observe that the CONTROL EFR switch-indicator is on, then press EF switch-indicator. Observe that the CONTROL El switch-indicator is on after pressing the CONTROL EF switch-indicator.
At MTTs: a. b. c. d. e. Observe that MTT SELECT indicator is off. Observe that ADDRESS NO. 1 and NO. 2 indicators are off. If tape is moving, press STOP pushbutton switch. Press REVERSE and REWIND pushbutton switches; tape stops at load point. Press REVERSE and TAPE MOTION pushbutton switches; tape runs in reverse and stops when end of tape actuates end-of-tape sensing circuitry. Open door only when MTT SELECT indicator is off. Manually rewind remaining tape onto takeup reel. Remove supply reel.
f. g. h.
9A-27
NAVAIR 01-75PAC-12
9A-1. GENERAL. The following alignment/adjustment procedures are performed to improve MTT tape load reliability. Perform alignment/adjustment procedure as required based on the MTT tape load performance. 9A-2. AZIMUTH SKEW HEAD ALIGNMENT. 6. f. A TRIGGERlNG: (1) (2) Coupling to AC Source to EXT 9A-3. 9. Repeat step 7. Alternate FORWARD/REVERSE tape motion and adjust skew adjustment screw to balance allowable phase difference in the FORWARD and REVERSE modes of operation.
READ AMPLIFIERS ADJUSTMENT. 1. 2. Clean MTT tape path. Obtain a known good certified master head alignment tape (432642).
Perform the following test: a. On MTT, press FORWARD pushbutton switch and observe FORWARD indicator comes on and tape moves forward. Verify presence of signal at TP1 on each module. See MTT Read/ Write Signal Flow Diagram waveforms. Specific patterns to observe are Head Skew Normal Waveform A and Head Skew Normal Waveform B.
CAUTION
Read/write head skew and tape path alignment may be degraded by excessive tape oxide buildup on the head assembly and vacuum column tape contact surfaces. 1. 2. Clean MTT tape path. Obtain a known good certified master head alignment or skew tape (432641). D
b.
CAUTION
Master head alignment tape is extremely sensitive to horizontal stretching. Do not use rewind mode of MTT.
CAUTION
Arbitrary adjustments of components which affect tape path alignment should not be made. Tape path alignment is controlled by the vacuum column, capstan roller, tachometer rollers, head assembly, and tape reels. Replacement or removal of any of the above-mentioned components may necessitate adjustment of the tape path alignment. Loose rubber on the rollers may also result in improper alignment of the tape and must be corrected prior to any adjustments. Improper installation of the vacuum column cover may result in improper vacuum tension on the tape. Adjustments of the components affecting tape alignment should only be done after all other problem sources are investigated and corrected. Head assembly damage may occur if excessive adjustment is attempted to compensate for other causes previously described. Measure phase shift (time difference) between signal on track 1 and track C. If difference exceeds 5 microseconds, adjust azimuth skew as follows:
3. 4.
See MTT Tape Handling to load tape. Connect a dual trace TEK 453A oscilloscope or equivalent to MTT as follows: a. b. c. Connect 10:1 probe for channel 1 to TP1 of track 1 (module A4A1). Connect 10:1 probe for channel 2 to TP1 of track C (module A4A7). Connect test probe for external trigger to A4A1TP4.
CAUTION
Skew tape is extremely sensitive to horizontal stretching. Do not use rewind mode of MTT. 3. 4. See MTT Tape Handling to load tape. Connect a TEK 453A dual trace oscilloscope or equivalent to MTT as follows: a. b. c. 5. Connect 10:1 probe for channel 1 to TP1 of track 1 (module A4A1). Connect 10:1 probe for channel 2 to TP1 of track C (module A4A7). Connect test probe for external trigger to A4A1TP4. 7.
5.
Set up oscilloscope controls as follows: a. b. c. d. MODE TRlG to CH 1 or X-Y. MODE to ALT/CHOP. Probe coupling to AC (both channels). TlME/DIV set as follows: (1) (2) e. 50 sec for initial sync 5 sec for R7 adjustment
HORIZ DISPLAY to A A TRlGGERlNG: (1) Coupling to AC Source to EXT
CAUTION
Do not rotate the screw used for azimuth skew alignment more than 3/4 turn. Disengagement of the screw could occur, requiring head replacement. a. b. Adjust azimuth Allen head screw located just to the left of the read/write head for a phase difference of zero plus or minus 1 microsecond. Compare the phase shift of remaining tracks 2, 4, 8, A, and B to track 1. All tracks should be within the 1-microsecond value observed while adjusting tracks 1 and C. This check precludes possible misadjustment of skew such that tracks 1 and C are in phase and the other tracks are out of phase.
f.
Set up oscilloscope controls as follows: a. b. c. d. MODE TRlG to CH 1 or X-Y. MODE to ALT/CHOP. Probe coupling to AC (both channels). TlME/DlV set as follows: (1) (2) e. 50 sec for initial sync 5 sec for skew adjust 8.
(2) 6.
Perform the following test: a. b. On MTT, press FORWARD pushbutton switch and note FORWARD indicator comes on and tape moves forward. Verify presence of signal at TP1 on each module. See MTT Read/Write Signal Flow Diagram waveforms.
7.
HORlZ DlSPLAY to A
Select REVERSE tape motion.
Verify with the oscilloscope that the signal at TP1 of each of the data read/write amplifier modules (A4A1 thru A4A7) is from 8 to 8.5 volts peak to peak. If out of tolerance, adjust R7 (top potentiometer) until proper amplitude is obtained. Replace module if unable to adjust within limits.
9A-28
Figure 9A-12. MTT Alignment Procedures
NAVAIR 01-75PAC-12
Vacuum Column Unit
DESIGNATOR
A1
NOMENCLATURE
Vacuum Column Unit
FUNCTION
Provides Edge Guiding and Maintains Tape Loops in Tape Path Controls Action of Capstan & Reel Servos Photocell Sensors and Light Sources Provides a LowFriction Turnaround Point in the Tape Path, and provides Control Signals to the Supply Reel Servo Provides a LowFriction Turnaround Point in the Tape Path, and provides Control Signals to the Takeup Reel Servo Provides Edge Guiding and Maintains Tape Loops in Tape Path Drives the Supply Reel to Follow the Capstan in all Operational Modes A Heavy Duty Bidirectional Motor that Drives the Supply Reel Drives the Supply Reel Motor Provides the Write Inhibit, the Reel Direction, and the Tape Remaining Sensor functions Drives the Takeup Reel to Follow the Capstan in all Operational Modes

None
Takeup Reel Drive Unit (Cont)
DESIGNATOR
A3A1
NOMENCLATURE
Takeup Reel Drive Motor/Brake Assy Takeup Reel Drive Power Amplifier Assy Takeup Reel Motion Sensor Assy
FUNCTION
A Heavy Duty Bidirectional Motor that Drives the Takeup Reel Drives the Takeup Reel Motor Provides the Write Inhibit, the Reel Direction, and the Tape Remaining Sensor functions Provides Enclosure and Interconnections for the RD/WR CKTS and Control Plug-in Units Conditions 7 Read/ Write Signals Uses External and Internal Signals to Control the Data Write Sys Controls the Write Strobe, Write Power Write Reset, and Post Read Operations Maintains Control Over the Direction and Ready Logics Direction Logic Controlling Tape Movement Capstan Servo Amplifier and Reel Servo Logic Monitors Status of MTT and Generates Signals for Tape Opers when MTT Ready Accepts Signals from Tape Sensors and Gives Drive and Servo Brake Commands to Reel Servo Power Amplifier

A2A1
A1A1
Tape Loop Pos Sensor
None
A3A2
A2A2
A3A3 None
A2A3
A1A2
Supply Tachometer
Electronics Housing Unit None
A4
Electronics Housing Unit
None
A1A3
Takeup Tachometer
A4A1A4A7 A4A8
Data Read/Write Units Data Control Unit
All Units Identical & Interchangeable None
A1MP1
Vacuum Column Assy
None
A4A8A1
Data Control Logic
None
Supply Reel Drive Unit
A2
Supply Reel Drive Unit
A3
A4A9
Control Logic Unit Control Logic CKT Card Assy
None
A2A1
Supply Reel Drive Motor/ Brake Assy Supply Reel Drive Power Amplifier Assy Supply Reel Motion Sensor Assy
A3A1
A4A9A1
None
A2A2
A3A2
A4A9A2
Ready Logic CKT Card Assy
None
A2A3
A3A3 A4A10 Dual Reel Servo Logic Unit
None
Takeup Reel Drive Unit
A3
Takeup Reel Drive Unit
A2
Figure 9A-13. MTT Module Function and Interchangeability (Sheet 1 of 4)
9A-29
NAVAIR 01-75PAC-12
Electronics Housing Unit (Cont)
DESIGNATOR
A4A10A1
NOMENCLATURE
Supply Reel Servo Logic CKT Card Assy Takeup Reel Servo Logic CKT Card Assy Sensor Electronics Unit
FUNCTION
Performs Previous Function for the Supply Reel Performs Above Function for the Takeup Reel The Sensors Control Reel Servo Operation and Provide Tape Loop Pos Information Compares Tape Speed (Tachometer) with the Capstan Speed Signal Continuously Monitors Supply Tach Tone and Supply Reel Strobe Signals Ensure Proper Signal Values and Proper Functional Operation thru Circuitry and Logic Provide Interconnecting Circuitry Between the MTT and External Equip Couples Data Read Signals from Data Read Logic to the External Equipment Ensure Proper Signal Values and Functional Operation thru Intercon Circuitry and Logic Provides Interconnecting Circuitry Between the MTT and the External Equipment Provides Interconnecting Circuitry Between the MTT and External Equipment

None
Electronics Housing Unit (Cont)
DESIGNATOR
A4A14
NOMENCLATURE
Input Electronics Unit
FUNCTION
Ensure Proper Signal Values and Functional Operation Thru Intercon Circuitry and Logic In Normal Operation Couples the Diagnostic Tests with the External Equipment Provides Interconnecting Circuitry between the MTT and the External Equip Provides Electrical Interconnection for Read/Write Circuit Boards and the Control Sys Units Provides Servo Logic for Closed Loop Capstan Drive Determines if Capstan is at Correct Speed and Generates Servo Error Signals if Needed Conditions the Capstan Tone Signs for the Stop-Reset Generator Servo and Speed Computer Logic Provides the Power Switching and Logic Circuits for Capstan Motor Operation Supplies Conditioned Power from the Capstan Power Amplifier to the Capstan Motor Contains the Switching and Logic Circuits for Capstan Motor Operation Provides Control and Distribution of ac Input Power

None
A4A10A2
None A4A14A1 None Input Diagnostic Matrix Circuit Card Assy Input Interface A Circuit Card Assy
None
A4A11
A4A14A2 None
None
A4A11A1
Reel Speed Comparator Logic CKT Card Assy Tape Remaining Logic Circuit Card Assy Output Electronics Unit
A4A11A2
None
A4A15
Electronic Housing Circuit Card Assy
None
A4A12
None Capstan Servo Lo-Level Electronics None A5 Capstan Servo Lo-Level Electronics Unit Capstan Servo Detector Circuit Card Assy Capstan Servo Logic Circuit Card Assy
None
A4A12A1
Output Interface B Circuit Card Assy
A5A1
None
A4A12A2
Output Diagnostic Matrix Circuit Card
None
A5A2
None
A4A13
Input/Output Electronics Unit
None
Capstan Servo Power Amplifier
A6
Capstan Servo PWR Amplifier Unit
None
A4A13A1
Output Interface A Circuit Card Assy
None
A6A1
Power Components Assy
None
A6A2 None
A4A13A2
Input Interface B Circuit Card Assy
Capstan Servo Power Amplifier
None
Power Control Unit
A7
Power Control Unit
None
9A-30
NAVAIR 01-75PAC-12
Power Control Unit (Cont)
DESIGNATOR
A7A1
NOMENCLATURE
AC overvoltage/ undervoltage Sensor Circuit Card Assy
FUNCTION
Monitors ac Voltage Detects overvoltage/ undervoltage Conds and disconnects ac Power if overvoltage/ undervoltage Cond Monitors dc Supply Outputs, Detects overvoltage/undervoltage, and Shuts Down dc Power if overvoltage/ undervoltage Condition Monitors Outputs of Regulated dc Supplies and Generates CTRL Signal to Shutdown Supplies if undervoltage Monitors Outputs of Regulated dc Supplies Generates Trigger Signal if overvoltage occurs Chassis and Housing Assy for Power Control Unit Provides a Continuous Indication of the Functional Status of the MTT. Circuitry for MTT Local CTRCS and Indicators Power Control and Indicators and Elapsed Time Indicator Provides and Controls dc voltage for MTT Provides Positive/ Negative and 13 vdc Regulation and Filtering Provides Positive/ Negative Regulation Rectifies ac Input and Supplies Regulated +dc Voltage Outputs (+15V) Rectifies ac Input and Supplies Regulated -dc Voltage Output (-15V)

None
Power Supply Assy (Cont)
DESIGNATOR
A9A1A2
NOMENCLATURE
+13V Regulator Sub Assy +13V Regulator Circuit Card Assy
FUNCTION
Provides +13 vdc Regulation Rectifies ac Input and Supplies a Regulated +13 vdc Output Provides -3, 15, +5.25, and -10 vdc Regulation Provides Monitoring Test Points for all dc Voltages Provides Stepdown Voltage to Rectifier Circuits Provides Filtering for 13 and 5.25 vdc Power Outputs Provides ac Power to 13 vdc Regulator Drives the Mag Tape Past the Read/Write Head at a Controlled Speed. Provides Control Signals to the Capstan and Reel Servos from Tone Signal Gen Provides Cooling for Capstan Drive Unit Regulates Vacuum to Maintain Constant Tape Tension at all Altitudes Writes and Reads Data on Magnetic Tape Provides Local and Remote Indication when Tape Level is Depleted below Preset Minimum Provides Integral Preamplifier for the Low Tape Signal

None
A9A1A2A1
None
A7A2
DC overvoltage/ undervoltage Sensor Circuit Card Assy
None A9A2 Power Component Assy Power Supply Harness Housing Assy High Power XFMR
None
A9A3 None A9T1
None
A7A2A1
DC undervoltage Sensor Circuit Card Assy
None
A7A2A2
DC overvoltage Sensor Circuit Card Assy Chassis and Housing Assy Control Panel Unit
None
A9L1
Inductor Assy
None
A9T2 None Capstan Drive Unit None A10
+13 VDC XFMR Capstan Drive Unit
None None
A7A3
Control Panel Unit
A8
A10B1 None None Air Pressure Regulator Magnetic Head Assy None None Low Tape Sensor A13 A11
Capstan Motor Cooling Fan Air Press Regulator & Switch Assy
None None
Power Supply Assy
A9 A9A1
Power Supply Assy Capacitor and Regulator Assy
A12
A9A1A1 A9A1A1A1
Pos/Neg Voltage Regulator Positive Voltage Regulator Circuit Card Assy Neg Volt Regulator Circuit Card Assy
Record/PostRead Magnetic Head Unit Low Tape Sensor
None
None
A9A1A1A2
None
A13A1
Circuit Card Assy
None
9A-31
NAVAIR 01-75PAC-12
Low Tape Sensor (Cont) Rear Cover Assy
DESIGNATOR
A13A2
NOMENCLATURE
Circuit Card Assy
FUNCTION
Provides Logic for low Tape Warnings at the Control Panel Provides Housing for the EMI Filter and the Air Exhaust Filter for MTT Provides EMI Filtering for A7 Removes Foreign Particles from the Supply Tape Removes Foreign Particles from the Takeup Tape Provides Light Source for Supply Tape Break Sensor Provides Light Source for Supply Tape Break Sensor Supplies dc Power to the Reed Relay Provides Vacuum for the Vacuum Column and Cooling for A9 Power Supply Provides Cooling for A4, A5, and A6 Units Supplies Air Press to the Tape Path Area to Maintain Cleanliness

None
A14
Rear Cover Assy
None
A14A1 Supply Tape Cleaner Takeup Tape Cleaner Supply Tape Break Sensor Takeup Tape Break Sensor Reed Relay PWR Supply Dual Vacuum Blower Unit A15
EMl Filter Supply Tape Cleaner
None None
A16
Takeup Tape Cleaner Supply Tape Break Sensor Takeup Tape Break Sensor Reed Relay Power Supply Dual Vacuum Blower Unit
None
A17
None
A18
None
A19 B1
None None
Electronics HSG Cooling Fan Tape Deck Press Blower
B2
Electronics HSG Cooling Fan Tape Deck Pressure Blower
None
B3
None
9A-32
SECTION 9B
RD-319A MAGNETIC TAPE TRANSPORT
THIS SECTION CONTAINS DATA APPLICABLE TO AIRCRAFT BUNO 158928 AND 159503 THROUGH 161131 NOT INCORPORATING AFC 506 OR AFC 607
SECTION 9B RD-319A MAGNETIC TAPE TRANSPORT
NAVAIR 01-75PAC-12
(RACK D2) MX-8024( )/AYA-8 DATA ANALYSIS LOGIC UNIT (LU 2) (SEE SECTION 6) CONTAINS INTERFACE LOGIC AND BUFFER FOR MANUAL OR COMPUTER CONTROL OF MTT (RACK D2) CP-901( )/ASQ-114(V) DIGITAL DATA COMPUTER (SEE SECTION 4) A1J74 COMPUTER INPUT CHANNEL 10 DATA AND CONTROL A1J86 COMPUTER OUTPUT CONTROL (CHANNEL 9, 10, 11) A1J82 COMPUTER GROUP 02 OUTPUT DATA CHANNEL 08 CONTROL 2J1 2J2 MAINTENANCE CONTROL PANEL PROVIDES MANUAL CONTROL BETWEEN COMPUTER AND OPERATIONAL SUB-UNITS 2J5 MAGNETIC TAPE CONTROL PROVIDES LOGIC FOR COMPUTER CONTROL OF MAGNETIC TAPE TRANSPORT 2J10 DATA TRACK A, B, C DATA TRACK 1, 2, 4, 8 READY STROBE READY MTT SELECT ACKNOWLEDGE MTT REWINDING ACKNOWLEDGE LOAD POINT END OF TAPE (EOT) LOW TAPE WARNING WRITE LOCKOUT TAPE REMAING 2J11 DATA TRACK A, B, C DATA TRACK 1, 2, 4, 8 WRITE STROBE WRITE RESET FORWARD REVERSE REWIND WRITE
29 28 27 L O G I C U N I T 2 29 28 26 25 24 23 22 21
(RACK D3) 8J2 RD-319A/AYA-8 MAGNETIC TAPE TANSPORT 7 CHANNEL DIGITAL READ AND WRITE TAPE TRANSPORT WITH DIAGNOSTIC SYSTEM (TACCO STATION) A324 TACCO POWER CONTROL
POWER CONTROL
COMPUTER RUN START STOP BOOT STRAP MANUAL OV TEMP POWER ON
AUTO RECY
8J1
OV TEMP 1
OFF OV TEMP 3
OFF TACO MPD
OFF SS3 MPD
OFF ARO
OFF PILOT DIS
1J1
OFF OFF OFF OFF
CONTROL
MTT SELECT
20 19 18 17 16 15 14 13 12 11
10 9 8 7 6 5 27 26 8 7 4 3 25 24 6 5 2 1 23 22 4 3 0 27 26 21 20 2 1 25 24 19 18 0 36 21 20 17 16 3534 19 18 33 15 14 4140 32 17 8 13 12 39 31 7 6 4645 38 37 11 10 9 5 4 ON 44 42 5150 43 8 7 49 47 3 2 5655 48 6 5 1 0 OFF 54 5352 4 3 2 1 0 B A
MASTER CLEAR ADDRESS 1 AND 2 DENSITY - 800, 556, 200 BPI DTE 1-5 INPUT INTERLOCK (RACK D1) DPS ELECTRONIC CIRCUIT BREAKER PANEL MAG TAPE A A B C
(RACK D1) 8J3 115 VAC 3 NEUTRAL GROUND CHAS AC 2J7 A383 POWER DISTRIBUTION BOX 2J8
J2
J1
2J9 115 VAC 3
J3 J4 J5 J6 J7
Figure 9B-1. MTT Signal Flow Diagram
9B-1
NAVAIR 01-75PAC-12
(RACK D3) MAGNETIC TAPE TRANSPORT A7 POWER CONTROL ASSY A14 REAR COVER ASSY 8J3 FROM POWER DISTRIBUTION BOX 115 VAC A 115 VAC B 115 VAC C AC A B C D A14A1 EMI FILTER L1 L2 L3 L4 W3P15 A1 A2 A3 A4 W3P9/J1 115 VAC A 115 VAC B 115 VAC C NEUTRAL A1 A2 A3 A4 W3P8/J3 5 A8 CONTROL PANEL POWER ON S6 40 41 A7T1 OFF POWER INTERLOCK RELAY DRIVE A1 A2 A3 A4 A5 26 VAC A6 W3P8 11 4 AC VOLTAGE DIVIDER VR1 6.8 V DC 28 VDC 5 VDC SENSOR POWER TP1 5 (1) VDC A8 CONTROL PANEL A7A1 AC OVER VOLTAGE J4 UNDERVOLTAGE 8 SENSOR 15 1 THE AC OVERVOLTAGE AND UNDERVOLTAGE 2 SENSORS MONITOR THE 36 28 VDC SENSOR POWER AND PROVIDE A 17 SHUTDOWN SIGNAL TO DISCONNECT AC INPUT 20 POWER IF SENSOR 7 VOLTAGE EXCEEDS OR 37 FALLS BELOW PREDETERMINED LIMITS. 19 13 11 9 16 14 J4 3 22 23 24 25 29 21 20 DC POWER DRIVE INDICATOR +15 VDC FAULT INDICATOR DRIVE 13 VDC FAULT INDICATOR DRIVE 5.25 VDC FAULT INDICATOR DRIVE AC POWER INDICATOR DRIVE DC COMMON 5 VDC SENSOR POWER DS43 61 14 9 13 8 71 60 DS56 DS21 DS22 DS19 DS20 DC +15 +13 +5 AC POWER ON 28 (4) VDC TP2 3 115 VAC A 115 VAC B 115 VAC C 115 VAC A 115 VAC B 115 VAC C 115 VAC A 115 VAC B 115 VAC C B2 ELECTRONIC HOUSING COOLING FAN 13 A7K1 AC AC
6 3 4 5
A17 ELASPED TIME METER ASSY TOTAL TAPE TIME TIME W3P9 4 3 DC 1 2 5 DC A7K2 OV/UV CONTROL RELAY W3P10 3 4 7 115 VAC A 115 VAC B 115 VAC C W3P11 2 10 3 T4 T3 T1 115 VAC A 115 VAC B 115 VAC C A3A2 TAKE UP REEL COOLING FAN B3 TAPE DECK PRESSURE BLOWER NEUTRAL 115 VAC C W3J10 8 9 M1 ELECTRONIC SW M2
W3P6 2 10 3
A2A2 SUPPLY REEL COOLING FAN
SHEET 2
W3P14 1 3 5
B1 VACUUM/ BLOWER
A7A2 DC OVER AND UNDER VOLTAGE SENSOR
J6 1 12 11
28 VDC SENSOR POWER 13 VDC FAULT LOGIC DRIVE 5.25 VDC FAULT LOGIC DRIVE -15 VDC FAULT LOGIC DRIVE -10 VDC FAULT LOGIC DRIVE - VDC FAULT LOGIC DRIVE -3 +15 VDC FAULT LOGIC DRIVE 5 VDC SENSOR POWER - VDC (J3-3 -17) -10 VDC (J3-18) 13 VDC (J3-16) 13 VDC (J3-16) -10 VDC (J3-18) - VDC (J3-3 -17) 13 VDC SCR CROWBAR GATE (J3-19) DC POWER COMMON DC
CROWBAR SCR GATE
-15 VDC CROWBAR GATE 5.25 VDC CROWBAR GATE +15 VDC CROWBAR GATE 5.25 VDC +15 VDC -15 VDC
J5 15 13 14 2 3 4 J6 2 5 6 MONITORS THE OUTPUTS OF THE REGULATED DC SUPPLIES AND GENERATES A CONTROL SIGNAL IF AN OVER OR UNDER VOLTAGE CONDITION OCCURS.
13 25 24 10 9 3 4 7 J5 1 5 6 12 8
DC
(J5- + (J6-1) -7) (J5- + (J6-6) -3) (J5- + (J6-5) -4) (J5-12) +15 V TP3 -15 V 5.25 V
16 17 18 19 A1 A3 A2
(W3P13-16) 13V (W3P13-11) -3V (W3P12-14) -10V (W3P12- 13V -2) (W3P12-A6) +15V (W3P12-A7) -15V (W3P13-A1) 5.25V
-15 VDC 5.25 VDC +15 VDC
SHEET 2
9B-2
Figure 9B-2. MTT Primary Power Distribution Functional Signal Flow Diagram (Sheet 1 of 2)
NAVAIR 01-75PAC-12
(RACK D3) MAGNETIC TAPE TRANSPORT (CONT)
W4P2 4 3 W3P12 A1 A9 POWER SUPPLY ASSY W4P1 24 25 26 27 115 VAC A 115 VAC B 115 VAC C SHIELD 2 1
A16 15 VDC POWER SUPPLY W4P2 5 TP5 6 -15 (1) VDC TP1 +15 (1) VDC - (1) VDC -3 -10 (1) VDC TP2 TP4 TP3 7 8 9 10 11 12 13 14
W4P1 POWER RETURN (SENSE) -15 VDC (SENSE) +15 VDC (SENSE) - VDC (SENSE) -3 -10 VDC (SENSE) POWER RETURN POWER RETURN -15 VDC -15 VDC +15 VDC +15 VDC 5 6 7 8 9 10 11 12 13 14 15
A9 13 VDC POWER SUPPLY TP2
W3P13 A7 A2 A5 A4 A3 A6 A1 16 11 10 9 17 12 2 W3P12 2 7 8 A6 A7 12 13 14 11 17 A4 A5 10 16 1 9 6 15 AC DC DC SHEET 1 AC CAPSTAN DRIVE RETURN 13 V CAPSTAN DRIVE SUPPLY REEL RETURN 13 V SUPPLY REEL TAKEUP REEL RETURN 13 V TAKEUP REEL 5.25 V (W3P2-A2) 13 V (W3P8-16) - V (W3P8-3 -17) - V A4A11 -3 REEL SPEED COMPARATOR
A
SHEET 1
A2 A3
13 (1) VDC TP1
8 9 10 11 AC
115 VAC C 115 VAC B 115 VAC A SHIELD W4P3 2 3 4 1 A15 +5.25 VDC POWER SUPPLY TP1 +5.25 (1) VDC TP2
15
W4P3 5 6 7 8 9 10 11 5.25 VDC POWER SHIELD POWER RETURN (SENSE) 5.25 VDC (SENSE) POWER RETURN POWER RETURN 5.25 VDC 5.25 VDC 5 6 7 8 9 10 11
SCR CROWBAR GATE (W3P8-19) POWER RETURN 5.25 VDC E3 BUS +15 V E2 BUS (W3P8-A1) -15 V E1 BUS (W3P8-A3) -10 V A4A1A2-25, 24 -10 V A4A1A2-28, 29 -10 V (W3P8-18) +15 VDC E2 BUS -15 VDC E1 BUS
Figure 9B-2. MTT Primary Power Distribution Functional Signal Flow Diagram (Sheet 2 of 2)
9B-3
NAVAIR 01-75PAC-12
(RACK D3) MAGNETIC TAPE TRANSPORT A4 ELECTRONIC HOUSING ASSEMBLY (RACK D1) LU2 2J13 13 3 1 54 DATA TRACK 2 DATA TRACK A DATA TRACK C 556 BPI CMD 8J1 3 12 20 65 A4J21 7 13 18 38 A4A13 A4J21 INPUT/OUTPUT ELECTRONIC UNIT DATA TRACK 2 DATA TRACK A DATA TRACK C 556 BPI CMD DTE 2 DTE 1 A4A14 INPUT ELECTRONIC UNIT A4J22 28 8A 6A 10A LOAD POINT AND ON SPEED TEST (DTA 2-2) SUPPLY LOOP FAULT TEST (DTA 1-7) TAPE BREAK TEST (DTA 1-5) TAKEUP LOOP FAULT TEST (DTA 1-7) A4J28 31 5 4 6 A B C D
A4A13A2 INPUT INTERFACE B A4J21 38 20 41 14 43 10 45 1
A4J22 A4A14A1 INPUT DIAGNOSTIC 36 MATRIX 39 41 43B 47B 47B
27
A4A14 A4J24 31 19 29 37 REWIND FORWARD REVERSE MTT SELECT INPUT INTERLOCK 46 50 48 35 80 81 DC 7 3 5 1 46
INPUT ELECTRONIC UNIT A4A9 CONTROL LOGIC UNIT A4J23 1 5 7 6 MTT SELECT REWIND (REMOTE) FORWARD (REMOTE) REVERSE (REMOTE) A4J12 A4A9A1 TRANSPORT LOGIC 14 CONTROLS TAPE 28 DRIVE DIRECTION 45 29 A4J12 46 30 FORWARD CONDITION REVERSE CONDITION MTT SELECT (DTE 1) DTE 2 48 49 1 27 50 E F G H J
A4J23 A4A14A2 INPUT INTERFACE A 21 33 31 35 47
A4A12 OUTPUT ELECTRONIC UNIT A4J23 A4A12A2 INPUT DIAGNOSTIC MODULE 35 47 70 TEST ENABLE (DTE 3) 73 40 50A A4J23 48 DTE 3
A4A14
INPUT ELECTRONIC UNIT A4J22 8B 10B 11B 7B 6B DOOR INTERLOCK TEST (DTA 1-8) VACUUM TEST (DTA 1-10) READY TEST (DTA 2-10) DOOR INTERLOCK TEST (DTA 2-6) DOOR OVERRIDE TEST (DTA 1-6) READY RESET (DTA 2-8) TEST MODE DRIVE LOCKOUT K L M N P Q R S
A4J22 A4A14A1 INPUT DAIGNOSTIC 50B MATRIX 48B 47B 50B 46B
A4A13 A4J25 56 52 2 200 BPI CMD 800 BPI CMD DATA TRACK B 58 67 18 36 40 15 A4J24 67 69 71 73 TEST ENABLE (DTE 1) TEST ENABLE (DTE 2) TEST ENABLE (DTE 4) TEST ENABLE (DTE 5) 69 71 75 77 36 38 42 44
INPUT/OUTPUT ELECTRONIC UNIT A4J21 46 44 42 50A 49A 50B 49B
A4J21 A4A13A2 INPUT INTERFACE B 48 30 20 PROVIDES LOGIC CIRCUITS WHICH ENSURE THAT A FUNCTION WILL NOT OCCUR UNLESS A PROPER 34B CONDITION EXISTS 36A 34A 36B
200 BPI CMD 800 BPI CMD DATA TRACK B MTT SELECT (DTE 1) DTE 2 DTE 4 DTE 5
44B 42B 40
9B 33
9B-4
Figure 9B-3. MTT Tape Control Function Signal Flow Diagram (Sheet 1 of 4)
NAVAIR 01-75PAC-12
A1 VACUUM COLUMN UNIT A1A3 TAKE UP REEL TACHOMETER CAPSTAN
A1A2 SUPPLY REEL TACHOMETER
(RACK D3) MTT (CONT) LOAD POINT AND ON SPEED TEST (DTA 2-2) SUPPLY LOOP FAULT TEST (DTA 1-7) A B C D MTT SELECT (DTE 1) DTE 2 TAPE BREAK TEST (DTA 1-5) TAKEUP LOOP FAULT TEST (DTA 1-7) FORWARD CONDITION REVERSE CONDITION LIGHT SOURCE W3J13/P2 2 19 W3J12/P1 24 7 6 25 W3J13/P2 23 24 W3J12/P1 3
LOAD POINT REFLECTIVE MARKER ATTACHED TO TAPE
EOT REFLECTIVE MARKER ATTACHED TO TAPE
P/O A1A2 TAPE BREAK SENSOR
A1A1 TAPE LOOP POSITION SENSOR
P/O A1A2 LOAD POINT EOT SUPPLY SUPPLY BREAK SENSOR SENSOR W3J12/ P1 1 4 36 2 28 1 26 3 5 2 4 W3J13/P2 5 6 7 8 34 27 3 18 4 TAPE BREAK SENSOR
TAKEUP BREAK TAKEUP SENSOR SENSORS 1 2 3 4
DS1 DS2 DS3 DS4
LIGHT SOURCE EOT SENSOR SUPPLY LOOP SENSOR NO. 7 SUPPLY LOOP SENSOR NO. 2 EOT/TAPE BREAK SENSOR SUPPLY LOOP FAULT SENSOR TAPE BREAK SENSOR EOT/TAPE BREAK IND DRIVE
SHEET 4
5 6 7 8
LIGHT PATH
DS5 DS6 DS7 DS8
LIGHT PATH
TAKEUP LOOP SENSOR NO. 2 TAKEUP LOOP SENSOR NO. 7 LOAD POINT SENSOR TAKEUP LOOP FAULT SENSOR LOAD POINT IND DRIVE
E F G H J
THE END-OF-TAPE, TAPE BREAK TAPE-FAULT LOGIC MONITORS THE MAGNETIC TAPE AND GENERATES CONTROL SIGNALS TO STOP MOVEMENT WHEN END-OF-TAPE IS REACHED, A BREAK IS DETECTED OR A FAULT OCCURS DURING OPERATION
K L M N P Q R S DOOR INTERLOCK TEST (DTA 1-8) VACUUM TEST (DTA 1-10) READY TEST (DTA 2-10) DOOR INTERLOCK TEST (DTA 2-6) DOOR OVERRIDE TEST (DTA 1-6) READY RESET (DTA 2-8) TEST MODE DRIVE LOCKOUT A4A9 CONTROL UNIT LOGIC A4J13 A4J13 A4A9A2 READY SERVO LOGIC 46 31 37 30 29 34 33 32 44 RESETS TAPE LOOP POSITION SENSORS 41 40 36 39 38 35
READY RESET DRIVE LOCKOUT TEST (DTRB 1-5) STOP TEST (DTRB 1-1) LOOP FAULT TEST (DTRB 1-4) READY RESET TEST (DTRB 1-6) DOOR TEST (DTRB 1-3) POWER FAILURE BREAK RELEASE (DTRB 1-2) READY (DTRB (1-7) DTE 1
A4A12 OUTPUT ELECTRONIC UNIT A4J19 A4A12A2 OUTPUT DIAGNOSTIC A4J19 UNIT 7A 44 11A 8A 6A 9A 10A 5A 50 43 42 41 40 39 38 DATA TRACK 1 DATA TRACK 2 DATA TRACK 4 DATA TRACK 8 DATA TRACK A DATA TRACK B DATA TRACK C SEE DATA READ SIGNAL FLOW DIAGRAM FOR CIRCUIT CONTINUATION
SHEET 3
9B-5
NAVAIR 01-75PAC-12
(RACK D3) MTT (CONT) A4 ELECTRONIC HOUSING ASSY A7 POWER CONTROL ASSY A7A1 AC OVER/UNDER VOLTAGE SENSOR 6 A7J3/W3P8 32 POWER INTERLOCK A4A9 CONTROL LOGIC ASSY A4J27 65 A4J13 A4A9A2 READY LOGIC 3 THE READY LOGIC MONITORS THE 2 STATUS OF THE MTT AND GENERATES CONTROL SIGNALS TO ENABLE TAPE OPERATION WHEN MTT IS IN READY CONDITION. THE READY 19 LOGIC MONITORS VACUUM, POSITION OF DOOR, THE TAPE BREAK SENSOR, 18 THE POWER INTERLOCK AND TAPE LOOP POSITION SENSORS. WHEN ALL INPUTS ARE IN A READINESS 8 CONDITION, THE READY LOGIC 43 GENERATES THE READY AND READY RESET SIGNALS, AND REMOVES THE 5 DRIVE LOCKOUT AND POWER 6 FAILURE BRAKE RELEASE SIGNALS. 9 THE READY SIGNAL ENABLES THE 7 TRANSPORT AND DATA CONTROL 1 LOGIC. A4J13 28 13 16 15 10 12 14 11 READY ACK VACUUM IND DRIVE DOOR OVRD IND DRIVE DOOR INTLK IND DRIVE DRIVE LOCKOUT IND DRIVE READY IND DRIVE POWER FAIL BK RELEASE DRIVE LOCKOUT
A11 AIR PRESSURE SWITCH ASSY VACUUM SWITCH
A4A10 REEL SERVO LOGIC W3J16 2 1 W3J4 5 MTT SELECT/DTE-1 DC 11 13 9 10 DOOR CLOSED DOOR OVERRIDE LOW TAPE SENSOR LOW TAPE IND DRIVE 62 63 86 TAKEUP LOOP FAULT SENSOR SUPPLY LOOP FAULT SENSOR TAPE BREAK SENSOR DTE-2 VACUUM 64 A4A10A1 SUPPLY REEL SERVO LOGIC A4J14 43 A4J15 A4A10A2 TAKEUP REEL SERVO LOGIC 8 SUPPLY LOOP FAULT RESET TAKEUP LOOP FAULT RESET
A13 LOW TAPE SENSOR DOOR OVERRIDE LIGHT SOURCE LIGHT PATH DOOR CLOSED
A8 CONTROL PANEL FORWARD REVERSE REWIND STOP
W3J9 45 44 43 47 DC SUPPLY LOOP SENSOR NO. 7 SUPPLY LOOP SENSOR NO. 2 TAKEUP LOOP SENSOR NO. 7 TAKEUP LOOP SENSOR NO. 2 EOT/TAPE BREAK SENSOR EOT SENSOR LOAD POINT SENSOR TAKEUP LOOP FAULT SENSOR SUPPLY LOOP FAULT SENSOR SHEET 4 13 8 38 33 83 82 84 32 7 66 READY (DTRB 1-7) READY RESET 59 60 61 57 FORWARD (LOCAL) REVERSE (LOCAL) REWIND (LOCAL) STOP (LOCAL)
A4J12 A4J12 A4A9A1 TRANSPORT CONTROL LOGIC 49B 34 50A 49A 35 THE TRANSPORT CONTROL LOGIC GENERATES THE FORWARD AND 50B REVERSE COMMANDS 33 47A CONTROLLING THE CAPSTAN 46A SERVO POWER AMPLIFIER AND 32 40 REEL SERVO LOGIC DETERMINING DIRECTION OF TAPE MOTION. 21 FORWARD AND REVERSE 43 COMMANDS CAN BE INITIATED 37 5 EITHER LOCALLY OR REMOTE 44 WHEN MTT SELECT LINE IS 2 38 ACTIVATED. 3 30 6 16 36 8 41 10 43 11 42 7 39 13 15
STOP FROM REVERSE DIR CAPSTAN FORWARD TEST CAPSTAN REVERSE TEST STOP FROM FORWARD DIR FORWARD TEST REVERSE TEST STOP CONDITION FORWARD CONDITION READY RESET MTT SELECT ACK REWIND DRIVE MODE ENABLE REVERSE REWIND ENABLE STOP IND DRIVE FORWARD IND DRIVE REVERSE IND DRIVE TAPE MOTION IND DRIVE REWIND MODE ENABLE MTT SELECT IND DRIVE REWIND IND DRIVE
TAPE BREAK SENSOR
SHEET 2
A B
9B-6
NAVAIR 01-75PAC-12
MTT (CONT) A4 ELECTRONIC HOUSING ASSY (CONT) A4A8 DATA CONTROL UNIT STOP CONDITION FORWARD CONDITION READY RESET MTT SELECT ACK READY ACK A4J17 A4A8A2 DATA CONTROL 17 SEE DATA WRITE 6 SIGNAL FLOW DIAGRAM 8 FOR CIRCUIT CONTINUATION 14 10 MITT SELECT IND DRIVE VACUUM IND DRIVE DOOR OVRD IND DRIVE DOOR INTLK IND DRIVE DRIVE LOCKOUT IND DRIVE READY IND DRIVE SEE SUPPLY REEL/TAKEUP REEL FUNCTIONAL SIGNAL FLOW DIAGRAM FOR CIRCUIT CONTINUATION FORWARD IND DRIVE REVERSE IND DRIVE TAPE MOTION IND DRIVE STOP IND DRIVE REWIND IND DRIVE A4J28 16 36 38 37 22 19 13 14 12 11 15 LOAD POINT IND DRIVE A4A12 OUTPUT ELECTRONICS UNIT EOT/TAPE BREAK SENSOR DTE 2 DTE 3 DTE 4 DTE 5 STOP FROM REVERSE DIR CAPSTAN FORWARD TEST CAPSTAN REVERSE TEST STOP FROM FORWARD DIR FORWARD TEST REVERSE TEST STOP CONDITION A4J19 A4A12A2 OUTPUT 19B DIAGNOSTIC MATRIX 49 46 28 47 118 38 5B 10B 17A 19A 2B DIAGNOSTIC LOGIC PERMITS RAPID COMPUTER TESTING AND FAULT ISOLATION WITHIN MTT. FIVE SEPARATE TEST SEQUENCES CAN BE USED. PWR FAIL BK RELEASE DRIVE LOCKOUT 91 92 EOT/TAPE BREAK IND DRIVE LOW TAPE IND DRIVE W3J9 72 7 33 34 10 20 63 65 64 68 70 19 15 11 LOAD RUN SHEET 3 SHEET 2 A9 CONTROL PANEL
5.25 VDC MTT SELECT VACUUM DOOR OVRD DOOR INTLK DRIVE LOCKOUT READY FORWARD REVERSE TAPE MOTION STOP REWIND LOAD POINT EOT/TAPE BREAK LOW TAPE LOAD 1
A4A10 REEL SERVO LOGIC FORWARD CONDITION DRIVE MODE ENABLE REVERSE REWIND ENABLE A4J14 A4A10A1 38 SUPPLY 36 REEL 37 SERVO LOGIC 39 A4J15 A4A10A2 15 TAKEUP 14 REEL 13 SERVO LOGIC 12
DRIVE MODE ENABLE FORWARD CONDITION REVERSE REWIND ENABLE
NOTE
WRITE LOCKOUT GENERATED BY A6 WHEN WRITE PERMIT RING NOT INSTALLED
DC
C B
TAPE BREAK SENSOR TAPE BREAK SENSOR A2 SUPPLY REEL DRIVE ASSY P6 A2A2 5 SUPPLY 8 REEL SERVO AMP
52 3
PWR FAIL BK RELEASE DRIVE LOCKOUT
A4A13 INPUT/OUTPUT ELECTRONIC ASSY 1 WRITE LOCKOUT A4J20 A4A13A1 OUTPUT 11 INTERFACE B 7 5 8 9 10 6 46 50 44 38 42 40 48
PWR FAIL BK RELEASE DRIVE LOCKOUT
67 68
PWR FAIL BK RELEASE DRIVE LOCKOUT A5 CAPSTAN SERVO ASSY J6 DIRECTION 8 LOGIC J8 16 COMMAND LOGIC 34
A3 TAKEUP REEL DRIVE ASSY P11 A3A2 5 TAKEUP REEL 8 DRIVE POWER AMP
READY ACK MTT SELECT ACK REWIND EOT SENSOR LOAD POINT SENSOR LOW TAPE SENSOR
DRIVE LOCKOUT DRIVE MODE ENABLE REWIND MODE ENABLE
43 41 42 A4J26
(RACK D1) 8J2 25 27 29 44 39 32 40 READY MTT SELECT ACK MTT REWIND ACK WRITE INHIBIT END OF TAPE LOAD POINT LOW TAPE WARNING 2J10 27 29 31 44 42 40 43 LU2
READY MTT SELECT ACK MTT REWIND ACK WRITE INHIBIT END OF TAPE LOAD POINT LOW TAPE WARNING
36 38 40 48 44 42 46
A B 017-1459
9B-7
NAVAIR 01-75PAC-12
(RACK D3) MAGNETIC TAPE TRANSPORT (MTT)
A4
ELECTRONIC HOUSING ASSY
(RACK D1) LU2 2J11 19 27 HI LO FORWARD 8J1 50 51 R4J24 3
A4A14
ELECTRONIC HOUSING ASSY A4J21 33 7 A4J21 FORWARD COMMAND (REMOTE)
A4A9 A4J12 45
CONTROL LOGIC UNIT A4J12 38 DRIVE MODE ENABLE REWIND MODE ENABLE CAPSTAN FORWARD COMMAND CAPSTAN REVERSE COMMAND A4J28 41 A
29 39
HI LO
REVERSE
48 49
31
PROVIDES INTERFACE BETWEEN EXTERNAL EQUIPMENT AND THE MTT
REVERSE COMMAND (REMOTE)
29
TRANSPORT CONTROL LOGIC
39
42
39
31 41
HI LO
REWIND
46 47
21 A4J22 DTE-4 458
5 A4J22 33
REWIND COMMAND (REMOTE) TEST MODE DRIVE LOCKOUT
28
12
40
BUFFER/AMPLIFIER LOGIC CIRCUITS
31 32 33 34 35 1 E A4J13 11 READY LOGIC DRIVE-LOCKOUT COMMAND F
DC
A4A13
INPUT/OUTPUT ELECTRONIC UNIT A4J23 LOGIC CIRCUITS WHICH ENSURE THAT A FUNCTION WILL NOT OCCUR UNLESS PROPER CONDITIONS EXIST
68
71 79
HI LO
TEST ENABLE 4
75 76
42 43 MTT SELECT (SEE TAPE CONTROL SIGNAL FLOW DIAGRAM)
34A 33A 1
A4J23 508
TEST MODE DRIVE LOCKOUT STOP RESET
7 A4J27 90 G
A8
CONTROL PANEL ASSY TAPE MOTION STOP REWIND FORWARD
W3J9 46 47 43 45 44 TAPE MOTION COMMAND LOCAL STOP COMMAND LOCAL REWIND COMMAND LOCAL FORWARD COMMAND LOCAL REVERSE COMMAND LOCAL
A4J27 58 57 61 59 60
W3J9 42 DC REVERSE
017-1460
9B-8
Figure 9B-4. MTT Capstan Servo Functional Signal Flow Diagram (Sheet 1 of 2)
NAVAIR 01-75PAC-12
(RACK D3) MTT (CONT) A8 A5 CAPSTAN SERVO ELECTRONIC UNIT CONTROL PANEL ASSY ON SPEED +5 V STOP RESET 18 W3J8 A 16 34 W3J6 C 7 TP2 D 6 DIRECTION LOGIC POWER AMPLIFIER MOTOR Q1 TP1 W3J6 14 FORWARD DRIVE W3P7 A1 W3P7 4 SERVO DRIVER STOP RESET INDICATOR DRIVE 54
TP5
W3J8 36 ON SPEED INDICATOR DRIVE
W3J9 18
A10
CAPSTAN DRIVE MOTOR ASSY TONE WHEEL
12
REVERSE DRIVE
A2
COMMAND LOGIC E F 8 9 TP6 W3J8 27 PULSE WIDTH DISCRIMINATOR W3J8 G 4 5
CAPSTAN TONE SIGNAL
A4
A4J27 CAPSTAN TONE SIGNAL 91
A4A11 A4J16 11
ELECTRONIC SENSOR ASSY
A4A10 A4J16 THE COMPARATOR PRODUCES A DRIVE-MODE-SPEED SENSOR 5 FOR EACH REEL WHEN REEL SPEED REACHES 94-96% OF CAPSTAN SPEED. IT ALSO PRODUCES STOP-MODE6 SPEED SENSOR SIGNAL WHEN REEL SPEED DROPS TO 20% OF CAPSTAN SPEED THESE OUTPUTS CONTROL 8 OPERATION OF RESPECTIVE REEL DRIVE SYSTEM MAINTAINING THE PROPER TAPE LOOPS 9 A4J15 17
REEL SERVO LOGIC ASSY
TAKEUP DRIVE MODE SPEED SENSOR TAKEUP STOP MODE SPEED SENSOR SUPPLY STOP MODE SPEED SENSOR SUPPLY DRIVE MODE SPEED SENSOR
TAKEUP REEL SERVO LOGIC 18 A4J14 33 SUPPLY REEL SERVO LOGIC 34
A1
VACUUM COLUMN ASSY
TAKEUP TACHOMETER ROLLER UNIT
W3J14 9 TAKEUP TACHOMETER TONE SIGNAL 41 12
SUPPLY TACHOMETER ROLLER UNIT
W3J11 9 SUPPLY TACHOMETER TONE SIGNAL 16 10
017-1461
Figure 9B-4. MTT Capstan Servo Functional Signal Flow Diagram (Sheet 2 of 2)
9B-9
NAVAIR 01-75PAC-12
(RACK D3) MAGNETIC TAPE TRANSPORT (MTT) W3J29 A4 13 14 15 16 17 18 19 31 32 33 34 35 36 37 ELECTRONIC HOUSING ASSY TO RESPECTIVE READ/WRITE LOGIC MODULES A4A1 THROUGH A4A7 A4J3 THROUGH A4J9 14 A4A1 THROUGH A4A7 READ/WRITE MODULE PRE AMPLIFIER TP1 PREAMP OUTPUT RECT AND THRESHOLD DELAY NORMALIZER TP3 DATA STROBE
A12 HEAD RECORD/ POST READ ASSY HEAD
IN
DIFFERENTIATOR
RET
DC
HORIZ: 50 USEC/DIV VERT: 2 V/DIV A4A14 INPUT ELECTRONIC UNIT A4J22 48B 47B 45B 46B
HORIZ: 10 USEC/DIV VERT: 200 MV/DIV
(RACK D1) LU2 2J11 67 75 69 77 71 79 73 81 HI LO HI LO HI LO HI LO TEST ENABLE 1 TEST ENABLE 2 TEST ENABLE 4 TEST ENABLE 5 HI LO HI LO HI LO HI LO 8J1 69 70 71 72 75 76 77 82 A4J24 36 37 38 39 42 43 44 45 A4A13 INPUT-OUTPUT ELECTRONIC UNIT A4J21 A4J21 50A 34B DTE1 33B 36A DTE2 35A 34A DTE4 33A 36B DTE5 35B 49A 50B 49B
DTE-1 DTE-2 DTE-4 DTE-5
70 78
HI LO
TEST ENABLE 3
HI LO
73 74
40 41
A4A12 OUTPUT ELECTRONIC UNIT A4J23 A4J23 48 50A 5B
50B
DTE-3 A4J22 33
A4J25 52 61 54 63 56 65 HI LO HI LO HI LO 800 BPI 556 BPI 200 BPI HI LO HI LO HI LO 67 68 65 66 58 59 40 41 38 39 36 37
A4A13 INPUT-OUTPUT ELECTRONIC UNIT A4J21 A4J21 30 44 21 27 26 48 47 1 MTT SELECT A4A14 INPUT ELECTRONIC UNIT A4J23 35 36 37 38 45 46
TEST MODE DRIVE LOCKOUT
800 BPI 556 BPI 200 BPI READ ENABLE A4J23 1 14
C D E F
A4J24 37 47 HI LO MTT SELECT HI LO 35 36 1 2
A4J25 33 43 HI LO READ ENABLE HI LO 37 38 78 79
017-1462
9B-10
Figure 9B-5. MTT Data Read Function Signal Flow Diagram (Sheet 1 of 3)
NAVAIR 01-75PAC-12
(RACK D3) MAGNETIC TAPE TRANSPORT (CONT) ELECTRONIC HOUSING ASSY (CONT) A4A1 THROUGH A4A7 READ/WRITE MODULE (CONT)
A BUFFERS TP8 TP7
A4J3 THROUGH A4J9 TP5 HEAD SKEW DESKEWING 21 23 25 DATA READ OUTPUT READ DATA OUTPUT FROM RESPECTIVE DATA READ/WRITE LOGIC MODULES A4A1 THROUGH A4A7 DATA READ STROBE TRIGGER READ STROBE A
TP6 READ STROBE
READ STROBE TRIGGER
HORIZ: 5 USEC/DIV VERT: 0.5 V/DIV
HORIZ: 10 USEC/DIV VERT: 2 V/DIV
A4A8 DATA CONTROL UNIT
DATA CONTROL LOGIC A4J1 TRACK 1 TRACK 2 READ STROBE TRIGGER TRACK 4 TRACK 8 TRACK A TRACK B TRACK C 44 43 42 41 40 39 38 46 READ RESET LOGIC C D E F 800 BPI 556 BPI 200 BPI READ ENABLE READY RESET READY STOP MTT SELECT ACK 30 29 28 45 47 (SEE TAPE CONTROL SIGNAL FLOW) 8 10 17 37 DC READ CONTROL LOGIC DATA STROBE LOGIC 5 READ INDICATOR DRIVE C DATA STROBE OUTPUT B 3.95 MHZ SOURCE TRIGGER LOGIC COUNTER/DECODER A4J1 MOMENTARY STORAGE 14 READ STROBE OUTPUT
TEST MODE DRIVE LOCKOUT
READ ENABLE GATE
017-1463
9B-11
NAVAIR 01-75PAC-12
(RACK D3) MAGNETIC TAPE TRANSPORT (CONT) A4 ELECTRONIC HOUSING ASSY (CONT)
A4A12 READ DATA OUTPUT FROM RESPECTIVE DATA READ/WRITE LOGIC MODULES A4A1 THROUGH A4A7 TRACK 1 TRACK 2 TRACK 4 TRACK 8 TRACK A TRACK B TRACK C
ELECTRONIC OUTPUT ASSY A4J19 37 36 35 34 33 32 31 OUTPUT DIAGNOSTIC MODULE A4J19 44 43 42 41 40 39 38 TRACK 1 TRACK 2 TRACK 4 TRACK 8 TRACK A TRACK B TRACK C A4J18 32 31 30 29 19 18 17 INTERFACE 8 A4J18 50 48 46 44 42 40 38 A4J26 5 7 9 11 13 15 18 TRACK 1 TRACK 2 TRACK 4 TRACK 8 TRACK A TRACK B TRACK C 8J2 1 3 4 8 10 16 17 TRACK 1 TRACK 2 TRACK 4 TRACK 8 TRACK A TRACK B TRACK C 2J10 16 15 13 11 10 3 1
(RACK D1) LU2
A4A13
INPUT-OUTPUT ELECTRONIC UNIT
A4J20 12 INTERFACE 8
A4J20 36
A4J26 20 DATA STROBE OUTPUT 24 DATA STROBE 25
DATA STROBE OUTPUT A8 CONTROL PANEL A4J28 W3J9 17 READ +5.25 VDC
READ INDICATOR DRIVE
20
017-1464
9B-12
NAVAIR 01-75PAC-12
(RACK D3) MAGNETIC TAPE TRANSPORT A4 ELECTRONIC HOUSING ASSY
(RACK D1) LU2 2J13 15 13 12 4 3 2 1 TRACK 1 TRACK 2 TRACK 4 TRACK 8 TRACK A TRACK B TRACK C 8J1 1 3 5 10 12 18 20 A4J21 5 7 9 11 13 15 28 A4J24 37 MTT SELECT 35 1
A4A13 INPUT/OUTPUT ELECTRONIC UNIT A4J21 32 20 18 16 14 12 10 1 BUFFER AMPLIFIER AND LOGIC A4J21 37 38 39 40 41 42 43 TRACK 1 TRACK 2 TRACK 4 TRACK 8 TRACK A TRACK B TRACK C WRITE ENABLE
A4A14 INPUT ELECTRONIC UNIT A4J22 35 36 37 38 39 40 41 34 DIAGNOSTIC MATRIX A4J22 20 21 28 29 30 31 32 A
ERASE A4A8 STOP TAPE CONTROL SIGNAL FLOW DATA CONTROL ASSY DATA CONTROL LOGIC A4J11 50 A4A9 CONTROL LOGIC UNIT W4J24 19 80 FORWARD INPUT INTERLOCK 50 80 3 46 33 47 35 BUFFER AMPLIFIER AND LOGIC A4J12 7 1 FORWARD MTT SELECT 45 14 17 A4J25 35 18 33 WRITE WRITE RESET READ 29 31 37 42 46 48 43 41 37 10 9 14 WRITE ENABLE WRITE RESET READ ENABLE STOP TAPE CONTROL SIGNAL FLOW STOP CONDITION READY RESET READY ACK 49 48 17 8 10 45 MASTER CLEAR W4J9 73 5.25 VDC ADDRESS NO. 1 ADDRESS NO. 2 A8 CONTROL PANEL WRITE RESET LOGIC D CONTROL LOGIC A4J12 21 12 FORWARD CONDITION MTT SELECT ACK 6 WRITE CONTROL LOGIC WRITE POWER ENABLE DATA WRITE STROBE B
A4J25 17 WRITE STROBE 27 44
A4A14 INPUT ELECTRONIC UNIT A4J23 39 A4J23 8
DC DATA WRITE STROBE
WRITE PERMIT (LO) WRITE LOCKOUT (HI)
37
14
A4J24 38 28 49 58 37 47 HI LO HI LO HI LO MASTER CLEAR HI LO HI LO HI LO 39 40 54 55 56 57 9 10 11 12 13 14 J23-45 J23-46 J23-49A J23-49B J23-15 J23-16 45 46 49A 49B 15 16 3 ADDRESS NO. 2 INDICATOR DRIVE 63 2 ADDRESS NO. 1 INDICATOR DRIVE 11
READ CONTROL LOGIC
ADDRESS NO. 1
ADDRESS NO. 2
017-1465
(9B-13 blank)/9B-14
Figure 9B-6. MTT Data Write Function Signal Flow Diagram (Sheet 1 of 2)
NAVAIR 01-75PAC-12
MAGNETIC TAPE TRANSPORT (CONT) A4 ELECTRONIC HOUSING ASSY (CONT) A4A1 THROUGH A4A7 A4J3 THROUGH A4J9 8 7 5 6 A READ/WRITE MODULE SWITCHING AMP (HEAD DRIVER) A4J3 THROUGH A4J9 TP10 2 A12 ELECTRONIC OUTPUT ASSY DATA RETURN A4J29 MAGNETIC HEAD STACK
DATA WRITE WRITE STROBE
CLOCK GATE WRITE POWER ENABLE WRITE RESET
WRITE FLIPFLOP
WRITE POWER AMPLIFIER
1 SWITCHING AMP (HEAD DRIVER) TP9 DATA WRITE OUTPUT TO RECORD HEAD DC 1 DATA OUTPUT
ERASE HEAD
A4A8 DATA CONTROL ASSY (CONT) DATA CONTROL LOGIC A4J11 B DATA WRITE STROBE WRITE STROBE LOGIC 18 WRITE STROBE A4A8 DATA CONTROL ASSY A4J10 2 TP2 15 DATA CONTROL WRITE POWER ENABLE TP-2 WRITE INDICATOR DRIVE WRITE POWER ENABLE (+3.2 + .5 VDC) 49 A4J10 TP1 15 50
HORIZ: 10MSEC/CM VERT: 50MV/CM
WRITE POWER ENABLE
27
INVERTER/ BUFFER
A8 CONTROL PANEL A4J28 21 1 DATA TRACKS OUTPUT RETURN PIN PIN 7 6 5 4 3 2 1 26 25 24 23 22 21 20 W4J9 12 WRITE
E HORIZ: 5MS/CM VERT: 2V/CM 16 WRITE RESET
TRACK NO. 1 2 4 8 A B C
+5.25 VDC
51
017-1466
Figure 9B-6. MTT Data Write Function Signal Flow Diagram (Sheet 2 of 2)
9B-15
NAVAIR 01-75PAC-12
A4
A4J27 91 A10 CAPSTAN DRIVE MOTOR ASSY TONE WHEEL W3P7 4 CAPSTAN TONE SIGNAL W3J8 27 A5 CAPSTAN SERVO ELECTRONIC UNIT CAPSTAN SERVO LOGIC A1 VACUUM COLUMN ASSY W3J8 5 W3J11 9 16 SUPPLY TACHOMETER TONE SIGNAL A B 41 TAKEUP TACHOMETER TONE SIGNAL C CAPSTAN TONE SIGNAL
SUPPLY TACHOMETER ROLLER UNIT
TAKEUP TACHOMETER ROLLER UNIT
W3J14 9
W3J12 SUPPLY NO. 1 NO. 2 NO. 3 NO. 4 NO. 5 NO. 6 NO. 7 NO. 8 NO. 1 NO. 2 NO. 3 NO. 4 NO. 5 NO. 6 NO. 7 NO. 8 8 27 30 12 33 15 18 37 17 16 13 31 6 7 29 30 SUPPLY TAPE LOOP POSITION SENSORS 14 31 29 32 28 36 W3J13 TAKEUP TAPE LOOP POSITION SENSORS 12 14 10 5 34 27 35 34 37 36 33 38 LOOP POSITION SENSOR NO. 4 LOOP POSITION SENSOR NO. 3 LOOP POSITION SENSOR NO. 6 LOOP POSITION SENSOR NO. 5 LOOP POSITION SENSOR NO. 2 LOOP POSITION SENSOR NO. 7 11 10 9 12 8 13 LOOP POSITION SENSOR NO. 5 LOOP POSITION SENSOR NO. 4 LOOP POSITION SENSOR NO. 3 LOOP POSITION SENSOR NO. 6 LOOP POSITION SENSOR NO. 2 LOOP POSITION SENSOR NO. 7
D E F G
TAKEUP
H J K L M N P Q
A8 CONTROL PANEL 1 1
2 L O O P P O S I T I O N
2 A8 CONTROL PANEL TAPE MOTION W3J9 S U P P L Y 79 78 77 23 21 22 2 1 74 75 76 24 26 25 5 6 NO. 1 NO. 2 NO. 3 NO. 4 NO. 5 NO. 6 NO. 7 NO. 8 NO. 1 NO. 2 NO. 3 NO. 4 NO. 5 NO. 6 NO. 7 NO. 8 W3J9 42 FORWARD W3J9 DC SUPPLY REWIND REVERSE 46 45 44 43 47 58 59 60 61 57 TAPE MOTION ACTUATE FORWARD ACTUATE REVERSE ACTUATE REWIND ACTUATE STOP ACTUATE
3 T A K E U P
R S T U V W X Y Z
STOP
TAKEUP A4A14 INPUT ELECTRONIC UNIT
(RACK D1) LU2 2J11 31 29 19 8J1 46 48 50 REWIND REVERSE FORWARD REWIND REVERSE FORWARD A4J24 7 5 3 A4J23 21 A4A14A2 INPUT 31 INTERFACE 33 A4J23 7 6 5 REWIND REVERSE FORWARD AA BB CC
9B-16
Figure 9B-7. MTT Supply Reel/Takeup Reel Functional Signal Flow Diagram (Sheet 1 of 3)
017-1467
NAVAIR 01-75PAC-12
MAGNETIC TAPE TRANSPORT (CONT)
A4 ELECTRONIC HOUSING ASSY (CONT)
A B C
CAPSTAN TONE SIGNAL SUPPLY TACHOMETER TONE SIGNAL TAKEUP TACHOMETER TONE SIGNAL
A4A11 ELECTRONIC SENSOR ASSY A4J16 A4A11A1 A4J16 11 24 REEL SPEED 25 10 COMPARATOR 12 LOGIC 23 22 5 6 9 8
A8 CONTROL PANEL A4J28 TAKEUP SPEED COMPARATOR HI INDICATOR DRIVE TAKEUP SPEED COMPARATOR LO INDICATOR DRIVE SUPPLY SPEED COMPARATOR HI INDICATOR DRIVE SUPPLY SPEED COMPARATOR LO INDICATOR DRIVE TAKEUP DRIVE MODE SPEED SENSOR TAKEUP STOP MODE SPEED SENSOR SUPPLY DRIVE MODE SPEED SENSOR SUPPLY STOP MODE SPEED SENSOR A4A10 REEL SERVO LOGIC ASSY A4J15 A4A10A11 17 TAKEUP/ 18 SUPPLY REEL A4J14 34 SERVO LOGIC 33 6 3 2 7 A4J15 42 40 A4A9 CONTROL LOGIC UNIT A4A9A2 READY LOGIC A4J13 14 11 POSITIVE DRIVE ACTUATE NEGATIVE DRIVE ACTUATE 88 89 B C A4A14 INPUT ELECTRONIC UNIT A4A14A1 INPUT DIAGNOSTIC MATRIX A4J22 33 25 26 23 24 W3J9 56 55 57 58 TAKEUP SPEED COMPARATOR HI TAKEUP SPEED COMPARATOR LO SUPPLY SPEED COMPARATOR HI SUPPLY SPEED COMPARATOR LO +5.25 VDC TEST MODE DRIVE LOCKOUT 8 A
D E F G
SUPPLY LOOP POSITION SENSOR NO. 5 SUPPLY LOOP POSITION SENSOR NO. 4 SUPPLY LOOP POSITION SENSOR NO. 3 SUPPLY LOOP POSITION SENSOR NO. 6
H J K L M N P Q
SUPPLY LOOP POSITION SENSOR NO. 2 SUPPLY LOOP POSITION SENSOR NO. 7 TAKEUP LOOP POSITION SENSOR NO. 4 TAKEUP LOOP POSITION SENSOR NO. 3 TAKEUP LOOP POSITION SENSOR NO. 6 TAKEUP LOOP POSITION SENSOR NO. 5 TAKEUP LOOP POSITION SENSOR NO. 2 TAKEUP LOOP POSITION SENSOR NO. 7 A4A9 CONTROL LOGIC UNIT A4J12 21 38 16 30 FORWARD CONDITION DRIVE MODE ENABLE REWIND MODE ENABLE REVERSE CONDITION
1 8 A4J15 48 49 44 45 50 43
POWER FAILURE BRAKE RELEASE DRIVE LOCKOUT
67 91 68
D E F
R S T U V W X Y Z
SUPPLY LOOP POSITION SENSOR NO. 2 SUPPLY LOOP POSITION SENSOR NO. 7 TAKEUP LOOP POSITION SENSOR NO. 2 TAKEUP LOOP POSITION SENSOR NO. 7 TAPE MOTION ACTUATE FORWARD ACTUATE REVERSE ACTUATE REWIND ACTUATE STOP ACTUATE
A4J12 A4A9A1 2 TRANSPORT 5 CONTROL 3 LOGIC 6 31 34 35 33 32
A4J14 38 36 39 37 A4J15 14 15 12 13
A4J14 9 11
POSITIVE DRIVE ACTUATE NEGATIVE DRIVE ACTUATE
64 65
G H
AA BB CC
REWIND REVERSE FORWARD
45 29 28
9B-17
NAVAIR 01-75PAC-12
MAGNETIC TAPE TRANSPORT (CONT) A3 REEL DRIVE ASSY
A3A2 TAKEUP REEL POWER AMP TAKEUP DRIVE TP5 W3P11 15 TP4 5 DC TP1 6 TP2 14 5 TP3 8 A TEST MODE DRIVE LOCKOUT TP8 REEL SERVO POWER AMP (A3A2A1, A3A2A1) TP7 A2 POSITIVE DRIVE REEL MOTOR TAKEUP POWER FAILURE BRAKE RELEASE 13 V J1 1
A1
NEGATIVE DRIVE
B C
A2
REEL DRIVE ASSY
D E F
POWER BRAKE RELEASE POWER BREAK RELEASE DRIVE LOCKOUT W3P6 8
A2A2 SUPPLY REEL POWER AMP SUPPLY DRIVE TP3 13 V J1 1 5 5 TP5 15 TP1 6 TP2 14 TP8 TP4 REEL SERVO POWER AMP (A2A4A1, A2A4A2) TP7 A2 POSITIVE DRIVE REEL MOTOR SUPPLY POWER FAILURE BRAKE RELEASE
G H
A1
NEGATIVE DRIVE
DC
017-1457
9B-18
NAVAIR 01-75PAC-12
9B-1. MAGNETIC TAPE TRANSPORT LOADING PROCEDURE This procedure permits loading of a system test tape or a scratch tape onto the MTT. TAKEUP LOOP POSITIONS 1 through 8 SUPPLY LOOP POSITIONS 1 through 8 STOP RESET LOAD (2) INDICATORS OUT: TAPE MOTION FORWARD or REVERSE (one indicator is on and the other is out) REWIND MTT SELECT/ADDRESS 1 and 2 (see NOTE below) READY LOAD POINT ON SPEED READ WRITE +15V +13V +5V INTLK OVRD h. i. j. 5. Rotate the supply reel hub by hand in both directions and check that the hub turns freely. Rotate the takeup reel hub by hand in both directions and verify that the hub turns freely. Rotate the Capstan A10, by hand in either direction, and verify that the SUPPLY and TAKEUP SPEED COMP HI indicators go out.
NOTE
D D Ensure that the MTT has been cleaned prior to loading a tape. Cycling LU 2 power may cause the MTT, with write permit ring installed, to write extraneous data on the tape. Perform the following steps at Logic Unit 2 maintenance control panel (MCP): a. b. c. d. e. f. g. h. i. j. k. 2. On the MCP place all toggle switches down (off). Rotate the MODE SELECTOR knob to the OFF LINE position. Rotate the CHANNEL selector to the MTC position. Press the enter button, which is located between the MODE SELECTOR section and the CHANNEL selector. Verify that the MODE SELECTOR subpanel OFF LINE, and the CHANNEL selector subpanel MTC indicators are on. In the CONTROL section, verify that the EFR indicator is on. In the RESET section, press the subpanel MCP and CHAN buttons. In the CONTROL section, press the EF button. Verify that the CONTROL subpanel EFR and EI indicators are on. In the COMPUTER DATA INPUT section are 30 lights. Verify that 0 and 14 are the only ones lit. Ensure that A1B2/A2B1 switch is in the A1B2 position. 3. D D
Load tape as described in the following steps:
1.
CAUTION
Power should not be removed during the loading process. If power is lost or removed during the tape loading procedure, the tape should be manually rewound onto the supply reel and loading procedure restarted again. Tape may be damaged if this caution is not observed. Always handle the tape reels by grasping the reel firmly at the hub center and lightly grasping the outer flanges. Serious damage to the reel may result by pulling on the outer flanges. Pressure on the outer flanges should always be parallel to the flange surface and not between the flanges.
NOTE
If the MTT SELECT and ADDRESS No. 1 or 2 indicators come on at any time during tape loading, repeat steps 1.a. through 1.j. If indicators fail to go out, see Magnetic Tape Transport service procedures. Verify that the following indicators are on or out, as designated, at Logic Unit 2, POWER CONTROL panel: a. INDICATORS ON: WRITE LOCKOUT b. INDICATORS OUT: LOAD POINT READY 4. Perform the following steps on MTT: a. b. c. d. e. f. g. Press and hold the door interlock switch in. Verify that the DOOR INTLK indicator is on. Release door interlock switch and pull it out to the override position. Verify that the DOOR OVRD indicator is on. Push the door interlock switch to the center position (neutral). Verify that both DOOR INTLK and DOOR OVRD indicators are out. Slowly turn the supply tachometer roller (in either direction) with finger and verify that the SUPPLY SPEED COMP HI indicator goes on. Quickly spin the supply tachometer roller (in either direction) with finger and verify that the SUPPLY SPEED COMP LO indicator goes on. Slowly turn the takeup tachometer roller (in either direction) with finger and verify that the TAKEUP SPEED COMP HI indicator goes on. Quickly spin the takeup tachometer roller (in either direction) with finger and verify that the TAKEUP SPEED COMP LO indicator goes on. D D
NOTE
D Handling of tape should be kept to a minimum. End portions of the tape which are not used for data (approximately 25 feet of tape at each end before the markers) may be handled. Use care to avoid having tape touch dusty or dirty surfaces. Dirt collected on the tape may cause permanent loss of data when stacked on the reel. A dirty tape may also contaminate tape transport. a. On supply reel hub, release locking lever and install scratch tape (with write permit ring installed) or system test tape squarely and firmly on hub and close locking lever. If a scratch tape is installed, verify that MTT WRITE LOCKOUT and LOW TAPE indicators are out (indicators 5 and 6). On Logic Unit 2 POWER CONTROL panel verify that WRITE LOCKOUT indicator is out. If a system test tape is installed, verify that MTT WRITE LOCKOUT indicator is on (indicator 6) and the LOW TAPE indicator (indicator 5) is out. On Logic Unit 2, verify that WRITE LOCKOUT indicator is on. Pull the interlock out to the override position. With moderate pressure try to turn takeup and supply reels to check brake tension and reel hub tension. The reels should not rotate. If the reel rotates and the hub remains stationary, hub tension is incorrect. To increase hub tension pull the locking lever out and rotate it clockwise until positive action is felt on the hub when the lower is closed. If both reel and hub rotate freely, the brake has failed and the transport should not be used. If both reel and hub rotate under moderate pressure, the hub is loose on the motor shaft and needs to be readjusted and tightened prior to use.
Perform the following steps at the MTT: a. b. c. d. Ensure that the MTT power switch, located on the MTT control panel is OFF. Open tape transport door and momentarily press door interlock switch to ensure that the interlock is mechanically free. Place RUN/LOAD Switch to the LOAD position. Place MTT Power switch to ON and verify that the following indicators are on or out as designated. All other indicators can be disregarded at this time. (1) INDICATORS ON: STOP FORWARD or REVERSE (one indicator is on and the other is out) POWER WRITE LOCKOUT LOW TAPE EOT TAPE BRAKE DRIVE LOCKOUT AC DC VACUUM
b.
c. d.
Figure 9B-8. MTT Tape Handling and Adjustments (Sheet 1 of 5)
9B-19
NAVAIR 01-75PAC-12
e. f. Return interlock to center position. Rotate supply reel counterclockwise and check reel for any apparent wobble. Reposition reel if necessary to correct wobble. If wobble is still present, replace reel. Rotate takeup reel counterclockwise and check reel for any apparent wobble. Reposition reel if necessary to correct wobble. If wobble is still present, replace reel. Unwind approximately 5 feet of tape from supply reel, taking care that tape does not touch aircraft floor. t. u. v. Verify that DRIVE LOCKOUT indicator is on, and DOOR INTLK, OVRD indicators are out. Place RUN/LOAD switch to RUN. Ready light should illuminate. Rotate supply and takeup reels clockwise until TAKEUP LOOP POSITION indicators 3 through 8, and SUPPLY LOOP POSITION indicators 7 and 8 are on. am. 9B-2. MTT is now ready for operation.
TAPE REMOVAL 1. Perform the following steps at LU 2 maintenance control panel (MCP): a. On the MCP place all toggle switches down (off). Rotate the MODE SELECTOR knob to the OFFLINE position. Rotate the CHANNEL selector to the MTC position. Press the ENTER button, which is located between the MODE SELECTOR section and the CHANNEL selector. Verify that the MODE SELECTOR subpanel OFF LINE, and the CHANNEL selector subpanel MTC indicators are on. In the CONTROL section, verify that the EFR indicator is on. In the RESET section, press the subpanel MCP and CHAN buttons. In the CONTROL section, press the EF button. Verify that the CONTROL subpanel EFR and EI indicators are on. In the COMPUTER DATA INPUT section are 30 lights. Verify that 0 and 14 are the only ones lit. Ensure that the A1B2/A2B1 switch is in the A1B2 position.
g.
h.
WARNING
Lightly hold supply and takeup reels to prevent injury as reels jerk when power is applied. w. Lightly hold supply and takeup reels and place door interlock switch to the override position. Verify that tape loops return to dead zone (SUPPLY and TAKEUP LOOP POSITION indicators 1 through 4 are out, and 5 through 8 are on). Place door interlock switch to center position and rotate both supply and takeup reels counterclockwise until SUPPLY LOOP POSITION indicators 3 through 8 and TAKEUP LOOP POSITION indicators 7 and 8 go on. Place door interlock switch in override position and verify that tape loops reposition into the dead zone (SUPPLY and TAKEUP LOOP POSITION indicators 1 through 4 are out, and 5 through 8 are on). Press FORWARD pushbutton switch and verify that FORWARD indicator goes on. Press REVERSE pushbutton switch and verify FORWARD indicator goes out and REVERSE indicator goes on. Press FORWARD pushbutton switch and verify REVERSE indicator goes out and FORWARD indicator goes on. Press TAPE MOTION pushbutton switch. Verify TAPE MOTION indicator goes on and STOP indicator goes out. When tape reaches load point, TAPE MOTION indicator goes out, and LOAD POINT and STOP indicator come on. On Logic Unit 2, verify LOAD POINT and READY indicators are on. On the MTT control panel press the TAPE MOTION switch and wait about 15 seconds before proceeding. After 15 seconds press the STOP switch and observe that the STOP indicator goes on. Press REVERSE switch and observe that the REVERSE indicator 9B-3. goes on. Press the TAPE MOTION switch. After five seconds, press the STOP switch and verify that the STOP indicator is illuminated. Press the REWIND switch. When tape motion stops, verify that the LOAD POINT and STOP indicators are on. Quickly close and lock door. 2.
b. c. d. e. f. g. h. i. j. k.
WARNING
Use extreme care while working in the area of reel holes to avoid the possibility of personal injury. i. Thread tape into MTT following path indicated on the MTT inside cover. Do not attempt to fill supply and takeup sides of vacuum column at this point. Wind tape leader on takeup reel with no tape-end fold over until friction build-up enables the reel to be rotated without tape slipping on reel (4 to 6 turns).
x.
j.
y.
NOTE
When pulling tape through tape path with the takeup reel, manually rotate the supply reel to avoid stretching the tape. k. Hold capstan drive with one hand to prevent rotation and slowly rotate the supply reel with other hand to introduce tape into vacuum column. Stop rotating supply reel when SUPPLY LOOP POSITION indicators 2 through 8 go out (indicator 1 goes on when indicator 8 goes out.) Pull tape out of vacuum column until SUPPLY LOOP POSITION indicator 8 comes on and indicator 1 goes out. Rotate capstan roller counterclockwise and supply reel counterclockwise to introduce tape into takeup vacuum column. Stop introducing tape when TAKEUP LOOP POSITION indicator 2 through 8 go out (indicator 1 goes on when indicator 8 goes out). Pull tape out of vacuum column until TAKEUP LOOP POSITION indicator 8 comes on and indicator 1 goes out. Slowly rotate supply and takeup reels to a tape position where SUPPLY and TAKEUP LOOP POSITION indicators 1 through 4 are out and 5 through 8 are on (dead zone). Hold both reels in this position. Pull MTT door interlock switch out to the override position and release hold on reels. Verify that DRIVE LOCKOUT indicator is on and the VACUUM and DOOR OVRD indicators are on. Verify that supply and takeup reels are locked and will not rotate. Hold supply and takeup reels to prevent reel movement and operate door interlock switch to the center position. z. aa. ab. ac.
At Magnetic Tape Transports: a. b. c. d. e. Observe that MTT SELECT indicator is off. Observe that ADDRESS No. 1 and 2 indicators are off. If tape is moving, press STOP pushbutton switch. Press REVERSE and REWIND pushbutton - tape will stop at load point. Press REVERSE and TAPE MOTION pushbutton switches - tape will run in reverse and stop when end of the tape actuates tape break sensing circuitry. Place RUN/LOAD switch to LOAD. Open door only when MTT SELECT indicator is off. Manually rewind remaining tape onto supply reel. Remove supply reel.
l. m.
ad. ae. af. ag. ah. ai. aj. ak. al.
f. g. h. i.
n. o.
FIELD ADJUSTMENTS 1. Tape Path Alignment Procedures Field adjustment of various components in the tape path are permitted to minimize the effect of tolerances on tape handling. These field adjustments are reel height adjustment, supply and takeup tachometer roller adjustment, and read/write head skew adjustment. Prior to making adjustments, follow the procedure detailed in the following steps.
p. q. r. s.
9B-20
NAVAIR 01-75PAC-12
Due to the coarseness of the square nut adjustment, slight adjustment will cause tape to jump from one extreme to the other in the tape guide. Therefore, very carefully turn square nut at very small increments as per following guidelines.
CAUTION
Arbitrary adjustment of any component affecting tape path alignment should not be made. Because of the interaction of these components, arbitrary adjustment of any of the three adjustable items affecting the tape path (1) reel height, (2) tachometer roller, (3) read/write head skew, will probably result in compounding the problem or in the case of (3) head skew, permanent damage to the head assembly may result. Field adjustments are permitted but should be done only after careful isolation of the problem source. a. Verify that the vacuum column cover is properly installed. (See MTT Tape Transport Servicing Procedure, Sheet 1.)
CAUTION
Arbitrary adjustment of components which affect tape path alignment should not be made. Tape path alignment is controlled by the vacuum column, capstan roller, tachometer rollers, head assembly, and tape reels. Replacement or removal of any of the above mentioned components may necessitate adjustment of the tape path alignment. Loose rubber on the rollers may also result in improper alignment of the tape and must be corrected prior to any adjustments. Improper installation of the vacuum column cover may result in improper vacuum tension on the tape. Read/write head skew and tape path alignment may be degraded by excessive tape oxide buildup on the head assembly and vacuum column tape contact surfaces. Adjustments of the components affecting tape alignment should only be done after all other problem sources are investigated and corrected. Head assembly damage may occur if excessive adjustment is attempted to compensate for other causes previously described. 2. Reel Height Adjustment a. b. c. d. e. f. g. Remove the supply and takeup reels from MTT. Remove front cover of vacuum column. Remove supply reel locking hub from supply reel motor by lifting locking lever up and unscrewing until it comes off. Remove supply hub from motor axle by removing four noncaptive allen screws. Loosen two allen screws holding clamp and coupling to motor shaft. Remove reel height gage stored on left side of the inside of MTT cabinet. Lay flat portion of reel height gage against vacuum column rails and slide coupling and clamp on motor shaft until flange on coupling slides through notch in reel height gage with front edge of the coupling just touching gage. (See diagram 1.) Carefully tighten two allen screws to hold clamp to motor shaft. Torque screws to 24 inch-pounds. Recheck setting with reel height gage and replace supply hub and reel locking hub. Repeat steps c. through i. for takeup side. Replace vacuum column cover. To install vacuum column cover, align the cover on vacuum column and start center captive stud. Realign cover using bottom cover and column. Start remaining studs and finally tighten the six captive studs from the bottom of the cover to the top. 4.
NOTE
Use special tool, extension wrench PN 387AS660, provided in tool kit A4 Electronics Housing (Allen wrench with socket attachment) to make adjustment. b. c. Loosen allen screws (See diagram 2.) If tape is running up the outside edge of tape guide (farthest from deck surface) carefully turn square nut behind allen screw counterclockwise in approximately 45o (1/8 turn) increments while observing tape running in tape guide. Continue this process until tape is well centered in tape guide (nearest deck surface), carefully turn square nut behind allen screw clockwise in 45o (1/8 turn) increments until tape is well centered in tape guide.
CAUTION
Incorrect vacuum pressure will cause an inability to correctly align tape path. b. c. d. e. Visually inspect tape path alignment. Place a full reel of tape on supply reel hub. Place an empty reel on takeup reel hub. Rotate both reels counterclockwise and check for any apparent reel edge wobble. If necessary reposition reel on hub. If wobble is still present on either reel, the reel should be replaced. Thread tape and load into vacuum column. Operate MTT alternately in forward and reverse motion checking that tape is running in the center of tape guides on both supply and takeup sides. Absolute centering of tape is not necessary and tape may touch slightly in either direction of tape motion. Check that tape just touches front cover of vacuum column where tape enters (exits) vacuum column.
CAUTION
Tape must not curl or roll up in direction of tape motion. d. Alternately run tape in forward and reverse checking that tape is running in center of tape guide in both directions of tape motion.
NOTE
Absolute centering of tape in tape guides is not necessary. e. Tighten allen screws and again check that tape is running correctly in tape guides. Repeat steps b. through d. if necessary.
f. g.
h. i. j. k.
Read/Write Head Skew Adjustment Tools and Equipment List Oscilloscope Master Skew Tape a. b. TEK453 IBM 432640
h.
CAUTION
Tape must touch over cover in one direction and touch cover or have slight clearance in opposite direction. Tape edge must not curl or roll up in any direction of tape motion at any place on tape path. i. If tape is not running in path as indicated in steps g. and h., verify that tape is not excessively rubbing reel flanges or winding on hub erratically, this would indicate the problem was caused by grossly mis-adjusted reel height and require a reel height adjustment. If reels are reasonably adjusted and tape is not running in tape path as described in steps g. and h. proceed with tachometer roller adjustment.
Clean tape path thoroughly. Perform preparation procedure.
3.
Tachometer Roller Adjustment a. Adjust the tachometer roller nearest the tape guide where problem exits. If both have problems, adjust takeup side tach first then proceed with supply side tach.
CAUTION
To prevent damage to skew tape, do not use REWIND MODE.
j.
CAUTION
c.
Run tape to EOT, then reverse back to LOAD PT to ensure proper tape packing on reel.
9B-21
NAVAIR 01-75PAC-12
d. e. f. Load the master skew tape on MTT. Set up test circuit shown in diagram 3. Place tape in forward motion and observe time difference between peaks of two waveforms on the oscilloscope. If time difference is less than 5 microseconds, head alignment is within specifications and no adjustment is necessary. If difference is greater than 5 microseconds, proceed to step g.
CAUTION
Turning head skew adjusting screw (allen screw) more that one turn in either direction will result in damage to head assembly. g. Adjust head skew by turning allen screw located directly above read/write head slightly while observing time difference discussed in step f. Repeat steps f. and g. as necessary, comparing the waveforms of channel 1 (A4A1TP5) and channel 4 (A4A3TP5). Select REVERSE tape motion. Repeat steps f. and g. Alternate FORWARD/REVERSE tape motion and adjust skew adjustment screw to balance allowable phase difference in the FORWARD and REVERSE modes of operation.
h. i. j.
9B-22
NAVAIR 01-75PAC-12
REEL HEIGHT GAGE 387A5325
NOTE
VACUUM COLUMN COVER AND REEL LOCK REMOVED MTT ELECTRONICS HOUSEING A4A1TP5 READ/WRITE CHANNEL 1 OSCILLOSCOPE
A4A7TP5 COUPLING ASSEMBLY CLAMP READ/WRITE CHANNEL C
EXT TRIG
MOTOR SHAFT
VACUUM COLUMN RAILS
CK1
CK2
DIAGRAM 1. REEL HEIGHT ADJUSTMENT
CH 1 INPUT
CH C INPUT
ALLEN SCREW SQUARE NUT
TOP: A4A1TP5 BOTTOM: A4A7TP5 HORIZ: 5 SEC/DIV VERT: 0.5 V/DIV SYNC INTERNAL SLOPE + MODE TO ALT/CHOP ALLEN SCREW
DIAGRAM 2. TACHOMETER ADJUSTMENT
DIAGRAM 3. HEAD SKEW TEST CIRCUIT
017-1458
9B-23
NAVAIR 01-75PAC-12

A10 CAPSTAN DRIVE ASSEMBLY
TAPE DECK DETAIL

A12 RECORD/POST READ MAGNETIC HEAD ASSEMBLY A1A2 SUPPLY TACHOMETER P/O A1A2 TAPE BREAK SENSOR P/O A1A5 SUPPLY TAPE CLEANER ON VACUUM COLUMN A13 LOW TAPE SENSOR D
NOTE
D FOR SPECIFIC SERVICING INTERVALS SEE APPLICABLE NAVAIR 01-75PAA-6 SERIES PERIODIC MAINTENANCE REQUIREMENTS FOR DETAILED SERVICING PROCEDURES SEE NAVAIR 01-75PAC-2-5
ERASE SWITCH
A1A3 TAKEUP REEL TACHOMETER
A2 OR A3 REEL DRIVE ASSEMBLY RUN/ LOAD SWITCH A1 VACUUM COLUMN UNIT P/O A1A3 TAPE BREAK SENSOR P/O A1A5 TAKE-UP TAPE CLEANER ON VACUUM COLUMN
E
MP5 TAPE DECK AIR FILTER A17 ELASPED TIME METER ASSEMBLY AND TAPE MOTION METER
DETAIL
ELAPSED TIME METER
TAPE MOTION METER
A8 CONTROL PANEL
A9 POWER SUPPLY ASSEMBLY

A9A1T1 TRANSFORMER
TAPE DECK REAR VIEW COMPONENTS

A2 SUPPLY REEL DRIVE ASSEMBLY A4 ELECTRONIC HOUSING ASSEMBLY
TAPE DECK REAR ACCESS

LOOSEN LOCK-DOWN NUTS AND PIVOT CLAMPS AT EDGE OF CASE (TYPICAL 2 PLACES) CAREFULLY SWING TAPE TRANSPORT DECK FROM CASE REGULATOR ASSEMBLY
F
A10 CAPSTAN DRIVE ASSEMBLY A9 POWER SUPPLY ASSEMBLY A16 POWER SUPPLY ASSEMBLY A11 AIR PRESSURE REGULATOR AND SWITCH ASSEMBLY
A B H D
A9A1L4 FILTER INDUCTOR
A5 CAPSTAN SERVO ELECTRONICS ASSEMBLY
A9A1C4 FILTER CAPACITOR A9A1 POWER COMPONENTS ASSEMBLY
B1 VACUUM BLOWER UNIT
A15
POWER SUPPLY ASSEMBLY
B3 TAPE DECK PRESSURE BLOWER A3 TAKEUP REEL DRIVE ASSEMBLY
B2 ELECTRONIC HOUSING COOLING FAN A7 POWER CONTROL ASSEMBLY
F
9B-24 Figure 9B-9. MTT Module Location Diagram (Sheet 1 of 3)
NAVAIR 01-75PAC-12
A4 ELECTRONIC HOUSING ASSEMBLY
A8 CONTROL PANEL ASSEMBLY

A1 VACUUM COLUMN UNIT
TOOL KIT A1A1 TAPE LOOP POSITION SENSOR
A4A12 OUTPUT ELECTRONICS SUBASSEMBLY A4A13 INPUT/OUTPUT ELECTRONICS SUBASSEMBLY A4A14 INPUT ELECTRONICS SUBASSEMBLY A4A1-A4A7 DATA READ/WRITE SUBASSEMBLIES A4A15 A4A8 DATA CONTROL SUBASSEMBLY A4A9 CONTROL LOGIC SUBASSEMBLY A4A10 DUAL REEL SERVO LOGIC SUBASSEMBLY A4A11 SENSOR ELECTRONICS SUBASSEMBLY J
SUPPLY TAPE CLEANER
DETAIL
DETAIL D
A4A15
ELECTRICAL INTERCONNECTION BOARD ASSEMBLY VIEW J A7 POWER CONTROL ASSEMBLY
A15 5.25 VOLT POWER SUPPLY
A1MP1 VACUUM COLUMN ASSEMBLY TAKEUP TAPE CLEANER
DETAIL
E
COVER
DETAIL G
A2A1 A3A1 REEL DRIVE MOTOR AND BRAKE SUBASSEMBLY
A2 OR A3 REEL DRIVE ASSEMBLY

BLOWER
TP1 TP2 TP3
A6 SENSOR ASSEMBLY
CB1 A7A1 AC OVERVOLTAGE/UNDERVOLTAGE SENSOR A7A2 DC OVERVOLTAGE/UNDERVOLTAGE SENSOR
A16 15 VOLT POWER SUPPLY

1
DETAIL F
USED ON A2 REEL DRIVE ASSEMBLY ONLY
A2A2 A3A2 REEL DRIVE POWER AMPLIFIER
DETAIL
DETAIL H
Figure 9B-9. MTT Module Location Diagram (Sheet 2 of 3)
9B-25
NAVAIR 01-75PAC-12 SENSOR LOGIC PLATE ON VACUUM COLUMN, REAR VIEW

1 2 3 4 5 6 5 5 7 8 9 1
VACUUM COLUMN, TOP VIEW, COVER REMOVED

2 4 5 3 6 7 8 9 10 11
.........................
............. ............
. . . . . . . . . . . . . . . .
. . . .
A18 A16 A1
A19 A13 A9
A20
A21
A15 A22
. . . . . . . . . . . .
A17 A12 A8 A14 A10
A2 A3 A4 A5 A11 A6
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A7
.. ..
13
10
12
11
5 20 19 18 17 16 15 14 13 12
INDEX NO.
ITEM DESCRIPTION Sensor Logic Assembly
REFERENCE DESIGNATION A1A1 A1A1A17 A1A1A8, A12 A1A1A18 A1A1A1, A16 A1A1A7, A19, A20, A21 A1A1A10, A13 A1A1A11, A14
INDEX NO. 8 9 10 11 12 13
ITEM DESCRIPTION Power Supply Tape Loop Position Sensor Comparator (Supply) Tape Path Sensor Comparator BOT-EOT - Tape Break Logic Tape Loop Position Sensor Comparator Sensor Plate
REFERENCE DESIGNATION A1A1A15 A1A1A4, A5, A6, A22 A1A1A2 A1A1A9 A1A1A3
INDEX NO. 1 2 3 4 5 6 7 8 9 10
ITEM DESCRIPTION Supply Tachometer Supply Rail Center Rail Tape Sensor Board Assembly Supply Tape Cleaner Tape Sensor Board Assembly Tape Sensor Board Assembly Tape Sensor Board Assembly Tape Sensor Board Assembly Tape Sensor Board Assembly
REFERENCE DESIGNATION A1A2 A1A6 A1A8 A1A6A1 A1A4 A1A6A2 A1A6A3 A1A6A4 A1A6A5 A1A9A2
INDEX NO. 11 12 13 14 15 16 17 18 19 20
ITEM DESCRIPTION Bottom Rail Tape Sensor Board Assembly Tape Sensor Board Assembly Tape Sensor Board Assembly Tape Sensor Board Assembly Tape Sensor Board Assembly Takeup Tape Cleaner Tape Sensor Board Assembly Takeup Rail Takeup Tachometer
REFERENCE DESIGNATION A1A9 A1A9A1 A1A7A5 A1A7A4 A1A7A3 A1A7A2 A1A5 A1A7A1 A1A7 A1A3
1 2 3 4 5 6 7
Tape Path Sensor Comparator Logic Driver Tape Loop Position Sensor Comparator EOT or BOT Comparator Tape Loop Position Sensor Comparator (Takeup) Sensor 1 through 4 Logic Sensor 5 through 7 Logic
9B-26
Figure 9B-9. MTT Module Location Diagram (Sheet 3 of 3)
NAVAIR 01-75PAC-12 MAGNETIC HEAD CLEANING TAPE PATH CLEANING

CAUTION TO PREVENT TAPE DAMAGE AVOID CONTACTING TAPE WITH ISOPROPYL ALCOHOL SOLVENT WARNING ISOPROPYL ALCOHOL HAS A FLASH POINT AND EXPLOSION POINT OF 57 DEGREES CELSIUS, DO NOT USE AROUND AN OPEN FLAME OR SPARKS, USE ONLY ENOUGH ISOPROPYL ALCOHOL TO BE CONTAINED ON TERMINAL WIPES. AFTER USE, DISPOSE OF WIPES AND SWABS IN A CLOSED CONTAINER SUCH THAT SPONTANEOUS COMBUSTION WILL NOT OCCUR. DO NOT USE IN THE PRESENCE OF AVIATORS BREATHING OXYGEN.
VACUUM COLUMN CLEANING

CAUTION
A B C
A B C
UNLOCK SIX TURNLOCK FASTENERS AND REMOVE VACUUM COLUMN COVER VACUUM CLEAN FIBER SURFACES AND WIPE SURFACES THAT CONTACT TAPE WITH LINT-FREE CLOTH MOISTENED WITH ISOPROPYL ALCOHOL SOLVENT. THERE SHOULD NOT BE ANY RIDGES OR IRREGULARITIES IN THE SURFACE WHEN CLEANED PROPERLY WIPE OTHER SURFACES WITH LINT-FREE CLOTH MOISTENED WITH ISOPROPYL ALCOHOL SOLVENT TO INSTALL VACUUM COLUMN COVER ALIGN THE COVER ON VACUUM COLUMN AND START CENTER CAPTIVE STUD. REALIGN COVER USING BOTTOM COVER AND COLUMN. START REMAINING STUDS AND FINALLY TIGHTEN THE SIX CAPTIVE STUDS FROM THE BOTTOM OF THE COVER TO THE TOP.
CAREFULLY REMOVE SCREW, WASHER, AND CROSSTALK SHIELD USE COTTON SWAB, MOISTENED WITH ISOPROPYL ALCOHOL SOLVENT TO CLEAN POLE FACES. WHILE ROTATING SWAB, SWAB POLE FACES WITH SINGLE STROKE. CLEAN DUMMY HEAD
NOTE
FOR SPECIFIC SERVICING INTERVALS SEE APPLICABLE NAVAIR 01-75PAA-6 SERIES, PERIODIC MAINTENANCE REQUIREMENTS
EXERCISE CARE TO AVOID SCRATCHING OR DISLODGING SENSOR LENSES AND LAMPS IN VACUUM COLUMN COVERS
WIPE CAPSTAN AND TACHOMETER ROLLERS WITH A LINT-FREE CLOTH MOISTENED WITH ISOPROPYL ALCOHOL SOLVENT
CAPSTAN
TACHOMETER ROLLER TAPE CLEANER SUPPLY REEL VACUUM COLUMN COVER LOOP POSITION 1 LENSES LOW TAPE A1A1 TAPE LOOP SENSOR LENSES POSITION SENSOR
MAGNETIC HEAD
ERASE HEAD
CROSSTALK SHIELD
LOOP POSITION LENSES (7 PLACES)
POLE FACES
TACHOMETER ROLLER TAPE BREAK SENSOR LENSES TAPE CLEANER
TAPE-PATH LENS
DUMMY HEAD DAMPER, TWO EDGES CONTACT TAPE
LOOP POSITION LENSES (16 PLACES, 8 LENSES EACH SIDE)
VACUUM COLUMN LENS LOCATIONS

SERVICING MATERIAL REFERENCE TAKEUP REEL ITEM LAMP, LOW TAPE SENSOR PART NUMBER 15 TT-I-735A CAUTION FIRST ALIGN VACUUM COLUMN COVER WITH MOUNTING AT ROLLER END TO PREVENT DAMAGE TO ROLLER RUBBER SURFACE. TO INSTALL VACUUM COLUMN COVER ALIGN THE COVER ON VACUUM COLUMN AND START CENTER CAPTIVE STUD. REALIGN COVER USING BOTTOM COVER AND COLUMN. START REMAINING STUDS AND TIGHTEN THE SIX CAPTIVE STUDS FROM THE BOTTOM OF THE COVER TO THE TOP.
TAPE CLEANER CLEANING

WARNING TO PREVENT CUT FINGERS AVOID SHARP EDGES ON TAPE CLEANER WHEN CLEANING
SUPPLY AND TAKEUP REEL HUBS
SOLVENT, ISOPROPYL ALCOHOL
WIPE WITH A LINT-FREE CLOTH MOISTENED WITH ISOPROPYL ALCOHOL SOLVENT
GENERAL ELECTRIC CO.
A B C D
REMOVE SCREW AND WASHER REMOVE COVER REMOVE CLEANER ELEMENT, CLEAN WITH BRUSH AND VACUUM CLEANER. WIPE WITH A LINT-FREE CLOTH MOISTENED WITH ISOPROPYL ALCOHOL SOLVENT. REINSTALL CLEANER ELEMENT
TAPE DECK AIR FILTER CLEANER

CLEANER ELEMENT COVER
LENS CLEANING
A B
LOOSEN DZUS FASTENER AND LIFT OFF COVER REMOVE FILTER AND CLEAN NOTE SOME FILTERS ARE MADE OF PAPER; THESE CANNOT BE CLEANED AND MUST BE REPLACED.
A
FILTER
RUN TAPE ONTO SUPPLY REEL AND REMOVE FROM TRANSPORT. UNLOCK SIX TURNLOCK FASTENERS AND LIFT VACUUM COLUMN COVER FROM TAPE DECK. WIPE LENS SURFACES CLEAN WITH A COTTON SWAB MOISTENED WITH ISOPROPYL ALCOHOL SOLVENT. CLEAN INNER SURFACES OF LENS WITHIN LAMP HOLE.
B
COVER
C D
Figure 9B-10. MTT Servicing Procedures (Sheet 1 of 2)
9B-27
NAVAIR 01-75PAC-12
PNEUMATIC DIAGRAM
AIR INLET A4 FILTER A14MP6 ELECTRONICS HOUSING LEGEND VACUUM EXHAUST AIR PRESSURIZING AIR COOLING AIR SUPPLY REEL DRIVE EXHAUST FILTER A14MP4
AIR FILTER CLEANING

COOLING AIR EXHAUST FILTER A14MP2
A5 CAPSTAN SERVO ELECTRONICS ELECTRONICS HOUSING COOLING FAN B2 COOLING AIR SUPPLY REEL A2 EXHAUST DRIVE UNIT FILTER A14MP4 COOLING FAN A2A2B1
A3 TAKE--UP REEL DRIVE UNIT COOLING FAN A3A2B1 MAGNETIC TAPE PIVOT CLAMP SUPPLY TAPE CLEANER A1A4 SUPPLY REEL CAPSTAN SERVO AND ELECTRONICS HOUSING EXHAUST FILTER A14MP2 TAKE--UP REEL DRIVE EXHAUST FILTER A14MP5 TAKEUP REEL TAPE DECK AIR FILTER MP5 VACUUM COLUMN A1MP1 POWER SUPPLY AIR INLET
COOLING AIR EXHAUST FILTER A14MP5 A9 15V POWER SUPPLY COOLING AIR EXHAUST FILTER A14MP9
A13 13V POWER SUPPLY TAKEUP TAPE CLEANER A1A5 A15 5V POWER SUPPLY TAPE DECK PRESSURE BLOWER B3 VACUUM REGULATOR A11
V
NOTE
FOR SPECIFIC SERVICING INTERVALS SEE APPLICABLE NAVAIR 01--75PAA--6 SERIES PERIODIC MAINTENANCE REQUIREMENTS FOR DETAILED SERVICING PROCEDURES SEE NAVAIR 01--75PAC--2--5
VACUUM BLOWER B1
MTT REAR
TAPE DECK
POWER SUPPLY AIR INLET CLEANING

A REMOVE FLEXIBLE TUBING BETWEEN SUPPLY HOUSING AND DUAL BLOWER USE VACUUM CLEANER AND CLEAN HONEYCOMB LOCATED IN POWER SUPPLY HOUSING AIR INLET. A SMALL STIFF-BRISTLED BRUSH MAY BE USED TO REMOVE PERSISTANT DIRT
INLET FILTERS
A LOOSEN SLIDE FASTENERS AND LIFT FILTER FROM CASE USE A STIFF--BRISTLED BRUSH TO LOOSEN ACCUMULATED DIRT AND FOREIGN MATTER FROM FILTER SCREEN VACUUM CLEAN FILTER SCREEN AND REINSTALL
EXHAUST FILTERS
A REMOVE RETAINING SCREWS FROM FILTER PLATE, AND LIFT FILTER FROM CASE WASH HONEYCOMB FILTER IN DETERGENT AND WARM WATER AIR DRY HONEYCOMB FILTER AND REINSTALL
BLOWERS
A COOLING AND TAPE DECK BLOWER BLADES SHOULD BE CLEANED WHEN BLADES ACCUMULATE DIRT OR FOREIGN MATERIAL USE A PRE--SATURATED 90% ISOPROPYL ALCOHOL PAD AND WIPE BLADES CLEAN
017-4880 09B01002
9B-28
Figure 9B-10. MTT Servicing Procedures (Sheet 2 of 2)
NAVAIR 01-75PAC-12
Vacuum Column Unit
DESIGNATOR
A1
NOMENCLATURE
Vacuum Column Unit Skate Board
FUNCTION
Provides Edge Guilding and Maintains Tape Loops in Tape Path Controls Action of Capstan and Reel Servos Photocell Sensors and Light Sources

None

A1A1A20 A1A1A21 A1A1A22
NOMENCLATURE
Position Sensor Comparator Position Sensor Comparator Position Sensor Comparator Supply Tachometer
FUNCTION

A1A1A7, A19, A21 A1A1A7, A19, A20 A1A1A4, A5, A6
A1A1
None
A1A1A1 A1A1A2 A1A1A3 A1A1A4 A1A1A5 A1A1A6 A1A1A7 A1A1A8 A1A1A9 A1A1A10 A1A1A11 A1A1A12 A1A1A13 A1A1A14 A1A1A15 A1A1A16 A1A1A17 A1A1A18 A1A1A19
EOT or BOT Comparator Tape Path Sensor Compatator Position Sensor Comparator Position Sensor Comparator Position Sensor Comparator Position Sensor Comparator Position Sensor Comparator Logic Driver BOT-EOT - Tape Break Logic Sensor 1-4 Logic Sensor 5-7 Logic Logic Driver Sensors 1-4 Logic Sensors 5-7 Logic Power Supply for LEDs EOT or BOT Comparator Tape Path Sensor Comparator Position Sensor Comparator Position Sensor Comparator
A1A1A16 A1A2 None None A1A1A5, A6, A22 A1A1A4, A6, A22 A1A1A4, A5, A22 A1A1A19, A20, A21 A1A7 A1A1A12 None A1A1A13 A1A1A14 A1A1A8 A1A1A10 A1A1A11 None A1A1A1 None None A1A1A7, A20, A21 Takeup Reel Drive Unit A3 A2A1 Supply Reel Drive Unit A2 A1A9 A1A8 A1A3
Provides a Low Friction Turnaround Point in the Tape Path Provides a Low Friction Turnaround Point in the Tape Path Removes Foreign Particles from the Supply Tape Removes Foreign Particles from the Takeup Tape Senses Tape Position and Tape Break Supply Side of Vacuum Column Senses Tape Position and Tape Break Takeup Side of Vacuum Column Provides Light Source for Tape Loop Position. Sensors Supply and Takeup Sides of Vacuum Column. Senses BOT and EOT Senses Tape Position Supply and Takeup Sides of Vacuum Column Drives the Supply Reel to Follow the Capstan in all Operational Modes A Heavy Duty Bidirectional Motor that Drives the Supply Reel Drives the Supply Reel Motor Drives the Takeup Reel to Follow the Capstan in all Operational Modes
None
Takeup Tachometer
None
A1A4 A1A5 A1A6
Supply Tape Cleaner Assembly Takeup Tape Cleaner Assembly Spacer AssemblySupply Spacer AssemblyTakeup Spacer AssemblyCenter
None None None
None
None
Spacer AssemblyBottom Supply Reel Drive Unit Supply Reel Drive Motor/Brake Assembly Supply Reel Drive Power Amplifier Assembly Takeup Reel Drive Unit
None
A3
A3A1
A2A2
A3A2
A2
Figure 9B-11. MTT Module Function and Interchangeability (Sheet 1 of 3)
9B-29
NAVAIR 01-75PAC-12
Takeup Reel Drive Unit (Cont)
DESIGNATOR
A3A1
NOMENCLATURE
Takeup Reel Drive Motor/Brake Assembly Takeup Reel Drive Power Amplifier Assembly Electronics Housing Unit
FUNCTION
A Heavy Duty Bidirectional Motor that Drives the Takeup Reel Drives the Takeup Reel Motor Provides Enclosure and Interconnections for the RD/WR CKTS & Control Plug-in Units 7 RD/Write Mag Heads for Mag Tape Uses External and Internal Signals to Control the Data Write System Maintains Control Over the Direction and Ready Logics Accepts Signals from Tape Sensors and Gives Drive and Servo Brake Commands to Reel Servo Power Amplifier (Performs same function for Supply Reel and Takeup Reel) The Sensors Control Reel Servo Operation and Provide Tape Loop Position Information Ensures Proper Signal Values and Proper Functional Operation through Circuitry and Logic Ensure Proper Signal Values and Functional Operation through Interconnection Circuitry and Logic (Provides Interconnecting Circuitry between the MTT and External Equipment) Insure Proper Signal Values and Functional Operation through Interconnection Circuitry and Logic (In normal Operation, Couples the Diagnostic Tests with the External Equipment)

A4A15
NOMENCLATURE
Electronics Housing CKT Card Assembly
FUNCTION
Provides Electrical Interconnection for RD/WR CKT Boards in the Control System Units Drives the Mag Tape Past the Read/Write Heads at a Controlled Speed Contains a Write Lockout Sensor Which Determines if Write-Permit Ring is Mounted on Tape Reel AC Input Power is Applied Through EMI Filter to the On/Off Relay ans On/Off SW on CTRL Panel Monitors AC Voltage, Detects OV/UV Connects and Disconnects AC Power if OV/ UV Condition Exists Monitors DC Supply Outputs, Detects OV/UV and Shuts Down AC Power if OV/UV Condition Exists Chassis and Housing Assembly for Power Control Unit Provides a Continuous Indication of the Functional Status of the MTT Rectifies AC-input and Supplies a Regulated +13 VDC Output Drives the Mag Tape Past the Read/Write Head at a Controlled Speed Mechanical Regulator in Series with Vacuum to Maintain Constant Tape Tension Senses Tape Data and Supplies it to the Data Read Logic for Conditioning Provides Local and Remote Indication when Tape Level is Depleted Below Preset Minimum Contains the EMI Filter and the Air Exhaust Filter for Tapes

None
A2A1
A3A2
A2A2
Capstan Lo-Level Electronics Sensor Assembly
A5
Capstan Servo LoLevel Electronics Unit Sensor Assembly
None
Electronics Housing Unit
A4
None
A6
None
A4A1-A4A7 A4A8
Data RD/Write Units Data Control Unit
All units are identical and interchangeable None
Power Control Unit
A7
Power Control Unit
None
A7A1 None None
A4A9 A4A10
Control Logic Unit Dual Reel Servo Logic Unit (Supply Reel Servo Logic Servo Circuit Card Assembly and Takeup Reel Servo Logic Circuit Card Assembly) Sensor Electronics Unit
AC OV/UV Sensor CKT Card Assembly
None
A7A2
DC OV/UV Sensor CKT Card Assembly
None
A7A3 Control Panel Unit Power Supply Assembly Capstan Drive Unit None Air Pressure Regulator Magnetic Head Assembly None Low Tape Sensor A11 A8
Chassis and Housing Assembly Control Panel Unit
None None
A4A11
None
A9
A4A12
Output Electronics Unit
None
+13 VDC Power Supply Assembly Capstan Drive Unit
None
A10
None
A4A13
Input/Output Electronics Unit (Output Interface A CKT Card Assembly and Input Interface B CKT Card Assembly) Input Electronics Unit (Input Diagnostic MATRIX CKT Card Assembly and Input Interface A CKT Card Assembly)
Air Pressure Regulator and SW Assembly Record/Post Read Magnetic Head Unit Low Tape Sensor
None
A12
None
A4A14
A13
None
Rear Cover Assembly
A14
Rear Cover Assembly
None
9B-30
NAVAIR 01-75PAC-12
Rear Cover Assembly (Cont) +5.25 VDC Power Supply +15 VDC Power Supply Elapsed Time Meter Assembly Vacuum Blower Unit Electronics HSG Cooling Fan Tape Deck Press Blower
DESIGNATOR
A14A1
NOMENCLATURE
EMI Filter
FUNCTION
AC Input Power is Applied through the EMI Filter to Power Control Unit A7 Provides +5.25 VDC Power to all Logic Circuits Provides +15 VDC Power to the Read/Write Circuitry and to the Erase Circuitry Records Operating Time of MTT Provided Vacuum for the Vacuum Column and Exhaust Air to External Environment Provides Cooling for the Electronics HSG Supplies Air Pressure to the Tape Path Area to Maintain Cleanliness and Proper Tape Tension

None
A15 A16
+5.25 VDC Power Supply +15 VDC Power Supply Elasped Time Meter Assembly Vacuum Blower Unit Electronics HSG Cooling Fan Tape Deck Pressure Blower
None None
A17 B1
None None
B2 B3
None None
9B-31/(9B-32 blank)
SECTION 9C
REPLACEMENT DATA STORAGE SYSTEM (RDSS)
SECTION 9C REPLACEMENT DATA STORAGE SYSTEM
NAVAIR 01-75PAC-12
(RACK D2) CP-2044/ASQ-212(V) DIGITAL DATA COMPUTER (CENTRAL COMPUTER) (SEE SECTION 4) (RACK D3) REPLACEMENT DATA STORAGE SYSTEM (RDSS) J27/P27 EXTERNAL INTERRUPT ENABLE EXTERNAL INTERRUPT REQUEST INPUT DATA ACKNOWLEDGE INPUT DATA REQUEST INPUT DATA BIT 00-31 J26/P26 EXTERNAL FUNCTION REQUEST EXTERNAL FUNCTION OUTPUT DATA REQUEST OUTPUT DATA ACKNOWLEDGE OUTPUT DATA BIT 00-31 J3 J2
(RACK E1) CP-1808/USQ-78(V) DISPLAY COMPUTER UNIT (DCU)
3
(SEE NAVAIR 01-75PAC-12-8) (TACCO STATION) TACCO POWER CONTROL (SEE NAVAIR 01-75PAC-12-2)
J15 H_CF IN L_CF IN H_CF CLOCK IN L_CF CLOCK IN H_CF/WD IN L_CF/WD IN H_CF/WD CLOCK IN L_CF/WD CLOCK IN H_CF OUT L_CF OUT H_CF_ CLOCK OUT L_CF_CLOCK OUT H_CF/WD OUT L_CF/WD OUT H_CF/WD CLOCK OUT L_CF/WD CLOCK OUT
J6
1J1 RDSS ON
NOTE
(RACK D1) 2J8 (RACK D1) DPS ELECTRONIC CIRCUIT BREAKER PANEL (SEE NAVAIR 01-75PAC-12-2) RDSS OA OB OC PWR DISTR BOX DC 28 VDC 115 VAC OA 115 VAC OB 115 VAC O C 2J9 A521
1
A511
AIRCRAFT BUNO 156507 THROUGH 158927 AND 158929 THROUGH 159329 AIRCRAFT BUNO 158928 AND 159503 AND SUBSEQUENT
1 4 7
2 5 8 0
3 6 9
ENTER
POWER DISTRIBUTION BOX (SEE NAVAIR 01-75PAC-12-2)
2J7 115 VAC OA 115 VAC O B 115 VAC O C
J1
Figure 9C-1. RDSS Signal Flow Diagram
9C-1
NAVAIR 01-75PAC-12
(RACK D1) DPS ELECTRONIC CIRCUIT BREAKER PANEL
(RACK D1) A521
(RACK D3)
A511
RDSS
POWER DISTRIBUTION BOX
RDSS 115 VAC A B C 115 VAC A 115 VAC B 115 VAC C 2J9 ZY ZJ R 2J7 J1 E S T 115 VAC A 115 VAC B 115 VAC C D E F B SAFETY GROUND 2K2 CHASSIS GROUND C COM
A6 LOW VOLTAGE POWER SUPPLY W1SW1
6J1 1 2 3
5 VDC POWER SUPPLY PROVIDES DC LOGIC POWER FOR SHOCK FRAME ASSEMBLIES, ENCLOSURE LAMPS AND SENSORS.
TB1 1 +5 VDC
3 +12 VDC POWER SUPPLY PROVIDES DC LOGIC POWER FOR SHOCK FRAME ASSEMBLIES AND FRONT PANEL DISPLAY/KEYBOARD MODULES.
+5 VDC
PWR DISTR BOX
DC
28 VDC
HOURS M1 -12 VDC POWER SUPPLY PROVIDES DC POWER FOR ALL INTERNAL COOLING FANS. TB2 7 1 8 2 -12 VDC +12 VDC -12 VDC +12 VDC
NOTE
1
(TACCO STATION) TACCO POWER CONTROL PANEL MAG TAPES AIRCRAFT BUNO 156507 THROUGH 158927 AND 158929 THROUGH 159329 AIRCRAFT BUNO 158928 AND 159503 AND SUBSEQUENT
DC POWER TO ENCLOSURE ASSEMBLIES
1J1 D RDSS ON
2J8 K DC POWER TO SHOCK FRAME ASSEMBLIES
DC OFF
9C-2
Figure 9C-2. RDSS Power Distribution Diagram
NAVAIR 01-75PAC-12
RDSS A1 INTERNAL SHOCK FRAME ASSEMBLY -12 VDC B3 EXHAUST FAN
A7
DRIVE BAY ASSEMBLY A1 (M-O DRIVE 1)
FAN TRAY (INTAKE)
CARD CAGE
1
B1 FAN INTAKE
P2
RESERVED B4 EXHAUST FAN
THIS SLOT USED FOR ST 2600 M-O DRIVE
P2
RESERVED
P2
RESERVED ANEW J2 ANEW (NTDS-TYPE C) INPUT CONNECTOR
A2
(M-O DRIVE 1)
2
P2 RESERVED
ANEW
THIS SLOT USED FOR ST 5200 M-O DRIVE
B2
FAN INTAKE A2 ANEW/PDC INTERFACE ANEW ANEW A8 ETHERNET TRANSCEIVER ETHERNET
J3
ANEW (NTDS-TYPE C) OUTPUT CONNECTOR
P2 A3 (RESERVED)
J4
NOT USED WITH ANEW CONFIGURED AIRCRAFT
J5 ETHERNET A4 A4 (RESERVED) -12 VDC P2 ETHERNET PDC DATA SCSI II +5 +12 VDC +12 VDC W2SW1 OVER TEMP SENSOR J6 P2 TRANSITION INTERFACE
NOT USED WITH ANEW CONFIGURED AIRCRAFT
PROTEUS (PDC) INPUT/OUTPUT CONNECTOR
OVER TEMP
5 VDC
A3 A5 FRONT PANEL ASSEMBLY P2 A2 DISPLAY DISPLAY DATA A1 DISPLAY CONTROLLER
FILE MANAGER PROCESSOR
A6
LVPS (+5 VDC) (+12 VDC) (-12 VDC)
5 VDC
W1M1 TIME METER
W3DS2 OVER TEMP INDICATOR
W3DS1 POWER ON INDICATOR
NOTE
1
ST 2600 INSTALLED ST 5200 INSTALLED
A3
KEYPAD KEYPAD DATA
VME BUS CONTROL DATA SHOCK FRAME DC PWR 115 VAC B W1SW1 AC POWER SWITCH/BRKR
J1 ENCLOSURE DC PWR AC PWR 115 VAC 3
115 VAC, 400Hz, 3 PHASE, WYE, INPUT POWER
Figure 9C-3. RDSS Block Diagram
9C-3
NAVAIR 01-75PAC-12
(RACK D3) RDSS (RACK D2) CENTRAL COMPUTER (RACK E1) DCU J15 5 4 7 17 6 16 3 2 11 10 19 8 20 9 13 12 H_CF IN L_CF IN H_CF CLOCK IN L_CF CLOCK IN H_CF/WD IN L_CF/WD IN H_CF/WD CLOCK IN L_CF/WD CLOCK IN H_CF OUT L_CF OUT H_CF_ CLOCK OUT L_CF_CLOCK OUT H_CF/WD OUT L_CF/WD OUT H_CF/WD CLOCK OUT L_CF/WD CLOCK OUT J6 32 33 35 34 36 37 38 39 40 41 43 42 47 48 50 49 1 2 3 J27/P27 CHASSIS GROUND INPUT DATA 00-31 64 HI LO HI EXTERNAL INTERRUPT ENABLE LO HI EXTERNAL INTERRUPT REQUEST LO HI INPUT DATA ACKNOWLEDGE LO HI INPUT DATA REQUEST LO J2 4J6 INPUT DATA 30 INPUT DATA 30 RTN INPUT DATA 31 INPUT DATA 31 RTN HI LO HI LO HI LO HI LO 86 87 90 91 89 88 93 92 J3 OUTPUT DATA 00-31 64 HI LO EXT INT ENB EXT INT ENB RTN EXT INT REQ EXT INT REQ RTN INPUT DATA ACK INPUT DATA ACK RTN INPUT DATA REQ INPUT DATA REQ RTN OUTPUT DATA 30 OUTPUT DATA 30 RTN OUTPUT DATA 31 OUTPUT DATA 31 RTN EXT FUNC AVAIL EXT FUNC AVAIL RTN EXT FUNC REQ EXT FUNC REQ RTN OUT DATA ACK OUT DATA ACK RTN OUTPUT DATA REQ OUTPUT DATA REQ RTN 1 2 3 4 19 20 9 10 21 22 11 12 15 16 17 18 23 24 5 6 26 25 7 8 ANEW I/O NOTE: ALL ODD PINS 1 THROUGH 49 ON PLUG 4J2 ARE AT CHASSIS GROUND CHASSIS GROUND H_CF IN L_CF IN H_CF CLOCK IN L_CF CLOCK IN H_CF/WD IN L_CF/WD IN H_CF/WD CLOCK IN L_CF/WD CLOCK IN H_CF OUT L_CF OUT H_CF_CLOCK OUT L_CF_ CLOCK OUT H_CF/WD OUT L_CF/WD OUT H_CF/WD CLOCK OUT L_CF/WD CLOCK OUT A1 SHOCK FRAME 4J5 2 3 5 4 7 8 10 9 12 13 15 14 17 18 20 19 1 6 11 16 4J2 2 4 6 8 10 12 14 16 18 26 32 36 38 40 42 44 46 48 50 20 22 24 28 30 34 CHASSIS GROUND C 64 4 DB 0_N DB 1_N DB 2_N DB 3_N DB 4_N DB 5_N DB 6_N DB 7_N DB P_N TERM PWR ATN_N BSY_N ACK_N RST_N MSG_N SEL_N C/D_N REQ_N I/O_N 50 PDC I/O 4J1 A4 P2 TRANSITION INTERFACE 4J4 VME BACKPLANE (P2) J202 A
40
4
18 J201 B
2 2
4 9 3 8 2 7 1 6
HI LO
2 2
64
J26/P26
1 1
3 8 4 9 1 6 2 7
HI LO
1 1
90 91 86 87 93 92 89 88
HI LO HI LO HI LO HI LO OUTPUT DATA REQUEST OUTPUT DATA ACKNOWLEDGE EXTERNAL FUNCTION REQUEST EXTERNAL FUNCTION
HI LO HI LO HI LO HI LO
D E
NOTE
1 2 3 4 5 6
SEE TABLE 9C-1 FOR PIN # TO SIGNAL NAME. SEE TABLE 9C-2 FOR PIN # TO SIGNAL NAME. SEE TABLE 9C-3 FOR PIN # TO SIGNAL NAME. SEE TABLE 9C-4 FOR PIN # TO SIGNAL NAME. RDSS UNITS WITH ST 2600 M-O DRIVE INSTALLED. RDSS UNITS WITH ST 5200 M-O DRIVE INSTALLED. 60 60 INPUT DATA 00-29 OUTPUT DATA 00-29
9C-4
Figure 9C-4. RDSS Functional Signal Flow Diagram (Sheet 1 of 4)
NAVAIR 01-75PAC-12
(RACK D3) RDSS SHOCK FRAME A7 VME BACKPLANE (P2) A2P2 A A3 FILE MANAGER PROCESSOR A2 ANEW/PDC INTERFACE 2J1 PROCESSES NTDS-TYPE C (ANEW) AND SASP (PDC) CONTROL AND DATA SIGNALS AS DIRECTED BY THE A3 PROCESSOR OVER A COMMON VME P2 BUS AND THE I/O DATA INTERFACE CABLES ATTACHED TO J2 AND J3. DRIVE BAY
PROVIDES SUPPORT FOR FOUR SCSI II DEVICES WHICH OPERATE UNDER CONTROL OF THE A3 FILE MANAGER SCSI CONTROLLER/FORMATTER IN RESPONSE TO OPERATOR MENU SELECTIONS AND PROGRAMMED COMMANDS.
3
A3P2
FILE MANAGER PROCESSOR PROVIDES DIRECT CONTROL OF ALL RDSS FUNCTIONS INCLUDING: S INTERFACING OF ANEW AND PDC CONTROL AND DATA SIGNALS. SCSI II DRIVE CONTROLLER AND FORMATTER. MAINTAINS BIT AND OPERATIONAL FIRMWARE. 3J9 2 3 7 8 20
A1
M-O DRIVE (ST 2600)
4
B
SINGLE DENSITY SCSI DRIVE THAT FUNCTIONS TO EXTRACT, STORE, AND RETRIEVE MAGNETICALLY PROCESSED SYSTEM DIGITAL DATA, WHICH IT MAINTAINS ON A REWRITEABLE DUAL SIDED REMOVABLE MAGNETO-OPTICAL MEDIA. 2J2
S S
A2
M-O DRIVE (ST 5200)
SCSI CONTROL AND DATA SIGNALS ARE ROUTED VIA THE A4 P2 TRANSITION INTERFACE.
FUNCTIONS SAME AS M-O DRIVE A1 ABOVE.
A3 A4
RESERVED RESERVED
2 4 6 8 10 12 14 16 18 26 32 36 38 40 42 44 46 48 50 A7J1 DB 0_N DB 1_N DB 2_N DB 3_N DB 4_N DB 5_N DB 6_N DB 7_N DB P_N TERM PWR ATN_N BSY_N ACK_N RST_N MSG_N SEL_N INPUT DATA 00-29 OUTPUT DATA 00-29 C/D_N REQ_N I/O_N TX DATA RX DATA SIG GND DCD DTR
50
D E
60 60
9C-5
NAVAIR 01-75PAC-12
(RACK D3) RDSS
A5
FRONT PANEL
A3
KEYPAD
A1
DISPLAY CONTROLLER
A2
DISPLAY
THE KEYPAD MODULE ENCODES OPERATOR KEYPAD DEPRESSIONS WHICH ARE ROUTED TO THE A5A1 CONTROLLER MODULE FOR INTERFACING TO THE A3 FILE MANAGER PROCESSOR.
A3J1
A1J2
KEYPAD DATA
THE DISPLAY CONTROLLER FUNCTIONS AS AN ENCODER/DECODER INTERFACE CONTROL FOR THE KEYPAD AND DISPLAY MODULES. THE CONTROLLER REFORMATS DATA AND CONTROLS AS REQUIRED, AND THEN SENDS THE I/O DATA AND CONTROL SIGNALS EITHER TO THE A5A2 DISPLAY OR, THE A3 FILE MANAGER PROCESSOR, ACCORDINGLY.
A1J4
A2J1
DISPLAY DATA
THE DISPLAY MODULE PROCESSES CODED DISPLAY DATA FROM THE DISPLAY CONTROLLER, WHICH IT CONVERTS TO PIXALATED ALPHANUMERIC CHARACTERS ON A PLASMA DISPLAY TO FORM THE SYSTEM OPERATOR MENUS AND MESSAGES GENERATED BY THE A3 FILE MANAGER PROCESSOR.
2 A1J1
5 4
TX DATA RX DATA SIG GND DCD DTR
9C-6
NAVAIR 01-75PAC-12
Table 9C-1.
Central Computer
(OUTPUT DATA)
Central Computer Output/RDSS Input Data 00-29

RDSS (INPUT DATA)
Table 9C-2.
Central Computer
(INPUT DATA)
Central Computer Input/RDSS Output Data 00-29

RDSS (OUTPUT DATA) A2 ANEW/PDC INTERFACE
Table 9C-3. (A4) Transition Interface To A2 ANEW/PDC Interface Data and Control
P2 TRANSITION INTERFACE A2 ANEW/PDC SIGNAL NAME
Table 9C-4. (A4) Transition Interface To A3 File Manager Processor Data and Control
P2 TRANSITION INTERFACE A3 File Manager SIGNAL NAME
J26/P26
13 21 14 22 15 23 16 24 17 25 18 26 29 39 30 40 31 41 32 42 33 43 34 44 35 45 36 46 37 47 49 58 50 59 51 60 52 61 53 62 54 63 55 64 56 65 57 66 67 75 68 76 69 77 70 78 71 79 72 80
J3
8
A2 ANEW/PDC INTERFACE
Signal Name ANEW OUTPUT DATA BIT 00 OUTPUT DATA BIT 00 RTN OUTPUT DATA BIT 01 OUTPUT DATA BIT 01 RTN OUTPUT DATA BIT 02 OUTPUT DATA BIT 02 RTN OUTPUT DATA BIT 03 OUTPUT DATA BIT 03 RTN OUTPUT DATA BIT 04 OUTPUT DATA BIT 04 RTN OUTPUT DATA BIT 05 OUTPUT DATA BIT 05 RTN OUTPUT DATA BIT 06 OUTPUT DATA BIT 06 RTN OUTPUT DATA BIT 07 OUTPUT DATA BIT 07 RTN OUTPUT DATA BIT 08 OUTPUT DATA BIT 08 RTN OUTPUT DATA BIT 09 OUTPUT DATA BIT 09 RTN OUTPUT DATA BIT 10 OUTPUT DATA BIT 10 RTN OUTPUT DATA BIT 11 OUTPUT DATA BIT 11 RTN OUTPUT DATA BIT 12 OUTPUT DATA BIT 12 RTN OUTPUT DATA BIT 13 OUTPUT DATA BIT 13 RTN OUTPUT DATA BIT 14 OUTPUT DATA BIT 14 RTN OUTPUT DATA BIT 15 OUTPUT DATA BIT 15 RTN OUTPUT DATA BIT 16 OUTPUT DATA BIT 16 RTN OUTPUT DATA BIT 17 OUTPUT DATA BIT 17 RTN OUTPUT DATA BIT 18 OUTPUT DATA BIT 18 RTN OUTPUT DATA BIT 19 OUTPUT DATA BIT 19 RTN OUTPUT DATA BIT 20 OUTPUT DATA BIT 20 RTN OUTPUT DATA BIT 21 OUTPUT DATA BIT 21 RTN OUTPUT DATA BIT 22 OUTPUT DATA BIT 22 RTN OUTPUT DATA BIT 23 OUTPUT DATA BIT 23 RTN OUTPUT DATA BIT 24 OUTPUT DATA BIT 24 RTN OUTPUT DATA BIT 25 OUTPUT DATA BIT 25 RTN OUTPUT DATA BIT 26 OUTPUT DATA BIT 26 RTN OUTPUT DATA BIT 27 OUTPUT DATA BIT 27 RTN OUTPUT DATA BIT 28 OUTPUT DATA BIT 28 RTN OUTPUT DATA BIT 29 OUTPUT DATA BIT 29 RTN
Signal Name ANEW INPUT DATA BIT 00 INPUT DATA BIT 00 RTN INPUT DATA BIT 01 INPUT DATA BIT 01 RTN INPUT DATA BIT 02 INPUT DATA BIT 02 RTN INPUT DATA BIT 03 INPUT DATA BIT 03 RTN INPUT DATA BIT 04 INPUT DATA BIT 04 RTN INPUT DATA BIT 05 INPUT DATA BIT 05 RTN INPUT DATA BIT 06 INPUT DATA BIT 06 RTN INPUT DATA BIT 07 INPUT DATA BIT 07 RTN INPUT DATA BIT 08 INPUT DATA BIT 08 RTN INPUT DATA BIT 09 INPUT DATA BIT 09 RTN INPUT DATA BIT 10 INPUT DATA BIT 10 RTN INPUT DATA BIT 11 INPUT DATA BIT 11 RTN INPUT DATA BIT 12 INPUT DATA BIT 12 RTN INPUT DATA BIT 13 INPUT DATA BIT 13 RTN INPUT DATA BIT 14 INPUT DATA BIT 14 RTN INPUT DATA BIT 15 INPUT DATA BIT 15 RTN INPUT DATA BIT 16 INPUT DATA BIT 16 RTN INPUT DATA BIT 17 INPUT DATA BIT 17 RTN INPUT DATA BIT 18 INPUT DATA BIT 18 RTN INPUT DATA BIT 19 INPUT DATA BIT 19 RTN INPUT DATA BIT 20 INPUT DATA BIT 20 RTN INPUT DATA BIT 21 INPUT DATA BIT 21 RTN INPUT DATA BIT 22 INPUT DATA BIT 22 RTN INPUT DATA BIT 23 INPUT DATA BIT 23 RTN INPUT DATA BIT 24 INPUT DATA BIT 24 RTN INPUT DATA BIT 25 INPUT DATA BIT 25 RTN INPUT DATA BIT 26 INPUT DATA BIT 26 RTN INPUT DATA BIT 27 INPUT DATA BIT 27 RTN INPUT DATA BIT 28 INPUT DATA BIT 28 RTN INPUT DATA BIT 29 INPUT DATA BIT 29 RTN
2J1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60
J27/P27
13 21 14 22 15 23 16 24 17 25 18 26 29 39 30 40 31 41 32 42 33 43 34 44 35 45 36 46 37 47 49 58 50 59 51 60 52 61 53 62 54 63 55 64 56 65 57 66 67 75 68 76 69 77 70 78 71 79 72 80
J2
8 9 11 10 12 13 15 14 16 17 19 18 20 21 23 22 25 26 28 27 29 30 32 31 35 36 38 37 39 40 42 41 46 47 49 48 50 51 53 52 56 57 59 58 60 61 63 62 67 68 70 69 71 72 74 73 77 78 80 79
2J2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60
4J6
1 2 3 4 5 6 7 8 9 10 11 12 15 16 17 18 19 20 21 22 23 24 26 25
4J4
C13 A13 C12 A12 C11 A11 C10 A10 C09 A09 C08 A08 C06 A06 C05 A05 C04 A04 C03 A03 C02 A02 C01 A01
A2P2
C13 A13 C12 A12 C11 A11 C10 A10 C09 A09 C08 A08 C06 A06 C05 A05 C04 A04 C03 A03 C02 A02 C01 A01
ANEW
I_DATA30 I_DATA_RTN I_DATA31 I_DATA_31_RTN N_EFR N_EFR_RTN N_ODR N_ODR_RTN N_EIR N_EIR_RTN N_IDR N_IDR_RTN O_DATA30 O_DATA30_RTN O_DATA31 O_DATA31_RTN N_EIE N_EIE_RTN N_IDA N_IDA_RTN N_EFA N_EFA_RTN N_ODA N_ODA_RTN
4J2
2 4 6 8 10 12 14 16 18 32 36 38 40 42 44 46 48 50
4J1
A01 A02 A03 A04 A05 A06 A07 A08 A09 A10 A11 A12 A13 A14 A15 A16 A17 A18
A3P2
A01 A02 A03 A04 A05 A06 A07 A08 A09 A10 A11 A12 A13 A14 A15 A16 A17 A18
SCSI
DB00 DB01 DB02 DB03 DB04 DB05 DB06 DB07 DBP ATN BSY ACK RST MSG SEL C/D RED I/O
9 11 10 12 13 15 14 16 17 19 18 20 21 23 22 25 26 28 27 29 30 32 31 35 36 38 37 39 40 42 41 46 47 49 48 50 51 53 52 56 57 59 58 60 61 63 62 67 68 70 69 71 72 74 73 77 78 80 79
4J5
2 3 4 5 7 8 9 10 12 13 14 15 17 18 19 20
4J4
A32 C31 A31 C30 C29 A29 C28 A28 A27 C26 A26 C25 C24 A24 C23 A23
A2P2
A32 C31 A31 C30 C29 A29 C28 A28 A27 C26 A26 C25 C24 A24 C23 A23
PDC
H_CF_IN L_CF_IN L_CF_CLOCK_IN H_CF_CLOCK_IN H_CF / WD_IN L_CF / WD_IN L_CF / WD_CLOCK_IN H_CF / WD_CLOCK_IN H_CF_OUT L_CF_OUT L_CF_CLOCK_OUT H_CF_CLOCK_OUT H_CF / WD_OUT L_CF / WD_OUT L_CF / WD_CLOCK_OUT H_CF / WD_CLOCK_OUT
9C-7
NAVAIR 01-75PAC-12
START
INITIAL SETUP
D
WARNING
DO NOT LOOK INTO OR TRY TO VIEW WITH A MIRROR THE INSIDE OF THE M-O DRIVE. THE CLASS IIIB SEMICONDUCTOR LASER EMITS INVISIBLE RADIATION WHICH CAN CAUSE SERIOUS EYE DAMAGE. AC AND DC VOLTAGES UP TO 185 VOLTS ARE PRESENT ON REAR OF A5 FRONT PANEL DISPLAY. NEVER HANDLE COMPONENTS WITH POWER APPLIED TO THE RDSS SYSTEM. AC VOLTAGES UP TO 208 VAC RMS ARE PRESENT ON CABLE ASSEMBLY W1 AND AC CONNECTORS 1P1/1J1. NEVER HANDLE EXPOSED CABLES WITH POWER ON.
VERIFY THE 5 AMP COMPUTER (DC) CIRCUIT BREAKER ON DPS CIRCUIT BREAKER PANEL IS CLOSED (PUSHED IN).
PFL
STP
D DID THE MAIN MENU FAIL TO APPEAR WITHIN THE NORMAL 40-50 SECONDS? YES 4 NO 1
YES LOAD WRITE ENABLED M-0 MEDIA DESIGNATED AS SYSTEM TEST PROGRAM (STP) LOADER INTO M-O DRIVE 1. 1 LOAD WRITE ENABLED M-O MEDIA DESIGNATED AS PREFLIGHT LOADER (PFL) INTO M-O DRIVE 1. 1 SELECT CONFIGURATION FROM MAIN MENU. SELECT CONFIGURE TC AND SET CONFIGURATION AS FOLLOWS: ADDR DRV FILE BOF SELECT CONFIGURATION FROM MAIN MENU. SELECT CONFIGURE TC AND SET CONFIGURATION AS FOLLOWS: ADDR = 0 DRV = 1 FILE = STP BOF = YES 4 =0 =1 = STP = YES
VERIFY THE 5 AMP RDSS CIRCUIT BREAKER ON DPS CIRCUIT BREAKER PANEL IS CLOSED (PUSHED IN).
DID THE AUTOMATIC BIT FAIL TO DISPLAY (--) IN UPPER LH CORNER OF DISPLAY FOR 35 SECONDS?
CAUTION
VERIFY THE POWER RDSS CONTROL SWITCH ON THE TACCO POWER CONTROL PANEL IS ON (UP).
NO DID POWER ON INDICATOR FAIL TO ILLUMINATE GREEN WITH THE POWER SWITCH ON (UP)?
SHEET 3
YES
PLACE RDSS POWER SWITCH (SW1) ON TO START THE AUTOMATIC POWER UP BUILTIN TEST (BIT). SEE FIG. 4A-8 FOR SWITCH AND INDICATOR LOCATIONS. 1
2 NO SHEET 3
IF MAIN MENU IS DISPLAYED ON THE OPERATOR DISPLAY WITHIN 40 - 50 SECONDS, POWER UP BIT WAS SUCCESSFUL. TO VERIFY OR VIEW STORED TEST RESULTS, SELECT RDSS BUILT-IN TEST FROM MAIN MENU THEN SELECT BIT STATUS. IF YOU REACHED THIS POINT FOLLOWING A REPAIR ACTION, RUN ALL INTERNAL AND EXTERNAL BIT(S). 4
D 4 D
OBSERVE THE OPERATOR DISPLAY FOR PROPER SEQUENCING OF THE POWER UP AUTOMATIC BIT: 1. (-) UPPER LH CORNER (FOR 35 SECONDS). 2. S/W VERSION NUMBER (FOR 5 SECONDS). 3. MAIN MENU DISPLAYED AFTER 40-50 SECONDS (NO ERRORS). 4. BIT STATUS MENU DISPLAYED WHEN ERROR(S) ARE DETECTED DURING BIT.
IS THE RED OVER TEMP INDICATOR ILLUMINATED?
D PERFORM STP ROUTINES AS REQUIRED AT EACH CREW STATION USING THE CREW STATION MAINTENANCE MANUAL (CSMM).
YES IF M-O TEST MEDIA IS NO LONGER REQUIRED, SELECT EJECT DISK USING THE SHUTDOWN MENU. REMOVE MEDIA PROMPTLY OR IT WILL BE REMOUNTED. 4
3 NO SHEET 4
CONTAINS PARTS AND ASSEMBLIES SUSCEPTIBLE TO DAMAGE BY ELECTROSTATIC DISCHARGE (ESD). REFER TO NAVAIR 01-1A-23 (WP 005 00). A PROPERLY TESTED, MAINTAINED AND GROUNDED ESD WRIST STRAP SHALL BE WORN BY ANY PERSON THAT REMOVES OR REPLACES ANY MODULE. THE WRIST STRAP SHALL BE WORN DURING THE ENTIRE DISCONNECT/CONNECT PROCESS AND WHEN REMOVING AND REPLACING ESD PROTECTIVE CONNECTOR CAPS. FULLY CONFIGURED RDSS WILL WEIGH OVER 70 LBS AND WILL REQUIRE A TWO PERSON TEAM TO REMOVE/REPLACE AND/OR TROUBLESHOOT SAFELY. NEVER REMOVE OR REPLACE ANY SCSI DRIVE OR CABLE WITH POWER APPLIED AS SERIOUS DAMAGE WILL OCCUR TO RDSS UNIT OR SCSI UNIT. INTERRUPTION OF POWER TO THE RDSS CAUSED BY RESETTING THE RDSS POWER SWITCH, RDSS CIRCUIT BREAKER OR PWR DIST CIRCUIT BREAKER WITH M-O DISK MOUNTED WILL CORRUPT THE DISK. ADDITIONALLY, THE M-O DISK MAY BE CORRUPTED BY AN EXTENDED POWER TRANSIENT CAUSED BY AIRCRAFT POWER SOURCE SWITCHING. IF RDSS IS POWERED DOWN FOR ANY REASON WITH M-O DISK MOUNTED, DEPRESS AND HOLD EJECT SWITCH (SEE FIGURE 9C-10 OR 9C-11.) WHILE APPLYING POWER. THIS WILL CAUSE THE M-O DISK TO EJECT UPON RDSS POWER UP.
NOTES
D THE ANEW TEST JUMPER MUST BE INSTALLED BETWEEN J2 AND J3 PRIOR TO RUNNING EXTERNAL ANEW BIT. THE PDC TEST JUMPER MUST BE INSTALLED ON J6 PRIOR TO RUNNING THE EXTERNAL PDC BIT.
DID THE M-O MEDIA FAIL TO LOAD SUCCESSFULLY WITHIN 15 SECONDS?
YES
4 OPEN DRIVE BAY AND INSERT M-O TEST MEDIA INTO DRIVE 1 (ISO FORMATTED AND WRITE ENABLED). OBSERVE THAT DRIVE BEZEL LED IS ILLUMINATED A STEADY GREEN (SUCCESSFUL COMPLETION OF DRIVE SELF-TEST DIAGNOSTIC AND MOUNTING SEQUENCE). 1 2 NO SHEET 4
IF RDSS OPERATION IS NO LONGER REQUIRED, SELECT SHUTDOWN FUNCTION FROM SHUTDOWN MENU TO STOP ALL PROGRAMS AND EJECT ANY MOUNTED MEDIA. 4
AT CENTRAL COMPUTER MAINTENANCE PANEL (MP), LOAD AND PERFORM PFL PROGRAM. (SEE SECTION 2.)
UPON COMPLETION OF STP DIAGNOSTIC TESTING, GO TO RDSS SHUTDOWN MENU AND PERFORM THE DISK EJECT ROUTINE TO REMOVE MEDIA AS REQUIRED. 4
1 2 3 4 5
SEE RDSS MAGNETO-OPTICAL CARTRIDGE LOADING PROCEDURES. SEE RDSS TEST POINT CHARTS/LOCATIONS. SEE RDSS MODULE CONFIGURATIONS. SEE SHEETS 6-8 INTERACTIVE RDSS MENU OPTIONS. SEE RDSS MODULE LOCATION DIAGRAM. SEE NAVAIR 01-75PAC-2-5 FOR REMOVAL AND INSTALLATION PROCEDURES FOR RDSS AND SELECTED SUB-ASSEMBLIES. SLOT 1 RESERVED FOR INSTALLATION OF ST 2600 M-O DRIVE SLOT 2 RESERVED FOR INSTALLATION OF ST 5200 M-O DRIVE
END AUTO BIT
5 SHEET 3
END PFL
END STP
6 7 8
9C-8
Figure 9C-5. RDSS Troubleshooting Procedures (Sheet 1 of 8)
NAVAIR 01-75PAC-12
INITIAL SETUP (Continued)
TMS DATA EXTRACT SASP AOP SASP STP SASP DIAG
LOAD WRITE ENABLED M-O MEDIA DESIGNATED AS TACTICAL MISSION SOFTWARE (TMS) LOADER INTO M-O DRIVE 1. 1
VERIFY STP M-O MEDIA IS MOUNTED IN DRIVE 1. LOAD WRITE ENABLED/ FORMATTED MEDIA TO BE USED FOR DATA EXTRACT INTO M-O DRIVE 1. 1 LOAD M-O MEDIA DESIGNATED AS AIRBORNE OPERATIONAL PROGRAM (AOP) INTO M-O DRIVE 1. LOAD M-O MEDIA DESIGNATED AS SASP STP INTO M-O DRIVE 1. 1
SELECT CONFIGURATION FROM MAIN MENU. SELECT CONFIGURE TC AND SET CONFIGURATION AS FOLLOWS: ADDR = 0 DRV = 1 FILE = TMS 4 BOF = YES
SELECT CONFIGURATION FROM MAIN MENU. SELECT CONFIGURE TC AND SET CONFIGURATION AS FOLLOWS: ADDR = 1 DRV = 1 FILE = EXTRACT 4 BOF = YES
SELECT CONFIGURATION FROM MAIN MENU. SELECT CONFIGURE SASP AND SET CONFIGURATION AS FOLLOWS: ADDR = 0 DRV = 1 FILE = AOP 4 BOF = YES
SELECT CONFIGURATION FROM MAIN MENU. SELECT CONFIGURE SASP AND SET CONFIGURATION AS FOLLOWS: ADDR = 0 DRV = 1 FILE = STP 4
SC DIAG
DF DIAG
AU DIAG
FROM SASP LOAD MENU, SELECT SASP DIAGNOSTICS. 4
SET UP THE CENTRAL COMPUTER. (SEE SECTION 2)
MEDIA IS NOW AVAILABLE FOR DATA EXTRACTION.
FROM MAIN MENU, SELECT SASP LOAD. 4
FROM MAIN MENU SELECT SASP LOAD. 4
FROM SASP DIAGNOSTICS MENU, SELECT RUN SC. 4
FROM SASP DIAGNOSTICS MENU, SELECT RUN DF. 4
FROM SASP DIAGNOSTICS MENU, SELECT RUN AU. 4
SELECT OPERATION TO BE PERFORMED BY ANSWERING NUMERIC CUES AT THE TACCO AND SENSOR STATION 3 CONSOLES.
UPON COMPLETION OF DATA EXTRACT PROCESS, GO TO RDSS SHUTDOWN MENU AND PERFORM THE DISK EJECT ROUTINE TO REMOVE MEDIA AS REQUIRED. 4
FROM SASP LOAD MENU, SELECT RUN AOP. 4
FROM SASP LOAD MENU, SELECT RUN STP. 4
FROM SC DIAGNOSTICS MENU, SELECT MENU OPTION 1, 2, 3, 9, 0 AS REQUIRED TO 4 COMPLETE TEST.
FROM DF DIAGNOSTICS MENU, SELECT MENU OPTION 1, 2, 3, 9, 0 AS REQUIRED TO 4 COMPLETE TEST.
FROM AU DIAGNOSTICS MENU, SELECT MENU OPTION 1, 2, 3, 9, 0 AS REQUIRED TO 4 COMPLETE TEST.
UPON COMPLETION OF PREFLIGHT/TMS OPERATIONS GO TO RDSS SHUTDOWN MENU AND PERFORM THE DISK EJECT ROUTINE TO REMOVE MEDIA AS REQUIRED. 4
FOLLOW SASP AOP PROCEDURES IN NAVAIR 01-75PAC-11-6-5.
FOLLOW SASP STP SETUP PROCEDURES IN NAVAIR 01-75PAC-12-8.
FOLLOW SASP DIAGNOSTICS PROCEDURES FOUND IN NAVAIR 01-75PAC-12-9.
END TMS
END DATA
END AOP
END STP
END SC DIAG
END DF DIAG
END AU DIAG
9C-9
NAVAIR 01-75PAC-12
SHEET 1 1
FAULT ISOLATION
SHEET 1 2
OBSERVE OPERATOR DISPLAY FOR MESSAGES: 1. SOFTWARE VERSION 2. TEST IN PROGRESS 3. MAIN MENU
POWER UP AUTO BIT HAS COMPLETED WITHOUT DETECTING A FAULT IN THE PRIMARY RDSS LOGIC.
WITH BIT STATUS MENU DISPLAYED, DETERMINE AND RECORD ALL FAILED BIT(S). BIT STATUS (EXAMPLES) TEST STATUS 7 CPU PASSED/FAILED INT ANEW PASSED/FAILED INT PDC PASSED/FAILED DRIVE 1 PASSED/FAILED DRIVE 2 NOT FOUND DRIVE 3 NOT FOUND DRIVE 4 NOT FOUND EXT ANEW NOT TESTED EXT PDC NOT TESTED 9-GO TO PREV MENU 0-GO TO MAIN MENU (A3) (A2) (A2) (A7A1) (A7A2) (A7A3) (A7A4) (A2) (A2) MODULE 8
SELECT RUN ALL BIT FROM INTERNAL BIT MENU TO TEST THE CPU AND ANY RECORDED AUTO BIT FAULTS OR ANY UNTESTED M-O DRIVE. 4
HAS THE RDSS POWER SWITCH/ CIRCUIT BREAKER TRIPPED TO THE OFF (DOWN) POSITION? NO
YES
IS MAIN MENU DISPLAYED ON OPERATOR DISPLAY? 4 NO
YES VERIFY BIT STATUS RESULTS BY SELECTING RDSS BUILT-IN TEST FROM MAIN MENU THEN SELECT BIT STATUS. 4
FROM THE MAIN MENU, SELECT RDSS BUILT-IN TEST.
(A3) (A2) (A2) (A7A2) (A7A3) (A7A4) (A7A1) (A2) (A2) DID THE (RUN ALL) BIT FAIL TO RETURN TO INTERNAL BIT MENU WITHIN 2.5 MINUTES? NO
OBSERVE THE TIME METER FOR AN HOUR GLASS ON THE LH SIDE OF DISPLAY, FLASHING AT A 1 HERTZ RATE. NOTE: TIME METER RUNS ON 115 VAC FROM RDSS POWER CABLE W1.
MOVE POWER SWITCH TO FULL OFF (DOWN) POSITION. AFTER WAITING 2 TO 5 MINUTES, PLACE SWITCH ON (UP) AND RELEASE. OBSERVE THE POWER READY INDICATOR FOR STEADY GREEN.
IS BIT STATUS MENU DISPLAYED ON OPERATOR DISPLAY? 4 NO
YES
YES
SHEET 1 5
IS OPERATOR DISPLAY BLANK?
YES
SELECT BIT STATUS MENU AND RECORD ALL FAILED BIT(S) AND COMPARE THESE FAILURES WITH ANY RECORDED RESULTS. TO VERIFY THAT THE RDSS HAS POWER, OBSERVE THESE INDICATIONS: 1. M-O DRIVE HAS GREEN BEZEL LED AND LOADS M-O MEDIA (5, 12 VDC REQUIRED). 2. INTAKE/EXHAUST FANS RUN (--12 VDC REQUIRED). 3. OBSERVE TIME METER FOR A FLASHING HOUR-GLASS SYMBOL ON LH SIDE (CHECKS 115 VAC INPUT). SHUT DOWN RDSS, PLACE POWER SWITCH OFF (DOWN). RESTORE RDSS POWER AND OBSERVE THE DISPLAY. IF DISPLAY IS BLANK OR TEST PATTERN IS ABNORMAL, SHUTDOWN RDSS. RESTORE JUMPER TO POSITION 2 (A5A1). REPLACE THE FRONT PANEL ASSEMBLY (A5). 3 6 RESTORE RDSS POWER AND RUN ALL INTERNAL BITS(S) TO VERIFY LOGIC FOR: (A2) ANEW/PDC INTERFACE (A3) FILE MANAGER PROCESSOR (CPU) (A7A1) M-O DRIVE EXTERNAL BIT(S) FOR: (A2) ANEW (REQUIRES EXTERNAL JUMPER) (A2) PDC (REQUIRES EXTERNAL JUMPER. 3 4 4
NO
IF TIME METER IS BLANK OR HOUR GLASS IS NOT FLASHING, CHECK CONTROLS: 1. TACCO POWER CONTROL (RDSS) POWER SWITCH ON. 2. RDSS AC 5 AMP BREAKER ON DPS CB PANEL IN (ON). 3. COMPUTER DC 5 AMP BREAKER ON DPS CB PANEL IN (ON). 4. RDSS AC POWER PLUG J1 IS CONNECTED (RH SIDE).
IS THE POWER SWITCH ON (UP) AND IS THE GREEN POWER INDICATOR ILLUMINATED?
YES
NO
IF AUTO BIT SEEMS TO BE RUNNING IN A LOOP, ATTEMPT TO STOP IT BY DEPRESSING 0 AND ENTER. IF THIS DOES NOT CAUSE THE SYSTEM TO STOP AT THE MAIN MENU, PERFORM AN EMERGENCY SHUTDOWN BY PLACING RDSS POWER SWITCH OFF. NOTE: ANY MOUNTED M-O MEDIA WILL NOT BE EJECTABLE UNTIL RDSS POWER IS RESTORED.
REMOVE RDSS USING PROPER SAFETY PRECAUTIONS. 6 VERIFY CPU OPERATION TO VALIDATE ALL SUBSEQUENT BIT(S) THAT ARE USED TO ISOLATE FAULTS BOTH SUSPECTED AND THOSE DETECTED BY THE INTERNAL/EXTERNAL BIT(S) STORED IN LOGIC OF A3 FILE MANAGER PROCESSOR. 4 IF ALL POWER CONTROL CHECKS APPEAR NORMAL, REPLACE RDSS. 6
WITH AID OF A SECOND PERSON, DETACH FRONT PANEL ASSY FROM THE ENCLOSURE. DO NOT DISCONNECT 6 CABLES.
START SHEET 1
IF ALL CONDITIONS ABOVE ARE NORMAL, THE OPERATOR DISPLAY APPEARS DEFECTIVE.
WHILE SECOND PERSON SUPPORTS FRONT PANEL ASSY, MOVE JUMPER ON A5A1 (CONTROLLER) FROM POSITION 2 TO POSITION 6. 3
RESTORE RDSS POWER AND OBSERVE DISPLAY. IF DISPLAY IS STILL MALFUNCTIONING, REPLACE THE A3 FILE MANAGER PROCESSOR. 3 6 END BIT PFL
REPLACE A6 LOW VOLTAGE POWER SUPPLY (LVPS). REPLACE RDSS UNIT IF POWER SWITCH/CIRCUIT BREAKER CONTINUES TO FAIL TO MAINTAIN POWER DURING A SUBSEQUENT POWER UP. 6
CPU BIT SHEET 6
START
START
END CHKS
SHEET 1
SHEET 1
SHEET 1
9C-10
NAVAIR 01-75PAC-12
SHEET 1 3
FAULT ISOLATION (Continued)

SHEET 1
4 DID EITHER INTAKE FAN (B1/B2) FAIL TO FUNCTION NORMALLY ? IF A MENU IS DISPLAYED, SELECT SHUTDOWN MENU. EXECUTE SHUTDOWN OPTION AND REMOVE ANY EJECTED M-O MEDIA PROMPTLY. POWER OFF RDSS AFTER OBSERVING COOLING FANS FOR FUNCTIONALITY. 4
YES
REPLACE RDSS. 6 INSPECT EXHAUST AIR/EMI FILTER (RH SIDE I/O PANEL OF RDSS ENCLOSURE) FOR EXCESSIVE DIRT OR PHYSICAL DAMAGE.
NO
START SHEET 1
DID EITHER EXHAUST FAN (B3/B4) FAIL TO FUNCTION NORMALLY ?
IS THE BEZEL LED ON FRONT PANEL OF M-O DRIVE EXTINGUISHED? 2
YES
YES
REPLACE RDSS. 6
NO
NO
IF DISPLAY IS BLANK, TURN RDSS POWER SWITCH OFF.
INSPECT INTAKE AIR/EMI FILTER (DRIVE BAY DOOR) FOR EXCESSIVE DIRT OR PHYSICAL DAMAGE. CLEAN OR REPLACE AS APPLICABLE.
START SHEET 1
IS THE EXHAUST AIR/EMI FILTER DAMAGED OR CLOGGED BEYOND REPAIR ? NO
YES
REMOVE M-O MEDIA FROM DRIVE AND REVERSE SIDES. ATTEMPT TO LOAD MEDIA AGAIN. VERIFY MEDIA LOADING IS WITHIN THE 15 SECOND LOAD SEQUENCE. 4
6 SHEET 5
ALLOW RDSS A MINIMUM OF 5 MINUTES FOR CASE TOP TO COOL TO TOUCH, THEN RESTORE RDSS POWER.
IS THE INTAKE AIR/ EMI FILTER DAMAGED OR UNCLEANABLE ?
YES
SHUTDOWN RDSS AND REPLACE INTAKE AIR/ EMI FILTER WITH NEW FILTER ASSEMBLY. 6
IF OVERTEMP INDICATOR CONTINUES TO REMAIN ON AFTER FORCED COOLING PERIODS AND THE REPLACEMENT OF AIR/EMI FILTERS, TEMP SENSOR IS SUSPECTED TO HAVE FAILED. REPLACE RDSS. 6
DID THE MEDIA LOAD WITHIN THE 15 SECOND DRIVE MOUNTING (LOADING) SEQUENCE?
YES
NO NO START
INSPECT COOLING FANS: 1. OPEN DRIVE BAY DOOR AND OBSERVE INTAKE FANS B1/B2 THROUGH RH SIDE OF DRIVE BAY MOUNT ASSY. BOTH FANS SHOULD BE RUNNING AT THE SAME SPEED. 2. OBSERVE EXHAUST FANS ON RH SIDE OF RDSS (MOUNTED INTERNALLY WITHIN THE ENCLOSURE ASSEMBLY). 5
SHEET 1
HAVE ALL FOUR COOLING FANS FAILED TO OPERATE? YES
NO
SUSPECT FAILED -12 VDC TO FANS. SHUTDOWN THE RDSS AND REPLACE A6 LOW VOLTAGE POWER SUPPLY (LVPS). IF PROBLEM PERSISTS, REPLACE THE RDSS. 6
SHUTDOWN RDSS AND REPLACE EXHAUST AIR/EMI FILTER ON EXTERIOR RH SIDE OF ENCLOSURE. 5 6
IF MEDIA CONTINUALLY FAILS TO LOAD, REPLACE TEST MEDIA WITH KNOWN GOOD MEDIA. REPEAT LOAD SEQUENCE WHILE OBSERVING DRIVE STATUS LED(S). 1 2
START SHEET 1
START SHEET 1
START SHEET 1
8 SHEET 5
7 SHEET 5
9C-11
NAVAIR 01-75PAC-12
7 SHEET 4 6 SHUTDOWN RDSS USING THE SHUTDOWN MENU AND REMOVE THE MEDIA. TURN POWER SWITCH OFF (DOWN). REMOVE DRIVE FROM SLOT 1 AND DUMMY WEIGHT FROM SLOT 3. RE-INSTALL DRIVE IN SLOT 3 AND DUMMY WEIGHT IN SLOT 1. MOUNT DRIVE BAY BACK IN THE SHOCK FRAME AFTER CABLES HAVE BEEN SECURED. NOTE: IN SINGLE SCSI DEVICE SYSTEMS, IT IS NOT NECESSARY TO ALTER THE TERMINATOR JUMPER. 3 DOES STATUS LED CONDITION INDICATE M-O DRIVE FAILURE? 2 NO 4 6 SHUTDOWN RDSS USING THE SHUTDOWN MENU AND REMOVE THE MEDIA. TURN POWER SWITCH OFF (DOWN). REMOVE DRIVE FROM SLOT 2 AND DUMMY WEIGHT FROM SLOT 3. RE-INSTALL DRIVE IN SLOT 3 AND DUMMY WEIGHT IN SLOT 2. MOUNT DRIVE BAY BACK IN THE SHOCK FRAME AFTER CABLES HAVE BEEN SECURED. NOTE: IN SINGLE SCSI DEVICE SYSTEMS, IT IS NOT NECESSARY TO ALTER THE TERMINATOR JUMPER. 3 4 6 FROM RDSS BUILT-IN TEST MENU, SELECT INTERNAL BIT. FROM RDSS BUILT-IN TEST MENU, SELECT INTERNAL BIT. 7 EXCHANGE TEST MEDIA WITH KNOWN GOOD DISK. 8 SHEET 4 SHEET 4 8
FROM MAIN MENU, SELECT RDSS BUILT-IN TEST.
4 YES DID THE REPLACEMENT MEDIA FAIL TO LOAD WITHIN 15 SECONDS LIMIT? NO 4
YES
SHUTDOWN THE SYSTEM FROM THE SHUTDOWN MENU AND REMOVE ANY EJECTED M-O MEDIA. IF MEDIA WILL NOT EJECT VIA THE MENU, DEPRESS THE M-O DRIVE FRONT PANEL EJECT SWITCH. THIS WILL EJECT ANY UNMOUNTED MEDIA (NOT UNDER SYSTEM CONTROL). THE EJECTED MEDIA SHOULD BE REMOVED. 1 4
POWER ON RDSS AND AFTER BEZEL LED ILLUMINATES STEADY GREEN, LOAD TEST M-O MEDIA INTO THE SUSPECT DRIVE. SELECT DRIVE TEST FROM INTERNAL BIT MENU. RUN DRIVE TEST (TESTS ALL READY DRIVES WITH A MOUNTED FORMATTED M-O MEDIA). REVIEW TESTS RESULTS IN BIT STATUS MENU.
FROM INTERNAL BIT MENU, SELECT DRIVE TEST.
FROM INTERNAL BIT MENU, SELECT DRIVE TEST. 4
PERFORM DRIVE TEST BIT TO CONFIRM READINESS OF M-O DRIVE. 4
4 AT COMPLETION OF DRIVE TEST, OBSERVE BIT STATUS MENU.
DID DRIVE FAIL TO PERFORM THE DRIVE BIT SUCCESSFULLY IN NEW DRIVE SLOT? NO
YES
AT COMPLETION OF DRIVE TEST, OBSERVE BIT STATUS MENU.
IF PROBLEMS ARE STILL SUSPECTED, SELECT INTERNAL BIT MENU AND EXECUTE RUN ALL BIT. CONFIRM STATUS RESULTS OF TESTS BY SELECTING BIT STATUS MENU. 4
POWER DOWN RDSS. RETURN DRIVE AND DUMMY WEIGHT TO ORIGINAL SLOTS. VERIFY DRIVE AND BAY ARE SECURELY CONNECTED IN SHOCK FRAME BEFORE POWER IS RESTORED. RETEST RDSS AS REQUIRED. 4 6
REPLACE DEFECTIVE M-O DRIVE. CONFIGURE NEW M-O DRIVE JUMPERS, INSTALL AND SECURE REPLACEMENT DRIVE IN THE ORIGINAL SLOT. IF M-O DRIVE CONTINUES TO FAIL, REPLACE: 1. A3 FILE MANAGER PROCESSOR (CPU). 2. RDSS.
DID DRIVE TEST FAIL? DID DRIVE TEST FAIL? YES NO
YES
SHUTDOWN RDSS AND REPLACE THE SUSPECT M-O DRIVE. RETEST USING THE DRIVE TEST INTERNAL BIT. IF PROBLEMS ARE STILL SUSPECTED, REPLACE: 1. A3 FILE MANAGER PROCESSOR (CPU). 2. A6 LOW VOLTAGE POWER SUPPLY 3. RDSS. RETEST SYSTEM USING THE RUN ALL INTERNAL BIT TO VERIFY THE OPERATIONAL READINESS OF THE REPLACEMENT RDSS UNIT. 3 4 6
NO
END DRIVE BIT 1

SHEET 1
START SHEET 1
END DRIVE TEST
END DRIVE TEST
START
START
SHEET 1
SHEET 1
9C-12
NAVAIR 01-75PAC-12
INTERACTIVE RDSS MENUS
CPU BIT INT ANEW INT PDC EXT ANEW EXT PDC DISK EJECT SYSTEM SHUTDOWN
NOTE
AT TOP OR BOTTOM OF DISPLAY INDICATES ADDITIONAL INFORMATION OR SELECTIONS ARE AVAILABLE BY SCROLLING IN THAT DIRECTION WITH CORRESPONDING KEYPAD KEY.
MAIN MENU 1 - SHUTDOWN 2 - CONFIGURATION 3 - SASP LOAD 4 - RDSS BUILT-IN TEST 5 - DRIVE STATUS 6 - UTILITIES
1 4 7
2 5 8 0
3 6 9
ENTER
RDSS BUILT-IN TEST 1 - PANEL BIT 2 - INTERNAL BIT 3 - EXTERNAL BIT 4 - BIT STATUS 0 - GO TO MAIN MENU
SHUTDOWN 1 - EJECT DISK 2 - SHUTDOWN 0 - GO TO MAIN MENU
KEYPAD LEGEND
SCROLLS MENU SELECTION BAR UP OR DOWN TO SELECT OPTION (LINE BY LINE). SCROLLS SECTION CURSOR LEFT OR RIGHT TO SELECT SPECIFIC ITEM OF A LINE OR MESSAGE (ITEM BY ITEM). ASTERISK IS USED TO TOGGLE DISPLAY TEST PATTERNS AND MESSAGES.
INTERNAL BIT 1 - RUN ALL 2 - RUN INTERNAL ANEW 3 - RUN INTERNAL PDC 4 - DRIVE TEST 9 - GO TO PREV MENU 0 - GO TO MAIN MENU
EXTERNAL BIT
EXTERNAL BIT
1 - RUN INTERNAL ANEW 2 - RUN INTERNAL PDC 9 - GO TO PREV MENU 0 - GO TO MAIN MENU
0-9 ENTER
NUMBER KEY SECTION OF INDEXED MENU OPTIONS. ENTER KEY EXECUTES THE HIGHLIGHTED COMMAND, RESPONSE OR NUMERIC SELECTION.
BIT STATUS CPU PASSED/FAILED INT ANEW PASSED/FAILED INT PDC PASSED/FAILED DRIVE 1 PASSED/FAILED/NO DISK DRIVE 2 NOT FOUND DRIVE 3 NOT FOUND DRIVE 4 NOT FOUND EXT ANEW NOT TESTED EXT PDC NOT TESTED 9 - GO TO PREV MENU 0 - GO TO MAIN MENU
BIT STATUS CPU NOT TESTED INT ANEW PASSED/FAILED INT PDC NOT TESTED DRIVE 1 NOT TESTED DRIVE 2 NOT TESTED DRIVE 3 NOT TESTED DRIVE 4 NOT TESTED EXT ANEW NOT TESTED EXT PDC NOT TESTED 9 - GO TO PREV MENU 0 - GO TO MAIN MENU
BIT STATUS CPU NOT TESTED INT ANEW NOT TESTED INT PDC PASSED/FAILED DRIVE 1 NOT TESTED DRIVE 2 NOT TESTED DRIVE 3 NOT TESTED DRIVE 4 NOT TESTED EXT ANEW NOT TESTED EXT PDC NOT TESTED 9 - GO TO PREV MENU 0 - GO TO MAIN MENU
BIT STATUS CPU NOT TESTED INT ANEW NOT TESTED INT PDC NOT TESTED DRIVE 1 NOT TESTED DRIVE 2 NOT TESTED DRIVE 3 NOT TESTED DRIVE 4 NOT TESTED EXT ANEW PASSED/FAILED EXT PDC NOT TESTED 9 - GO TO PREV MENU 0 - GO TO MAIN MENU
BIT STATUS CPU NOT TESTED INT ANEW NOT TESTED INT PDC NOT TESTED DRIVE 1 NOT TESTED DRIVE 2 NOT TESTED DRIVE 3 NOT TESTED DRIVE 4 NOT TESTED EXT ANEW NOT TESTED EXT PDC PASSED/FAILED 9 - GO TO PREV MENU 0 - GO TO MAIN MENU
SHUTDOWN SEQUENCE 1. SYSTEM WILL CLOSE ALL OPEN USER FILES AND TERMINATES THE DATA EXTRACTION PROCESS ONCE OPERATOR CONFIRMS THIS TASK. 2. UNMOUNTS AND EJECTS ALL MOUNTED M-O MEDIA. 3. OPERATOR SHOULD REMOVE ANY EJECTED M-O MEDIA. 4. OPERATOR PLACES RDSS POWER SWITCH OFF (DOWN).
EJECT DISK ON DRIVE XXX
9 - GO TO PREV MENU 0 - GO TO MAIN MENU
9C-13
NAVAIR 01-75PAC-12
INTERACTIVE RDSS MENUS (Continued)
DRIVE BIT INTERNAL KEYPAD BIT INTERNAL PANEL BIT DRIVE STATUS DRIVE UTILITIES S/W UPGRADE UTILITIES
RDSS BUILT-IN TEST 1 - PANEL BIT 2 - INTERNAL BIT 3 - EXTERNAL BIT 4 - BIT STATUS 0 - GO TO MAIN MENU 1
DRIVE STATUS 2 3 4 RDG - - - - - - - - 0 - GO TO MAIN MENU LEGEND: RDG = READING WRT = WRITING IDLE = AWAITING CMD (------) = NOT DETECTED
UTILITIES UTILITIES 1 - DISK UTILITIES 2 - RDSS S/W UPGRADE 0 - GO TO MAIN MENU 1 - DISK UTILITIES 2 - RDSS S/W UPGRADE 0 - GO TO MAIN MENU NOTE: PRIOR TO SELECTING THIS OPTION, INSERT M-O DISK CONTAINING FIRMWARE UPGRADE INTO DRIVE 1.
PANEL BIT 1 - DISPLAY TEST 2 - KEYBOARD TEST 9 - GO TO PREV MENU 0 - GO TO MAIN MENU
PANEL BIT 1 - DISPLAY TEST 2 - KEYBOARD TEST 9 - GO TO PREV MENU 0 - GO TO MAIN MENU INSERT WRITE ENABLED DISK IN DRIVE 1. CONFIGURE FORMAT DISK AS DRIVE 1.
DISK UTILITIES 1 - FORMAT DISK 2 - COPY DISK
***WARNING*** THE RDSS PROGRAM WILL BE REPLACED. DO YOU WANT TO PROCEED? NO YES TO UPGRADE, SELECT YES AND DEPRESS ENTER.
BIT STATUS CPU NOT TESTED INT ANEW NOT TESTED INT PDC NOT TESTED DRIVE 1 PASSED/FAILED/NO DISK DRIVE 2 NOT FOUND DRIVE 3 NOT FOUND DRIVE 4 NOT FOUND EXT ANEW NOT TESTED EXT PDC NOT TESTED 9 - GO TO PREV MENU 0 - GO TO MAIN MENU
KEYBOARD STARTING AT TOP OF KEYPAD, DEPRESS EACH KEY (ONCE) AND OBSERVE THE CHARACTER/SYMBOL DISPLAYED MATCHES THE KEY DEPRESSED. THE ENTER KEY EXITS TEST. IF RESPONSE IS INCORRECT, REPLACE A5 FRONT PANEL ASSEMBLY THEN, A3 FILE MANAGER PROCESSOR (CPU). IF PROBLEM PERSISTS, REPLACE RDSS UNIT. 6
* TO TOGGLE SCREEN ENTER TO EXIT
FORMAT DISK ON DRIVE 1 9 - GO TO PREV MENU 0 - GO TO MAIN MENU
SINGLE DRIVE COPY INSERT SOURCE DISK IN DRIVE 1. CONFIGURE COPY DISK; FROM DRIVE (1 ) AND TO DRIVE (1). PRESS ENTER TO START COPY. FOLLOW DISPLAYED MESSAGES TO EXCHANGE SOURCE DISK WITH FORMATTED TARGET DISK. 0 TO 22 SECS READ: RDSS S/W UPGRADE IN PROGRESS. CYCLE POWER IF RDSS MAIN MENU DOES NOT APPEAR IN 3 MINS. 22 TO 68 SECS READ: READING IMAGE. IMAGE LENGTH XXXXXX (Vx.x) PROGRAMMING FLASH 68 TO 100 SECS READ: RDSS VERSION X.X ANEW REV X.X PDC REV X.X AT 115 SECONDS, OBSERVE THE BIT STATUS MENU INDICATES PASSED.
* TO TOGGLE SCREEN ENTER TO EXIT REPLACE A5 FRONT PANEL ASSEMBLY, THEN A3 FILE MANAGER PROCESSOR (CPU) TO CORRECT PROBLEM. IF PROBLEM PERSISTS, REPLACE RDSS UNIT. 6 COPY DISK FROM DRIVE 1 TO DRIVE 1 9 - GO TO PREV MENU 0 - GO TO MAIN MENU
REPLACE M-O DRIVE. IF THE REPLACEMENT DRIVE FAILS, REPLACE THE A3 FILE MANAGER PROCESSOR (CPU). PERFORM ALL INTERNAL BIT(S). REPLACE RDSS IF ANY BIT FAILS. 6
START SHEET 1
START SHEET 1
START SHEET 1
9C-14
NAVAIR 01-75PAC-12
CFG TC CFG SASP CFG IP ADDR SASP LOAD/ DIAG SASP LOAD/ DIAG SASP LOAD/ DIAG
CONFIGURATION 1 - CONFIGURE TC 2 - CONFIGURE SASP 3 - CONFIGURE IP ADDR 4 - TEXT INTENSITY HI 0 - GO TO MAIN MENU
SASP LOAD 1 - RUN AOP 2 - RUN STP 3 - SASP DIAGNOSTICS 4 - RUN AOP NO 2 0 - GO TO MAIN MENU
CONFIGURE TC ADDR 0 1 2 3 DRV 1 XXX XXX XXX FILE STP XXXXXX XXXXXX XXXXXX BOF YES ------ADDR 0 1 2 3
CONFIGURE SASP DRV 1 XXX XXX XXX FILE STP XXXXXX XXXXXX XXXXXX BOF YES -------
CONFIGURE IP ADDR CURRENT IP ADDRESS : 192.168.235.13 ENTER NEW ADDRESS : YYY.YYY.YYY.YY WHERE Y = RDSS IP UPDATE ADDRESS
SASP DIAGNOSTICS 1 - RUN SC 2 - RUN DF 3 - RUN AU 9 - GO TO PREV MENU 0 - GO TO MAIN MENU
SC DIAGNOSTICS 1 - CONTINUE 2 - REPEAT/VERIFY 3 - RE-START 9 - GO TO PREV MENU 0 - GO TO MAIN MENU
DF DIAGNOSTICS 1 - CONTINUE 2 - REPEAT/VERIFY 3 - RE-START 9 - GO TO PREV MENU 0 - GO TO MAIN MENU
AU DIAGNOSTICS 1 - CONTINUE 2 - REPEAT/VERIFY 3 - RE-START 9 - GO TO PREV MENU 0 - GO TO MAIN MENU
9C-15
NAVAIR 01-75PAC-12
TEST POINT CHARTS / LOCATIONS
STATUS
A6 LOW VOLTAGE POWER SUPPLY (LVPS)
SCON FUSE VME
A3 FILE MANAGER PROCESSOR
ABORT SWITCH RESET SWITCH
A6 LVPS +5 SUPPLY
REAR + _12 SUPPLY
DS1
1 TB1 8 1 TB2 8
DS2
DS3
DS4
OOOOOOOOO OOOOOOOOO
OOOOOOOOO OOOOOOOOO
FAIL
SERIAL PORT 2 (J9)
SERIAL PORT 1 (J15)
TB1 TEST POINTS

PIN # SIGNAL NAME 1 5 VDC 2 5 VDC 3 5 VDC 4 5 VDC 5 5 VDC 6 GROUND 7 GROUND 8 GROUND
TB2 TEST POINTS

PIN # SIGNAL NAME 1 12 VDC 2 12 VDC GROUND 3 GROUND 4 GROUND 5 GROUND 6 -12 VDC 7 -12 VDC 8
RUN LAN FAIL STATUS RUN SCON LAN MANUAL EJECT SWITCH EJECT SWITCH FUSE SCSI VME
STATUS INDICATORS
OFF - NORMAL OFF - NORMAL ON - NORMAL ON - NORMAL ON - NORMAL ON - NORMAL ON - NORMAL ON - NORMAL ON - FAILURE ON - FAILURE OFF - INACTIVE OFF - FAILURE OFF - INACTIVE OFF - FAILURE OFF - INACTIVE OFF - INACTIVE FLASHING - ACTIVE FLASHING - ACTIVE FLASHING - ACTIVE FLASHING - ACTIVE
SCSI
MAGNETO-OPTICAL DRIVE (ST 2600) (FRONT) (REAR)
JA3 19 oooooooooo oooooooooo 1 JA2
JA1
J1
49 1 4 1 ooooooooooooooooooooooooo O O O O ooooooooooooooooooooooooo
WARNING
AC VOLTAGES OF 208 VOLTS (RMS) ARE PRESENT IN RDSS POWER AC POWER CABLING (W1SW1 AND J1 AC INPUT).
DRIVE STATUS LED

STATUS LED ON-RED-FLASHING ON-GREEN-STEADY ON-GREEN-FLICKERING ON-ORANGE-STEADY ON-ORANGE-FLICKERING OFF MEANING DRIVE HAS DETECTED A SELF DIAGNOSTIC ERROR. THE DRIVE SHOULD BE REPLACED. DRIVE IS READY/IDLE. DRIVE IS EXECUTING A COMMAND. DRIVE HOLDS WRITE DATA IN BUFFER MEMORY. DRIVE IS EXECUTING COMMAND AND HOLDS WRITE DATA IN BUFFER MEMORY. DRIVE IS NOT READY.
READY LED (GREEN) -- BEZEL INDICATOR STATUS LED (GREEN/RED/ORANGE) -- HIDDEN INDICATOR (BEHIND BEZEL) POWER STATUS LED (AMBER) -- HIDDEN INDICATOR (BEHIND BEZEL)
DC INPUT POWER
NOTE
J1 INPUT POWER CONNECTOR
PIN # 1 2 3 4 VOLTAGE 12 VDC 0.6 VDC GROUND (12 VDC RETURN) GROUND (5 VDC RETURN) 5 VDC 0.25 VDC M-O DRIVE STATUS LED(S) MAY BE OBSERVED WHEN OPERATOR VIEWS LED(S) FROM BELOW, STANDING AT RIGHT HAND SIDE OF DRIVE. A CARTRIDGE MUST BE MOUNTED TO ACTIVATE LOGIC.
CAUTION
REMOVE M-O CARTRIDGE (DISK) FROM CARTRIDGE LOAD BAY BEFORE REMOVING DRIVE BAY ASSEMBLY OR DRIVE FOR INSPECTION, REPLACEMENT.
9C-16
Figure 9C-6. RDSS Test Point Charts/Locations (ST 2600 M-O Drive Installed)
NAVAIR 01-75PAC-12
STATUS SCON
FUSE VME ABORT SWITCH RESET SWITCH
A6 LVPS +5 SUPPLY
REAR + SUPPLY _12
DS1
1 TB1 8 1 TB2 8
DS2
DS3
DS4
OOOOOOOOO OOOOOOOOO
OOOOOOOOO OOOOOOOOO
FAIL
SERIAL PORT 2 (J9)
SERIAL PORT 1 (J15)
TB1 TEST POINTS

TB2 TEST POINTS

RUN LAN FAIL STATUS RUN SCON
STATUS INDICATORS
SCSI
MAGNETO-OPTICAL DRIVE (ST 5200) (FRONT)

SCSI ADDRESS ID JUMPER
1
LAN FUSE
(REAR)
JA2 24 49 JA1 1 4 J1 1 oooooooooooo oooooooooooo ooooooooooooooooooooooooo O O O O ooooooooooooooooooooooooo
SCSI VME
DC INPUT POWER
WARNING
DRIVE STATUS LED

DRIVE STATUS LED (MULTICOLOR) -- RED/GREEN/ORANGE READY LED (GREEN) -- MOUNTED/UNMOUNTED MANUAL EJECT -- HIDDEN RELEASE (BEHIND BEZEL) EJECT BUTTON
CAUTION
JA2 SCSI INDICATOR (ID)
SCSI ID # 0 1 2 3 4 PIN 1-2 PIN 3-4 PIN 5-6 OUT OUT OUT IN OUT OUT OUT IN OUT IN IN OUT OUT OUT IN

PIN # 1 2 3 4 VOLTAGE 12 VDC 0.6 VDC GROUND (12 VDC RETURN) GROUND (5 VDC RETURN) 5 VDC 0.25 VDC REMOVE M-O CARTRIDGE (DISK) FROM CARTRIDGE LOAD BAY BEFORE REMOVING DRIVE BAY ASSEMBLY OR DRIVE FOR INSPECTION, REPLACEMENT.
Figure 9C-7. RDSS Test Point Charts/Locations (ST 5200 M-O Drive Installed)
9C-17
NAVAIR 01-75PAC-12
A7A1 M-O DRIVE 1
ST 2600 OR DUMMY WEIGHT
A7A2 M-O DRIVE 1
B3 EXHAUST FAN
DUMMY WEIGHTS
B4 EXHAUST FAN
DRIVE BAY DOOR
A9 REAR COVER/EMI SHIELD
A2 ANEW/PDC INTERFACE A3 FILE MANAGER PROCESSOR (CPU) A6 LOW VOLTAGE POWER SUPPLY (LVPS) A5A1 DISPLAY CONTROLLER EXHAUST AIR/EMI FILTER
INTAKE AIR/EMI FILTER
1 4 7 2 5 8 0 3 6 9
ENTER
A5 FRONT PANEL
A5A2 PLASMA DISPLAY
NOTE
1 2 USE SLOT 1 IF ST 2600 INSTALLED USE SLOT 2 IF ST 5200 INSTALLED
A5A3 KEYPAD
9C-18
Figure 9C-8. RDSS Module Location Diagram (Sheet 1 of 2)
NAVAIR 01-75PAC-12
SHOCK ISOLATOR
A9 REAR COVER
B1/B2 INTAKE FANS
9999.9
+ + W1M1 RUNTIME METER + W3DS2 OVERTEMP INDICATOR W3DS1 POWER INDICATOR
8J1
DETAIL - D A8 ETHERNET TRANSCEIVER

1
A7A1 M-O DRIVE 1 (ST 2600) OR DUMMY WEIGHT
DETAIL - A STATUS INDICATOR PANEL
DETAIL D
UP -- POWER ON
DUMMY WEIGHTS
DOWN -- OFF/TRIPPED OVERTEMP SENSOR W2SW1
DETAIL - B W1SW1 POWER SWITCH/CIRCUIT BREAKER SHOCK ISOLATORS
RH SIDE A1 SHOCK FRAME
J6 PDC I/O J5 ETHERNET LAN OUT

* 1 4 7 2 5 8 0
J4 ETHERNET LAN IN
3 6 9
ENTER
J3 ANEW FROM HOST J2 ANEW TO HOST
J5
PDI J4 ANEW/PDI J1 CPU
J6
ANEW
P2
P1 ........................ ........................ ........................ ........................ ........................ ........................ ........................ ........................
DETAIL - A J2 SCSI J3 ETHERNET
J1 POWER INPUT J5 RH J2 J3 J6 J4 J1
LH
DETAIL - B -
A6
A6
DETAIL - C A4 TRANSITION INTERFACE

DETAIL - C -
REAR - A1 SHOCK FRAME -
Figure 9C-8. RDSS Module Location Diagram (Sheet 2 of 2)
9C-19
NAVAIR 01-75PAC-12
INDEX NUMBERS 1
CONTROL MAGNETO-OPTICAL DRIVE BAY ACCESS DOOR
FUNCTION FILTERS AIR SUPPLY TO SCSI DRIVES AND INTERNAL COMPONENTS, PROTECTING THEM FROM DAMAGE DURING NORMAL OPERATIONS. DOOR PROVIDES EASY ACCESS TO DRIVES DURING PREFLIGHT, OPERATIONAL OR DIAGNOSTIC PROGRAM LOADING AND ROUTINE SYSTEM MAINTENANCE. PROVIDES INTERACTIVE INPUT COMMAND AND RESPONSE CONTROL OF THE SYSTEM DURING NORMAL OPERATIONS AND MAINTENANCE TEST SEQUENCES. PLASMA DISPLAY IS USED TO DISPLAY CONTROL AND STATUS MENUS ALONG WITH OPERATIONAL AND FAULT ERROR MESSAGES. THE STANDARD MENUS STORED IN FILE MANAGER PROCESSOR PROM: MAIN MENU CONFIGURATION SASP LOAD SASP AU/SC/DF DIAGNOSTIC SASP/TC CONFIGURATION EJECT DISK RDSS BUILT-IN TEST BIT STATUS PANEL-DISPLAY BIT PANEL-KEYPAD BIT RDSS S/W UPGRADE UTILITIES STARTUP/SHUTDOWN INTERNAL ANEW BIT INTERNAL PDC BIT DRIVE TEST DRIVE STATUS FORMAT/COPY DISK EXTERNAL ANEW BIT EXTERNAL PDC BIT
KEYPAD
MAIN MENU 1-SHUTDOWN 2-CONFIGURATION 3-SASP LOAD 4-RDSS BUILT-IN TEST 5-DRIVE STATUS 6-UTILITIES
DISPLAY
9999.9
1 4 7
2 5 8 0
3 6 9
ENTER
TIME METER
LCD DISPLAY SHOWS THE TOTAL ACCUMULATED SYSTEM OPERATING TIME WHENEVER THE POWER SWITCH SW1 IS ON AND AC POWER IS AVAILABLE TO POWER CABLE W1. SWITCH SW1 CONTROLS POWER TO THE RDSS SYSTEM: IT PROVIDES AUTOMATIC POWER CUTOFF DUE TO EXCESSIVE SYSTEM CURRENT DEMAND. ILLUMINATES RED WHEN THE INTERNAL TEMPERATURE EXCEEDS 68 C AND REMAINS ON UNTIL THE TEMPERATURE FALLS TO ABOUT 63 C. ILLUMINATES GREEN WHEN POWER SWITCH SW1 IS SET TO ON POSITION AND THE 5 VDC POWER SUPPLY OUTPUT HAS REACHED A NOMINAL VALUE.
5 6 7
POWER ON/OFF SWITCH - CIRCUIT BREAKER OVERTEMP INDICATOR POWER ON INDICATOR
9C-20
Figure 9C-9. RDSS Maintenance Controls and Indicators
NAVAIR 01-75PAC-12
MAGNETO-OPTICAL (M-O) DRIVE SETUP PROCEDURES
CARTRIDGE LOADING
1. PERFORM INITIAL RDSS SETUP (SEE RDSS TROUBLESHOOTING PROCEDURES). 2. INSPECT MEDIA FOR DAMAGE, PROPER TYPE, AND WRITE PROTECTION SWITCH SETTING (ENABLE IF BLANK PRE-FORMATTED MEDIA IS BEING USED FOR TESTING OR DATA EXTRACTION). 3. OPEN DRIVE BAY DOOR TO EXPOSE M-O DRIVE FRONT PANEL FOR OBSERVATION WHILE LOADING. 4. PLACE RDSS POWER SWITCH ON (UP) TO INITIALIZE RDSS BIT AND POWER UP M-O DRIVE. 5. WAIT 6 - 8 SECONDS WHILE THE DRIVE SELF-TEST DIAGNOSTIC IS BEING PERFORMED. 6. INSERT BLANK CARTRIDGE INTO DRIVE CARTRIDGE LOAD BAY AND OBSERVE READY LED BEZEL INDICATOR IS ILLUMINATED (GREEN) WITHIN 15 SECONDS. 7. REFER TO TROUBLESHOOTING PROCEDURES FOR DRIVE TESTING AND DISK UTILITIES.
WARNING
DO NOT LOOK INSIDE THE M-O DRIVE OR USE A MIRROR TO LOOK INSIDE THE DRIVE. THE DRIVE CONTAINS A CLASS IIIB SEMICONDUCTOR LASER DIODE WHICH EMITS INVISIBLE LASER RADIATION THAT CAN CAUSE EYE DAMAGE
CAUTION D
DO NOT INSERT DAMAGED MEDIA OR TOOLS INTO DRIVE AS MECHANISMS OR OTHER COMPONENTS CAN BE DAMAGED BY TOOLS, MEDIA AND/OR STATIC ELECTRICITY.
Optical Disk Cartridge
DO NOT REMOVE ANY CIRCUIT BOARD FROM THE DRIVE OR USE THE DRIVE WITHOUT INSTALLING IN THE DRIVE BAY. NEVER REMOVE DRIVE OR COMPONENTS WHILE POWER IS APPLIED TO UNIT. THIS CAN CAUSE DAMAGE TO DRIVE AND/OR RDSS SYSTEM. THERE ARE NO USER SERVICEABLE PARTS, REPLACE DRIVE IF DEFECTIVE.
SIDE A
WRITE ENABLED
SIDE B
WRITE INHIBITED
CARTRIDGE UNLOADING
1. MOUNTED MEDIA (GREEN READY LED ILLUMINATED) - USE SHUTDOWN MENU TO SELECT AND ISSUE EJECT COMMAND (SEE FIGURE 9C-5). 2. MOUNTED MEDIA (GREEN READY LED EXTINGUISHED). PRESS DRIVE EJECT SWITCH. 3. MOUNTED MEDIA (POWER OFF). USE MANUAL EJECT SWITCH LOCATED BEHIND TAB (OPENING) ABOVE GREEN READY LED (BEZEL INDICATOR). TURN MANUAL EJECT SWITCH CCW TO EJECT M-O MEDIA.
WRITE-PROTECTION SWITCH
CAUTION
D D
DO NOT EXPOSE CARTRIDGES TO DUST, DIRT OR DIRECT SUNLIGHT, NEVER OPEN SHUTTER TO INSPECT MEDIA. STORE CARTRIDGES IN PROTECTIVE CASE (AWAY FROM AIR CONDITIONERS) IN AN AREA WITH A RELATIVE HUMIDITY (RH) OF 5% TO 90% AND A TEMPERATURE BETWEEN 10_ C AND 55_ C.
D
M-O CARTRIDGE (DISK) LOAD BAY
CARTRIDGES MUST BE STORED IN A VERTICAL OR HORIZONTAL POSITION ONLY (IN PROTECTIVE CASE), NEVER STACK UNCASED CARTRIDGES. STACK CASED CARTRIDGES A MAXIMUM OF 5 HIGH.
D D D
MANUAL EJECT SWITCH EJECT SWITCH STATUS LED (GREEN/RED/ORANGE) - HIDDEN INDICATOR READY LED (GREEN) - BEZEL INDICATOR POWER STATUS LED (AMBER) - HIDDEN INDICATOR
DO NOT TURN DRIVE POWER ON OR OFF DURING CARTRIDGE LOADING OR EJECTION. THIS CAN DAMAGE DRIVE/MEDIA. ALWAYS REMOVE EJECTED MEDIA (CARTRIDGE) FROM DRIVE THEN, STORE IN PROTECTIVE CASE. REMOVE ALL MEDIA IF DRIVE IS TO BE MOVED. DO NOT ATTEMPT TO LOAD A DAMAGED CARTRIDGE IN A DRIVE THAT EMITS UNUSUAL SOUNDS, VIBRATIONS, OR HAS A FLASHING RED (READY) STATUS INDICATOR. EJECT THE MEDIA IMMEDIATELY IF ANY OF THESE CONDITIONS EXIST.
D D
ACTIVE SIDE OF MEDIA (CARTRIDGE) ALWAYS FACES DOWN WHEN BEING INSERTED INTO DRIVE. DO NOT REMOVE POWER FROM RDSS WITH M-O MEDIA INSERTED. MAGNETIC MEDIA CAN BE CORRUPTED.
Figure 9C-10. RDSS Magneto-Optical Drive Setup Procedure (ST 2600 M-O Drive Installed)
9C-21
NAVAIR 01-75PAC-12
CARTRIDGE LOADING
WARNING
DO NOT LOOK INSIDE THE M-O DRIVE OR USE A MIRROR TO LOOK INSIDE THE DRIVE. THE DRIVE CONTAINS A CLASS IIIB SEMICONDUCTOR LASER DIODE WHICH EMITS INVISIBLE LASER RADIATION THAT CAN CAUSE EYE DAMAGE.
CAUTION
SIDE A
CARTRIDGE UNLOADING
1. MOUNTED MEDIA (GREEN READY LED ILLUMINATED) - USE SHUTDOWN MENU TO SELECT AND ISSUE EJECT COMMAND (SEE FIGURE 9C-5). 2. MOUNTED MEDIA (GREEN READY LED EXTINGUISHED) - PRESS DRIVE EJECT SWITCH. 3. MOUNTED MEDIA (POWER OFF) - USE MANUAL EJECT SWITCH LOCATED BEHIND EJECT BUTTON. REMOVE EJECT BUTTON AND LOCATE MANUAL EJECT SCREW AT RH SIDE OF EJECT SWITCH. TURN MANUAL EJECT SWITCH CCW TO EJECT M-O MEDIA.
SIDE B
WRITE INHIBITED
WRITE ENABLED
CAUTION
D D
DO NOT EXPOSE CARTRIDGES TO DUST, DIRT OR DIRECT SUNLIGHT, NEVER OPEN SHUTTER TO INSPECT MEDIA. STORE CARTRIDGES IN PROTECTIVE CASE (AWAY FROM AIR CONDITIONERS) IN AN AREA WITH A RELATIVE HUMIDITY (RH) OF 5% TO 90% AND A TEMPERATURE BETWEEN 10_ C AND 55_ C.
D
LOAD BAY SHUTTER DOORS
CARTRIDGES MUST BE STORED IN A VERTICAL OR HORIZONTAL POSITION ONLY (IN PROTECTIVE CASE), NEVER STACK UNCASED CARTRIDGES. STACK CASED CARTRIDGES A MAXIMUM OF 5 HIGH.
D D
READY LED (GREEN)
DO NOT TURN DRIVE POWER ON OR OFF DURING CARTRIDGE LOADING OR EJECTION. THIS CAN DAMAGE DRIVE/MEDIA. ALWAYS REMOVE EJECTED MEDIA (CARTRIDGE) FROM DRIVE, THEN STORE IN PROTECTIVE CASE. REMOVE ALL MEDIA IF DRIVE IS TO BE MOVED.
D
DRIVE STATUS LED (GREEN/RED/ORANGE) MANUAL EJECT (BEHIND EJECT BUTTON RH SIDE) EJECT SWITCH/BUTTON M-O CARTRIDGE (DISK)
DO NOT ATTEMPT TO LOAD A DAMAGED CARTRIDGE IN A DRIVE THAT EMITS UNUSUAL SOUNDS, VIBRATIONS, OR HAS A FLASHING RED (READY) STATUS INDICATOR. EJECT THE MEDIA IMMEDIATELY IF ANY OF THESE CONDITIONS EXIST.
D D
9C-22
Figure 9C-11. RDSS Magneto-Optical Drive Setup Procedure (ST 5200 M-O Drive Installed)
NAVAIR 01-75PAC-12
Front of M-O Drive
WARNING
JP3
REMOVE POWER FROM RDSS BEFORE REMOVING, REPLACING OR ATTEMPTING TO RECONFIGURE MODULES.
(REAR)
NOTE: JP6 JP2 JP4 ALL FILLED BLOCKS INDICATE JUMPER IS INSTALLED OR DIP SWITCH IS SET.
CAUTION
P1 P2
E68 E66
D D
CONTAINS PARTS AND ASSEMBLIES SUSCEPTIBLE TO DAMAGE BY ELECTROSTATIC DISCHARGE (ESD). REFER TO NAVAIR 01-1A-23 (WP 005 00). A PROPERLY TESTED, MAINTAINED AND GROUNDED ESD WRIST STRAP SHALL BE WORN BY ANY PERSON THAT REMOVES OR REPLACES ANY MODULE. THE WRIST STRAP SHALL BE WORN DURING THE ENTIRE DISCONNECT/CONNECT PROCESS AND WHEN REMOVING AND REPLACING ESD PROTECTIVE CONNECTOR CAPS.
E45
E35
JP1
JA3 1 19 oooooooooo oooooooooo JA2
JA1
J1
E36
E26
E65
E55
D
JA1 JA2 20 JA3 2
ALL JUMPERS ON MODULES ARE PRESET AT THE FACTORY AND SHOULD NOT BE CHANGED. BECAUSE OF THE DELICATE NATURE OF JUMPERS AND PINS, EXTREME CAUTION SHOULD BE USED IN REMOVAL AND INSTALLATION OF JUMPERS.
D
DUMMY WEIGHTS (REMOVE ONLY TO INSTALL A SCSI DEVICE)
E1 E2 E3
J1
50
E56
E46 E23 E25 E20
NOTES: (1) ALL FILLED BLOCKS INDICATE JUMPER IS INSTALLED (2) NOT ALL COMPONENTS ARE SHOWN
Bottom View
E24 E21
E19 E18
+ +
J2
J1
+ + + + + +
+ + + +
A2 ANEW/ PDC INTERFACE
P1
+ +
P2
1 2
J20
1 3 5
J26
3 4
+ +
J25
2 4 6
J21
1 2 3
LVPS
NOTES: (1) ALL FILLED BLOCKS INDICATE JUMPER IS INSTALLED (2) DS1 - FAIL/STATUS (3) DS2 - RUN/SCON (4) DS3 - LAN/FUSE (5) DS4 - SCSI/VME
J6
J24
2 1
A5A3
7 6 5 4 3 2 1
J2
KEYPAD J4 DISPLAY CONTROLLER
J12
2 1 2 4
J22
1 J17 J18 15
1 14
J23
ABORT RESET
13
1 2 1 J9
J1
J11
3 4 3
J5 J4 DS1 DS2 DS3 DS4
16
A5A1 A5A2 FRONT PANEL (REAR)
J1 I/O INTERFACE
DISPLAY
+
J3 POWER
1 14
13 25
25
J15
SERIAL PORT 2
SERIAL PORT 1
Top of Front Panel

TOP
A3 FILE MANAGER PROCESSOR (CPU)
Figure 9C-12. RDSS Module Configuration Diagram (ST 2600 M-O Drive Installed)
+
2
9C-23
NAVAIR 01-75PAC-12
Front of M-O Drive
WARNING
NOTE: JA2 JUMPER PINS 1-24 ARE FACTORY SET AND SHOULD NOT BE REDEFINED BY USER. 1
CAUTION
P1
E45 E35 E68 E66
P2
JA2 23 49
(REAR)
JA1 1 4
D
J1 1
oooooooooooo oooooooooooo
ooooooooooooooooooooooooo O O O O ooooooooooooooooooooooooo
E36
E26
E65
E55
8 SW1
DC INPUT POWER
D D
J1
JA1
50 24
JA2
E1 E2 E3
E56
E46 E23 E25 E20
E24 E21
E19 E18
J2
J1
+ + + + + +
+ + + + + +
P1
1 2 1 2 3 4 1 3 5
P2 J20 J21
2 4 6 1 2 3
J26
+ +
J25
LVPS
J6
J24
2 1
A5A3
7 6 5 4 3 2 1
J2
J12
2 1 2 4
J22
1 J17 J18 15
1 14
J23
ABORT RESET
13
1 2 1 J9
J1
J11
3 4 3
16
J1 I/O INTERFACE
DISPLAY
1 14
13 25
25
J15
J3 POWER
SERIAL PORT 2
SERIAL PORT 1
Top of Front Panel
TOP
9C-24
Figure 9C-13. RDSS Module Configuration Diagram (ST 5200 M-O Drive Installed)
+
2
SECTION 9D
REPLACEMENT DATA STORAGE SYSTEM
SECTION 9D REPLACEMENT DATA STORAGE SYSTEM
NAVAIR 01-75PAC-12
(RACK D2) CP-2451/ASQ-227(V) DIGITAL DATA COMPUTER (DDC) (SEE SECTION 4B) J2 ETHERNET J4
(RACK D3) 9700822 REPLACEMENT DATA STORAGE SYSTEM (RDSS)
(RACK D3) CD-155/ASQ-227(V) VIDEO DISTRIBUTION CONTROLLER (VDC) (SEE SECTION 4C) J41 ETHERNET J5
(TACCO STATION) TACCO POWER CONTROL (SEE NAVAIR 01-75PAC-12-2)

POWER CONTROL
VDC OV TEMP VDC ARM/ORD PNL DDC
OFF SEI RDSS
OFF BARO ALT
OFF RDR VIDEO
OFF
OFF
OFF
OFF
ANT COMB
MINI DAMA
MATT
OASIS TDP
1J1
OFF OFF OFF OFF
(RACK D1) DPS ELECTRONIC CIRCUIT BREAKER PANEL (SEE NAVAIR 01-75PAC-12-2)
2J8 RDSS ON
(RACK D1) A511 POWER DISTRIBUTION BOX (SEE NAVAIR 01-75PAC-12-2)
2J7 RDSS 2J9 A B C 5A PWR DIST BOX DC 5A 28 VDC 115 VAC A 115 VAC B 115 VAC C 115 VAC A 115 VAC B 115 VAC C
J1
Figure 9D-1. RDSS Signal Flow Diagram
9D-1
NAVAIR 01-75PAC-12
(RACK D3) RDSS A1 INTERNAL SHOCK FRAME ASSEMBLY -12 VDC B3 EXHAUST FAN
A7
DRIVE BAY ASSEMBLY A7A1 (M-O DRIVE 1)
FAN TRAY (INTAKE)
CARD CAGE (VME)
1
B1 INTAKE FAN
P2
RESERVED B4 EXHAUST FAN
THIS SLOT USED FOR ST2600 M-O DRIVE
P2
RESERVED
P2
RESERVED ANEW J2 NOT USED WITH ETHERNET CONFIGURED AIRCRAFT
A7A2
(M-O DRIVE 1)
P2
RESERVED
ANEW
THIS SLOT USED FOR ST5200 M-O DRIVE
B2
INTAKE FAN A2 ANEW/PDC INTERFACE ANEW ANEW A8 ETHERNET TRANSCEIVER ETHERNET
J3
NOT USED WITH ETHERNET CONFIGURED AIRCRAFT
P2
J4
A7A3
(RESERVED)
ETHERNET CONNECTOR (CENTRAL COMPUTER)
J5 ETHERNET A4 A7A4 (RESERVED) -12 VDC P2 ETHERNET PDC DATA SCSI II 5, +12 VDC +12 VDC W2SW1 OVERTEMP SENSOR J6 P2 TRANSITION INTERFACE
ETHERNET CONNECTOR (VIDEO DISTRIBUTION CONTROLLER)
PROTEUS (PDC) CONNECTOR NOT USED WITH BMUP AIRCRAFT
OVERTEMP
5 VDC
A3 A5 FRONT PANEL ASSEMBLY P2 A5A2 DISPLAY DISPLAY DATA A5A1 DISPLAY CONTROLLER
FILE MANAGER PROCESSOR
A6
LVPS (5 VDC) (+12 VDC) (-12 VDC)
5 VDC
W1M1 RUNTIME METER
W3DS2 OVERTEMP INDICATOR
W3DS1 POWER ON INDICATOR
NOTE
1
ST 2600 INSTALLED ST 5200 INSTALLED
A5A3
KEYPAD KEYPAD DATA
VME BUS
CONTROL/DATA SHOCK FRAME DC PWR 115 VAC B W1SW1 AC POWER SWITCH/BRKR
J1 ENCLOSURE DC PWR AC PWR 115 VAC 3
115 VAC, 400Hz, 3 PHASE, WYE, INPUT POWER
9D-2
Figure 9D-2. RDSS Functional Block Diagram
NAVAIR 01-75PAC-12
(RACK D3) RDSS (RACK D2) DDC J6 H_CF IN L_CF IN H_CF CLOCK IN L_CF CLOCK IN H_CF/WD IN L_CF/WD IN H_CF/WD CLOCK IN (RACK D3) VDC NOT USED L_CF/WD CLOCK IN H_CF OUT L_CF OUT H_CF_CLOCK OUT L_CF_ CLOCK OUT A1 SHOCK FRAME A4J5 2 3 5 4 7 8 10 9 12 13 15 14 17 18 20 19 1 6 11 J2 16 A4J2 2 4 6 8 10 12 14 16 18 26 CHASSIS GROUND NOTE ALL ODD PINS 1-49 OF PLUG 4J2 ARE AT CHASSIS GROUND. NOT USED THE P2 TRANSITION MODULE IS MOUNTED ON THE REAR BACKPLANE IN THE MODULE CAGE. J3 IT IS PLUGGED INTO THE SLOTS CONTAINING THE PROCESSOR AND ANEW/PDC INTERFACE FACILITATES MODULES. MODULES AND CONNECTORS 32 36 38 40 42 44 46 48 50 20 22 24 28 30 34 A4J3 9 2 10 3 NOT USED 12 5 13 6 CC+ TT+ RR+ 12 VF GROUND ETHERNET 8 D DB 00 DB 01 DB 02 DB 03 DB 04 DB 05 DB 06 DB 07 DBPN TERM PWR ATN BSY ACK RST MSG SEL C/D REQ I/O 50 2 PDC I/O A4J1 18 2 J201 B A4 P2 TRANSITION INTERFACE A4J4 VME BACKPLANE (P2) 40 J202 A
NOTE
1
SEE TABLE 9D-1 (SHEET 4) (NOT USED IN AIRCRAFT INCORPORATING AFC 607)
H_CF/WD OUT L_CF/WD OUT H_CF/WD CLOCK OUT L_CF/WD CLOCK OUT
2 3 4
SEE TABLE 9D-2 (SHEET 4) M-O DRIVE 1 WHEN ST 2600 IS INSTALLED M-O DRIVE 1 WHEN ST 5200 IS INSTALLED
CHASSIS GROUND
FOR I/O CABLING FROM THESE
CHASSIS GROUND J41 ETHERNET J2 ETHERNET J4 ETHERNET 3 F J5 ETHERNET 3 E
Figure 9D-3. RDSS Functional Signal Flow Diagram (Sheet 1 of 4)
9D-3
NAVAIR 01-75PAC-12
(RACK D3) RDSS (CONT) SHOCK FRAME (CONT) A7 A2P2 A 40 A2 ANEW/ PDC INTERFACE DRIVE BAY
1
A3P2 A3 FILE MANAGER PROCESSOR THE FILE MANAGER PROCESSOR PROVIDES DIRECT CONTROL OF ALL RDSS FUNCTIONS INCLUDING: INTERFACING OF PDC CONTROL AND DATA SIGNALS, SCSI II DRIVE CONTROLLER AND FORMATTER, AND MAINTAINS BIT AND OPERATIONAL FIRMWARE. THE SCSI CONTROL AND DATA SIGNALS ARE ROUTED VIA THE A4 P2 TRANSITION INTERFACE.
PROCESSES NTDS-TYPE C (ANEW) AND SASP (PDC) CONTROL AND DATA SIGNALS AS DIRECTED BY THE A3 FILE MANAGER PROCESSOR OVER A COMMON VME P2 BUS.
PROVIDES SUPPORT FOR FOUR SCSI II DEVICES WHICH OPERATE UNDER CONTROL OF THE A3 FILE MANAGER PROCESSOR SCSI CONTROLLER/FORMATTER IN RESPONSE TO OPERATOR MENU SELECTIONS AND PROGRAMMED COMMANDS. A7A1 M-O DRIVE (ST 2600)
18
SINGLE DENSITY SCSI DRIVE THAT FUNCTIONS TO EXTRACT, STORE, AND RETRIEVE MAGNETICALLY PROCESSED SYSTEM DIGITAL DATA, WHICH IT MAINTAINS ON A REWRITEABLE DUAL SIDED REMOVABLE MAGNETO-OPTICAL MEDIA. A3J9 2 3 7 8 20 TX DATA RX DATA SIG GND DCD DTR
A8
ETHERNET TRANSCEIVER
CONVERTS ETHERNET I/O CONTROL AND DATA PACKETS FROM THE 15 PIN INTERFACE CABLE W5 FORMAT OF THE A4 MODULE TO A COAXIAL TYPE INTERFACE WHICH CONNECTS THE A8 TRANSCEIVER TO THE ETHERNET LAN VIA THE TWO COAXIAL INTERFACE CABLES. NOTE
A7A2
M-O DRIVE (ST 5200)
ONLY 8 OF THE 15 PINS OF THE CABLE CONNECTED BETWEEN A8J1 AND A4J3 ARE USED.
FUNCTIONS SAME AS M-O DRIVE A1 ABOVE.
A8J2 A8J1 A7A3 RESERVED I C O
A8J3 I C O
A7A4
RESERVED
COAX 2 4 6 8 10 12 14 16 18 26 32 36 38 40 42 44 46 48 50 A7J1 DB 00 DB 01 DB 02 DB 03 DB 04 DB 05 DB 06 DB 07 DBP TERM PWR ATN BSY ACK D 8 RST MSG SEL C/D REQ I/O ETHERNET
50
CC+ TT+ RR+ 12VF GND - DATA + DATA SHIELD 5
ETHERNET SHIELD + DATA - DATA
3 F
ETHERNET
9D-4
NAVAIR 01-75PAC-12
(RACK D3) RDSS
A5
FRONT PANEL
A5A3
KEYPAD
A5A1
DISPLAY CONTROLLER
A5A2
DISPLAY
THE KEYPAD MODULE ENCODES OPERATOR KEYPAD DEPRESSIONS WHICH ARE ROUTED TO THE A5A1 DISPLAY CONTROLLER MODULE FOR INTERFACING TO THE A3 FILE MANAGER PROCESSOR.
A3J1
A1J2
KEYPAD DATA
THE DISPLAY CONTROLLER FUNCTIONS AS AN ENCODER/DECODER INTERFACE CONTROL FOR THE KEYPAD AND DISPLAY MODULES. THE CONTROLLER REFORMATS DATA AND CONTROLS AS REQUIRED, THEN SENDS THE I/O DATA AND CONTROL SIGNALS TO EITHER THE A5A2 DISPLAY OR, THE A3 FILE MANAGER PROCESSOR ACCORDINGLY.
A1J4
A2J1
DISPLAY DATA
THE DISPLAY MODULE PROCESSES CODED DISPLAY DATA FROM THE DISPLAY CONTROLLER, WHICH IT CONVERTS TO PIXELATED ALPHANUMERIC CHARACTERS ON A PLASMA DISPLAY TO FORM THE SYSTEM OPERATOR MENUS AND MESSAGES GENERATED BY THE A3 FILE MANAGER PROCESSOR.
2 A1J1
5 4
TX DATA RX DATA SIG GND DCD DTR
9D-5
NAVAIR 01-75PAC-12
Table 9D-1. (A4) Transition Interface To (A2) ANEW/PDC Data and Control A2 ANEW/PDC A2P2 A32 C31 A30 C30 C29 A29 C28 A28 A27 C26 A26 C25 A24 A24 C23 A23 Signal Name PDC H_CF IN L_CF IN L_CF_CLOCK IN H_CF_CLOCK IN H_CF/WD_CLOCK IN L_CF/WD_CLOCK IN L_CF/WD_CLOCK IN H_CF/WD_CLOCK IN H CF OUT L_CF OUT L_CF_CLOCK OUT H_CF_CLOCK OUT H_CF/WD OUT L_CF/WD OUT L_CF/WD_CLOCK OUT H_CF/WD CLOCK OUT A4J2 2 4 6 8 10 12 14 16 18 32 36 38 40 42 44 46 48 50 A4J3 9 2 10 3 12 5 13 6 Table 9D-2. (A4) Transition Interface To (A3) File Manager Data and Control A3 ANEW/PDC A3P2 A01 A02 A03 A04 A05 A06 A07 A08 A09 A10 A11 A12 A13 A14 A15 A16 A17 A18 A3P2 C01 C02 C03 C04 C05 C12 C07 B02 Signal Name SCSI DB00 DB01 DB02 DB03 DB04 DB05 DB06 DB07 DBP ATN BSY ACK RST MSG SEL C/D REQ I/O Signal Name Ethernet C01 C02 C03 C04 C05 C12 C07 B02 C-C+ T-T+ R-R+ 12 VF GND
P2 Transition Interface A4J5 2 3 4 5 7 8 9 10 12 13 14 15 17 18 19 20 A4J4 A32 C31 A30 C30 C29 A29 C28 A28 A27 C26 A26 C25 C24 A24 C23 A23
P2 Transition Interface A4J1 A01 A02 A03 A04 A05 A06 A07 A08 A09 A10 A11 A12 A13 A14 A15 A16 A17 A18 A4J1
9D-6
NAVAIR 01-75PAC-12
(RACK D1) DPS ELECTRONIC CIRCUIT BREAKER PANEL
(RACK D3) RDSS
RDSS 115 VAC A B C 115 VAC A 115 VAC B 115 VAC C 2J9 ZY ZJ R 2J7 J1 E S T 115 VAC A 115 VAC B 115 VAC C D E F B NEUTRAL GROUND 2K2 CHASSIS GROUND C COM
A6 LOW VOLTAGE POWER SUPPLY W1SW1
6J1 1 2 3
5 VDC POWER SUPPLY PROVIDES DC LOGIC POWER FOR SHOCK FRAME ASSEMBLIES, ENCLOSURE LAMPS, AND SENSORS.
TB1 1 5 VDC
3 5A +12 VDC POWER SUPPLY PROVIDES DC LOGIC POWER FOR SHOCK FRAME ASSEMBLIES AND FRONT PANEL DISPLAY/KEYPAD MODULES.
5 VDC
PWR DIST BOX
DC 5A
28 VDC
HOURS M1 -12 VDC POWER SUPPLY PROVIDES DC POWER FOR ALL INTERNAL COOLING FANS. TB2 7 1 8 2 -12 VDC +12 VDC -12 VDC +12 VDC
(TACCO STATION) TACCO POWER CONTROL PANEL RDSS
DC POWER TO ENCLOSURE ASSEMBLIES 1J1 D RDSS ON 2J8 K DC POWER TO SHOCK FRAME ASSEMBLIES
DC OFF
Figure 9D-4. RDSS Power Distribution Diagram
9D-7
NAVAIR 01-75PAC-12
START
INITIAL SETUP D
WARNING
DO NOT LOOK INTO OR TRY TO VIEW WITH A MIRROR THE INSIDE OF THE M-O DRIVE. THE CLASS IIIB SEMICONDUCTOR LASER EMITS INVISIBLE RADIATION WHICH CAN CAUSE SERIOUS EYE DAMAGE. AC AND DC VOLTAGES UP TO 185 VOLTS ARE PRESENT ON REAR OF A5 FRONT PANEL DISPLAY. NEVER HANDLE COMPONENTS WITH POWER APPLIED TO THE RDSS SYSTEM. AC VOLTAGES UP TO 208 VAC RMS ARE PRESENT ON CABLE ASSEMBLY W1 AND AC CONNECTORS 1P1/1J1. NEVER HANDLE EXPOSED CABLES WITH POWER ON.
VERIFY THE 5 AMP
DDC (DC) CIRCUIT BREAKER ON DPS CIRCUIT BREAKER PANEL IS CLOSED (PUSHED IN).
D D
YES
VERIFY THE 5 AMP RDSS CIRCUIT BREAKER ON DPS CIRCUIT BREAKER PANEL IS CLOSED (PUSHED IN).
DID THE AUTOMATIC BIT FAIL TO DISPLAY (--) IN UPPER LH CORNER OF DISPLAY FOR 35 SECONDS?
DID THE MAIN MENU FAIL TO APPEAR WITHIN THE NORMAL 40-50 SECONDS? 4 YES NO
1 VERIFY THE POWER RDSS CONTROL SWITCH ON THE TACCO POWER CONTROL PANEL IS ON (UP). NO DID POWER ON INDICATOR FAIL TO ILLUMINATE GREEN WITH THE POWER SWITCH ON (UP)? SHEET 3 IF MAIN MENU IS DISPLAYED ON THE OPERATOR DISPLAY WITHIN 40 - 50 SECONDS, POWER UP BIT WAS SUCCESSFUL. TO VERIFY OR VIEW STORED TEST RESULTS, SELECT RDSS BUILT-IN TEST FROM MAIN MENU THEN SELECT BIT STATUS. IF YOU REACHED THIS POINT FOLLOWING A REPAIR ACTION, RUN ALL INTERNAL AND EXTERNAL BIT(S). 4
CAUTION D D
CONTAINS PARTS AND ASSEMBLIES SUSCEPTIBLE TO DAMAGE BY ELECTROSTATIC DISCHARGE (ESD). REFER TO NAVAIR 01-1A-23 (WP005 00). A PROPERLY TESTED, MAINTAINED AND GROUNDED ESD WRIST STRAP SHALL BE WORN BY ANY PERSON THAT REMOVES OR REPLACES ANY MODULE. THE WRIST STRAP SHALL BE WORN DURING THE ENTIRE DISCONNECT/CONNECT PROCESS AND WHEN REMOVING AND REPLACING ESD PROTECTIVE CONNECTOR CAPS. FULLY CONFIGURED RDSS WILL WEIGH OVER 70 LBS AND WILL REQUIRE A TWO PERSON TEAM TO REMOVE/REPLACE AND/OR TROUBLESHOOT SAFELY. INTERRUPTION OF POWER TO THE RDSS CAUSED BY RESETTING THE RDSS POWER SWITCH, RDSS CIRCUIT BREAKER OR PWR DIST BOX CIRCUIT BREAKER WITH THE M-O DISK MOUNTED WILL CORRUPT THE DISK. IF RDSS IS POWERED DOWN FOR ANY REASON WITH THE M-O DISK MOUNTED, DEPRESS AND HOLD EJECT SWITCH (SEE FIGURE 9D-10 OR 9D-11.) WHILE APPLYING POWER. THIS WILL CAUSE M-O DISK TO EJECT UPON RDSS POWER UP. NEVER REMOVE OR REPLACE ANY SCSI DRIVE OR CABLE WITH POWER APPLIED AS SERIOUS DAMAGE WILL OCCUR TO RDSS UNIT OR SCSI UNIT. NOTES THE ANEW TEST JUMPER MUST BE INSTALLED BETWEEN J2 AND J3 PRIOR TO RUNNING EXTERNAL ANEW BIT. THE PDC TEST JUMPER MUST BE INSTALLED ON J6 PRIOR TO RUNNING THE EXTERNAL PDC BIT. ON AIRCRAFT INCORPORATING AFC 607, ALL SASP MENUS MAY BE PRESENT BUT ARE INOPERABLE. TO LOAD OR TROUBLESHOOT THE APS SEE NAVAIR 01-75PAC-12-8. SEE RDSS MAGNETO-OPTICAL CARTRIDGE LOADING PROCEDURES. SEE RDSS TEST POINT CHARTS/LOCATIONS. SEE RDSS MODULE CONFIGURATIONS. SEE SHEETS 6-8 INTERACTIVE RDSS MENU OPTIONS. SEE RDSS MODULE LOCATION DIAGRAM. SEE NAVAIR 01-75PAC-2-5 FOR REMOVAL AND INSTALLATION PROCEDURES FOR RDSS AND SELECTED SUB-ASSEMBLIES. SLOT 1 RESERVED FOR INSTALLATION OF ST 2600 M-O DRIVE SLOT 2 RESERVED FOR INSTALLATION OF ST 5200 M-O DRIVE
YES
PLACE RDSS POWER SWITCH (SW1) ON TO START THE AUTOMATIC POWER UP BUILTIN TEST (BIT). SEE FIG. 9D-6, 9D-8 FOR SWITCH AND INDICATOR LOCATIONS. 1 SHEET 5 OBSERVE THE OPERATOR DISPLAY FOR PROPER SEQUENCING OF THE POWER UP AUTOMATIC BIT: 1. (-) UPPER LH CORNER (FOR 35 SECONDS). 2. S/W VERSION NUMBER (FOR 5 SECONDS). 3. MAIN MENU DISPLAYED AFTER 40-50 SECONDS (NO ERRORS). 4. BIT STATUS MENU DISPLAYED WHEN ERROR(S) ARE DETECTED DURING BIT.
2 NO SHEET 3
D D
IS THE RED OVER TEMP INDICATOR ILLUMINATED?
YES
3 NO SHEET 4
D D
DID THE M-O MEDIA FAIL TO LOAD SUCCESSFULLY WITHIN 15 SECONDS?
D
YES IF RDSS OPERATION IS NO LONGER REQUIRED, SELECT SHUTDOWN FROM MAIN MENU. PERFORM EJECT DISK AND SHUTDOWN PROCEDURES. 4
D
1 2 3 4 5
4 OPEN DRIVE BAY AND INSERT M-O TEST MEDIA INTO DRIVE 1 (FORMATTED AND WRITE ENABLED). OBSERVE THAT READY LED BEZEL INDICATOR IS ILLUMINATED A STEADY GREEN (SUCCESSFUL 1 COMPLETION OF DRIVE SELF-TEST DIAGNOSTIC AND 2 MOUNTING SEQUENCE). NO SHEET 4
END AUTO BIT
6 5 SHEET 3 7 8 6
9D-8
Figure 9D-5. RDSS Troubleshooting Procedures (Sheet 1 of 8)
NAVAIR 01-75PAC-12
INITIAL SETUP (Continued)
PFL STP TMS DATA EXTRACT
LOAD WRITE ENABLED M-O MEDIA DESIGNATED AS SYSTEM TEST PROGRAM (STP) INTO M-O DRIVE 1. 1 LOAD WRITE ENABLED M-O MEDIA DESIGNATED AS PREFLIGHT LOADER (PFL) INTO M-O DRIVE 1. 1 AT CMP, LOAD STP. (SEE SECTION 2)
LOAD WRITE ENABLED M-O MEDIA DESIGNATED AS TACTICAL MISSION SOFTWARE (TMS) INTO M-O DRIVE 1. 1
LOAD WRITE ENABLED/ FORMATTED MEDIA TO BE USED FOR DATA EXTRACT INTO M-O DRIVE 1. 1
AT COMPUTER MAINTENANCE PANEL (CMP), LOAD AND PERFORM PFL PROGRAM. (SEE SECTION 2)
AT CMP, LOAD TMS. (SEE INFLIGHT HANDBOOK). PERFORM STP ROUTINES AS REQUIRED AT EACH CREW STATION USING THE CREW STATION MAINTENANCE MANUAL (CSMM, SECTION 2).
MEDIA IS NOW AVAILABLE FOR DATA EXTRACTION.
UPON COMPLETION OF DATA EXTRACT PROCESS, GO TO RDSS SHUTDOWN MENU AND PERFORM THE DISK EJECT ROUTINE TO REMOVE MEDIA AS REQUIRED. 4
UPON COMPLETION OF PFL OPERATIONS, GO TO RDSS SHUTDOWN MENU AND PERFORM THE DISK EJECT ROUTINE TO REMOVE MEDIA AS REQUIRED. 4
UPON COMPLETION OF STP DIAGNOSTIC TESTING, GO TO RDSS SHUTDOWN MENU AND PERFORM THE DISK EJECT ROUTINE TO REMOVE MEDIA AS REQUIRED. 4
UPON COMPLETION OF TMS OPERATIONS, GO TO RDSS SHUTDOWN MENU AND PERFORM THE DISK EJECT ROUTINE TO REMOVE MEDIA AS REQUIRED. 4
END PFL
END STP
END TMS
END DATA
9D-9
NAVAIR 01-75PAC-12
SHEET 1 1
FAULT ISOLATION
SHEET 1 2
OBSERVE OPERATOR DISPLAY FOR MESSAGES: 1. SOFTWARE VERSION 2. TEST IN PROGRESS 3 MAIN MENU
POWER UP AUTO BIT HAS COMPLETED WITHOUT DETECTING A FAULT IN THE PRIMARY RDSS LOGIC.
FROM THE MAIN MENU, SELECT RDSS BUILT-IN TEST BY USING KEYS ON THE KEYPAD. SCROLL UP/DOWN OPTIONS LIST OR DEPRESS THE CORRESPONDING NUMBER AND ENTER KEY TO ACCESS RDSS BIT MENU DIRECTLY. MAIN MENU
WITH BIT STATUS MENU DISPLAYED, DETERMINE AND RECORD ALL FAILED BIT(S). BIT STATUS (EXAMPLES) TEST STATUS 7 CPU PASSED/FAILED INT ANEW PASSED/FAILED INT PDC PASSED/FAILED DRIVE 1 PASSED/FAILED DRIVE 2 NOT FOUND DRIVE 3 NOT FOUND DRIVE 4 NOT FOUND EXT ANEW NOT TESTED EXT PDC NOT TESTED 9-GO TO PREV MENU 0-GO TO MAIN MENU (A3) (A2) (A2) (A7A1) (A7A2) (A7A3) (A7A4) (A2) (A2) MODULE
SELECT RUN ALL ON INTERNAL BIT MENU TO TEST THE CPU AND ANY RECORDED AUTO BIT FAULTS OR ANY UNTESTED M-O DRIVE.
HAS THE RDSS POWER SWITCH/ CIRCUIT BREAKER TRIPPED TO THE OFF (DOWN) POSITION? 4 NO
YES
IS THE MAIN MENU DISPLAYED ON OPERATOR PANEL? 4 NO
8 (A3) (A2) (A2) (A7A2) (A7A3) (A7A4) (A7A1) (A2) (A2)
YES VERIFY STATUS OF BIT RESULTS BY SELECTING BIT STATUS MENU VIA THE RDSS BIT AND MAIN MENUS AS REQUIRED. 4
1 - SHUTDOWN 2 - CONFIGURATION 3 - SASP LOAD 4 - RDSS BUILT-IN TEST 5 - DRIVE STATUS 6 - UTILITIES
NO
DID THE (RUN ALL) BIT FAIL TO RETURN TO INTERNAL BIT MENU WITHIN 2.5 MINUTES?
YES
OBSERVE THE TIME METER FOR AN HOUR GLASS ON THE LH SIDE OF DISPLAY, FLASHING AT A 1 HERTZ RATE. NOTE: TIME METER RUNS ON 115 VAC FROM RDSS POWER CABLE W1.
MOVE POWER SWITCH TO FULL OFF (DOWN) POSITION. AFTER WAITING 2 TO 5 MINUTES, PLACE SWITCH ON (UP) AND RELEASE. OBSERVE THE POWER READY INDICATOR FOR STEADY GREEN.
IS BIT STATUS MENU DISPLAYED ON OPERATOR PANEL? 4 NO
YES
SHEET 1 5 RESTORE RDSS POWER AND OBSERVE THE DISPLAY. IF DISPLAY IS BLANK OR TEST PATTERN IS ABNORMAL, SHUTDOWN RDSS. RESTORE JUMPER TO POSITION 2 (A5A1). REPLACE THE FRONT PANEL ASSEMBLY (A5). 3 6 SHUT DOWN RDSS, PLACE POWER SWITCH OFF (DOWN).
IS THE OPERATOR FRONT PANEL DISPLAY BLANK?
YES
S RDSS FIRMWARE AND OPERATIONAL SOFTWARE ARE MATCHED S IP ADDRESS IS CURRENT FOR RDSS SOFTWARE VERSION S LAN ETHERNET CONNECTIONS TO
RDSS AND OTHER LAN NODES ARE CORRECT AND SECURE. 4 5
IF A MALFUNCTION IN THE ETHERNET LAN IS SUSPECTED, THE FOLLOWING SYSTEM ITEMS SHOULD BE VERIFIED:
SELECT BIT STATUS MENU AND RECORD ALL FAILED BIT(S) AND COMPARE THESE FAILURES WITH ANY RECORDED RESULTS. 4
IF TIME METER IS BLANK OR HOUR GLASS IS NOT FLASHING, CHECK CONTROLS: 1. TACCO POWER CONTROL (RDSS) POWER SWITCH ON. 2. RDSS AC 5 AMP BREAKER ON DPS CB PANEL IN (ON). 3. DDC DC 5 AMP BREAKER ON DPS CB PANEL IN (ON). 4. RDSS AC POWER PLUG 1J1 IS CONNECTED (RH SIDE).
IS THE POWER SWITCH ON (UP) AND IS THE GREEN POWER INDICATOR ILLUMINATED?
YES
NO
NO IF AUTO BIT SEEMS TO BE RUNNING IN A LOOP, ATTEMPT TO STOP IT BY DEPRESSING 0 AND ENTER. IF THIS DOES NOT CAUSE THE SYSTEM TO STOP AT THE MAIN MENU, PERFORM AN EMERGENCY SHUTDOWN BY PLACING RDSS POWER SWITCH OFF. NOTE: ANY MOUNTED M-O MEDIA WILL NOT BE EJECTABLE UNTIL RDSS POWER IS RESTORED.
TO VERIFY THAT THE RDSS HAS POWER, OBSERVE THESE INDICATIONS: 1. M-O DRIVE HAS GREEN BEZEL LED AND LOADS M-O MEDIA (+5, +12 VDC REQUIRED). 2. INTAKE/EXHAUST FANS RUN (--12 VDC REQUIRED). 3. OBSERVE TIME METER FOR A FLASHING HOUR-GLASS SYMBOL ON LH SIDE (CHECKS 115 VAC INPUT).
RESTORE RDSS POWER AND OBSERVE DISPLAY. IF DISPLAY IS STILL MALFUNCTIONING, REPLACE THE A3 FILE MANAGER PROCESSOR. 3 6
REMOVE RDSS USING PROPER SAFETY PRECAUTIONS. IF RDSS FIRMWARE/SOFTWARE, LAN CONNECTIONS, AND IP ADDRESS ARE CORRECT, BUT ETHERNET LAN IS STILL MALFUNCTIONING REPLACE RDSS LAN COMPONENTS IN THIS ORDER: VERIFY CPU OPERATION TO VALIDATE ALL SUBSEQUENT BIT(S) THAT ARE USED TO ISOLATE FAULTS BOTH SUSPECTED AND THOSE DETECTED BY THE INTERNAL/EXTERNAL BIT(S) STORED IN LOGIC OF A3 FILE MANAGER PROCESSOR. 4 6 IF ALL POWER CONTROL CHECKS APPEAR NORMAL, REPLACE RDSS. 6
WITH AID OF A SECOND PERSON, DETACH FRONT PANEL ASSY FROM THE ENCLOSURE. DO NOT DISCONNECT 6 CABLES.
START SHEET 1
IF ALL CONDITIONS ABOVE ARE NORMAL, THE FRONT PANEL DISPLAY APPEARS DEFECTIVE.
WHILE SECOND PERSON SUPPORTS FRONT PANEL ASSY, MOVE JUMPER ON A5A1 (CONTROLLER) FROM POSITION 2 TO POSITION 6. 3
RESTORE RDSS POWER AND RUN ALL INTERNAL BITS(S) TO VERIFY LOGIC FOR: (A2) ANEW/PDC (A3) FILE MANAGER (CPU) (A7) M-O DRIVE EXTERNAL BIT(S) FOR: (A2) ANEW (REQUIRES EXTERNAL JUMPER) (A2) PDC (REQUIRES EXTERNAL JUMPER). 3 4
S A3 FILE MANAGER PROCESSOR S A8 ETHERNET TRANSCEIVER S RDSS
REPLACE A6 LOW VOLTAGE POWER SUPPLY (LVPS). REPLACE RDSS IF SW1 CIRCUIT BREAKER CONTINUES TO FAIL TO MAINTAIN POWER DURING A SUBSEQUENT POWER UP. 6
END BIT
PFL
CPU BIT SHEET 6
START
START
END CHKS
SHEET 1
SHEET 1
SHEET 1
9D-10
NAVAIR 01-75PAC-12
SHEET 1 3

SHEET 1
4 DID EITHER INTAKE FAN (B1/B2) FAIL TO FUNCTION NORMALLY ? IF A MENU IS DISPLAYED, SELECT SHUTDOWN MENU. EXECUTE SHUTDOWN OPTION AND REMOVE ANY EJECTED M-O MEDIA PROMPTLY. POWER OFF RDSS AFTER OBSERVING COOLING FANS FOR FUNCTIONALITY. 4
YES
REPLACE RDSS. 6 INSPECT EXHAUST AIR/EMI FILTER (RH SIDE I/O PANEL OF RDSS ENCLOSURE) FOR EXCESSIVE DIRT OR PHYSICAL DAMAGE.
NO
START SHEET 1
DID EITHER EXHAUST FAN (B3/B4) FAIL TO FUNCTION NORMALLY ?
IS THE BEZEL LED ON FRONT PANEL OF M-O DRIVE EXTINGUISHED? 2
YES
YES
REPLACE RDSS. 6
NO
NO
IF DISPLAY IS BLANK, TURN RDSS POWER SWITCH OFF.
INSPECT INTAKE AIR/EMI FILTER (DRIVE BAY DOOR) FOR EXCESSIVE DIRT OR PHYSICAL DAMAGE. CLEAN OR REPLACE AS APPLICABLE.
START SHEET 1
IS THE EXHAUST AIR/EMI FILTER DAMAGED OR CLOGGED BEYOND REPAIR ? NO
YES
REMOVE M-O MEDIA FROM DRIVE AND REVERSE SIDES. ATTEMPT TO LOAD MEDIA AGAIN. VERIFY MEDIA LOADING IS WITHIN THE 15 SECOND LOAD SEQUENCE. 4
6 SHEET 5
ALLOW RDSS A MINIMUM OF 5 MINUTES FOR CASE TOP TO COOL TO TOUCH, THEN RESTORE RDSS POWER.
IS THE INTAKE AIR/ EMI FILTER DAMAGED OR UNCLEANABLE ?
YES
SHUTDOWN RDSS AND REPLACE INTAKE AIR/ EMI FILTER WITH NEW FILTER ASSEMBLY. 6
IF OVERTEMP INDICATOR CONTINUES TO REMAIN ON AFTER FORCED COOLING PERIODS AND THE REPLACEMENT OF AIR/EMI FILTERS, TEMP SENSOR IS SUSPECTED TO HAVE FAILED. REPLACE RDSS. 6
DID THE MEDIA LOAD WITHIN THE 15 SECOND DRIVE MOUNTING (LOADING) SEQUENCE?
YES
NO NO START
INSPECT COOLING FANS: 1. OPEN DRIVE BAY DOOR AND OBSERVE INTAKE FANS B1/B2 THROUGH RH SIDE OF DRIVE BAY MOUNT ASSY. BOTH FANS SHOULD BE RUNNING AT THE SAME SPEED. 2. OBSERVE EXHAUST FANS ON RH SIDE OF RDSS (MOUNTED INTERNALLY WITHIN THE ENCLOSURE ASSEMBLY). 5
SHEET 1
HAVE ALL FOUR COOLING FANS FAILED TO OPERATE? YES
NO
SUSPECT FAILED -12 VDC TO FANS. SHUTDOWN THE RDSS AND REPLACE A6 LOW VOLTAGE POWER SUPPLY (LVPS). IF PROBLEM PERSISTS, REPLACE THE RDSS. 6
SHUTDOWN RDSS AND REPLACE EXHAUST AIR/EMI FILTER ON EXTERIOR RH SIDE OF ENCLOSURE. 5 6
IF MEDIA CONTINUALLY FAILS TO LOAD, REPLACE TEST MEDIA WITH KNOWN GOOD MEDIA. REPEAT LOAD SEQUENCE WHILE OBSERVING DRIVE STATUS LED(S). 1 2
START SHEET 1
START SHEET 1
START SHEET 1
8 SHEET 5
7 SHEET 5
9D-11
NAVAIR 01-75PAC-12
SHEET 4 SHEET 4 6 7 8 7 EXCHANGE TEST MEDIA WITH KNOWN GOOD DISK. SHEET 4 8
DOES STATUS LED CONDITION INDICATE M-O DRIVE FAILURE? 2
YES
SHUTDOWN RDSS USING THE SHUTDOWN MENU AND REMOVE THE MEDIA. TURN POWER SWITCH OFF (DOWN). REMOVE DRIVE FROM SLOT 1 AND DUMMY WEIGHT FROM SLOT 3. RE-INSTALL DRIVE IN SLOT 3 AND DUMMY WEIGHT IN SLOT 1. MOUNT DRIVE BAY BACK IN THE SHOCK FRAME AFTER CABLES HAVE BEEN SECURED. NOTE: IN SINGLE SCSI DEVICE SYSTEMS, IT IS NOT NECESSARY TO ALTER THE TERMINATOR JUMPER. 3 4 6
SHUTDOWN RDSS USING THE SHUTDOWN MENU AND REMOVE THE MEDIA. TURN POWER SWITCH OFF (DOWN). REMOVE DRIVE FROM SLOT 2 AND DUMMY WEIGHT FROM SLOT 3. RE-INSTALL DRIVE IN SLOT 3 AND DUMMY WEIGHT IN SLOT 2. MOUNT DRIVE BAY BACK IN THE SHOCK FRAME AFTER CABLES HAVE BEEN SECURED. NOTE: IN SINGLE SCSI DEVICE SYSTEMS, IT IS NOT NECESSARY TO ALTER THE TERMINATOR JUMPER. 3 4 6
4 YES DID THE REPLACEMENT MEDIA FAIL TO LOAD WITHIN 15 SECOND LIMIT? NO 4
NO
CAUTION
DO NOT REMOVE POWER POWER ON RDSS AND AFTER BEZEL LED ILLUMINATES STEADY GREEN, LOAD TEST M-O MEDIA INTO THE SUSPECT DRIVE. SELECT DRIVE TEST FROM INTERNAL BIT MENU. RUN DRIVE TEST (TESTS ALL READY DRIVES WITH A MOUNTED FORMATTED M-O MEDIA). REVIEW TESTS RESULTS IN BIT STATUS MENU.
FROM RDSS BUILT-IN TEST MENU, SELECT INTERNAL BIT.
FROM RDSS BUILT-IN TEST MENU, SELECT INTERNAL BIT.
FROM RDSS WITH M-O MEDIA INSERTED. MAGNETIC MEDIA CAN BE CORRUPTED. SHUTDOWN THE SYSTEM FROM THE SHUTDOWN MENU AND REMOVE ANY EJECTED M-O MEDIA. IF MEDIA WILL NOT EJECT VIA THE MENU, DEPRESS THE M-O DRIVE FRONT PANEL EJECT SWITCH WHILE CYCLING THE POWER SWITCH FROM OFF TO ON. THIS WILL EJECT ANY UNMOUNTED MEDIA (NOT UNDER SYSTEM CONTROL). THE EJECTED MEDIA MAY BE CORRUPTED AND SHOULD BE REMOVED. 1 4
FROM INTERNAL BIT MENU, SELECT DRIVE TEST.
FROM INTERNAL BIT MENU, SELECT DRIVE TEST. 4
PERFORM DRIVE TEST BIT TO CONFIRM READINESS OF M-O DRIVE. 4
4 AT COMPLETION OF DRIVE TEST, OBSERVE BIT STATUS MENU.
DID DRIVE FAIL TO PERFORM THE DRIVE BIT SUCCESSFULLY IN NEW DRIVE SLOT? NO
YES
AT COMPLETION OF DRIVE TEST, OBSERVE BIT STATUS MENU.
IF PROBLEMS ARE STILL PRESENT, SELECT INTERNAL BIT MENU AND EXECUTE RUN ALL BIT. CONFIRM STATUS RESULTS OF TESTS BY SELECTING BIT STATUS MENU. 4
POWER DOWN RDSS. RETURN DRIVE AND DUMMY WEIGHT TO ORIGINAL SLOTS. VERIFY DRIVE AND BAY ARE SECURELY CONNECTED IN SHOCK FRAME BEFORE POWER IS RESTORED. RETEST RDSS AS REQUIRED. 4 6
REPLACE DEFECTIVE M-O DRIVE. CONFIGURE NEW M-O DRIVE JUMPERS, INSTALL AND SECURE REPLACEMENT DRIVE IN THE ORIGINAL SLOT. IF M-O DRIVE CONTINUES TO FAIL, REPLACE: 1. A3 FILE MANAGER PROCESSOR (CPU). 2. RDSS.
DID DRIVE TEST FAIL? DID DRIVE TEST FAIL? YES NO
YES
SHUTDOWN RDSS AND REPLACE THE SUSPECT M-O DRIVE. RETEST USING THE DRIVE TEST INTERNAL BIT. IF PROBLEMS ARE STILL PRESENT, REPLACE: 1. A3 FILE MANAGER PROCESSOR (CPU). 2. A6 LOW VOLTAGE POWER SUPPLY. 3. RDSS. RETEST SYSTEM USING THE RUN ALL INTERNAL BIT TO VERIFY THE OPERATIONAL READINESS OF THE REPLACEMENT RDSS. 3 4 6
NO
END DRIVE BIT 1

SHEET 1
START SHEET 1
END DRIVE TEST
END DRIVE TEST
START
START
SHEET 1
SHEET 1
9D-12
NAVAIR 01-75PAC-12
INTERACTIVE RDSS MENUS
CPU BIT INT ANEW INT PDC EXT ANEW EXT PDC DISK EJECT SYSTEM SHUTDOWN
NOTE
AT TOP OR BOTTOM OF DISPLAY INDICATES ADDITIONAL INFORMATION OR SELECTIONS ARE AVAILABLE BY SCROLLING IN THAT DIRECTION WITH CORRESPONDING KEYPAD KEY.
1 4 7
2 5 8 0
3 6 9
ENTER
SHUTDOWN 1 - EJECT DISK 2 - SHUTDOWN 0 - GO TO MAIN MENU
KEYPAD LEGEND
SCROLLS MENU SELECTION BAR UP OR DOWN TO SELECT OPTION (LINE BY LINE). SCROLLS SECTION CURSOR LEFT OR RIGHT TO SELECT SPECIFIC ITEM OF A LINE OR MESSAGE (ITEM BY ITEM). ASTERISK IS USED TO TOGGLE DISPLAY TEST PATTERNS AND MESSAGES.
EXTERNAL BIT
EXTERNAL BIT
0-9 ENTER
NUMBER KEY SECTION OF INDEXED MENU OPTIONS. ENTER KEY EXECUTES THE HIGHLIGHTED COMMAND, RESPONSE, OR NUMERIC SELECTION.
BIT STATUS CPU PASSED/FAILED INT ANEW PASSED/FAILED INT PDC PASSED/FAILED DRIVE 1 PASSED/FAILED/NO DISK DRIVE 2 NOT FOUND DRIVE 3 NOT FOUND DRIVE 4 NOT FOUND EXT ANEW NOT TESTED EXT PDC NOT TESTED 9 - GO TO PREV MENU 0 - GO TO MAIN MENU
BIT STATUS CPU NOT TESTED INT ANEW PASSED/FAILED INT PDC NOT TESTED DRIVE 1 NOT TESTED DRIVE 2 NOT TESTED DRIVE 3 NOT TESTED DRIVE 4 NOT TESTED EXT ANEW NOT TESTED EXT PDC NOT TESTED 9 - GO TO PREV MENU 0 - GO TO MAIN MENU
BIT STATUS CPU NOT TESTED INT ANEW NOT TESTED INT PDC PASSED/FAILED DRIVE 1 NOT TESTED DRIVE 2 NOT TESTED DRIVE 3 NOT TESTED DRIVE 4 NOT TESTED EXT ANEW NOT TESTED EXT PDC NOT TESTED 9 - GO TO PREV MENU 0 - GO TO MAIN MENU
BIT STATUS CPU NOT TESTED INT ANEW NOT TESTED INT PDC NOT TESTED DRIVE 1 NOT TESTED DRIVE 2 NOT TESTED DRIVE 3 NOT TESTED DRIVE 4 NOT TESTED EXT ANEW PASSED/FAILED EXT PDC NOT TESTED 9 - GO TO PREV MENU 0 - GO TO MAIN MENU
BIT STATUS CPU NOT TESTED INT ANEW NOT TESTED INT PDC NOT TESTED DRIVE 1 NOT TESTED DRIVE 2 NOT TESTED DRIVE 3 NOT TESTED DRIVE 4 NOT TESTED EXT ANEW NOT TESTED EXT PDC PASSED/FAILED 9 - GO TO PREV MENU 0 - GO TO MAIN MENU
SHUTDOWN SEQUENCE 1. SYSTEM CLOSES ALL OPEN USER FILES AND TERMINATES THE DATA EXTRACTION PROCESS ONCE OPERATOR CONFIRMS THIS TASK. 2. UNMOUNTS AND EJECTS ALL MOUNTED M-O MEDIA. 3. OPERATOR SHOULD REMOVE ANY EJECTED M-O MEDIA. 4. OPERATOR PLACES RDSS POWER SWITCH OFF (DOWN).
EJECT DISK ON DRIVE XXX
9D-13
NAVAIR 01-75PAC-12
DRIVE BIT INTERNAL KEYPAD BIT INTERNAL PANEL BIT DRIVE STATUS DISK UTILITIES S/W UPGRADE UTILITIES
RDSS BUILT-IN TEST 1 - PANEL BIT 2 - INTERNAL BIT 3 - EXTERNAL BIT 4 - BIT STATUS 0 - GO TO MAIN MENU 1
DRIVE STATUS 2 3 4 RDG - - - - - - - - 0 - GO TO MAIN MENU LEGEND: RDG = READING WRT = WRITING IDLE = AWAITING CMD (------) = NOT DETECTED
UTILITIES UTILITIES 1 - DISK UTILITIES 2 - RDSS S/W UPGRADE 0 - GO TO MAIN MENU 1 - DISK UTILITIES 2 - RDSS S/W UPGRADE 0 - GO TO MAIN MENU NOTE: PRIOR TO SELECTING THIS OPTION, INSERT M-O DISK CONTAINING FIRMWARE UPGRADE INTO DRIVE 1.
PANEL BIT 1 - DISPLAY TEST 2 - KEYBOARD TEST 9 - GO TO PREV MENU 0 - GO TO MAIN MENU
PANEL BIT 1 - DISPLAY TEST 2 - KEYBOARD TEST 9 - GO TO PREV MENU 0 - GO TO MAIN MENU INSERT WRITE ENABLED DISK IN DRIVE 1. CONFIGURE FORMAT DISK AS DRIVE 1.
DISK UTILITIES 1 - FORMAT DISK 2 - COPY DISK
***WARNING*** THE RDSS PROGRAM WILL BE REPLACED. DO YOU WANT TO PROCEED? NO YES TO UPGRADE, SELECT YES AND DEPRESS ENTER.
BIT STATUS CPU NOT TESTED INT ANEW NOT TESTED INT PDC NOT TESTED DRIVE 1 PASSED/FAILED/NO DISK DRIVE 2 NOT FOUND DRIVE 3 NOT FOUND DRIVE 4 NOT FOUND EXT ANEW NOT TESTED EXT PDC NOT TESTED 9 - GO TO PREV MENU 0 - GO TO MAIN MENU
KEYBOARD STARTING AT TOP OF KEYPAD, DEPRESS EACH KEY (ONCE) AND OBSERVE THE CHARACTER/SYMBOL DISPLAYED MATCHES THE KEY DEPRESSED. THE ENTER KEY EXITS TEST. IF RESPONSE IS INCORRECT, REPLACE A5 FRONT PANEL ASSEMBLY THEN, A3 FILE MANAGER PROCESSOR (CPU). IF PROBLEM PERSISTS, REPLACE RDSS. 6
* TO TOGGLE SCREEN ENTER TO EXIT
FORMAT DISK ON DRIVE 1 9 - GO TO PREV MENU 0 - GO TO MAIN MENU
SINGLE DRIVE COPY INSERT SOURCE DISK IN DRIVE 1. CONFIGURE COPY DISK; FROM DRIVE 1 AND TO DRIVE 1. PRESS ENTER TO START COPY. FOLLOW DISPLAYED MESSAGES TO EXCHANGE SOURCE DISK WITH FORMATTED TARGET DISK. 0 TO 22 SECS READ: RDSS S/W UPGRADE IN PROGRESS. CYCLE POWER IF RDSS MAIN MENU DOES NOT APPEAR IN 3 MINS. 22 TO 68 SECS READ: READING IMAGE. IMAGE LENGTH XXXXXX (Vx.x) PROGRAMMING FLASH 68 TO 100 SECS READ: RDSS VERSION X.X ANEW REV X.X PDC REV X.X AT 115 SECONDS, OBSERVE THE BIT STATUS MENU INDICATES PASSED.
* TO TOGGLE SCREEN ENTER TO EXIT IF RESPONSE IS INCORRECT, REPLACE A5 FRONT PANEL ASSEMBLY, THEN A3 FILE MANAGER PROCESSOR (CPU) TO CORRECT PROBLEM. IF PROBLEM PERSISTS, REPLACE RDSS. COPY DISK FROM DRIVE 1 TO DRIVE 1 9 - GO TO PREV MENU 0 - GO TO MAIN MENU 6
REPLACE M-O DRIVE. IF THE REPLACEMENT DRIVE FAILS, REPLACE THE A3 FILE MANAGER PROCESSOR (CPU). PERFORM ALL INTERNAL BIT(S). REPLACE RDSS IF ANY BIT FAILS. 6
START SHEET 1
START SHEET 1
START SHEET 1
9D-14
NAVAIR 01-75PAC-12
CFG IP ADDR
CONFIGURE IP ADDR CURRENT IP ADDRESS : 192.168.235.13 ENTER NEW ADDRESS : YYY.YYY.YYY.YY WHERE Y = RDSS IP ADDRESS UPDATE
9D-15
NAVAIR 01-75PAC-12
STAT (AMBER)
SCON (GREEN) FUSE (GREEN) VME (GREEN)
ABORT SWITCH RESET SWITCH
A6 LVPS +5 SUPPLY
REAR + _12 SUPPLY
DS1
1 TB1 8 1 TB2 8
DS2
DS3
DS4
OOOOOOOOO OOOOOOOOO
OOOOOOOOO OOOOOOOOO
SCSI (GREEN) SERIAL PORT 2 (J9)
SERIAL PORT 1 (J15)
TB1 TEST POINTS

TB2 TEST POINTS

LAN (GREEN) RUN (GREEN) FAIL STAT RUN SCON LAN MANUAL EJECT SWITCH EJECT SWITCH FUSE SCSI VME
STATUS INDICATORS
FAIL (RED)
MAGNETO-OPTICAL DRIVE (ST 2600) (FRONT) (REAR)
JA3 19 oooooooooo oooooooooo 1 JA2
JA1
J1
WARNING
DRIVE STATUS LED

READY LED (GREEN) -- BEZEL INDICATOR STATUS LED (GREEN/RED/ORANGE) -- HIDDEN INDICATOR (BEHIND BEZEL) POWER STATUS LED (AMBER) -- HIDDEN INDICATOR (BEHIND BEZEL)
DC INPUT POWER

PIN # 1 2 3 4 VOLTAGE 12 VDC 0.6 VDC GROUND (12 VDC RETURN) GROUND (5 VDC RETURN) 5 VDC 0.25 VDC
NOTE
M-O DRIVE STATUS LED(S) MAY BE OBSERVED WHEN OPERATOR VIEWS LED(S) FROM BELOW, STANDING AT RIGHT HAND SIDE OF DRIVE. A CARTRIDGE MUST BE MOUNTED TO ACTIVATE LOGIC.
CAUTION
REMOVE M-O CARTRIDGE (DISK) FROM CARTRIDGE LOAD BAY BEFORE REMOVING DRIVE BAY ASSEMBLY OR DRIVE FOR INSPECTION, REPLACEMENT.
9D-16
Figure 9D-6. RDSS Test Point Charts/Locations (ST 2600 M-O Drive Installed)
NAVAIR 01-75PAC-12
STATUS SCON
FUSE VME ABORT SWITCH RESET SWITCH
A6 LVPS +5 SUPPLY
REAR + SUPPLY _12
DS1
1 TB1 8 1 TB2 8
DS2
DS3
DS4
OOOOOOOOO OOOOOOOOO
OOOOOOOOO OOOOOOOOO
FAIL
SERIAL PORT 2 (J9)
SERIAL PORT 1 (J15)
TB1 TEST POINTS

TB2 TEST POINTS

RUN LAN FAIL STATUS RUN SCON
STATUS INDICATORS
SCSI
MAGNETO-OPTICAL DRIVE (ST 5200) (FRONT)

SCSI ADDRESS ID JUMPER
1
LAN FUSE
(REAR)
JA2 24 49 JA1 1 4 J1 1 oooooooooooo oooooooooooo ooooooooooooooooooooooooo O O O O ooooooooooooooooooooooooo
SCSI VME
DC INPUT POWER
WARNING
DRIVE STATUS LED

DRIVE STATUS LED (MULTICOLOR) -- RED/GREEN/ORANGE READY LED (GREEN) -- MOUNTED/UNMOUNTED MANUAL EJECT -- HIDDEN RELEASE (BEHIND BEZEL) EJECT BUTTON
CAUTION
JA2 SCSI INDICATOR(ID)
SCSI ID # 0 1 2 3 4 PIN 1-2 PIN 3-4 PIN 5-6 OUT OUT OUT IN OUT OUT OUT IN OUT IN IN OUT OUT OUT IN

PIN # 1 2 3 4 VOLTAGE 12 VDC 0.6 VDC GROUND (12 VDC RETURN) GROUND (5 VDC RETURN) 5 VDC 0.25 VDC REMOVE M-O CARTRIDGE (DISK) FROM CARTRIDGE LOAD BAY BEFORE REMOVING DRIVE BAY ASSEMBLY OR DRIVE FOR INSPECTION, REPLACEMENT.
Figure 9D-7. RDSS Test Point Charts/Locations (ST 5200 M-O Drive Installed)
9D-17
NAVAIR 01-75PAC-12
A7A1 M-O DRIVE 1
A7A2 M-O DRIVE 1
B3 EXHAUST FAN
DUMMY WEIGHTS
B4 EXHAUST FAN
DRIVE BAY DOOR
A9 REAR COVER/EMI SHIELD
A2 ANEW/PDC INTERFACE A3 FILE MANAGER PROCESSOR (CPU) A6 LOW VOLTAGE POWER SUPPLY (LVPS) A5A1 DISPLAY CONTROLLER EXHAUST AIR/EMI FILTER
INTAKE AIR/EMI FILTER
1 4 7
A5 FRONT PANEL
2 5 8 0 3 6 9
ENTER
A5A2 PLASMA DISPLAY
NOTE
1 2 USE SLOT 1 IF ST 2600 INSTALLED USE SLOT 2 IF ST 5200 INSTALLED
A5A3 KEYPAD
9D-18
Figure 9D-8. RDSS Module Location Diagram (Sheet 1 of 2)
NAVAIR 01-75PAC-12
SHOCK ISOLATOR
A9 REAR COVER
B1/B2 INTAKE FANS
9999.9
+ + W1M1 RUNTIME METER + W3DS2 OVERTEMP INDICATOR W3DS1 POWER INDICATOR
8J1
DETAIL - D A8 ETHERNET TRANSCEIVER

1
DETAIL - A STATUS INDICATOR PANEL
DETAIL D
UP -- POWER ON
DUMMY WEIGHTS
DOWN -- OFF/TRIPPED OVERTEMP SENSOR W2SW1
DETAIL - B W1SW1 POWER SWITCH/CIRCUIT BREAKER SHOCK ISOLATORS
RH SIDE A1 SHOCK FRAME
J6 PDC I/O J5 ETHERNET LAN OUT

* 1 4 7 2 5 8 0
J4 ETHERNET LAN IN
3 6 9
ENTER
J3 ANEW FROM HOST J2 ANEW TO HOST
J5
PDI J4 ANEW/PDI J1 CPU
J6
ANEW
P2
P1 ........................ ........................ ........................ ........................ ........................ ........................ ........................ ........................
DETAIL - A J2 SCSI J3 ETHERNET
J1 POWER INPUT J5 RH J2 J3 J6 J4 J1
LH
DETAIL - B -
A6
A6
DETAIL - C A4 TRANSITION INTERFACE

DETAIL - C -
REAR - A1 SHOCK FRAME -
Figure 9D-8. RDSS Module Location Diagram (Sheet 2 of 2)
9D-19
NAVAIR 01-75PAC-12
INDEX NUMBERS 1
CONTROL MAGNETO-OPTICAL DRIVE BAY ACCESS DOOR
FUNCTION FILTERS AIR SUPPLY TO SCSI DRIVES AND INTERNAL COMPONENTS, PROTECTING THEM FROM DAMAGE DURING NORMAL OPERATIONS. DOOR PROVIDES EASY ACCESS TO DRIVES DURING PREFLIGHT, OPERATIONAL OR DIAGNOSTIC PROGRAM LOADING, AND ROUTINE SYSTEM MAINTENANCE. PROVIDES INTERACTIVE INPUT COMMAND AND RESPONSE CONTROL OF THE SYSTEM DURING NORMAL OPERATIONS AND MAINTENANCE TEST SEQUENCES. PLASMA DISPLAY IS USED TO DISPLAY CONTROL AND STATUS MENUS ALONG WITH OPERATIONAL AND FAULT ERROR MESSAGES. THE STANDARD MENUS STORED IN FILE MANAGER PROCESSOR PROM: MAIN MENU CONFIGURATION SASP LOAD SASP AU/SC/DF DIAGNOSTIC SASP/TC CONFIGURATION EJECT DISK RDSS BUILT-IN TEST BIT STATUS PANEL-DISPLAY BIT PANEL-KEYPAD BIT NOTE ON AIRCRAFT INCORPORATING AFC 607, ALL SASP MENUS MAY BE PRESENT BUT ARE INOPERABLE. TO LOAD OR TROUBLESHOOT APS SEE NAVAIR 01-75PAC-12-8. LCD DISPLAY SHOWS THE TOTAL ACCUMULATED SYSTEM OPERATING TIME WHENEVER THE POWER SWITCH SW1 IS ON AND AC POWER IS AVAILABLE TO POWER CABLE W1. SWITCH SW1 CONTROLS POWER TO THE RDSS SYSTEM. IT PROVIDES AUTOMATIC POWER CUTOFF DUE TO EXCESSIVE SYSTEM CURRENT DEMAND. ILLUMINATES RED WHEN THE INTERNAL TEMPERATURE EXCEEDS 68 C AND REMAINS ON UNTIL THE TEMPERATURE FALLS TO ABOUT 63 C. ILLUMINATES GREEN WHEN POWER SWITCH W1SW1 IS SET TO ON POSITION AND THE 5 VDC POWER SUPPLY OUTPUT HAS REACHED A NOMINAL VALUE. RDSS S/W UPGRADE UTILITIES STARTUP/SHUTDOWN INTERNAL ANEW BIT INTERNAL PDC BIT DRIVE TEST DRIVE STATUS FORMAT/COPY DISK EXTERNAL ANEW BIT EXTERNAL PDC BIT
KEYPAD
MAIN MENU 1-SHUTDOWN 2-CONFIGURATION 3-SASP LOAD 4-RDSS BUILT-IN TEST 5-DRIVE STATUS 6-UTILITIES
DISPLAY
9999.9
1 4 7
2 5 8 0
3 6 9
ENTER
RUNTIME METER
5 6 7
POWER ON/OFF SWITCH - CIRCUIT BREAKER OVERTEMP INDICATOR POWER ON INDICATOR
9D-20
Figure 9D-9. RDSS Maintenance Controls and Indicators
NAVAIR 01-75PAC-12
CARTRIDGE LOADING
WARNING
A
CAUTION
D D
DO NOT INSERT DAMAGED MEDIA OR TOOLS INTO DRIVE AS MECHANISMS OR OTHER COMPONENTS CAN BE DAMAGED BY TOOLS, MEDIA AND/OR STATIC ELECTRICITY. DO NOT REMOVE ANY CIRCUIT BOARD FROM THE DRIVE OR USE THE DRIVE WITHOUT INSTALLING IN THE DRIVE BAY. NEVER REMOVE DRIVE OR COMPONENTS WHILE POWER IS APPLIED TO UNIT. THIS CAN CAUSE DAMAGE TO DRIVE AND/OR RDSS SYSTEM. THERE ARE NO USER SERVICEABLE PARTS, REPLACE DRIVE IF DEFECTIVE.
CARTRIDGE UNLOADING
1. MOUNTED MEDIA (GREEN READY LED ILLUMINATED) - USE SHUTDOWN MENU TO SELECT AND ISSUE EJECT COMMAND (SEE FIGURE 9D-5). 2. MOUNTED MEDIA (GREEN READY LED EXTINGUISHED). PRESS DRIVE EJECT SWITCH. 3. MOUNTED MEDIA (POWER OFF). USE MANUAL EJECT SWITCH LOCATED BEHIND TAB (OPENING) ABOVE GREEN READY LED (BEZEL INDICATOR). TURN MANUAL EJECT SWITCH CCW TO EJECT M-O MEDIA.
SIDE A WRITE-PROTECTION SWITCH WRITE ENABLED WRITE INHIBITED
SIDE B WRITE-PROTECTION SWITCH WRITE ENABLED WRITE INHIBITED
TYPICAL REPRESENTATION. M- MEDIA DISKS MAY APPEAR -O DIFFERENT DEPENDING ON MANUFACTURER.
CAUTION D D
DO NOT EXPOSE CARTRIDGES TO DUST, DIRT OR DIRECT SUNLIGHT. NEVER OPEN SHUTTER TO INSPECT MEDIA. STORE CARTRIDGES IN PROTECTIVE CASE (AWAY FROM AIR CONDITIONERS) IN AN AREA WITH A RELATIVE HUMIDITY (RH) OF 5% TO 90% AND A TEMPERATURE BETWEEN 10_ C AND 55_ C. CARTRIDGES MUST BE STORED IN A VERTICAL OR HORIZONTAL POSITION ONLY (IN PROTECTIVE CASE), NEVER STACK UNCASED CARTRIDGES. STACK CASED CARTRIDGES A MAXIMUM OF 5 HIGH. DO NOT TURN DRIVE POWER ON OR OFF DURING CARTRIDGE LOADING OR EJECTION. THIS CAN DAMAGE DRIVE/MEDIA. ALWAYS REMOVE EJECTED MEDIA (CARTRIDGE) FROM DRIVE, THEN STORE IN PROTECTIVE CASE. REMOVE ALL MEDIA IF DRIVE IS TO BE MOVED. DO NOT ATTEMPT TO LOAD A CARTRIDGE IN A DRIVE THAT EMITS UNUSUAL SOUNDS, VIBRATIONS, OR HAS A FLASHING RED (READY) STATUS INDICATOR. EJECT THE MEDIA IMMEDIATELY IF ANY OF THESE CONDITIONS EXIST. ACTIVE SIDE OF MEDIA (CARTRIDGE) ALWAYS FACES DOWN WHEN BEING INSERTED INTO DRIVE. DO NOT REMOVE POWER FROM RDSS WITH M-O MEDIA INSERTED. MAGNETIC MEDIA CAN BE CORRUPTED.
M-O CARTRIDGE (DISK) LOAD BAY
D D D D
MANUAL EJECT SWITCH EJECT SWITCH STATUS LED (GREEN/RED/ORANGE) - HIDDEN INDICATOR READY LED (GREEN) - BEZEL INDICATOR POWER STATUS LED (AMBER) - HIDDEN INDICATOR
D D
Figure 9D-10. RDSS Magneto-Optical Drive Setup Procedure (ST 2600 M-O Drive Installed)
9D-21
NAVAIR 01-75PAC-12
CARTRIDGE LOADING
WARNING
CAUTION
SIDE A
CARTRIDGE UNLOADING
1. MOUNTED MEDIA (GREEN READY LED ILLUMINATED) - USE SHUTDOWN MENU TO SELECT AND ISSUE EJECT COMMAND (SEE FIGURE 9D-5). 2. MOUNTED MEDIA (GREEN READY LED EXTINGUISHED) - PRESS DRIVE EJECT SWITCH. 3. MOUNTED MEDIA (POWER OFF) - USE MANUAL EJECT SWITCH LOCATED BEHIND EJECT BUTTON. REMOVE EJECT BUTTON AND LOCATE MANUAL EJECT SCREW AT RH SIDE OF EJECT SWITCH. TURN MANUAL EJECT SWITCH CCW TO EJECT M-O MEDIA.
SIDE B
WRITE INHIBITED
WRITE ENABLED
CAUTION
S S S
LOAD BAY SHUTTER DOORS
DO NOT EXPOSE CARTRIDGES TO DUST, DIRT OR DIRECT SUNLIGHT, NEVER OPEN SHUTTER TO INSPECT MEDIA. STORE CARTRIDGES IN PROTECTIVE CASE (AWAY FROM AIR CONDITIONERS) IN AN AREA WITH A RELATIVE HUMIDITY (RH) OF 5% TO 90% AND A TEMPERATURE BETWEEN 10_ C AND 55_ C. CARTRIDGES MUST BE STORED IN A VERTICAL OR HORIZONTAL POSITION ONLY (IN PROTECTIVE CASE), NEVER STACK UNCASED CARTRIDGES. STACK CASED CARTRIDGES A MAXIMUM OF 5 HIGH.
S
READY LED (GREEN)
DO NOT TURN DRIVE POWER ON OR OFF DURING CARTRIDGE LOADING OR EJECTION. THIS CAN DAMAGE DRIVE/MEDIA.
S S
ALWAYS REMOVE EJECTED MEDIA (CARTRIDGE) FROM DRIVE, THEN STORE IN PROTECTIVE CASE. REMOVE ALL MEDIA IF DRIVE IS TO BE MOVED. DO NOT ATTEMPT TO LOAD A DAMAGED CARTRIDGE IN A DRIVE THAT EMITS UNUSUAL SOUNDS, VIBRATIONS, OR HAS A FLASHING RED (READY) STATUS INDICATOR. EJECT THE MEDIA IMMEDIATELY IF ANY OF THESE CONDITIONS EXIST.
DRIVE STATUS LED (GREEN/RED/ORANGE) MANUAL EJECT (BEHIND EJECT BUTTON RH SIDE) EJECT SWITCH/BUTTON M-O CARTRIDGE (DISK)
S
D
9D-22
Figure 9D-11. RDSS Magneto-Optical Drive Setup Procedure (ST 5200 M-O Drive Installed)
NAVAIR 01-75PAC-12
Front of M-O Drive
WARNING
JP3 NOTE: JP6 JP2
(REAR)
D
JP4 JA3
CAUTION
P1
E45 E35 E68 E66
P2
ALL FILLED BLOCKS INDICATE JUMPER IS INSTALLED OR DIP SWITCH IS SET. JA1 JA2 J1
JP1
1 19 oooooooooo oooooooooo
E36
E26
E65
E55
D
J1 2 JA1 50 JA2 20 JA3 2
D
DUMMY WEIGHTS (REMOVE ONLY TO INSTALL A SCSI DEVICE)
E1 E2 E3
E56
E46 E23 E25 E20
Bottom View
E24 E21
E19 E18
+ +
J2
J1
+ + + + + +
+ + + +
P1
+ +
P2
1 2
J20
1 3 5
J26
3 4
+ +
J25
2 4 6
J21
1 2 3
LVPS
J6
J24
2 1
A5A3
7 6 5 4 3 2 1
J2
J12
2 1 2 4
J22
1 J17 J18 15
1 14
J23
ABORT RESET
13
1 2 1 J9
J1
J11
3 4 3
16
J1 I/O INTERFACE
DISPLAY
+
J3 POWER
1 14
13 25
25
J15
SERIAL PORT 2
SERIAL PORT 1
Top of Front Panel

TOP
Figure 9D-12. RDSS Module Configuration Diagram (ST 2600 M-O Drive Installed)
+
2
9D-23
NAVAIR 01-75PAC-12
Front of M-O Drive
WARNING
NOTE: ALL FILLED BLOCKS INDICATE JUMPER IS INSTALLED OR DIP SWITCH IS SET. JA2 1 23 49
(REAR)
JA1 1 4
J1 1
CAUTION D D
E45
P1
E35 E68 E66
P2
oooooooooooo oooooooooooo
ooooooooooooooooooooooooo O O O O ooooooooooooooooooooooooo
8 SW1
DC INPUT POWER
E36
E26
E65
E55
D
J1 2 JA1 50 24 JA2 2
E1 E2 E3
E56
E46 E23 E25 E20
E24 E21
E19 E18
J2
J1
+ + + + + +
+ + + + + +
P1
1 2 1 2 3 4 1 3 5
P2 J20 J21
2 4 6 1 2 3
J26
+ +
J25
LVPS
J6
J24
2 1
A5A3
7 6 5 4 3 2 1
J2
J12
2 1 2 4
J22
1 J17 J18 15
1 14
J23
ABORT RESET
13
1 2 1 J9
J1
J11
3 4 3
16
J1 I/O INTERFACE
DISPLAY
1 14
13 25
25
J15
J3 POWER
SERIAL PORT 2
SERIAL PORT 1
Top of Front Panel
TOP
9D-24
Figure 9D-13. RDSS Module Configuration Diagram (ST 5200 M-O Drive Installed)
+
2

01 75 Pac 12

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NAVAIR 01-75PAC-12

CREW STATION MAINTENANCE ORGANIZATIONAL

LIST OF EFFECTIVE PAGES

# - Zero in this column indicates an original page. A Change 13

1-7 1-8 1-9

SECTION 2 - READINESS TEST PROCEDURES

LIST OF TECHNICAL PUBLICATION DEFICIENCY REPORTS INCORPORATED

SECTION 1 GENERAL INFORMATION

NTDS Type C (ANEW)

FLIGHT ENGINEER 60 30 0 30 60 PILOT 100 FWD 200 RADOME

FWD LOAD CTR

AFT RADOME 1200 1300 1400

MAD BOOM 1500

C-10553/ASH-33 Digital Magnetic Tape Control (DMTC)

700106 PEP Power Supply CDL Power Control Panel

A505-AN/ASQ-114 DMTS Interface Box (DMTS Interconnection Box)

PT-540(V)7/U Hard Copy Recorder (HCR) or TP-4840 Printer

700101 Programmable Entry Panel (PEP)

700106 PEP Power Supply

USQ-140 Digital Interface Unit USQ-140 Remote Power Supply

RACK H1 D D CDL COMSEC FillPort

Airborne Modem Assembly

700101 Programmable Entry Panel (PEP)

700106 PEP Power Supply

CP-2451/ASQ-227(V) Digital Data Computer (DDC)

C-12639/ASQ-227(V) Computer Maintenance Panel (CMP)

Figure 1-2. Equipment Location Diagram

CREW STATION MAINTENANCE MANUAL AVIONIC SUBSYSTEM INDEXES

NAVAIR 01-75PAC-12-2 TACTICAL COORDINATOR STATION

NAVAIR 01-75PAC-12 TECHNICIAN

NAVAIR 01-75PAC-12-6 ARMAMENT/ ORDNANCE STATION

NAVAIR 01-75PAC-12-7 SYSTEM TEST PROGRAM

NAVAIR 01-75PAC-12-3 NAVIGATION/ COMMUNICATION STATION

NAVAIR 01-75PAC-12-4 SENSOR STATIONS 1 AND 2

NAVAIR 01-75PAC-12-5 SENSOR STATION 3

NAVAIR 01-75PAC-12-12 SYSTEM TEST PROGRAM FOR CP-2451/ASQ-227

Figure 1-3. Avionic Subsystem Index

DIGITAL TACCO TRAY TACCO TRACKBALL

HSI EHSI 4 NAVCOM KEYSET

AFT ARM INTERCON-NECTION BOX FWD ARM INTERCON-NECTION BOX

TTY AND HSP

COURSE ERROR CROSS TRACK ERROR

AUDIO PROCESSOR CHANNELS 8 THRU 15

AUDIO PROCESSOR CHANNELS 0 THRU 7

VECTOR, CHARACTER AND CONTROL

VECTOR, CHARACTER AND CONTROL

RANGE, PRF, HV ON/OFF COMMANDS

VECTOR, CHARACTER AND CONTROL

LAMP INPUTS/SWITCH OUTPUTS

SAD, CAMERA, DOPPLER AND NAV STATUS DATA

LAMP INPUTS/SWITCH OUTPUTS

LAMP INPUTS/SWITCH OUTPUTS

LAMP INPUTS/SWITCH OUTPUTS

LAMP INPUTS/SWITCH OUTPUTS

LAMP INPUTS/SWITCH OUTPUTS

OUTPUT DATA AND CONTROL

OUTPUT DATA AND CONTROL

OUTPUT DATA AND CONTROL

CHARACTER AND CONTROL

CHARACTER AND CONTROL

GROUND SPEED AND DRIFT

INPUT DATA AND CONTROL