ELEN-610: Midterm #1

10:00-11:30 am March 3, 2012 Name: Last 4 digits of your UIN:

Question 1. 20 points Assume that an input signal f(t) is sampled by an ideal signal with period T (=1/fs). Assume that the signal is band-limited with the maximum frequency being less than fs/2. Provide the expressions, in time and frequency, of the output signal and sketch the spectrum of the sampled signal under the following conditions: i) Signal sampled with an ideal train of impulses. 5 points. ii) Sampled by a train of impulses and held by T/2 seconds. 7.5 points. iii) Sampled by a train of impulses and held by T seconds. 7.5points. Hint: Case iii) is shown below when a sinusoidal input signal is used.

S/H signal

Question 2. 20 points Assume that after the S/H, the signal is quantized employing 2 N levels, as shown in the figure below for the case of a sinusoidal signal.

Continuous-time signal

S/H signal

Quantized signal

a) Demonstrate that the power of the signal error is given by q2/12 for the case of a ramp input signal; q Is the quantization level. 10 points b) Explain the main effects of the quantization operation: how the SQNR and Signal/Distortion Ratio are affected? 10 points.

Question 3. 20 points Assuming the S/H driving by a sinusoidal signal employs a jittered clock, then a) Find the expression for the aperture error present in the sample and hold signal. 10 points b) Find the expression for the signal to aperture induced noise ratio. 10 points

Question 4. 15 points Consider the multiple-input switched-capacitor circuit shown below. Assume that 1 and 2 are two non-overlapping clock signals; assume that the clock period is Ts, and that the OPAMP is ideal. Find the difference equations that describe the output signal during phase 1. 10 points.

C1
vi1
vi2

1 C2 2 2 C3 1
+

CF

vi3

vo

Question 5. 30 points a) Describe the steps followed by a 3-bit algorithmic ADC to resolve the output. Assume that the capacitors are matched. 15 points b) Assuming that the capacitors are not matched, find the expression for the output signal if the input signal is equal to 0.7Vref. 15 points Modify the circuit if needed, but maintain the operation with 3 capacitors.
1e C3 1 Vi 1 2 Decoder C1 A -VR VR C2 2 2 1e

Vo