You are on page 1of 45

SERVICE MANUAL

8M29B CHASSIS

Design and specifications are subject to change without prior notice. (Only Referrence)

Description: MODEL. JOB NO.

SERVICE MANUAL 8M29B


Brand Name:

SKYWORTH

Engineering Dept: Artwork By: Date: Date: Date:

2011-5-23

SIZE:A5

Checked By: Approved By:

Content-------------------------------------------------------------------------------2 Technical Specification-----------------------------------------------------------3-14 8M29 Block Diagram -------------------------------------------------------------15 List of key parts---------------------------------------------------------------------16 IC BLOCK Diagram----------------------------------------------------------------17-31 MAIN PCB-TOP--------------------------------------------------------------------32 MAIN PCB-BOT--------------------------------------------------------------------33 Circuit Diagrams--------------------------------------------------------------------34-42

-2-

LCD 8M29B chassis.

-3-

4.

105 140

For 32LED For 42LED

Base on different order

5.

93 93

95 95 400 450

97 97

FOR 32LED FOR 42LED

-4-

For 42LED For 42LED

9800

12500

12500(266, 276) 9800(280, 290) 6500(313, 329)

-5-

24

40

40 3 2 1 4.2 50 0.5 80 40 12000

-6-

1080 For 42LED 1920 For 42LED

40 NO YES 8 6 46 46 NO

uv

uv

Standard Standard 20

English

Base on different order

No

Middle

"Low" in some status

-7-

-8-

DTV-PRODUCTOINS SPECIFICATION
Model #

32"46" Brazil & Argentina Skyworth/ODM TV LCD/LED Class K06/E60 MSD309 8M29B Skyworth RGB New Standard 2011.1 -

Country( West Eu./East Eu./Russia/AP/US/S.A./Japan/ ) Brand Category (Monitor/TV/Combo/Portable TV) Panel technology (LCD / PDP) Market Position (High/Mid/Access,,,) Cabinet Design (Example: 01,23 series ) Product Nb Chassis solution Chassis name Chassis PCB Standard Predecessor (replace) MP date requested (ETD) MP date confirmed by supplier (ETD/ETA) Status( Pre./Finish ) Regional requirement Homologation (Gostandard/CE/MPTT/CB/) RoHS Power supply(100-240V AC +/-10%/...) Power consumption working / Annual Power consumption standby Power plug(VDE/UL/BS/) Picture display Screen size : diagonale (inch) Aspect ratio (16/9 // 4/3 // 15/9) 1st panel supplier : panel suppliers 1st panel supplier : panel reference Panel Display Type(MVA/PVA/IPS/) 1st panel supplier : resolution Dynamic contrast ratio Video signal process Comb Filter (2D/3D) Noise Reduction (adaptative/3D/) Picture improvement ( LTI/CTI,BLE,WLE,...) Color process (Gama correction/Skin correction /... )

CB Yes 100-240V AC (-20%,+10%) <1W UCIEE/2pins 32",42", 46" 16:9 LG TFT LCD 32:1366x76842/46:1920x1080 >100001

3D 3D LTI/CTI Follow main IC

-9-

Colour preset (Cool/Normal/Warm/Personal) Picture control ( Bright/Con./Sharpness/Color/Tint/) Picture presets : Standard / Bright / Soft / User Picture freeze Multi picture : PIP ( AV )/POP AV Dynamic Backlight Control LED Backlight Deinterlacer (No/linerar/motion adaptive/motion compensative) Film mode / reverse 3:2/2:2 pull down Full HD support ( 1080P ) Single scan / Dual scan ( 120HZ ) Zoom type : 4/3 format Zoom type : 14/9 Zoom Zoom type : 16/9 Zoom Zoom type : 16/9 Zoom up/down Zoom type : Cinerama Zoom type : 16/9 Format Zoom type : Auto ( by SCART Pin8 and WSS ) Picture Auto adjustment (PC mode) 3D Panel Type(PR / SG) 3D Mode 3D To 2D (Y/N) 2D To 3D (Y/N) Left / Right Swap (For PR Panel) Sound Sound type ( Mono/AV stereo/Stereo ) Music Power (Watt)/RMS Power (Watt) Tone control ( Bass&Treble / Graphic Equalizer ) Special sound effect ( AVL / WIDE / Pseudo / ) Suround system ( Dolby / VD / SRS / BBE / ) Sound control ( Volume , Balance , Mute ) Sound presets (User/Speech/News/Standard) Headphone volume control ( Separated / linked ) Sound quality ( High / Mid / Low ) Reception and Decoding capability RF rangeATV RF rangeDTV Color System (PAL/SECAM/NTSC/PAL M,N ) Audio Standard ( B/G/H/D/K/K'/I/L/L' ) Stereo audio system ( Nicam,MTS,A2,.) Video standard NTSC 3.58 / 4.43 (AV)/PAL 60

Medium, Cool, Warm and Personal in PC mode Yes Standard / Mild / Film / Dynamic / Personal Yes No No Yes 3D motion adaptive Yes / Yes Yes 32:Single scan,42/46:Dual scan(only for LED) Yes Yes 16/9 ZOOM 1 16/9 ZOOM 2 Yes Yes Yes Yes

stereo 2 x 8W Bass&Treble AVL Built-in Surround Volume, Balance, Mute Standard / Music / Movie / Sport / Personal Yes(Linked) Mid 54MHz864MHz VHF 177-213 MHZ, UHF 473-803 MHZ PAL M,PAL N,NTSC M M,N BTSC,SAP NTSC 3.58/4.43 , PAL

-10-

DTV SD support (DVB-T/S/C , ATSC , QAM , ) DTV HD Support MHEG5 HD capability with YPbPr PC capability (up to maximum format) HDMI capability AV/PC Format) Compatible video format if DVD/USB: DviX/VCD/SVCD/JPEG/AVI/MPEG2/WMV- HD/SD Compatible audio format if DVD/USB: MP3/WMA/AAC/MPEG1/ Playable Discs (CD/CD-R(RW)/CD-ROM/DVD+R/+RW/R/-RW) Card reader format compatibility Macrovision PVR Network User convenience OSD Language* OSD Positioning OSD Transparency Adjust OSD Timeout Adjust Customer Brand name(LOGO) IB languages ATV Program Numbers (example: 99+3AV input ) DTV Program Numbers Program edit ( naming , sorting , skip , swap . ) Auto Naming/Auto Sorting TV Guide(DTV EPG) Favorite program Number of buttons on cabinet (Power; Vol+/-; Pr+/-, Menu ) Main switch button (yes/No) CCDClosed Caption)/V-CHIP Text Standard: (Top, FLOF,,,) Teletext Level: 2.5 / 1.5 Pages for teletext Teletext character sets **** DVB-T teletext Real clock Sleep timer Timer Parent Control -Source and Channel lock (Input code for certain channel) Parent Control - Child lock (set the lock of the keyboard, only the RCU can control the TV)

ISDB-T MPEG2,MPEG4,H.264 No Yes (720p; 1080i; 1080p@24/50/60Hz; 480i/p; 576i/p) Up to 1280X1024 60Hz Up to 1080P 24/50/60HZ JPEG/MPEG2/MPEG4/H.264/DivX (depending on license) MP3/WMA(depending on license) No No Yes YesFOR USB No English/Spanish/Portuguese/French No No No Yes English 99+7AV 600 Naming / Skip / Swap No EPG(next Seven-day) Yes Vol+/-; Pr+/-, Menu ,Source,Power(optional) Yes Yes/No No From DTV 10-240 Min. Turn On / Off, Program Switch Yes No

-11-

Parent Control - Kid pass (preset the ontime, channel for each day of the week) Parent Control - Channel lock (For digital transmission and DVD program, to filter some programms) Calendar / Games No program auto switch off Hotel mode (Y/N) DVD player (No/slot/tray) Tuner FM (yes/No) software download(RS232/CI/USB/OAD) Factory reset Screen saver Blue Back LED indicator(Power on/Standby) Connectors -Rear RF Input (Antenna): Air/ Cable/ 2in1 Scart : CVBS in&out / RGB / S-VIDEO CINCH video in / out AV1 CINCH audio in / out (No volumpe control on Audio out/can be jack 3,5mm) S-video in Component Video Input (YCrCb/YPrPb) Component Audio Input (YCrCb/YPrPb) VGA in / Audio L/R in / Jack audio in 3.5mm HDMI DVI Audio input for DVI CINCH subwoofer out / Coaxial out (S/PDIF) Headphone output connector (mm) RS232 ( Y/N , VGA or DB9 port ) Card Readers USB slot (No/1.1/2) DVB-CI (common interface) External power converter input Connectors -Side HDMI AV-IN AV-OUT

No Yes No 15 mins. T.B.D No No USB Yesin factory menu,reset the setting to shipment state ) Yes No Blue / Red Air+Cable No No No No No No VGA + dia. 3.5mm for audio in 2 No No No No No No 1 (Software update, JPEG, MP3, WMA, RMVB, DivX) Multimedia depends on license No No 1 1 No

-12-

Component Video Input (YCrCb/YPrPb) Component Audio Input (YCrCb/YPrPb) Headphone output connector (dia.mm) CINCH subwoofer out / Coaxial out (S/PDIF) USB slot (No/1.1/2) DVB-CI (common interface) DLNA UI/RC UI design (font/pixel, 2D/3D graphic engine..) RC Model RC system RC # of keys Accessories included Carton (English/French/Spanish) IB Circuit diagram Batteries Product registration Card AC Cable Length Audio Cord (Jack 3.5mm) VGA Cord Wallmount frame Antenna Cable 6 in 1( YPbPr & CVBS) cable adapter 3D Glasses General Data Size (W x H x D, with stand) in mm Size (W x H x D, without stand) in mm Package Size (W x H x D, without stand) in mm Net Weight in kg Gross Weight in Kg Design / Mechanical Wallmount VESA compatible (standard reference) Adaptor for VESA wallmount compatibility (accessory ref) Desktop Stand (included/optionnal + ref/No) Panel Tilt (Fowards/Backwards/Rotation) Swivel function desktop stand (yes/No) + motorized? Docking station (yes/No) Floor Stand (included/optionnal + ref/No) Glass shield (yes/No) Finish on Front Finish on side Finish on back

1 1 with cable adapter 13.5mm) S/PDIF out ( optical 1 (Software update, JPEG, MP3, WMA, RMVB, DivX) Multimedia depends on license No No SOD Standard YK76B3 ( Toshiba ) RGB Standard

English English No Yes YesEnglish) 1.8m Yes(For component audio in) No Optional No No No Yes Yes included No No No No No -

-13-

Finish on stand number of colors on carton box Brand logo Other logo External AC/DC Power with DC power cord (yes/No) Handle (yes/No) Detachable speaker (yes/No) Rating Label langages

2 Customer Inlet No No No No English

-14-

SYSTEM POWER SUPPLY


KEY PAD, IR Receiver ,Ambient Sensor

Uplayer1
PIXELWORKS 3D Processor

Optional

FLASH

Motion Engine PA131DG

HDMI1
DDRII
DVB-T&ATV Demo d

PR
DVB-T & IF Demo. Build in MPEG1/2/4 /H.264 Decoder JPEG MP3 Decoder

MSD309PX-LF-SB

PB
R/L
3D Comb filter Video Decoder

TPA3121 10W + 10W

R
DTV ATV

Toshiba TC90517 ISDB-T Demod SAW P/S


IF (ATV) IF+/-

Video

Rear Terminals
PC HDMI2 HDMI3 PC Audio S/PDIF

Side Terminals

Tuner

Uplayer2

-15-

List of key parts

No. 1

Name IR

Position U29 Bass

Type HS0038B4 SL-R3018H-3E YDG3040-2 49U3H HC-49U/S VA1P1BF8405 F4401 MP1482DS MP1482DS MP1482DS MP1482DS W9751G6JB-25 W9751G6JB-25 EN25F32-100HIP TC90517FG AS1117L-3.3 AS1117L-3.3 AS1117L-3.3 AS1117L-1.2 TPA3121D2PWPR MSD309PX-LF-Z1-SB

P/N 5300-140038-0010 5600-106154-0060 5600-708254-00 4900-125453-R000 4900-124053-R000 5202-45733D-7H10 4900-744015-0X00 476A-M14820-0080 476A-M14820-0080 476A-M14820-0080 476A-M14820-0080 4737-W97511-0840 4737-W97511-0840 471R-N25321-0080 4701-T90510-0640 47B6-A11170-03 47B6-A11170-03 47B6-A11170-03 47B6-A11175-0300 4722-T31210-0240 475C-M30900-5230

Speaker Treble Y2

Crystal Y1

4 5

Tuner Saw

U10 U30 U3 U5

8 8
U9 U15 6 IC U24 U55 U37 U38 N1 N2 U54 U2

-16-

IC Block Diagram

Pin Configurations---AS1117L-3.3
L Package (SOT-223)
U Package (SOT-89)

INPUT OUTPUT ADJ/GND


V OUT

3 2 1

INPUT OUTPUT ADJ/GND

V OUT

2 1

T Package (TO-220)

R Package

(TO-252)
3

INPUT

INPUT OUTPUT ADJ/GND

V OUT

2 1

V OUT

2 1

OUTPUT

ADJ/GND

S Package (TO-263)

3 V OUT 2 1

INPUT OUTPUT ADJ/GND

-17-

IC Block Diagram

Pin Configurations---AS1117L-ADJ
L Package (SOT-223)

INPUT OUTPUT ADJ/GND

V OUT

2 1

PIN ASSIGNMENT The package of AX3113 is SOP-8L; the pin assignment is given by: Name FB
( Top View ) FB EN Ocset Vcc 1 2 AX3113 3 4 SOP8L 6 5 SW SW 8 7 Vss Vss

Description Feedback pin Power-off pin Hnormal operation(Step-down) LStep-down operation stopped (All circuits deactivated) Add an external resistor to set max switch output current. IC power supply pin Switch pin. Connect inductor & diode here. GND pin external

EN

OCSET VCC SW VSS

-18-

IC Block Diagram

LM4558

MP1482DS

TOP VIEW
BS IN SW GND 1 2 3 4 8 7 6 5 SS EN COMP FB

-19-

IC Block Diagram

MST6M20S-LF

-20-

IC Block Diagram

W25X40BVSNIG
PWP (TSSOP) PACKAGE (TOP VIEW)

PVCCL SD PVCCL MUTE LIN RIN BYPASS AGND AGND PVCCR VCLAMP PVCCR

1 2 3 4 5 6 7 8 9 10 11 12

24 23 22 21 20 19 18 17 16 15 14 13

PGNDL PGNDL LOUT BSL AVCC AVCC GAIN0 GAIN1 BSR ROUT PGNDR PGNDR

PIN CONFIGURATION SOIC 150-MIL / 208-MIL

PAD CONFIGURATION WSON 6X5-MM

PIN CONFIGURATION PDIP 300-MIL

-21-

IC Block Diagram

EN25F32
Figure.1 CONNECTION DIAGRAMS

8 - LEAD SOP / DIP

8 - CONTACT VDFN

16 - LEAD SOP

-22-

IC Block Diagram

EN25F32
Figure 2. BLOCK DIAGRAM

-23-

IC Block Diagram

EN25F32
SIGNAL DESCRIPTION
Serial Data Input (DI) The SPI Serial Data Input (DI) pin provides a means for instructions, addresses and data to be serially written to (shifted into) the device. Data is latched on the rising edge of the Serial Clock (CLK) input pin. Serial Data Output (DO) The SPI Serial Data Output (DO) pin provides a means for data and status to be serially read from (shifted out of) the device. Data is shifted out on the falling edge of the Serial Clock (CLK) input pin. Serial Clock (CLK) The SPI Serial Clock Input (CLK) pin provides the timing for serial input and output operations. ("See SPI Mode") Chip Select (CS#) The SPI Chip Select (CS#) pin enables and disables device operation. When CS# is high the device is deselected and the Serial Data Output (DO) pin is at high impedance. When deselected, the devices power consumption will be at standby levels unless an internal erase, program or status register cycle is in progress. When CS# is brought low the device will be selected, power consumption will increase to active levels and instructions can be written to and data read from the device. After power-up, CS# must transition from high to low before a new instruction will be accepted. Hold (HOLD#) The HOLD pin allows the device to be paused while it is actively selected. When HOLD is brought low, while CS# is low, the DO pin will be at high impedance and signals on the DI and CLK pins will be ignored (dont care). The hold function can be useful when multiple devices are sharing the same SPI signals. Write Protect (WP#) The Write Protect (WP#) pin can be used to prevent the Status Register from being written. Used in conjunction with the Status Registers Block Protect (BP0, BP1and BP2) bits and Status Register Protect (SRP) bits, a portion or the entire memory array can be hardware protected.

Table 1. PIN Names


Symbol CLK DI DO CS# WP# HOLD# Vcc Vss Pin Name Serial Clock Input Serial Data Input Serial Data Output Chip Enable Write Protect Hold Input Supply Voltage (2.7-3.6V) Ground

-24-

IC Block Diagram

CONFIDENTIAL
2. Configuration

TC90517FG Toshiba products specification [Tentative]

All functions required for ISDB-T demodulation and error correction are built into the TC90517. The input signals to be supported are a low IF (intermediate frequency) signal and direct IF signal. Baseband IQ signals can also be input. The output signal is an MPEG-2 transport stream (TS) in serial format. Note that a TS in parallel format can be output by setting registers.

IF input or IQ input

ADC ADC

Quadrature detection AFC Tuner AGC control

Filter AGC

Interpolation ISIC (unguarded phase preecho/postecho suppression) correction

FFT
FFT window control

Frequency CPE

Pilot extraction

Adaptive interpolation filter

AGC control output External AGC input AGC distortion signal Tuner I C 2 Host I C
2

SW

Synchroni zation

Control

CVI
(CW interference detection)

CSI
(reliability detection)

Equalization

IC control

Layer isolation Demapping CSI processing Demapping CSI processing Demapping CSI processing

TMCC demodulation RS decoding TS multiplex

Byte deinterleaving

Crystal (reference clock)

Clock PLL

Bit deinterleaving

Modulation division

Frequency deinterleaving

Viterbi decoding

Energy despreading Energy despreading

Error detection

Synchronization flag

Memory

Time deinterleaving

Output control

TS output

Energy despreading

Fig. 2.1 TC90517FG Block Diagram

-25 -

IC Block Diagram

CONFIDENTIAL
3. Pin Assignment (Top view)

TC90517FG Toshiba products specification [Tentative]

-26-

IC Block Diagram
4. Pin Functions

This specification indicates pins and their signals in upper case letters and registers and their signals in lower case letters. Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Pin name TSMD0 XSEL1 XSEL0 VSS SLADRS1 SLADRS0 AGCI S_INFO AGCCNTI AGCCNTR CKI TNSCL VDDS TNSDA VSS VDDC PLLVSS XO
(Note4) (Note5,7)

I/O I I I I/O I/O I I I/O I/O I I/O I/O O

Function PU/PD Shut down Crystal frequency division ratio 1 PD PD OD OD Crystal frequency division ratio 0 Digital GND Slave address 1 Slave address 0 External AGC input Pin for pre-shipment test IF_AGC control output

(Note 3)

Remarks(Note 2 and 6) 0: Normal operation 1: Shut down Set according to crystal frequency. Set according to crystal frequency.

19

XI

I -

20 PLLVDD FIL O 21 22 AD_AVDD 23 AD_AVSS 24 AD_VREFP 25 AD_VREFN 26 AD_VREF -

27

ADQ_AIN

28

ADQ_AIP

29

ADI_AIN

30

ADI_AIP

Connects to DGND. Set according to slave address. Set according to slave address. Connects to DGND when not used. Connects to DGND. Connects to tuner IF_AGC control input pin. Connects to tuner RF_AGC control input pin. RF_AGC control output Open, fixed to L when not used. Pin for pre-shipment test Connects to DGND. Connects to tuner I2C clock pin. I2C clock output (Pull-up performed outside IC.) I/O power supply Connects to digital +3.3 V typ. Connects to tuner I2C data pin. I2C data I/O (Pull-up performed outside IC.) Digital GND Connects to DGND. Digital +1.2 V power supply Connects to digital +1.2 V typ. Clock PLL GND Connects to AGND. Connects to crystal. Crystal output ixosl="1" and open when an external reference clock is input. Connects to crystal. Crystal or reference clock input The amplitude (p-p) is 0.5 V to PLLVDD when an external reference clock is input. Clock PLL power supply Connects to analog +2.5 V typ. PLL filter output Connects to AGND via 1500 pF. ADC analog power supply Connects to analog +2.5 V typ. ADC analog GND Connects to AGND. ADC reference voltage output +1.75 V typ. Connects to AGND via PC. ADC reference voltage output +0.75 V typ. Connects to AGND via PC. ADC reference voltage output +1.25 V typ. Connects to AGND via PC. Single-ended IF: Connects to AGND via PC. Differential IF: Connects to AGND via PC. Q signal (differential negative side) Single-ended IQ: Connects to AGND via PC. input Differential IQ: Connects to tuner Q (-) output after the DC component was cut. Single-ended IF: Connects to AGND via PC. Differential IF: Connects to AGND via PC. Q signal (differential positive side) Single-ended IQ: Connects to tuner Q output after input the DC component was cut. Differential IQ: Connects to tuner Q (+) output after the DC component was cut. Single-ended IF: Connects to AGND via PC. Differential IF: Connects to tuner IF (-) output after IF signal (differential negative side) the DC component was cut. input or I signal (differential Single-ended IQ: Connects to AGND via PC. negative side) input Differential IQ: Connects to tuner I (-) output after the DC component was cut. Single-ended IF: Connects to tuner IF output after the DC component was cut. IF signal (differential positive side) Differential IF: Connects to tuner IF (+) output after input or I signal (differential the DC component was cut. positive side) input Single-ended IQ: Connects to tuner I output after the DC component was cut. Differential IQ: Connects to tuner I (+) output after the

-27-

IC Block Diagram

CONFIDENTIAL
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 AD_DVSS AD_ DVDD VSS DR1VDD VDDS VDDC VSS STSFLG1 DTCLK DTMB TSMD1 SYRSTN DR2VDD VSS SCL SDA VSS DR1VDD VDDS VSS STSFLG0 SLOCK RERR RLOCK RSEORF VDDC VSS PBVAL SBYTE SRDT SRCK VSS VDDC VDDS Note 2 Note 3 Note 4 Note 5 O I I I I/O I/O I/O I/O O O O O O O O O PD PD PU OD OD OD PD

TC90517FG Toshiba products specification [Tentative]


DC component was cut. Connects to DGND. Connects to digital +2.5 V typ. Connects to DGND. Connects to digital +1.2 V typ. Con nects to digital +3.3 V typ. Connects to digital +1.2 V typ. Connects to DGND. Open, fixed to L when not used. Open or connects to DGND. Open or connects to digital +3.3 V typ. Connects to DGND. Inputat specified timing at power ON. Connects to digital +2.5 V typ. Connects to DGND. Connects to I2C clock bus. (Pull-up performed outside IC.) Connects to I2C data bus. (Pull-up performed outside IC.) Connects to DGND. Connects to digital +1.2 V typ. Con nects to digital +3.3 V typ. Connects to DGND. Open, fixed to L when not used. Open, fixed to L when not used. Open, fixed to L when not used. Open, fixed to L when not used. Open, fixed to L when not used. Connects to digital +1.2 V typ. Connects to DGND. Open, fixed to L when not used. Open, fixed to L when not used. Connects to DGND. Connects to digital +1.2 V typ. Con nects to digital +3.3 V typ.

ADC digital GND ADC digital power supply Digital GND Digital +1.2 V power supply I/O power supply Digital +1.2 V power supply Digital GND Status flag 1 output Pin for pre-shipment test Pin for pre-shipment test Pin for pre-shipment test System reset input Digital +2.5 V power supply Digital GND I2C clock input for host CPU I2C data I/O for host CPU Digital GND Digital +1.2 V power supply I/O power supply Digital GND Status flag 0 output Synchronization completion (sequence 8 or higher) flag RS decoding error flag output RS decoding error free flag output TS error flag output Digital +1.2 V power supply Digital GND TS valid flag output TS synchronization byte flag output Serial TS data output TS serial clock output Digital GND Digital +1.2 V power supply I/O power supply

Note 6 Note 7

AGND is the abbreviation for analog GND, and DGND is the abbreviation for digital GND. The test dedicated pin is used for the pre-shipment test only. Make sure that processing is performed as indicated in the "Remarks" column. Any other method will lead to malfunction or failure. I/O indicates the type of the cell used. It may be different from the pin function because a test is conducted concurrently. PU indicates an I/O with a pull-up resistor (50 k typ.) and PD indicates an I/O with a pull-down resistor (50 k typ.). Pulling down the PU pin or pulling up the PD pin outside the IC sometimes changes the electric potential to the midpoint, resulting in instability. Caution is required. The unused output pins must be open and fixed to L by setting the output enable control register of each pin for noise reduction or to set the output OFF state. OD indicates an open drain I/O. To use the pin for output, pull up the resistance outside the IC.

* The following pins are added with the upgrade from TC90507 to TC90517 (except the changes of power supply and GND pins):
Pin Number 21 27 28 7 52 Pin Name FIL ADQ_AIN ADQ_AIP AGCI SLOCK Description Added to the PLL loop filter. Added for IQ input (differential). Added for IQ input. Added to passthrough the AGC control signal of other ICs. Changed from conventional FLOCK.

-28 -

IC Block Diagram

PRELIMINARY W9751G6JB
4. B A L L C O N FIG U R A TIO N

1 VD D

2 NC

3 VSS UDM VD D Q D Q 11 VSS LD M VD D Q DQ3 VSS W E BA1 A1 A5 A9 NC

5 A B C D E F G H J K L M N P R

VSSQ U D Q S VD D Q U D Q S VSSQ VD D Q DQ8 D Q 15 VD D Q D Q 13

D Q 14 V S S Q VD D Q DQ9

D Q 12 V S S Q VD D DQ6 VD D Q DQ4 NC VSSQ DQ1 VSSQ

D Q 10 V S S Q

V S S Q LD Q S V D D Q LD Q S V S S Q VD D Q DQ2
VSSDL

DQ7 VD D Q DQ5 VD D ODT

DQ0 VSSQ C LK C LK CS A0 A4 A8 NC

VD D L VR EF C KE NC BA0
A 10/ AP

RAS CAS A2 A6 A 11 NC

VD D

VSS

A3 A7

VSS

VD D

A 12

-29 -

IC Block Diagram

PRELIMINARY W9751G6JB
5. BALL DESCRIPTION
BALL NUMBER
M8,M3,M7,N2,N8,N3 ,N7,P2,P8,P3,M2,P7 ,R2

SYMBOL

FUNCTION

DESCRIPTION
Provide the row address for active commands, and the column address and Auto-precharge bit for Read/Write commands to select one location out of the memory array in the respective bank. Row address: A0A12. Column address: A0A9. (A10 is used for Auto-precharge) BA0BA1 define to which bank an ACTIVE, READ, WRITE or PRECHARGE command is being applied. Bi-directional data bus. ODT (registered HIGH) enables termination resistance internal to the DDR2 SDRAM. Data Strobe for Lower Byte: Output with read data, input with write data for source synchronous operation. Edge-aligned with read data, center-aligned with write data. LDQS corresponds to the data on DQ0DQ7. LDQS is only used when differential data strobe mode is enabled via the control bit at EMR (1)[A10 EMRS command]. Data Strobe for Upper Byte: Output with read data, input with write data for source synchronous operation. Edge-aligned with read data, center-aligned with write data. UDQS corresponds to the data on DQ8DQ15. is only used when differential data strobe mode is enabled via the control bit at EMR (1)[A10 EMRS command]. All commands are masked when is registered

A0A12

Address

L2,L3 G8,G2,H7,H3,H1,H9 ,F1,F9,C8,C2,D7,D3, D1,D9,B1,B9 K9

BA0BA1 DQ0DQ15 ODT

Bank Select Data Input / Output On Die Termination Control

LDQS, F7,E8 LDQS LOW Data Strobe

UDQS, B7,A8 UP Data Strobe

L8

Chip Select

HIGH.

provides for external bank selection on systems with is considered part of the command code.
(along with ) define the command being

multiple ranks. K7,L7,K3 RAS , CAS


Command Inputs RAS , CAS and entered.

B3,F3

UDM LDM

Input Data Mask

DM is an input mask signal for write data. Input data is masked when DM is sampled high coincident with that input data during a Write access. DM is sampled on both edges of DQS. Although DM pins are input only, the DM loading matches the DQ and DQS loading. CLK and CLK are differential clock inputs. All address and control input signals are sampled on the crossing of the positive edge of CLK and negative edge of CLK . Output (read) data is referenced to the crossings of CLK and CLK (both directions of crossing). CKE (registered HIGH) activates and CKE (registered LOW) deactivates clocking circuitry on the DDR2 SDRAM. VREF is reference voltage for inputs. Power Supply: 1.8V 0.1V. Ground. DQ Power Supply: 1.8V 0.1V. DQ Ground. Isolated on the device for improved noise immunity. No connection. DLL Ground. DLL Power Supply: 1.8V 0.1V.

J8,K8

CLK, CLK

Differential Clock Inputs

K2 J2 A1,E1,J9,M9,R1 A3,E3,J3,N1,P9 A9,C1,C3,C7,C9,E9, G1,G3,G7,G9 A7,B2,B8,D2,D8,E7, F2,F8,H2,H8 A2,E2,L1,R3,R7,R8 J7 J1

CKE VREF VDD VSS VDDQ VSSQ NC VSSDL VDDL

Clock Enable Reference Voltage Power Supply Ground DQ Power Supply DQ Ground No Connection DLL Ground DLL Power Supply

-30-

IC Block Diagram

PRELIMINARY W9751G6JB
6. BLOCK DIAGRAM

CLK CLK

DLL CLOCK BUFFER

CKE

CS RAS CAS WE

CONTROL SIGNAL GENERATOR COMMAND

DECODER COLUMN DECODER COLUMN DECODER

A10

CELL ARRAY BANK #0

CELL ARRAY BANK #1

A0 A9 A11 A12 BA0 BA1


ADDRESS BUFFER

MODE REGISTER

SENSE AMPLIFIER

SENSE AMPLIFIER

ODT

PREFETCH REGISTER DATA CONTROL CIRCUIT REFRESH COUNTER COLUMN COUNTER

DQ BUFFER ODT CONTROL

DQ0 | DQ15 LDQS LDQS UDQS UDQS LDM UDM

COLUMN DECODER

COLUMN DECODER

CELL ARRAY BANK #2

CELL ARRAY BANK #3

SENSE AMPLIFIER

SENSE AMPLIFIER

NOTE: The cell array configuration is 8192 * 1024 * 16

-31-

MAIN PCB-TOP

-32-

MAIN PCB-BOT

-33-

Power Input
1.32V 5VA U50 MP1482 5VA L3 C3 C2 10nF C386 1nF nc R14 43K_1% C6 C4 0.1uF 10uF 470uF/16V
D

1.32V DC-DC
2 VCC EN COMP
C122 0.1u C1 + R57 2.2K

DC-DC Module
OUT 2 IN GND BS COMP EN
R18 2K_1%

3.3VU

3 SW 3
22uH

1482OUT L37 22uH 12VA L2 FB

U3 MPS1482

1k

5VU 12VA 24VA

C105 CA54 + C116 0.1u C14 1n 100uF/16V

R52

10k 1482EN 1482COMP

7 6 8 SS
1482FB +

1n

R319

BST 1 6 7
Low ESR C383 CA2 + CA1 0.1uF 100uF

R41 100K

2 R29 4.7k C123 R55 4.7K

PWR-ON/OFF

R342 0.1u

H:ON L:OFF

100R C178 0.1u

STB CA17 470uF/16V C114 0.1u

4 GND 8
C11 47NF

CON6

FB FB SS
R12 10K_1%

5 5

For MCU
2010-3-14

PB-ADJUST PB-ON/OFF

14 13 12 11 10 9 8 7 6 5 4 3 2 1
3.3nF R40 5.6K

CON25-J25-14 1.8VA 5VA U51 MP1482

1.8V DC-DC 5V DC-DC


2 VCC EN COMP
C127 0.1u R60 10K_1%

C118 0.1u

OUT

1482OUT18 L38 22uH

Note: C103,C104 close to CON6 for EMI

R53

10k 1482EN18 1482COMP18

7 6 8 SS
1482FB18 C389 0.1u + CA18 470uF/16V R58 10K_1% Low ESR

+ CA12 C396 10u 0.1u R30 4.7k C128

12VA 24VA

12-24

L108

FB

100uF/16V

C15 1n

BST

4 GND FB

L116

NC/FB

For DDR
C

MST Power supply


12VA PL12V 1.32V 1.8VA 5VA PL5V

PANEL POWER
FB VCC-PL NC/FB R37 10K VCC-PL R10 NC R203 NC/100K U1 VCC-Panel

3.3VU

380mA
C407 NC/0.1u C410 NC/0.1u C412 0.1u C399 0.1u C400 0.1u C401 0.1u C394 NC/0.1u

3.3VA

150mA

1100mA

110mA

C377 0.1u

1 2 3 4
C13 0.1uF

S S S G

D D D D
CEM9435A

8 7 6 5

+ CA10 100uF/16V

IN

ADJ

OUT

5VU

U37 AMS1117-3.3V

C380 0.1u

3.3VU R44 10K + CA11 100uF/16V C32 NC/0.1uF

CA40

C378

C385

C387

100uF/16V

0.1u

NC/0.1u

0.1u

1 3 1
10n 2 1.8VA H:ON L:OFF C439 0.1u C442 0.1u C473 0.1u C450 0.1u C438 0.1u C436 0.1u C452 0.1u ON_PANEL R27 1K Q409 3904

3
Q411 3904 C104

R22 10K

CA7 100uF/16V

U38 AMS1117-3.3V 5VA 1.8VA

IN

ADJ

OUT

Inverter Interface
5VA 3.3VA R19 10K C429 0.1u C444 0.1u R20 10K R21 R24 2 ON_PBACK L:ON H:OFF 1K 1 100R PB-ON/OFF

3.3VA

2.5VA

230mA
C432 0.1u C445 0.1u C441 0.1u C468 0.1u C443 0.1u C427 0.1u

300mA_DDR2 Max

D38

1N4001

C379

0.1u

C384

C391 NC/0.1u

C393 0.1u

CA8

100uF/16V

100uF/16V

0.1u

CA6

3
Q407 3904

C334 1n

USB Power
5VU

For Power Drop Power Test Point


R339 10K 5VU 2 DCR-OUT R31 NC/0 R74 11K 12VA

5VA

R15 10K

12VA

U5 MPS1482

2 3 3
D141 9.1V R67 4.7K

IN

SW

C495

HW-RST

5V_TUNER HW-RST 2 12VA 3.3VU VCC-Panel DD31 BAT54 1 1.8VA

ADJ-PWM

R25 R39

0 NC/0

R17

4.7K

L8 FB

L9

+5V_USB

R16

0 / 22k

1 2

+ C34

C25

4 1 2
Q413 3904

R45 100K R76 39K

GND

10nF

22uH

Q406 3904

PB-ADJUST C255 NC/0.1u Note: Left C255 NC if want to output PWM puls

C29

CA4 100uF/16V 0.1uF

10uF

C481

BS

C31

COMP
C449 10n R68 2.2K

1nF

R49 47K_1% +

R69 10K

3.3VA

nc

1 2
D139 4.1V Q415 3904

1.32V LEDR 2 2.5VA VCC-PL

1 TP22 1 TP12 1 TP8 1 TP9

DCR-IN

3.3nF

EN

R42 2K_1%

CA19 470uF/16V

1 TP3 1 TP4 1 TP5 1 TP6 1 TP7 1 TP11

C37 0.1uF

R43 5.6K

FB

SS

R46 10K_1%

C475 0.1uF

ON_USB_MOS

R178

NC/10K

5V DC-DC

+5V_USB Power trace width should be > 40mil

Title POWER Size A2 Date:


4 3 2

Document Number 1/10 Friday, March 04, 2011


1

Rev 0.1 Sheet 1 of 10

SYSTEM EEPROM
3.3VA C316 R239 R237 4.7K 4.7K SCL SDA EPM_WP

MSD309PX
U21 NC/24C64 0.1u 10K 1 2 3 4 A0 A1 A2 GND VCC WP SCL SDA 3.3VA 8 7 6 5 R248 U2B MSD309PX 2010-3-31

U2C

MSD309PX

HDMI
W21 U21 U19 AD12 AC12 AD13 Y12 AA11 PAD_PCM_D[0] PAD_PCM_D[1] PAD_PCM_D[2] PAD_PCM_D[3] PAD_PCM_D[4] PAD_PCM_D[5] PAD_PCM_D[6] PAD_PCM_D[7]

AUDIO

PCMCIA

TS1

6 6 6 6 6 6 6 6 6 6 6

RXA0N RXA0P RXA1N RXA1P RXA2N RXA2P RXACLKN RXACLKP DDCASCL DDCASDA HOTPLUGA

G2 H3 H2 J3 J2 J1 G3 G1 M4 M5 K6

PAD_LINEIN_L0 PAD_LINEIN_R0 PAD_LINEIN_L1 PAD_LINEIN_R1 PAD_LINEIN_L2 PAD_LINEIN_R2 PAD_LINEIN_L5 PAD_LINEIN_R5

R4 R5 T6 U6 V6 U5 AD6 AC6

HD1-Lin HD1-Rin AV1-Lin AV1-Rin VGA-Lin VGA-Rin HD2-Lin HD2-Rin PAD_TS1_D[0] PAD_TS1_D[1] PAD_TS1_D[2] PAD_TS1_D[3] PAD_TS1_D[4] PAD_TS1_D[5] PAD_TS1_D[6] PAD_TS1_D[7] PAD_TS1_CLK PAD_TS1_VLD PAD_TS1_SYNC Y16 AD14 AD15 AC15 AC16 Y17 AB17 AB19 Y18 AE16 AB16

7 7

HD-Lin HD-Rin AV1-Lin AV1-Rin VGA-Lin VGA-Rin AV2-Lin AV2-Rin

7 7 7 7

I2C address at 0xA0

PAD_RX0N_A PAD_RX0P_A PAD_RX1N_A PAD_RX1P_A PAD_RX2N_A PAD_RX2P_A PAD_RXCN_A PAD_RXCP_A DDCDA_CK DDCDA_DA PAD_HOTPLUGA SCL SDA SCL SDA SCL R344 SDA U2F 1.32V MSD309PX R364 100 I2C-SDA 100 2010-5-6 I2C-SCL C507 C508 NC/11 00 NC/100pF 0 pF C-L10 1W 0 05-2 C-L10W05-2

PAD_LINEOUT_L0 PAD_LINEOUT_R0 PAD_LINEOUT_L3 PAD_LINEOUT_R3

V1 V2 AA6 Y5

AUOUTL0 AUOUTR0 AUOUTL1 AUOUTR1

9 9

PAD_EARPHONE_OUTL PAD_EARPHONE_OUTR

AD5 AE5

AUOUTL2 AUOUTR2

9 9

MSD309 TS0

PAD_VRP PAD_VAG AVSS_VRM_ADC_DAC

AB4 AB5 AC3

AUVRP AUVAG AUVRM

6 6 6 6 6 6 6 6 6 6 6

RXB0N RXB0P RXB1N RXB1P RXB2N RXB2P RXBCLKN RXBCLKP DDCBSCL DDCBSDA HOTPLUGB

D2 E3 E2 F3 F2 F1 D3 D1 J6 L6 J4

PAD_RX0N_B PAD_RX0P_B PAD_RX1N_B PAD_RX1P_B PAD_RX2N_B PAD_RX2P_B PAD_RXCN_B PAD_RXCP_B DDCDB_CK DDCDB_DA HOTPLUGB

I2S

C30 2.2u

C36 2.2u

I2S_OUT_MCK I2S_OUT_SD

L34 GND GND GND GND GND I2C-SCL H20 J20 DVDD_MIUA DVDD_MIUB AVDD1P2 1 DCR-OUT J21 VIFP VIFM 2.5VA M8 M9 AVDD2P5_ADC AVDD2P5_ADC AVDD25_REF AVDD25_REF AVDD_AU25 AVDD25_MOD AVDD25_MOD AVDD25_PGA AVSS_PGA L35 RF_AGC_SEL SIF_CTL 5V_Tuner FB C44 T8 U8 3.3VU R180 10k 0.1u RF_AGC L41 C166 47n FB R215 R188 5V_Tuner T_SDA T_SCL T_SDA T_SCL G10 AVDD_DMPLL AVDD3P3_ADC AVDD3P3_ADC AVDD_AU33 AVDD_EAR33 H9 H10 K9 U2A J9 3.3VA 3 MIUA_A[0:13] E19 F19 VDDP VDDP AVDD_LPLL_MEMPLL G18 MIUA_A[0:13] MIUB_A[0:13] 3 MSD309PX 4 4 R216 R217 2010-9-10 For IIC selection 100 100 4.7K 4.7K 4 R176 10K P8 P9 4 R9 N8 N9 TV-SIFP TV-SIFM 4 4 I2C-SCL V7 W7 CON3 AC2 AE1 Y10

Y24 Y22 AB22 AA22 AA20 Y21 AA18 AA19 AA16 AA14 AA12 Y15 AA17 AA15 AE14 Y20 PAD_PCM_A[0] PAD_PCM_A[1] PAD_PCM_A[2] PAD_PCM_A[3] PAD_PCM_A[4] PAD_PCM_A[5] PAD_PCM_A[6] PAD_PCM_A[7] PAD_PCM_A[8] PAD_PCM_A[9] PAD_PCM_A[10] PAD_PCM_A[11] PAD_PCM_A[12] PAD_PCM_A[13] PAD_PCM_A[14] PAD_PCM_RESET

LVDS CONNECTOR

PAD_I2S_OUT_MCK PAD_I2S_OUT_SD PAD_I2S_OUT_WS PAD_I2S_OUT_BCK

A6 B5 B6 C6

I2S_OUT_BCK

PAD_TS0_D[0] PAD_TS0_D[1] PAD_TS0_D[2] PAD_TS0_D[3] PAD_TS0_D[4] PAD_TS0_D[5] PAD_TS0_D[6] PAD_TS0_D[7] PAD_TS0_CLK PAD_TS0_VLD PAD_TS0_SYNC E22 F22 E21 F21 G21 H21 E20 F20 G20 G22 VDDC1.2V VDDC1.2V VDDC1.2V VDDC1.2V VDDC1.2V VDDC1.2V VDDC1.2V VDDC1.2V VDDC1.2V VDDC1.2V 2.2K 2.2K

U20 V20 R19 AE13 AC13 Y11 AB11 AB13 Y19 Y23 W20 TS_D0 TS_D1 TS_D2 TS_D3 TS_D4 TS_D5 TS_D6 TS_D7 TS_CLK TSVALID TSSTART 10 10 10 10 10 10 10 10 10 10 10

TS_D0 TS_D1 TS_D2 TS_D3 TS_D4 TS_D5 TS_D6 TS_D7 TS_CLK TSVALID TSSTART

PAD_I2S_IN_BCK(USB_OCD) PAD_I2S_IN_SD(LED_ON) PAD_I2S_IN_WS(WARM_LED_ON)

C1 H6 G6

FB

6 6 6 6 6 6 6 6 6 6 6 AD16 Y13 Y14 AA13 AC14 AB23 AB20 AB14 AA21

RXC0N RXC0P RXC1N RXC1P RXC2N RXC2P RXCCLKN RXCCLKP DDCCSCL DDCCSDA HOTPLUGC

AC8 AD9 AC9 AD10 AE10 AC10 AE8 AD8 AE7 AD7 AC7

FRONT END
PAD_IP PAD_IM AA3 AA2 C171 0.1u C174 0.1u R381 R382

PAD_RX0N_C PAD_RX0P_C PAD_RX1N_C PAD_RX1P_C PAD_RX2N_C PAD_RX2P_C PAD_RXCN_C PAD_RXCP_C DDCDC_CK DDCDC_DA PAD_HOTPLUGC PAD_PCM_IRQA_N PAD_PCM_OE_N PAD_PCM_IORD_N PAD_PCM_CE_N PAD_PCM_WE_N PAD_PCM_CD_N PAD_PCM_WAIT_N PAD_PCM_IOWR_ N PAD-PCM_REG_N

I2C-SDA

I2C-SDA

SPDIF MSD306
Y25 PAD_PCM2_CE_N PAD_VIFP PAD_VIFM AB1 AA1 AB2 AB3 AD3 AE3 PAD_QP PAD_QM Y3 Y2

HDMI-CEC

K5

PAD_CEC

PAD_SPDIF_OUT

P5

SPDIFO

RXO0RXO1RXO2RXOCRXO3RXO4DCR-OUT MODE

RXO0+ RXO1+ RXO2+ RXOC+ RXO3+ RXO4+ DCR-IN I/O DCR-IN 1

U2E

MSD309PX

RGB NAND FLASH


PAD_IFAGC PAD_RFAGC_TAGC PAD_SIFP PAD_SIFM

CVBS

AV1-Vin+ SV2-Yin SV2-Cin

7 7

PADA_CVBS0 PADA_CVBS1 PADA_CVBS2 PADA_CVBS3 PADA_CVBS4 PADA_CVBS5 T21 T19 P21 P20 R20 T20 P19 PAD_PF_ALE PAD_PF_AD[15] PAD_PF_CE0Z PAD_PF_CE1Z PAD_PF_OEZ PAD_PF_WEZ PAD_F_RBZ PAD_TGPIO0(RF_AGC_CTRL) PAD_TGPIO1(DEMOD_RESET) PAD_TGPIO2(TUNER_SCL) PAD_TGPIO3(TUNER_SDA) AC4 AD2 AD4 AE4

AC5 W4 W5 AA5 W2 W3

AV4-Vin+

RXE0RXE1RXE2RXECRXE3RXE4VCC-Panel

RXE0+ RXE1+ RXE2+ RXEC+ RXE3+ RXE4+

7 7 7 7 7 7 7 7 7

RGB0_RINRGB0_RIN+ RGB0_GINRGB0_GIN+ RGB0_BINRGB0_BIN+ RGB0-SOG VGA_HSYNC VGA_VSYNC

M2 M3 L2 L3 K1 K3 K2 N4 N5

PADA_RIN0M PADA_RIN0P PADA_GIN0M PADA_GIN0P PADA_BIN0M PADA_BIN0P PADA_SOGIN0 PAD_HSYNC0 PAD_VSYNC0

PADA_CVBS_OUT1 PADA_CVBS_OUT2

CVBS_OUT V3 AA4

CVBS_OUT

46 44 42 40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 C75 0.1u C75 close to CON30

GND GND SCL SDA GND GND A0A0+ A1A1+ A2A2+ ACACA3A3+ A4A4+ GND GND DCR-I DCR-O MODE I/O GND GND B0B0+ B1B1+ B2B2+ BCBC+ B3B3+ B4B4+ GND GND GND GND VCC VCC VCC VCC CON46

45 43 41 39 37 35 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1

7 7 7 7 7 7 7 E9 E10 F9 F10 G9 AVDD_DVI AVDD_DVI AVDD_DVI AVDD_DVI AVDD_DVI

RGB1_RRGB1_R+ RGB1_GRGB1_G+ RGB1_BRGB1_B+ RGB1_SOG

R3 P2 P3 N2 N3 M1 N1 W6 Y6

PADA_RIN1M PADA_RIN1P PADA_GIN1M PADA_GIN1P PADA_BIN1M PADA_BIN1P PADA_SOGIN1 PAD_HSYNC1 PAD_VSYNC1

PADA_VCOM

W1 47n

C82 68R

R504

FLASH
3.3VU

7 7 7 7 7 7 7

COMP_RCOMP_R+ COMP_YCOMP_Y+ COMP_BCOMP_B+ COMP_SOG+

U2 U3 T2 T1 R1 R2 T3 V4

24 23 22 21

PADA_RIN2M PADA_RIN2P PADA_GIN2M PADA_GIN2P PADA_BIN2M PADA_BIN2P PADA_SOGIN2 PAD_HSYNC2

U24 MX25L6445E SPI-SCK 1 2 C170 0.1u 3 4 5 6 SPI-CSN SPI-SDO 7 8 HOLD VCC NC1 NC2 NC3 NC4 SO16-CS DO CLK DI NC8 NC7 NC6 NC5 VSS WP/Vpp 16 15 14 13 SPI-SDI

PWM

LVDS

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

V8 W8 V9 W9 J10 K10 M10 N10 P10 R10 T10 U10 V10 W10 D11 G11 H11 J11 K11 L11 M11 N11 P11 R11 T11 U11 V11 W11 D12 E12 F12 G12 H12 J12 K12 L12 M12 N12 P12 R12 T12 U12 V12 W12 D13 E13 F13

PWM0 PWM1 1.8VA

RP52

ADJ-PWM

AB25 AB24 E6 D6

SOP8-VCC SOP8-HOLD SOP8-CLK SOP8-DI

U2D

MSD309PX

MSD306 MIUA
MIUB_A[0:13]

MIUB

PAD_PWM0 PAD_PWM1 PAD_PWM2 PAD_PWM3

SOIC8 208mil

12 11 10 9 100K C336 0.1u R224 FLASH_WP

RP53

SAR
E17 E18 F17 F18 G17 MIUB_DQ[0:15] 3

7 5 3 1 7 5 3 1 7 5 3 1

8 6 4 2 8 6 4 2 8 6 4 2

KEY0 KEY1 3 MIUA_DQ[0:15] MIUA_DQ[0:15] MIUB_DQ[0:15]

PAD_SAR0 PAD_SAR1 PAD_SAR2(POWER_DET) PAD_SAR3 G16 H16 H17 J16 J17

PADA_OUTP_CH[6](PAD_R_ODD[7]) PADA_OUTN_CH[6](PAD_R_ODD[6]) PADA_OUTP_CH[7](PAD_R_ODD[5]) PADA_OUTN_CH[7](PAD_R_ODD[4]) PADA_OUTP_CH[8](PAD_R_ODD[3]) PADA_OUTN_CH[8](PAD_R_ODD[2]) PADA_OUTP_CH[9](PAD_R_ODD[1]) PADA_OUTN_CH[9](PAD_R_ODD[0]) PADA_OUTP_CH[10](PAD_G_ODD[7]) PADA_OUTN_CH[10](PAD_G_ODD[6]) PADA_OUTP_CH[11](PAD_G_ODD[5]) PADA_OUTN_CH[11](PAD_G_ODD[4]) AVDD_DDRA AVDD_DDRA AVDD_DDRA AVDD_DDRA AVDD_DDRA AVDD_DDRB AVDD_DDRB AVDD_DDRB AVDD_DDRB AVDD_DDRB

RP55

17 18 19 20

SPI

RP58

SOP8-CS SOP8-DO SOP8-WP/Vpp VSS

J5 G4 B4 AA7

AC24 AC25 AD24 AD25 AE24 AC23 AE23 AD23 AE22 AC22 AC21 AD22

LVB0P LVB0N LVB1P LVB1N LVB2P LVB2N LVBCP LVBCN LVB3P LVB3N LVB4P LVB4N

LVB0N 0RX4 LVB0P LVB1N LVB1P LVB2N 0RX4 LVB2P LVBCN LVBCP LVB3N 0RX4 LVB3P LVB4N LVB4P

RP54

RXO0RXO0+ RXO1RXO1+ RXO2RXO2+ RXOCRXOC+ RXO3RXO3+ RXO4RXO4+

MIUA_A0 MIUA_A1 MIUA_A2 MIUA_A3 MIUA_A4 MIUA_A5 MIUA_A6 MIUA_A7 MIUA_A8 MIUA_A9 MIUA_A10 MIUA_A11 MIUA_A12 MIUA_A13 C10 A22 A9 B23 B9 A23 C9 C23 B8 A24 B22 C8 B24 B7 PAD_IO[8](A_A0) PAD_IO[41](A_A1) PAD_IO[5](A_A2) PAD_IO[44](A_A3) PAD_IO[3](A_A4) PAD_IO[43](A_A5) PAD_IO[6](A_A6) PAD_IO[45](A_A7) PAD_IO[4](A_A8) PAD_IO[46](A_A9) PAD_IO[42](A_A10) PAD_IO[2](A_A11) PAD_IO[35](A_A12) PAD_IO[0](A_A13) PAD_IO[55](B_A0) PAD_IO[88](B_A1) PAD_IO[52](B_A2) PAD_IO[91](B_A3) PAD_IO[50](B_A4) PAD_IO[90](B_A5) PAD_IO[53](B_A6) PAD_IO[92](B_A7) PAD_IO[51](B_A8) PAD_IO[93](B_A9) PAD_IO[89](B_A10) PAD_IO[49](B_A11) PAD_IO[82](B_A12) PAD_IO[47](B_A13) E23 U24 D24 V25 D25 V24 D23 W25 C25 W24 V23 C24 W23 B25

MIUB_A0 MIUB_A1 MIUB_A2 MIUB_A3 MIUB_A4 MIUB_A5 MIUB_A6 MIUB_A7 MIUB_A8 MIUB_A9 MIUB_A10 MIUB_A11 MIUB_A12 MIUB_A13

GND GND GND GND GND GND GND GND GND GND

H13 J13 K13 L13 M13 N13 P13 R13 T13 U13

SPI-CSN 22R SPI-SCK 22R SPI-SDI22R SPI-SDO 22R

SPI-CSNI R50 5 SPI-SCKI R50 6 SPI-SDII R50 7 SPI-SDOI R50 8 FLASH_WP

C4 A4 A2 B3 A3 B2

PAD_GPIO_PM6(BOOT_FLASH_CS) PAD_SPI_CZ(BACKUP_FLASH_CS) PAD_SPI_CK PAD_SPI_DI PAD_SPI_DO PAD_GPIO_PM8(FLASH_WP)

#F_WP DVDD_NODIE L10

RP56

DVDD_NODIE C52 2.2u

7 5 3 1 7 5 3 1 7 5 3 1

UART-RX UART-TX

P6 N6

PADA_OUTP_CH[12](PAD_G_ODD[3]) PADA_OUTN_CH[12](PAD_G_ODD[2]) PADA_OUTP_CH[13](PAD_G_ODD[1]) PADA_OUTN_CH[13](PAD_G_ODD[0]) PADA_OUTP_CH[14](PAD_B_ODD[7]) PADA_OUTN_CH[14](PAD_B_ODD[6]) PADA_OUTP_CH[15](PAD_B_ODD[5]) PADA_OUTN_CH[15](PAD_B_ODD[4]) PADA_OUTP_CH[16](PAD_B_ODD[3]) PADA_OUTN_CH[16](PAD_B_ODD[2]) PADA_OUTP_CH[17](PAD_B_ODD[1]) PADA_OUTN_CH[17](PAD_B_ODD[0])

AC20 AD21 AE20 AD20 AE19 AC19 AC18 AD19 AC17 AD18 AE17 AD17

LVA0P LVA0N LVA1P LVA1N LVA2P LVA2N LVACP LVACN LVA3P LVA3N LVA4P LVA4N

LVA0N 0RX4 LVA0P LVA1N LVA1P LVA2N 0RX4 LVA2P LVACN LVACP LVA3N 0RX4 LVA3P LVA4N LVA4P

8 6 4 2 8 6 4 2 8 6 4 2

UART/I2CS

RXE0RXE0+ RXE1RXE1+ RXE2RXE2+ RXECRXEC+ RXE3RXE3+ RXE4RXE4+

DDCA_CK DDCA_DA

GPIO_TCON

MIUA_DQ0 MIUA_DQ1 MIUA_DQ2 MIUA_DQ3 MIUA_DQ4 MIUA_DQ5 MIUA_DQ6 MIUA_DQ7 MIUA_DQ8 MIUA_DQ9 MIUA_DQ10 MIUA_DQ11 MIUA_DQ12 MIUA_DQ13 MIUA_DQ14 MIUA_DQ15 C13 A19 A12 B19 C20 B12 C19 A13 B14 C18 C14 A18 B18 B13 B17 C15 PAD_IO[14](A_DQ0) PAD_IO[32(A_DQ1) PAD_IO[15](A_DQ2) PAD_IO[33](A_DQ3) PAD_IO[34](A_DQ4) PAD_IO[13](A_DQ5) PAD_IO[31](A_DQ6] PAD_IO[17](A_DQ7) PAD_IO[18](A_DQ8) PAD_IO[29](A_DQ9) PAD_IO[19](A_DQ10) PAD_IO[30](A_DQ11) PAD_IO[28](A_DQ12) PAD_IO[16](A_DQ13) PAD_IO[27](A_DQ14) PAD_IO[20](A_DQ15) PAD_IO[61](B_DQ0) PAD_IO[79](B_DQ1) PAD_IO[62](B_DQ2) PAD_IO[80](B_DQ3) PAD_IO[81](B_DQ4) PAD_IO[60](B_DQ5) PAD_IO[78](B_DQ6) PAD_IO[64](B_DQ7) PAD_IO[65](B_DQ8) PAD_IO[76](B_DQ9) PAD_IO[66](B_DQ10) PAD_IO[77](B_DQ11) PAD_IO[75](B_DQ12) PAD_IO[63](B_DQ13) PAD_IO[74](B_DQ14) PAD_IO[67](B_DQ15) H23 P24 G24 R23 R24 G25 P23 H24 J25 N23 J24 N24 N25 J23 M25 K23

MIUB_DQ0 MIUB_DQ1 MIUB_DQ2 MIUB_DQ3 MIUB_DQ4 MIUB_DQ5 MIUB_DQ6 MIUB_DQ7 MIUB_DQ8 MIUB_DQ9 MIUB_DQ10 MIUB_DQ11 MIUB_DQ12 MIUB_DQ13 MIUB_DQ14 MIUB_DQ15

GND GND GND GND GND GND GND GND GND GND GND GND GND GND

D14 E14 F14 G14 H14 J14 K14 L14 M14 N14 P14 R14 T14 U14

KEYBOARD
CON10 5VU
B

I2CM
3 MIUA_DQS0 3 MIUA_DQS0B 3 MIUA_DQS1 3 MIUA_DQS1B 3 MIUA_DQM0 3 MIUA_DQM1 MIUA_MCLK MIUA_MCLKZ MIUA_MCKE C12 B11 C21 PAD_IO[12](A_MCLK) PAD_IO[10](A_MCLKZ) PAD_IO[37](A_CKE) PAD_IO[59](B_MCLK) PAD_IO[57](B_MCLKZ) PAD_IO[84](B_CKE) G23 F25 T23 MIUB_MCLK MIUB_MCLKZ MIUB_MCKE MIUA_DQM0 MIUA_DQM1 B16 C17 PAD_IO[26](A_DQM0) PAD_IO[25](A_DQM1) PAD_IO[73](B_DQM0) PAD_IO[72](B_DQM1) M23 M24 MIUB_DQM0 MIUB_DQM1 MIUB_DQM0 MIUB_DQM1 3 3 A16 C16 A15 B15 PAD_IO[23](A_DQS0) PAD_IO[24](A_DQS0B) PAD_IO[21](A_DQS1) PAD_IO[22](A_DQS1B) PAD_IO[70](B_DQS0) PAD_IO[71](B_DQS0B) PAD_IO[68](B_DQS1) PAD_IO[69](B_DQS1B) MIUB_DQS0 MIUB_DQS0B MIUB_DQS1 MIUB_DQS1B 3 3 3 3 L24 L23 K24 K25

EPM_WP

L_R_INDICATOR

10 10

SCL SDA

SCL SDA

AA23 AA24

PAD_DDCR_CK PAD_DDCR_DA

LOCAL_DIM 3D_ENABLE

Demod_RST

10

MIUA_DQS0 MIUA_DQS0B MIUA_DQS1 MIUA_DQS1B

MIUB_DQS0 MIUB_DQS0B MIUB_DQS1 MIUB_DQS1B

KEY0-in KEY1-in

IR
3 MIUA_MCLK 3 MIUA_MCLKZ 3 MIUA_MCKE

IR_SYNC

G5

PAD_TCON0 PAD_TCON1(SC1_RE1) PAD_TCON2(FE_ANT5V_MONITOR) PAD_TCON3(TUNER_RESET) PAD_TCON4 PAD_TCON5(SC1_MUTE) PAD_TCON6(PCM_5V_CTL) PAD_TCON7(SIDE_AV_DET) MIUB_MCLK MIUB_MCLKZ MIUB_MCKE 3 3 3

AA10 T5 AB10 AB7 AA9 V5 AC11 AA8

HEADPHONE_DET 9

PAD_IRIN

C173 39p

3D-RST

IR-in LED R496 100 LED_R R499 2 2 2 2 D131D133D132 CON20W-J20-12 1 1 1 1 INPAQ_VPORT INPAQ_VPORT INPAQ_VPORT INPAQ_VPORT R497 NC/4.7K 2010-4-14 D138 R500 3.3VA 3.3VU NC/0 0

Y1 24MHZ

R212

XTAL

PAD_TCON9(COMP_DET) PAD_TCON10(HP_DET) PAD_TCON11(HP_MUTE)

R6 Y8 Y9

ON_USB MUTE_HP

C172

GND GND GND GND GND GND GND GND GND GND GND GND GND GND

D15 E15 F15 G15 H15 J15 K15 L15 M15 N15 P15 R15 T15 U15

R476

1M 0R

XTALI AD1 XTALO AE2

39p

PAD_XTAL_IN PAD_XTAL_OUT

1 2 3 4 5 6 7 8 9 10 11 12 MIUB_WEZ MIUB_RASZ MIUB_CASZ MIUB_BA0 MIUB_BA1 MIUB_BA2 MIUB_ODT 3 3 3 3 3 3 3

PAD_TCON15(SC1_DET)

T4

RESET
3.3VA MVREF R371 4.7K R372 4.7K R373 4.7K D22

HW-RST

E5

GPIO

3 3 3 3 3 3 3

MIUA_WEZ MIUA_RASZ MIUA_CASZ MIUA_BA0 MIUA_BA1 MIUA_BA2 MIUA_ODT

MIUA_WEZ MIUA_RASZ MIUA_CASZ MIUA_BA0 MIUA_BA1 MIUA_BA2 MIUA_ODT B20 B10 A10 A21 B21 C22 C11 PAD_IO[36](A_WEZ) PAD_IO[9](A_RASZ) PAD_IO[7](A_CASZ) PAD_IO[39](A_BA0) PAD_IO[38](A_BA1) PAD_IO[40](A_BA2) PAD_IO[11](A_ODT) PAD_IO[83](B_WEZ) PAD_IO[56](B_RASZ) PAD_IO[54](B_CASZ) PAD_IO[86](B_BA0) PAD_IO[85](B_BA1) PAD_IO[87](B_BA2) PAD_IO[58](B_ODT) R25 F23 E24 T24 T25 U23 F24

MIUB_WEZ MIUB_RASZ MIUB_CASZ MIUB_BA0 MIUB_BA1 MIUB_BA2 MIUB_ODT MVERF

PAD_RESET

MUTE_AMP

USB

ON_PBACK ON_PANEL

1 1

N19 M19 L19 K19 N20 M20 L20 K20 N21 M21 L21 K21 N22 M22 L22 K22 J22 H22

8 8 8 8 1.8VA MUTE_AMP R145 R154 R9 10k 20100122 100 MODE C39 0.1u 100 I/O R8 10k MVERF

USB_DP USB_DM USB1_DP USB1_DM

C2 B1 AD11 AE11

PAD_DP_P0 PAD_DM_P0 PAD_DP_P1 PAD_DM_P1

PAD_GPIO0(NTP_MUTE) PAD_GPIO1(AMP_RST) PAD_GPIO2(INV_CTL) PAD_GPIO3(PANEL_CTL) PAD_GPIO4(USB_CTL) PAD_GPIO5(ERROR_OUT) PAD_GPIO12(AMD_SCL) PAD_GPIO13(AMP_SDA)

A7 C7 F4 E4 C3 D4 F6 F5

IPOD_RX IPOD_TX

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

3.3VU R495 R489

GPIO_PM

LEDR

IPOD_RX

PWR-ON/OFF

8.2K KEY0-in KEY1-in

8.2K R493 R492 C330 C331 0.1uF 0.1uF 5VU R490 100 100 KEY0 KEY1 KEY0 KEY1

IPOD_TX

F11 E11

PAD_GND_EFUSE PAD_TESTPIN

PAD_GPIO_PM0(5V_HDMI_3) PAD_GPIO_PM1(5V_HDMI_1) PAD_GPIO_PM4(POWER_ON_OFF) PAD_GPIO_PM5(5V_HDMI_2) PAD_GPIO_PM11(DSUB_DET) PAD_GPIO_PM12(EDID_WP)

AB8 H5 C5 K4 L5 M6

U18 T18 R18 P18 N18 M18 L18 K18

GND GND GND GND GND GND GND GND

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

U16 T16 R16 P16 N16 M16 L16 K16 F16 E16 D16 K17 L17 M17 N17 P17 R17 T17 U17

RESET

LED

3D

Mode Selection
3.3VA R33 R35 R70 R26 R47 10K NC/10K 10K 10K 10K I2S_OUT_SD I2S_OUT_MCK I2S_OUT_BCK PWM1 PWM0 NC/10K 10k NC/10K NC/10K NC/10K R350

DEBUG PORT
A

3.3VU IR-in 3.3VU

10K R494

1K C337 39pF R349 R351 R352 R356 CON31 R221 4.7K R222 4.7K

IR_SYNC C208 39P

IR_SYNC

C309 0.1u

2.2K

R253 100K

DD30 BAV99

3.3VU

R411

HW-RST

HW-RST

Close to MSD309

R259

10K 1 3906 Q41

R249

100R HW-RST

LEDR

R347

100R

LED_R

LEDR

LEDR

1 2 3 4 NC/CON4-2.0mm Debug Port

R126 ISP-RXD 22R UART-RX ISP-TXD 22R UART-TX R124

C308 2.2u

R252 100K

ISP-TXD ISP-RXD

7 7

C307 1n

Title MSD309 Size Document Number Custom2/10 Date:


3 2

Rev 0.1 Friday, December 10, 2010


1

Sheet

of

10

RP50 1 3 5 7 MA_MCLK MA_MCLKZ 1.8VA

22RX4

RP39 22RX4

1 3 5 7

RP57 A1 E1 J9 M9 R1 J1 VddL 3 A Vdd B DQ14 C R23 R71 VddQ D DQ12 E 100R 100R Vdd F DQ6 G VddQ H DQ4 VssQ DQ3 DQ2 VssQ DQ5 MA_ODT MA_RASZ DQ1 VddQ VddQ DQ0 VddQ C430 47n VssQ LDM LDQS VssQ DQ7 DQ7 DQ0 DQ2 DQ5 F9 G8 H7 H9 MA_DQ7 MA_DQ0 MA_DQ2 MA_DQ5 NC Vss VssQ LDQS# VddQ VssQ DQ11 DQ10 VssQ DQ13 DQ9 VddQ VddQ DQ8 VddQ DQ15 DQ8 DQ10 DQ13 B9 C8 D7 D9 MA_DQ15 MA_DQ8 MA_DQ10 MA_DQ13 VssQ UDM UDQS VssQ DQ15 NC Vss VssQ UDQS# VddQ A_MVERF MA_CKE MA_MCLK MA_MCLKZ VddQ VddQ VddQ VddQ VddQ VddQ VddQ VddQ VddQ VddQ 7 8 9 A9 C1 C3 C7 C9 E9 G1 G3 G7 G9 U9 W9751G6IB-25 B3 F3 UDM LDM 1 2 Vdd Vdd Vdd Vdd Vdd MA_DQM1 MA_DQM0 R13 75RX4 7 5 3 1 8 6 4 2 MA_WEZ MA_CKE MA_BA1 MA_BA0 MA_DQ11 MA_DQ12 MA_DQ9 MA_DQ14 D3 D1 C2 B1 DQ11 DQ12 DQ9 DQ14 75R MA_ODT

1 3 5 7

Close to DRAM
F7 E8 B7 A8 LDQS LDQS# UDQS UDQS# Vref CKE CLK CLK# J2 K2 J8 K8

2 4 6 8

2 MIUA_DQS1 2 MIUA_DQS1B

MIUA_DQS1 MIUA_DQS1B

MA_DQS1 MA_DQSB1

2 MIUA_ODT

MIUA_ODT

2 4 6 8

22RX4

2 4 6 8

2 MIUA_DQS0 2 MIUA_DQS0B

MIUA_DQS0 MIUA_DQS0B

MA_DQS0 MA_DQSB0

2 MIUA_MCLK 2 MIUA_MCLKZ

MA_DQS0 MA_DQSB0 MA_DQS1 MA_DQSB1

RP12

22RX4

1 3 5 7

2 4 6 8

2 MIUA_DQM1 2 MIUA_DQM0

MIUA_DQM1 MIUA_DQM0

MA_DQM1 MA_DQM0

2 2 2 2

MIUA_WEZ MIUA_MCKE MIUA_BA1 MIUA_BA0

MIUA_WEZ RP15 MIUA_MCKE MIUA_BA1 MIUA_BA0

Close to MSD306
MA_DQ6 MA_DQ1 MA_DQ3 MA_DQ4 F1 G2 H3 H1 DQ6 DQ1 DQ3 DQ4 RP5 75RX4

Close to MSD306

2 MIUA_A[0:13]

MIUA_A[0:13]

2 MIUA_DQ[0:15]

MIUA_DQ[0:15]

RP1

22RX4

Close to DRAM

1 3 5 7

MIUA_A4 MIUA_A6 MIUA_A8 MIUA_A11 J VddL MA_CASZ K CKE L RFU M A10 N Vss P A7 R Vdd NC NC NC Vss Vss Vss Vss Vss VssQ VssQ VssQ VssQ VssQ VssQ VssQ VssQ VssQ VssQ VssDL A12 RFU RFU NC A9 A11 Vss A8 A3 A5 A6 A4 A8 A11 WE# P8 P7 K3 MA_A8 MA_A11 MA_WEZ MA_A9 MA_A12 MA_A7 MA_A3 P3 R2 P2 N2 A9 A12 A7 A3 RFU RFU RFU R8 A2 E2 A3 E3 J3 N1 P9 A7 B2 B8 D2 D8 E7 F2 F8 H2 H8 J7 R7 L1 R3 MA_BA2 A1 A2 A0 Vdd BA0 BA1 CAS# CS# A0 A2 A4 A6 M8 M7 N8 N7 MA_A0 MA_A2 MA_A4 MA_A6 WE# RAS# CK# ODT Vref Vss VssDL CK Vdd 2 4 6 8 MA_BA1 MA_BA0 L3 L2 BA1 BA0 A1 A10 A5 M3 M2 N3 MA_A1 MA_A10 MA_A5 ODT RAS# CS# CAS# K9 K7 L8 L7

1 3 5 7

1 3 5 7

1 3 5 7

7 5 3 1 1 3 5 7

1 3 5 7

2 4 6 8

MIUA_DQ7 MIUA_DQ0 MIUA_DQ2 MIUA_DQ5 75RX4 MIUA_A13 R383 75R MA_A13 MA_A13

MA_DQ7 MA_DQ0 MA_DQ2 MA_DQ5

2 MIUA_CASZ 2 MIUA_RASZ

MIUA_A2 RP18 MIUA_A0 MIUA_CASZ MIUA_RASZ

8 6 4 2 2 4 6 8

RP4

22RX4

2 4 6 8

MIUA_DQ15 MIUA_DQ8 MIUA_DQ10 MIUA_DQ13 RP7 75RX4 MA_A2 MA_A0 MA_CASZ MA_RASZ

RP3

22RX4

MA_DQ15 MA_DQ8 MA_DQ10 MA_DQ13

MIUA_A12 MIUA_A7 MIUA_A9 MIUA_A3

2 4 6 8

MIUA_DQ6 MIUA_DQ1 MIUA_DQ3 MIUA_DQ4 RP6 75RX4 MA_A12 MA_A7 MA_A9 MA_A3

RP2

22RX4

2 4 6 8

MIUA_DQ11 MIUA_DQ12 MIUA_DQ9 MIUA_DQ14 MIUA_A5 MIUA_A10 MIUA_A1 MIUA_BA2 MA_A5 MA_A10 MA_A1 MA_BA2

MA_DQ11 MA_DQ12 MA_DQ9 MA_DQ14

MA_A4 MA_A6 MA_A8 MA_A11

MA_DQ6 MA_DQ1 MA_DQ3 MA_DQ4

7 5 3 1

Close to DRAM Close to MSD309


1.8VA
C

8 6 4 2

2 MIUA_BA2

R107 10k A_MVERF

R116 10k

C428 47n

RP59 1 3 5 7 MB_MCLK MB_MCLKZ 1.8VA

22RX4

RP40 22RX4

1 3 5 7

RP60 A1 E1 J9 M9 R1 J1 VddL 3 A Vdd B DQ14 C VddQ D DQ12 E Vdd F DQ6 VddQ DQ4 MB_BA1 MB_BA0 L3 L2 BA1 BA0 VddL VssQ Vref CKE RFU BA0 A10 Vss A3 A7 Vdd NC NC NC R7 L1 R3 RFU RFU RFU MB_BA2 A12 DQ1 VddQ H DQ3 J Vss K WE# L BA1 M A1 N A5 P A9 R RFU Vss Vss Vss Vss Vss RFU NC VssQ VssQ VssQ VssQ VssQ VssQ VssQ VssQ VssQ VssQ VssDL A11 A8 Vss A9 A12 A7 A3 A6 A4 A2 A0 Vdd CAS# CS# RAS# CK# ODT VssDL CK Vdd DQ2 VssQ DQ5 VssQ LDM G VddQ DQ0 VddQ LDQS VssQ DQ7 NC Vss VssQ LDQS# VddQ VssQ DQ11 DQ10 VssQ DQ13 DQ9 VddQ VddQ DQ8 VddQ VssQ UDM UDQS VssQ DQ15 NC Vss VssQ UDQS# VddQ VddQ VddQ VddQ VddQ VddQ VddQ VddQ VddQ VddQ VddQ 7 8 9 A9 C1 C3 C7 C9 E9 G1 G3 G7 G9 U15 W9751G6IB-25 B3 F3 UDM LDM 1 2 Vdd Vdd Vdd Vdd Vdd MB_DQM1 MB_DQM0 MIUB_ODT R380 75RX4 7 5 3 1 MIUB_WEZ RP17 MIUB_MCKE MIUB_BA1 MIUB_BA0 8 6 4 2 MB_DQ11 MB_DQ12 MB_DQ9 MB_DQ14 D3 D1 C2 B1 DQ11 DQ12 DQ9 DQ14 MB_WEZ MB_CKE MB_BA1 MB_BA0 75R MB_ODT

1 3 5 7

Close to DRAM
F7 E8 B7 A8 LDQS LDQS# UDQS UDQS#

2 4 6 8

2 MIUB_DQS1 2 MIUB_DQS1B

MIUB_DQS1 MIUB_DQS1B

MB_DQS1 MB_DQSB1

2 MIUB_ODT

2 4 6 8

22RX4

2 4 6 8

2 MIUB_DQS0 2 MIUB_DQS0B

MIUB_DQS0 MIUB_DQS0B

MB_DQS0 MB_DQSB0

2 MIUB_MCLK 2 MIUB_MCLKZ

MB_DQS0 MB_DQSB0 MB_DQS1 MB_DQSB1

RP13

22RX4

Vref CKE CLK CLK# DQ15 DQ8 DQ10 DQ13

J2 K2 J8 K8 B9 C8 D7 D9

B_MVERF MB_CKE MB_MCLK MB_MCLKZ MB_DQ15 MB_DQ8 MB_DQ10 MB_DQ13 R378 R379
B

1 3 5 7

2 4 6 8

2 MIUB_DQM1 2 MIUB_DQM0

MIUB_DQM1 MIUB_DQM0

MB_DQM1 MB_DQM0

2 2 2 2

MIUB_WEZ MIUB_MCKE MIUB_BA1 MIUB_BA0

Close to MSD306
MB_DQ6 MB_DQ1 MB_DQ3 MB_DQ4 F1 G2 H3 H1 DQ6 DQ1 DQ3 DQ4 RP8 1 3 5 7 2 4 6 8 75RX4

Close to MSD306

100R

100R

2 MIUB_A[0:13]

MIUB_A[0:13]

DQ7 DQ0 DQ2 DQ5

F9 G8 H7 H9

MB_DQ7 MB_DQ0 MB_DQ2 MB_DQ5 MB_ODT MB_RASZ ODT RAS# CS# CAS# A0 A2 A4 A6 A8 A11 WE# K9 K7 L8 L7 M8 M7 N8 N7 P8 P7 K3 MB_CASZ MB_A0 MB_A2 MB_A4 MB_A6 MB_A8 MB_A11 MB_WEZ

C433 47n

2 MIUB_DQ[0:15]

MIUB_DQ[0:15]

1 3 5 7

1 3 5 7

1 3 5 7

7 5 3 1 1 3 5 7

1 3 5 7

R8 A2 E2

A3 E3 J3 N1 P9

2 4 6 8

MIUB_A13 R396 75R

MB_A13

MB_A13

Close to DRAM Close to MSD309


1.8VA
A

R310 10k B_MVERF

R377 10k

C431 47n

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8 J7

MIUB_DQ7 MIUB_DQ0 MIUB_DQ2 MIUB_DQ5 75RX4

MB_DQ7 MB_DQ0 MB_DQ2 MB_DQ5

2 MIUB_CASZ 2 MIUB_RASZ

MIUB_A2 RP19 MIUB_A0 MIUB_CASZ MIUB_RASZ

8 6 4 2 2 4 6 8

RP20 22RX4

2 4 6 8

MIUB_DQ15 MIUB_DQ8 MIUB_DQ10 MIUB_DQ13 RP10 75RX4 MB_A2 MB_A0 MB_CASZ MB_RASZ

RP21 22RX4

2 4 6 8

MIUB_DQ6 MIUB_DQ1 MIUB_DQ3 MIUB_DQ4 RP9 75RX4 MIUB_A12 MIUB_A7 MIUB_A9 MIUB_A3 MB_A12 MB_A7 MB_A9 MB_A3 MB_A9 MB_A12 MB_A7 MB_A3 P3 R2 P2 N2

RP14 22RX4

2 4 6 8

MIUB_DQ11 MIUB_DQ12 MIUB_DQ9 MIUB_DQ14 MIUB_A5 MIUB_A10 MIUB_A1 MIUB_BA2 MB_A5 MB_A10 MB_A1 MB_BA2 MB_A1 MB_A10 MB_A5 M3 M2 N3 A1 A10 A5

RP11 22RX4

MB_DQ11 MB_DQ12 MB_DQ9 MB_DQ14

MIUB_A4 MIUB_A6 MIUB_A8 MIUB_A11

MB_A4 MB_A6 MB_A8 MB_A11

Close to DRAM

MB_DQ6 MB_DQ1 MB_DQ3 MB_DQ4

7 5 3 1

8 6 4 2

2 MIUB_BA2

MB_DQ15 MB_DQ8 MB_DQ10 MB_DQ13

Title MEMORY Size C Date:


3 2

Document Number 3/10 Friday, December 10, 2010


1

Rev 0.1 Sheet 3 of 10

DVB-T TUNER TUNER POWER RF AGC Switch

U10 VA1P1BF8402 U23 T_RF_AGC

U11

VA1P1BF8401

Q604tuner RFAGC

3
Q604 3906

RF_AGC

RF_AGC

LM7805

IN

GND

OUT

Body Body

IFD_OUT2 IFD_OUT1 IF_AGC

IFA_OUT VCC_5V SDA

SCL AS NC

NC RFAGC_M

Body Body

Body Body

IFD_OUT2 IFD_OUT1 IF_AGC

IFA_OUT VCC_5V SDA

SCL AS NC

NC RFAGC_M

Body Body

5V_TUNER 5V_B L40 FB 0.1u 5V_TUNER C446 R409 10K R422 100K

12VA

8 7 6

5 4 3

2 1

8 7 6

5 4 3

15 12

11 10 9

14 13

15 12

11 10 9

2 1

100uF/16V

T_RF_AGC + CA5 T_SCL T_SDA C474 tuner CA57 2 2 + 2 2 IF_TV T_IFAGC IF_OUT #IF_OUT 10 10 10

T_RF_AGC

0.1u

470uF/16V

5V_B

C509 47pF C510 47pF 5V_B

14 13

3.3VA

R415 10K

IF_TV

T_SCL T_SDA

Q403 3904

1 2

R400 10K

RF_AGC_SEL

T_IFAGC IF_OUT #IF_OUT

10 10 10

10 IF_AGC_DVB

T_IFAGC

SAW Drive
5V_TUNER

U30 IF_TV R456 22R R429 NC/390R C465 47n

IN

SAWOUT2

5
L42 2.2uH

C87

0.1u

VIFP

VIFP

ING
F4401

GND

OUT1 3

4
close together

C89

0.1u

VIFM

VIFM

2
A

Close to MSD309

Title TUNER Size Document Number Custom4/10 Date:


4 3 2

Rev 0.1 Friday, December 10, 2010


1

Sheet

of

10

HDMI Input
P1A

P1

HDMI CEC
DB2+ DB2DB1+ 3.3VU DB1DB0+ DB0CLKB+ CLKBcec HDMI-CEC R390 100R 2
D

21

DB2+

21

DB2DB1+

DB1DB0+ R324 NC/33K R389 100R cec cec_SD

DB0CLKB+

R133 R135 R137 R136 R139 R140 R141 R142 R143 R146

10R 10R 10R 10R 10R 10R 10R 10R 10R 10R

RXB2P RXB2N RXB1P RXB1N RXB0P RXB0N RXBCLKP RXBCLKN DDCBSDA DDCBSCL

22 23
DDCBSCL1 DDCBSDA1 HDMIB_5V HOTPLUGB1

CLKBcec

DDCBSCL1 DDCBSDA1

22 23

HDMIB_5V

2 2 2 2 2 2 2 2 2 2

RXB0N RXB0P RXB1N RXB1P RXB2N RXB2P RXBCLKN RXBCLKP DDCBSCL DDCBSDA

RXB0N RXB0P RXB1N RXB1P RXB2N RXB2P RXBCLKN RXBCLKP DDCBSCL DDCBSDA

20
HDMI_V

21 DATA2+ DATA2 SHIELD DATA2DATA1+ DATA1 SHIELD DAT1ADATA0+ DATA0 SHIELD DATA0CLK+ CLK SHIELD CLK22 CEC 23 NC SCL SDA DDC/CEC GND +5V POWER 20 HOT PLUG 20

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 21 DATA2+ DATA2 SHIELD DATA2DATA1+ DATA1 SHIELD DAT1ADATA0+ DATA0 SHIELD DATA0CLK+ CLK SHIELD CLK22 CEC 23 NC SCL SDA DDC/CEC GND +5V POWER 20 HOT PLUG

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

HDMI_H

R157

ESD-0402

ESD-0402

R152

10K

R153

10K

HOTPLUGB1

1K

<20pF

ESD-0402

DD50

HDMIB_HP

DD55

DB0-

DB1-

DB0+

DB1+

DB2-

CLKB-

CLKB+

NC/ESD-0402

NC/ESD-0402

NC/ESD-0402

NC/ESD-0402

NC/ESD-0402

NC/ESD-0402

NC/ESD-0402

DB2+ <=0.6pF NC/ESD-0402 <=0.6pF DD83

HDMIB_5V <=0.6pF DD73 DD72 DD78 DD79 DD80 DD81 DD82 <=0.6pF <=0.6pF <=0.6pF <=0.6pF <=0.6pF

DD54

5VA

R353

10K

R354 NC/10K

R353 must pull up to HDMI_5V

Q412 3904

HOTPLUGB

1K

R161

HOTPLUGB

P2 P2A

21 21
DA2DA1+ DA1DA0+ DA0CLKA+ CLKAcec DDCASCL1 DDCASDA1 HDMIA_5V HOTPLUGA1 DA2+

DA2+

DA2DA1+

DA1DA0+

DA0CLKA+

R134 R172 R151 R163 R144 R149 R148 R173 R150 R147

10R 10R 10R 10R 10R 10R 10R 10R 10R 10R

RXA2P RXA2N RXA1P RXA1N RXA0P RXA0N RXACLKP RXACLKN DDCASDA DDCASCL

22 23 22 23

CLKAcec

DDCASCL1 DDCASDA1

HDMIA_5V

2 2 2 2 2 2 2 2 2 2

RXA0N RXA0P RXA1N RXA1P RXA2N RXA2P RXACLKN RXACLKP DDCASCL DDCASDA

20 20
HDMI_V

21 DATA2+ DATA2 SHIELD DATA2DATA1+ DATA1 SHIELD DAT1ADATA0+ DATA0 SHIELD DATA0CLK+ CLK SHIELD CLK22 CEC 23 NC SCL SDA DDC/CEC GND +5V POWER 20 HOT PLUG 21 DATA2+ DATA2 SHIELD DATA2DATA1+ DATA1 SHIELD DAT1ADATA0+ DATA0 SHIELD DATA0CLK+ CLK SHIELD CLK22 CEC 23 NC SCL SDA DDC/CEC GND +5V POWER 20 HOT PLUG 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

HDMI_H

R162

ESD-0402

ESD-0402

R158

10K

R183

10K

HOTPLUGA1

1K

<20pF

ESD-0402

DD51

DD66

DA0-

DA1-

DA0+

DA1+

DA2-

HDMIA_HP

CLKA-

CLKA+

NC/ESD-0402

NC/ESD-0402

NC/ESD-0402

NC/ESD-0402

NC/ESD-0402

NC/ESD-0402

NC/ESD-0402

DA2+ NC/ESD-0402

5VA <=0.6pF DD85 DD84 DD86 DD87 DD88 DD89 DD90 DD91 <=0.6pF <=0.6pF <=0.6pF <=0.6pF <=0.6pF <=0.6pF <=0.6pF

DD67

HDMIA_5V

R355

10K

R357 NC/10K

R353 must pull up to HDMI_5V

Q416 3904

HOTPLUGA

1K

R186

HOTPLUGA

P3

21

DC2+

DC2DC1+

DC1DC0+

DC0CLKC+

R174 R182 R171 R181 R160 R169 R165 R185 R170 R166 RXC2P RXC2N RXC1P RXC1N RXC0P RXC0N RXCCLKP RXCCLKN DDCCSCL DDCCSDA 2 2 2 2 2 2 2 2 2 2

10R 10R 10R 10R 10R 10R 10R 10R 10R 10R

RXC2P RXC2N RXC1P RXC1N RXC0P RXC0N RXCCLKP RXCCLKN DDCCSDA DDCCSCL

22 23

CLKCcec_SD

DDCCSCL1 DDCCSDA1

HDMIC_5V DC0DC1DC0+ DC1+ DC2CLKCCLKC+ DC2+ NC/ESD-0402 NC/ESD-0402 NC/ESD-0402

20
NC/ESD-0402 NC/ESD-0402 NC/ESD-0402 NC/ESD-0402

21 DATA2+ DATA2 SHIELD DATA2DATA1+ DATA1 SHIELD DAT1ADATA0+ DATA0 SHIELD DATA0CLK+ CLK SHIELD CLK22 CEC 23 NC SCL SDA DDC/CEC GND +5V POWER 20 HOT PLUG

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

R193

10K

HDMI_H

R190

ESD-0402

ESD-0402

1K <=0.6pF DD93 DD92 DD94 <=0.6pF <=0.6pF DD95

NC/ESD-0402

R197

10K

<=0.6pF

<=0.6pF DD96 DD97

<=0.6pF

<=0.6pF DD98 DD99

<=0.6pF

HOTPLUGC1 ESD-0402

<20pF

DD52

DD69

HDMIC_5V

5VA

DD68

3HDMIC_HP

10K

R358

R359 NC/10K

Title HDMI Size A2 Date:


4 3 2

Q417 3904

HOTPLUGC

1K

R191

HOTPLUGC

R358 must pull up to HDMI_5V

Document Number 6/10 Friday, December 10, 2010


1

Rev 0.1 Sheet 6 of 10

VGA INPUT
HD1-Y

Analog Video & Audio in


7
R97 RGB0-SOG DD14 VGA-HS HD1-Pb 2 ESD-0402 0R C62 1n

P4

VGA_5V

16

76 54 1
HD1-Pr HD1-Pr DD74 DD65 DD75

6 4
HD1-Pb

HD1-Y

11
R90 RGB0_GIN+ DD16 VGA-VS 2 ESD-0402 33R C56 47n

VGA-R

5 3
ESD-0402

VGA-G

12
R91 RGB0_BIN+ ESD-0402 DD18 75R 75R ESD-0402 DD21 DD76 NC/ESD-0402 NC/ESD-0402 NC/ESD-0402 NC/ESD-0402 RCA2-L HD-Lin 2 R329 12K NC/ESD-0402 C67 200p R330 10K C126 2.2u HD-Lin ESD-0402 VGA_TX RCA2-L PHONEJACK STEREO SW 180d 1 RCA2-R 2 R332 12K C69 200p 75R R92 RGB0_RIN+ 2 33R C58 47n DDC-SDAIN HD-Rin 2 P16A RCA2-R R331 10K C125 2.2u HD-Rin 2 33R C57 47n DD17 DDC-SCLIN

VGA-G

13
R241 R254 R242

VGA-B

VGA-B

1 3 2 2

14

VGA_RX R156

0R

ISP-RXD

15

R168

0R

1 6 2 7 3 8 4 9 5 10

VGA-R

17

R110

R129

R128

VGA

DD23

DD24

DD25

3
VGA_RX P6

VGA_TX RGB0_BINRGB0_GINRGB0_RIN2 2 2 R114 R111 68R C92 47n 68R C91 47n

75R

75R

75R

R119 R167

0R 0R

ISP-TXD

R117

68R C90

47n

DD22

VGA-HS

ESD-0402

ESD-0402

ESD-0402

VGA-VS

DDC-SDAIN

R113

100R DDC-SDA

YPbPr IN
DD77 C43 R79 COMP_SOG+ COMP_Y+ COMP_B+ COMP_R+ COMP_YCOMP_BCOMP_R2 2 2 2 2 2 2 VGA-Rin1 VGA-Rin RCA-R AV2-Rin R81 R83 R104 R102 VGA-Lin1 VGA-Lin 2 R101 10K C63 2.2u RCA-L R214 AV2-Lin 2 R326 12K NC/ESD-0402 C50 200p 10K C124 2.2u AV2-Lin R100 68R C88 47n Videoin RCA-L DD101 RCA-R 68R C81 47n 68R C76 47n 33R C48 47n 33R C45 47n 2 R327 10K C121 2.2u AV2-Rin 2 DD19 ESD-0402 NC/ESD-0402 DD100 R328 12K C55 200p R112 10K C66 2.2u HD1-Y HD1-Pb HD1-Pr R84 33R C49 47n 0R 1n

DDC-SCLIN

R118

100R DDC-SCL

5VA

D48 BAT54C

VGA-5V R115 12K C68 200p

R121

R122

VGA-5V

P4A

U6

R120 NC

16

10K

C73 0.1u

10K

11

VGA-R

1 2 3 4 3 7 76 54 1 2
Videoin P15A C71 200p R95 75R AV4-Vin+ 2 R94 33R C101 47n

NC NC NC GND 6 4

NC/24C02 VCC 8 VCLK 7 SCL 6 SDA 5 PHONEJACK STEREO SW 180d 1 2

DDC-SCL DDC-SDA

12

VGA-G

13
P5 DD20 R106 12K C65 200p

VGA-B

14 5 3

If U6=24C01/24C02,solder R125 and left R120 float ESD-0402

R125 10k

VGA_RX VGA_5V

15

1 6 2 7 3 8 4 9 5 10 1 3 2

17

VGA

P5A PHONEJACK

VGA_TX

VGA-HS

R103

100R

VGA_HSYNC

VGA-HS

VGA-VS

R105

100R

R109

R108

VGA_VSYNC

VGA-VS

3 2 6 5 4 1 7

DDC-SDAIN NC/ESD-0402

AV-IN & Audio-out


DD102

10K

10K

DDC-SCLIN

FOR UN-USED PORTS

VIDEO_OUT

5VA

2010-4-22

C41

0.1u

R66 10K

R56 220R

Q632 3906

CVBS_OUT

C94

2.2u

C271

Q414 3904 R59

100R

R62

75R

AVOUT-V

H17 TPAD

R54 4.7k

R63 75R

2010-4-22

10uF

2010-4-22

R138

0R

C97

1n

RGB1_SOG

Pb

R131

33R C46

47n

RGB1_G+

Pr

R130

33R C96

47n

RGB1_B+

R86

R87

R88

R132

33R C51

47n

RGB1_R+

75R

75R

75R

R99

68R C59

47n

RGB1_B-

2
B

R98

68R C60

47n

RGB1_G-

R96

68R C61

47n

RGB1_R-

R48

33R

C42

47n

SV2-Yin

R51

33R

C77

47n

SV2-Cin

SPDIF_Optical Out

L44

FB

3.3VA

CA53

100uF/16V

C120 0.1u

P12

RCA1

2 3

SPDIFO

DD15

C27 NC

R78 330R R346 NC/100R

ESD-0402

CLOSED TO MSD309

Title AV IN & OUT Size A1 Date:


4 3 2 1

Document Number 7/10 Friday, March 04, 2011 Sheet 7 of 10

Rev 0.1

+5V_USB

+ CA110
100uF/16V

3.3VA

R189 4.7K close to USB connector

ON_USB_MOS 1

2 +5V_USB USB_A 5 5 1 2 3 4 6 6

ON_USB

ON_USB R61

4.7K

Q434 3904

USB1_DMO USB1_DPO

P8 1 2 3 4

+5V_USB USB_DPO USB_DMO USB_DMO USB_DPO DD58 USB_A 5 5 1 2 3 4 6 6

2 2

USB_DP USB_DM

R297 0R

R282 0R

DD44

P9 1 2 3 4

<=2pF NC/ESD-0402

<=2pF NC/ESD-0402 +5V_USB USB_A 5 5 USB_DPO USB_DMO 1 2 3 4 6 6

2 2

USB1_DP USB1_DM

R298 0R

USB1_DPO USB1_DMO

R287 0R DD64

P9A 1 2 3 4

DD46

2010-3-3 <=2pF NC/ESD-0402 Title USB Size A Date:


3 A

<=2pF NC/ESD-0402

Document Number 8/10 Friday, December 10, 2010


2

Rev 0.1 Sheet 8


1

of

10

Power Down MUTE HeadPhone Out


12VA 12-24 R283 10K R296 NC/24K R306 12-24

AMPLIFIER AUDIO pre-ap


3 1
10k/NC Q447 3904/NC R294 24K SHUTDOWN

5VA

mute

R308

100K

1 2
NC/1N4148 C270 1uF/35V mute 12-24 PWD_MT R374 47K 0 R295 R288 R280 10K 4.7K D39 1N4148 R286 NC/10K MUTE_TDA3121 12-24 D40 1N4148 D37

Q35 A03401

R437 NC / 100

Place close to OP
D

4
AMP-PLout

R438 470

20110510 For Earphone "POP"

2 3 1
+ CA55 PHONEJACK STEREO SW_3 220uF/35V 3.3VA R333 10k R334 HEADPHONE_DET 2 CA81 47uF/16V MUTE_AMP R293 10K 2 2.2K 3906 Q622

1 3

P10

100uF/16V CA84

R418

33K

R416

33K

OP_VCC1

1uF C248

6VBuf1

AMP-PRout

20110510 100uF to 470uF For Earphone "POP"

1 2
+

U45A

R335 10K

1 2
NPN_3904

Q16

AUOUTL2

AUOUTL2 C340 2.2uF

R439

10K

2 3
D126 ESD AMP_LIN mute R300

100uF/16V

R442 1K

3 +
330R AMP-PLout C392 2N2

CA464

R397

MUTE_AMP :

LOW = MUTE
3
AMP-PLout NC/100K

C344

C342

TL062 mute R299 100K

R404

1 2

+ Q424 3904

MUTE_TDA3121 :

HIGH = MUTE

C341 0.1uF

CA83 470uF/16V

NC/200P

1nF

Q433 3904

Q435 NC/ 3904

R460

33K

47K

20110510 For Earphone Mute

C497 100pF

OP_VCC1 mute R303 100K

1 2

U45B 330R AMP-PRout D127 ESD

Q445 3904

mute

R307

NC/100K

AMP_RIN

AMP-PRout Q446 NC/3904 20110510 For Earphone Mute


C

AUOUTR2

AUOUTR2 C343 2.2uF

R441

10K

6 -

100uF/16V

C345

C179

R407

NC/200P

1nF

R461

33K

47K

TL062

R443 1K

5 +

CA465

R398

C496 100pF

TDA3121
12-24 L5 + + R365 1.5K CA98 220uF CA96 220uF CON4

2010-5-8 Close to MSD309PX

2
C266 C265 C253 0.1uF 10uF/35V

CA86 220uF/35V + 220uF/35V + 2 10n 12K AUOUTL0 C252 4.7u R278 100R

CA85 220uF/35V

CA80 220uF/35V + +

CA82

1 10uH/Inductor C268 0.68uF

2 1
CA99 220uF CON2 U54 1uF L6 +

C236

C269 1 10uH/Inductor 0.68uF

R317

2 4 5
R370 1.5K C258 0.22uF GAIN0 GAIN1 C262 0.22uF CON5 CON5 CA97 220uF

AMP_LIN R395 330R C243 C244 R360 R369 10K 1nF 10K 12-24 1nF C251 1u 330R AMP_RIN R401

C250 1u

10n 12K

AUOUTR0

C254 4.7u R316 100R

C237

R320

THERMAL

1 SHUTDOWN 2 3 MUTE_TDA3121 4 5 6 7 8 9 10 11 12
12-24 C257 C263C267 1uF 1uF 1uF

PVCCL SD PVCCL MUTE LIN RIN BYPASS AGND AGND PVCCR VCLAMP PVCCR
TPA312X C264 1uF

PGNDL PGNDL LOUT BSL AVCC AVCC GAIN0 GAIN1 BSR ROUT PGNDR PGNDR 25

24 23 22 21 20 19 18 17 16 15 14 13

R361 10K GAIN0 R366 NC/10K

R367 10K GAIN1 R368 NC/10K

Near MST.IC Ground in the middle of the L/R

TPA3121 MUTE PIN LOW:OPERATING HIGH:MUTE

HOLE
H7 H5 H3 H1

5 4 3 2
NC

9 8 7 6

5 4 3 2

9 8 7 10 6
NC

5 4 3 2
NC

9 8 7 6

5 4 3 2
NC

9 8 7 6 4 3 2 1

L1

5 6

CON2_1

EMI Cover
H6 H4 H8

5 4 3 2

9 8 7 6
NC

5 4 3 2

9 8 7 6
NC

5 4 3 2

9 8
1 1 1 1

7 6
NC

H14 TPAD

H13 TPAD

H12 TPAD

H11 TPAD

1 1 H15 TPAD 1 H16 TPAD

H10 TPAD

Title AUDIO Size A2 Date:


4 3 2

Document Number 9/10 Tuesday, May 10, 2011


1

Rev 0.1 Sheet 9 of 10

60mA

2.5V_Demod

3.3V_Demod 3.3V_Demod C868 0.1u R509 2 R510 100R SDA SCL 100R 2 2 SCL SDA Demod_RST 4.7k

L406 FB0603

B3_3.3V

L407 FB0603

DR2VDD

C859 1u

C860

C861 C862

C863

C867

0.1u

0.1u

0.1u

0.1u

1u

closed to Demod

10K 10K

10K

B4_1.2V B3_3.3V

B4_1.2V R511 R512 R514 R515

C876

C877 C878 C879

C880

C869

48 47

46 45 44 43 42 41 40

39

C874 C875 1u 0.1u B3_3.3V U55

0.1u

0.1u

0.1u

0.1u

0.1u

1u

49 DR1VDD VSS SDA SCL VSS DR2VDD SYRSTN TSMD1 DTMB STSFLG1 VSS VDDC VDDS DR1VDD VSS VSS STSFLG0
C864 1u C865 1u C870 0.1u C872 0.1u C873 0.1u

closed to Demod

51
7 5 3 1 8 6 4 2 2 2 2 2 RP61 33RX4 B4_1.2V TS_D4 TS_D3 TS_D2 TS_D1

DTCLK

TS_D5

R516 33R

VDDS
AD_DVDD

38 37 36 35 34 33

C871 0.1u

R513 100R DR2VDD

1.2V_Demod

L410 FB220/300mA

B4_1.2V

120mA

2.5V_Demod

L408 FB0603

AD_AVDD

B4_1.2V

50

C866 R517 0R C0402 L409 NC L0603 NC R518 0R

#IF_OUT

#IF_OUT

PLLVDD

AD_DVDD AD_DVSS ADI_AIP ADI_AIN ADQ_AIP ADQ_AIN AD_VREF AD_VREFN AD_VREFP AD_AVSS AD_AVDD FIL PLLVDD X1 X0 20 19 18 17 PLLVSS VDDC 21 23 22
AD_AVDD C881 1500pF PLLVDD

32 31 30 29 28 27 26 25 24

IF_OUT

IF_OUT

2.5V_Demod

L411 FB0603 7 5 3 1 8 6 4 2 2 2 2 2 TSVALID TSSTART TS_D0 TS_CLK

AD_DVDD

2.5V_Demod

L412 FB0603

52 53 54 55 56 57 58 SLOCK RERR RLOCK RSEORF VDDC VSS PBVAL SBYTE SRDT SRCK VSS VDDC VDDS TSMDO XSEL1 XSEL0 VSS SLADRS1 SLADRS0 AGC I S_INFO AGCCNTI AGCCNTR CKI TNSCL VDD33 TNSDA VSS 59 60 61 62 63 64

C886 1u C887 0.1u RP62 33RX4 B4_1.2V B3_3.3V C883 NC/10p

C888

0.1u

C885 1u

R519 1M R520

C882 18p Y2 25.4MHz

3 2
C884 18p 1K2

closed to Demod

1 2 3 4 5

6 7 8 9 10

11 12 13 14 15
R529 10K B3_3.3V

3.3V_Demod

2.5VA 10K 10K 10K 10K 10K 15K

L10 FB

2.5V_Demod

+ R523 R524 R525 R526 R527 R528

2 2 IF_AGC C893 100nF C0402 TS_D6 R522 NC/33R

TS_D7

R521

NC/33R

N1 AMS1117-3.3V

3.3V_Demod
B

5VA

C858 0.1u

C894 100uF/16V

C855 1u

C856 0.1u

C857 100uF/16V

5VA 3.3V_Demod

R532 NC/1K

R533 Close to tuner NC/1K R535 1K T_IFAGC C895 100nF T_IFAGC 4

IF_AGC

N2 AMS1117-1.2V

AGC CIRCUIT

1.2V_Demod

3.3V_Demod

C889 1u

C890 0.1u

C891 100uF/16V

C892 0.1u

B4_1.2V

C897 100uF/16V

C896 100nF C0402

R530 1K

R531 1K

16

TC90517FG

IN

ADJ
4 3

OUT

IN

ADJ

OUT

Title

ISDB-TC90517FG
Size A2 Date:
2

Document Number

Demodulator
Tuesday, December 14, 2010
1

Rev 1.0 Sheet 10 of 15

C35 102 FEEDBAK1 F2 FUSE T1A 250VAC L1 J1 PQ3220 BD1 KBJ606J


D

R25 22R/2W

+24VA

L2 5uH

+24V C3 1000U 35V +24V

R51 100K 2W

1
D3 SF10A600H C17 103/630V J26 2

T2 EE2834

10

D14

+ C2 1000U 35V

+ R15 3.3K/2W

MBR20150C

3
D1 1N5397 R19 33R1/6W D29 LL4148

+ 1

C10 1uF 450V MPP

3
J4 DRIVER1

D15 Q8 SMK0765F

J61

7 6
MBR20150C C34 R24 102 22R/2W

L3 5uH

+12V

4 -

R17 0.22R/2W R17A 0.22R/2W

1 3

Q5 2761

1 3
J6 C1 150U 450V R55 1K/1/6W R57 10K/1/6W + R56 47R/1/6W

R34 10K/1/6W

+12VA R23 R5 471/1/6W R69 0.27R/2W U10 PC817C FB 7.5K 1/6W

INPUTR12A 2M2/1/4W R12 2M2/1/4W R21A 2M2/1/4W R21 2M2/1/4W

J7

4 3

1 2
R7 1K/1/6W C19 104

F3 FUSE T1A 250VAC

VCC-PWM U3 OB2273AP C42 4.7U 50V + C16 471

R47 101/2W

1 2 3

GATE VDD NC CS

GND NC RT FB

8 7 6 5
C11 471 R68 47R/1/6W R54 NC J60

U5 TL431

A 1 R16 101R/2W LF2 ET24E 3

2
D32 2.2M/1/2W

R52 100K 2W

4
C13 NC

DS1

CX2 224/275VAC CY1 CY2 R11 2.2M/1/2W J17 2.2M/1/2W J23 A R41 10K/1/4W C14 681/1KV D30 LL4148 R32 10K/1/4W CX1 224/275VAC D28 LL4148 C30 681 TNR1 S14K561 TH1 5.0 C73 104 C43 4.7U 50V J58 F1 FUSE T3.15A L 250V~ U9 PC817C R6 1K/1/6W + C31 224 C29 104 C28 474 R70 10K/1/6W R63 220K/1/6W R59 2.2R/1/6W J56 U3 TEA1733 R61 1K/1/6W C26 471 R58 33R/1/6W C22 102/630V

J16

1
D2 1N5397

C20 471/1KV

DS2

471/400VAC 471/400VAC

R22 2.2M/1/2W

2 1 3
Q9 JCS4N60

10
D16 31DQ06

L4 5uH

C23 2200uF/10V

+5VB

+5VB

+5V J80 + C32 104 J73 + +24V +12V +5V

3
LF1 ET24E

5 6 7 8

Visense Isense Protect CTRL Optimer Driver GND VCC

4 3 2

R62 33K/1/6W

3
R60 1R8/2W

4 1 6 5

C27 224

1
ZD2 27V

D23 BA158

R30 4R7/1/4W R33 3.3UH

C24 2200U 10V

J27 D24 BA158 T5 R37 1k/1/6W


B

R64 2M2/1/6W

C25 104

C49 4.7U 50V

R1 47R/1/6W

J75

D34 LL4148

ZD7 30V

ZD6 15V

ZD5 D33 LL4148

R3 10K/1/6W

Q10 KSP2222A

J71

1
R38 20k/1/6W C33 104

J55

J69

4 3

1 2

C8 223

R4 10K/1/6W J72

L VCC-PFC

J62 J12

J45

3 2 1

Q3 KSP2222A 3 2

J59

Q2 SN2907 2 3 100K/1/6W R65 + C51 10U 50V

U4 TL431

R2 10K/1/6W

CN1 VCC-PWM

J13 D31 J64 LL4148

R67 2K/1/6W

R66 3.3K/1/6W

5VSB GND STB BRI R28 1K//1/6W STB +5V GND +12V GND +12V GND GND +24V +24V

STB +5V GND +12V GND +12V GND

U11

PC817C

OUTPUT: +24V/1.5A +12V/2.5A +5VSB/1A OUTPUT: +12V/4.5A

CY3 CY4

471/400VAC 222/400VAC

Q4 KSP2222A

STB
C21 104 R27 10k/1/6W

CN5

10 9 8 7 6 5 4 3 2 1

3 2 1

PS_ON

CN2 GND

PIN3

14 13 12 11 10 9 8 7 6 5 4 3 2 1

R35 1k/1/6W

ON OFF

GND STB BRI

+24V +24V

STB GND1 ADJ ENA

+24V +24V GND GND +12V +12V GND GND

SPECIFICATION INPUT: 100-240V AC

ZD3 18V

4 2 3

1 2

+24V +24V GND GND +12V +12V GND GND +5V GND STB GND1 ADJ ENA

PIN13

Title

Size Document Number Custom<Doc> Date:


5 4 3 2

+
D

9 8

C5 1000U 25V

C6 1000U 25V

C7 1000U 25V

+12V

+12V

J18

R20 2K 1% 1/6W

CN6 PIN14

NEW STANDARD CONECTION


+5V GND

5800-P32ALB-W010
Rev <RevCode> Sheet 1 of 3
1

Tuesday, September 20, 2011

PFC-400VDC

J23

R9 2.2M/1/4W

R8 2.2M/1/4W S1 C48 104 R13 471/1/6W R53 33K/1/6W U1 OB6572AP C40 104 +

PFC_VCC PFC_VCC

C41 10U 35V

1
C44 472 R101 6.8K/1/6W INPUT-

GND ICOMP ISENSE FRE

Gate VCC VSENSE VCOMP

8 7 6
D27 1N4148 R36 33R/1/6W DRIVER1

2 3 4

R100 33R/1/6W

R99 20K/1/6W

R102 100K/1/6W

C46 474

Title

5800-P32ALB-W010
Size Document Number Custom<Doc> Date:
5 4 3

Rev <RevCode> Sheet 2


1

Tuesday, September 20, 2011


2

of

+12V J10 J3

+12VB J74 DA9 HER206 400V+ CN2 2PIN

CA23 224

RA24 1.5K/1/4W

J24 QA6 2N2222 RA19 22R/1/6W

1
D

CA18 474

33

RA23 10R/1/6W

T6 EE16(5+5)

1 2
DA11 HER206 CA3 22P/3KV CA21 105/450V T4A EFD36 CA6 472/1KV DA2 DA1 1N4148 1N4148 CA5 472/1KV CA4 22P/3KV RA2 10K/1/6W
D

1
CA19 474

1
RA21 10R/1/6W

1 3

QA5 T01N60 G1 RA25 1.5K/1/4W RA22 10R/1/6W

QA7 2N2907

RA27 4.7R/1/6W

DA6 1N4148 RA26 10K/1/6W

Q6 5N50

3
+12VB

CA1 5P/3KV DA3 HER108

RA1 10K/1/6W

VD CA17 474

9
J25

DA8 HER206

1 5

1 33

QA8 2N2222

5
QA9 2N2907

RA28 22R/1/6W

1 3

Q7 5N50

DA10 HER206

CA20 105/450V

RA3 10K/1/4W DA4 HER108

T3 UF9.8

CA2 5P/3KV

CN3 2PIN

1 2

1 1 3 2
RA20 10R/1/6W QA4 T01N60

RA29 4.7R/1/6W

DA7 1N4148 RA30 10K/1/6W J28 J30

J8 J9

RA4 1M/1/4W

RA11 47R/2W CA7 681/1KV

G2

ADJ

J31

J21

RA33 10K/1/6W J2 U6 OB3309 +24V J14 J15 RA16 1K/1/6W +12V


B

VD
B

RA31 220k/1/6W CA11 471 RA14 2K 1/6W RA32 27K/1/6W

1 2 3 4 5

ENA RI RT DRC BF/DMOD POL VDD GATE1

DIM STIME CMP CS PRT VS GND GATE2

16 15 14 13 12 11 10 9

CA14 474 CA13 103 CA10 391 RA13 10k/1/6W RA12 12K/1/6W J77

RA9 4.7K/1/6W

RA8 4K7/1/6W

R92 4K7/1/6W RA17 121R/2W

RA34 10K/1/6W

J79

Q2 QA3 2N2907 2N2222

1
RA35 2K/1/6W

1
RA5 33K/1/6W CA8 103 G2 Title RA6 10k/1/6W RA10 10K/1/6W CA9 221 DA5 1N4148 CA16 4.7U 25V

1 2

VD

7 8

ZA1 5.6V

CA12 474

QA1 2N2222 1

RA15 10K/1/6W

ON/OFF

CA17 474
A

J11

G1

CA15 104

CA24 4.7U 25V

5800-P32ALB-W010
Rev <RevCode> Sheet
1

+ Date:
5 4 3 2

Size Document Number Custom<Doc> Tuesday, September 20, 2011 3

of

You might also like