LCD Code

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity LCD is
port(
LCD_RS:out std_logic;
LCD_RW:out std_logic;
LCD_E:out std_logic;
clk:in std_logic;
SF_D:out std_logic_vector(3 downto 0)
);
end LCD;
architecture Behavioral of LCD is
signal substate,clock,clk1: integer:=0;
signal state: integer:=0;
begin
process(clk)
begin
clk1<=clk1+1;
if(clk1=0) then
clock<=clock+1;
--WAIT FOR 750000 CLOCK
if(state=0 and clock=750000) then
state<=1;
clock<=0;
--WRITE SF_D=0X3 FOR INIATION
elsif(state=1) then
if(substate=0 and clock=0) then
LCD_RS<='1';
LCD_RW<='0';
SF_D<="0000";
Clock<=0;
substate<=1;
elsif(substate=1 and clock=2) then
LCD_E<='1';
Clock<=0;
substate<=2;
LCD_E<='0';
substate<=3;
Clock<=0;
SF_D<="0011";
Clock<=0;
substate<=4;
LCD_E<='1';
Clock<=0;
substate<=5;
LCD_E<='0';
substate<=0;
state<=2;
Clock<=0;
end if;
--WAIT FOR 2050000 CLOCK
elsif(state=2 and clock=205000) then
state<=3;
clock<=0;
--WRITE SF_D=0X3 FOR INIATION
elsif(state=3) then
LCD_RS<='1';
LCD_RW<='0';
SF_D<="0000";
Clock<=0;
substate<=1;
LCD_E<='1';
Clock<=0;
substate<=2;
LCD_E<='0';
substate<=3;
Clock<=0;
SF_D<="0011";
Clock<=0;
substate<=4;
LCD_E<='1';
Clock<=0;
substate<=5;
LCD_E<='0';
substate<=0;
state<=4;
Clock<=0;
end if;
--WAIT 5000 CLOCK
state<=5;
clock<=0;
--WRITE 0X3 FOR INITIATION
elsif(state=5) then
LCD_RS<='1';
LCD_RW<='0';
SF_D<="0000";
Clock<=0;
substate<=1;
LCD_E<='1';
Clock<=0;
substate<=2;
LCD_E<='0';
substate<=3;
Clock<=0;
SF_D<="0011";
Clock<=0;
substate<=4;
LCD_E<='1';
Clock<=0;
substate<=5;
LCD_E<='0';
substate<=0;
state<=6;
Clock<=0;
end if;
--WAIT 2000 CLOCK
state<=7;
clock<=0;
--WRITE SF_D=0X2 FOR INITIATION
elsif(state=7) then
LCD_RS<='1';
LCD_RW<='0';
SF_D<="0000";
Clock<=0;
substate<=1;
LCD_E<='1';
Clock<=0;
substate<=2;
LCD_E<='0';
substate<=3;
Clock<=0;
SF_D<="0010";
Clock<=0;
substate<=4;
LCD_E<='1';
Clock<=0;
substate<=5;
LCD_E<='0';
substate<=0;
state<=8;
Clock<=0;
end if;
--WAIT 2000 CLOCK
state<=9;
clock<=0;
--WRITE FUNCTION SET SD_F = 0X28
elsif(state=9) then
LCD_RS<='1';
LCD_RW<='0';
SF_D<="0010";
Clock<=0;
substate<=1;
LCD_E<='1';
Clock<=0;
substate<=2;
LCD_E<='0';
substate<=3;
Clock<=0;
SF_D<="1000";
Clock<=0;
substate<=4;
LCD_E<='1';
Clock<=0;
substate<=5;
LCD_E<='0';
substate<=0;
state<=10;
Clock<=0;
end if;
--WAIT 2000 CLOCK
state<=11;
clock<=0;
--WRITE ENTRY SET SF_D = 0X06
elsif(state=11) then
LCD_RS<='0';
LCD_RW<='0';
SF_D<="0000";
Clock<=0;
substate<=1;
LCD_E<='1';
Clock<=0;
substate<=2;
LCD_E<='0';
substate<=3;
Clock<=0;
SF_D<="0110";
Clock<=0;
substate<=4;
LCD_E<='1';
Clock<=0;
substate<=5;
LCD_E<='0';
substate<=0;
state<=12;
Clock<=0;
end if;
--WAIT 2000 CLOCK
state<=13;
clock<=0;
--WRITE DISPLAY ON /OFF SD_F=0X0C
elsif(substate=1
elsif(substate=2
elsif(substate=3
elsif(substate=4
elsif(substate=5
LCD_RS<='0';
LCD_RW<='0';
SF_D<="0000";
Clock<=0;
substate<=1;
and clock=2) then
LCD_E<='1';
Clock<=0;
substate<=2;
and clock=12) then
LCD_E<='0';
substate<=3;
Clock<=0;
and clock=48) then
SF_D<="1011";
Clock<=0;
substate<=4;
and clock=2) then
LCD_E<='1';
Clock<=0;
substate<=5;
and clock=12) then
LCD_E<='0';
substate<=0;
state<=14;
Clock<=0;
end if;
--WAIT 2000 CLOCK
state<=15;
clock<=0;
--WRITE CLEAR DISPLAY COMMAND SF_D<=0x HAVE TO FIX THIS
LCD_RS<='0';
LCD_RW<='0';
SF_D<="0000";-- I HAVE FIXED IT
Clock<=0;
substate<=1;
LCD_E<='1';
Clock<=0;
substate<=2;
LCD_E<='0';
substate<=3;
Clock<=0;
SF_D<="0001";-- I HAVE FIXED IT
Clock<=0;
substate<=4;
LCD_E<='1';
Clock<=0;
substate<=5;
LCD_E<='0';
substate<=0;
state<=16;
Clock<=0;
end if;
--WAIT FOR 82,000 CLOCK
state<=17;
clock<=0;
--WRITE SET DD RAM ADD SF_D<=0x HAVE TO FIX THIS
LCD_RS<='0';
LCD_RW<='0';
SF_D<="1000";--IT HAS BEEN FIXED
Clock<=0;
substate<=1;
LCD_E<='1';
Clock<=0;
substate<=2;
LCD_E<='0';
substate<=3;
Clock<=0;
SF_D<="0000";-- IT HAS BEEN FIXED
Clock<=0;
substate<=4;
LCD_E<='1';
Clock<=0;
substate<=5;
LCD_E<='0';
substate<=0;
state<=18;
Clock<=0;
end if;
--WAIT FOR 2,000 CLOCK
state<=19;
clock<=0;
--WRITE DD RAM ADD SF_D<=0x HAVE TO FIX THIS
LCD_RS<='1';
LCD_RW<='0';
SF_D<="0100";--IT HAS BEEN FIXED
Clock<=0;
substate<=1;
LCD_E<='1';
Clock<=0;
substate<=2;
LCD_E<='0';
substate<=3;
Clock<=0;
SF_D<="0001";-- IT HAS BEEN FIXED
Clock<=0;
substate<=4;
LCD_E<='1';
Clock<=0;
substate<=5;
LCD_E<='0';
substate<=0;
state<=20;
Clock<=0;
end if;
elsif(state=20)then
state<=20;
clock<=0;
end if;
elsif(clk1=1) then
clk1<=0;
end if;
end process;
end Behavioral;

LCD Code

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library IEEE;

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