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  • Final Year Project Definitions: SR - N O. Project Title Field of Project Durati On of Project Hardware Options Fees

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    Sagar Shah
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    This document outlines several final year project options for students including the project title, field of study, duration, required hardware, and contact information. Project options include a Viterbi decoder for GSM and IEEE 802.11 convolutional encoders, an SDRAM controller using VHDL, a JTAG controller using Verilog, combined modulation systems implementation using Verilog, fingerprint recognition, a 64-bit math co-processor using Verilog, and an unauthorized access prevention system using a keypad, fingerprint sensor and GSM module. Project durations range from 6 months to 1 year. Required hardware includes FPGAs, DSP and microcontroller boards, and various interface modules. Contact information is provided for those interested in the projects.

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    project definition

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    Definitions 3

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    This document outlines several final year project options for students including the project title, field of study, duration, required hardware, and contact information. Project options include a Viterbi decoder for GSM and IEEE 802.11 convolutional encoders, an SDRAM controller using VHDL, a JTAG controller using Verilog, combined modulation systems implementation using Verilog, fingerprint recognition, a 64-bit math co-processor using Verilog, and an unauthorized access prevention system using a keypad, fingerprint sensor and GSM module. Project durations range from 6 months to 1 year. Required hardware includes FPGAs, DSP and microcontroller boards, and various interface modules. Contact information is provided for those interested in the projects.

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    Attribution Non-Commercial (BY-NC)
    Download as RTF, PDF, TXT or read online from Scribd
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    11 views1 page

    Final Year Project Definitions: SR - N O. Project Title Field of Project Durati On of Project Hardware Options Fees

    Uploaded by

    Sagar Shah
    This document outlines several final year project options for students including the project title, field of study, duration, required hardware, and contact information. Project options include a Viterbi decoder for GSM and IEEE 802.11 convolutional encoders, an SDRAM controller using VHDL, a JTAG controller using Verilog, combined modulation systems implementation using Verilog, fingerprint recognition, a 64-bit math co-processor using Verilog, and an unauthorized access prevention system using a keypad, fingerprint sensor and GSM module. Project durations range from 6 months to 1 year. Required hardware includes FPGAs, DSP and microcontroller boards, and various interface modules. Contact information is provided for those interested in the projects.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as RTF, PDF, TXT or read online from Scribd
    Flag for inappropriate content
    of 1

    Final Year Project Definitions

    Sr . N o.
    1

    Project Title
    Viterbi decoder for GSM convolutional encoder on FPGA Viterbi decoder for IEEE 802.11 convolutional encoder using VHDL SDRAM controller using VHDL

    Field of Project
    VLSI, Communicati on VLSI, Communicati on VLSI, Embedded sys VLSI, Embedded sys VL SI, Communicati on Image Processing

    Durati on of Project
    1 year

    Hardware options

    Fees

    FPGA Spartan 2/3E

    1 year

    FPGA Spartan 3E

    6 months

    FPGA Spartan 2/3E

    JTAG controller using Verilog

    1 year

    FPGA Spartan 2/3E

    Implementation of combined modulation systems using Verilog Touch less fingerprint reorganization

    FPGA Spartan 3E or higher Portable Hardware (Beagle boards), DSP6416 or other DSP TMS kits VERTEX FPGA kits

    64 bit math co-processor using Verilog Unauthorized access system using KEY-PAD, fingerprint sensor and GSM module.

    VLSI

    Embedded

    Microcontroller 8052 and other interfaces

    Contact: Jainam Shah : 9909165129 Ujash Poshiya : 8000545480 Sagar Shah : 8905630463

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