Q16 051-6338-C.bak

8
1
CK
APPD
DRAWING
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
REV
ZONE
ECN
DATE
02
PAGE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
ENG
APPD
DESCRIPTION OF CHANGE
CONTENTS
PAGE
TITLE PAGE AND CONTENTS

SYSTEM BLOCK DIAGRAM
POWER BLOCK DIAGRAM
PCB NOTES AND HOLES
MPC7447 MAXBUS INTERFACE
MPC7447 DATA / NC PINS / BOOTBANGER
CPU PLL AND CONFIGURATION STRAPS
INTREPID MAXBUS AND BOOT STRAPS
INTREPID MEMORY INTERFACE / BOOT ROM
DDR MEMORY MUXES
400PIN STACKED DDR SODIMM CONNECTOR
INTREPID AGP 4X/PCI
INTREPID ENET/FW/UATA/EIDE INTERFACES
INTREPID GPIOS/SERIAL/USB INTERFACES/SSCG
INTREPID POWER RAILS/1.5V LDO
INTREPID DECOUPLING
USB 2.0 INTERFACE (uPD720101)
CARDBUS INTERFACE (PCI1510)
M10 AGP INTERFACE & SPREAD SPECTRUM SUPPORT
External TMDS (DVI Transmitter SIL1162)
M10 LVDS/TMDS/GPIO & GPU VCORE
M10 POWER
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
248015
ENGINEERING RELEASED
DATE
12/05/02 ?
CONTENTS
VIDEO CONNECTORS - INVERTER, DVI, S-VIDEO,

LVDS
SCHEM,MLB,PB15
KBD,TPAD,HALL EFFECT,PWR BUTTON,LMU/SENSOR
Fri Jan 23 20:30:40 2004

INTERNAL CONNECTORS - AIRPORT, HARD DRIVE,
OPTICAL DRIVE
FAN CONTROLLER, USB MODEM/SOFT MODEM,
SOUND/LEFT USB/BLUETOOTH, SERIAL DEBUG
GIGABIT ETHERNET INTERFACE
BOM OPTIONS (IN COMMON PARTS)

STUFF
FIREWIRE PHY
NO STUFF
1_8V_MAXBUS
1_5V_MAXBUS
SSCG
NO_SSCG
5V_HD_LOGIC
3V_HD_LOGIC
NO_BBANG
BBANG
INT_2_5V_COLD
INT_2_5V_HOT
ATI_MEMIO_HI
ATI_MEMIO_LO
USB_MODEM
SOFT_MODEM
GPU_PWRMSR
INT_TMDS
FIREWIRE PORTS
PMU
BATTERY CHARGER AND CONNECTOR
PBUS SUPPLY / PMU SUPPLY / BACKUP BATTERY
3.3V / 5V SYSTEM POWER SUPPLY
CPU CORE VOLTAGE POWER SUPPLY
GPU_SS
VGA_BUFFER_RES
1.5V/ 1.8V / 2.5V SYSTEM POWER SUPPLIES
EXT_TMDS
SIGNAL CONSTRAINTS (1 OF 4) - DDR MEM/CLK
SIGNAL CONSTRAINTS (2 OF 4) - CPU
SIGNAL CONSTRAINTS (3 OF 4) - DIGITAL/DIFF

SIGNAL CONSTRAINTS (4 OF 4) - POWER NETS
FUNCTIONAL TESTPOINTS
REVISION HISTORY
SIGNAL LOCATIONS
COMPONENT LOCATIONS (1 OF 2)
COMPONENT LOCATIONS (2 OF 2)
DIMENSIONS ARE IN MILLIMETERS
Apple Computer Inc.
METRIC
XX
X.XX
DRAFTER
NOTICE OF PROPRIETARY PROPERTY
DESIGN CK
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
BOM OPTION
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
X.XXX
TABLE_5_ITEM
051-6338
SCHEM,MLB,PB15
SCH1
820-1441
PCBF,MLB,PB15
PCB1
CMNPRTS,MLB,PB15
DMS1
DMS630-4285&DMS630-4721
065-3952
SELPRTS,MLB,PB15,BTR
DMS2
DMS630-4285
065-4479
SELPRTS,MLB,PB15,BST
DMS3
DMS630-4721
MFG APPD
QA APPD
DESIGNER
RELEASE
SCALE
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
TABLE_5_ITEM
065-3951
ENG APPD
ANGLES
TABLE_5_ITEM
TITLE
DO NOT SCALE DRAWING
SCHEM,MLB,PB15"
TABLE_5_ITEM
TABLE_5_ITEM
NONE
SIZE
THIRD ANGLE PROJECTION
MATERIAL/FINISH
NOTED AS
APPLICABLE
DRAWING NUMBER
REV.
051-6338
SHT
C
OF
40
2 DATA PAIRS
@ 200MHz
OPTICAL DRIVE
Connector
P.24
J12
G/MII
1394 OHCI
SLEEP
LED
P.23
LIO/Audio
Connector
P.25
I2S I2C
I2C
UIDE
PMU
P.29
400 MB/S
P.13
EIDE
P.13
CARDSLOT
P.13
P.13
I2S
I2C
P.14
P.13
P.14
NOT USED
USB PORT A
SCCA
P.14
P.14
NOT USED
USB PORT B
NOT USED
USB PORT E
P.12
P.12
P.14
32BITS
33MHZ
3.3V
1.5V/3.3V
32BITS
66MHZ
U47
P.9
167MHZ
32BIT ADDRESS
64BIT DATA
MEMORY BUS
2.5V
U16/U18/U28/U27
CPU PLL
Config
P.7
CPU
167MHZ
64BITS
2:1 DDR MUXES
P.10
Inverter
Connector
P.22
J21
MEMORY
MEMORY
CH. B
CH. D
DDR SDRAM DIMM 0
NEC USB2.0
EHCI HC
P.17
J3
(INTERNAL MEM) (INTERNAL MEM)
LEFT USB
(VIA LIO)
P.25
J17
RIGHT USB
(VIA STATLER)
P.25
J22
LCD Panel S-Video

DVI-I
Connector Connector Connector
P.22
P.22
P.22
J25
U17
(INTERNAL MEM) (INTERNAL MEM)
J4
PMU
MEMORY
CH. C
CH. A
P.19-21
J14
(MPC7447)
P.5-6
MEMORY
ATI
M10
64MB
P.12
DDR MEMORY
MAXBUS
1.8V
APOLLO
AIRPORT
Connector
P.24
AGP BUS
4X AGP
P.8
U56
TI PCI1510
CardBus
Controller
P.18
J6
PCI BUS
MAXBUS
INTREPID
I2C
U8
BOOT ROM
1M X 8
P.9
BOOTROM
P.25
33MHZ
16/32 BITS
3.3V/5V
64BITS
33MHZ
USB PORT F
Modem/SW Modem
Connector
P.23
PCI
P.14
J15
P.23
U11
P.14
P.25
Keyboard
Connector
Serial Debug
Connector
P.25
P.14
INTREPID
USB PORT D
TRACKPAD
Connector
CARDBUS
Connector
P.18
VIA/PMU
USB PORT C
P.14
J28
EDID (I2C)
NOT USED
U51
P.14
J3
BlueTooth (LIO)
UATA 100
J5
SERIAL
5V
J11
J10
LVDS
FIREWIRE
3.3V
Fan
Circuit
P.25
NOT USED
ETHERNET
SMBUS
U53/J1/J18
EIDE
P.24
10/100/1000
P.13
U28
ULTRA ATA/100
Connector
3.3V
8BIT TX/RX
50MHZ
DC-In
Connector
P.30
J8
J3
DDC
3.3V
10/100/1000
8BIT TX
8BIT RX
125MHZ
Power Supply
& Charger
P.30-34
RGB
Ethernet
PHY
P.26
Battery
Connector
P.30
P.23
J13
FireWire
PHY
P.27
J27
TMDS
U43
J26
LMU LUX Board

Connector
2 DATA PAIRS
@ 400MHZ
U36
P.23
J19
(VIA SIL1162)
4 DATA PAIRS
RUX Board
Connector
FW - B
Connector
P.28
FW - A
Connector
P.28
Ethernet
Connector
P.26
J2
COMPOSITE
J23
5
J20
J24
S-VIDEO
SYSTEM BLOCK DIAGRAM

DDR SDRAM DIMM 1

SO-DIMM Connector

P.11

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6338
2
1
OF
40
POWER SYSTEM ARCHITECTURE

+5V_MAIN
-
BACKLIGHT
PG 31
>~13.44V TURNS-ON
INVERTER
MAIN 2.5V/1.5V
DC/DC
(MAX1715)
PGOOD
PG 34
RUN/SS
AC
ADAPTER
INRUSH
LIMITER
IN
PG 30
+24V_PBUS
VCC
PG 30
14V_PBUS
BUCK
REGULATOR
(LTC1625)
PG 31
+PBUS
PG 31
SHDN
DC/DC
(MAX1717)
AFTER PMU IS UP AND RUNNING

DCDC_EN_L WILL PULL ON1/ON2
LOW IN SHUTDOWN
STARTS 2.0MSEC AFTER DCDC_EN_L BECOMES LOW
+5V_MAIN
+3V_PMU
MAIN 3V/5V PGOOD

DC/DC
(LTC3707)
VCC
PG 32 STBYMD
14V CHARGES BACKUP BATTERY
+PBUS
+5V_MAIN
TURNS ON AT >1V
<100UA ALLOWED
INTERNAL ZENER CLAMP TO 6V
+4_6V_BU
14V_PBUS
BACKUP
BATTERY
+5V_MAIN
DCDC_EN_L
RUN/SS - 5V
INTREPID CORE
AGP I/O
VCC
RC AT 1M*0.047UF @ 24V
+3V_PMU
LDO
MAXBUS
SEQUENCING
+1.5V_MAIN
ON1/ON2
+5V_MAIN
+BATT
1_5V_2_5V_OK
TURNS ON OUTPUT @ 2.4V
SHUTDOWN: RUNNING
SLEEP: RUNNING
RUN: RUNNING
DCDC_EN
SLEEP
+2.5V_MAIN
SHUTDOWN: STOPPED
SLEEP: RUNNING
RUN: RUNNING
+5V_MAIN
AC: 12.8V
NO AC: BATTERY VOLTAGE
1625 NOT RUNNING
MAP31 DDR CORE

MAP31 DDR I/O
DDR POWER
VCC
+
<~13.44V SHUTS-OFF
+PBUS
1V20_REF
VCC
DC/DC
(LTC1778)
3V_5V_OK
HOLDS BOTH RUN/SS AT GND
WHEN ITS CONNECTED TO GND
TURNS CONTROL TO RUN/SS
WHEN ITS OPEN
SHUTDOWN: STOPPED
SLEEP: RUNNING
RUN: RUNNING
SLEEP
D3_COLD
+3.3V_MAIN
RUN/SS - 3V
PG 33
GPU_VCORE
+1.2V
SHUTDOWN: STOPPED
SLEEP: D3COLD
RUN: RUNNING
DCDC_EN
CPU_VCORE
(+1.385V)
TURNS ON AS LOW AS 0.8V/TYP 1.5V

INTERNAL 1.2UA CURRENT SOURCE
RUN/SS
GPU_VCORE
SEQUENCING
INTERNAL ZENER CLAMP TO 6V

<100UA ALLOWED
TURNS ON AT >1V
SHUTDOWN: STOPPED
SLEEP: STOPPED
RUN: RUNNING
EXT_VCC
PG 20
1_5V_2_5V_OK WILL NOT PULL LOW UNTIL
+5V_MAIN TURNS ON
1M & 0.1UF @14V, IT TAKES

~5.88MS TO START SWITCHER
1_5V_2_5V_OK
D3_HOT
HOWEVER, 5V SHOULD TURN ON ~2.23MS AFTER

DCDC_EN_L OR PMU_POWERUP_L
BECOMES 1; MUCH LESS THAN THE
RC CHARGING AT INT_VCC (5V)
DCDC_EN_L
D3_HOT
24V IS OUTPUT ONLY FROM
BACKUP BATTERY
RC AT 1M*0.1UF @ 24V
CHARGER INPUT
& BOOST OUTPUT
PG 31
STARTS ~4.25MSEC AFTER DCDC_EN_L BECOMES LOW
SHUT-DOWN
NO INRUSH PROTECTION
PG 34
SLEEP
SLEEP_L_LS5
DCDC_EN
DCDC_EN_L
+5V_MAIN
+5V_SLEEP
+3V_MAIN
+3V_SLEEP
3V_5V_OK
NO INRUSH PROTECTION
+2_5V_MAIN
+2_5V_SLEEP
+1_5V_MAIN
+1_5V_SLEEP
WHEN ONLY BATTERY IS CONNECTED
+24V_PBUS
BACKUP BATTERY CIRCUIT CHARGES OFF +PBUS
DC/DC
(LTC3411)
AND PREVENTS +PBUS AND +24V_PBUS FROM DROPPING BELOW 6V

(UNTIL DRAINED)
BATTERY
CHARGER
(MAX1772)
PG 30
+1.8V_MAIN
MAXBUS
SHUTDOWN: STOPPED
SLEEP: STOPPED
RUN: RUNNING
+BATT
3S 2P 18650 CELLS
WHEN ONLY BATTERY IS CONNECTED
RUN
SLEEP
RUN
SHUT-DOWN
~2.23MS
~7.36MS
2.4V - ??? MS
??? MS
??? MS
1_5V_2_5V_OK
(MAX1715 OUTPUT)
BATTERY VOLTAGE
FEED-IN PATH
POWER BLOCK DIAGRAM
1_5V_2_5V_OK
(AT LTC1778 RUN/SS)
+PBUS
GPU_VCORE
~8.2MS
(D3HOT)
GPU_VCORE
PG 30
(D3COLD)

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6338
3
1
OF
40
BOARD HOLES
CHASSIS MOUNTS
PCB SPECS
ASICS HEATSINK MOUNTS
INVERTER
I/O AREA
ZT85
ZT7
DVI
SH1
OG-503040
SHLD-SM
CHGND2
ZT21
HOLE-VIA-20R10
HOLE-VIA-20R10 LEFT CPU
HOLE-VIA-20R10 UPPER RT GPU
THICKNESS : 1.2 MM / 0.047 IN

1/2 OZ CU THICKNESS: 0.7 MILS
1.0 OZ CU THICKNESS: 1.4 MILS
ZT86
DVI
CHGND3
HOLE-VIA-20R10 1394
1
ZT58
CHGND1
HOLE-VIA-20R10 LWR CPU

1
MECH. HOLES
ZT59
HOLE-VIA-20R10 LWR RT GPU
ZT16
ZT74
HOLE-VIA-20R10
HOLE-VIA-20R10
BATT. CHRGR
CHGND5
IMPEDANCE : 50 OHMS +/- 10%

DIELECTRIC: FR-4
LAYER COUNT: 10
SIGNAL TRACE WIDTH: 4 MILS
SIGNAL TRACE SPACING: 4 MILS
PREPREG THICKNESS: 2-3 MILS
ZT36
HOLE-VIA-20R10
1
ZT301_SPN
NO_TEST=TRUE
ZT23
HOLE-VIA-20R10
1
ZT302_SPN
NO_TEST=TRUE
ZT42
HOLE-VIA-20R10
1
ZT10_SPN
NO_TEST=TRUE
SEE PCB CAD FILES FOR MORE SPECIFIC INFO.
GROUND VIAS
BOARD STACK-UP AND CONSTRUCTION
ZT76
HOLE-VIA-20R10
1-8-1 BLIND MICROVIA/20R10 BURIED VIA/20R10 TH VIA
SIGNAL (1/2 OZ + COPPER PLATING)
ZT28
ZT51
ZT47
ZT34
ZT19
CORE (3 MIL)
ZT72
ZT52
ZT54
ZT20
ZT24
ZT68
PREPREG (5 MIL)
SIGNAL (1/2 OZ)
HOLE-VIA-20R10
CORE (5 MIL)
CUT POWER PLANE (1 OZ)
HOLE-VIA-20R10
ZT82
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
1
ZT2
HOLE-VIA-20R10
1
ZT5
HOLE-VIA-20R10
HOLE-VIA-20R10
1
ZT38
ZT22
ZT15
ZT75
HOLE-VIA-20R10
1
ZT17
HOLE-VIA-20R10
ZT40
ZT35
HOLE-VIA-20R10
ZT41
ZT45
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
1
ZT37
HOLE-VIA-20R10
1
ZT29
HOLE-VIA-20R10
1
ZT9
ZT31
HOLE-VIA-20R10
1
HOLE-VIA-20R10
1
ZT1
HOLE-VIA-20R10
1
ZT44
HOLE-VIA-20R10
ZT73
HOLE-VIA-20R10
1
ZT14
HOLE-VIA-20R10
1
ZT4
HOLE-VIA-20R10
ZT63
HOLE-VIA-20R10
1
ZT12
HOLE-VIA-20R10
1
ZT8
HOLE-VIA-20R10
ZT77
HOLE-VIA-20R10
1
ZT27
HOLE-VIA-20R10
1
SIGNAL (1/2 OZ)
ZT46
HOLE-VIA-20R10
10
ZT70
HOLE-VIA-20R10
PREPREG (3 MIL)
ZT57
ZT56
HOLE-VIA-20R10
HOLE-VIA-20R10
GROUND (1/2 OZ)
HOLE-VIA-20R10
ZT84
ZT39
CORE (3 MIL)
HOLE-VIA-20R10
ZT60
HOLE-VIA-20R10
SIGNAL (1/2 OZ)
ZT67
ZT64
HOLE-VIA-20R10
PREPREG (5 MIL)
ZT53
ZT43
HOLE-VIA-20R10
ZT55
ZT61
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
CUT POWER PLANE (1 OZ)
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
GROUND (1/2 OZ)
HOLE-VIA-20R10
ZT69
HOLE-VIA-20R10
HOLE-VIA-20R10
PREPREG (3 MIL)
ZT25
HOLE-VIA-20R10
SIGNAL (1/2 OZ)
ZT11
HOLE-VIA-20R10
HOLE-VIA-20R10
PREPREG (3 MIL)
ZT48
HOLE-VIA-20R10
HOLE-VIA-20R10
ZT50
HOLE-VIA-20R10
PREPREG (3 MIL)
SIGNAL (1/2 OZ + COPPER PLATING)
ZT79
HOLE-VIA-20R10
HOLE-VIA-20R10
ZT71
ZT81
ZT32
ZT62
HOLE-VIA-20R10
HOLE-VIA-20R10
ZT78
HOLE-VIA-20R10
ZT83
HOLE-VIA-20R10
ZT6
HOLE-VIA-20R10
ZT66
ZT80
HOLE-VIA-20R10
HOLE-VIA-20R10
1
ZT30
HOLE-VIA-20R10
1
ZT3
HOLE-VIA-20R10
ZT65
HOLE-VIA-20R10
ZT49
ZT10
ZT13
HOLE-VIA-20R10
1
HOLE-VIA-20R10
HOLE-VIA-20R10
ZT26
ZT33
HOLE-VIA-20R10
1
HOLE-VIA-20R10
HOLE-VIA-20R10
BOARD INFORMATION
ZT18
HOLE-VIA-20R10
1

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6338
4
1
OF
40
MAXBUS_SLEEP
CPU_VCORE_SLEEP
R381
470
C59
10uF
10uF
20%
6.3V
CERM
805
5%
1/16W
MF
402 2
C32
20%
6.3V
CERM
805
C104
10uF
20%
6.3V
2 CERM
805
C26
0.1uF
20%
10V
2 CERM
402
C39
0.1uF
C50
0.1uF
20%
2 10V
CERM
402
C45
C29
0.1uF
20%
2 10V
CERM
402
0.1uF
20%
2 10V
CERM
402
C55
0.1uF
20%
2 10V
CERM
402
C2
+1_5V_SLEEP
5 6 7 8 15 16 33 38
20%
10V
2 CERM
402
C38
0.1uF
470
0.1uF
20%
2 10V
CERM
402
R891
C108
0.1uF
20%
2 10V
CERM
402
C88
0.1uF
20%
2 10V
CERM
402
5%
1/16W
MF
402 2
R281
C44
0.1uF
20%
2 10V
CERM
402
20%
2 10V
CERM
402
C20
0.1uF
20%
2 10V
CERM
402
C87
0.1uF
C61
0.1uF
20%
2 10V
CERM
402
+1_8V_SLEEP
20%
2 10V
CERM
402
MPC7447 PULL-UPS
5%
1/16W
MF
603
1_8V_MAXBUS
38 33 16 15 8 7 6 5
C33
10uF
20%
6.3V
2 CERM
805
C58
10uF
20%
6.3V
2 CERM
805
C107
0.1uF
20%
10V
2 CERM
402
C30
0.1uF
20%
10V
2 CERM
402
C49
0.1uF
C31
0.1uF
20%
2 10V
CERM
402
C47
20%
2 10V
CERM
402
C27
0.1uF
0.1uF
0.1uF
20%
2 10V
CERM
402
20%
2 10V
CERM
402
C53
C103
0.1uF
20%
2 10V
CERM
402
C110
0.1uF
20%
2 10V
CERM
402
C18
0.1uF
20%
2 10V
CERM
402
C89
0.1uF
20%
2 10V
CERM
402
C72
0.1uF
20%
2 10V
CERM
402
20%
2 10V
CERM
402
C10
0.1uF
20%
2 10V
CERM
402
C69
0.1uF
MAXBUS_SLEEP
R283
0
R24
10K
2
8 5
5%
1/16W
MF
603
1
1_5V_MAXBUS
CPU_OVDD DECOUPLING NETWORK
CPU_VCORE DECOUPLING NETWORK
5 33 38 39
CPU_TBEN
C81
C34
2.2uF
20%
10V
2 CERM
805
C62
2.2uF
20%
10V
2 CERM
805
C109
0.1uF
20%
10V
2 CERM
402
C28
0.1uF
20%
10V
2 CERM
402
C48
0.1uF
C56
0.1uF
C25
0.1uF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
C46
0.1uF
0.1uF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
C54
C68
0.1uF
20%
10V
2 CERM
402
C1
0.1uF
0.1uF
20%
10V
2 CERM
402
C86
0.1uF
C75
0.1uF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
20%
10V
2 CERM
402
C9
20%
10V
2 CERM
402
C73
20%
2 10V
CERM
402
0.1uF
20%
10V
2 CERM
402
R4
CPU_CHKS_L
0.1uF
20%
2 10V
CERM
402
CPU_SHD0_L
C17
0.1uF
C82
0.1uF
20%
10V
2 CERM
402
R748
CPU_AVDD
10K
CPU_MCP_L
402
25
ADT7460_VCORE_MON
VDD
36 8
CPU_BR_L
36 8
CPU_BG_L
D2
OVDD
36 8
M1
L4
CPU_TS_L
E11
CPU_PULLDOWN
H1
C11
G3
20%
2 10V
CERM
402
AVDD
BR*
BG*
BVSEL
SYSCLK
CLKOUT
PLLCFG0
PLLCFG1
PLLCFG2
PLLCFG3
PLL_EXT
DBG*
DRDY*
DTI0
DTI1
DTI2
DTI3
36 8
CPU_ADDR<0>
F10
36 8
CPU_ADDR<1>
L2
36 8
CPU_ADDR<2>
D11
36 8
CPU_ADDR<3>
D1
36 8
CPU_ADDR<4>
C10
36 8
CPU_ADDR<5>
G2
36 8
CPU_ADDR<6>
D12
36 8
CPU_ADDR<7>
L3
36 8
CPU_ADDR<8>
G4
36 8
CPU_ADDR<9>
T2
36 8
CPU_ADDR<10>
F4
36 8
CPU_ADDR<11>
V1
36 8
CPU_ADDR<12>
J4
36 8
CPU_ADDR<13>
R2
36 8
CPU_ADDR<14>
K5
36 8
CPU_ADDR<15>
W2
36 8
CPU_ADDR<16>
J2
36 8
CPU_ADDR<17>
K4
36 8
CPU_ADDR<18>
N4
36 8
CPU_ADDR<19>
J3
36 8
CPU_ADDR<20>
M5
36 8
CPU_ADDR<21>
P5
36 8
CPU_ADDR<22>
N3
36 8
CPU_ADDR<23>
T1
36 8
CPU_ADDR<24>
V2
36 8
CPU_ADDR<25>
U1
36 8
CPU_ADDR<26>
N5
36 8
CPU_ADDR<27>
W1
36 8
CPU_ADDR<28>
B12
36 8
CPU_ADDR<29>
C4
36 8
CPU_ADDR<30>
G10
36 8
CPU_ADDR<31>
B11
NC
C1
NC
E3
NC
H6
NC
F5
NC
G7
36 8
CPU_TT<0>
E5
36 8
CPU_TT<1>
E6
36 8
CPU_TT<2>
F6
36 8
CPU_TT<3>
E9
36 8
CPU_TT<4>
36 8
CPU_TBST_L
36 8
CPU_TSIZ<0>
C5
F11
G6
F7
36 8
CPU_TSIZ<1>
36 8
CPU_TSIZ<2>
36 8
CPU_GBL_L
E2
36 8
CPU_WT_L
D3
36 8
CPU_CI_L
J1
36 8
CPU_AACK_L
R1
36 8
CPU_ARTRY_L
N2
CPU_SHD0_L
E4
5
5
36 8
E7
CPU_SHD1_L
H5
CPU_HIT_L
B2
TS*
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
CRITICAL
BOM OPTION
CRITICAL
CPU_BST
TABLE_5_ITEM
337S2748
IC,APOLLO7,1.X,1.25GHZ,1.XV CORE,85C
U56
C810
0.1uF
NC
A8
V14
V10
V7
V4
U16
U12
U2
T9
T6
R16
R13
R4
P11
P8
P2
N6
M3
L5
K2
J5
H3
G18
F2
E18
D5
C12
C2
B4
M12
M10
M8
L13
L11
L9
L7
K14
K12
K10
K8
J13
J11
J9
J7
H12
H10
H8
OMIT
B7
A10
CPU_BUS_VSEL
SYSCLK_CPU
C811
CPU_L2TSTCLK
2.2uF
39 5
CPU_CLKOUT_SPN
B8
CPU_PLL_CFG<0>
C8
CPU_PLL_CFG<1>
C7
CPU_PLL_CFG<2>
D7
CPU_PLL_CFG<3>
A7
CPU_SRWX_L
CPU_PLL_CFG<4>
M2
CPU_DBG_L
8 36
R3
CPU_DRDY_L
8 36
G1
CPU_EDTI
K1
CPU_DTI<0>
8 36
P1
CPU_DTI<1>
8 36
N1
CPU_DTI<2>
8 36
IC,APOLLO7,1.x,1.0GHZ,1.XV CORE,85C
U56
CRITICAL
OMIT
U56
800MHZ
APOLLO_MPC7445_360
B9
JTAG_CPU_TDI
5 6 39
A4
JTAG_CPU_TDO_TP
39
F1
JTAG_CPU_TMS
5 6 39
C6
JTAG_CPU_TCK
5 6 39
A5
JTAG_CPU_TRST_L
5 6 39
E8
CPU_LSSD_MODE
G8
CPU_L1TSTCLK
CPU_EMODE1_L
B3
CPU_L2TSTCLK
K6
CPU_TA_L
8 36
BGA
L1
CPU_TEA_L
8 36
(1 OF 3)
29 5
CPU_TBEN
5 8
P4
CPU_QREQ_L
8 36
G5
CPU_QACK_L
8 36
39 6 5
39 6 5
470
R2
10K
R6
CPU_SRESET_L
AP0
AP1
AP2
AP3
AP4
MPIC_CPU_INT_L
5 14
F9
CPU_SMI_L
5 29
C9
CPU_MCP_L
A2
CPU_SRESET_L
5 39
D8
CPU_HRESET_L
5 6 7 39
10K
10K
R36
1
CPU_EDTI
JTAG_CPU_TCK
10K
TT0
TT1
TT2
TT3
TT4
TBST*
TSIZ0
TSIZ1
TSIZ2
GBL*
WT*
CI*
AACK*
ARTRY*
SHD0*
SHD1*
HIT*
PMON_IN*
PMON_OUT*
D9
BMODE0*
BMODE1*
G9
CPU_EMODE0_L
F8
CPU_EMODE1_L
CPU_PMONIN_L
5%
1/16W
MF
402
5
10K
5%
1/16W
MF
402
R11
39 6 5
5%
1/16W
MF
402
5
5%
1/16W
MF
402
R37
CPU_L1TSTCLK
5%
1/16W
MF
402
5 39
D4
470
5%
1/16W
MF
402
INT*
SMI*
MCP*
SRESET*
HRESET*
10K
5%
1/16W
MF
402
JTAG_CPU_TDI
MPIC_CPU_INT_L
R34
1
CPU_SMI_L
JTAG_CPU_TMS
R19
39 5
CPU_CHKSTP_OUT_L
10K
1K
5%
1/16W
MF
402
5%
1/16W
MF
402
A3
B1
CPU_PULLUP
CPU_HRESET_L
R3
R32
470OHM FOR BOOT BANGER
14 5
E1
5%
1/16W
MF
402
MPC7447
TBEN
QREQ*
QACK*
CKSTP_IN*
CKSTP_OUT*
10K
10K
5%
1/16W
MF
402
R20
39 7 6 5
R27
1
5%
1/16W
MF
402
TA*
TEA*
R33
5
1K
5%
1/16W
MF
402
CPU_PMONIN_L
CPU_BTR
TDI
TDO
TMS
TCK
TRST*
LSSDMODE*
L1TSTCLK
L2TSTCLK
10K
R7
1
5%
1/16W
MF
402
NO_TEST=TRUE
TABLE_5_ITEM
337S2732
10K
R28
5
8 35
H2
10K
CPU_CHKSTP_OUT_L
5%
1/16W
MF
2 402
5%
1/16W
MF
402
20%
2 10V
CERM
805
10K
R26
1
CPU_LSSD_MODE
R8
XW34
SM
5%
1/16W
MF
402
5%
1/16W
MF
402
1%
1/16W
MF
1 402
R46
1
CPU_SHD1_L
5 33 38 39
R13
20%
10V
2 CERM
402
38
MORE 0805 10UF CAPS ON VCORE POWER SUPPLY PAGE (PG 32)
5%
1/16W
MF
402
5
CPU_VCORE_SLEEP
10K
10K
5%
1/16W
MF
402
R25
CPU INTERNAL PLL FILTERING
5%
1/16W
MF
402
R45
1
CPU_PULLDOWN
470
5%
1/16W
MF
402
A9 NC
MAXBUS_SLEEP
5 6 7 8 15 16 33 38
BBANG
1
R9
470
EXT_QUAL
A11
CPU_PULLDOWN
TEST0
TEST1
TEST2
TEST3
TEST4
A12
CPU_CHKS_L
B6
CPU_PULLUP
39 6 5
5%
1/16W
MF
2 402
JTAG_CPU_TRST_L
NO_BBANG
MPC7447 MAXBUS
B10
R10
E10
CPU_SRWX_L
200
5
D10
CPU_PULLDOWN
5%
1/16W
MF
2 402

SIZE
V15
V11
V8
V5
U17
U13
U3
T10
T7
R17
R14
R5
P12
P9
P3
N7
M13
M9
M11
M7
M4
L12
L10
L8
L6
K13
K9
K3
K11
K7
J12
J8
J10
J6
H13
H11
H9
H7
H4
G17
F3
E17
D13
D6
C3
B5
GND
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6338 C
5
1
OF
40
BOOT BANGER - TWEAK PROCESSOR BITS AFTER POWER-ON

NC F19
NC H19
NC H18
NC H17
NC H16
NC E19
D
CPU_DATA<0>
R15
36 8
CPU_DATA<1>
W15
36 8
CPU_DATA<2>
T14
36 8
CPU_DATA<3>
V16
36 8
CPU_DATA<4>
W16
36 8
CPU_DATA<5>
T15
36 8
CPU_DATA<6>
U15
36 8
CPU_DATA<7>
P14
36 8
CPU_DATA<8>
V13
36 8
CPU_DATA<9>
W13
36 8
CPU_DATA<10>
T13
36 8
CPU_DATA<11>
P13
36 8
CPU_DATA<12>
U14
36 8
CPU_DATA<13>
W14
36 8
CPU_DATA<14>
R12
36 8
CPU_DATA<15>
T12
36 8
CPU_DATA<16>
W12
36 8
CPU_DATA<17>
V12
36 8
CPU_DATA<18>
N11
36 8
CPU_DATA<19>
N10
36 8
CPU_DATA<20>
R11
36 8
CPU_DATA<21>
U11
36 8
CPU_DATA<22>
W11
36 8
CPU_DATA<23>
T11
36 8
R10
CPU_DATA<24>
36 8
CPU_DATA<25>
N9
36 8
CPU_DATA<26>
P10
36 8
CPU_DATA<27>
U10
36 8
CPU_DATA<28>
R9
36 8
CPU_DATA<29>
W10
36 8
CPU_DATA<30>
U9
36 8
CPU_DATA<31>
V9
36 8
CPU_DATA<32>
W5
36 8
CPU_DATA<33>
U6
36 8
CPU_DATA<34>
T5
36 8
CPU_DATA<35>
U5
36 8
CPU_DATA<36>
W7
36 8
CPU_DATA<37>
R6
36 8
CPU_DATA<38>
P7
36 8
CPU_DATA<39>
V6
36 8
CPU_DATA<40>
P17
36 8
CPU_DATA<41>
R19
36 8
CPU_DATA<42>
V18
36 8
CPU_DATA<43>
R18
36 8
CPU_DATA<44>
V19
36 8
CPU_DATA<45>
T19
36 8
CPU_DATA<46>
U19
36 8
CPU_DATA<47>
W19
36 8
CPU_DATA<48>
U18
36 8
CPU_DATA<49>
W17
36 8
CPU_DATA<50>
W18
36 8
CPU_DATA<51>
T16
36 8
CPU_DATA<52>
T18
36 8
CPU_DATA<53>
T17
36 8
CPU_DATA<54>
W3
36 8
CPU_DATA<55>
V17
36 8
CPU_DATA<56>
U4
36 8
CPU_DATA<57>
U8
36 8
CPU_DATA<58>
U7
36 8
CPU_DATA<59>
R7
36 8
CPU_DATA<60>
P6
36 8
CPU_DATA<61>
R8
36 8
CPU_DATA<62>
W8
36 8
CPU_DATA<63>
T8
NC
T3
NC
W4
NC
T4
NC
W9
NC
M6
NC
V3
NC
N8
NC
W6
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63
NC D18
NC F16
OMIT
U56
NC G16
NC D19
800MHZ
NC F15
NC G19
BGA
(2 OF 3)
NC E16
NC D17
APOLLO_MPC7445_360
36 8
NC D16
NC P15
NC L15
NC N15
NC P18
NC N14
NC M14
NC M17
NC N13
NC N16
NC M19
NC M16
NC P19
NC N17
NC M15
NC L17
NC L14
NC K15
NC J14
NC J18
NC J19
NC J15
NC K19
NC J16
NC H15
NC L16
NC P16
NC M18
NC L19
NC L18
NC K18
NC J17
NC K16
NC C19
NC D15
NC G15
NC C18
NC A16
NC B19
NC A19
NC D14
NC E15
NC B15
NC B17
NC C17
NC C16
NC G13
NC E14
NC H14
NC G14
NC C15
NC A17
NC G12
NC F14
NC F13
DP0
DP1
DP2
DP3
DP4
DP5
DP6
DP7
NC E13
NC B16
NC A15
NC C14
NC A18
NC A13
NC F12
NC A14
NC G11
NC C13
NC N12
NC N18
NC K17
NC N19
NC B18
NC E12
NC B13
NC B14
NC
A6
OMIT
NC_F18
NC_F17
NC_F19
NC_H19
NC_H18
NC_H17
NC_H16
NC_E19
NC_D18
NC_F16
NC_G16
NC_D19
NC_F15
NC_G19
NC_E16
NC_D17
NC_D16
U56
+3V_SLEEP
800MHZ
BGA
(3 OF 3)
BBANG
APOLLO_MPC7445_360
NC F18
NC F17
NC_P15
NC_L15
NC_N15
NC_P18
NC_N14
NC_M14
NC_M17
NC_N13
NC_N16
NC_M19
NC_M16
NC_P19
NC_N17
NC_M15
NC_L17
NC_L14
NC_K15
NC_J14
NC_J18
NC_J19
NC_J15
NC_K19
NC_J16
NC_H15
NC_L16
NC_P16
NC_M18
NC_L19
NC_L18
NC_K18
NC_J17
NC_K16
NC_C19
NC_D15
NC_G15
NC_C18
NC_A16
NC_B19
NC_A19
NC_D14
NC_E15
NC_B15
NC_B17
NC_C17
NC_C16
NC_G13
NC_E14
NC_H14
NC_G14
NC_C15
NC_A17
NC_G12
NC_F14
NC_F13
NC_E13
NC_B16
NC_A15
NC_C14
NC_A18
NC_A13
NC_F12
NC_A14
NC_G11
NC_C13
C120
0.1uF
BBANG
20%
10V
2 CERM
402
VCC
U52
6
BB_EEPR_ADDR
32KX8_M24256B
SOI
NC1
NC2
3 NC3
1
SDA
SCL
WC*
INT_I2C_DATA0
6 11 13 23 39
INT_I2C_CLK0
6 11 13 23 39
BB_EEPR_WP_PD
VSS
SYM_VER2
BBANG
R637
10K
1%
1/16W
MF
2 603
+3V_SLEEP
BBANG
RP46
BBANG
R692
1%
1/16W
MF
2 603
C762
0.1uF
(Ra)
ESP_EN_L
BFR_TDO
10
ICT_TRST_L
BBANG_JTAG_TCK
BB_MOSI
BB_MISO
AT90S1200A
BB_SCK
SSOP
BB_EEPR_ADDR
20%
10V
2 CERM
402
NO STUFF
1
R709
20
10K
R707
10K
1%
1/16W
MF
2 603
5%
1/32W
25V
BBANG
10K
BBANG
1
VCC
(Rb)
1%
1/16W
MF
2 603
U54
BB_RESET_L
39
RESET*
BB_XTAL1_SPN
R712
XTAL1
XTAL2
PMU_CPU_HRESET_L
12
RESET_VREF
13
BBANG_HRESET_L
14
39 23 13 11 6
INT_I2C_CLK0
15
39 23 13 11 6
39 29 6
10K
1%
1/16W
MF
2 603
SM
INT_I2C_DATA0
16
BB_MOSI
17
BB_MISO
18
BB_SCK
19
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
ESP_EN_L
BFR_TDO
ICT_TRST_L
BBANG_JTAG_TCK
JTAG_CPU_TMS
5 39
JTAG_CPU_TDI
5 39
11
JTAG_CPU_TRST_L
5 39
GND
10
UNSTUFFING Ra AND STUFFING Rb

WILL DISABLE THE CONTROLLER
TABLE_5_HEAD
PART#
341S1135
QTY
1
DESCRIPTION
009-6240 FW GT4 BBANGER

MCU,PROGRAMMED W/ BBANGER
BOM OPTION
TABLE_5_ITEM
U54
BBANG
B
38 33 16 15 8 7 6 5
MAXBUS_SLEEP
+3V_SLEEP
38 33 16 15 8 7 6 5
MAXBUS_SLEEP
BBANG
NO_BBANG
R1001
BBANG
10K
5%
1/16W
MF
402 2
R1031
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
10K
BBANG_TCK_EN
BBANG_JTAG_TCK
5 SN74AUC1G08
SC70-5
U9
JTAG_CPU_TCK
5 39
39 29 6
R104
BBANG
R1051
BBANG_HRESET_L
5 SN74AUC1G08
SC70-5
4
U10 Y
B BBANG
5%
1/16W
MF
402
1
PMU_CPU_HRESET_L
10K
CPU_HRESET_L
INPUTS ARE 3V TOLERANT
MPC7447/BBANG
NC_N12
NC_N18
NC_K17
NC_N19
NC_B18
NC_E12
NC_B13
NC_B14
NC_A6

SIZE
DRAWING NUMBER
REV.
051-6338
SHT
NONE

SCALE
5 7 39
B BBANG
INPUTS ARE 3V TOLERANT
APPLE COMPUTER INC.
OMIT
BBANG
1
+3V_SLEEP
10K
6
1
OF
40
CPU PLL CONFIG CIRCUITRY

38 33 16 15 8 7 6 5
CPU FREQUENCY CONFIGURATION

APOLLO 7
MAXBUS_SLEEP
R18
10K
5%
1/16W
MF
2 402
CPU_PLL_CFGEXT
R01A R00A R10A
+5V_SLEEP NOW REQUIRED FOR PLL_STOP_L

PULLUP TO ENSURE THAT Vgs OF PASS
TRANSISTOR ON CPU_PLL_CFG<4> IS MET.
CPU_BST
1
R43
R1331
R141
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
47K
+5V_SLEEP
R01B
NO STUFF NO STUFF
1
1
5%
1/16W
MF
2 402
R44
R48
5%
1/16W
MF
2 402
NO STUFF
1
R60
R00B
CPU_BST
1
R63
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
R10B
CPU_BTR
1
R64
0
5%
1/16W
MF
2 402
R01C
1
R70
R00C
R10C
NO STUFF
1
NO STUFF
1
R76
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
0
5%
1/16W
MF
2 402
R78
0
R01D
NO STUFF
1
R84
0
5%
1/16W
MF
2 402
R00D
R10D
NO STUFF
1
NO STUFF
1
R88
R92
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
R01E R10E
NO STUFF
1
R23
2N7002DW
R31
5%
1/16W
MF
2 402
CPU_PLL_CFG<1>
CPU_PLL_CFG<2>
CPU_PLL_CFG<3>
CPU_PLL_CFG<4>
R00E
R12
SOT-363
0
5%
1/16W
MF
2 402
STUFF PASS TRANSISTOR ONLY IF

R10E, R01E, OR PULLUP STUFFED
CPU_PLL_FS01
R132
10K
5%
1/16W
MF
2 402
PLL_STOP_L
3
NO STUFF
Q3
D
1
2N7002DW
S
29 7
Q13
CPU_PLL_STOP_OC 5
SOT-363
S
4
CPU_PLL_FS00
SM
6
Q14
D
7
2N7002DW
PLL_STOP_L
2
Q14
2N7002DW
SOT-363
29 7
CPU_PLL_STOP_OC
CPU_PLL_FS10
CPU_PLL_STOP_BASE
3
R131
249K 2
Q12
STATE ENCODING
CPU_PLL_STOP_OC
SM
LOW SPEED
HIGH SPEED
PLL DISABLE
0
0
1
0
1
X
CPU_VCORE_HI_OC
CPU CONFIGURATION
B
MAXBUS VSEL
INVERTED HRESET_L
38 33 16 15 8 7 6 5
MAXBUS_SLEEP
BUSTYPE SELECT
1.5V INTERFACE
R110
1_5V_MAXBUS
1_5V_MAXBUS
5
39 7 6 5
1111 0F
1.0X
0011 03
2.0X
333
PLL BYPASS
267
0100 04
3.0X
500
400
1000 08
4.0X
667
533
1010 0A
5.0X
833
667
1011 0B
5.5X
917
733
1001 09
6.0X
1000
800
1101 0D
6.5X
1083
867
0101 05
7.0X
1167
933
0010 02
7.5X
1250
1000
0001 01
8.0X
1333
1067
1100 0C
8.5X
1417
1133
0110 06
9.0X
1500
1200
0111 17
CPU_HRESET_L
U12
SN74AUC1G04
4
CPU_HRESET_INV
04
3
SC70-5
R5
1
22
5%
1/16W
MF
402
39 7 6 5
CPU_BUS_VSEL
9.5X
1583
1267
0111 07
10.0X
1667
1333
1010 1A
10.5X
1750
1400
1000 18
11.0X
1833
1467
1001 19
11.5X
1917
1533
0000 00
12.0X
2000
1600
1011 1B
12.5X
2083
1667
1111 1F
13.0X
2167
1733
0101 15
13.5X
2250
1800
1110 0E
14.0X
2333
1867
1100 1C
15.0X
2500
2000
0001 11
16.0X
2667
2133
1101 1D
17.0X
2833
2267
0000 10
18.0X
3000
2400
0010 12
20.0X
3333
2667
0011 13
21.0X
3500
2800
0100 14
24.0X
4000
3200
0110 16
28.0X
4667
3733
1110 1E
CPU_VCORE_HI_OC
2N3904
1%
1/16W
MF
402
33 29
PLL OFF
0.0X
SOT-363
D
5
0123
ABCD HEX
2N7002
4
E
5%
1/16W
MF
2 402
82K
NO STUFF
Q3
NO STUFF
1
5%
1/16W
MF
2 402
(MHZ)
(Bus-to-Core)
CPU_PLL_CFG<0>
CPU_PLL_CFG
(AT BUS FREQUENCY)

167MHZ
133MHZ
10K
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
10K
5%
1/16W
MF
2 402
R79
10K
5%
1/16W
MF
2 402
R68
10K
R50
R35
CORE FREQUENCY
MULTIPLIER
NO STUFF
1
+3V_SLEEP
CPU_HRESET_L
22
CPU_EMODE0_L
5%
1/16W
MF
402
1_8V_MAXBUS
APOLLO ONLY SUPPORTS MAXBUS
R171
10
5%
1/16W
MF
402 2
1.8V INTERFACE
CPU CONFIGURATION
DESKTOP HAD PROBLEM USING

INVERTER TO INVERT HRESET_L
NEED TO CHARACTERIZE
SIGNAL
CPU_EMODE0_L
(PROCESSOR)
CPU_BUS_VSEL
(PROCESSOR)
TIED
HIGH

60X BUS MODE
CPU_HRESET_L
MAX BUS MODE
CPU_HRESET_L
2.5V INTERFACE

LOW
1.8V INTERFACE
CPU_HRESET_INV
1.5V INTERFACE
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SHT
NONE
REV.
051-6338
SCALE
APPLICATION
7
1
OF
40
THE FOLLOWING STRAP BITS CAN BE

CHANGED BY SOFTWARE:
INTREPID BOOT STRAPS
R159
38 14 12
38 33 16 15 8 7 6 5
MAXBUS_SLEEP
NO STUFF
NO STUFF
4.7
+1_5V_INTREPID_PLL
38
0.22uF
20%
6.3V
CERM 2
402
NO STUFF
H26
VDD15A_7
(PLL6)
R6401 R6391 R6381 R6661
10K
10K
10K
10K
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
CPU_DATA<32>
36 8 6
CPU_DATA<33>
36 8 6
CPU_DATA<34>
36 8 6
CPU_DATA<35>
36 8 6
CPU_DATA<36>
36 8 5
36 8 5
E29
CPU_BR_L
E26
CPU_BG_L
B27
CPU_TS_L
TS NO BUS KEEPER
36 5
CPU_ADDR<0>
36 8 6
CPU_DATA<37>
D24
CPU_DATA<38>
36 5
CPU_ADDR<1>
D25
36 8 6
CPU_DATA<39>
36 5
CPU_ADDR<2>
A27
36 8 6
36 5
CPU_ADDR<3>
E24
36 5
CPU_ADDR<4>
G23
36 5
CPU_ADDR<5>
B26
36 5
CPU_ADDR<6>
A26
36 5
CPU_ADDR<7>
D23
36 5
CPU_ADDR<8>
A25
36 5
CPU_ADDR<9>
E23
36 5
CPU_ADDR<10>
J22
36 5
CPU_ADDR<11>
B25
36 5
CPU_ADDR<12>
H22
36 5
CPU_ADDR<13>
G22
36 5
CPU_ADDR<14>
D22
36 5
CPU_ADDR<15>
B24
36 5
CPU_ADDR<16>
B23
36 5
CPU_ADDR<17>
E22
36 5
CPU_ADDR<18>
J21
36 5
CPU_ADDR<19>
G21
CPU_ADDR<20>
E21
NO STUFF
36 5
R6411 R6651 R6641 R6931 R6941 R6991
36 5
CPU_ADDR<21>
A24
36 5
CPU_ADDR<22>
D21
36 5
CPU_ADDR<23>
A23
36 5
CPU_ADDR<24>
H20
36 5
CPU_ADDR<25>
B22
36 5
CPU_ADDR<26>
H21
36 5
CPU_ADDR<27>
A22
36 5
CPU_ADDR<28>
E20
36 5
CPU_ADDR<29>
B21
36 5
CPU_ADDR<30>
D20
36 5
CPU_ADDR<31>
A21
10K
10K
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
10K
10K
10K
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
10K
10K
10K
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
R622 R619 R618 R653 R621 R620 R652 R650
Spare
Spare
Spare
Spare
ExtPLL_SDwn_Pol
0: Active high
1: Active low
DDR_TPDEn_Pol
0: Active high
1: Active low
AnalyzerClk_En_h
0: Inactive
1: Active
DDR_TPDModeEnable_h
0: TDI input (JTAG)
1: TDI output
38 33 16 15 8 7 6 5
MAXBUS_SLEEP
BIT 40 TO 47
NO STUFF
36 8 6
CPU_DATA<40>
36 8 6
CPU_DATA<41>
36 8 6
CPU_DATA<42>
36 8 6
CPU_DATA<43>
36 8 6
CPU_DATA<44>
36 8 6
CPU_DATA<45>
36 8 6
CPU_DATA<46>
36 8 6
CPU_DATA<47>
SSCG
NO STUFF
NO_SSCG
NO STUFF
10K
10K
10K
10K
10K
10K
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
NO_SSCG
SSCG
R6481 R6771 R6231 R6511 R6491 R6781 R6791 R6841

10K
10K
10K
10K
10K
10K
10K
10K
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
PLL4MODESEL_NXT[2:0]
000: 166.4MHZ (2.5X)
001: 149.76MHZ
010: 133.12MHZ (2.0X)
011: 99.84MHZ (1.5X)
100: 83.20MHZ
MODE A (2.5X) IS FOR STATIC OPERATION
MODE C (2.0X) IS FOR CLOCK SLEW OPERATION
PCI0 Source Clock

0: PLL5 (no spread)
1: PLL4
BIT0
PCI1 Source Clock

0: PLL5 (no spread)
1: PLL4
BIT1
InternalSpreadEn
0: Inactive
1: Active
Spare
Spare
BIT2
MAXBUS_SLEEP
38 33 16 15 8 7 6 5
BIT 48 TO 55
CPU_CI_L
36 5
CPU_GBL_L
A29
36 5
CPU_TBST_L
A28
36 5
CPU_TSIZ<0>
G24
36 5
CPU_TSIZ<1>
H24
36 5
CPU_TSIZ<2>
D26
36 5
CPU_TT<0>
E25
36 5
CPU_TT<1>
G25
36 5
CPU_TT<2>
B28
36 5
CPU_TT<3>
D27
36 5
CPU_TT<4>
36 5
CPU_WT_L
CPU_AACK_L
36 8 5
CPU_ARTRY_L
36 8 5
CPU_HIT_L
36 8 5
CPU_QREQ_L
A32
QREQ
36 5
CPU_QACK_L
G27
QACK
SUSPENDREQ
SUSPENDACK
10K
10K
10K
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
FB BUFFER HAS 50 OHM OUTPUT IMPEDANCE

35 8
CPU_DATA<49>
36 8 6
CPU_DATA<50>
36 8 6
CPU_DATA<51>
36 8 6
CPU_DATA<52>
35 8
R169
INT_CPUFB_IN
J24
INT_CPUFB_OUT
H16
1%
1/16W
MF
402 2
CPU_DATA<53>
36 8 6
CPU_DATA<54>
29
AH9
CPU_CLK_EN
NO BUS KEEPER - ?
36 8 6
CPU_DATA<55>
NO_SSCG
1
NO_SSCG
1
NO STUFF
1
NO STUFF
1
R681 R680 R654 R655 R625 R624 R683
H13
10K
10K
10K
10K
10K
10K
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
BIT1
BIT0
35
J15
SYSCLK_CPU_UF
NO BUS KEEPER - ?
CPU_CLK
NO BUS KEEPER - PU
NO BUS KEEPER - PU
R161
A31
CPU_TBEN
6 36
CPU_DATA<5>
6 36
A9
CPU_DATA<6>
6 36
A8
CPU_DATA<7>
6 36
E12
CPU_DATA<8>
6 36
D11
CPU_DATA<9>
6 36
B10
CPU_DATA<10>
6 36
J13
CPU_DATA<11>
6 36
A10
CPU_DATA<12>
6 36
D12
CPU_DATA<13>
6 36
E13
CPU_DATA<14>
6 36
G13
CPU_DATA<15>
6 36
B11
CPU_DATA<16>
6 36
D13
CPU_DATA<17>
6 36
A11
CPU_DATA<18>
6 36
G14
CPU_DATA<19>
6 36
H14
CPU_DATA<20>
6 36
E14
CPU_DATA<21>
6 36
B12
CPU_DATA<22>
6 36
G15
CPU_DATA<23>
6 36
B13
CPU_DATA<24>
6 36
H15
CPU_DATA<25>
6 36
D14
CPU_DATA<26>
6 36
B14
CPU_DATA<27>
6 36
A12
36 8 5
CPU_DATA<28>
6 36
CPU_DATA<29>
6 36
E15
CPU_DATA<30>
6 36
J16
CPU_DATA<31>
6 36
D15
CPU_DATA<32>
6 8 36
A14
CPU_DATA<33>
6 8 36
A13
CPU_DATA<34>
6 8 36
D16
CPU_DATA<35>
6 8 36
E16
CPU_DATA<36>
6 8 36
G17
CPU_DATA<37>
6 8 36
B15
CPU_DATA<38>
6 8 36
H17
CPU_DATA<39>
6 8 36
A15
CPU_DATA<40>
6 8 36
B16
CPU_DATA<41>
6 8 36
E17
CPU_DATA<42>
6 8 36
A16
CPU_DATA<43>
6 8 36
J18
CPU_DATA<44>
6 8 36
H18
CPU_DATA<45>
6 8 36
D17
CPU_DATA<46>
6 8 36
G18
CPU_DATA<47>
6 8 36
A17
CPU_DATA<48>
6 8 36
B17
CPU_DATA<49>
6 8 36
E18
CPU_DATA<50>
6 8 36
B18
CPU_DATA<51>
6 8 36
D18
CPU_DATA<52>
6 8 36
A18
CPU_DATA<53>
6 8 36
A19
CPU_DATA<54>
6 8 36
H19
CPU_DATA<55>
6 8 36
B19
CPU_DATA<56>
6 8 36
J19
CPU_DATA<57>
6 8 36
A20
CPU_DATA<58>
6 8 36
D19
CPU_DATA<59>
6 8 36
E19
CPU_DATA<60>
6 8 36
G19
CPU_DATA<61>
6 8 36
B20
CPU_DATA<62>
6 8 36
G20
CPU_DATA<63>
6 8 36
5 8 36
DRDY
G28 CPU_DRDY_L
5 8 36
DTI_0
DTI_1
DTI_2
K25 CPU_DTI<0>
D29 CPU_DTI<1>
36 8 5
TA
TEA
TBEN
NO BUS KEEPER - PU
1K
INT_CPUFB_OUT
101: 40 ohm
RP2
2
CPU_AACK_L
CPU_DBG_L
10K
5%
1/16W
SM1
5%
1/16W
MF
402
36 8 5
10K
RP3
3
CPU_BG_L
10K
5%
1/16W
SM1
R151
CPU_QREQ_L
10K
5%
1/16W
MF
402
INTREPID BOOT STRAPS

38 33 16 15 8 7 6 5
MAXBUS_SLEEP
BIT 56 TO 63
NO STUFF
NO STUFF
NO STUFF
NO STUFF
NO STUFF
R6691 R6451 R6971 R6701 R6441 R6461
36 8 6
CPU_DATA<56>
36 8 6
CPU_DATA<57>
36 8 6
CPU_DATA<58>
36 8 6
CPU_DATA<59>
36 8 6
CPU_DATA<60>
36 8 6
CPU_DATA<61>
36 8 6
CPU_DATA<62>
36 8 6
CPU_DATA<63>
10K
10K
10K
10K
10K
10K
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
B
NO STUFF
R6561 R6851 R6571 R6281 R6821 R6581 R6271 R6291

10K
10K
10K
10K
10K
10K
10K
10K
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5 36
5 8 36
5 8 36
LONG = 1" LONGER THAN MATCHED LENGTH

NO STUFF
R140
35
INT_CPUFB_OUT_SHORT
INT_CPUFB_OUT_NORM
R1461
5%
1/16W
MF
402 2
010: 100 ohm
5%
1/16W
MF
402 2
R147
0
35
INT_CPUFB_IN_NORM
5%
1/16W
MF
402
000: 200 ohm
35

INT_CPUFB_LONG

INT_CPUFB_IN
5%
1/16W
MF
402
R1411
110: 66.6 ohm
NO STUFF
R136
1
SIZE
APPLE COMPUTER INC.
5%
1/16W
MF
402
R128
35
5%
1/16W
MF
402
NO STUFF
001: 50 ohm
Intrepid MaxBus
5%
1/16W
MF
402
011: 33.3 ohm
35 8
10K
H25
R155
100: 200 ohm
10K
5%
1/16W
SM1
R150
36 8 5
VSSA_7
(PLL6)
SHORT = 1" SHORTER THAN MATCHED LENGTH
35 8
RP2
3
CPU_TEA_L
5%
1/16W
SM1
36 8 5
10K
5%
1/16W
SM1
RP2
5 36
E27 CPU_TA_L
E28 CPU_TEA_L
10K
CPU_DRDY_L
36 8 5
5 36
B30 CPU_DTI<2>
RP2
5%
1/16W
MF
402
36 8 5
A30 CPU_DBG_L
DBG
D
1
CPU_HIT_L
R152
36 8 5
G16
10K
CPU_BR_L
1%
1/16W
MF
402 2
111: 28.6 ohm
CPU_DATA<4>
B8
INTREPID OUTPUTS HIGH BY DEFAULT
Spare
TI 1394b workaround
0: Normal 1394b
1: TI PHY workaround
OBSOLETE (Should remain high)

En_PCI_ROM_P
0: BootROM on IDE/CardSlot
1: BootROM on PCI1
BIT2
R626
10K
5%
1/16W
MF
402 2
SelPLL4ExtSrc
0: PLL5
1: External source
10K
MaxBus output impedance
ACS_REF
NO BUS KEEPER - ?
5%
1/16W
MF
402
5%
1/16W
MF
402 2
BUF_REF_CLK_OUTEnable_h
0: Inactive
1: Active
SYSCLK_CPU
B9
10K
5%
1/16W
SM1
5%
1/16W
SM1
STOPCPUCLK
R168
35 5
NO BUS KEEPER - PU
INPUT - PU
INTREPID_ACS_REF
36 8 6
Vin = Intrepid Vcore (1.5V)

Vout = MaxBus rail (1.8V)
CPU_FB_IN
CPU_FB_OUT
G8
ANALYZER_CLK
SYSCLK_LA_TP
511
CPU_DATA<48>
36 8 6
INT_SUSPEND_ACK_L
AM8
6 36
PCI1_REQ2_L / PCI1_GNT2_L
0: REQ/GNT
1: GPIOs
10K
5%
1/16W
MF
402 2
AK9
NO BUS KEEPER - ?
CPU_DATA<3>
CPU_ARTRY_L
OBSOLETE
ROM_Ovrly_Rng
0: 0 IDE / 1 PCI1
1: 0-1 IDE / 2-3 PCI1
10K
5%
1/16W
MF
402 2
INT_SUSPEND_REQ_L
INPUT - PD
H11
RP3
1
CPU_TA_L
RP3
36 8 5
Spare
10K
5%
1/16W
MF
402 2
AACK NO BUS KEEPER - PU

H23
ARTRY NO BUS KEEPER - PU
B31
INPUT - PU
HIT
6 36
Spare
36 8 6
10K
CI
GBL
TBST
TSIZ_0
TSIZ_1
TSIZ_2
TT_0
TT_1
TT_2
TT_3
TT_4
WT
B29
36 8 5
29
5%
1/16W
MF
402 2
MAXBUS
INTERFACE
6 36
CPU_DATA<2>
5 6 7 8 15 16 33 38
5%
1/16W
SM1
Processor Bus Mode

0: Max Bus (G4)
1: 60x bus (G3)
NO STUFF
CRITCAL
6 36
CPU_DATA<1>
E11
10K
CPU_TS_L
FireWire PHY interface

0: Legacy interface
1: B-mode interface
NO STUFF
A_0
A_1
A_2
A_3
A_4
A_5
A_6
A_7
A_8
A_9
A_10
A_11
A_12
A_13
A_14
A_15
A_16
A_17
A_18
A_19
A_20
A_21
A_22
A_23
A_24
A_25
A_26
A_27
A_28
A_29
A_30
A_31
36 8 5
0: REQ/GNT
1: GPIOs
NO STUFF
J25
D28
(1 OF 9)
CPU_DATA<0>
G12
MAXBUS_SLEEP
RP3
0: REQ/GNT
1: GPIOs
SSCG
R6961 R6951 R6671 R6681 R6431 R6421 R6981
G26
36 5
29
SSCG
D_0
D_1
D_2
D_3
D_4
D_5
D_6
D_7
D_8
D_9
D_10
D_11
D_12
D_13
D_14
D_15
D_16
D_17
D_18
D_19
D_20
D_21
D_22
D_23
D_24
D_25
D_26
D_27
D_28
D_29
D_30
D_31
D_32
D_33
D_34
D_35
D_36
D_37
D_38
D_39
D_40
D_41
D_42
D_43
D_44
D_45
D_46
D_47
D_48
D_49
D_50
D_51
D_52
D_53
D_54
D_55
D_56
D_57
D_58
D_59
D_60
D_61
D_62
D_63
BR INPUT
INTREPID-REV2.1
BG NO BUS KEEPER
BGA
D10
MAXBUS PULL-UPS
D47 - SELAGPSPREADCLK - SLEEP/WAKE CYCLE REQUIRED

D46 - SELPCI1SPREADCLK - SLEEP/WAKE CYCLE REQUIRED
D44 - PLL4MODESEL_NXT<0> - SLEEP/WAKE CYCLE REQUIRED
D33 - ANALYZERCLK_EN_H - IMMEDIATE EFFECT
A STRAP IS NOT LISTED, THEN
CANNOT BE CHANGED BY SOFTWARE
36 8 5
U51
36 8 5
36 8 6
1/
2/
3/
4/
5/
6/
IF
IT
+1_5V_INTREPID_PLL7
5%
1/16W
MF
402
C187 1
BIT 32 TO 39
NO STUFF
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6338
8
1
OF
40
SERIES RESISTORS FOR CLOCK/CONTROL SIGNALS

35 9
35 9
SYSCLK_DDRCLK_A1_L_UF
22
22
MEM_DATA<1>
AK33
35 10
MEM_DATA<2>
AK31
35 10
MEM_DATA<3>
AK35
35 10
MEM_DATA<4>
AK36
35 10
MEM_DATA<5>
AJ32
35 10
MEM_DATA<6>
AJ35
35 10
MEM_DATA<7>
AJ36
35 10
MEM_DATA<8>
AG33
MEM_DATA<9>
AG35
35 10
MEM_DATA<10>
AH35
35 10
MEM_DATA<11>
AG36
35 10
MEM_DATA<12>
AH36
35 10
MEM_DATA<13>
AH32
35 10
MEM_DATA<14>
AG32
35 10
MEM_DATA<15>
AG31
35 10
MEM_DATA<16>
AE32
35 10
MEM_DATA<17>
AF35
35 10
MEM_DATA<18>
AF36
35 10
MEM_DATA<19>
AE36
35 10
MEM_DATA<20>
AE35
35 10
MEM_DATA<21>
AE33
35 10
MEM_DATA<22>
AD36
35 10
MEM_DATA<23>
AD35
35 10
MEM_DATA<24>
AA36
35 10
MEM_DATA<25>
AA35
35 10
MEM_DATA<26>
AA33
35 10
MEM_DATA<27>
AB36
35 10
MEM_DATA<28>
AB35
35 10
MEM_DATA<29>
AC36
35 10
MEM_DATA<30>
AA32
35 10
MEM_DATA<31>
AB33
35 10
MEM_DATA<32>
V36
35 10
MEM_DATA<33>
U33
35 10
MEM_DATA<34>
U32
35 10
MEM_DATA<35>
V35
35 10
MEM_DATA<36>
T30
35 10
MEM_DATA<37>
U36
35 10
MEM_DATA<38>
U35
35 10
MEM_DATA<39>
T36
35 10
MEM_DATA<40>
P33
35 10
MEM_DATA<41>
R30
35 10
MEM_DATA<42>
P35
35 10
MEM_DATA<43>
P36
35 10
MEM_DATA<44>
R36
35 10
MEM_DATA<45>
R35
35 10
MEM_DATA<46>
R33
35 10
MEM_DATA<47>
R32
35 10
MEM_DATA<48>
N35
35 10
MEM_DATA<49>
M36
35 10
MEM_DATA<50>
L35
35 10
35 10
MEM_DATA<51>
M35
35 10
MEM_DATA<52>
M33
35 10
MEM_DATA<53>
L36
35 10
MEM_DATA<54>
N33
35 10
MEM_DATA<55>
M30
35 10
MEM_DATA<56>
J32
35 10
MEM_DATA<57>
J33
35 10
MEM_DATA<58>
J35
35 10
MEM_DATA<59>
K32
35 10
MEM_DATA<60>
K33
35 10
MEM_DATA<61>
J36
35 10
MEM_DATA<62>
K36
MEM_DATA<63>
K35
35 10
DDR_DATA_0
DDR_DATA_1
DDR_DATA_2
DDR_DATA_3
DDR_DATA_4INTREPID-REV2.1
BGA
(2 OF 9)
DDR_DATA_5
CRITICAL
DDR_DATA_6
DDR_DATA_7
DDR_DATA_8
DDR_DATA_9
DDR_DATA_10
DDR_DATA_11
DDR_DATA_12
DDR_DATA_13
DDR_DATA_14
DDR_DATA_15
DDRCS_0
DDR_DATA_16
DDRCS_1
DDR_DATA_17
DDRCS_2
DDR_DATA_18
DDRCS_3
DDR
DDR_DATA_19
DDR_DQS_0
MEMORY
DDR_DATA_20
INTERFACE
DDR_DQS_1
DDR_DATA_21
DDR_DQS_2
DDR_DATA_22
DDR_DQS_3
DDR_DATA_23
DDR_DQS_4
DDR_DATA_24
DDR_DQS_5
DDR_DATA_25
DDR_DQS_6
DDR_DATA_26
DDR_DQS_7
DDR_DATA_27
DDR_DATA_28
DDR_DM_0
DDR_DM_1
DDR_DATA_29
DDR_DM_2
DDR_DATA_30
DDR_DATA_31
DDR_DM_3
DDR_DATA_32
DDR_DM_4
DDR_DATA_33
DDR_DM_5
DDR_DATA_34
DDR_DM_6
DDR_DATA_35
DDR_DM_7
DDR_DATA_36
DDRRAS
DDR_DATA_37
DDRCAS
DDR_DATA_38
DDRWE
DDR_DATA_39
DDRCKE0
DDR_DATA_40
DDRCKE1
DDR_DATA_41
DDRCKE2
DDR_DATA_42
DDRCKE3
DDR_DATA_43
DDR_DATA_44
DDR_SELHI_0
DDR_DATA_45
DDR_SELHI_1
DDR_DATA_46
DDR_SELLO_0
DDR_DATA_47
DDR_SELLO_1
DDR_DATA_48
DDR_MCLK_0_P
DDR_DATA_49
DDR_MCLK_0_N
DDR_DATA_50
DDR_MCLK_1_P
DDR_DATA_51
DDR_MCLK_1_N
DDR_DATA_52
DDR_MCLK_2_P
DDR_DATA_53
DDR_MCLK_2_N
DDR_DATA_54
DDR_MCLK_3_P
DDR_DATA_55
DDR_MCLK_3_N
DDR_DATA_56
DDR_MCLK_4_P
DDR_DATA_57
DDR_MCLK_4_N
DDR_DATA_58
DDR_MCLK_5_P
DDR_DATA_59
DDR_MCLK_5_N
DDR_DATA_60
DDR_DATA_61
DDR_REF
DDR_DATA_62
DDR_VREF_0
DDR_DATA_63
DDR_VREF_1
U51
MEM_ADDR<0>
9 35
G35
MEM_ADDR<1>
9 35
G36
MEM_ADDR<2>
9 35
F36
MEM_ADDR<3>
9 35
F35
MEM_ADDR<4>
9 35
E35
MEM_ADDR<5>
9 35
E36
MEM_ADDR<6>
9 35
G32
MEM_ADDR<7>
9 35
D36
MEM_ADDR<8>
9 35
H36
MEM_ADDR<9>
9 35
G33
MEM_ADDR<10>
9 35
H33
MEM_ADDR<11>
9 35
D35
MEM_ADDR<12>
9 35
L30
MEM_BA<0>
9 35
M29
MEM_BA<1>
9 35
AN34
MEM_CS_L<0>
9 35
AN36
MEM_CS_L<1>
9 35
AL35
MEM_CS_L<2>
9 35
AL33
MEM_CS_L<3>
9 35
MEM_DQS<0>
MEM_DQS<1>
10 35
AD32
MEM_DQS<2>
10 35
AB30
MEM_DQS<3>
V30
P32
N29
L32
10 35
MEM_DQS<5>
10 35
MEM_DQS<7>
35 9
35 9
MEM_DQM<0>
10 35
MEM_DQM<1>
10 35
AD33
MEM_DQM<2>
10 35
AC35
MEM_DQM<3>
10 35
T35
MEM_DQM<4>
10 35
T33
MEM_DQM<5>
10 35
MEM_DQM<6>
MEM_DQM<7>
35 9
9 35
H32
MEM_CAS_L
9 35
MEM_WE_L
9 35
MEM_CKE<0>
9 35
AM35
MEM_CKE<1>
9 35
AM36
MEM_CKE<2>
9 35
MEM_CKE<3>
9 35
AL36
0 & 1 GO TO SLOT A
2 & 3 GO TO SLOT B
35 9
MEM_MUXSEL_MSB_L_TP
AE29
MEM_MUXSEL_MSB
N30
MEM_MUXSEL_LSB_L_TP
T32
MEM_MUXSEL_LSB
10 35
35 9
35 9
0 & 1 GO TO SLOT A
2 & 3 GO TO SLOT B
9 35
9 35
35 9
SYSCLK_DDRCLK_B0_UF
9 35
SYSCLK_DDRCLK_B0_L_UF
9 35
V33
SYSCLK_DDRCLK_B1_UF
9 35
9 35
INT_DDRCLK5_P_TP
W36
INT_DDRCLK5_N_TP
AA22
INT_MEM_REF_H
Y22
35 9
38
T22
22
22
R209
35 9
MEM_ADDR<9>
1K
MEM_VREF
35 9
35 9
MEM_ADDR<11>
R208
35 9
35 9
9 38
35 9
10K
1%
1/16W
MF
402 2
35 9
MEM_WE_L
22
22
15
39 37 24 18 17 12
PCI_AD<7>
14
39 37 24 18 17 12
PCI_AD<8>
39 37 24 18 17 12
PCI_AD<9>
39 37 24 18 17 12
PCI_AD<10>
36
39 37 24 18 17 12
PCI_AD<11>
39 37 24 18 17 12
PCI_AD<12>
39 37 24 18 17 12
PCI_AD<13>
PCI_AD<14>
PCI_AD<15>
RAM_ADDR<2>
R112
10K
5%
1/16W
MF
402 2
R674
1
ROM_CS_L
1K
37 24 18 17 12
39
37 24 18 17 12
39
37 24 18 17 12
39
37 24 18 17 12
39
37 24 18 17 12
39
37 24 18 17 12
39
5%
1/16W
MF
402
PCI_AD<16>
PCI_AD<17>
40
PCI_AD<18>
13
PCI_AD<19>
37
PCI_AD<20>
38
ROM_ONBOARD_CS_L
22
39 24 12
ROM_OE_L
24
39 24 12
ROM_RW_L
39 24
29 13
11 35
ROM_WP_L
12
INT_RESET_L
10
12 17 18 24 37 39
PCI_AD<26>
12 17 18 24 37 39
28
PCI_AD<27>
12 17 18 24 37 39
32
PCI_AD<28>
12 17 18 24 37 39
33
PCI_AD<29>
12 17 18 24 37 39
34
PCI_AD<30>
12 17 18 24 37 39
35
PCI_AD<31>
12 17 18 24 37 39
CE
OE
WE
WP
PWD
GND
23
11 35
RAM_ADDR<4>
39
11 35
RAM_ADDR<5>
11 35
RAM_ADDR<6>
11 35
RAM_ADDR<7>
11 35
RAM_ADDR<8>
11 35
RAM_ADDR<9>
11 35
RAM_ADDR<10>
11 35
RAM_ADDR<11>
11 35
Weak pulldowns ensure CKEs stay low

after 2.5V I/O to Intrepid shuts off.
RAM_ADDR<12> 11
35
22
35 11 9
RAM_CKE<0>
35 11 9
RAM_CKE<1>
35 11 9
RAM_CKE<2>
35 11 9
RAM_CKE<3>
INT_2_5V_COLD
11 35
R257
R247
10K
10K
RAM_BA<1>
11 35
INT_2_5V_COLD
1
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
INT_2_5V_COLD
1
R260
INT_2_5V_COLD
1
R265
10K
10K
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
RAM_WE_L
22
5%
1/16W
MF
402
INT - DDR/BOOTROM
A

11 35

RAM_CAS_L
11 35
RAM_RAS_L
11 35
SIZE
APPLE COMPUTER INC.
5%
1/16W
MF
402
PCI_AD<6>
5%
1/16W
SM1
MEM_CAS_L
MEM_RAS_L
39 37 24 18 17 12
R162
R176
35 9
5%
1/16W
SM1
35 9
16
5%
1/16W
MF
2 402
11 35
RAM_BA<0>
RP17
20%
10V
CERM 2
402
39 37 24 18 17 12
PCI_AD<5>
10K
11 35
5%
1/16W
SM1
0.1uF
RAM_ADDR<0>
RP17
MEM_BA<1>
C249 1
CNTL
R2021
22
22
5%
1/16W
SM1
BA
INT_MEM_VREF
22
9 11 35
RP9
3
MEM_BA<0>
RP17
1%
1/16W
MF
402 2
22
MEM_ADDR<12>
10K
PCI_AD<4>
R691
5%
1/16W
SM1
5%
1/16W
SM1
39 37 24 18 17 12
17
12 17 18 24 37 39
PCI_AD<25>
27
RP14
1
18
PCI_AD<24>
26
5%
1/16W
SM1
MEM_ADDR<10>
+2_5V_INTREPID
22
22
RP17
38 16 15 10
PCI_AD<3>
25
RP9
5%
1/16W
SM1
1%
1/16W
MF
2 402
39 37 24 18 17 12
OVERRIDE ROM MODULE

INTERCEPTS ROM CHIP SELECT
22
19
5%
1/16W
SM1
RP14
1
20
PCI_AD<2>
U11
FEPR-1MX8
1MX8-3.3V
TSOP
DQ0
A0
DQ1
A1
DQ2
A2
DQ3
A3
DQ4
A4
DQ5
A5
DQ6
A6
DQ7
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
RP9
MEM_ADDR<8>
35 9
PCI_AD<1>
39 37 24 18 17 12
31
VCC
5%
1/16W
SM1
5%
1/16W
SM1
INT_MEM_VREF 9 38
39 37 24 18 17 12
37 24 18 17 12
39
39 24 12
22
21
30
RP12
PCI_AD<0>
9 11 35
RAM_ADDR<3>
MEM_ADDR<6>
MEM_ADDR<7>
RAM_CKE<2>
RP14
35 9
39 37 24 18 17 12
+3V_MAIN
5%
1/16W
SM1
5%
1/16W
SM1
35 9
9 11 35
RP12
22
22
9 11 35
RAM_ADDR<1>
RAM_CKE<0>
5%
1/16W
SM1
MEM_ADDR<4>
MEM_ADDR<5>
22
22
RP9
W33
11 35
RP14
5%
1/16W
SM1
35 9
W32
W35
MEM_ADDR<3>
11 35
RAM_CKE<3>
RP12
9 35
MEM_ADDR<2>
RAM_CS_L<2>
5%
1/16W
SM1
10 35
RAM_CKE<1>
5%
1/16W
SM1
35 9
0.1uF
11 35
5%
1/16W
SM1
RP12
0S ARE SAME POLARITY (ACTIVE-LO)

1S ARE SAME POLARITY (ACTIVE-HI)
C122
20%
2 10V
CERM
402
11
RP29
22
22
0.1uF
VPP
22
22
C773
20%
2 10V
CERM
402
11 35
RAM_CS_L<3>
MEM_ADDR<0>
MEM_ADDR<1>
RAM_CS_L<0>
RP31
5%
1/16W
SM1
SYSCLK_DDRCLK_A1_UF
V32
MEM_CKE<3>
MEM_CKE<2>
35
5%
1/16W
SM1
5%
1/16W
SM1
35 9
INT_DDRCLK2_N_TP
22
22
11 35
RP29
SYSCLK_DDRCLK_B0
RAM_CS_L<1>
RP29
Y35
W30
MEM_CKE<0>
MEM_CKE<1>
C125
20%
2 10V
CERM
805
5%
1/16W
SM1
RP31
35 9
Y33
INT_DDRCLK2_P_TP
22
5%
1/16W
SM1
35 9
35
2.2uF
SYSCLK_DDRCLK_B0_L 11
11 35
RP31
MEM_CS_L<2>
MEM_CS_L<3>
22
5%
1/16W
SM1
35 9
5%
1/16W
SM1
RP29
9 35
Y30
22
SYSCLK_DDRCLK_B1
SYSCLK_DDRCLK_B1_L 11
RP31
35 9
SYSCLK_DDRCLK_A0_UF
Y36
22
MEM_CS_L<0>
MEM_CS_L<1>
RP22
5%
1/16W
SM1
35 9
AB32
Y32
1MB BOOT ROM
35
5%
1/16W
SM1
10 35
MEM_RAS_L
K30
22
SYSCLK_DDRCLK_B0_UF
11 35
RP20
RP22
35 9
SYSCLK_DDRCLK_A0
+3V_MAIN
5%
1/16W
SM1
10 35
L29
AN35
22
SYSCLK_DDRCLK_A0_L 11
10 35
AH33
L33
22
SYSCLK_DDRCLK_B1_UF
10 35
AJ33
N32
22
10 35
MEM_DQS<4>
MEM_DQS<6>
11 35
5%
1/16W
SM1
RP20
10 35
AH31
5%
1/16W
SM1
35 9
AJ31
11 35
SYSCLK_DDRCLK_A1_L
RP22
35 9
SYSCLK_DDRCLK_A1
RP22
SYSCLK_DDRCLK_A0_UF
CS
35 10
DDR_A_0
DDR_A_1
DDR_A_2
DDR_A_3
DDR_A_4
DDR_A_5
DDR_A_6
DDR_A_7
DDR_A_8
DDR_A_9
DDR_A_10
DDR_A_11
DDR_A_12
DDR_BA_0
DDR_BA_1
CKE
AK32
ADDR
35 10
MEM_DATA<0>
CLOCKS
35 9
5%
1/16W
SM1
5%
1/16W
SM1
H35
RP20
4
SYSCLK_DDRCLK_A1_UF
RP20
PINS ARE SWAPABLE FOR RPAKS
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6338 C
9
1
OF
40
DB7*
35 11
RAM_DQS_B<0>
H10
35 11
RAM_DQM_B<0>
F10
DB8*
DB9*
35 11
RAM_DATA_B<8>
D10
DB10*
35 11
RAM_DATA_B<9>
B10
35 11
RAM_DATA_B<10>
DB11*
DB12*
RAM_DATA_B<11>
B7
35 11
RAM_DATA_B<12>
A6
35 11
RAM_DATA_B<13>
A4
35 11
35 11
RAM_DATA_B<14>
A3
DB16*
DB17*
35 11
RAM_DATA_B<15>
A1
35 11
RAM_DQS_B<1>
C1
DB18*
35 11
RAM_DQM_B<1>
E1
DB19*
35 11
RAM_DATA_A<0>
35 11
RAM_DATA_A<1>
35 11
RAM_DATA_A<2>
35 11
RAM_DATA_A<3>
35 11
RAM_DATA_A<4>
35 11
RAM_DATA_A<5>
35 11
RAM_DATA_A<6>
35 11
RAM_DATA_A<7>
F1 DA0
H1 DA1
K1 DA2
K3 DA3
K4 DA4
K6 DA5
J7 DA6
K9 DA7
35 11
RAM_DQS_A<0>
35 11
RAM_DQM_A<0>
J10 DA8
G10 DA9
35 11
RAM_DATA_A<8>
E10 DA10
11 35
11 35
11 35
DA17 A2
RAM_DATA_A<15>
11 35
RAM_DQM_A<1>
MEM_DATA<0>
DA11 C10
RAM_DATA_A<25>
11 35
DB1*
DA12 A10
RAM_DATA_A<26>
11 35
35 11
RAM_DATA_B<18>
DA13 A8
RAM_DATA_A<27>
J4
35 11
RAM_DATA_B<20>
K5
35 11
RAM_DATA_B<21>
K7
35 11
RAM_DATA_B<22>
RAM_DATA_B<23>
K10
35 11
RAM_DQS_B<2>
H10
35 11
RAM_DQM_B<2>
11 35
CBTV4020
DA14
BGA
A5
DA15
DA16 B4
DB4*
DB5*
DA17 A2
DB6*
DA18 B1
DA19 D1
DB7*
DB8*
RAM_DATA_B<24>
D10
35 11
RAM_DATA_B<25>
B10
DB10*
DB11*
35 11
RAM_DATA_B<26>
A9
DB12*
9 35
35 11
RAM_DATA_B<27>
B7
MEM_DATA<2>
9 35
35 11
RAM_DATA_B<28>
A6
RAM_DATA_A<28>
MEM_DATA<3>
9 35
35 11
RAM_DATA_B<29>
MEM_DATA<4>
9 35
35 11
RAM_DATA_B<30>
A3
DB15*
DB16*
DH5 J6
MEM_DATA<5>
9 35
35 11
RAM_DATA_B<31>
A1
DB17*
11 35
RAM_DATA_A<30>
11 35
RAM_DQS_A<3>
11 35
RAM_DQM_A<3>
11 35
DH2 J2
DH3 J3
MEM_DATA<18>
MEM_DATA<19>
9 35
DH4 J5
MEM_DATA<20>
9 35
9 35
MEM_DATA<24>
MEM_DATA<8>
9 35
9 35
DH11 C9
35 11
RAM_DATA_A<16>
9 35
9 35
DH12 B9
DH13 B8
MEM_DATA<10>
9 35
35 11
RAM_DATA_A<17>
DH11 C9
DH12 B9
MEM_DATA<25>
MEM_DATA<9>
DH14 B6
DH15 B5
MEM_DATA<12>
MEM_DATA<13>
DH16 B3
MEM_DATA<14>
K4 DA4
K6 DA5
J7 DA6
K9 DA7
MEM_DQM<1>
9 35
35 11
RAM_DQS_A<2>
35 11
RAM_DQM_A<2>
J10 DA8
G10 DA9
35 11
RAM_DATA_A<24>
E10 DA10
MEM_MUXSEL_LSB
35 11
RAM_DATA_B<45>
A4
35 11
RAM_DATA_B<46>
A3
MEM_DQM<2>
MEM_DATA<26>
35 11
RAM_DATA_B<47>
9 35
35 11
RAM_DATA_A<32>
RAM_DATA_A<33>
DH13 B8
DH14 B6
MEM_DATA<27>
9 35
35 11
RAM_DATA_A<34>
MEM_DATA<28>
9 35
35 11
RAM_DATA_A<35>
DH15 B5
MEM_DATA<29>
9 35
35 11
RAM_DATA_A<36>
DH16 B3
DH17 B2
MEM_DATA<30>
MEM_DATA<31>
9 35
35 11
RAM_DATA_A<38>
DH18 C2
MEM_DQS<3>
9 35
35 11
RAM_DATA_A<39>
DH19 E2
SEL E3
MEM_DQM<3>
MEM_MUXSEL_LSB
9 35
9 35
35 11
RAM_DATA_A<37>
C5
35 11
RAM_DATA_B<48>
G1
DB0*
11 35
35 11
RAM_DATA_B<49>
J1
K2
DB1*
DB2*
J7 DA6
K9 DA7
RAM_DQS_A<4>
35 11
RAM_DQM_A<4>
J10 DA8
G10 DA9
35 11
RAM_DATA_A<40>
E10 DA10
11 35
35 11
RAM_DATA_B<51>
J4
RAM_DATA_A<45>
11 35
35 11
RAM_DATA_B<52>
K5
DB5*
DB6*
DB7*
11 35
35 11
RAM_DATA_B<53>
11 35
35 11
RAM_DATA_B<54>
K8
DA18 B1
RAM_DQS_A<5>
11 35
35 11
RAM_DATA_B<55>
K10
35 11
RAM_DQS_B<6>
H10
DB8*
35 11
RAM_DQM_B<6>
F10
35 11
RAM_DATA_B<56>
D10
DB9*
DB10*
RAM_DQM_A<5>
11 35
MEM_DATA<32>
9 35
DH1 H2
MEM_DATA<33>
9 35
MEM_DATA<34>
9 35
MEM_DATA<35>
9 35
DH4 J5
DH5 J6
MEM_DATA<36>
9 35
MEM_DATA<37>
9 35
DH6 J8
MEM_DATA<38>
9 35
11 35
RAM_DATA_A<58>
11 35
RAM_DATA_A<59>
11 35
RAM_DATA_A<60>
11 35
RAM_DATA_A<61>
11 35
RAM_DATA_A<62>
11 35
RAM_DATA_A<63>
11 35
DA18 B1
RAM_DQS_A<7>
11 35
DA19 D1
RAM_DQM_A<7>
11 35
DH0 F2
MEM_DATA<48>
9 35
DH1 H2
MEM_DATA<49>
9 35
DH2 J2
DH3 J3
MEM_DATA<50>
9 35
MEM_DATA<51>
9 35
MEM_DATA<52>
DB16*
DH4 J5
DH5 J6
9 35
MEM_DATA<53>
DB17*
DB18*
9 35
DH6 J8
MEM_DATA<54>
9 35
MEM_DATA<55>
9 35
RAM_DATA_B<57>
B10
DB11*
RAM_DATA_B<58>
A9
35 11
RAM_DATA_B<59>
B7
DB12*
DB13*
35 11
RAM_DATA_B<60>
A6
35 11
RAM_DATA_B<61>
A4
35 11
RAM_DATA_B<62>
A3
35 11
RAM_DATA_B<63>
35 11
RAM_DQS_B<7>
C1
35 11
RAM_DQM_B<7>
E1
A1
RAM_DATA_A<57>
DA12 A10
DA13 A8
DA16 B4
DA17 A2
35 11
35 11
DH0 F2
DA11 C10
CBTV4020
DA14 A7
BGA
DA15 A5
DB3*
DB4*
RAM_DATA_A<47>
DB14*
DB15*
DH7 J9
DH8 H9
MEM_DATA<39>
9 35
MEM_DQS<4>
9 35
DH7 J9
DH8 H9
MEM_DQS<6>
9 35
DH9 F9
MEM_DQM<4>
9 35
DH9 F9
MEM_DQM<6>
9 35
DH10 E9
DH11 C9
MEM_DATA<40>
9 35
MEM_DATA<56>
9 35
MEM_DATA<41>
9 35
DH10 E9
DH11 C9
MEM_DATA<57>
9 35
DH12 B9
MEM_DATA<42>
9 35
DH12 B9
MEM_DATA<58>
9 35
DH13 B8
DH14 B6
MEM_DATA<43>
9 35
DH13 B8
DH14 B6
MEM_DATA<59>
9 35
MEM_DATA<60>
9 35
DH15 B5
DH16 B3
MEM_DATA<45>
9 35
MEM_DATA<61>
9 35
MEM_DATA<46>
9 35
DH15 B5
DH16 B3
MEM_DATA<62>
9 35
DH17 B2
MEM_DATA<47>
9 35
DH17 B2
MEM_DATA<63>
DH18 C2
DH19 E2
MEM_DQS<7>
9 35
MEM_DQM<7>
9 35
DB19*
K4 DA4
K6 DA5
35 11
RAM_DATA_A<44>
U16
RAM_DATA_A<46>
DB17*
DB18*
K1 DA2
K3 DA3
11 35
RAM_DATA_B<50>
K7
DB16*
F1 DA0
H1 DA1
RAM_DATA_A<43>
DA16 B4
DA17 A2
DB14*
DB15*
35 11
F8
F3
E8
11 35
RAM_DATA_A<42>
DH2 J2
DH3 J3
9 35
35 11
RAM_DATA_A<41>
DA12 A10
DA13 A8
DA19 D1
DH18 C2
DH19 E2
SEL E3
MEM_DATA<44>
RAM_DATA_A<48>
35 11
RAM_DATA_A<49>
35 11
RAM_DATA_A<50>
35 11
RAM_DATA_A<51>
35 11
RAM_DATA_A<52>
35 11
RAM_DATA_A<53>
9 35
MEM_DQS<5>
9 35
MEM_DQM<5>
9 35
MEM_MUXSEL_MSB
35 11
9 10 35
35 11
RAM_DATA_A<54>
35 11
RAM_DATA_A<55>
DB19*
F1 DA0
H1 DA1
K1 DA2
K3 DA3
K4 DA4
K6 DA5
J7 DA6
K9 DA7
35 11
RAM_DQS_A<6>
35 11
RAM_DQM_A<6>
J10 DA8
G10 DA9
35 11
RAM_DATA_A<56>
E10 DA10
SEL E3
MEM_MUXSEL_MSB
9 35
9 10 35
9 10 35
9 10 35
H6
H5
A1
E1
DH10
K1 DA2
K3 DA3
A6
RAM_DQM_B<5>
E9
F1 DA0
H1 DA1
RAM_DATA_B<44>
35 11
35 11
9 35
DH19 E2
D10
C1
MEM_DQM<0>
RAM_DATA_A<23>
RAM_DATA_B<40>
RAM_DQS_B<5>
DH9 F9
DH10 E9
RAM_DATA_A<22>
35 11
DB9*
DB10*
35 11
9 35
35 11
35 11
F10
9 35
9 35
35 11
DB8*
RAM_DQM_B<4>
MEM_DATA<22>
9 35
MEM_DQS<2>
9 35
RAM_DQS_B<4>
MEM_DATA<21>
MEM_DATA<23>
9 35
35 11
H10
DH5 J6
DH6 J8
DH8 H9
DH9 F9
MEM_DQS<1>
K10
DB12*
DB13*
DH7 J9
DB18*
DB19*
MEM_DATA<15>
RAM_DATA_B<39>
DB11*
E1
DH17 B2
DH18 C2
35 11
DB6*
DB7*
B7
RAM_DQM_B<3>
RAM_DATA_A<21>
K8
A9
RAM_DQS_B<3>
35 11
DB5*
RAM_DATA_B<38>
B10
35 11
9 35
RAM_DATA_B<37>
35 11
RAM_DATA_B<42>
35 11
RAM_DATA_A<20>
35 11
K7
RAM_DATA_B<41>
9 35
35 11
K5
RAM_DATA_B<43>
9 35
35 11
RAM_DATA_B<36>
35 11
9 35
9 35
35 11
DA11 C10
CBTV4020
DA14 A7
BGA
DA15 A5
DB3*
DB4*
35 11
MEM_DQS<0>
9 35
J4
9 35
MEM_DATA<7>
RAM_DATA_A<19>
RAM_DATA_B<35>
9 35
MEM_DATA<6>
RAM_DATA_A<18>
35 11
U18
MEM_DATA<17>
DH8 H9
35 11
DB1*
DB2*
MEM_DATA<16>
C1
9 35
35 11
K2
11 35
DH6 J8
DH7 J9
MEM_DATA<11>
DB0*
J1
RAM_DATA_B<34>
35 11
DH0 F2
DH1 H2
DB13*
DB14*
A4
G1
RAM_DATA_B<33>
11 35
RAM_DATA_A<29>
RAM_DATA_A<31>
RAM_DATA_B<32>
35 11
11 35
DB9*
35 11
MEM_DATA<1>
A7
35 11
GND
GND
G9
G2
D9
F10
U27
DB2*
DB3*
DH3 J3
DH4 J5
SEL E3
D2
C6
K8
35 11
11 35
9 35
K2
RAM_DATA_B<19>
GND
C5
E8
DB0*
J1
35 11
RAM_DATA_A<14>
DH1 H2
DH2 J2
DB15*
RAM_DATA_A<12>
RAM_DATA_A<13>
DH0 F2
DB13*
DB14*
11 35
RAM_DQS_A<1>
G1
RAM_DATA_B<17>
GND
H6
RAM_DATA_B<7>
11 35
RAM_DATA_A<11>
DA15 A5
DA16 B4
DA18 B1
DA19 D1
RAM_DATA_B<16>
35 11
H5
35 11
K10
35 11
11 35
CRITICAL
G9
K8
RAM_DATA_A<9>
RAM_DATA_A<10>
D9
RAM_DATA_B<6>
0.1uF
20%
10V
2 CERM
402
D2
35 11
DB5*
DB6*
C732
C6
K7
0.1uF
20%
10V
2 CERM
402
C5
DB4*
RAM_DATA_B<5>
VDD
H6
RAM_DATA_B<4>
35 11
C733
CRITICAL
H5
35 11
K5
BGA
VDD
G9
J4
20%
10V
2 CERM
402
G2
RAM_DATA_B<3>
DA13 A8
DA14 A7
C741
0.1uF
20%
10V
2 CERM
402
CRITICAL
+2_5V_INTREPID
0.1uF
20%
10V
2 CERM
402
D9
35 11
U28
CBTV4020
DB2*
DB3*
0.1uF
C730
D2
K2
C758
C5
RAM_DATA_B<2>
0.1uF
VDD
DA11 C10
DA12 A10
DB0*
DB1*
C757
H6
35 11
38 16 15 10 9
20%
10V
2 CERM
402
0.1uF
H5
35 11
J1
C745
20%
2 10V
CERM
402
G9
G1
RAM_DATA_B<1>
0.1uF
CRITICAL
VDD
RAM_DATA_B<0>
C727
20%
2 10V
CERM
402
E8
E8
20%
2 10V
CERM
402
35 11
A9
C742
0.1uF
20%
2 10V
CERM
402
F8
0.1uF
20%
2 10V
CERM
402
F3
G2
0.1uF
C764
D9
D2
0.1uF
C734
C6
C726
20%
2 10V
CERM
402
BIT 48..63
+2_5V_INTREPID
F8
38 16 15 10 9
+2_5V_INTREPID
G2
38 16 15 10 9
F8
38
10 9 +2_5V_INTREPID
16 15
F3
BIT 32..47
BIT 16..31
BIT 0..15
F3
C6
SEL = LOW; HOST = B PORT; A PORT = 100OHM TO GND

SEL = HIGH; HOST = A PORT; B PORT = 100OHM TO GND
16BIT 2:1 DDR MUXES

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6338
OF
10 40
1
1A
DDR_VREF
3A
35 10
RAM_DATA_A<0>
5A
35 10
RAM_DATA_A<1>
7A
9A
35 10
RAM_DQS_A<0>
11A
35 10
RAM_DATA_A<2>
13A
15A
35 10
RAM_DATA_A<3>
17A
35 10
RAM_DATA_A<8>
19A
21A
35 10
RAM_DATA_A<9>
23A
35 10
RAM_DQS_A<1>
25A
27A
35 10
RAM_DATA_A<10>
29A
35 10
RAM_DATA_A<11>
31A
33A
35 9
SYSCLK_DDRCLK_A0
35A
35 9
SYSCLK_DDRCLK_A0_L
37A
39A
35 10
RAM_DATA_A<16>
41A
35 10
RAM_DATA_A<17>
43A
35 10
RAM_DQS_A<2>
47A
RAM_DATA_A<18>
49A
45A
35 10
51A
35 10
RAM_DATA_A<19>
53A
35 10
RAM_DATA_A<24>
55A
57A
35 10
RAM_DATA_A<25>
35 10
RAM_DQS_A<3>
59A
61A
63A
35 10
RAM_DATA_A<26>
65A
35 10
RAM_DATA_A<27>
67A
69A
71A
NC
73A
NC
75A
SLOT "A"
LOWER SLOT
FACTORY SLOT
35 9
77A
NC
79A
NC
81A
83A
NC
85A
NC
87A
89A
NC
91A
NC
93A
95A
RAM_CKE<1>
97A
NC
99A
35 11 9
RAM_ADDR<12>
35 11 9
RAM_ADDR<9>
101A
35 11 9
RAM_ADDR<7>
105A
35 11 9
RAM_ADDR<5>
107A
35 11 9
RAM_ADDR<3>
109A
RAM_ADDR<1>
111A
103A
35 11 9
113A
35 11 9
RAM_ADDR<10>
115A
35 11 9
RAM_BA<0>
117A
35 11 9
RAM_WE_L
119A
RAM_CS_L<0>
121A
35 9
123A
NC
125A
35 10
RAM_DATA_A<32>
127A
35 10
RAM_DATA_A<33>
129A
131A
35 10
RAM_DQS_A<4>
133A
35 10
RAM_DATA_A<34>
135A
137A
35 10
RAM_DATA_A<35>
139A
35 10
RAM_DATA_A<40>
141A
143A
35 10
RAM_DATA_A<41>
145A
35 10
RAM_DQS_A<5>
147A
149A
35 10
RAM_DATA_A<42>
151A
35 10
RAM_DATA_A<43>
153A
155A
157A
159A
161A
35 10
RAM_DATA_A<48>
163A
35 10
RAM_DATA_A<49>
165A
167A
35 10
RAM_DQS_A<6>
169A
35 10
RAM_DATA_A<50>
171A
173A
35 10
RAM_DATA_A<51>
175A
35 10
RAM_DATA_A<56>
177A
179A
35 10
RAM_DATA_A<57>
181A
35 10
RAM_DQS_A<7>
183A
35 10
RAM_DATA_A<58>
187A
RAM_DATA_A<59>
189A
185A
+3V_MAIN
35 10
191A
39 23 13 11 6
INT_I2C_DATA0
193A
39 23 13 11 6
INT_I2C_CLK0
195A
197A
NC
199A
VREF0
CRITICAL
VSS0
DQ0
DQ1
J25
F-RT-SM
(2 OF 2)
VDD0
DQS0
DQ2
VSS2
DQ3
DQ8
VDD2
DQ9
DQS1
VSS4
DQ10
VREF1
VSS1
DQ4
DQ5
VDD1
DM0
DQ6
VSS3
DQ7
DQ12
VDD3
DQ13
DM1
VSS5
DQ14
DQ11
DQ15
VDD4
CK0
VDD5
VDD6
CK0*
VSS6
VSS7
VSS8
KEY
DQ16
DQ17
DQ20
DQ21
VDD7
VDD8
DQS2
DQ18
DM2
DQ22
VSS9
DQ19
VSS10
DQ23
DQ24
DQ28
VDD9
DQ25
VDD10
DQ29
DQS3
DM3
VSS11
DQ26
DQ27
VSS12
DQ30
DQ31
VDD11
RFU0
VDD12
RFU1
RFU2
VSS13
RFU3
VSS14
RFU4
RFU6
VDD13
RFU8
RFU5
RFU7
VDD14
RFU9
RFU10
VSS15
RFU11
VSS16
RFU12
VSS17
RFU13
VDD16
VDD15
VDD17
CKE1
RFU14
CKE0
RFU15
A12
A9
VSS18
A11
A8
VSS19
A7
A6
A5
A3
A4
A2
A1
VDD18
A10_AP
A0
VDD19
BA1
BA0
WE*
RAS*
CAS*
S0*
S1*
RFU16
VSS20
DQ32
DQ33
VDD20
DQS4
DQ34
VSS22
DQ35
DQ40
VDD22
DQ41
DQS5
VSS24
DQ42
DQ43
VDD24
VDD26
VSS26
VSS27
DQ48
DQ49
VDD27
DQS6
DQ50
VSS29
DQ51
DQ56
RFU17
VSS21
DQ36
DQ37
VDD21
DM4
DQ38
VSS23
DQ39
DQ44
VDD23
DQ45
DM5
VSS25
DQ46
DQ47
VDD25
CK1*
CK1
VSS28
DQ52
DQ53
VDD28
DM6
DQ54
VSS30
DQ55
DQ60
VDD29
DQ57
VDD30
DQ61
DQS7
VSS31
DM7
VSS32
DQ58
DQ59
VDD31
DQ62
DQ63
VDD32
SDA
SA0
SCL
VDDSPD
SA1
SA2
RFU18
RFU19
+2_5V_MAIN
2A
DDR_VREF
11 38
38 11
3B
6A
RAM_DATA_A<4>
10 35
35 10
RAM_DATA_B<0>
5B
8A
RAM_DATA_A<5>
10 35
35 10
RAM_DATA_B<1>
7B
10A
9B
12A
RAM_DQM_A<0>
14A
10 35
RAM_DATA_A<6>
10 35
35 10
RAM_DQS_B<0>
11B
35 10
RAM_DATA_B<2>
13B
15B
16A
18A
RAM_DATA_A<7>
10 35
35 10
RAM_DATA_B<3>
17B
20A
RAM_DATA_A<12>
10 35
35 10
RAM_DATA_B<8>
19B
22A
21B
24A
RAM_DATA_A<13>
26A
RAM_DQM_A<1>
10 35
10 35
35 10
RAM_DATA_B<9>
23B
35 10
RAM_DQS_B<1>
25B
28A
27B
30A
RAM_DATA_A<14>
10 35
35 10
RAM_DATA_B<10>
29B
32A
RAM_DATA_A<15>
10 35
35 10
RAM_DATA_B<11>
31B
34A
33B
36A
38A
35 9
SYSCLK_DDRCLK_B0
35B
35 9
SYSCLK_DDRCLK_B0_L
37B
40A
39B
42A
RAM_DATA_A<20>
10 35
35 10
RAM_DATA_B<16>
41B
44A
RAM_DATA_A<21>
10 35
35 10
RAM_DATA_B<17>
43B
35 10
RAM_DQS_B<2>
47B
RAM_DATA_B<18>
49B
46A
45B
48A
RAM_DQM_A<2>
50A
10 35
RAM_DATA_A<22>
35 10
10 35
52A
51B
54A
RAM_DATA_A<23>
10 35
35 10
RAM_DATA_B<19>
53B
56A
RAM_DATA_A<28>
10 35
35 10
RAM_DATA_B<24>
55B
58A
57B
60A
RAM_DATA_A<29>
62A
RAM_DQM_A<3>
10 35
10 35
35 10
RAM_DATA_B<25>
35 10
RAM_DQS_B<3>
59B
61B
64A
63B
66A
RAM_DATA_A<30>
10 35
35 10
RAM_DATA_B<26>
65B
68A
RAM_DATA_A<31>
10 35
35 10
RAM_DATA_B<27>
67B
70A
69B
72A
71B
74A
NC
NC
NC
NC
73B
76A
78A
NC
80A
NC
SLOT "B"
UPPER SLOT
CUSTOMER SLOT
82A
84A
NC
86A
NC
88A
90A
92A
75B
77B
NC
79B
NC
81B
83B
NC
85B
NC
87B
89B
NC
91B
NC
94A
93B
96A
RAM_CKE<0>
98A
9 35
35 9
95B
RAM_CKE<3>
NC
97B
NC
100A
RAM_ADDR<11>
9 11 35
35 11 9
RAM_ADDR<12>
102A
RAM_ADDR<8>
9 11 35
35 11 9
99B
RAM_ADDR<9>
101B
104A
103B
106A
RAM_ADDR<6>
9 11 35
35 11 9
RAM_ADDR<7>
105B
108A
RAM_ADDR<4>
9 11 35
35 11 9
RAM_ADDR<5>
107B
110A
RAM_ADDR<2>
9 11 35
35 11 9
RAM_ADDR<3>
109B
RAM_ADDR<1>
111B
112A
RAM_ADDR<0>
9 11 35
35 11 9
114A
113B
116A
RAM_BA<1>
9 11 35
35 11 9
RAM_ADDR<10>
115B
118A
RAM_RAS_L
9 11 35
35 11 9
RAM_BA<0>
117B
120A
RAM_CAS_L
9 11 35
35 11 9
RAM_WE_L
119B
122A
RAM_CS_L<1>
RAM_CS_L<2>
121B
124A
9 35
35 9
123B
NC
NC
126A
125B
128A
RAM_DATA_A<36>
10 35
35 10
RAM_DATA_B<32>
127B
130A
RAM_DATA_A<37>
10 35
35 10
RAM_DATA_B<33>
129B
132A
131B
134A
RAM_DQM_A<4>
136A
RAM_DATA_A<38>
10 35
10 35
35 10
RAM_DQS_B<4>
133B
35 10
RAM_DATA_B<34>
135B
138A
137B
140A
RAM_DATA_A<39>
10 35
35 10
RAM_DATA_B<35>
139B
142A
RAM_DATA_A<44>
10 35
35 10
RAM_DATA_B<40>
141B
144A
143B
146A
RAM_DATA_A<45>
148A
RAM_DQM_A<5>
10 35
10 35
35 10
RAM_DATA_B<41>
145B
35 10
RAM_DQS_B<5>
147B
150A
149B
152A
RAM_DATA_A<46>
10 35
35 10
RAM_DATA_B<42>
151B
154A
RAM_DATA_A<47>
10 35
35 10
RAM_DATA_B<43>
153B
156A
155B
158A
SYSCLK_DDRCLK_A1_L
160A
SYSCLK_DDRCLK_A1
157B
9 35
159B
9 35
162A
161B
164A
RAM_DATA_A<52>
10 35
35 10
RAM_DATA_B<48>
163B
166A
RAM_DATA_A<53>
10 35
35 10
RAM_DATA_B<49>
165B
168A
167B
170A
RAM_DQM_A<6>
172A
RAM_DATA_A<54>
10 35
10 35
35 10
RAM_DQS_B<6>
169B
35 10
RAM_DATA_B<50>
171B
174A
173B
176A
RAM_DATA_A<55>
10 35
35 10
RAM_DATA_B<51>
175B
178A
RAM_DATA_A<60>
10 35
35 10
RAM_DATA_B<56>
177B
180A
179B
182A
RAM_DATA_A<61>
184A
RAM_DQM_A<7>
10 35
10 35
35 10
RAM_DATA_B<57>
181B
35 10
RAM_DQS_B<7>
183B
35 10
RAM_DATA_B<58>
187B
RAM_DATA_B<59>
189B
186A
185B
188A
RAM_DATA_A<62>
190A
RAM_DATA_A<63>
10 35
10 35
+3V_MAIN
35 10
192A
191B
194A
196A
198A
200A
ADDR=0XA0(WR)/0XA1(RD)
39 23 13 11 6
INT_I2C_DATA0
193B
39 23 13 11 6
INT_I2C_CLK0
195B
197B
NC
NC
199B
VREF0
VSS0
CRITICAL
J25
DQ0
DQ1
F-RT-SM
(1 OF 2)
VDD0
DQS0
DQ2
VSS2
DQ3
DQ8
VDD2
DQ9
DQS1
VSS4
DQ10
VREF1
VSS1
DQ4
DQ5
VDD1
DM0
DQ6
VSS3
DQ7
DQ12
VDD3
DQ13
DM1
VSS5
DQ14
DQ11
DQ15
VDD4
CK0
VDD5
VDD6
CK0*
VSS6
VSS7
VSS8
KEY
DQ16
DQ17
DQ20
DQ21
VDD7
VDD8
DQS2
DQ18
DM2
DQ22
VSS10
DQ23
VSS9
DQ19
DQ24
DQ28
VDD9
DQ25
VDD10
DQ29
DQS3
DM3
VSS12
DQ30
VSS11
DQ26
DQ31
DQ27
VDD11
RFU0
VDD12
RFU1
RFU2
VSS13
RFU3
VSS14
RFU4
RFU5
RFU6
VDD13
RFU7
VDD14
RFU8
RFU9
RFU10
VSS15
RFU11
VSS16
RFU12
VSS17
RFU13
VDD16
VDD15
VDD17
CKE1
RFU14
CKE0
RFU15
A12
A11
A9
VSS18
A8
VSS19
A7
A6
A5
A3
A4
A2
A0
A1
VDD18
A10_AP
VDD19
BA1
BA0
WE*
RAS*
CAS*
S0*
S1*
RFU16
VSS20
RFU17
VSS21
DQ32
DQ36
DQ33
VDD20
DQ37
VDD21
DM4
DQS4
DQ34
VSS22
DQ38
VSS23
DQ35
DQ40
DQ39
DQ44
VDD22
VDD23
DQ41
DQS5
DQ45
DM5
VSS24
VSS25
DQ46
DQ47
DQ42
DQ43
VDD25
VDD24
CK1*
CK1
VDD26
VSS26
VSS28
DQ52
VSS27
DQ48
DQ49
DQ53
VDD27
DQS6
VDD28
DM6
DQ50
DQ54
VSS29
DQ51
VSS30
DQ55
DQ56
DQ60
VDD29
DQ57
VDD30
DQ61
DQS7
VSS31
DM7
VSS32
DQ62
DQ58
DQ59
VDD31
DQ63
VDD32
SDA
SA0
SCL
VDDSPD
SA1
SA2
RFU18
+2_5V_MAIN
NC 401
1B
DDR_VREF
4A
+2_5V_MAIN
NC 403
DDR-SO-DIMM-DUAL
38 11
7
+2_5V_MAIN
DDR-SO-DIMM-DUAL
RFU19
2B
DDR_VREF
11 38
4B
6B
RAM_DATA_B<4>
10 35
8B
RAM_DATA_B<5>
10 35
NOTE: The SODIMM connector footprint has a through-hole slot

on the PCB for additional mounting
10B
12B
RAM_DQM_B<0>
14B
10 35
RAM_DATA_B<6>
10 35
18B
RAM_DATA_B<7>
10 35
20B
RAM_DATA_B<12>
10 35
24B
RAM_DATA_B<13>
10 35
26B
RAM_DQM_B<1>
16B
+2_5V_MAIN
22B
ONE 0.1UF PER SLOT
R299
30B
RAM_DATA_B<14>
10 35
32B
RAM_DATA_B<15>
10 35
DDR VREF
10 35
28B
1K
1%
1/16W
MF
2 402
34B
36B
DDR_VREF
38B
40B
R303
1K
42B
RAM_DATA_B<20>
10 35
44B
RAM_DATA_B<21>
10 35
RAM_DQM_B<2>
50B
RAM_DATA_B<22>
10 35
54B
RAM_DATA_B<23>
10 35
56B
RAM_DATA_B<28>
10 35
0.1uF
1%
1/16W
MF
2 402
46B
48B
C397
20%
10V
2 CERM
402
0.1uF
20%
10V
2 CERM
402
10 35
52B
58B
60B
RAM_DATA_B<29>
62B
RAM_DQM_B<3>
10 35
10 35
64B
66B
RAM_DATA_B<30>
10 35
68B
RAM_DATA_B<31>
10 35
DDR BYPASS
SLOT "A"
70B
72B
NC
74B
NC
+2_5V_MAIN
76B
78B
NC
80B
NC
82B
1
84B
NC
86B
NC
C404
10uF
20%
2 6.3V
CERM
805
88B
90B
C128
10uF
92B
94B
1
96B
RAM_CKE<2>
98B
100B
RAM_ADDR<11>
9 11 35
102B
RAM_ADDR<8>
9 11 35
106B
RAM_ADDR<6>
9 11 35
108B
RAM_ADDR<4>
9 11 35
110B
RAM_ADDR<2>
9 11 35
112B
RAM_ADDR<0>
9 11 35
116B
RAM_BA<1>
9 11 35
118B
RAM_RAS_L
9 11 35
RAM_CAS_L
9 11 35
C169
0.1uF
9 35
20%
10V
2 CERM
402
NC
C391
0.1uF
20%
10V
2 CERM
402
C211
0.1uF
C356
0.1uF
20%
10V
2 CERM
402
C127
0.1uF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
104B
+2_5V_MAIN
114B
120B
122B
RAM_CS_L<3>
124B
SLOT "B"
1
9 35
C157
10uF
NC
20%
2 6.3V
CERM
805
126B
128B
RAM_DATA_B<36>
10 35
130B
RAM_DATA_B<37>
10 35
132B
1
134B
RAM_DQM_B<4>
136B
RAM_DATA_B<38>
10 35
140B
RAM_DATA_B<39>
10 35
142B
RAM_DATA_B<44>
10 35
146B
RAM_DATA_B<45>
10 35
148B
RAM_DQM_B<5>
C383
10uF
0.1uF
10 35
20%
2 10V
CERM
402
138B
C174
20%
6.3V
2 CERM
805
C150
0.1uF
20%
2 10V
CERM
402
C156
0.1uF
C132
0.1uF
20%
2 10V
CERM
402
C140
0.1uF
20%
2 10V
CERM
402
20%
2 10V
CERM
402
144B
10 35
150B
152B
RAM_DATA_B<46>
10 35
154B
RAM_DATA_B<47>
10 35
156B
158B
SYSCLK_DDRCLK_B1_L
160B
SYSCLK_DDRCLK_B1
9 35
9 35
162B
164B
RAM_DATA_B<52>
10 35
166B
RAM_DATA_B<53>
10 35
168B
170B
RAM_DQM_B<6>
172B
RAM_DATA_B<54>
10 35
176B
RAM_DATA_B<55>
10 35
178B
RAM_DATA_B<60>
10 35
182B
RAM_DATA_B<61>
10 35
184B
RAM_DQM_B<7>
10 35
174B
DDR SODIMM CONNS

A
180B
10 35

186B
188B
RAM_DATA_B<62>
10 35
190B
RAM_DATA_B<63>
10 35
+3V_MAIN
192B
194B
196B
198B
ADDR=0XA2(WR)/0XA3(RD)
200B
NC
SIZE
APPLE COMPUTER INC.
NC 402
20%
2 6.3V
CERM
805
DRAWING NUMBER
SHT
NONE
REV.
051-6338
SCALE
NC 404
11 38
C403
OF
11 40
1
1
AGP PULL-UPS/PULL DOWNS
R197
38 14 12 8
R167
38 14 12 8
NO STUFF
C362
5%
50V
CERM 2
402
12PF
5%
50V
CERM 2
402
33
22
NO STUFF
AR16
NEC_PCI_REQ_L
AT17
39 24
AIRPORT_PCI_GNT_L
AT16
18
CBUS_PCI_GNT_L
AN18
17
NEC_PCI_GNT_L
AN17
CLK33M_AIRPORT_UF
AR18
35
CLK33M_CBUS_UF
AH18
35
CLK33M_NEC_UF
AT18
35
INT_PCI_FB_OUT
AM18
35
INT_PCI_FB_IN
AJ19
39 37 24 18 17
R264
33
AR17
CBUS_PCI_REQ_L
17 12
35
5%
50V
CERM 2
402
AIRPORT_PCI_REQ_L
18 12
39 24 12
5%
1/16W
MF
402
12PF
5%
1/16W
MF
402
AT14
PCI_PAR
39 37 24 18 17 12
PCI_FRAME_L
AN16
39 37 24 18 17 12
PCI_TRDY_L
AT15
39 37 24 18 17 12
PCI_IRDY_L
AH16
39 37 24 18 17 12
PCI_STOP_L
AR15
PCI_DEVSEL_L
AM17
37 24 18 17 12
39
PCI FEEDBACK CLOCK MATCHES

LONGEST PCI CLOCK ROUTE
37
1
24 18 17
PCI_CBE<0>
AR14
R244
37 24 18 17
PCI_CBE<1>
AK16
47
37 24 18 17
PCI_CBE<2>
AM16
PCI_CBE<3>
AJ15
PLACE NEAR
INTREPID
37 24 18 17
R252
35 19
38
38 21 20 19 16 15 12
CLK66M_GPU_AGP
+1_5V_INTREPID_PLL5
38
+3V_GPU
5%
1/16W
MF
402
20%
6.3V
CERM 2
402
+1_5V_AGP
60.4
33
AK17
35
CLK66M_GPU_AGP_UF
12
INT_ROM_CS_L
AM9
12
INT_ROM_OE_L
AR7
12
INT_ROM_RW_L
AN9
5%
1/16W
MF
402
VDD15A_6
(PLL4)
PCIAD_0
PCIAD_1
PCIAD_2
PCIAD_3
PCI_GNT_0
PCIAD_4
PCI_GNT_1
INTREPID-REV2.1
PCIAD_5
BGA
PCI_GNT_2
(7 OF 9)
PCIAD_6
CRITICAL
PCI_CLK0
PCIAD_7
PCI_CLK1
PCIAD_8
PCI/ROM
PCI_CLK2
INTERFACE
PCIAD_9
PCI_CLK_OUT VOUT = 3.3V PCIAD_10
PCI_CLK_IN VIN = 1.5V
PCIAD_11
PCIAD_12
PCI_PAR
PCIAD_13
PCI_FRAME
PCIAD_14
PCI_TRDY
PCIAD_15
PCI_IRDY
PCIAD_16
PCI_STOP
PCIAD_17
PCI_DEVSEL
PCIAD_18
PCI_CBE_0
PCIAD_19
PCI_CBE_1
PCIAD_20
PCIAD_21
PCI_CBE_2
PCIAD_22
PCI_CBE_3
PCIAD_23
ROM_OVRLY_EN
PCIAD_24
ROM_CS
PCIAD_25
ROM_OE
PCIAD_26
ROM_WE
PCIAD_27
PCIAD_28
PCIAD_29
PCIAD_30
PCIAD_31
(PLL4)
VSSA_6
PCI_REQ_0
PCI_REQ_1
PCI_REQ_2
U51
AM10
PCI_AD<0>
9 17 18 24 37 39
AR8
PCI_AD<1>
9 17 18 24 37 39
AK12
PCI_AD<2>
9 17 18 24 37 39
AJ8
PCI_AD<3>
9 17 18 24 37 39
PCI_AD<4>
9 17 18 24 37 39
AT8
PCI_AD<5>
9 17 18 24 37 39
AN11
PCI_AD<6>
9 17 18 24 37 39
AH13
PCI_AD<7>
9 17 18 24 37 39
AK13
PCI_AD<8>
9 17 18 24 37 39
AR9
PCI_AD<9>
9 17 18 24 37 39
AR10
PCI_AD<10>
9 17 18 24 37 39
AT9
PCI_AD<11>
9 17 18 24 37 39
AR11
PCI_AD<12>
9 17 18 24 37 39
AM12
PCI_AD<13>
9 17 18 24 37 39
AN12
PCI_AD<14>
9 17 18 24 37 39
AK11
PCI_AD<15>
9 17 18 24 37 39
AT11
PCI_AD<16>
9 17 18 24 37 39
AT10
PCI_AD<17>
9 17 18 24 37 39
AN13
PCI_AD<18>
9 17 18 24 37 39
AM13
PCI_AD<19>
9 17 18 24 37 39
AR12
PCI_AD<20>
9 17 18 24 37 39
AJ11
PCI_AD<21>
17 18 24 37 39
AT12
PCI_AD<22>
17 18 24 37 39
AM11
PCI_AD<23>
17 18 24 37 39
AR13
PCI_AD<24>
9 17 18 24 37 39
AK15
PCI_AD<25>
9 17 18 24 37 39
AH15
PCI_AD<26>
9 17 18 24 37 39
AN14
PCI_AD<27>
9 17 18 24 37 39
AT13
PCI_AD<28>
9 17 18 24 37 39
AK14
PCI_AD<29>
9 17 18 24 37 39
AN15
PCI_AD<30>
9 17 18 24 37 39
AM15
PCI_AD<31>
9 17 18 24 37 39
12
STOP_AGP_L
U51
AN19
R246
AGPCBE_0
AGPCBE_1
AGPCBE_2
AGPCBE_3
AGP_REQ_L
12 19 37
AGP_GNT_L
12 19 37
AGP_AD<0>
19 37
AGP_AD<1>
19 37
AGP_AD<2>
19 37
AGP_AD<3>
19 37
AGP_AD<4>
19 37
AGP_AD<5>
19 37
AGP_AD<6>
19 37
AGP_AD<7>
19 37
AGP_AD<8>
19 37
AGP_AD<9>
19 37
AGP_AD<10>
19 37
AGP_AD<11>
37 19 12
19 37
AGP_AD<13>
19 37
AGP_AD<14>
19 37
AGP_AD<15>
19 37
AGP_AD<16>
19 37
AGP_AD<17>
19 37
AGP_AD<18>
19 37
AGP_AD<19>
19 37
AGP_AD<20>
19 37
AGP_AD<21>
19 37
AGP_AD<22>
19 37
AGP_AD<23>
19 37
AGP_AD<24>
19 37
AGP_AD<25>
19 37
AGP_AD<26>
19 37
AGP_AD<27>
19 37
AGP_AD<28>
19 37
AGP_AD<29>
19 37
AGP_AD<30>
19 37
19 37
AGP_CBE<0>
19 37
AT23
AGP_CBE<1>
19 37
AN24
AGP_CBE<2>
19 37
AL25
AGP_CBE<3>
19 37
(PLACE CLOSE TO INTREPID AGP BALLS)

38 21 20 19 16 15 12
+3V_SLEEP
+1_5V_AGP
RP33
39 37 24 18 17 12
PCI_FRAME_L
10K
39 37 24 18 17 12
PCI_IRDY_L
10K
10K
1%
1/16W
MF
402 2
INT_AGP_VREF
1
39 37 24 18 17 12
PCI_TRDY_L
PCI_STOP_L
10K
10K
10K
12 19 37
AGP_TRDY_L
12 19 37
AGP_IRDY_L
12 19 37
AGP_STOP_L
12 19 37
AGP_DEVSEL_L
12 19 37
AGP_SBA<0>
19 37
AR32
AGP_SBA<1>
19 37
AM31
AGP_SBA<2>
19 37
AN31
AGP_SBA<3>
19 37
AR31
AGP_SBA<4>
19 37
AT31
AGP_SBA<5>
19 37
AM30
AGP_SBA<6>
19 37
AN30
AGP_SBA<7>
20%
2 6.3V
CERM
402
19 37
AGP_SB_STB_P AH25
AGP_SB_STB_N AG25
AGP_SB_STB
12 19 37
37 19 12
AGP_SB_STB_L
12 19 37
AGP_ST<0>
19
AGP_ST<1>
19
SIMPLY PROVIDING REFERENCE TO CHIP

BECAUSE SINGLE AGP PWR PLANE AND CLOSE PROXIMITY OF CHIPS
19 12
AGP_WBF_L
AK30
AGP_AD_STB0_P
AGP_AD_STB0_N
AGP_AD_STB1_P
AGP_AD_STB1_N
AGP_WBF
SERIES RESISTORS FOR BOOTROM CONTROL SIGNALS
+3V_MAIN
10K
VSSA_5
(PLL5)
PLACE CLOSE TO INTREPID SIDE
AGPPIPE
AGPRBF
AGP_ST<2>
19
AK20
AGP_AD_STB<0>
12 19 37
AK19
AGP_AD_STB_L<0>
12 19 37
AK21
AGP_AD_STB<1>
12 19 37
AK22
AGP_AD_STB_L<1>
12 19 37
AJ29
AGP_PIPE_L
12
AK24
AGP_RBF_L
12 19 37
INT_ROM_CS_L
22
5%
1/16W
MF
402
12
INT_ROM_OE_L
NEC USB2 REQ REMAINS ON +3V_MAIN

BECAUSE THIS CHIP IS POWERED DURING SLEEP
INT_ROM_RW_L
22
10K
37 19 12
R552
1
AGP_RBF_L
AGP_WBF_L
10K
R314
1
10K
R255
R239
10K
5%
1/16W
MF
402
R253
AGP_AD_STB_L<0>
10K
5%
1/16W
MF
402
37 19 12
R256
1
AGP_AD_STB_L<1>
R235
37 19 12
AGP_SB_STB_L
10K
10K
5%
1/16W
MF
402
5%
1/16W
MF
402
INTREPID AGP/PCI
ROM_CS_L
9 24 39

22
ROM_OE_L
9 24 39
5%
1/16W
MF
402

ROM_RW_L
SIZE
9 24 39
APPLE COMPUTER INC.
DRAWING NUMBER
REV.
051-6338
SHT
NONE
5%
1/16W
MF
402
SCALE
10K
AGP_AD_STB<1>
AGP_SB_STB
5%
1/16W
MF
402
37 19 12
10K
5%
1/16W
MF
402
R254
1
AGP_PIPE_L
AGP_AD_STB<0>
10K
5%
1/16W
MF
402
5%
1/16W
SM1
12
5%
1/16W
SM1
RP34
19 12
V13
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
R282
R278
12
RP34
2
AGP_TRDY_L
AGP_STOP_L
10K
10K
5%
1/16W
MF
402
R316
37 19 12
R277
12
R317
1
AGP_DEVSEL_L
AGP_IRDY_L
5%
1/16W
SM1
5%
1/16W
SM1
10K
AGP_FRAME_L
RP34
37 19 12
37 19 12
AGP_ST0 AN29
AGP_ST1 AT30
AGP_ST2 AR30
RP33
3
NEC_PCI_REQ_L
0.22uF
5%
1/16W
SM1
5%
1/16W
SM1
17 12
C291
RP33
1
AIRPORT_PCI_REQ_L
CBUS_PCI_REQ_L
1%
1/16W
MF
402 2
RP36
18 12
10K
4.99K
5%
1/16W
SM1
5%
1/16W
SM1
39 24 12
R219
RP36
RP36
39 37 24 18 17 12
12 19 38
5%
1/16W
SM1
AGP_FRAME_L
AT32
AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7
4.99K
5%
1/16W
SM1
RP36
39 37 24 18 17 12
R225
RP33
PCI_DEVSEL_L
19 37
10K
5%
1/16W
MF
402
5%
1/16W
MF
402
37 19 12
5%
1/16W
SM1
AGP_PAR
R553
1
R318
37 19 12
AGP_AD<31>
AGP_GNT_L
19 37
AM20
AGPPAR AT29
AGPFRAME AN28
AGPTRDY AR29
AGPIRDY AT28
AGPSTOP AM28
AGPDEVSEL AM27
10K
AGP_REQ_L
5%
1/16W
SM1
37 19 12
AGP_AD<12>
12 15 16 19 20 21 38
RP34
37 19 12
37 19 12
PCI PULL-UPS
+1_5V_AGP
AJ24
AGP I/O REFERENCE
5%
1/16W
MF
402
5%
1/16W
MF
402
VDD15A_5
(PLL5)
INT_AGPPVT
J10
10K
STOP_AGP_L
V14
STP_AGP INTREPID-REV2.1 AGPREQ AT33

BGA
AGPPVT
AGPGNT AM29
(3 OF 9)
AB20
38 19 12 INT_AGP_VREF
AGPVREF0
CRITICAL
AGPAD0 AR19
AB21
AGPVREF1
AGPAD1 AM19
AGPAD2 AT20
AT19
19 12 AGP_BUSY_L
AGPAD3 AR20
AGP_BUSY
CLK66M_AGP_1_5V_TP AK28 AGP_CLK
Vout = AGPIO (1.5V)
AGPAD4 AT21
AK27
35 INT_AGP_FB_IN
AGP_FB_IN Vin = Vcore (1.5V)
AGPAD5 AN20
35 INT_AGP_FB_OUT AK25 AGP_FB_OUT Vout = AGPIO (1.5V)
AGPAD6 AR21
0 2
AGPAD7 AN21
1
AGPAD8 AM21
5%
1/16W
AGPAD9 AT22
MF
402
AGPAD10 AR22
AGPAD11 AN22
AGP_FB_CLK IS ROUTED THE SAME LENGTH AS CLK66M_GPU_AGP
AGPAD12 AM22
AGP
AGPAD13 AN23
INTERFACES
AGPAD14 AR23
AGPAD15 AT24
AGPAD16 AM23
AGPAD17 AR24
AGPAD18 AT25
AGPAD19 AR25
AGPAD20 AM24
AGPAD21 AN25
AGPAD22 AL24
AGPAD23 AR26
AGPAD24 AT26
AGPAD25 AM25
AGPAD26 AN26
AGPAD27 AM26
AGPAD28 AR27
AGPAD29 AT27
AGPAD30 AR28
AGPAD31 AN27
12
AN10
10K
AGP_BUSY_L
R308
NOTE: Designs using AGP slot should

use 52-ohm a resistor here.
1%
1/16W
MF
2 402
19 20 21 38
R334
19 12
R245
R273
CLK33M_NEC
5%
1/16W
MF
2 402
0.22uF
5%
1/16W
MF
402
C311 1
+1_5V_INTREPID_PLL6
4.7
20%
6.3V
CERM 2
402
R230
1
CLK33M_CBUS
C372
C270 1
J11
NO STUFF
35 17
0.22uF
5%
1/16W
MF
402
12PF
35 18
33
CLK33M_AIRPORT
4.7
5%
1/16W
MF
402
C190 1
R272
39 35 24
+1_5V_INTREPID_PLL
+1_5V_INTREPID_PLL
OF
12
1
40
TEST PULL-UPS/DOWNS
ATA_D0
ATA_D1
INTREPID-REV2.1 ATA_D2
ATA_D3
BGA
(5 OF 9)
ATA_D4
CRITICAL
ATA_D5
ATA_D6
ATA_D7
ATA_D8
ATA_D9
ATA_D10
UATA100
ATA_D11
ATA_D12
ATA_D13
ATA_D14
ATA_D15
U51
UIDE_DATA<0>
24 37
T1
UIDE_DATA<1>
24 37
U1
UIDE_DATA<2>
24 37
U2
UIDE_DATA<3>
24 37
V4
UIDE_DATA<4>
24 37
V2
UIDE_DATA<5>
24 37
W1
UIDE_DATA<6>
24 37
V1
UIDE_DATA<7>
24 37
W8
UIDE_DATA<9>
24 37
W4
UIDE_DATA<10>
24 37
W5
UIDE_DATA<11>
24 37
Y2
UIDE_DATA<12>
24 37
Y1
UIDE_DATA<13>
24 37
W7
UIDE_DATA<14>
24 37
Y8
UIDE_DATA<15>
24 37
UDMA - STOP
UDMA - DEVICEDMARDY/DSTROBE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
CARDSLOT
NO_TEST=TRUE
NO_TEST=TRUE
CS_CE1
CS_CE2
CS_IORD
CS_IOWR
CS_OE
CS_WE
CS_WAIT
Y15
UIDE_ADDR<1>
24 37
UIDE_ADDR<2>
24 37
38
Y4
UIDE_RST_L
24 37
AA1
UIDE_DIOW_L
24 37
AA2
UIDE_DIOR_L
24 37
UIDE_IOCHRDY
UIDE_CS0_L
24 37
AB2
UIDE_CS1_L
24 37
UIDE_DMACK_L
AC2
37
37
82
HD_DMARQ
24 37
AB4
CSLOT_CE2_L_SPN
AB5
CSLOT_IORD_L_SPN
AD2
CSLOT_IOWR_L_SPN
AC4
CSLOT_OE_L_SPN
AE1
CSLOT_WE_L_SPN
82
HD_INTRQ
R232
10K
24 37
35 26
CLKENET_PHY_GTX
10
IDE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
IDEA0
IDEA1
IDEA2
IDEA3
IDEA4
IDEA5
IDEA6
IDEA7
IDEA8
IDEA9
24 37
AD4
EIDE_DATA<1>
24 37
AF1
EIDE_DATA<2>
24 37
EIDE_DATA<3>
24 37
AF2
EIDE_DATA<4>
24 37
AH1
EIDE_DATA<5>
24 37
AD5
EIDE_DATA<6>
24 37
AG2
EIDE_DATA<7>
24 37
AE4
EIDE_DATA<8>
24 37
AE5
EIDE_DATA<9>
24 37
AF4
EIDE_DATA<10>
24 37
AH2
EIDE_DATA<11>
24 37
AD7
EIDE_DATA<12>
24 37
AG4
EIDE_DATA<13>
24 37
AJ1
EIDE_DATA<14>
24 37
AJ2
EIDE_DATA<15>
24 37
AG1
AF5
EIDE_ADDR<0>
AE7
EIDE_ADDR<1>
24 37
EIDE_ADDR<2>
24 37
AK1
AG5
CSLOT_ADDR3_SPN
AH4
CSLOT_ADDR4_SPN
AL1
CSLOT_ADDR5_SPN
AK2
CSLOT_ADDR6_SPN
AH5
CSLOT_ADDR7_SPN
AF7
CSLOT_ADDR8_SPN
AG7
37 13
ENET_LINK_TXD<2>
D8
37 13
ENET_LINK_TXD<3>
A6
37 13
ENET_LINK_TXD<4>
B7
37 13
ENET_LINK_TXD<5>
G10
37 13
ENET_LINK_TXD<6>
D9
ENET_RX_DV
37 26
ENET_RX_ER
RX_CLK
RX_DV
D2
RX_ER
37 26
ENET_LINK_RXD<0>
D3
37 26
ENET_LINK_RXD<1>
E7
37 26
ENET_LINK_RXD<2>
D6
37 26
ENET_LINK_RXD<3>
B4
37 26
ENET_LINK_RXD<4>
A4
37 26
ENET_LINK_RXD<5>
D7
37 26
ENET_LINK_RXD<6>
37 26
ENET_LINK_RXD<7>
E8
CLKENET_LINK_GBE_REF
CLKENET_LINK_GTX
H12
ENET_CRS
E6
37 26
ENET_COL
C5
37 26
ENET_MDIO
B5
37 26
ENET_MDC
B6
PURESET
JTAG_ASIC_TDI
AK8
26 13
JTAG_ENET_TDI
AT5
39 26 13
JTAG_ASIC_TCK
AP5
39 26 13
JTAG_ASIC_TMS
AR5
39 26 13
JTAG_ASIC_TRST_L
AN6
39 13
INT_JTAG_TEI
AH10
39 13
INT_TST_MONIN_PD
39
39 13
INT_TST_MONOUT_TP
INT_TST_PLLEN_PD
24 37
AJ4
EIDE_RST_L
24 37
AM2
EIDE_WR_L
24 37
AL2
EIDE_RD_L
24 37
AG8
EIDE_DMACK_L
24 37
EIDE_DMARQ
24 37
GB ETHERNET
PHY_LPS
PHY_CTL0
PHY_CTL1
PHY_LREQ
FWR_PCLK
FIREWIRE
39 13
INT_RESET_L
T2
INT_PU_RESET_L
25 29
L4
FW_LINK_DATA<0>
27 37
M4
FW_LINK_DATA<1>
27 37
P7
FW_LINK_DATA<2>
27 37
N5
FW_LINK_DATA<3>
27 37
K1
FW_LINK_DATA<4>
27 37
K2
FW_LINK_DATA<5>
27 37
L2
FW_LINK_DATA<6>
27 37
N4
FW_LINK_DATA<7>
27 37
27
FW_LINK_CNTL<0>
27 37
L1
FW_LINK_CNTL<1>
M2
37
FW_LINK_LREQ
35
CLKFW_LINK_LCLK
CLKFW_LINK_PCLK
JTAG_ASIC_TRST_L
39 13
27 37
22
AK10
AR6
RP35
10K
FW_PHY_LREQ
39 13
27 37
INT_TST_MONIN_PD
1K
5%
1/16W
SM1
R259
5%
1/16W
SM1
INT_JTAG_TEI
5%
1/16W
MF
402
5%
1/16W
MF
402
R195
1
FW_PINT
1K
5%
1/16W
MF
402
27 35
27
10K
R263
39 26 13
27 37
FW_LKON
RP35
3
JTAG_ASIC_TCK
R186
FW_PHY_LPS
P5
FWR_LCLK U14
FW_LINKON N2
FW_PINT N1
22
CLKFW_PHY_LCLK
27 35
5%
1/16W
MF
402
I2C PULL-UPS
+3V_MAIN
RP32
TDI
TDO
TCK
TMS
TRSTN
TEI
TST_MONIN
TST_MONOUT
TST_PLLEN
AM7
5%
1/16W
MF
402
39 26 13
M1
T7
10K
INT_TST_PLLEN_PD
9 29
INT_I2C_CLK0
2.2K
39 23 13 11 6
TEST
AN2
IICCLK_0
IICDATA_0 AN1
INT_I2C_CLK0
6 11 13 23 39
INT_I2C_DATA0
6 11 13 23 39
IICCLK_1
IICDATA_1 AM3
INT_I2C_CLK1
13 14 25 39
INT_I2C_DATA1
13 14 25 39
RP32
1
INT_I2C_DATA0
2.2K
INT_I2C_CLK1
2.2K
5%
1/16W
SM1
RP32
39 25 14 13
AK5
5%
1/16W
SM1
5%
1/16W
SM1
39 25 14 13
RP32
3
INT_I2C_DATA1
2.2K
5%
1/16W
SM1
ENET_TXD SERIES TERMINATION

RP16
37 26
ENET_PHY_TXD<0>
22
37 26
ENET_LINK_TXD<0>
RP10
ENET_PHY_TXD<1>
22
ENET_LINK_TXD<2>
22
37 26
ENET_LINK_TXD<3>
13 37
ENET_LINK_TXD<4>
13 37
ENET_LINK_TXD<5>
13 37
5%
1/16W
SM1
5%
1/16W
SM1
24 37
22
13 37
RP16
ENET_PHY_TXD<5>
ENET_PHY_TXD<6>
13 37
5%
1/16W
SM1
RP16
37 26
22
5%
1/16W
SM1
37 26
A0-WR
A1-RD
A2-WR
A3-RD
AC-WR
AD-WR
AE-WR
AF-RD
84-WR
85-RD
5C-WR
5D-RD
6A-WR
6B-RD
D2-WR
D3-RD
RP10
ENET_PHY_TXD<3>
ENET_PHY_TXD<4>
ENET_LINK_TXD<1>
22
5%
1/16W
SM1
RP10
37 26
22
ENET_PHY_TXD<2>
BUS
13 37
ADDR
5%
1/16W
SM1
37 26
24 37
PHY_DATA0
PHY_DATA1
PHY_DATA2
PHY_DATA3
PHY_DATA4
PHY_DATA5
PHY_DATA6
PHY_DATA7
U5
39 23 13 11 6
39 13
RP10
EIDE_CS1_L
RESET
MISC
10pF
5%
2 50V
CERM
402
R270
RXD_0
RXD_1
RXD_2
RXD_3
RXD_4
RXD_5
RXD_6
RXD_7
GBE_REFCLK
GTX_CLK
CRS
COL
MDIO
MDC
G9
10K
5%
1/16W
MF
402
HW_PLL<BIT 0>
C4
L13
R269
2
JTAG_ENET_TDI
CRITICAL
5%
1/16W
SM1
EIDE_CS0_L
26 13
J12
CLKENET_LINK_RX
37 26
NOT USING CARDSLOT INTERFACE
24 37
EIDE_INT
E10
37 26
35
C847
BGA
(4 OF 9)
TXD_0
TXD_1
TXD_2
TXD_3
TXD_4
TXD_5
TXD_6
TXD_7
35 26
37 26
EIDE_IOCHRDY
AA7
ENET_LINK_TXD<7>
35 26
CSLOT_ADDR9_SPN
AH7
INTREPID-REV2.1
E9
24 37
IDECHRDY AK4
IDECS0 AB7
IDECS1 AM1
IDERST
IDEWR
IDERD
IDEDMACK
IDEDMARQ
IDEINTRQ
U51
A7
H10
5%
1/16W
MF
402
NO STUFF
Keep C847 stub short 1
5%
1/16W
MF
2 402
EIDE_DATA<0>
H9
TX_CLK
TX_EN
A5
TX_ER
ENET_LINK_TX_ER
ENET_LINK_TXD<1>
10K
JTAG_ASIC_TMS
5%
1/16W
SM1
5%
1/16W
SM1
ENET_LINK_TXD<0>
R160
CSLOT_IOWAIT_L_PU
AC5
39 26 13
37 13
24 37
CS_WAIT IS AN INPUT
IDEDD0
IDEDD1
IDEDD2
IDEDD3
IDEDD4
IDEDD5
IDEDD6
IDEDD7
IDEDD8
IDEDD9
IDEDD10
IDEDD11
IDEDD12
IDEDD13
IDEDD14
IDEDD15
JTAG_ASIC_TDI
ENET_LINK_TX_EN
37 13
R205
1
UIDE_INTRQ
CSLOT_CE1_L_SPN
AE2
37
5%
1/16W
MF
402
5%
1/16W
MF
+3V_MAIN 402
AD1
R224
UIDE_DMARQ
AA8
10
37
37 13
24 37
AA4
AC1
37
UIDE_REF
AA5
ENET_PHY_TX_ER
10K
RP35
5%
1/16W
MF
402
5%
1/16W
MF
402
24 37
UIDE_ADDR<0> 24
ENET_PHY_TX_EN
R149
37 26
UIDE_DATA<8>
ATA_A0
ATA_A1 AB1
ATA_A2 Y7
UDMA - HOSTDMARDY/HSTROBE
37 26
W2
Y5
ATA_VREF
ATA_RST
ATA_WR
ATA_RD
ATA_CHRDY
ATA_CS0
ATA_CS1
ATA_DMACK
ATA_DMARQ
ATA_INTRQ
39 13
R145
10
+3V_MAIN
RP35
CLKENET_LINK_TX
35 26
V5
ENET_LINK_TXD<6>
13 37
RP16
22
ENET_PHY_TXD<7>
ENET_LINK_TXD<7>
I2C-0
I2C-1
I2C-2
(MAIN)
(MAIN)
(SLEEP)
(SLEEP)
N/A
N/A
N/A
N/A
N/A
N/A
RAM - LOWER
J25 - PG 11
RAM - UPPER
J25 - PG 11
N/A
BOOTBANG EEPROM
U51 - PG 6
LMU
J3000 - PG 23
(LMU on RUX Brd.)
N/A
N/A
N/A
DASH MODEM
N/A
J14 - PG 25
PMU
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
SNAPPER SOUND
N/A
FAN CONTROLLER
U52 - PG 25
N/A
J2 - PG 25
CLOCK SLEW SSCG

U30 - PG 14
N/A
N/A
N/A
ADDR LSB INDICATES READ (1) OR WRITE (0) MODES
13 37
5%
1/16W
SM1
JTG_RSTN_L
TST_TEI_H
JTG_TDO_H
(I/O)
JTG_TDI_H
(I/O)
TST_PLLEN_H
ANALYZER_CLK
DESCRIPTION
JTAG MODE
NORMAL OPERATION
R207
1K
1%
1/16W
MF
2 402
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
EXTPLL
SHUTDOWN
(OUTPUT)
DDR_
TPDENABLE
(OUTPUT)
(OUTPUT)
HWPLL_
TESTSEL5
(INPUT)
0(I)
0(I)
0(I)
1(I)
1(I)
1(I)
0(I)
1(I)
0(I)
1(I)
1(I)
0(I)
0(I)
1(I)
0
1
(OUTPUT)
SELECTED
PLL OUTPUTS
VIEW PLLS (SOFTWARE)
SELECTED
PLL OUTPUTS
VIEW
ATPG
ATPG
TEST
MEMWE
0
1
0
1
X
SYNC/MEM DATA
BYPASS
X(I)
X(I)
X(I)
X(I)
X(I)
INT - ENET/FW/UATA
EIDE/I2C
PLLS (HARDWARE)
NORMAL
IDDQ
TRI-STATE
FUNCTIONAL
POSTSCALAR
FUNCTIONAL
POSTSCALAR

TEST WITHOUT
BYPASS
TEST WITH
BYPASS
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SHT
NONE
REV.
051-6338
SCALE
FUNCTIONAL TEST IDDQ
OF
13 40
1
-> 1.55V OUTPUT
0.22uF
AIRPORT_PCI_INT_L
NEC_PCI_INT_L
C386
14 17
+3V_MAIN
14
39 29 24 19 18 17
USB_PWREN_AB_L
MAIN_RESET_L
NO STUFF
INT_EXTINT14_PU
14
R288
5
COMM_RING_DET_L
14 25 29 39
14
PMU_INT_L
14 29
PMU_REQ_L
14 29
39 25 13
39 25 13
10K
14
RP6
10K
14
33 14
38
VCORE_VGATE
4
NC
NO STUFF
2
10K
10K
10K
5%
1/16W
MF
1 402
14
SSCG
2
25
SND_AMP_MUTE_L
L9
14
INT_GPIO9_PU
H4
SND_HW_RESET_L
J5
14
INT_GPIO12_PU
K8
14
INT_GPIO15_PU
F1
75
OPEN DRAIN OUTPUT
ODSEL INTERNAL
F33
E34
19
AGP_ATI_INT_L
C33
14
INT_EXTINT3_PU
D34
SND_LIN_SENSE_L
B33
CBUS_INT_L
G30
INT_EXTINT8_PU
D31
PMU_INT_NMI
C32
INT_EXTINT10_PU
B32
14
INT_EXTINT11_PU
E30
14
INT_EXTINT12_PU
J9
14
INT_EXTINT13_PU
F4
INT_EXTINT14_PU
D1
14
R142
38 33 14
VCORE_VGATE
29 14
14
5%
1/16W
MF
402
39 25
10K
INT_EXTINT12_PU
NO STUFF
14
J9
F-ST-SM
3
14
NO STUFF
1
INT_GPIO1_PU
5%
1/16W
SM1
USB_MODEM
INT_EXTINT3_PU
14 33
NO STUFF
1
R113
51
14
INT_MOD_DTO_UF
NO STUFF
5%
1/16W
MF
402
10M
5%
1/16W
MF
402
CRITICAL
14
18.432M
1
14
INT_MOD_DTI
5%
50V
CERM 2
402
14 25
USB_MODEM
RP15
10K
8 INT_MOD_SYNC_UF
R143
R206
5%
1/16W
MF
2 402
35 14
INT_MOD_BITCLK_UF
PART NUMBER
ALTERNATE FOR
PART NUMBER
197S0004
197S0035
R166
100K 2
1
BOM OPTION
C151
35
HWPLL_
TESTMUXSEL
5
4
3
2
1
0
22pF
5%
50V
2 CERM
402
REF DES
COMMENTS:
Y2
Alt. for Siward Part
TABLE_ALT_ITEM
SND_HW_RESET_L
5%
1/16W
MF
402
TABLE_ALT_HEAD
14
INT_REF_CLK_OUT
CRYSTAL LOAD CAPACITANCE IS 16PF

5%
1/16W
SM1
MPIC_CPU_INT_L
PMU_PME_L
D30
SYSTEM_CLK_EN
REQ*
SCK
INT_WATCHDOG_L
AT7
35
INT_REF_CLK_OUT_UF
U15
C246
0.1uF
20%
2 16V
CERM
402
20%
2 10V
CERM
402
INT_REF_CLK_IN
10uF
USB
MOD_DTO_B_H
MOD_SYNC_B_H
20%
2 6.3V
CERM
805
(SIGNAL FROM
CLOCKS
WATCHDOG
5%
1/16W
MF
402
RES
RES-0402-V2
29
BT_USB_DM
25 37 39
R175
15K
5%
1/16W
MF
2 402
29
USB_DBP
14
USB_DBM
14
J4
USB_PWREN_AB_L
14
K4
USB_OC_AB_L
14
USB_VD2_P H2
USB_VD2_N H1
USB_DCP
14
USB_DCM
14
M7
USB_DDP
14
USB_DDM
14
USB_DFM
22
5%
1/16W
MF
402
22
MODEM_USB_DP
25 37 39
MODEM_USB_DM
25 37 39
5%
1/16W
MF
402
R188
2
R189
15K
5%
1/16W
MF
402 2
R193
15K
5%
1/16W
MF
2 402
RP13
47
INT_I2S0_SND_TO_DAC
J2
USB_PWREN_CD_L
14
J1
USB_OC_CD_L
14
USB_VD4_P K5
USB_VD4_N L5
USB_DEP
14 37
USB_DEM
14 37
USB_VD5_P P8
USB_VD5_N N8
USB_DFP
14 37
USB_DFM
14 37
M5
USB_PWREN_EF_L
14
N7
USB_OC_EF_L
14
47
RP13
47
25 39
RP13
5%
1/16W
SM1
INT_I2S0_SND_LRCLK
25 39
INT_I2S0_SND_SCLK
25 39
5%
1/16W
SM1
RP13
5%
1/16W
SM1
47
INT_I2S0_SND_MCLK
25 35 39
5%
1/16W
SM1
SOFT_MODEM
AUD_DTO
AUD_DTI
AUD_SYNC
AUD_BITCLK
AUD_CLKOUT
R4
INT_I2S0_SND_TO_DAC_UF
R7
INT_I2S0_SND_FROM_ADC
T5
INT_I2S0_SND_LRCLK_UF
P2
INT_I2S0_SND_SCLK_UF
R5
INT_I2S0_SND_MCLK_UF
MOD_DTO
MODEM) MOD_DTI
MOD_SYNC
MOD_BITCLK
MOD_CLKOUT
R2
RP47
47
25 39
INT_MOD_DTO
25
INT_MOD_SYNC
25
INT_MOD_BITCLK
25
INT_MOD_CLKOUT
25
5%
SOFT_MODEM 1/16W
SM1
RP47
47
5%
1/16W
SM1 SOFT_MODEM
INT_MOD_DTO_UF
14 25
R1
14
INT_MOD_SYNC_UF
RP47
V8
14
INT_MOD_BITCLK_UF
P1
14
INT_MOD_CLKOUT_UF
SOFT_MODEM
RP47
BUF_REF_CLK_OUT
K9 SS_REF_CLK_IN
47
47
5%
1/16W
SM1
5%
1/16W
SM1
2
R258
1K
5%
1/16W
MF
1 402
R241
INT - USB/GPIOS/I2S
1K
5%
1/16W
MF
1 402
INT_I2C_CLK2 25

39

INT_I2C_DATA2
25 39

VALUE
VOLT.
WATT.
TOL.
BOM OPTION
APPLE COMPUTER INC.
RESISTOR
10K
1/16W
5%
R292
DRAWING NUMBER
SCALE
SHT
NO_SSCG
REV.
051-6338
NONE
25 37 39
R192
TABLE_11_HEAD
116S1104
5%
1/16W
MF
402 2
SIZE
DESCRIPTION
15K
USB_DFP
37 14
29
JTG_TDO_H
PACKAGE
R1781
14 29
USB_VD1_P G2
USB_VD1_N G1
IICCLK_2 AL4
IICDATA_2 AH8
29
37 14
INT_MOD_DTI
22
BT_USB_DP
PORT F/MODEM
25 39
14
T4
USB_DEM
25 39
14
14
22
25 39
AUDIO/I2S
25 39
MOD_DTI_B_H
DEVICE
10K
5%
1/16W
MF
402
R179
TABLE_11_HEAD
QTY
R180
2
25 39
USB_DAM
14 25 39
PART #
25 39
USB_DAP
USB_PRTPWR2
USB_PWRFLT2
5%
1/16W
MF
402
5%
1/16W
MF
402
USB_VD0_P L8
USB_VD0_N L7
USB_PRTPWR1
USB_PWRFLT1
SIGNAL NAME
MOD_CLKOUT_B_H
10K
USB_DEP
37 14
37 14
USB_VD3_P
USB_VD3_N M8
IIC
MOD_BITCLK_B_H
10K
R174
C256
+3V_SLEEP
35 14
R165
2
5%
1/16W
MF
402
U4
XTAL_IN
V15
XTAL_OUT
AN7
STOPXTAL
C235
0.01uF
USB_PRTPWR0
USB_PWRFLT0
EXTINT0
EXTINT1
EXTINT2
EXTINT3
EXTINT4
EXTINT5
EXTINT6
INTERRUPTS
EXTINT7
EXTINT8 POWERBOOK SPARE
EXTINT9
EXTINT10 CBUS_REG_L
EXTINT11 CBUS_IREQ_L
EXTINT12
EXTINT13
EXTINT14
EXTINT15
EXTINT16
EXTINT17
CPU_INT
AJ7
29
PORT E/BLUETOOTH
PMU_FROM_INT
SCCTXDB
SCCRTSB AL5 PMU_REQ_L
SCCRXDB AG10 PMU_TO_INT
SCCGPIOB AP4 PMU_ACK_L
SCCTRXCB AM5 PMU_CLK
MISO
ACK*
CLK18M_INT_XIN
R218
14
USB_MODEM
G4
CLK18M_INT_XOUT
CLK18M_XTAL_IN
22pF
NEC_PCI_INT_L
10K
5%
1/16W
MF
402
AR4
MOSI
35
29 14
8X4.5MM-SM
C152 1
H7
GENERAL
PURPOSE
I/OS
Y2
INT_MOD_CLKOUT_UF
35
R144
5%
1/16W
SM1
5%
1/16W
SM1
5%
1/16W
MF
402
5%
1/16W
MF
2 402
RP15
10K
E2
VIA
29
29
R134
SND_HP_SENSE_L
INT_EXTINT16_PU
10K
5%
1/16W
MF
402
USB_DDP
14
38
SCCTXDA AF9 COMM_TXD_L

SCCRTSA AN3 COMM_RTS_L
SCCDTRA AF10 COMM_DTR_L
SCCRXDA AG11 COMM_RXD
SCCGPIOA AG9 COMM_GPIO_L
SCCTRXCA AT4 COMM_TRXC
BGA
(6 OF 9)
VCORE A/B SEL
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO9
GPIO11
GPIO12
GPIO15
GPIO16
PCIPME
INT_PROC_SLEEP_REQ_L AT6 PROCSLEEPREQ
AN8
INT_PEND_PROC_INT
PENDPROCINT
39 29 24 17
5%
1/16W
SM1
USB_MODEM
10K
35
U.FL-R_SMT
10K
CLK18M_INT_EXT
A33
E31
18 14
SSCG
ENET_ENERGY_DET
AIRPORT_PCI_INT_L
39 24 14
250K PULL-UP
K7
PMU_INT_L
26
5%
1/16W
MF
402 1
INT_ENET_RST_L
COMM_RING_DET_L
17 14
10K
RP15
SND_HP_MUTE_L
H5
39 25
PLACE NEAR INTREPID TO

MINIMIZE OVERSHOOT
14
RP15
USB_MODEM
J8
14
INT_GPIO9_PU
5%
1/16W
MF
402
FW_PHY_PD
26
R292
LOCK
R296
RP8
R153
SSCG
5%
1/16W
SM1
5%
1/16W
SM1
14 35
RP4
RP8
F2
14
10K
INT_EXTINT11_PU
INT_EXTINT10_PU
5%
1/16W
SM1
INT_REF_CLK_IN
5%
1/16W
SM1
COMM_RESET_L
39 25 14
INTERNAL 250K PULL-DOWN
PD*
5%
1/16W
MF
402
COMM_SHUTDOWN
39 25
39 29 25 14
RESET*
13
R284
RP5
10K
39 25
J7
SSCG
R293
TSSOP
33 2
SSCG
CPU0 16 CG_CLKOUT 1
INTERNAL 250K PULL-UP
5%
1/16W
OUTPUT IMPEDANCE ~18-20 OHMS
MF
402
ADDRSEL
17
SYSTEM_CLK_EN
INT_EXTINT13_PU 14
INT_EXTINT16_PU
E1
39 25
SDATA
14
CG_LOCK
3
SCLK
INT_I2C_DATA1
CG_ADDRSEL
5%
1/16W
SM1
5%
1/16W
SM1
10K
INT_I2C_CLK1
CG_RESET_L
INT_GPIO12_PU
FSEL
INT_GPIO1_PU
27
CLKIN
CG_FSEL
G5
29 14
RP7
RP4
20
INT_REF_CLK_OUT
14 29
29 14
5%
1/16W
SM1
20%
10V
2 CERM
402
CY28512D
VSSC
5%
1/16W
MF
1 402
PMU_INT_NMI
5%
1/16W
MF
402
RP7
5%
1/16W
MF
402 2
CG_FSEL
33 14
15
10K
10K
U31
R250
5%
1/16W
SM1
R295
10K
C394
0.1uF
14
35 14
5%
1/16W
SM1
U51
INTREPID-REV2.1
CRITICAL
INT_GPIO15_PU
10K
NO STUFF
2
FERR-EMI-100-OHM
38
R157
SM
20%
10V
2 CERM
402
14
USB_DDM
L13
+1_5V_INTREPID_PLL1
CRITICAL
VDDC 5
SSCG
14
RP6
RP6
0.1uF
+2_5V_CG_MAIN
10K
1uF
5%
1/16W
SM1
5%
1/16W
SM1
5%
1/16W
MF
2 402
RP6
RP11
10K
C399
SSCG
INT_EXTINT8_PU
20%
2 10V
CERM
402
R287
5%
1/16W
MF
402 2
5%
1/16W
SM1
C402
20%
10V
2 CERM
603
0.1uF
SSCG
R2861
14
VDDA 12
10K
C400
1
USB_OC_CD_L
+3V_CG_PLL_MAIN
SSCG
SSCG
1
1
SSCG
14
PCI_
VDD15A_1 AA16
(PLL1)
VSSA
5%
1/16W
SM1
USB_PWREN_CD_L
10K
RP5
10K
SM-1
RP8
5%
1/16W
SM1
SM-1
R182
+3V_INTREPID_USB
5%
1/16W
SM1
14
11
10K
10K
10K
USB_OC_AB_L
RP8
RP11
4.7
400-OHM-EMI
400-OHM-EMI
5%
1/16W
SM1
L14
L15
VDD0 1
VDD1 10
10K
10K
SSCG
USB_DCP
5%
1/16W
MF
402
5%
1/16W
MF
402
+3V_MAIN
38
14
20%
6.3V 2
CERM
402
SSCG
14
+1_5V_INTREPID_PLL2
5%
1/16W
MF
402
0.22uF
1
1
USB_OC_EF_L
VSS0
VSS1
10K
5%
1/16W
SM1
C387
14
RP11
RP11
USB_PWREN_EF_L
USB_DCM
14
14
10K
R164
R201
+2_5V_MAIN
VDDQ 18
5%
1/16W
MF
402
5%
1/16W
MF
402
R191
20%
6.3V
CERM 2
402
VSSQ
10K
10K
USB_DBP
14
5%
1/16W
MF
402
0.22uF
GPIO/EXTINT PULLUPS
4.7
R183
2
5%
1/16W
MF
402
38
R243
1
5%
1/16W
MF
402
20%
6.3V 2
CERM
402
14 24 39
+1_5V_INTREPID_PLL3
USB_DBM
14
5%
1/16W
MF
402
C388 1
14 18
4.7
VDDU33_1 T8
10K
R279
1
R156
VDDU33_2 U8
1%
1/16W
MF
402 2
USB_DAP
14
VSSU_2
10K
10K
20%
6.3V
CERM 2
402
68.1K
R187
0.22uF
R746
1
5%
1/16W
MF
402
+3V_MAIN
R567
5%
1/16W
MF
402
C389 1
10K
5%
1/16W
MF
402
38
VSSU_1
CBUS_INT_L
R158
1
LT1962_INT_BYP
PCI INTERRUPTS
5%
1/16W
MF
402
+3V_MAIN
SHDN
BYP 3
GND 4
20%
2 6.3V
CERM
805
+1_5V_INTREPID_PLL4
R8
10K
LT1962_INT_ADJ
R9
R148
20%
10V
CERM 2
603
ADJ 2
NC
10uF
7
19
+3V_SLEEP
C723
VDD15A_8 AG29
(PLL9)
NC
1uF
USB_DAM
14
VSSA_8
(PLL9)
C721 1
5%
1/16W
MF
603
NC
4.7
AH29
R280
VSSA4
(PLL7)
NC
PORT A - PORT D/UNUSED

R181
20%
6.3V 2
CERM
402
AK18
R565
OUT
IN
1%
1/16W
MF
402 2
20%
16V
CERM 2
402
VSSA3
(PLL3)
LTC1962_INT_VIN
0.22uF
18.7K
0.01uF
MSOP
38
38
5%
1/16W
MF
402
C337 1
R5741
AJ16
+1_8V_MAIN
C392
PCI_
VDD15A_4 AJ18
(PLL7)
U49
LT1962-ADJ
+1_5V_INTREPID_PLL8
VSSA2
(PLL2)
AJ13
5%
1/16W
MF
603
4.7
VSSA1
(PLL1)
USB PORT ASSIGNMENTS
R240
8 12 38
R568
PCI_
VDD15A_3 AJ17
(PLL3)
+1_5V_INTREPID_PLL
NO STUFF
PCI_
VDD15A_2 AJ12
(PLL2)
+2_5V_MAIN
AA15
OF
14 40
1
7
+2_5V_SLEEP
INT_2_5V_COLD
INT_2_5V_HOT
R2741
5%
1/10W
FF
805 2
5%
1/10W
FF
805 2
38 21 20 19 16 12
+1_5V_AGP
+3V_MAIN
+1_5V_MAIN
MAXBUS_SLEEP
AA25
C12
AA29
C15
AB25
C18
AB27
AGP_IO_VDD
AL10
AK6
AH6
AH3
AF25
AE6
AE3
AE17
AE15
AD21
AC14
G6
G3
F9
F7
F30
AC13
AC12
AB6
AB3
AA12
AA11
AR34
AR33
AP31
AP28
AP25
AP22
AP19
AN32
AL30
AL28
AL22
AL19
AJ23
AJ21
AH28
AH22
AH19
AF22
AD20
AE23
+2_5V_INTREPID
38
16
10
9
AE20
38 33 16 8 7 6 5
+2_5V_MAIN
R2761
0
VDD3.3
AL13
AL16
AL3
U51
C21
AL7
AB31
INTREPID-REV2.1
C24
AM4
AB34
BGA
(8 OF 9)
C27
AN5
AC25
AA21
CRITICAL
C30
AA24
C9
AC28
F12
AE31
F15
AE34
AP13
INTREPID-REV2.1
AB13
AB15
BGA
(9 OF 9)
AB17
CRITICAL
AP16
K3
AB19
K6
N24
AC17
N3
AF28
F18
AH30
F21
AH34
F24
F27
AP10
U51
AC27
VDD1.8/CPUVIO
AC19
N6
AC23
P13
AD13
P14
AK34
AP35
M15
M16
C35
M19
G31
M22
G34
POWER
AD15
M23
K31
N18
K34
R22
AD22
T12
P15
T18
P18
T3
VDD3.3
P20
N21
VDD2.5
N28
P21
N31
N23
VDD1.5
R17
P16
N34
P19
N36
T6
U12
W12
R20
W13
T13
W3
U17
W6
U18
AP2
U24
AP7
V16
AR3
V19
B3
V20
C2
V22
C6
W16
D32
W24
D5
Y13
B34
Y18
E4
P25
P28
POWER/GROUND
R25
R27
T25
T28
T29
T31
T34
U25
U28
L24
V25
M14
V29
M17
W25
M18
W31
M20
W34
M21
Y27
M24
Y29
M28
E33
AD28
AD3
M3
AD31
M31
AN33
M32
AN4
AD6
M34
AP1
AE14
M6
AP12
AE16
GROUND
M9
AP15
AE18
N15
AP18
AE19
N25
AP21
AE21
U19
P12
AP24
AE22
U22
P17
AP27
AE28
U27
P22
AP3
AG21
U29
P29
AP30
AG23
V10
P4
AP33
AG24
V12
R14
AP34
AG3
AP36
AG30
VSS
R16
V18
AP6
AG34
R19
AP9
AG6
R21
AR2
AH20
V3
R23
AR35
AH21
V31
R24
AT3
AH23
R26
AT34
AH27
R29
B2
VSS
V17
VSS
R18
V21
V24
V34
V6
VSS
W11
B35
AK3
W14
R31
C1
AK7
W23
R34
C10
AL12
W26
R6
C13
AL15
Y11
T11
C16
AL18
Y12
T14
C19
AL21
Y14
T23
C22
AL27
Y16
T24
C25
AL31
Y19
T27
C28
AL34
Y23
U10
C3
AL6
Y24
U16
C31
AL9
Y25
R3
AD34
Intrepid Power
A
C34

AD25
AD23
AD12
AC26
AC22
AC20
AC18
AC16
AC15
AC11
AB29
AB28
AB24
AB18
AB16
AB14
AB12
AB11
AA6
AA34
AA31
AA3
AA27
A34
AA20
A3
C7
C36
D4
D33
F10
F13
F16
F19
F22
F25
F3
F28
F31
F6
F34
G7
J3
J6
J31
J34
AGP_IO_VSS
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6338
OF
15 40
1
8
33 15 8 7 6 5 MAXBUS_SLEEP
38
C148
INTREPID MAXBUS DECOUPLING

C142
10uF
C144
10uF
20%
6.3V 2
CERM
805
C146
10uF
20%
2 6.3V
CERM
402
10uF
20%
6.3V 2
CERM
805
C182
0.22uF
20%
6.3V 2
CERM
805
C204
20%
2 6.3V
CERM
402
C165
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
6.3V 2
CERM
805
C178
C166
C206
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
2 6.3V
CERM
402
C141
C205
C147
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
2 6.3V
CERM
402
C145
C223
20%
2 6.3V
CERM
402
C149
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
2 6.3V
CERM
402
C229
0.22uF
C181
20%
2 6.3V
CERM
402
C179
0.22uF
C162
0.22uF
20%
2 6.3V
CERM
402
20%
2 6.3V
CERM
402
C164
20%
2 6.3V
CERM
402
C207
C161
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
2 6.3V
CERM
402
C225
C208
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
2 6.3V
CERM
402
C160
C183
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
2 6.3V
CERM
402
C159
C180
0.22uF
20%
2 6.3V
CERM
402
C324 1
C325 1
20%
6.3V 2
CERM
805
20%
6.3V 2
CERM
805
C201 1
C200 1
20%
6.3V 2
CERM
805
20%
6.3V 2
CERM
805
10uF
10uF
10uF
20%
2 6.3V
CERM
402
C279
20%
2 6.3V
CERM
402
C301
20%
2 6.3V
CERM
402
C271
0.22uF
C278
C226
C310
0.22uF
C288
0.22uF
20%
2 6.3V
CERM
402
C292
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
2 6.3V
CERM
402
20%
2 6.3V
CERM
402
0.22uF
0.22uF
C262
20%
2 6.3V
CERM
402
20%
2 6.3V
CERM
402
20%
2 6.3V
CERM
402
0.22uF
0.22uF
0.22uF
20%
2 6.3V
CERM
402
0.22uF
10uF
C213
C299
C238
20%
2 6.3V
CERM
402
C260
0.22uF
20%
2 6.3V
CERM
402
C248
0.22uF
20%
2 6.3V
CERM
402
C250
0.22uF
C300
20%
2 6.3V
CERM
402
C303
0.22uF
C287
20%
2 6.3V
CERM
402
20%
2 6.3V
CERM
402
0.22uF
0.22uF
20%
2 6.3V
CERM
402
C289
0.22uF
20%
2 6.3V
CERM
402
C227
0.22uF
20%
2 6.3V
CERM
402
C236
0.22uF
20%
2 6.3V
CERM
402
C259
20%
6.3V
2 CERM
402
C261
0.22uF
C258
0.22uF
20%
2 6.3V
CERM
402
C222
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
2 6.3V
CERM
402
20%
2 6.3V
CERM
402
C224
C272
0.22uF
20%
2 6.3V
CERM
402
C263
C290
0.22uF
0.22uF
20%
2 6.3V
CERM
402
C302
0.22uF
20%
2 6.3V
CERM
402
0.22uF
30 Balls
4 X 10UF (0805)
29 X 0.22UF (0402)
INTREPID CORE DECOUPLING
0.22uF
0.22uF
20%
2 6.3V
CERM
402
C163
0.22uF
20%
2 6.3V
CERM
402
0.22uF
+1_5V_MAIN
24 Balls
4 X 10UF (0805)
28 X 0.22UF (0402)
C214
0.22uF
20%
2 6.3V
CERM
402
+3V_MAIN
57 Balls
4 X 10UF (0805)
40 X 0.22UF (0402)
INTREPID 3.3V DECOUPLING

38 21 20 19 15 12
+1_5V_AGP
INTREPID AGP I/O DECOUPLING
C381
C380
10uF
C382
10uF
20%
6.3V
CERM 2
805
20%
6.3V
CERM 2
805
C379
10uF
10uF
20%
6.3V
CERM 2
805
20%
6.3V
CERM 2
805
C367
0.22uF
20%
6.3V
2 CERM
402
C365
0.22uF
20%
6.3V
2 CERM
402
C319
0.22uF
20%
6.3V
2 CERM
402
C329
0.22uF
20%
6.3V
2 CERM
402
C330
0.22uF
20%
6.3V
2 CERM
402
C345
0.22uF
20%
6.3V
2 CERM
402
C363
0.22uF
20%
6.3V
2 CERM
402
C346
0.22uF
20%
6.3V
2 CERM
402
C366
0.22uF
C332
0.22uF
20%
6.3V
2 CERM
402
20%
6.3V
2 CERM
402
C373
0.22uF
C344
0.22uF
20%
6.3V
2 CERM
402
20%
6.3V
2 CERM
402
21 Balls
4 X 10UF (0805)
21 X 0.22UF (0402)
1
C361
0.22uF
20%
6.3V
2 CERM
402
C331
0.22uF
20%
6.3V
2 CERM
402
C320
0.22uF
20%
6.3V
2 CERM
402
C312
0.22uF
20%
6.3V
2 CERM
402
C376 1
10uF
10uF
C377 1
C375 1
10uF
10uF
20%
6.3V 2
CERM
805
C328
0.22uF
20%
6.3V
2 CERM
402
C378 1
C354
0.22uF
20%
6.3V
2 CERM
402
C364
0.22uF
20%
6.3V
2 CERM
402
20%
6.3V 2
CERM
805
20%
6.3V
CERM 2
805
20%
6.3V
CERM 2
805
C347
C314
10uF
C191
C322
10uF
C202
20%
6.3V
2 CERM
402
10uF
20%
6.3V 2
CERM
805
C304
20%
6.3V 2
CERM
805
C306
C265
0.22uF
20%
2 6.3V
CERM
402
C323
0.22uF
20%
2 6.3V
CERM
402
C239
0.22uF
20%
6.3V
2 CERM
402
20%
6.3V
2 CERM
402
C285
C360
0.22uF
20%
6.3V
2 CERM
402
C266
0.22uF
20%
6.3V
2 CERM
402
0.22uF
20%
2 6.3V
CERM
402
C175
0.22uF
0.22uF
20%
6.3V
CERM 2
805
20%
6.3V
2 CERM
402
C321
C252
C251
0.22uF
20%
2 6.3V
CERM
402
C273
0.22uF
20%
2 6.3V
CERM
402
C316
0.22uF
20%
6.3V
2 CERM
402
0.22uF
20%
6.3V
2 CERM
402
0.22uF
20%
2 6.3V
CERM
402
C172
C275
C216
0.22uF
20%
2 6.3V
CERM
402
C242
0.22uF
20%
2 6.3V
CERM
402
C185
0.22uF
20%
6.3V
2 CERM
402
0.22uF
20%
6.3V
2 CERM
402
0.22uF
20%
2 6.3V
CERM
402
C281
C297
C254
0.22uF
20%
2 6.3V
CERM
402
C203
0.22uF
20%
2 6.3V
CERM
402
C282
0.22uF
20%
6.3V
2 CERM
402
C243
0.22uF
20%
6.3V
2 CERM
402
C240
0.22uF
C305
C186
0.22uF
20%
2 6.3V
CERM
402
20%
2 6.3V
CERM
402
C333
0.22uF
C217
0.22uF
20%
2 6.3V
CERM
402
C218
20%
2 6.3V
CERM
402
0.22uF
20%
2 6.3V
CERM
402
C295
0.22uF
C334
0.22uF
20%
6.3V
2 CERM
402
0.22uF
20%
2 6.3V
CERM
402
C253
0.22uF
20%
6.3V
2 CERM
402
0.22uF
20%
2 6.3V
CERM
402
C358
0.22uF
20%
2 6.3V
CERM
402
C357
0.22uF
20%
6.3V
2 CERM
402
C283
0.22uF
20%
6.3V
2 CERM
402
C308
0.22uF
20%
6.3V
2 CERM
402
C268
0.22uF
20%
2 6.3V
CERM
402
C351
0.22uF
20%
6.3V
2 CERM
402
C269
0.22uF
20%
6.3V
2 CERM
402
C318
0.22uF
20%
6.3V
2 CERM
402
C327
0.22uF
20%
2 6.3V
CERM
402
C350
0.22uF
20%
6.3V
2 CERM
402
C221
0.22uF
20%
6.3V
2 CERM
402
C237
0.22uF
20%
6.3V
2 CERM
402
C342
0.22uF
20%
2 6.3V
CERM
402
C286
20%
6.3V
2 CERM
402
C234
20%
2 6.3V
CERM
402
20%
6.3V
2 CERM
402
C317
20%
6.3V
2 CERM
402
C247
0.22uF
20%
6.3V
2 CERM
402
0.22uF
20%
6.3V
2 CERM
402
C176
0.22uF
0.22uF
0.22uF
0.22uF
C215
C341
0.22uF
20%
6.3V
2 CERM
402
C352
0.22uF
20%
2 6.3V
CERM
402
C189
0.22uF
20%
6.3V
2 CERM
402
C257
0.22uF
20%
6.3V
2 CERM
402
C177
0.22uF
20%
6.3V
2 CERM
402
C171
20%
2 6.3V
CERM
402
C167
20%
6.3V
2 CERM
402
C343
20%
6.3V
2 CERM
402
C212
20%
2 6.3V
CERM
402
C371
0.22uF
C359
0.22uF
20%
6.3V
2 CERM
402
20%
6.3V
2 CERM
402
C313
0.22uF
C228
20%
6.3V
2 CERM
402
C349
0.22uF
C184
0.22uF
20%
6.3V
2 CERM
402
20%
6.3V
2 CERM
402
C274
C219
0.22uF
20%
2 6.3V
CERM
402
C230
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
6.3V
2 CERM
402
0.22uF
20%
2 6.3V
CERM
402
C241
C369
C315
0.22uF
20%
2 6.3V
CERM
402
C293
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
6.3V
2 CERM
402
0.22uF
20%
2 6.3V
CERM
402
C348
C368
C264
0.22uF
20%
2 6.3V
CERM
402
C231
0.22uF
20%
2 6.3V
CERM
402
+2_5V_MAIN
20%
6.3V
2 CERM
402
10 X 0.22UF (0402)
C168
0.22uF
20%
2 6.3V
CERM
402
INTREPID/MAIN 2.5V DECOUPLING
0.22uF
0.22uF
20%
2 6.3V
CERM
402
C192
C770
0.22uF
20%
6.3V
2 CERM
402
C139
0.22uF
20%
6.3V
2 CERM
402
C335
0.22uF
20%
6.3V
2 CERM
402
C735
0.22uF
20%
6.3V
2 CERM
402
C245
0.22uF
20%
6.3V
2 CERM
402
C736
0.22uF
20%
6.3V
2 CERM
402
C739
0.22uF
20%
6.3V
2 CERM
402
C395
0.22uF
20%
6.3V
2 CERM
402
C374
0.22uF
C385
0.22uF
20%
6.3V
2 CERM
402
20%
6.3V
2 CERM
402
C294
0.22uF
20%
6.3V
2 CERM
402
Place these 2.5V Decoupling Caps near the Edge of +2.5V_MAIN and +2.5V_INTREPID split
C296
0.22uF
20%
2 6.3V
CERM
402
Intrepid Decoupling
C280
0.22uF
20%
6.3V
2 CERM
402
20%
6.3V
2 CERM
402

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SHT
NONE
REV.
051-6338
SCALE
0.22uF
20%
6.3V
2 CERM
402
0.22uF
20%
6.3V
2 CERM
402
C309
0.22uF
20%
2 6.3V
CERM
402
0.22uF
0.22uF
0.22uF
C158
0.22uF
44 Balls
4 X 10UF (0805)
46 X 0.22UF (0402)
INTREPID DDR DECOUPLING
10uF
20%
6.3V
CERM 2
805
20%
2 6.3V
CERM
402
0.22uF
20%
6.3V
2 CERM
402
0.22uF
+2_5V_INTREPID
C170
0.22uF
0.22uF
20%
6.3V
2 CERM
402
38 15 10 9
OF
16 40
1
7
+3V_NEC_VDD
17 38
TABLE_ALT_HEAD
C749
0.1uF
C746
0.1uF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
C761
0.1uF
C750
PART NUMBER
ALTERNATE FOR
PART NUMBER
197S0608
197S0038
BOM OPTION
REF DES
COMMENTS:
Y1
0.1uF
TABLE_ALT_ITEM
20%
10V
2 CERM
402
20%
10V
2 CERM
402
+3V_MAIN
L7
FERR-EMI-100-OHM
1
C756
0.1uF
C748
0.1uF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
C747
0.1uF
20%
2 10V
CERM
402
C769
0.1uF
20%
10V
2 CERM
402
C197
20%
6.3V
CERM
805
20%
2 10V
CERM
402
C752
0.1uF
0.1uF
38
NEC_AVDD
SM
20%
10V
2 CERM
402
C765
10uF
C760 1
C751 1
C173 1
20%
10V
CERM 2
402
20%
10V
CERM 2
402
20%
6.3V 2
CERM
805
0.1uF
R172
0
C768
5%
1/16W
MF
2 603
0.1uF
20%
2 10V
CERM
402
0.1uF
10uF
Y1s LOAD CAPACITANCE = 16 pF
C759
N5
PCI_AD<3>
P4
39 37 24 18 12 9
PCI_AD<4>
N4
39 37 24 18 12 9
PCI_AD<5>
M3
39 37 24 18 12 9
PCI_AD<6>
N3
39 37 24 18 12 9
PCI_AD<7>
M1
39 37 24 18 12 9
PCI_AD<8>
L2
39 37 24 18 12 9
PCI_AD<9>
L1
39 37 24 18 12 9
PCI_AD<10>
K2
39 37 24 18 12 9
PCI_AD<11>
L3
39 37 24 18 12 9
PCI_AD<12>
K1
39 37 24 18 12 9
PCI_AD<13>
K3
39 37 24 18 12 9
PCI_AD<14>
J2
39 37 24 18 12 9
PCI_AD<15>
J1
39 37 24 18 12 9
PCI_AD<16>
F2
39 37 24 18 12 9
PCI_AD<17>
E3
39 37 24 18 12 9
PCI_AD<18>
E1
39 37 24 18 12 9
PCI_AD<19>
D3
39 37 24 18 12 9
PCI_AD<20>
D1
39 37 24 18 12
PCI_AD<21>
D2
39 37 24 18 12
PCI_AD<22>
C2
39 37 24 18 12
PCI_AD<23>
C1
39 37 24 18 12 9
PCI_AD<24>
B4
39 37 24 18 12 9
PCI_AD<25>
A4
39 37 24 18 12 9
PCI_AD<26>
B5
(PCI_AD<27>)
C4
39 37 24 18 12 9
PCI_AD<28>
A5
39 37 24 18 12 9
PCI_AD<29>
C5
39 37 24 18 12 9
PCI_AD<30>
B6
39 37 24 18 12 9
PCI_AD<31>
A6
PCI_AD<27>
R6361
22
5%
1/16W
MF
402 2
37 24 18 12
PCI_CBE<0>
M2
37 24 18 12
PCI_CBE<1>
J3
37 24 18 12
PCI_CBE<2>
F1
37 24 18 12
PCI_CBE<3>
C3
39 37 24 18 12
PCI_PAR
J4
39 37 24 18 12
PCI_FRAME_L
F3
39 37 24 18 12
PCI_IRDY_L
F4
39 37 24 18 12
39 37 24 18 12
39 37 24 18 12
Series Rpaks required to

facilitate NAND-tree testing
NEC_PCI_INT_L
G1
PCI_STOP_L
G3
NEC_IDSEL
B3
PCI_DEVSEL_L
G2
NEC_PCI_REQ_L
C6
D6
RP45
12
47
12
NEC_PCI_GNT_L
18
PCI_PERR_L
18
PCI_SERR_L
5%
14
PCI_TRDY_L
NEC_PCI_INTA_L
NEC_PCI_INTB_L
NEC_PCI_INTC_L
1/16W
SM1
35 12
17
H2
OD
H1
OD
C7
OD
B7
OD
A7
CLK33M_NEC
A8
NEC_IO_RESET_L
B8
N6
NEC_CRUN_L
R6171
17
NEC_PME_L
17
NEC_MAIN_RESET_L
4.7K
NEC_SMI_L_TP
5%
1/16W
MF
402 2
17
NEC_LEGC
OD
D9
C9
OD
L6
L7
17
N10
N12
RSDM4
DM4
DP4
RSDP4
F12 NC
F14
RSDM5
DM5
DP5
RSDP5
E13 NC
D14
NC1
NC2
R124
27pF
R612
100
5%
2 50V
CERM
402
5%
1/16W
MF
2 402
36
NEC_USB_DAP
25 37 39
NEC_USB_DBM
25 37 39
1%
1/16W
MF
402
NEC_USB_RSDM2
K12 (NEC_USB_DBM)
R609
J14 (NEC_USB_DBP)
J12
NEC_USB_RSDP2
36
1%
1/16W
MF
402
Low/Full/High Speed (External)
G13
R610
G14 NC
36
NEC_USB_DBP
25 37 39
1%
1/16W
MF
402
E12
E14 NC
C13
C14 NC
+3V_MAIN
R614
NEC_RREF
9.09K2
Tie to GND (NEC_AVSS_F) at ball N11

NEC_AVSS_F
17
7
+3V_NEC_VDD
17 38
B12
NEC_LUSB_OCI
17
B11
NEC_RUSB_OCI
17
B10
NEC_OCI<3>
RP43
A10
NEC_OCI<4>
B9
NEC_OCI<5>
OUT
NEC_NC<1>
M6
NEC_NC<2>
17
25 39
R615
2
1K
5%
1/16W
MF
402
10K
17
25 39
NEC_RUSB_OCI_UF
25 39
5%
1/16W
MF
402
NO STUFF
1
C743
0.1uF
R632
1K
NEC_LUSB_OCI_UF
R608
1
NEC_RUSB_OCI
5%
1/16W
MF
402
5%
1/16W
SM1
5%
1/16W
MF
402
R606
10K
NEC_LUSB_OCI
NEC_PPON5_TP
P6
10K
R607
5%
1/16W
SM1
RP43
10K
5%
1/16W
SM1
25 39
C11 OUT NEC_PPON3_TP

C10 OUT NEC_PPON4_TP
A9
5%
1/16W
SM1
C12 OUT NEC_LUSB_PPON

A11 OUT NEC_RUSB_PPON
10K
RP43
20%
2 10V
CERM
402
NO STUFF
1
C744
0.1uF
20%
2 10V
CERM
402
5%
1/16W
MF
402
NEC documentation indicates that NCs must be tied high.
M8
IPD
NTEST1
M7
IPD
SMC
N7
IPD
TEB
AMC
P7
IPD
IPD
TEST
L8
NC
NC
NC
NEC_AMC_TP
NC
LEGC
NANDTEST M10 NEC_NANDTESTEN_TP
SRCLK M9
NC
SRDTA N9 NEC_NANDTESTOUT_TP
IPD
NC
SRMOD P9
AVSS(R)
D8
G4
F11
J11
D12
H12
L12
M11
B13
N13
H11 NC
G11
PPON1
PPON2
PPON3
PPON4
PPON5
N2
RSDM3
DM3
DP3
RSDP3
OCI1
OCI2
OCI3
OCI4
OCI5
B2
NEC_LEGC
C136
RP43
A2
17
25 37 39
Low/Full/High Speed (External)

1
1%
1/16W
MF
402
B14
NEC_MAIN_RESET_L
K14
RREF P11
H14
MAIN_RESET_L
RSDM2
DM2
DP2
RSDP2
VBBRST
CRUN
PME
VCCRST
SMI
N1
17
NEC_XT2_R
N14
NEC_PME_L
D7
FBGA
PAR
FRAME
IRDY
TRDY
STOP
IDSEL
DEVSEL
REQ
GNT
PERR
SERR
INTA
INTB
INTC
PCLK
P10
17
H4
G12
D13
F13
H13
N8
E2
L13
A3
A12
A13
P3
P12
C8
P2
J13
DP1 L14 (NEC_USB_DAP)

RSDP1 K13 NEC_USB_RSDP1
CBE0
CBE1
CBE2
CBE3
B1
39 29 24 19 18 14
NEC_IO_RESET_L
NEC_XT2
U17
VSS
PMU_PME_L
NEC_USB_DAM
NEC_uPD720101_USB2
5%
39 29 24 14
P8
CRITICAL
47
IO_RESET_L
NEC_XT1
RSDM1 M14 NEC_USB_RSDM1

DM1 M13 (NEC_USB_DAM)
RP44
29 26 23
L9
AVSS
M12
PCI_AD<2>
39 37 24 18 12 9
XT1/SCLK
XT2
P13
39 37 24 18 12 9
VDD
N11
P5
27pF
5%
2 50V
CERM
402
AVDD
PCI_AD<1>
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
VDD_PCI
39 37 24 18 12 9
M4
H3
39 37 24 18 12 9
39 37 24 18 12 9
M5
8X4.5MM-SM
+3V_NEC_VDD
PCI_AD<0>
36
1%
1/16W
MF
402
30.0000M
Y1
38 17
R613
CRITICAL
17
USB 2.0
R798
NEC_AVSS_F
1/16W
SM1
5%
1/10W
MF
603

SIZE
APPLE COMPUTER INC.
D
SCALE
DRAWING NUMBER
REV.
051-6338
C
17 40
SHT
OF
NONE
+3V_SLEEP
PCI1510 PULL-UPS
+3V_MAIN
1
C60
10uF
20%
6.3V
2 CERM
805
+3V_SLEEP
C776
10uF
C789
0.22uF
20%
6.3V
2 CERM
805
C791
0.22uF
20%
6.3V
2 CERM
402
20%
6.3V
2 CERM
402
C784
0.22uF
20%
6.3V
2 CERM
402
MAKE SURE VCC AND VPP ARE WIDE PLANE/TRACES

TO MINIMIZE INDUCTANCE!
+5V_MAIN
U4
R718
1
10K
5%
1/16W
MF
402
PCI_PERR_L
17 18
5%
1/16W
MF
402
R714
1
10K
34
26 20
33 32
5%
1/16W
MF
402
C783
0.22uF
C778
0.22uF
20%
2 6.3V
CERM
402
20%
2 6.3V
CERM
402
17 18
20%
2 6.3V
CERM
402
NC
0.22uF
R7261
20%
2 6.3V
CERM
402
5%
1/16W
MF
402 2
10K
CBUS_SUSPEND_PU 18
5%
1/16W
MF
402 2
+2_5V_SLEEP
9
5
C775
R7211
R722
10K
0.22uF
PCI_SERR_L
C782
SLEEP_L_LS5
15
14
16
TPS2211_SHTDWN_L
A7
C13
D5
E1
M1
N11
N7
7
1
C787
4.7uF
20%
2 6.3V
CERM
805
VCC
C786
0.22uF
20%
6.3V
2 CERM
402
NC
PCI1510_VR_EN_L
H10
D4
L8
39 37 24 17 12 9
PCI_AD<0>
N8
39 37 24 17 12 9
PCI_AD<1>
M7
39 37 24 17 12 9
PCI_AD<2>
L7
39 37 24 17 12 9
PCI_AD<3>
N6
39 37 24 17 12 9
PCI_AD<4>
K4
39 37 24 17 12 9
PCI_AD<5>
M6
39 37 24 17 12 9
PCI_AD<6>
L6
39 37 24 17 12 9
PCI_AD<7>
N5
39 37 24 17 12 9
PCI_AD<8>
N4
39 37 24 17 12 9
PCI_AD<9>
M2
39 37 24 17 12 9
PCI_AD<10>
M5
39 37 24 17 12 9
PCI_AD<11>
L4
39 37 24 17 12 9
N3
PCI_AD<12>
39 37 24 17 12 9
PCI_AD<13>
K5
39 37 24 17 12 9
PCI_AD<14>
L5
39 37 24 17 12 9
PCI_AD<15>
M4
39 37 24 17 12 9
PCI_AD<16>
J4
39 37 24 17 12 9
PCI_AD<17>
H1
PCI_AD<18>
(PCI_AD<19>)
H3
39 37 24 17 12 9
39 37 24 17 12 9
PCI_AD<19>
39 37 24 17 12 9
PCI_AD<20>
G2
39 37 24 17 12
PCI_AD<21>
G4
39 37 24 17 12
R7191
F1
PCI_AD<22>
39 37 24 17 12
PCI_AD<23>
C3
39 37 24 17 12 9
PCI_AD<24>
F3
39 37 24 17 12 9
PCI_AD<25>
E2
39 37 24 17 12 9
PCI_AD<26>
F4
39 37 24 17 12 9
PCI_AD<27>
B1
39 37 24 17 12 9
PCI_AD<28>
D2
39 37 24 17 12 9
PCI_AD<29>
E4
39 37 24 17 12 9
PCI_AD<30>
D3
39 37 24 17 12 9
PCI_AD<31>
E3
37 24 17 12
PCI_CBE<0>
K6
37 24 17 12
PCI_CBE<1>
M3
22
5%
1/16W
MF
402 2
H2
37 24 17 12
PCI_CBE<2>
J2
37 24 17 12
PCI_CBE<3>
A1
39 37 24 17 12
N1
PCI_PAR
39 37 24 17 12
PCI_IRDY_L
K1
18 17
PCI_SERR_L
L2
F2
CBUS_PCI_IDSEL
PCI_PERR_L
K3
39 37 24 17 12
PCI_FRAME_L
J1
39 37 24 17 12
PCI_STOP_L
18 17
R723
39 29 24 19 17 14
MAIN_RESET_L
47
5%
1/16W
MF
402
J3
39 37 24 17 12
PCI_TRDY_L
39 37 24 17 12
PCI_DEVSEL_L
K2
CBUS_PCI_RESET_L
G3
2
12
12
35 12
C2
CBUS_PCI_REQ_L
C1
CBUS_PCI_GNT_L
G1
CLK33M_CBUS
RP1
NC
10K
5%
1/32W
25V
18
CBUS_MFUNC1_PD
18
10
CBUS_MFUNC2_PD
18
CBUS_MFUNC3_PD
18
CBUS_MFUNC4_PD
18
CBUS_MFUNC5_PD
18
L1
CBUS_MFUNC6_PD
18
M9
NC M8
CBUS_SUSPEND_PU N10
14
CBUS_INT_L
K7
18
CBUS_MFUNC1_PD
N9
18
CBUS_MFUNC2_PD
18
CBUS_MFUNC3_PD
18
CBUS_MFUNC4_PD
M10
18
CBUS_MFUNC5_PD
N12
18
CBUS_MFUNC6_PD
L10
L9
K10
CLK_48_RSVD/NC
CRITICAL
U8
VR_EN*
VR_PORT
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CLAMP FOR PC-CARD

CLAMP FOR PCI
PCI1510GGU
VCCD0*
VCCD1*
BGA
VPPD0
VPPD1
INTEGRATED
CD1*/CCD1*
CD2*/CCD2*
IORD*/CAD13
IOWR*/CAD15
OE*/CAD11
CE1*/CC/BE0*
VS1*/CVS1
VS2*/CVS2
WE*/CGNT*
RDY/IREQ*/CINT*
RESET/CRST*
REG*/CC/BE3*
BVD1/CSTSCHG/STSCHG*/RI*
BVD2/SPKR*/CAUDIO
PULL-UP
WP/IOIS16*/CCLKRUN*
CE2/CAD10*
INPACK/CREQ*
WAIT/CSERR*
C/BE0*
C/BE1*
C/BE2*
C/BE3*
PAR
IRDY
SERR
IDSEL
PERR
FRAME
STOP
TRDY
DEVSEL
PRST
REQ
GNT
PCLK
D0/CAD27
D1/CAD29
D2/RSVD
D3/CAD0
D4/CAD1
D5/CAD3
D6/CAD5
D7/CAD7
D8/CAD28
D9/CAD30
D10/CAD31
D11/CAD2
D12/CAD4
D13/CAD6
D14/RSVD
D15/CAD8
SPKROUT
RI_OUT/PME
SUSPEND
MFUNC0
MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6
GRST
SM
GND
A2
A11
D1
F13
10
+VPP_CBUS_SW
18 38
11
+VCC_CBUS_SW
18 38
12
13
C40 1
VCCD0
VCCD1
VPPD0
VPPD1
SHTDWN
GND
0.1uF
20%
10V
CERM 2
402
OC
C37
0.1uF
20%
10V
2 CERM
402
NC
0.1UF ARE USED TO INCREASE ESD DISCHARGES OF UP TO 10KV
B11
N13
CBUS_VCCD0_L
L12
CBUS_VCCD1_L
K9
M11
PC CARD/CARDBUS CONNECTOR
CBUS_VPPD0
CBUS_VPPD1
L13
CBUS_DET_1_L
18 39
B5
CBUS_DET_2_L
18 39
F12
CBUS_IORD_L
18
C11
CBUS_IOWR_L
QT500806-L111
18
G10
CBUS_OE_L
18
M-ST-SM1
84
81
H13
CBUS_CE1_L
18
CRITICAL
J5
B2
CBUS_VS1
18
CBUS_DATA<3>
18
A9
CBUS_VS2
18
39 18
CBUS_DET_1_L
CBUS_DATA<4>
18
D13
CBUS_WE_L
18
18
CBUS_DATA<11>
CBUS_DATA<5>
18
A6
CBUS_READY
18
18
CBUS_DATA<12>
CBUS_DATA<6>
18
CBUS_DATA<13>
10
12
11
CBUS_DATA<7>
18
D8
CBUS_RESET_L
18
A8
CBUS_REG_L
18
C6
CBUS_BVD1_L
18
18
CBUS_DATA<14>
14
13
CBUS_CE1_L
18
D6
CBUS_BVD2_L
18
18
CBUS_DATA<15>
16
15
CBUS_ADDR<10>
18
A5
CBUS_WP_L
18
18
CBUS_CE2_L
18
17
CBUS_OE_L
18
G13
CBUS_CE2_L
18
18
CBUS_VS1
20
19
B8
CBUS_INPACK_L
18
22
21
CBUS_ADDR<11>
18
B6
CBUS_WAIT_L
18
CBUS_ADDR<0>
18
18
CBUS_IORD_L
24
23
CBUS_ADDR<9>
18
18
CBUS_IOWR_L
26
25
CBUS_ADDR<8>
18
18
CBUS_ADDR<17>
28
27
CBUS_ADDR<13>
18
18
CBUS_ADDR<18>
30
29
32
31
CBUS_ADDR<14>
18
18
CBUS_ADDR<1>
18
CBUS_ADDR<2>
18
CBUS_ADDR<3>
18
CBUS_ADDR<4>
18
CBUS_ADDR<5>
18
CBUS_ADDR<6>
18
TI REFERENCE SCHEMATIC DID NOT HAVE BULK ON +VCC_CBUS_SW
18
CBUS_ADDR<19>
34
33
CBUS_WE_L
18
18
CBUS_ADDR<20>
36
35
CBUS_READY
18
CBUS_ADDR<21>
38
37
+VCC_CBUS_SW
18 38
+VCC_CBUS_SW
40
39
42
41
+VPP_CBUS_SW
18 38
+VPP_CBUS_SW
44
43
CBUS_ADDR<16>
18
18
CBUS_ADDR<22>
46
45
CBUS_ADDR<15>
18
18
CBUS_ADDR<23>
48
47
CBUS_ADDR<12>
18
18
CBUS_ADDR<24>
50
49
52
51
CBUS_ADDR<7>
18
18
CBUS_ADDR<25>
54
53
CBUS_ADDR<6>
18
18
CBUS_VS2
56
55
CBUS_ADDR<5>
18
18
CBUS_RESET_L
58
57
CBUS_ADDR<4>
18
CBUS_WAIT_L
60
59
62
61
CBUS_ADDR<3>
18
18
38 18
CBUS_ADDR<7>
18
CBUS_ADDR<8>
18
CBUS_ADDR<9>
18
CBUS_ADDR<10>
CBUS_ADDR<11>
CBUS_ADDR<13>
18
CBUS_ADDR<14>
18
CBUS_ADDR<15>
18
CBUS_ADDR_16_UF
18
CBUS_ADDR<18>
18
CBUS_ADDR<19>
18
CBUS_ADDR<20>
18
CBUS_ADDR<21>
CBUS_ADDR<22>
R724
1
47
CBUS_ADDR<16>
C800
2.2uF
20%
2 10V
CERM
805
38 18
18
18
5%
1/16W
MF
402
18
CBUS_INPACK_L
64
63
CBUS_ADDR<2>
18
18
CBUS_REG_L
66
65
CBUS_ADDR<1>
18
18
CBUS_BVD2_L
68
67
CBUS_ADDR<0>
18
18
CBUS_BVD1_L
70
69
72
71
CBUS_DATA<0>
18
18
18
CBUS_ADDR<23>
18
CBUS_ADDR<24>
18
CBUS_ADDR<25>
20%
2 10V
CERM
805
18
18
C796
2.2uF
18
CBUS_ADDR<12>
CBUS_ADDR<17>
18
CBUS_DATA<8>
74
73
CBUS_DATA<1>
18
18
CBUS_DATA<9>
76
75
CBUS_DATA<2>
18
18
CBUS_DATA<10>
78
77
CBUS_WP_L
18
CBUS_DET_2_L
80
79
83
82
18
A4
CBUS_DATA<0>
18
C4
CBUS_DATA<1>
18
A3
CBUS_DATA<2>
18
K11
CBUS_DATA<3>
18
K12
CBUS_DATA<4>
18
J13
CBUS_DATA<5>
18
J10
CBUS_DATA<6>
18
H12
CBUS_DATA<7>
18
C5
CBUS_DATA<8>
18
B4
CBUS_DATA<9>
18
B3
CBUS_DATA<10>
18
M12
CBUS_DATA<11>
18
J11
CBUS_DATA<12>
18
K13
CBUS_DATA<13>
18
J12
CBUS_DATA<14>
18
H11
CBUS_DATA<15>
18
39 18

H4
K8
M13
N2

DRAWING NUMBER
SHT
NONE
REV.
051-6338 C
SCALE

APPLE COMPUTER INC.
CARDBUS
SIZE
L3
A0/CAD26 C7
A1/CAD25 D7
A2/CAD24 B7
A3/CAD23 D10
A4/CAD22 B12
A5/CAD21 C8
A6/CAD20 C9
A7/CAD18 A12
A8/CC/BE1* E11
A9/CAD14 F11
A10/CAD9 G11
A11/CAD12 G12
A12/CC/BE2* D9
A13/CPAR E12
A14/CPERR* D12
A15/CIRDY* C10
A16/CCLK B13
A17/CAD16 F10
A18/RSVD E13
A19/CBLOCK* A13
A20/CSTOP* E10
A21/CDEVSEL* D11
A22/CTRDY* C12
A23/CFRAME* A10
A24/CAD17 B10
A25/CAD19 B9
1
L11
VCCCB
VCCP
TPS2211
V_12 SSOI AVPP
V_5_1
V_5_2 AVCC0
V_3_1 AVCC1
V_3_2 AVCC2
OF
18 40
1
8
39 38 20
60-OHM-EMI
SIL1162 DVI-Compliant Transmitter
L22
GPU_VCORE
+3V_SLEEP
EXT_TMDS
0.01uF
20%
16V
2 CERM
402
10uF
C490
0.01uF
0.01uF
C530
0.01uF
20%
16V
2 CERM
402
20%
16V
2 CERM
402
20%
6.3V
2 CERM
805
C442
R3231
20%
16V
2 CERM
402
38 21 20 19 16 15 12
10K
5%
1/16W
MF
402 2
U47
RAGE_MOBILITY
M10-CSP64
64MB
BGA
B26
A26
+1_5V_AGP
N15
P15
VSS
R15
T13
37 12
AGP_AD<26>
T14
W16
37 12
AGP_AD<25>
37 12
AGP_AD<24>
V16
U16
37 12
AGP_AD<23>
37 12
AGP_AD<22>
T16
37 12
AGP_AD<21>
R16
R17
37 12
AGP_AD<20>
37 12
AGP_AD<19>
R18
37 12
AGP_AD<18>
GPU_VCORE_VDDCI
+3V_GPU
R3371
R309
39 29 24 19 18 17 14
38 21 20 19 12
47
MAIN_RESET_L 1
AGP_AD<16>
37 12
AGP_AD<15>
37 12
AGP_AD<14>
37 12
AGP_AD<13>
37 12
AGP_AD<12>
37 12
AGP_AD<11>
37 12
AGP_AD<10>
37 12
AGP_AD<9>
37 12
AGP_AD<8>
37 12
AGP_AD<7>
37 12
AGP_AD<6>
37 12
AGP_AD<5>
37 12
AGP_AD<4>
37 12
AGP_AD<3>
37 12
AGP_AD<2>
10K
5%
1/16W
MF
402 2
37 12
AGP_AD<0>
37 12
AGP_CBE<3>
37 12
AGP_CBE<2>
37 12
AGP_CBE<1>
37 12
AGP_CBE<0>
1K
1%
1/16W
MF
402 2
R397
38
19
21
AA28 AD24
W30 AD23
W27 AD22
V30 AD21
V28 AD20
V29 AD19
V27 AD18
U30 AD17
U28 AD16
R27 AD15
R29 AD14
P28 AD13
P30 AD12
P27 AD11
P29 AD10
N28 AD9
N30 AD8
M30 AD7
M27 AD6
M29 AD5
L28 AD4
L30 AD3
L27 AD2
L29 AD1
K28 AD0
AGP_FRAME_L
AGP_IRDY_L
37 12
AGP_STOP_L
37 12
AGP_DEVSEL_L
37 12
AGP_PAR
37 12
AGP_REQ_L
37 12
AGP_GNT_L
12
1K
1%
1/16W
MF
402 2
C516 1
0.1uF
20%
10V
CERM 2
402
AGP_ATI_RESET_L
AH29 INTAB
AH30 RSTB
AGP_WBF_L
AE27 WBF
AGP_ATI_INT_L
4.7K
5%
1/16W
MF
402 2
C508 1
10uF
12
AGP_SBA<7>
12 37
AB29
AGP_SBA<6>
12 37
AC27
AC30
AGP_SBA<5>
12 37
AGP_SBA<4>
AD27
AGP_SBA<3>
12 37
AD30
AE28
AGP_SBA<2>
12 37
AGP_SBA<1>
12 37
AGP_SBA<0>
12 37
AE30
AGP_RBF_L
12 37
AG29
AC29
AGP_STP_L
AD28
AD24
AGP_SB_STB_L
AD29
AGP_SB_STB
12
37
12
37
+3V_GPU
12 19 20 21 38
R335
N1
N4
G30
G28
5%
1/16W
MF
2 402
R336
0
R324
47K
AB1
AC3
E28
E27
D30
B18
A3
G4
D29
C30
P4
A19
E2
C29
U2
V4
A30
A29
AB2
AC4
A28
B28
VSS B23
D28
K2
A23
C28
D27
K1
B22
L2
C27
A22
L1
D24
4.7K
5%
1/16W
MF
2 402
B7 MEMVMODE0
B6 MEMVMODE1
TEST_YCLK
TEST_MLCK
MEMTEST
PLLTEST
ATI_MEMIO_LO
1
R376
13
10
36 19
GPU_DVOD<5>
36 19
GPU_DVOD<6>
36 19
GPU_DVOD<7>
36 19
GPU_DVOD<8>
9
8
36 19
GPU_DVOD<9>
7
6
5
36 19
GPU_DVOD<10>
36 19
GPU_DVOD<11>
36 19
GPU_DVOD_DE
19
36 19
GPU_DVO_HSYNC
36 19
GPU_DVO_VSYNC
20
21
36 19
GPU_DVO_CLKP
12
SI_VREF_IDCK_N
11
NO STUFF
1
10K
10K
5%
1/16W
MF
402 2
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
R824
100pF
20%
2 6.3V
CERM
805
R828
36 20
ATI_DVOD<0>
GPU_DVOD<0>
36 20
ATI_DVOD<3>
GPU_DVOD<3>
36 20
ATI_DVOD<2>
GPU_DVOD<2>
GPU_DVOD<1>
19 36
(SET TO LOW SWING MODE)

+1_8V_GPU
SI_VREF_IDCK_N
1K
20%
10V
CERM 2
402
EXT_TMDS
GPU_DVOD<9>
19 36
GPU_DVOD<6>
19 36
GPU_DVOD<5>
19 36
36 20
ATI_DVOD<4>
GPU_DVOD<4>
GPU_DVOD<10>
19 36
GPU_DVO_VSYNC
19 36
ATI_DVOD_DE
GPU_DVOD_DE
19 36
36 20
ATI_DVO_CLKP
GPU_DVO_CLKP
19 36
L66
C409
ATI_OSC_OE
R290
0
TABLE_ALT_HEAD
5%
1/16W
MF
402 2
TABLE_ALT_ITEM
0.1uF
TMDS_DN<1> 19 22
37 39
36 19
SI_TMDS_DN<2>
OE
+3V_ATI_SS
GPU_SS
GPU_SS
1
1
C384
C390
10uF
0.1uF
20%
2 10V
CERM
402
GPU_SS
7 CRITICAL
GPU_SS
ATI_CLK27M_OSC_SS
NC
SSCLK 5
XOUT
36 20
FRSEL
CY25811_S1
CY25811_S0
NO STUFF
1
S1
S0
NC
OSC
SM
OUT
35
GPU_TMDS_CLKN
TMDS_CLKN
19 22 37
36 20
GPU_TMDS_CLKP
TMDS_CLKP
19 22 37
GND
R3151
1%
1/16W
MF
402 2
287
162
1%
1/16W
MF
402 2
GPU_TMDS_DN<0> 1
GPU_TMDS_DP<0> 2
33
5%
1/16W
MF
2 402
22 37 39
0
1
TMDS_DN<1> 19
22 37 39
36 20
GPU_TMDS_DP<1>
TMDS_DP<1> 19
22 37 39
5%
INT_TMDS 1/16W
SM1
C401
RP55
0
GPU_TMDS_DN<2> 1
2
36 20 GPU_TMDS_DP<2>
GPU_SS
36 20
TMDS_DN<2> 19
22 37 39
TMDS_DP<2> 19
22 37 39
5%
1/16W
SM1
2 ATI_CLK27M_OSC_SS 19
35
5%
1/16W
MF
402
(PLACE R315 CLOSE TO OSC)
20 35
M10 AGP INTERFACE

5%
1/16W
MF
2 402

ATI_SSCLK_IN
20
35
SIZE
APPLE COMPUTER INC.
22 37 39
TMDS_DP<0> 19
GPU_TMDS_DN<1>
DRAWING NUMBER
REV.
051-6338
SHT
NONE
TMDS_DN<0> 19
36 20
SCALE

R285
VSS
RP59
ATI_CLK27M_OSC 1
R320
35
22 37 39
5%
1/16W INT_TMDS
SM1
ATI_CLK27M_IN
ATI_SSCLK_UF
GPU_SS
1
22 37 39
TMDS_DN<2> 19
36 20
R305
CY25811
TMDS_DP<2> 19
20%
6.3V
2 CERM
805
VDD
SOI
1 XIN/CLKIN
RP54
G1
38
R298
4.7uF
20%
10V
CERM 2
402
VCC
U30
COMMENTS:
37 39
+3V_ATI_OSC_SLEEP
CRITICAL 14
5%
1/16W
MF
402 2
FERR-EMI-100-OHM
5%
1/16W
MF
2 402
TMDS_DP<1> 19 22
SI_TMDS_DN<1>
SI_TMDS_DP<2>
36 20
27MHZ
36 19
CLOSE TO ATI PIN AJ29)
GPU_SS
27M OSC
(PLACE THE OSCILLATOR AND R304 AND R305
S0=1;S1=M => -1.5% DOWN-SPREAD
5%
1/16W
MF
402 2
SI_TMDS_DP<1>
5%
INT_TMDS 1/16W
SM1
1/16W
SM1
SPREAD SPECTRUM SUPPORT
AD4
AE3
RP57
36 19
36 20
100K
37 39
EXT_TMDS
RP58
36 20
R304
37 39
TMDS_DN<0> 19 22
5%
1/16W
SM1
19 36
38
TMDS_DP<0> 19 22
22
GPU_DVO_HSYNC
INT_TMDS
SM NO STUFF
1
AD3
19 22 37
36 19
19 36
R297
19 22 37
TMDS_CLKN
RP53
19 36
ATI_DVO_HSYNC 1
ATI_DVO_VSYNC 2
L16
R289
TMDS_CLKP
5%
EXT_TMDS 1/16W
SM1
5%
EXT_TMDS 1/16W
SM1
5%
19
35
22
0K EXT_TMDS
NO STUFF
1
SI_TMDS_CLKN
RP60
20%
2 6.3V
CERM
805
SI_TMDS_CLKP
36 19
5%
1/16W
SM1
1%
1/16W
MF
2 402
ATI_DVOD<9>
SM
36 19
22
36 19
1K
36 20
ATI_DVOD<5>
EXT_TMDS
SI_TMDS_DP<0> 1
SI_TMDS_DN<0> 2
R839
19 36
ATI_DVOD<6>
19 22 37 39
470pF
EXT_TMDS
1
19 36
36 20
470pF
RP52
36 19
1%
1/16W
MF
2 402
36 20
36 20
C878
10%
50V
2 CERM
402
2 TMDS_DN<2>
10%
2 50V
CERM
402
R838
19 36
36 20
C874
GPU_DVOD<11>
19 36
19 20 21 38
FERR-EMI-100-OHM
EXT_TMDS
19
GPU_DVOD<8>
GPU_DVOD<7>
20%
10V
CERM
402
NO STUFF
470pF
SI_EXT_SWING_SET
19 22
37 39
22
TMDS_DN<1>
RP56
ATI_DVOD<11>
+3V_SLEEP
+3V_SLEEP
5%
1/16W
MF
402
NO STUFF
C872
20%
10V
CERM
NO402
STUFF
0.1uF
10%
50V
CERM 2
402
ATI_DVOD<8>
1/16W
SM1
AB3
AB4
G1
19 36
SI_TMDS_DN<2>
300
1/16W
SM1
AA4
197S0048
SI_TMDS_DP<2>
36 20
ATI_DVOD<7>
C867
R830
19 36
36 20
AD2
AA3
REF DES
SI_TMDS_DN<1>
Place C879 close

to SI pin#2
5%
0.1uF
10%
SI_TMDS_D2_STM 50V
CERM 2
EXT_TMDS 402
EXT_TMDS
19 36
EXT_TMDS
C866
470pF
SI_TMDS_DN<0> 19 36
39
37 22 19 TMDS_DP<2>
SI_TMDS_DP<1> 19 36
RP50
AC2
AD1
BOM OPTION
SI_TMDS_DP<0>
EXT_TMDS
1/16W
SM1
AC1
ALTERNATE FOR
PART NUMBER
19 36
W1
AA1
AA2
19 36
ATI_DVOD<10>
19 36
300
TMDS_DP<1>
C876
SI_TMDS_CLKP
0.1uF
36 20
SI_TMDS_D1_STM
EXT_TMDS
EXT_TMDS
5%
1/16W
MF
402
NO STUFF
SI_TMDS_CLKN
19 22 37 39
R829
39 37 22 19
C879 1
19 36
470pF
10%
2 50V
CERM
402
470pF
5%
7
C877
C873
10%
50V
2 CERM
402
5%
1/16W
MF
402 2
0K
TMDS_DN<0>
SI_MSEN
RP51
0K
330
5%
D2
10%
50V
CERM 2
402
R826
19 22
37
20%
10V
CERM
NO STUFF
402
470pF
EXT_TMDS1
0K
2
C2
D1
C871 1
1%
1/16W
MF
2 402
TMDS_CLKN
0.1uF
5%
1/16W
MF
402
NO STUFF
4.99K
RP49
1
36 20
300
R837
TXC+ 33
TXC- 32
C864
EXT_TMDS
20%
10V
CERM
NO 402
STUFF
10%
50V
SI_TMDS_D0_STM CERM 2
402
EXT_TMDS
EXT_TMDS
1
EXT_TMDS
470pF
C863
10uF
5%
2 50V
CERM
402
U58
D0
SIL1162
D1
TX0+ 36
TSSOP
D2
TX0- 35
D3
TX1+ 39
D4
TX1- 38
D5
TX2+ 42
D6
D7
TX2- 41
D8
D9
D10
D11
DE
HSYNC
EXT_SWING 30
VSYNC
IDCK+
VREF 2
IDCK-
R836
ATI_DVOD<1>
C1
NO STUFF
1
197S0318
C862
MSEN 48
PD*
EDGE/HTPLG
EXT_TMDS
1
10K
AE4
PART NUMBER
NO STUFF
1
E3
F3
Y2
1%
1/16W
MF
2 402
FOR 2.5 VDDR1

MEMVMODE0=1.8V
MEMVMODE1=GND
FOR 1.8 VDDR1
MEMVMODE0=GND
MEMVMODE1=1.8V
14
R819
Y4
Y1
B17
45.3
4.7K
GPU_DVOD<4>
E4
Y3
C14
R372
16
15
GPU_DVOD<3>
W3
W4
C15
D14
1
5%
2 50V
CERM
402
SCL/DK1
SDA/DK0
CTL3/A2
ISEL/RST*
U3
U4
D15
ATI_MEMTEST
GPU_DVOD<2>
36 19
36 19
36 19
T4
D17
C17
AC22 NC
GPU_DVOD<1>
17
W2
T3
25
38
18
V1
V2
C18
(PULL-UP to GPU_MEM_IO)
GPU_DVOD<0>
C7
D7
T2
C24
D18
E8
J6
C8
36 19
B8
A8
R2
T1
D25
C25
25
C875
EXT_TMDS
EXT_TMDS
C861
100pF
EXT_TMDS
G2
R1
VSS
27
47
44
G1
VSS
5%
1/16W
MF
2 402
SI_HPD
F1
F2
F27
5%
1/16W
MF
2 402
25
J3
J4
H27
F28
10K
SI_RST_L
H3
H4
J27
H28
10K
SI_A2
F4
H30
C5
5%
2 50V
CERM
402
SI_PD_L
19
J30
J29
5%
1/16W
MF
2 402
100pF
5%
2 50V
CERM
402
26
24
A1
B1
F29
GPU_THERM_DM
GPU_MEM_IO 19 21
SI_I2S_DATA
B2
E1
U1
100pF
R823 R825
10K
20
5%
1/16W
MF
402
B4
A2
G3
A10
R371
47
R8181
20
R833
1
B5
A4
D5
B3
+1_5V_AGP
GPU_THERM_DP
5%
1/16W
MF
402
NO STUFF
A5
B10
5%
1/16W
MF
402
ATI_DBI_LO_PU
D+ AC10
D- AC11
C3
D3
B15
D11
C859
EXT_TMDS
EXT_TMDS
1
1
NO STUFF
5%
1/16W
MF
402 2
SI_I2C_CLK
D4
B30
C19
P2
ATI_MEMIO_HI
1
47
D6
C4
H29
F30
C26
R832
5%
1/16W
MF
402 2
C6
N3
20K
5%
1/16W
MF
402 2
R4
10K
36 19
38
20
16
12
15
19
21
VSS
D26
D16
ATI_RSTB_MSK
ATI_DBI_HI_PU
VSS
EXT_TMDS
A9
N2
12 37
SM-1
+3V_SI_VCC
EXT_TMDS
+3V_SI_PLLVCC
EXT_TMDS
EXT_TMDS
1
C857
NO STUFF
R8351
A11
B9
L4
M3
L3
M4
47K
R3
A18
20%
6.3V 2
CERM
805
5%
1/16W
MF
2 402
20%
10V
2 CERM
402
37
19 TMDS_DP<0>
22
39
MAIN_RESET_L 14
39
29
24
19
18
17
B11
K3
0.1uF
AK3 VREFG
D8 VREF
ATI_MEMVMODE1
R375
AGP_ST<2>
J1
K4
J28
ATI_MEMVMODE0
ATI_MEMIO_HI
1
12
R325
C11
AGP_ST<1>
C408
20%
6.3V
2 CERM
805
5%
50V
2 CERM
402
0.1uF
5%
1/16W
MF
402
NO STUFF
PLL NOISE SHOULD BE LESS THAN 100mV PEAK-TO-PEAK
B12
A12
V3
C16
A15
5%
1/16W
MF
402 2
12
10uF
C854
10uF
C9
J2
E30
E29
+1_8V_GPU
4.7K
(PLACE C408 CLOSE TO AGPREF PIN)

AGP_ST<0>
G27
B29
R370
AGP_SUS_STAT_L_PU
AC28
DBI_LO Y25
DBI_HI Y27
G29
ATI_MEMIO_LO
1
20%
16V
CERM 2
402
R28 PAR
D19
P1 VSS
38 21 20 19
0.01uF
20%
6.3V
2 CERM
805
C10
D9
H2
H1
AF29 REQB
AF27 GNTB
PLACE VERF VOLTAGE DIVIDER

CLOSE TO ATI M10 VREF PIN
R3651
C412 1
AGP8X_DET_PU
B13
D10
B27
INT_AGP_VREF
D12
C12
A27
12
EXT_TMDS
C855
400-OHM-EMI
300
37 22 19 TMDS_CLKP
C13
C23
D23
GPU_AGP_TEST
U25
ST0 AF30
ST1 AF28
ST2 AE29
STP_AGPB
SB_STB
SB_STBS
RSTB_MSK
C20
D22
SM-1
EXT_TMDS
A13
D13
D20
12 37
AGP_BUSY_L
38 12
D21
C21
12 37
AGP_AD_STB_L<1>
SUS_STAT AJ28
SBA7
SBA6
SBA5
SBA4
SBA3
SBA2
SBA1
SBA0
RBFB
12 37
12 37
AGP_AD_STB_L<0>
AG28
K30
K29
AGP_AD_STB<0>
AGP_AD_STB<1>
C22
5%
1/16W
MF
2 402
5%
50V
2 CERM
402
R827
L80
100pF
C865
EXT_TMDS
+3V_SLEEP
EXT_TMDS
C860
100pF
20%
6.3V
2 CERM
805
L79
B14
A14
C858
10uF
400-OHM-EMI
A17
C856
EXT_TMDS
B16
A16
(2 OF 6)
B25
A25
20K
T28 TRDYB
T27 STOPB
T29 DEVSELB
AGP_ATI_VREF
1%
1/16W
MF
402 2
M28
Y29
AG30 PCICLK
U27 FRAMEB
T30 IRDYB
AGP_ATI_VREFG
1K
N29
W29
R30 CBEB1
N27 CBEB0
37 12
AGP_TRDY_L
AD_STB1
AD_STBB0
AD_STBB1
AGP_BUSYB
AGPREF
AGPTEST
AGP8X_DETB
1%
1/16W
MF
402 2
W28 CBEB3
U29 CBEB2
37 12
37 12
(1 OF 6)
AA30 AD27
AA27 AD26
Y30 AD25
CLK66M_GPU_AGP
GPU_MEM_IO
R3731
AB27 AD30
AA29 AD29
AB28 AD28
35 12
14
1K
AGP_AD<17>
AGP_AD<1>
R3881
1%
1/16W
MF
402 2
37 12
37 12
37 12
5%
1/16W
MF
402
+3V_GPU
RAGE_MOBILITY
M10-CSP64
64MB
AB30 AD31
BGA
AD_STB0
AGP_AD<28>
AGP_AD<27>
P25
MAIN_RESET_L IS TOGGLED FOR SLEEP
37 12
AGP_AD<29>
37 12
AE15
VDDCI F18
38 21 20 19 12
AGP_AD<30>
37 12
U6
38 19
AGP_AD<31>
37 12
T15
T12
R19
37 12
R338
47
U47
M15
(6 OF 6)
R3131
CRITICAL
A21
B19
RAGE_MOBILITY
M10-CSP64
64MB
BGA
+3V_SI_AVCC
EXT_TMDS
EXT_TMDS
1
1
EXT_TMDS
SM-1
U47
CRITICAL
M2
P3
SI_TMDS_CLK_STM
EXT_TMDS
CRITICAL
49
20%
16V
2 CERM
402
23
4
0.01uF
C458
37
1
C457
28
C476
400-OHM-EMI
PVCC1
46
PVCC2 40
AVCC 34
AVCC 22
VCC 3
VCC
+3V_GPU
43
38 21 20 19 12
PGND
PGND
AGND
AGND
AGND
GND
GND
GND
THRML
PAD
SM
Ext. TMDS source termination
L78
GPU_VCORE_VDDCI 19 38
45
31
29
19
1
OF
40
Int.TMDS Termination
U47
R374
162
GPU_TMDS_CLKP2
GPU_TMDS_CLKN
470pF
ATI_DVOD<2>
ATI_DVOD<3>
36 19
ATI_DVOD<4>
36 19
ATI_DVOD<5>
36 19
ATI_DVOD<6>
36 19
ATI_DVOD<7>
36 19
ATI_DVOD<8>
36 19
ATI_DVOD<9>
36 19
ATI_DVOD<10>
36 19
ATI_DVOD<11>
470pF
10%
50V
CERM 2
402
10%
2 50V
CERM
402
GPU_TMDS_D0_CMF
INT_TMDS
R367
36 20 19
162
2
GPU_TMDS_DP<0>
38 21 20 19 12
R369
1%
1/16W
MF
402
INT_TMDS
162
1 GPU_TMDS_DN<0> 19
20 36
INT_TMDS
1
R389
470pF
470pF
10%
50V
CERM 2
402
NC AG10
NC AG11
NC AH11
INT_TMDS
INT_TMDS
R362
162
36 20 19
2
GPU_TMDS_DP<1>
R355
1%
1/16W
MF
402
INT_TMDS
1 GPU_TMDS_DN<1>
1%
1/16W
MF
402
INT_TMDS
C487 1
36 19
ATI_DVO_HSYNC
36 19
ATI_DVOD_DE
36 19
ATI_DVO_CLKP
5%
1/16W
MF
402
10%
50V
2 CERM
402
ATI_AGP_FBSKEW<0>
20
ATI_AGP_FBSKEW<1>
20
ATI_X1CLK_SKEW<0>
20
ATI_X1CLK_SKEW<1>
20
ATI_BUS_CFG<0>
20
ATI_BUS_CFG<1>
20
ATI_BUS_CFG<2>
AH1 GPIO7
AG3 GPIO8
AF3 GPIO9
38 21 20 19 12
162
2
36 20 19 GPU_TMDS_DP<2>
1%
1/16W
MF
402
INT_TMDS
162
10K
ATI_GPIO12_SPN
5%
1/16W
MF
402 2
ATI_GPIO13_SPN
C469
ATI_TMDS_DN<0>
37 20
ATI_TMDS_DP<0>
INT_TMDS
37 20
ATI_TMDS_DN<1>
10
37 20
ATI_TMDS_DP<1>
37 20
ATI_TMDS_DN<2>
GPU_TMDS_DN<0> 1
20 19
36
5%
1/16W
MF
402 1
GPU_TMDS_DP<1>
20 19
ATI_TMDS_DN<0>
5%INT_TMDS
1/16W
MF
10 2 ATI_TMDS_DP<0>
1
GPU_TMDS_DP<0>402
2
INT_TMDS
20 37
20 37
5%
1/16W
20 37
MF
402
ATI_TMDS_DN<1>
37 20
ATI_TMDS_DP<2>
37 20
ATI_TMDS_CLKN
37 20
ATI_TMDS_CLKP
35 19
R762
36
20 19
10
AE1 GPIO15
M1 GPIO16
AJ12 TXCM
AK12 TXCP
AJ29 XTALIN
1K
AJ30 XTALOUT
NC
1 ATI_TESTEN AH24
5%
1/16W
MF
402
20 37
R766
R761
AK14 TX1P
AJ15 TX2M
AK15 TX2P
ATI_CLK27M_IN
R764
AJ13 TX0M
AK13 TX0P
AJ14 TX1M
R351
ATI_TMDS_DP<1> 20 37
INT_TMDS
5%
1/16W
10 2
MF36 GPU_TMDS_DN<2>
1
ATI_TMDS_DN<2>
19
402
20
5% INT_TMDS
1/16W
MF
4021 10 2 ATI_TMDS_DP<2>
INT_TMDS
19 GPU_TMDS_DP<2>
GPU_VCORE_CNTL_L
37 20
R767
10
1
GPU_TMDS_DN<1>
HPD_PWR_SNS_EN
470pF
10%
2 50V
CERM
402
R765
R760
22
ATI_SSCLK_IN
10%
50V
CERM 2
402
INT_TMDS 36
AF1 GPIO13
AE2 GPIO14
20
35 19
470pF
36 20 19
ATI_GPIO11_SPN
R380
1 GPU_TMDS_DN<2>
36
20
19
AG2 GPIO10
AF2 GPIO11
AG1 GPIO12
ATI_GPIO10_SPN
NO STUFF
1
1%
1/16W
MF
402
INT_TMDS
C479 1
+3V_GPU
20 19
36
10
1
GPU_TMDS_CLKN
2
ATI_TMDS_CLKN
5% INT_TMDS
1/16W
MF
10 2 ATI_TMDS_CLKP
GPU_TMDS_CLKP 402 1
R763
20 19
36
5%
1/16W
MF
402
22
GPU_Y
22
GPU_C
22
GPU_COMP
1
DIGON AE13
BLON AF13
22
FP_PWR_EN
22
INV_ON_PWM
HPD1 AF11
DP7
SOT-363
6
1
SOT-363
2
5
GPU_VCORE_PWR_SEQ
GPU_VCORE_SEQ_L
Q51
2N3904
10K
5%
1/16W
MF
2 402
R3681
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
10K
GPU_DVI_DDC_DATA
22
GPU_DVI_DDC_CLK
22
DDC2DATA AE12
DDC2CLK AF12
LVDS_DDC_DATA
22 39
LVDS_DDC_CLK
22 39
DDC3DATA AH26
DDC3CLK AH25
SI_I2S_DATA
19
SI_I2C_CLK
19
TXOUT_U0N AH18
TXOUT_U0P AG18
TXOUT_U1N AH19
TXOUT_U1P AG19
TXOUT_U2N AH20
TXOUT_U2P AG20
TXOUT_U3N AH22
TXOUT_U3P AG22
TXCLK_UN AH21
TXCLK_UP AG21
TXOUT_L0N AK16
TXOUT_L0P AJ16
TXOUT_L1N AK17
TXOUT_L1P AJ17
TXOUT_L2N AK18
TXOUT_L2P AJ18
TXOUT_L3N AK20
TXOUT_L3P AJ20
TXCLK_LN AK19
TXCLK_LP AJ19
GPU_VCORE_SEQ
1%
1/16W
MF
2 402
10uF
22 37
22 37
LVDS_U1P
21
22 37 38
LVDS_U2N
22 37
1%
1/16W
MF
2 402
NO STUFF
1
+1_8V_ATI_PVDD
(NO ICT TEST)
LVDS_U3P_TP
(NO ICT TEST)

39 38
19
22 37 20
CLKLVDS_UN
CLKLVDS_UP
22 37
LVDS_L0N
22 37 39
LVDS_L0P
22 37 39
GPU_VCORE
38
LVDS_L1N
LVDS_L1P
22 37 39
38 20
22 37 39
LVDS_L2N
22 37 39
LVDS_L2P
22 37 39
LVDS_L3N_TP
(NO ICT TEST)
LVDS_L3P_TP
(NO ICT TEST)
CLKLVDS_LN
22 37 39
CLKLVDS_LP
22 37 39
1%
1/16W
MF
2 402
BAS16TW
SOT-363
6 +2_5V_SLEEP_NECK1 1
38 1
C455 1
470pF
10%
50V
CERM 2
402
38 20
C465
220pF
5%
2 25V
CERM
402
NO STUFF
1
R344
0
5%
1/16W
MF
2 402
C526
20%
2 16V
CERM
402
C445
0.22uF
20%
2 6.3V
CERM
402
C446
0.22uF
20%
2 6.3V
CERM
402
C494
C498
20%
2 6.3V
CERM
402
0.22uF
C449
0.22uF
20%
2 6.3V
CERM
402
C509
0.22uF
20%
2 6.3V
CERM
402
C434
0.22uF
20%
2 6.3V
CERM
402
C510
0.22uF
20%
2 6.3V
CERM
402
21
20
R353
0
5%
1/16W
MF
2 402
1778_GND
G16
G17
AG4
AH4
0.01uF
20%
2 6.3V
CERM
402
C524
C525
0.22uF
0.22uF
20%
2 6.3V
CERM
402
20%
2 6.3V
CERM
402
C531
C528
0.22uF
C533
20%
2 6.3V
CERM
402
C512
0.22uF
C513
20%
2 6.3V
CERM
402
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
2 6.3V
CERM
402
20%
2 6.3V
CERM
402
C486
G20
G6
G21
G22
H6
P6
G23
AD26
G24
H7
V6
W6
H8
H23
H24
AC6
J7
J24
F7
F10
K7
AE10
K24
L7
F11
AE11
L24
0.22uF
C495
AF14
0.22uF
W26
AF15
20%
2 6.3V
CERM
402
20%
2 6.3V
CERM
402
+3V_GPU
M7
M24
N7
N24
P7
P24
R7
AE17
AC25
R24
AE18
T7
T24
F23
F24
1
R384
NO STUFF
1
R387
10K
NO STUFF
1
R386
10K
5%
1/16W
MF
2 402
NO STUFF
1
R382
10K
R383
10K
5%
1/16W
MF
2 402
10K
5%
1/16W
MF
2 402
NO STUFF
1
DP5
38
NO STUFF
1
2 +1_5V_AGP
BAS16TW
R393
38
12 15 16
19 20 21
SOT-363
3
4
5%
1/16W
MF
2 402
(GPIO0)
(GPIO1)
(GPIO2)
(GPIO3)
(GPIO4)
(GPIO5)
(GPIO6)
XW4
SM
GPU_VCORE_NECK
+GPU_VDD15_UF
+1_5V_AGP_NECK
10K
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
NO STUFF
1
NO STUFF
1
R396
NO STUFF
1
R395
NO STUFF
1
R391
R392
NO STUFF
1
U24
V7
V24
W7
N25
VSS W24
W25
V25
ATI_AGP_FBSKEW<0>
20
Y7
Y24
ATI_AGP_FBSKEW<1>
20
AA7
ATI_X1CLK_SKEW<0>
20
ATI_X1CLK_SKEW<1>
20
AA24
AB7
ATI_BUS_CFG<0>
20
AB24
ATI_BUS_CFG<1>
20
ATI_BUS_CFG<2>
20
AC7
AC8
AC23
NO STUFF
1
R394
R390
10K
10K
10K
10K
10K
10K
10K
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
AC24
AD7
AD8
AD9
AD10
38
+GPU_VDD15_NECK
AD11
AD12
AD13
GPU VCORE SUPPLY
AD14
AD15
R326
576K
5%
1/16W
MF
2 603
1%
1/16W
MF
2 402
AD17
AD18
AD19
AD20
R358
20%
25V
CERM 2
603
11
1778_FCB
GPU_CORE_OK
0.1uF
1 2
10
5 ITH
3 VRNG
38
ION 7
1778_ION
38
B00ST 16
TG 15
SW 14
38
1778_BST
38
1778_TG
SGND
6
VFB 8
PGND
2.1uH-11A
SM
OMIT
C704
18.2K
1%
1/16W
MF
2 402
C707
D29
SM
20%
25V
CERM 2
603
7
C705
HIGH_VCORE_DIVD
GPU_PWRMSR
R7861
CRITICAL
1
20%
6.3V 2
TANT
CASE-D4
+5V_MAIN
20%
2 6.3V
TANT
CASE-D4
330uF
MBRS130LT3
5 6
R3301
CRITICAL
1
330uF
CRITICAL
C711
100K
5%
1/16W
MF
402 2
330uF
20%
6.3V 2
TANT
CASE-D4
1.82K
0.1uF
1%
1/16W
MF
2 402
20%
10V
CERM 2
402
HIGH_VCORE
GPU_VCORE_CNTL_RC
GPU_PWRMSR
M10 CORE PWR/LVDS/TMDS
20
SO-8
C838
1
1
GPU_VCORE_CNTL_L 1
10K
2N7002DW
2 3
C712
SOT-363
2N7002DW
SOT-363

1
1
0.1uF
SIZE
20%
10V
CERM 2
402
APPLE COMPUTER INC.
DRAWING NUMBER
SHT
NONE
REV.
051-6338
SCALE
Q25
Q25
5%
1/16W
MF
402
NO STUFF
NO STUFF
20 38 39
R549
IRF7832
20K
1%
1/16W
MF
402 2
GPU_PWRMSR
1
R361
C846 1
GPU_VCORE_CNTL
20%
50V
CERM 2
402
XW6
SM
22uF
0.001uF
20%
10V
2 CERM
402
1778_VFB
GPU_VCORE_SW_F
20%
2 10V
CERM
1210
1778_BG
13
39 38 20
R328
Q49
1778_VFB
19 20 38 39
GPU_PWRMSR
1
38
CRITICAL
38
GPU_VCORE
JUMPER
OPEN
L64
4 FCB
2 PGOOD
1%
1/16W
MF
402 2
1XW19 2
GPU_VCORE_SW
0.1uF
LTC1778
SSOP
1 RUN/SS
2.2
C481
U32
4.99K
3
38
5%
1/16W
MF
603
EXT INT VIN

VCC VCC
R329
CRITICAL
AD22
AD23
OMIT
SO-8-PWRPK
SOT23
0.1uF
AD21
20%
25V
CERM 2
1206
SI7860DP
D12
C431 1
1778_VRNG
C480
4.7uF
20%
25V
CERM 2
1206
Q48
1N914
+5V_MAIN
C708 1
4.7uF
CRITICAL
1778_VCC
1778_VIN
C706 1
AD16
WHEN VCORE_CNTL HIGH => 1.2V
R331
38
U7
F25
M25
R381
10K
XW9
SM
SOT-363
2
5
NO STUFF
1
R385
G18
G19
AF5
F6
AD6
AE6
0.22uF
20%
2 6.3V
CERM
402
C477
DP5
BAS16TW
XW5
SM
BG 12
1
20%
2 16V
CERM
402
0.22uF
0.22uF
20%
2 6.3V
CERM
402
1778_ITH
38
G15
1.0V = 0.8V * (1 + R329 / R330)
5%
1/16W
MF
2 402
38
G13
G14
WHEN VCORE_CNTL LOW => 1.0V
1778_GND 20
28 32 33
G12
R25
AB25
1.2V = 0.8V * (1 + R329 / (R328//R330))
20K
1778_ITH_RC
0.01uF
C441
+PBUS
20%
10V
2 CERM
1206
R339
38
0.22uF
5%
1/16W
MF
2 402
DP5
XW12
SM
18 26 32 33 34
1%
1/16W
MF
402 2
C529
+1_8V_PVDD_NECK
CRITICAL
5%
1/16W
MF
402 2
C440
20%
2 6.3V
CERM
402
C451
20%
2 6.3V
CERM
402
XW11
SM
LVDS_U3N_TP
4.7UF
4.7uF
63.4K
38
33K
C452
0.22uF
22 37
C466
R352
20%
2 16V
CERM
402
0.22uF
20%
2 6.3V
CERM
805
0.22uF
10K
38
LVDS_U2P
1778_SHDN_L
SM
C485
10uF
20%
2 6.3V
CERM
805
+2_5V_SLEEP
LVDS_U1N
Q52
C484
M10 Power Shut down Sequencing
LVDS_U0P
5%
1/16W
MF
2 402
2N3904
R555
1%
1/16W
MF
402 2
G10
G11
(5 OF 6)
G25
AE24
22 37
R327
499
G9
AF25
R333
38 21 20 19 12
LVDS_U0N
100K
SM
0.01uF
75
1%
1/16W
MF
2 402
R3661
DDC1DATA AH28
DDC1CLK AH27
R357
DCDC_EN
20 21
BAS16TW
SOT-363
3
4
20%
2 6.3V
CERM
805
R779
5%
1/16W
MF
402 2
10uF
20%
2 16V
CERM
402
DP7
3
1
0.01uF
AB6
F17 VDD15
C411
F13 VDDC
F14
AE14
38
SLEEP_L_LS5
20%
2 16V
CERM
402
GPU VCORE - 1.2V
20%
2 6.3V
CERM
402
1M
DP7
BAS16TW
C532
GPU_VCORE
22
5%
1/16W
MF
2 402
0.01uF
C482
38
+3V_GPU 12
19
0
BAS16TW
C505
VSS A20
VSS B21
R343
715
SSOUT AJ25 NC
C435
G7
G8
U47
RAGE_MOBILITY
M10-CSP64
64MB
BGA
AJ3
1
1778_BST_RC
5%
1/16W
MF
402 2
20%
2 16V
CERM
402
20%
2 16V
CERM
402
R360
75
1%
1/16W
MF
2 402
GPU_HPD
Place all TMDS 10 ohms

close to GPU
100K
0.01uF
20%
2 16V
CERM
402
0.01uF
R356
75
A24 VSS
R5561
R5581
10K
R359
20 37
5%
1/16W
MF
402 2
39 38 20 19
ATI_R2SET
38
100K
+1_5V_AGP
1%
1/16W
MF
2 402
+5V_MAIN
R5591
21 20
15 12
19 16
38
22
75
1%
1/16W
MF
2 402
R332
Y_G AK23
C_R AK24
COMP_B AK22
B24 VSS
B20 VSS
20 37
75
1%
1/16W
MF
2 402
C443
C407
10%
25V
2 X7R
402
AJ26 SSIN
NC
36 20
5%
1/16W
MF
20 37
402
TESTEN
75
22
20 38
1000pF
R341
ATI_RSET
AUXWIN AJ27 AUXWIN_PU
AH2 GPIO4
AJ1 GPIO5
AF4 GPIO6
20 21
+GPU_VDD15_UF
NO STUFF
1
R342
C448
(PUT ALL CAPs BELOW ATI ASIC)
ZV_LCDDATA14
ZV_LCDDATA15
ZV_LCDDATA16
ZV_LCDDATA17
ZV_LCDDATA18
ZV_LCDDATA19
ZV_LCDDATA20
ZV_LCDDATA21
ZV_LCDDATA22
ZV_LCDDATA23
AK1 GPIO2
AH3 GPIO3
ATI_GPIO9_SPN
R340
RSET AK25
R2SET AJ24
NO STUFF
1
R346
F12
L6
(500mA)
+1_5V_GPU_VDD15
T6
0.01uF
GPU_CORE_OK
1
NO STUFF
1
AJ2 GPIO0
AK2 GPIO1
ATI_GPIO8_PD
R350
GPU_B
AH5 ZV_LCDCNTL2
AG5 ZV_LCDCNTL3
ATI_GPIO7_SPN
INT_TMDS
22
AJ4 ZV_LCDCNTL0
AK4 ZV_LCDCNTL1
20
GPU_TMDS_D2_CMF
INT_TMDS
B AK26
3
4
19 20 36
1K
470pF
10%
50V
CERM 2
402
ATI_DVO_VSYNC
R378
C497
470pF
162
36 19
GPU_G
ATI_HSYNC
NC AK10
GPU_TMDS_D1_CMF
22
HSYNC AG26
H2SYNC AG24 NC
NC AH10
ZV_LCDDATA20_PU AJ10
10%
2 50V
CERM
402
G AK27
AK7 ZV_LCDDATA9
AG8 ZV_LCDDATA10
NC AK9
5%
1/16W
MF
2 402
GPU_R
ATI_VSYNC
NC AJ9
10K
5%
1/16W
MF
402 2
C507
R840
10K
22
38
R AK28
VSYNC AG27
V2SYNC AG25 NC
NC AH9
EXT_TMDS
1
2
0805
AG7 ZV_LCDDATA6
AH7 ZV_LCDDATA7
AJ7 ZV_LCDDATA8
AH8 ZV_LCDDATA11
NC AJ8 ZV_LCDDATA12
NC AK8 ZV_LCDDATA13
TSOP
ROMCSB AE5 NC
AH6 ZV_LCDDATA3
AJ6 ZV_LCDDATA4
AK6 ZV_LCDDATA5
NC AG9
1%
1/16W
MF
402
INT_TMDS
C515 1
(3 OF 6)
AJ5 ZV_LCDDATA0
AK5 ZV_LCDDATA1
AG6 ZV_LCDDATA2
+1_8V_GPU
+3V_GPU
38 21 19
INT_TMDS
ATI_DVOD<1>
36 19
C522
36 19
19 20 36 36 19
1%
1/16W
MF
402
INT_TMDS
C536 1
162
1%
1/16W
MF
402
INT_TMDS
ATI_DVOD<0>
36 20 19
R377
36 19
FERR-220-OHM
GPU_TMDS_CLK_CMF
INT_TMDS
L17
Q23
SI3446DV
1
2
CRITICAL
CRITICAL
+1_5V_AGP
RAGE_MOBILITY
M10-CSP64
64MB
BGA
TERMINATION NETWORK SHOULD BE CONNECTED AS SHOWN

CMF LINE SHOULD BE ROUTED AS 4MIL SURFACE
TRACE SO THAT IT MAY BE CUT BETWEEN CAPS
INT_TMDS
38 21 20 19 16 15 12
CRITICAL
OF
20 40
1
(150mA MAX)
U34
+2_5V_SLEEP
MM1571J
1
C830 1
GPU_CORE_OK
21 20
CONT NOISE
1uF
21
38
38 21 20
ATI_PVDD_BYP
1
(140mA)
C459
10uF
C460
+2_5V_GPU_A2VDD 21 38
0.01uF
20%
6.3V
2 CERM
805
21 20 19
38
C553
20%
16V
2 CERM
402
C414
C413
0.01uF
0.1uF
20%
16V
2 CERM
402
20%
2 10V
CERM
402
C833
38
(AVDD+VDDDI=75mA)
+1_8V_GPU_AVDD
20%
16V
2 CERM
402
C427
10uF
C453
0.01uF
20%
16V
2 CERM
402
20%
6.3V
2 CERM
805
C450
0.01uF
20%
16V
2 CERM
402
+2_5V_GPU_A2VDD
AE21 A2VDD0
AF21 A2VDD1
38 21
+1_8V_GPU_AVDDQ
AJ23 A2VDDQ
+1_8V_GPU_VDDDI
+1_5V_AGP
L18
(2mA)
+1_8V_GPU_AVDDQ
1
1
C464
10uF
C463
38
+2_5V_GPU_MCLK
(20mA)
+1_5V_AGP_GPU
20%
16V
2 CERM
402
C438
0.1uF
C444
0.1uF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
C423
0.1uF
20%
10V
2 CERM
402
C424
0.1uF
(AVDD+VDDDI=75mA)
1
+1_8V_GPU_VDDDI
C478
10uF
C462
0.01uF
20%
6.3V
2 CERM
805
20%
16V
2 CERM
402
C454
0.01uF
38 21
20%
16V
2 CERM
402
C447
0.01uF
20%
16V
2 CERM
402
20%
16V
2 CERM
402
C425
0.01uF
20%
16V
2 CERM
402
L25
F5
G5
H5
AA25
J5
K5
K26
L26
L5
M26
M5
N5
N26
P26
P5
C417
0.01uF
20%
16V
2 CERM
402
38
FERR-220-OHM
C470
+2_5V_GPU_MCLK
C511
10uF
20%
6.3V
2 CERM
805
C527
0.01uF
20%
16V
2 CERM
402
0.1uF
20%
10V
2 CERM
402
21 38
0402
C539
20%
10V
2 CERM
402
C475
0.1uF
20%
10V
2 CERM
402
C419
0.1uF
20%
10V
2 CERM
402
V26
Y26
W5
VDDR1
AB26
AC26
CRITICAL
10uF
20%
6.3V
2 CERM
805
C471
C538
0.01uF
20%
2 16V
CERM
402
20%
2 16V
CERM
402
C504
0.01uF
20%
2 16V
CERM
402
C420
0.01uF
20%
2 16V
CERM
402
+1_8V_ATI_PVDD
38 21 19
L32
+1_8V_SLEEP
+1_5V_SLEEP
GPU_MEM_IO
38
(40mA)
+1_8V_GPU_PNLPLL
0402
1
R363
R275
38 21 20
+1_5V_AGP
+1_8V_GPU
12 15 16 19 20 21 38
C468
0.01uF
20%
6.3V
2 CERM
805
+1_8V_ATI_PVDD
20%
16V
2 CERM
402
L30
19 20 21 38
FERR-220-OHM
1.8V
1.5V
C493
10uF
5%
1/10W
FF
805 2
5%
1/10W
FF
2 805
MEMORY PLL - 1.8V
38
+1_8V_GPU_MEMPLL
+1_8V_GPU_TP_PLL
38 21
0402
1
C537
10uF
+2_5V_SLEEP
R319
0
5%
1/10W
FF
2 805
5%
1/10W
FF
805 2
L26
38
C499
10uF
+1_8V_GPU
L29
C500
0.01uF
20%
6.3V
2 CERM
805
20%
16V
2 CERM
402
MEMORY I/O
(1200mA)
C473
20%
16V
2 CERM
402
C421
C546
0.1uF
C545
38
R379
XW7
1
+2_5V_GPU 21
20%
6.3V
2 CERM
805
5%
1/10W
FF
2 805
OMIT
C514
10uF
+3V_GPU 12 19
C436
0.1uF
C544
C541
0.1uF
20%
10V
2 CERM
402
C437
C540
0.1uF
0.1uF
C542
0.01uF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
20%
10V
2 CERM
402
C547
20%
16V
2 CERM
402
F16
E26
F26
F21
F22
AF6
E11
E14
AE7
VDDR4 AF7
E15
AE8
E16 VDDR1
E17
AF8
AE9
E21
AF9
L81
FERR-10-OHM-500MA
VDDR3 AD25
E24
E25
AE25
AE26
C535
10uF
38
C519
0.1uF
20%
6.3V
2 CERM
805
20%
10V
2 CERM
402
C534
0.1uF
20%
10V
2 CERM
402
C521
INT_TMDS
1
R843
0.1uF
20%
10V
2 CERM
402
0
38
5%
+3V_GPU 12
1/16W
20
MF
2 603 FERR-10-OHM-500MA
L33
+3V_GPU_FLT
C491
0.1uF
C550
10uF
20%
2 6.3V
CERM
805
C880
0.1uF
20%
2 10V
CERM
402
AH16
DVOVMODE
TXVSSR1
TXVSSR2
TXVSSR3
AH12
AH13
ATI_DVOVMODE
AH14
R841
AG17
AH17
C518
0.1uF
20%
2 10V
CERM
402
C881
0.1uF
20%
2 10V
CERM
402
+1_8V_GPU
C520
0.1uF
20%
2 10V
CERM
402
C426
C430
0.1uF
20%
2 10V
CERM
402
3.3V IO SUPPLY
(Max Current varies, depends on usage)
0.1uF
20%
2 10V
CERM
402
19 20 21 38
EXT_TMDS
AF18
R842
INT_TMDS
1
5%
1/16W
MF
402
5%
1/16W
MF
402 2
(180mA)
+1_8V_GPU_PNLIO
1
C492
0.1uF
20%
10V
2 CERM
402
C496
0.1uF
20%
10V
2 CERM
402
M10 POWER
C489
0.1uF
20%
10V
2 CERM
402

C501
0.01uF
20%
16V
2 CERM
402
C506
0.01uF
20%
16V
2 CERM
402
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SHT
NONE
REV.
051-6338
SCALE
19
21
SM
LVSSR0
LVSSR1
LVSSR2
LVSSR3
AH15
2
SM
LPVSS AJ21
TPVSS AJ11
MPVSS A6
AE16 LVDDR_18
AF16 LVDDR_18
AG16 LVDDR_25
+1_8V_GPU_DVO
1
AF10
E22
E23
21
38
EXT_TMDS
J25
J26
E10
+1_8V_GPU 19 20
1.8V DVO POWER (EXT.TMDS)
H25
E7

1
20%
10V
2 CERM
402
0.1uF
20%
10V
2 CERM
402
F8
GPU POWER SOURCES - 1.5V, 1.8V, 2.5V & 3.3V
20%
10V
2 CERM
402
C543
0.1uF
C517
0.1uF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
0.1uF
20%
10V
2 CERM
402
20 21 38
3.3V
2.5V
0.1uF
C
1
38
JUMPER
OPEN
20%
10V
2 CERM
402
C488
20%
10V
2 CERM
402
0.1uF
20%
10V
2 CERM
402
C456
0.1uF
20%
10V
2 CERM
402
0402
1
0.1uF
Y6
AA6
F9
F15
AG14 TXVDDR2
AG15 TXVDDR3
GPU_MEM_IO_FLT
1
20%
6.3V
2 CERM
805
AB5
E20
AG12 TXVDDR0
AG13 TXVDDR1
0.01uF
C551
10uF
Y5
AA5
E18 VDDM
E19
AK21 LPVDD
AK11 TPVDD
(350mA)
38
0.01uF
20%
2 16V
CERM
402
2
0805
LVDS/TMDS - 1.8V
FERR-220-OHM
1
(4 OF 6)
AF17 LVDDR_25
21 38
+3V_SLEEP
E13
A7 MPVDD
+2_5V_GPU_PNLIO
L31
AF26
SM
38 21 20 19
E6
E12
C832
LVDS - 2.5V
FERR-10-OHM-500MA
2.5V
GPU_MEM_IO 19
+2_5V_SLEEP
10uF
20%
2 6.3V
CERM
805
20%
16V
2 CERM
402
(20mA)
R312
C831
+2_5V_GPU
ATI_MEMIO_HI
ATI_MEMIO_LO
1
1.8V
38 21
C523
0.01uF
20%
6.3V
2 CERM
805
+1_8V_SLEEP
20%
2 6.3V
CERM
805
GPU_MEM_IO
K6
R6
H26
E9
LVDS PLL - 1.8V
FERR-220-OHM
C835
G26
U47
RAGE_MOBILITY
M10-CSP64
64MB
BGA
E5
0.01uF
38 21 20
0.01uF
FERR-220-OHM
AC5
AD5
C472
20%
16V
2 CERM
402
0.01uF
U26
U5
V5
C483
5%
1/16W
MF
2 402
1_8V_TPVDD_STD
C834
10uF
AA26
(1800mA)
+2_5V_GPU_MEMCORE
1
0.1uF
0
1
38 21 19
21
38
R788
20%
2 16V
CERM
402
R5
T5
R26 VDDP
T26
MEMORY CORE - 2.5V
2
+1_8V_GPU_TP_PLL
0402
ATI_TPVDD_BYP
GND
VSSRH0 F20
VSSRH1 M6
0805
L28
VSS1DI AG23
VSS2DI AF19
F19 VDDRH0
N6 VDDRH1
Y28
K27
+2_5V_GPU
1
AH23 VDD1DI
AF20 VDD2DI
T25
+2_5V_GPU
FERR-220-OHM
38 21
C439
0.01uF
21 38
0402
1
CONT NOISE
+1_8V_ATI_TPVDD
A2VSSN0 AE19
A2VSSN1 AE20
10uF
L24
FERR-220-OHM
2
38
A2VSSQ AJ22
AVSSN0 AE22
AVSSN1 AE23
C422
20%
6.3V
2 CERM
805
20%
10V
2 CERM
402
+1_8V_GPU
GPU_CORE_OK
PVSS AK30
AVSSQ AF22
K25
L25
SM
0.01uF
20%
6.3V
2 CERM
805
38 21
AGP 4X I/O - 1.5V
FERR-10-OHM-500MA
21 38
0402
AK29 PVDD
AF23 AVDD0
AF24 AVDD1
38 21
38 21
+1_8V_GPU
21 20
VOUT
20%
10V
CERM 2
603
0402
0.01uF
38 21 20 19 16 15 12
VIN
1uF
FERR-220-OHM
20%
6.3V
2 CERM
805
L21
FERR-220-OHM
CRITICAL
1
L19
C552
FERR-220-OHM
21 20 19
38
20%
2 6.3V
CERM
805
10uF
C461
C418
10uF
0402
1
R787
0.01uF
L23
L75
SOT-25A
(21mA)
+1_8V_GPU_PLL
38
5%
1/16W
MF
20%
2 402
16V
2 CERM
1_8V_PVDD_STD
21
20 19 +1_8V_GPU
402
38
U60
MM1571J
2
0402
FERR-220-OHM
1
+1_8V_ATI_PVDD
GND
20%
10V
CERM 2
603
+2_5V_GPU
(150mA MAX)
+2_5V_SLEEP
FERR-220-OHM
VOUT
VIN
GPU PLL - 1.8V
L20
SOT-25A
CRITICAL
OF
21 40
1
7
VGA SYNC BUFFERS
+3V_MAIN
74AHC1G32
20
ATI_VSYNC
DVI DDC CURRENT LIMIT

(55mA requirement per DVI spec)
FERR-60-OHM-0.1A
SM
4 ATI_VSYNC_BUF1
U40
F2
+5V_SLEEP
VGA_VSYNC
L42
CRITICAL
38
+5V_DDC_SLEEP
22 38 39
400-OHM-EMI
0.5AMP-13.2V
22 39
0402
32
Power key detect path when

system is shutdown or asleep..
DDC_CLK is isolated from
NV17M DURING SHUTDOWN. WHEN
power key on remote device
is pressed, 5V will be driven
into DDC_CLK. Since host rails
will be low, TP0610 will turn
on, driving SOFT_PWR_ON_L low.
As host rails rise, TP0610
will turn off, as will remote
device path into DDC_CLK.
Isolation will be disabled as well.
EXTERNAL VIDEO (DVI) INTERFACE
OMIT
L38
+5V_DDC_SLEEP_UF
39 22
DVI_DDC_CLK_UF
Isolation required for DVI power switch
CRITICAL
OMIT
20
ATI_HSYNC
4 ATI_HSYNC_BUF1
CRITICAL
2 VGA_HSYNC
SYM_VER-1
39 37 19
2012H
TMDS_DN<0> 2
2
CHGND1
36
TMDS_DP<0> 1
3 TMDS_CONN_DN<0>
17
36 4
36
18
TMDS_CONN_DP<0>
36
36
SYM_VER-1
TMDS_DN<2>
39
19
37
19
11
L37
(TMDS_DN<5>)
(TMDS_DP<5>)
NC
21
22
13 NC
6
370-OHM
SM
SYM_VER-1
37 19
37 19
TMDS_CLKP
TMDS_CLKN
TMDS_CONN_CLKP
22 36 39
TMDS_CONN_CLKN
NC 20
NC
(TMDS_DN<4>)
12 NC
(TMDS_DN<3>)
NC
23
39
ANALOG FILTERING
PLACE CLOSE TO CONNECTOR
24
TMDS_CONN_CLKN
8
16
39 22
VGA_B
39 22
VGA_HSYNC
C3
L49
0.068uH
20
GPU_B
2 GPU_B_FILTR
5%
25V
2 CERM
201
VGA_B 22
4.7pF
0.068uH
C641
0.068uH
2 GPU_G_FILTR
22 39
VGA_G
22 39
1%
1/16W
MF
2 402
0.068uH
39
2 GPU_R_FILTR
VGA_R 22
4.7pF
S 1
GPU_DVI_DDC_DATA
0.1uF
20%
10V
2 CERM
402
HPD_4V_REF
20
2
4
5%
1/16W
MF
2 402
SOT-363
DVI_HPD
39 22
S 4
R472
100K
2N7002DW
GPU_HPD
DVI_HPD_UF
10K
20
R4841
10K
1%
1/16W
MF
402 2
R470
330
5%
1/16W
MF
2 402
HPD_REF_EN_L
Q40
2N7002DW
HPD_PWR_SNS_EN
SOT-363
S
1
R4831
470K
5%
1/16W
MF
402 2
CHGND2
5%
1/16W
MF
402
PLACE NEAR 3, 11 & 19
39
INVERTER INTERFACE
LCD INTERFACE
CHGND1
1%
1/16W
MF
2 402
+PBUS
LVDS INTERFACE
L73
FERR-1K-OHM-EMI
S-VIDEO/COMP OUT INTERFACE

2
38
R347
L54
TV_GND1
38 39
C657 1
LCD_DIGON_L
0.01uF
L53
GPU_Y
22 20
CRITICAL
3.3uH
38
R543
39
TV_COMP
39
R544
560pF
L56
FERR-10-OHM-500MA
1
20%
50V
CERM 2
402
5%
1/16W
MF
402 2
LVDS_DDC_CLK
20 22 39
LVDS_DDC_DATA
20 22 39
LVDS_L0P
11
LVDS_L1P
12
14
39 37 20
LVDS_L2P
15
39 37 20
CLKLVDS_LN
17
39 37 20
CLKLVDS_LP
18
DESCRIPTION
CRITICAL
LVDS_U0N
20
37 20
LVDS_U0P
21
37 20
LVDS_U1N
23
37 20
LVDS_U1P
24
DISCRETE,RES,33OHM,0402
L36,L38
BRIGHT_PWM
39
C816 1
0.001uF
C22
INV_ON_PWM
L1
FERR-250-OHM
SM
20%
10V
CERM 2
402
20
0.001uF
20%
2 50V
CERM
402
20%
50V
CERM 2
402
INV_GND
C19
0.1uF
5
1
U2
NC7S32
SC70
4
CHGND3
BRIGHT_PWM_UF
INVERTER EXPECTS ACTIVE HIGH SIGNAL

3
37 20
LVDS_U2N
26
37 20
LVDS_U2P
27
VIDEO CONNECTORS
37 20
CLKLVDS_UN
29
37 20
CLKLVDS_UP
30
R753
0
1
33

5%
1/16W
MF
402

C819
SIZE
0.01uF
CHGND4
20%
50V
CERM
603
39
SM-1
+3V_MAIN
20%
50V
2 CERM
402
400-OHM-EMI
1
C815
0.001uF
L72
SC70-6
20%
50V
CERM
402
5 G1
FP_PWR_EN
0.001uF
VGA_BUFFER_RES
20%
50V
CERM 2
603
4
1
FDG6324L
S1
CHGND1
+5V_INV_SW
Q76
C549
BOM OPTION
TABLE_5_ITEM
116S1331
2
39 38
22 20
D1
19
CHGND4
QTY
C813
16
37 20
SM-2MT
5
20%
2 50V
CERM
402
10uF
13
LVDS_L2N
J4
C812
0.001uF
20%
2 6.3V
CERM
805
FP_PWR_EN_L
10
LVDS_L1N
28
38 39
PART#
0.01uF
LVDS_L0N
39 37 20
0.001uF
TABLE_5_HEAD
C659 1
CRITICAL
25
10%
50V
CERM 2
402
TV_GND2
LVDS_DDC_DATA
20%
50V
CERM 2
402
G2
6
22
NO STUFF
SM
0.001uF
100K
100K pull-ups are for

no-panel case (development)
Panel has 2K pull-ups
11
CHGND1
560pF
Place GND shorts at

graphics controller
TV_Y
C701
C702
C658 1
GPU_TV_GND2
37 20
39
C664 1
10%
50V
CERM 2
402
XW14
SM
SM
10
0603
5%
1/16W
MF
402 2
10%
50V
CERM 2
402
L55
100K
560pF
3.3uH
FP_PWR_EN
39
RT-TH
C660 1
TV_C
MH11773-WMR8A
GPU_COMP
37 20
39
MINIDIN
10%
50V
CERM 2
402
560pF
20
Q28
LVDS_DDC_CLK
SM-1
5%
1/16W
MF
402 2
4
NC
22 20
39
22 20
39
37 20
39
37 20
39
CHGND4
J21
560pF
L57
10%
50V
CERM 2
402
Q29
+3V_SLEEP
0603
C661
20%
50V
CERM 2
402
D2
4 S2
100K
+3V_LCD
(LVDS DDC POWER)
0.001uF
SI3443DV
C656 1
GPU_C
C503
1
TSOP
2N7002
560pF
20
LCD_PWREN_L
5%
1/16W
MF
402
39 38
SM
100K 2
10%
50V
CERM 2
402
400-OHM-EMI
R7501
38
L74
SC70-6
+5V_INV_UF_SW
FDG6324L
F-RT-SM
34
FERR-250-OHM
SM
Q76
G-501973
20%
50V
CERM 2
402
L27
0603
C663
5%
50V
CERM
603
20%
50V
CERM 2
603
3.3uH
1
R354
FERR-10-OHM-500MA
SM
20
2200pF
5%
1/16W
MF
2 402
CHGND4
+5V_MAIN
J14
0.001uF
38
C474
39 38 1 +14V_INV
CRITICAL
C548
+3V_LCD_SW
100K
GPU_TV_GND1
SOT-363
LCD POWER SWITCH
MMDT3904
4
HPD_PWR_SW
1%
1/16W
MF
402 2
+3V_MAIN
Q35
100K
Place GND shorts at

graphics controller
XW15
SM
3
5
5%
1/16W
MF
402
R4821
75
0.25%
50V
2 CERM
402
10K
DVI_HPD_DIV
1%
1/16W
MF
402
20
R456
C631
R475
SM
R481
HPD_PWR_SW_BASE
U42
LMC7211
C653
3.3pF
5%
50V
CERM 2
402
SM
C632
C668
R463
1%
1/16W
MF
2 402
SM
2 DVI_DDC_DATA 6
100pF
5%
1/16W
MF
402
75
3.3pF
0.068uH
SOT-363
R464
R458
C634
0.25%
50V
2 CERM
402
L40
2N7002DW
5%
1/16W
MF
2 402
PLACE NEAR C5A & C5B

CHGND2
5%
50V
CERM 2
402
10K
5%
2 25V
CERM
201
20%
50V
CERM 2
603
4.7pF
L41
0.01uF
35
VGA_G 22
R485
75
100
1
Power key detect path
when system is running.
68.1K
HPD normally driven to
3.3V. When power key
1%
on remote device pressed,
1/16W
HPD will be driven to 5V.
MF
COMPARATOR ENABLED BY NV17MAP 402 2
GPIO.
5%
1/16WNOTE: Pulldown for DVI_HPD provided by DVI power switch interface
MF
402
32
SM
C635
GPU_R
34
R462
0.25%
50V
2 CERM
402
L43
SM
20
39
3.3pF
5%
50V
CERM 2
402
L44
VGA_R
Q40
Pulldown prevents
3904 from turning
on when DVI monitor
has active, selfpowered DDC clock
pullup.
20
R474
R469
DVI_HPD_UF
C667 1
SM
C642
GPU_G
C2
GPU_DVI_DDC_CLK
C655
C5A
C4
S 4
100pF
22 39
5%
1/16W
MF
402
(+5V_DDC SLEEP)
DVI_DDC_DATA_UF
0.068uH
SM
20
39 22
C1
C5B
L50
100
DVI_DDC_CLK_UF
VGA_VSYNC
SOT-363
DVI_DDC_CLK 3
R477
1
SOT-363
+3V_SLEEP
5%
1/16W
MF
2 402
Q39
5%
25V
2 CERM
201
15
39 36 22
100pF
37
(TMDS_DP<3>)
39 22
14
TMDS_CONN_CLKP
TMDS_DP<1> 39
19
10K
2N7002DW
5%
1/16W
MF
402
C654
MMDT3904
1
R480
100
37
Q35
1
5
Q39
R479
1
(TMDS_DP<4>)
22 36 39
39 36 22
4.7K
5%
1/16W
MF
2 402
TMDS_DN<1> 39
19
1
330
5%
1/16W
MF
402 2
+5V_DDC_SLEEP
R476
5%
1/16W
MF
402 2
L46
9 TMDS_CONN_DN<1> 90-OHM-300mA
2012H
SYM_VER-1
2 TMDS_CONN_DP<2>
4
10 TMDS_CONN_DP<1>1
3
R459
23 29 33 39
5%
1/16W
MF
402
1
39 38 22
10K
DVI_TURN_ON_ILIM
4.7K
39
R460
5%
1/16W
MF
402
DDC_CLK_ISO
R4781
TMDS_DP<2> 19 37
680
DVI_TURN_ON
+3V_SLEEP
CRITICAL
TMDS_CONN_DN<2>
3V LEVEL SHIFTERS
MBR0530
31
36
39 37 19
36
33
TMDS FILTERING
PLACE CLOSE TO CONNECTOR
D19
SM
2012H
L45
90-OHM-300mA
22 39
0402
32
J22
F-RT-TH
FERR-60-OHM-0.1A
SM
U39
CRITICAL
L47
90-OHM-300mA
QH1112
L36
5
74AHC1G32
R473
SM
SM-1
+3V_MAIN
SOFT_PWR_ON_L
DVI_TURN_ON_BASE
Q38
SM
PLACE L1002 & L1003 CLOSE TO DVI CONNECTOR
DVI POWER SWITCH
TP0610
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
CHGND3
SHT
NONE
REV.
051-6338
OF
22 40
1
SLEEP LED
LMU/RIGHT SENSOR CONNECTOR
TOP CONTACT ZIF KEYBOARD CONN

CONN,TOP CONTACT ZIF,0.8MM PITCH,30P,SM
Apple Part #: 518S0079
SMK Part #: CFP0630-0301
+5V_MAIN
CRITICAL
J11
+3V_MAIN
CFP0630
F-RT-SM
31
R6161
J19
54102
1
IO_RESET_L
39 13 11 6
INT_I2C_DATA0
39 13 11 6
INT_I2C_CLK0
PMU_LID_CLOSED_L
LMU_DETECT
23 29 39
SLEEP
12
23
KBD_LED1_OUT
13
14
LUX_ALS_GAIN_SW
23
23
KBD_LED2_OUT
15
16
LUX_ALS_OUT
23
PMU_SLEEP_LED
SLEEP_LED_SW_L
23 39
10
23 39
4.7K 2
39 23
ST7_SLEEP_LED_H
R300
+3V_MAIN
Q19
NOTE: KEEP FERRITE CLOSE TO CAP
2N3906
L68
CRITICAL
J8
29
CAPSLOCK_LED_L
5%
1/16W
MF
402 2
R577
0
NO STUFF
R754
100K
R173
5%
1/16W
MF
402 2
2
PMU_SLEEP_LED
39 23
39 29
KBD_Y<1>
39 29
KBD_Y<0>
39 29 23
KBD_X<9>
10
R2231
R6031
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
200
KBD_X<8>
11
KBD_X<7>
12
39 29 23
KBD_X<6>
13
39 29 23
KBD_X<5>
14
39 29 23
KBD_X<4>
15
KBD_NUMLOCK_LED
16
(GND)
17
39 29 23
KBD_X<3>
18
39 29 23
KBD_X<2>
19
39 29 23
KBD_X<1>
20
39 29 23
KBD_X<0>
21
39 29 23
KBD_SHIFT_L
22
39 29 23
KBD_OPTION_L
23
39 29 23
KBD_COMMAND_L
24
39 29 23
KBD_CONTROL_L
25
39 29 23
KBD_FUNCTION_L
26
39
KBD_CAPSLOCK_LED
27
39
KBD_JIS
28
39
KBD_INTL
29
KBD_ID
2N7002DW
ST7_SLEEP_LED_H
30
23 39
39 29 23
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
32
1 SOT23-5
CHGND5
R1981
100K
SOT-363
74LVC1G125
4
39 29 23
R789 R138
LMU_DETECT
Q18
SLEEP_LED_DGND
CAPSLOCK_LED
CRITICAL
10%
50V
CERM 2
603
U21
39
23
PMU_SLEEP_LED_L
KBD_Y<2>
+3V_MAIN
10K
29
SLEEP_LED
470pF
5%
1/16W
MF
402
5%
1/16W
MF
402 2
C766
5%
1/16W
MF
2 402
3
39
KBD_Y<3>
39 29
KBD_Y<4>
39 29
39
SM-2MT
39 29
SM
1
R228
39 29 23
200
SLEEP_LED_UF
SM
+3V_MAIN
KBD_Y<5>
39 29
400-OHM-EMI
+3V_PMU
(GND)
NUMLOCK_LED
KBD_Y<6>
SOT-363
KBD_Y<7>
39 29
SM
1
NUMLOCK_LED_L
2N7002DW
20 NC
39 29
Q18
29
SM
1
5%
1/16W
MF
402
18
NC 19
2N3906
R154
23 39
17
2N3906
SLEEP_LED_I
Q58
ST7_SLEEP_LED_H
11
39 34 32 29 25
Q22
5%
1/16W
MF
402 2
SLEEP_LED_L
F-ST-SM
29 26 17
100
5%
1/16W
MF
402 2
CRITICAL
+3V_MAIN
R611 1
2.2K
5%
1/16W
MF
402 2
+3V_PMU
R569
39 29 23
KBD_ID
100K 2
5%
1/16W
MF
402
RP42
10K
LEFT LIGHT SENSOR CONNECTOR
5%
1/32W
25V
TRACKPAD/PWR BTN CONN
CRITICAL
J2
SM-2MT
5
+3V_PMU
+5V_SLEEP
+3V_MAIN
23
LUX_ALS_GAIN_SW
23
LUX_ALS_OUT
39 38
R163
L8
400-OHM-EMI
2
SM-1
L10
TPAD_TXD
C210
10
KBD_LED1_OUT
39
TPAD_F_TXD
39
LID_CLOSED_L
39
TPAD_F_RXD
23
PWR_BUTTON_L
KBD_LED2_OUT
20%
50V
CERM 2
402
23
PMU_LID_CLOSED_L
20%
50V
CERM 2
402
20%
50V
2 CERM
402
39 29 23
KBD_X<5>
39 29 23
KBD_X<7>
39 29 23
KBD_X<6>
39 29 23
KBD_X<4>
10K
L11
400-OHM-EMI
1
SOFT_PWR_ON_L
22 29 33 39
D9
SOT23
39 29 23
KBD_CONTROL_L
39 29 23
KBD_SHIFT_L
10
39 29 23
KBD_OPTION_L
39 29 23
KBD_FUNCTION_L
NC
39 29 23
KBD_X<8>
39 29 23
KBD_X<9>
39 29 23
KBD_COMMAND_L
15V
3
Connect caps, DZ1 to pin 6 via trace

1
DEBUG HELPERS
5%
1/32W
25V
2
Connect caps to pin 5 via trace
39 29 23
KBD_X<3>
23 29 39
C220 1
0.001uF
0.001uF
KBD_X<2>
SM
SM-1
C233
10
39 29 23
RP40
SM-1
1
SM-1
20%
50V
CERM 2
402
KBD_X<1>
400-OHM-EMI
1
C198
KBD_X<0>
39 29 23
L9
0.001uF
20%
50V
2 CERM
402
5%
1/16W
MF
402
0.001uF
23
0.001uF
L12
C188
SM
+3V_HALL_EFFECT
M-ST-5087
20%
2 50V
CERM
402
39 38
J10
C199
400-OHM-EMI
TPAD_RXD
+5V_TPAD_SLEEP
0.001uF
SM-1
29
39 38
400-OHM-EMI
29
CRITICAL
22
39 29 23
SM
NC
KEYBOARD PULLUPS
NO STUFF
R185
1
470K 2
5%
1/16W
MF
603
KEYBOARD/TPAD/SLEEP LED
PWR_BUTTON_L 23
NO STUFF

R190
1
470K 2
5%
1/16W
MF
603
PMU_RESET_BUTTON_L
29

PLACE "PMU RESET" IN SILK NEAR RESISTOR

SIZE
PLACE ON TOP SIDE NEAR FRONT EDGE OF BOARD
APPLE COMPUTER INC.
DRAWING NUMBER
SHT
NONE
REV.
051-6338
SCALE
PLACE "POWER BUTTON" IN SILK NEAR RESISTOR
OF
23 40
1
5
WIRELESS INTERFACE
HARD DRIVE INTERFACE (UATA100)

+3V_SLEEP
+5V_HD_SLEEP
PLACE SERIES R CLOSE TO INTERPID

3V_HD_LOGIC
+3V_SLEEP
R5731
RP19
NO STUFF
CRITICAL
R7391
D
EIDE SERIES TERMINATION
EIDE_DATA<8>
RP27
37 13
37 13
33
EIDE_DATA<10>
37 13
EIDE_DATA<11>
37 13
EIDE_DATA<12>
37 13
EIDE_DATA<14>
37 13
37 13
37 13
EIDE_DATA<15>
EIDE_DATA<1>
37 13
EIDE_DATA<0>
33
37 13
37 13
EIDE_DATA<3>
37 13
EIDE_DATA<4>
37 13
EIDE_DATA<5>
33
EIDE_DATA<7>
37 13
EIDE_CS0_L
37 13
EIDE_ADDR<1>
37 13
EIDE_ADDR<2>
33
33
33
33
C805
100pF
39
37
18
17
12
9
PCI_AD<31>
5%
50V
2 CERM
402 17
33
10
12
11
14
13
16
15
PCI_AD<25>
18
17
37 18 17 12
PCI_CBE<3>
39 37 18 17 12
PCI_AD<23>
EIDE_OPTICAL_DATA<14>
24 37 39
PMU_PME_L
AIRPORT_PCI_INT_L
PCI_AD<30>
PCI_AD<28>
19
22
21
24
23
26
25
PCI_AD<26>
PCI_AD<24>
24 37 39
12 17 18 37 39
9 12 17 18 37 39
37 18 17 12
AIRPORT_CLKRUN_L
33
PCI_AD<18>
9 12 17 18 24 37 39
36
35
PCI_AD<16>
9 12 17 18 37 39
38
37
40
39
PCI_FRAME_L
12 17 18 37 39
42
41
PCI_TRDY_L
12 17 18 37 39
44
43
PCI_STOP_L
12 17 18 37 39
46
45
PCI_DEVSEL_L
PCI_AD<15>
9 12 17 18 37 39
52
51
PCI_AD<13>
9 12 17 18 37 39
54
53
PCI_AD<11>
9 12 17 18 37 39
PCI_AD<10>
56
55
ROM_RW_L
58
57
PCI_AD<9>
9 12 17 18 37 39
39 37 18 17 12 9
PCI_AD<8>
60
59
PCI_CBE<0>
39 37 18 17 12 9
PCI_AD<7>
62
61
ROM_OE_L
64
63
PCI_AD<6>
9 12 17 18 37 39
39 37 18 17 12 9
PCI_AD<5>
66
65
ROM_ONBOARD_CS_L
68
67
PCI_AD<4>
9 12 17 18 37 39
PCI_AD<3>
70
69
PCI_AD<2>
9 12 17 18 37 39
72
71
PCI_AD<0>
9 12 17 18 37 39
74
73
39 37 18 17 12 9
PCI_AD<12>
39 37 18 17 12 9
39 12 9
39 9
39 37 18 17 12 9
39 12 9
PCI_AD<1>
76
75
NC
NC
78
77
NC
NC
80
79
83
82
ROM_CS_L
24 37 39
R747
33
24 37 39
24 37 39
5%
1/16W
MF
402 2
EIDE_OPTICAL_CS0_L
24 37 39
EIDE_OPTICAL_ADDR<1>
24 37 39
33
24 37 39
24 37 39
33
EIDE_OPTICAL_CS1_L
22
22
5%
1/16W
MF
402
EIDE_RST_L
EIDE_OPTICAL_DMA_RQ
UIDE_DATA<6>
37 13
UIDE_DATA<8>
37 13
UIDE_DATA<9>
33
37 13
37 13
33
37 13
33
UIDE_ADDR<0>
37 13
33
UIDE_ADDR<1>
37 13
UIDE_DATA<15>
37 13
UIDE_DATA<13>
33
33
UIDE_ADDR<2>
HD_DATA<6> 24 37
HD_DATA<8> 24 37
33
22
EIDE_OPTICAL_READ_L
EIDE_OPTICAL_WR_L
33
82
10K
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
J13
SM-M
EIDE_OPTICAL_INT
EIDE_OPTICAL_RST_L
50
49
48
EIDE_OPTICAL_RST_L
HD_DATA<8>
24 37
47
HD_DATA<9>
24 37
46
37 24
HD_DATA<5>
45
HD_DATA<10>
24 37
37 24
HD_DATA<4>
44
HD_DATA<11>
24 37
43
37 24
HD_DATA<3>
42
HD_DATA<12>
24 37
37 24
HD_DATA<2>
10
41
HD_DATA<13>
24 37
11
40
37 24
HD_DATA<1>
12
39
HD_DATA<14>
24 37
37 24
HD_DATA<0>
13
38
HD_DATA<15>
24 37
14
37
36
HD_DIOW_L
24 37
HD_IOCHRDY
24 37
13 37
37 13
HD_DMARQ
15
37 24
HD_DIOR_L
16
35
17
34
33
HD_INTRQ
HD_ADDR<2>
37 24
HD_DMACK_L
18
37 24
HD_ADDR<1>
19
32
20
31
37 24
HD_ADDR<0>
21
30
37 24
HD_CS0_L
22
29
23
28
24
27
25
26
+HD_LOGIC_SLEEP
HD_CS1_L
HD_DATA<14>
HD_ADDR<0>
24 37
R578
10K
20K
24 37
5%
1/16W
MF
2 402
5%
1/16W
MF
402 2
24 37
RP25
2
33
HD_CS0_L
24 37
5%
1/16W
SM1
HD_ADDR<1>
ANY SEQUENCING REQUIREMENT BETWEEN

+5V_HD_SLEEP AND +3V_SLEEP
24 37
RP23
4
33
5%
1/16W
SM1
HD_DATA<15>
24 37
HD_DATA<13>
24 37
HD_DATA<12>
24 37
RP25
3
33
5%
1/16W
SM1
HD_ADDR<2>
24 37
R214
2
33
HD_CS1_L
24 37
5%
1/16W
MF
402
TABLE_5_HEAD
24 37 39
24 37 39
39 37 24
46
24 37 39
39 37 24
45
24 37 39
44
39 37 24
43
24 37 39
39 37 24
42
24 37 39
39 37 24
10
41
24 37 39
39 37 24
11
40
24 37 39
12
39
39 37 24
EIDE_OPTICAL_DMA_RQ
13
38
EIDE_OPTICAL_WR_L
39 37 24
EIDE_OPTICAL_READ_L
14
37
EIDE_OPTICAL_IOCHRDY
39 37 24
EIDE_OPTICAL_DMAACK_L
15
36
EIDE_OPTICAL_INT
16
35
24 37 39
24 37 39
39 37 24
17
34
39 37 24
EIDE_OPTICAL_CS1_L
18
33
EIDE_OPTICAL_CS0_L
19
32
24 37 39
R5451
24 37 39
24 37 39
20
31
20K
21
30
5%
1/16W
MF
402 2
22
29
23
28
NC
24
27
25
26
R213
R2031
47
24 37 39
10K
NC
CRITICAL
BOM OPTION
516S0152
CONN,PLUG,0.5MM PITCH,1.5MM STACK,50P,GOLD
J12
CRITICAL
516S0152
J13
CRITICAL
5%
1/16W
MF
402 2
R199
37 13
UIDE_RST_L
33
5%
1/16W
MF
402
37 13
HD_RESET_L 24
37 13
UIDE_DIOR_L
22
5%
1/16W
MF
402
37 13
UIDE_DIOW_L
R216
1
UIDE_IOCHRDY
C284
10pF
82
HD_DMACK_L
24 37
HD_DIOR_L
24 37
INTERNAL I/O CONNECTORS
R215
24 37 39
37 13
22
5%
1/16W
MF
402
R200
24 37 39
37
R229
UIDE_DMACK_L
R542
5%
1/16W
MF
2 402
DESCRIPTION
TABLE_5_ITEM
10K
5%
1/16W
MF
2 402
5%
1/16W
MF
402 2
24 37 39
24 37 39
R2041
10K
10K
QTY
TABLE_5_ITEM
22
HD_DIOW_L 24
37
5%
1/16W
MF
402
HD_IOCHRDY 24

37
5%
1/16W
MF
402

5%
50V
2 CERM
402
SIZE
24 37 39
APPLE COMPUTER INC.
DRAWING NUMBER
IOCHRDY - UATA100 REQUIRES PULL-UP TO 3.3V
SHT
NONE
REV.
051-6338
SCALE
24 37
24 37
24 37 39
R242
33
5%
1/16W
MF
402
48
HD_DATA<6>
+3V_SLEEP
24 37 39
49
R5791
5%
1/16W
SM1
UIDE_CS1_L
R546
39 37 24
R251
1
2
HD_DATA<7>
HD_DATA<9> 24 37
38
50
37 24
RP23
2
5%
1/16W
SM1
UIDE_DATA<12>
HD_DATA<10>
5%
1/16W
SM1
33
5%
1/16W
SM1
RP25
37 13
HD_DATA<5> 24 37
RP23
3
5%
1/16W
SM1
UIDE_CS0_L
5%
1/16W
SM1
5%
1/16W
SM1
UIDE_DATA<14>
33
J12
1
37 24
HD_DATA<0> 24 37
HD_DATA<7> 24 37
RP21
3
HD_DATA<4> 24 37
5%
1/16W
SM1
UIDE_DATA<10>
33
RP21
RP21
NO STUFF
1
10K
5%
1/16W
MF
402
OMIT
CRITICAL
HD_RESET_L
37 24
5%
1/16W
SM1
5%
1/16W
SM1
9 12 39
39 37 24
24 37 39
5%
1/16W
MF
402
R217
1
EIDE_IOCHRDY
82
82
R262
5%
1/16W
MF
402
37 13
37 13
12 17 18 37
24 37 39
5%
1/16W
MF
402
EIDE_RD_L
EIDE_INT
R540
CRITICAL
R237
R268
37 13
HD_DATA<1> 24 37
PART#
5%
1/16W
MF
402
37 13
33
UIDE_DATA<4>
5%
1/16W
MF
2 402
PLACE PULLUP RESISTORS CLOSE TO INTREPID

5%
1/16W
MF
402 2
EIDE_DMARQ
EIDE_WR_L
RP21
OMIT
100K
R238
37 13
UIDE_DATA<5>
OPTICAL DRIVE INTERFACE (EIDE)
R5411
5%
1/16W
MF
402
RP19
5%
1/16W
SM1
+5V_SLEEP
R266
37 13
37 13
37 13
33
5%
1/16W
SM1
RP19
37 13
NC
EIDE_DMACK_L
33
SM-M
RP18
3
R570
HD_DATA<3> 24 37
HD_DATA<2> 24 37
RP25
5%
1/16W
SM1
5%
1/16W
SM1
RP28
1
24 37
5%
1/16W
SM1
RP23
5%
1/16W
MF
2 402
37 13
37 13
5%
1/16W
MF
402 2
37 13
5%
1/16W
SM1
UIDE_DATA<7>
10K
10K
37 13
R1961
RP28
4
37 13
47
49
PCI_AD<14>
37 13
12 17 18 37 39
50
39 37 18 17 12 9
RP19
5%
1/16W
MF
1 402
12 17 18 37 39
34
48
PCI_CBE<1>
HD_DATA<11>
RP18
5%
1/16W
SM1
10K
PCI_PAR
R234
EIDE_CS1_L
9 12 17 18 37 39
PCI_AD<20>
PCI_IRDY_L
22
UIDE_DATA<0>
9 12 17 18 37 39
AIRPORT_IDSEL
NO STUFF
37 13
9 12 17 18 37 39
PCI_AD<22>
5%
1/16W
SM1
9 12 17 18 37 39
29
24 37 39
24 37 39
R737
31
37 18 17 12
UIDE_DATA<2>
14 39
27
39 37 18 17 12
33
14 17 29 39
32
PCI_CBE<2>
RP18
37 13
30
PCI_AD<17>
UIDE_DATA<1>
5%
1/16W
SM1
5%
1/16W
SM1
9 12 17 18 24 37 39
12 39
28
24 37 39
AIRPORT_PCI_GNT_L
PCI_AD<19>
24 37 39
24 37 39
37 13
33
UIDE_DATA<3>
0
5%
1/16W
MF
402 2
12 35 39
PCI_AD<18>
24 37 39
CLK33M_AIRPORT
PCI_AD<21>
39 37 18 17 12 9
37 13
39 37 18 17 12
39
RP18
39 37 18 17 12 9
39 37 18 17 12 9
UIDE_DATA<11>
12 9 PCI_AD<29>
39 37 18
37 18 17 12 9 PCI_AD<27>
39
5%
1/16W
SM1
5%
1/16W
SM1
EIDE_ADDR<0>
5%
50V
CERM 2
402
RP26
RP28
37 13
5%
1/16W
SM1
RP28
33
24 37 39
5%
1/16W
SM1
RP24
RP30
33
24 37 39
5%
1/16W
SM1
5%
1/16W
SM1
24 37 39
RP24
1
RP27
37 13
5%
1/16W
SM1
5%
1/16W
SM1
EIDE_DATA<6>
RP26
RP27
33
5%
1/16W
SM1
33
AIRPORT_PCI_REQ_L
NO STUFF
5%
1/16W
SM1
RP24
37 13
33
F-ST-SM1
84
81
20
RP27
5%
1/16W
SM1
EIDE_DATA<2>
33
5%
1/16W
SM1
RP30
33
24 37 39
5%
1/16W
MF
402 2
RF_DISABLE_L
39 37 18 17 12 9
5%
1/16W
SM1
EIDE_DATA<13>
RP24
RP30
33
24 37 39
5%
1/16W
SM1
5%
1/16W
SM1
RP26
RP30
33
100pF
5%
1/16W
SM1
5%
1/16W
SM1
EIDE_DATA<9>
33
QT510806-L111
MAIN_RESET_L
39 12
37 13
10K
39
NO STUFF
C808
37 13
39 29 19 18 17 14
PLACE TERMINATORS NEAR INTREPID

RP26
J6
33
32 38
5V_HD_LOGIC
OF
24 40
1
LEFT I/O & AUDIO BOARD (LIO)
USB MODEM/SOFT MODEM
+5V_MAIN
OMIT
CRITICAL
J3
100K
+5V_MAIN
5%
1/16W
MF
2 402
+5V_MAIN
39 29
ADAPTER_DET
39 29
CHARGE_LED_L
39 17
NEC_LUSB_PPON
10
11
12
13
14
NEC_LUSB_OCI_UF
39 37 14
BT_USB_DM
39 37 14
BT_USB_DP
39 35 14
INT_I2S0_SND_MCLK
INT_I2S0_SND_LRCLK
39 14
15
16
17
18
39 25
1
17 37 39
NEC_USB_DAP
39
14
14 39
INT_I2C_CLK2
14 25 39
INT_I2C_DATA2
14 25 39
26
39 14
SND_HP_SENSE_L
27
28
SND_HP_MUTE_LO
25
39 14
SND_LIN_SENSE_L
29
30
SND_AMP_MUTE
25 39
31
32
NO STUFF
36
38
39
40
C818
20%
2 10V
CERM
402
CRITICAL
J17
C692
QT500166-L010
0.1uF
20%
2 10V
CERM
402
20%
2 6.3V
CERM
805
M-ST-SM1
J15
14
R5301
R752
10K
5%
1/16W
MF
402 2
5%
1/16W
MF
2 402
D
G
32 38
+5V_MAIN_AUD
32 38
INT_MOD_SYNC
14
INT_MOD_CLKOUT
INT_MOD_DTI
14
INT_MOD_BITCLK
14
39 14
INT_PU_RESET_L
+5V_MAIN
39 14
10
11
12
MODEM_USB_DP
13
14
COMM_RING_DET_L
15
16
COMM_SHUTDOWN
COMM_RESET_L
MODEM_USB_DM
13 29
1
+3V_MAIN_AUD
INT_MOD_DTO
14
39 25 14
INT_I2C_DATA2
39 25 14
INT_I2C_CLK2
PREVENTS POWER-ON POP AND

GENERATES ACTIVE HIGH SPKR MUTE
43
7
9
39 37 17
12
11
NEC_RUSB_OCI_UF 17
39 37 17
NEC_USB_DBP
14
13
NEC_RUSB_PPON
16
15
0.1uF
OMIT
20%
10V
CERM 2
402
38
R768
+3V_MAIN
14 37
39
14 37 39
14 29 39
SERIAL DEBUG INTERFACE
MODEM I2C ADDR ASSIGNED VIA FLEX CABLE
R769
100K
100K
5%
1/16W
MF
2 402
C829
0.1uF
25
20%
10V
2 CERM
402
5%
1/16W
MF
2 402
CRITICAL
J28
M-ST-5087
SND_HP_MUTE_LO
Q78
AUD_GND
+3V_MAIN
SND_HP_MUTE
QTY
DESCRIPTION
CRITICAL
BOM OPTION
CRITICAL
4
6
J3
Q78
39 14
COMM_TXD_L
10
COMM_DTR_L
14 39
39 14
COMM_TRXC
COMM_RTS_L
14 39
39 14
COMM_GPIO_L
COMM_RXD
14 39
SND_HP_MUTE_L
PLACE CLOSE TO CPU

MAIN1
5%
1/16W
MF
2 402
C763
0.1uF
VCC
Q59
R703
SM
2
37 25
THERM1_M_DP
THERM1_M_DM
ADT7460_VCORE_MON
14
39 14 13
INT_I2C_DATA1
16
39 14 13
INT_I2C_CLK1
37 25
THERM1_DP
C868
25 37
THERM1_DM
1000pF
37 25
10%
25V 2
X7R
402
R686
MF
402
THERM2_M_DP
Q46
R687
2N3904
SM
37 25
THERM2_M_DM
THERM1_DM
12
11
10
THERM2_DP
10%
25V
X7R 2
402
25
THERM2_DM
1000pF
37 25
13
25 37
C869
THERM1_DP
37 25
THERM2_M_DP
5%
1/16W
PLACE IN BETWEEN 3/5/1.5/2.5V PWR SUPPLY

MAIN2
37
THERM2_DP
37 25
THERM2_DM
SM
2
37 25
R702
37 25
37 25
R689
Q67
37 25
THERM2_A_DM
2N3904
SM
5%
1/16W
MF
2 402
THERM2_DP
25 37
19
THERM_L_OC
ADT7460_TACH3_TP
R808
100K
ADT7460_THERM_L
5%
1/16W
MF
2 402
25
2N7002DW
19
GPU_THERM_DM
39 38 25
25 37
39 25
25
SOT-363
25 37
R772
THERM2_DP
FAN1_PWM_L
0.1uF
1
2
39 38 25
FAN1_PWM
39 25
SM04B-SSR
M-RT-SM
5
+FAN_PWR
FAN2_TACH
FAN2_PWM
3
4
6
1
2N7002DW
4.7uF
25
FAN2_PWM_L
SOT-363
S
4
FAN/MODEM/SOUND/BACKUP BATT.
Q79
C669
20%
6.3V
2 CERM
805
25 37
5%
1/16W
MF
402
C850
20%
10V
2 CERM
402
J18
5%
1/16W
MF
2 402
FAN1_TACH
SOT-363
SOT-363
CRITICAL
10K
5%
SM04B-SSR
1/10W
M-RT-SM
FF
5
805
+FAN_PWR
2N7002DW
25
Q79
NO STUFF
R547 CRITICAL
J1
4
THERM1_DM
ADT7460_THERM_L
+5V_SLEEP
Q83
2N7002DW
C814
4.7uF
20%
6.3V
2 CERM
805

THERM2_DM
25 37
5%
1/16W
MF
402

SIZE
DRAWING NUMBER
SHT
NONE
REV.
051-6338
SCALE
6
D
APPLE COMPUTER INC.
Q83
THERM2_A_DM
29
R661
25 37
THERM1_DP
NO STUFF
NO STUFF
THERM2_DM
R659
GPU_THERM_DP
5%
1/16W
MF
402
5%
1/16W
MF
402
5%
1/16W
MF
402
5%
1/16W
MF
402
CPU_THERM_DM_SPN
25 37
NO STUFF
NO STUFF
CPU_THERM_DP_SPN
25 37
R705
5%
1/16W
MF
2 402
25 39
ADT7460_ADR_ENABLE_L
GPU FAN
R700
THERM1_DP
R688
0
FAN2_TACH
+5V_SLEEP
10K
NO STUFF
THERM1_DM
100K
+3V_MAIN
25
R8071
R771
NO STUFF
THERM2_A_DP
THERM2_A_DP
3
37 25
5%
1/16W
MF
402
PLACE CLOSE TO BATTERY CHARGER/VCORE

ALTERNATE2
37 25
THERM1_A_DM
R817
25 39
FAN2_PWM_L
CPU FAN
5%
1/16W
MF
402
NO STUFF
THERM1_A_DM
FAN1_TACH
25 37
R701
1
+3V_PMU_AVCC
25
5%
1/16W
MF
402 2
NO STUFF
THERM1_A_DP
FAN1_PWM_L
100K
37 25
5%
1/16W
MF
2 402
5%
1/16W
MF
402
NO STUFF
1
2N3904
10K
5%
1/16W
MF
402 2
KEEP STUFFING RESISTORS CLOSE TO ADT7460 CONTROLLER
Q61
R773
10K
5%
1/16W
MF
2 402
25 37
THERM1_A_DP
10K
5%
1/16W
MF
402 2
38 29
PWM1/ 15
+2.5V/ QSOP
XTO
SMBALERT#
TACH1 6
SDA
ADT7460
CRITICAL
PWM2/ 5
SCL
SMBALERT#
7
TACH2
D1+
D1PWM3/ 8
ADR ENABLE#
4
D2+
TACH3
D2TACH4/ 9
ADR SELECT/
THERM#
GND
+5V_SLEEP
PLACE UNDERNEATH UPPER RAM

ALTERNATE1
R774 R4541
10K
5%
1/16W
MF
2 402
THERM_INV
5%
1/16W
MF
402
THERM2_M_DM
37 25
5%
1/16W
MF
402
R704
THERM1_M_DM
10K
U53
KEEP STUFFING RESISTORS CLOSE TO ADT7460 CONTROLLER
2N3904
R633 R7491
20%
10V
2 CERM
402
THERM1_M_DP
3
37 25
10%
6.3V
CERM 2
603
100K
PREVENTS POWER-ON POP AND

PROPAGATES ACTIVE LOW HP MUTE
ADT7460_VCC
1uF
R770
25
C849 1
14 39
1
SND_AMP_MUTE_CTRL
+3V_SLEEP
5%
1/16W
MF
402
2N7002DW
SOT-363
10
TABLE_5_ITEM
516S0154
FAN CONTROLLER
R806
TABLE_5_HEAD
PART#
SM
FAN INTERFACE
SOT-363
37 25
39
17 39
+5V_MAIN
20%
50V
CERM 2
402
10
2N7002DW
0.001uF
XW30
SM
37 25
C817 1
44
C828
37 25
NEC_USB_DBM
M-ST-SM1
14
+3V_MAIN
20%
50V
2 CERM
402
10uF
NO STUFF
0.001uF
SND_AMP_MUTE_L
2N7002DW
SOT-363
25
34
SND_AMP_MUTE_CTRL
Q77
SND_HW_RESET_L
24
37
100K
22
C689
CRITICAL
20
QT500166-L010
25
23
NO STUFF
C696
0.1uF
20%
2 6.3V
CERM
805
+3V_MAIN
14 39
21
35
20%
2 6.3V
TANT
SMD-1
INT_I2S0_SND_SCLK
19
33
SOT-363
23 29 32 34 39
2N7002DW
150uF
17 37 39
SLEEP
Q77
C848
C698
10uF
NEC_USB_DAM
PLACE NEAR CONNECTOR PINS 16
NO STUFF
SND_AMP_MUTE
Place it near J3
INT_I2S0_SND_TO_DAC
39 14
+5V_MAIN
+3V_MAIN
PLACE NEAR CONNECTOR PINS 15
39 17
RIGHT USB BOARD
R751
M-ST-SM
41
42
QT500406-L111
+3V_MAIN
OF
25 40
1
+3V_MAIN
C680
Ethernet routing priority:

1. Decoupling caps
2. TX SERIES TERMINATION - LOCATE NEAR LINK
3. RX SERIES TERMINATION - LOCATE NEAR PHY
10uF
LTC3405_SW 38
20%
6.3V
CERM 2
805
NO STUFF
1
R513
VIN
CRITICAL
U45
5%
1/16W
MF
402 2
L60
LTC3405
SOT23-6
1
RUN
MODE
3405_MODE
VFB
CRITICAL
R507
5%
1/16W
MF
402
35 13
CLKENET_LINK_RX
35 13
35
TX_CLK
RX_CLK
22
125CLK
CTRL10
C851
C852
10pF
CLKENET_PHY_GBE_REF
10
DVDD
5%
50V
CERM 2
402
402
37 13
ENET_PHY_TXD<0>
11
37 13
ENET_PHY_TXD<1>
12
37 13
ENET_PHY_TXD<2>
14
37 13
ENET_PHY_TXD<3>
16
37 13
ENET_PHY_TXD<4>
17
37 13
ENET_PHY_TXD<5>
18
37 13
ENET_PHY_TXD<6>
19
37 13
ENET_PHY_TXD<7>
20
TXD0
TXD1
TXD2
TXD3
TXD4
TXD5
TXD6
TXD7
CRITICAL
62
U43
67
88E1111
71
37 13
ENET_PHY_TX_EN
37 13
ENET_PHY_TX_ER
20%
2 10V
CERM
402
CLKENET_PHY_GTX
C601
0.01uF
20%
2 16V
CERM
402
C608
0.1uF
C619
0.01uF
C603
0.1uF
20%
2 16V
CERM
402
20%
2 10V
CERM
402
+2_5V_MARVELL
R4301
R4321
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
10K
1.5K
R422
14
INT_ENET_RST_L
1K
BCC
D15
37 13
ENET_LINK_RXD<0>
95
37 13
ENET_LINK_RXD<1>
92
37 13
ENET_LINK_RXD<2>
93
37 13
ENET_LINK_RXD<3>
91
37 13
ENET_LINK_RXD<4>
90
37 13
ENET_LINK_RXD<5>
89
37 13
ENET_LINK_RXD<6>
87
37 13
ENET_LINK_RXD<7>
86
37 13
ENET_RX_DV
94
37 13
ENET_RX_ER
37 13
ENET_CRS
84
37 13
ENET_COL
83
37 13
ENET_MDC
25
37 13
ENET_MDIO
24
14
23
ENET_ENERGY_DET
1N914
3
IO_RESET_L
28
ENET_RST_L
SOT23
27
ENET_COMA
AC_IN
SOT-363
20%
10V
CERM 2
805
Q32
D
4
34 33 32 20 18
2N7002DW
SLEEP_L_LS5
SOT-363
NC
82
NC
81
NC
77
NC
75
NC
79
NC
80
PLACES PHY IN "COMA" MODE WHEN

ASLEEP ON BATTERY (SAVES POWER)
ENET_HSDACP
37
ENET_HSDACM
38
CLK25M_ENET_XIN
55
CLK25M_ENET_XOUT
54
NO STUFF
R425
1
20K
TX_EN
TX_ER
PUT CRYSTAL CIRCUIT CLOSE TO PHY
53
ENET_VSSC
R442
0
5%
1/16W
MF
2 603
38 26
88
C597
0.1uF
20%
10V
2 CERM
402
C612
0.01uF
20%
16V
2 CERM
402
C623
0.1uF
C600
0.01uF
20%
10V
2 CERM
402
C598
0.1uF
20%
16V
2 CERM
402
VDDOX
C648
0.1uF
20%
10V
2 CERM
402
C645
0.1uF
20%
10V
2 CERM
402
0.1uF
PLACE CAPS AT CONNECTOR PINS 5 & 6
48
MJ-R0016
F-RT-TH
SM
1
35
C614
0.1uF
20%
10V
2 CERM
402
36
AVDD
J23
FERR-EMI-600-OHM
+2_5V_MARVELL_AVDD
40
C616
0.01uF
20%
16V
2 CERM
402
C618
0.1uF
C602
0.01uF
20%
10V
2 CERM
402
C592
PRIMARY
10uF
20%
16V
2 CERM
402
1CT:1CT
13
20%
6.3V
2 CERM
805
11
75 OHM
45
78
PLACE CAPS (IN ORDER) ON PINS 32/35, 36/40, 45 & 78
ENET_CTAP
ENET_CTAP
MDI_0+
MDI0+
MDI0MDI1+
MDI1MDI2+
MDI2MDI3+
MDI3-
29
39 37
MDI_P<0>
31
39 37
MDI_M<0>
33
39 37
MDI_P<1>
MDI_0MDI_1+
MDI_1MDI_2+
MDI_2-
LED_LINK10
LED_LINK100
LED_LINK1000
LED_DUPLEX
LED_RX
LED_TX
76
LED_LINK10
74
LED_LINK100
CONFIG0
CONFIG1
CONFIG2
CONFIG3
CONFIG4
CONFIG5
CONFIG6
65
(000)
64
(000)
63
(111)
MDC
MDIO
S_IN+
S_INS_OUT+
S_OUTS_CLK+
S_CLK-
TDI
TDO
TCK
TMS
TRST
HSDAC+
HSDAC-
RSET
XTAL1
XTAL2
SEL_OSC
SEL_2.5V
VSSC
NO STUFF
R441
0
5%
1/16W
MF
2 402
R4241
R4291
49.9
49.9
1%
1/16W
MF
402 2
1%
1/16W
MF
402 2
C604 1
C624 1
5%
50V
CERM 2
402
5%
50V
CERM 2
402
34
39 37
MDI_M<1>
39
39 37
MDI_P<2>
41
39 37
MDI_M<2>
42
39 37
MDI_P<3>
MDI_3+
43
39 37
MDI_M<3>
10
MDI_3-
69
R4331
R4351
R4371
R4391
1%
1/16W
MF
402 2
1%
1/16W
MF
402 2
1%
1/16W
MF
402 2
1%
1/16W
MF
402 2
49.9
73 NC
70 NC
49.9
49.9
R434
61
(110)
60
(111)
59
(101)
58
(000)
SEE CONFIG TABLES

(BELOW)
1
0.01uF
JTAG_ENET_TDI
13
50
JTAG_ASIC_TDO_TP
39
49
JTAG_ASIC_TCK
13 39
46
JTAG_ASIC_TMS
13 39
JTAG_ASIC_TRST_L
13 39
30
C622
20%
16V
2 CERM
402
44
47
MDI0_PD
1
C613
0.01uF
20%
16V
2 CERM
402
C615
0.01uF
20%
16V
2 CERM
402
J6
J7
J8
RJ45
CABLE SIDE
75 OHM
R440
49.9
1%
1/16W
MF
2 402
MDI2_PD
1
J4
J5
75 OHM
RJ45
CHIP SIDE
1%
1/16W
MF
2 402
MDI1_PD
J3
1CT:1CT
49.9
1%
1/16W
MF
2 402
J1
J2
1CT:1CT
R438
49.9
SECONDARY
75 OHM
14
R436
1%
1/16W
MF
2 402
1CT:1CT
12
49.9
LED_RX_SPN
68 NC
SHIELD
CHGND1
1000PF, 2000V
MDI3_PD
1
C617
0.01uF
20%
16V
2 CERM
402
PLACE RESISTORS CLOSE TO PHY
MARVELL 88E1111
ENET_RSET
56 NC
13
10/100/1000 ETHERNET
97
1
R428
R427
10K
CONFIG DEFINITIONS
4.99K
5%
1/16W
MF
2 402
1%
1/16W
MF
2 402
PIN
VDDO
LED_LINK10
LED_LINK100
LED_LINK1000
LED_DUPLEX
LED_RX
LED_TX
VSS
CLK25M_XTAL_IN
27pF
Y6 LOAD CAPACITANCE IS 16PF
C647
20%
10V
2 CERM
402
L35
38
25.0000M
20%
10V
2 CERM
402
Y5
SM-3
27pF
C646
0.1uF
20%
6.3V
2 CERM
805
PLACE CAPS (IN ORDER) ON PINS 5, 21/26, 48/52, 66/72, 88, 96
32
CRS
COL
COMA
10uF
20%
10V
2 CERM
402
CRITICAL
RX_DV
RX_ER
RESET
+2_5V_MARVELL
C595
66
72
RXD0
RXD1
RXD2
RXD3
RXD4
RXD5
RXD6
RXD7
INT-/
INT+
+2_5V_MAIN
20%
2 16V
CERM
402
GND
NO STUFF
CRITICAL
1%
1/16W
MF
2 402
R1
52
GTX_CLK
5%
1/16W
MF
402
182K
21
2.2uF
Q32
2N7002DW
30 29 28
R503
PLACE CAPS (IN ORDER) ON PINS 1, 6, 10/15, 57/62, 67/71, 85
49.9
C611
3
D
C599
VDDO
5%
1/16W
MF
402
29 23 17
10uF
20%
6.3V
2 CERM
805
0.01uF
20%
2 10V
CERM
402
26
5%
1/16W
MF
402 2
C674
85
VDDOH
35 13
C594
0.1uF
57
96
10K
10pF
5%
50V
Keep C851 & C852 Stubs short CERM
2
R431
1%
1/16W
MF
2 402
R2B
51 NC
15
NO STUFF
1
49.9K
6
35
5%
1/16W
MF
402
38 26
Sandwich each RJ54 pair between chassis grounds
R504
CLKENET_PHY_RX
5%
1/16W
MF
402
R445
1
CLKENET_PHY_TX
R421
1
5%
50V
CERM 2
402
VOUT = 0.8V*(1+R2EQV/R1)
R2EQV = R2A||R2B
R423
35
38
3405_VFB
PLACE ALL SERIES RES CLOSE TO PHY

2
22pF
1%
1/16W
MF
2 402 R2A
+1_0V_MARVELL
R506 C675 1
665K
5%
1/16W
MF
402 2
CLKENET_LINK_TX
GND
35 13
Must maintain 50-ohms trace impedance on all

MDI pairs and all RJ45 pairs
3.3uH
SW
SM1
All differential signals should be close,

parallel, matched lengths, with minimum
via count, and short if possible
BIT[2:0]
111
110
101
100
011
010
001
000

CONFIG INPUTS
PIN
CONFIG<0>
CONFIG<1>
CONFIG<2>
CONFIG<3>
CONFIG<4>
CONFIG<5>
CONFIG<6>
BIT[2]
PHYADR[2]
ENA_PAUSE
ANEG[3]
ANEG[0]
MODE[2]
DIS_FC
SEL_BDT
BIT[1]
PHYADR[1]
PHYADR[4]
ANEG[2]
ENA_XC
MODE[1]
DIS_SLEEP
INT_POL
BIT[0]
PHYADR[0]
PHYADR[3]
ANEG[1]
DIS_125
MODE[0]
MODE[3]
75/50 OHM
.

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6338
OF
26 40
1
SM-3
100uF
20%
2 10V
CERM
402
+1_95V_FW_PLLVDD
38
VOUT = 1.22*(1+R2/R1)+ IADJ*R2

IADJ = 30NA AT 25C
SYM_VER2
BYP
OUT 5
+1_95V_FW_PLLVDD
27 38
CRITICAL
R426
ADJ 4
1
R496
20%
10V
CERM 2
805
C610
0.01uF
16.2K
20%
2 16V
CERM
402
1%
1/16W
MF
2 402
R2
10uF
20%
6.3V
2 CERM
805
R420
1
27.4K2
5%
1/16W
MF
603
1%
1/16W
MF
402 R1
R413
1
U38
20%
16V
2 CERM
402
MSOP
NC
C625 1
NC
2.2uF
20%
10V
CERM 2
805
IN
NC
OUT 1
ADJ
NC
SHDN
C621
0.01uF
LT1962-ADJ
R443
16.2K
FW_CORE_BYP
C620
10uF
R509
20%
6.3V
2 CERM
805
R2
FW_CORE_ADJ
BYP 3
GND 4
5%
1/16W
MF
603
1%
1/16W
MF
2 402
38
R505
5%
1/16W
MF
2 402
27.4K
1%
1/16W
MF
2 402
C586
C596
1uF
20%
10V
CERM
603
+3V_FW_AVDD
1uF
20%
10V
CERM
603
20%
10V
CERM
603
0.1uF
1
1K
20%
10V
CERM
603
5%
1/16W
MF
402 2
5%
1/16W
MF
2 402
32
7
80
FW_PHY_LPS
R5021
AVDD
3.3
DVDD
DVDD
1.8
3.3
CRITICAL
DS0
DS1
LCLK
PLL
VDD
1.8
FW_PHY_LREQ
FW_PC_PU
66
FW_PC_PD
67
68
(PC0 IS MSB, PC2 IS LSB)
U36
LPS
PC0
PC1
PC2
CNA
CTL0
CTL1
(DS2) C/LKON
FW_LINK_DATA<4>
37 13
FW_LINK_DATA<5>
37 13
FW_LINK_DATA<6>
37 13
FW_LINK_DATA<7>
RP37
22
5%
1/16W
SM1
37
FW_PHY_DATA<2>
13
37
FW_PHY_DATA<3>
15
37
FW_PHY_DATA<4>
16
37
FW_PHY_DATA<5>
17
37
FW_PHY_DATA<6>
19
37
FW_PHY_DATA<7>
20
75
FW_PHY_RESET_L
35
FW_INPUT_PD
1
R517
36
1K
5%
1/16W
MF
2 402
C679 1
0.22uF
20%
6.3V 2
CERM
402
R514
1K
5%
1/16W
MF
402 2
FW_TESTM
78
FW_VREG_PD
73
R500
470
5%
1/16W
MF
402 2
D0
D1
D2
D3
D4
D5
D6
D7
22
5%
1/16W
MF
402
5%
1/16W
MF
603
35 27
RESETZ
22
CLKFW_LINK_PCLK
13 35
5%
1/16W
MF
402
C681
20%
SE
20%
10V
2 CERM
402
R501
C676
0.1uF
DSx Strap Options
20%
10V
2 CERM
402
0 = Bilingual port
1 = A-only port
79
27 35
R4881
NC
56.2
FW_PHY_CNTL<0>
27 37
10
FW_PHY_CNTL<1>
27 37
FW_LKON
R487
56.2
1%
1/16W
MF
402 2
C605 C607 1
1uF
1uF
20%
10V
2 CERM
603
1%
1/16W
MF
2 402
R4921
20%
10V
CERM 2
603
R491
56.2
1%
1/16W
MF
402 2
56.2
1%
1/16W
MF
2 402
13
46
(FW_TPA0P)
FW_TPO0P
45
(FW_TPA0N)
FW_TPO0N
53
(FW_TPA1P)
FW_TPA1P
28 37
52
(FW_TPA1N)
FW_TPA1N
28 37
28 37
39
28 37
39
(FWB-RX)
(FWA-RX)
59 NC
58 NC
FW_TPI0P
(FW_TPB0N)
FW_TPI0N
TPB1+
TPB1-
49
(FW_TPB1P)
FW_TPB1P
28 37
48
(FW_TPB1N)
FW_TPB1N
28 37
TPB2+
TPB2-
56
FW_TPB2_PD
38 28 27
55
FW_BIAS0
54
FW_BIAS1
27
R0
R1
23
FW_R0
22
FW_R1
35
FW_XI
26 NC
47
35
FW_OSC
OUT
OSC
SM-A
5%
1/16W
MF
402
R511
5%
1/16W
MF
402 2
(FWA-TX)
TABLE_ALT_HEAD
ALTERNATE FOR
PART NUMBER
OE
5%
1/16W
MF
402 2
197S0052
197S0011
BOM OPTION
REF DES
COMMENTS:
G2
Alt. for SunnyEMI Part
TABLE_ALT_ITEM
1 FW_OSC_EN
GND
5%
1/16W
MF
2 402
(FWB-TX)
PART NUMBER
100K
98.304M
100
R4861
R4121
G2
R510
XI
XO
VCC
60 NC
28 37
39
NO STUFF
CRITICAL
47
28 37
39
+3V_FW
C583
R4941
56.2
1%
1/16W
MF
402 2
R493 R4901
56.2
1%
1/16W
MF
2 402
56.2
1%
1/16W
MF
402 2
R489
56.2
1%
1/16W
MF
2 402
FIREWIRE PHY
A
0.22uF
20%
2 6.3V
CERM
402
FWB_TPB0
R499
C673
4.99K
220pF
FWB_TPB1
1
1%
1/16W
MF
2 402
C672
220pF
5%
25V
CERM
402
R498

4.99K
1%
1/16W
MF
2 402

SIZE
R512
6.34K1
APPLE COMPUTER INC.
1%
1/16W
MF
402
C682
0.1uF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
FW_PINT 13 37
1K
5%
1/16W
MF
2 402
0.1uF
PHY PINS 4,14
CLKFW_PHY_PCLK
PLLGND
1K
C677
5%
1/16W
MF
1 402
TESTM
DGND
0.1uF
(FW_TPB0P)
SM
VREG_PD
THRML
AGND
PAD
C683
41
TPBIAS0
TPBIAS1
TPBIAS2
CAPACITOR IN CONJUCTION WITH

INTERNAL PULLUP PROVIDES
RESET PULSE WHEN PHY FIRST
RECEIVES POWER
13 37
R518
1
CLKFW_PHY_PCLK
5%
25V
CERM
402
FW_LINK_CNTL<1>
42
TPB0+
TPB0-
28
37 13
12
25
11
FW_PHY_DATA<1>
76
FW_LINK_DATA<3>
FW_PHY_DATA<0>
37
72
37 13
37
64
38
FW_LINK_DATA<2>
5%
1/16W
SM1
37 13
RP38
22
TPA2+
TPA2-
14
CPS
62
FW_LINK_DATA<1>
TPA1+
TPA1-
61
FW_LINK_DATA<0>
BMODE
50
34
TPA0+
TPA0-
PD
43
74
FW_CPS
37 13
FW_PHY_CNTL<1> 1
13 37
10K
PINT
1MA (MAX) BUS HOLDERS
40
77
FW_PHY_PD
FW_BMODE
37 13
37 27
R516
SN0201029PFP
21
14
FW_LINK_CNTL<0>
PQFP
LREQ
81
1%
1/16W
MF
402 2
R417
1
C590
PLL
VDD
3.3
PCLK
402K
+1_95V_FW_DVDD_TX0
6.3V
2 CERM
805
(SYM_VER1)
(MAY PROVIDE POWER, OR

MAY REQUIRE UP TO 3W)
+1_95V_FW_DVDD_RX0
5%
1/16W
MF
402
PHY PIN 38
CLKFW_PHY_LCLK
PWR CLASS = 100
38
38
22
FW_PHY_CNTL<0>
R520
20%
10V
2 CERM
402
TSB81BA3A
+FW_PWR_OR
R519
37 27
R508
33
38 28 27
27 38
5%
1/16W
MF
603
FW_PORT1_SEL
37 13
0.1uF
20%
10V
CERM
402
PHY PIN 38
10uF
1K
5%
1/16W
MF
402 2
13
+1_95V_FW_DVDD
R419
C591
1uF
C678
1uF
20%
10V
CERM
603
R497
R515
35 13
38
38
1uF
1
C584
R1
+1_95V_FW_PLL400VDD
5%
1/16W
MF
2 402
1K
R444
+1_95V_FW_PLL500VDD
1K
5%
1/16W
MF
2 603
+3V_FW_AVDD_PORT1
+3V_FW_AVDD_PORT0
38
27 38
CRITICAL
3.3
C606
5%
1/16W
MF
603
C609
R495
+1_95V_FW_DVDD
38
PHY PIN 40
2.2uF
FW_PLL_ADJ
C671 1
3.3
5%
1/16W
MF
603 2
20%
10V
CERM
603
PHY PIN 50
GND
PHY PIN 21
FWPLL_BYP
R416
RX0
IN
R415
1uF
1
24
C593
5%
1/16W
MF
603
27 38
+3V_FW_AVDD_PORT2
PHY PIN 28
PHY PIN 61
U44
LTC1761ES5-BYP
SOT-23-1
PHY PIN 64
R418
1
2.2uF
PHY PINS 72,76
0.1uF
20%
2 10V
CERM
805
C589
2.2uF
C585
20%
2 10V
CERM
805
20%
2 10V
CERM
402
31 TX0
C588
C684
0.1uF
30
20%
10V 2
POLY
SMD-3
29
MBR0540
PHY PIN 25
D16
SM
70
10uF
N20P20%
50V
2 CERM
2320
C670
20%
2 10V
CERM
402
69
C587
0.1uF
18
C665
+1_95V_FW_DVDD_PORT1
5%
1/16W
MF
2 603
2
38
27 38
10
SM-1
+3V_FW_UF 38
R414
400-OHM-EMI
+1_95V_FW_DVDD
L34
71
65
FB
VOUT
GND ON/OFF
37
VIN
LM2594_IN
SDM20E40C
63
38
+3V_FW
CRITICAL
L59
220uH
57
SM
51
38 28 27
U37
LM2594
+5V_SLEEP
44
CRITICAL
+FW_PWR_OR
39
D25
SC-59
38 28 27
7
165MA MAX LOAD
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6338
OF
27 40
1
PORT POWER SWITCH

38 27
CRITICAL
+3V_FW
28
NDS9407
F3
SOI
1.5A-24V
1
38
7
2
6
38
+FW_SW
38 27
10K
+FW_PWR_OR
R448
470K
5%
1/16W
MF
402 2
+3V_PMU
C639
C630 1
C637 1
D23
BAV99DW
D21
D20
C638 1
100K
DP6
BAS16TW
5%
1/16W
MF
402 2
Q33
D
PMU_POWER_UP_L 5
20%
16V
2 CERM
402
514S0058
SM
CRITICAL
J20
FW_GATE_EN_RC
4
FW_POWER_UP
11
1
1
L58
30 29 26
AC_IN 2
5%
1/16W
MF
402
39 37 27
FW_TPO0N
37
FW_TPAO0P
(AREF)
37
FW_TPAO0N
L77
SM
FW_TPO0R
39
38
FW_VGND0
90-OHM-300mA
2012H
NC
SYM_VER-1
39 37 27
SOT-363
2
5
CRITICAL
FERR-250-OHM
BAS16TW
AC_IN_FW_CNTL
L51
SM
DP6
10K
FW_TPO0P
FERR-250-OHM
R446
39 37 27
SOT-363
BAS16TW
SOT-363
4
3
13
SYM_VER-1
2N7002DW
DP6
INT-SHIELD
90-OHM-300mA
2012H
+FW_PWR1
Q33
DCDC_EN
F-RT-SM
15
L76
6
38
33 32 20
1394B
CRITICAL
SOT-363
0.01UF
2N7002DW
32 29
C633
1.5AMP-33V
330K
F1
R4611
SOT-363
5
6
PORT 0
1394a/b
(BILINGUAL)
BAV99DW
SOT-363
2
20%
16V
CERM 2
402
D23
BAV99DW
0.01UF
FW_GATE_EN
SOT-363
6
POWER_UP 1
SOT23
20%
16V
CERM 2
402
SOT-363
2
1N5227B
20%
50V
CERM 2
402
R4471
5%
1/16W
MF
402 2
D20
BAV99DW
SOT-363
5
0.001UF
20%
10V
CERM 2
402
B340B
2
SM-1
0.1UF
0.01UF
400-OHM-EMI
2 +3V_FW_ESD_ILIM
5%
1/16W
MF
402
1
1
D24
SMB
+FW_PBUS
SM
CRITICAL
8
+3V_FW_ESD
L39
R451
Q34
+PBUS
FW_TPI0P
39 38
37
2
39 37 27
FW_TPI0N
37
FW_TPBI0P
(BREF)
+FW_VP0
(TPI0R)
FW_TPBI0N
TPA
TPA(R)
TPA*
VG
SC
VP
TPB
TPB(R)
TPB*
10
12
C650 1
R7771
14
INT-SHIELD
0.01uF
470K
5%
1/16W
MF
402 2
2
NO STUFF
R465
1M
C649
C652 1
0.1uF
5%
1/16W
MF
2 402
0.01uF
20%
2 50V
CERM
805
20%
16V
CERM 2
402
R466
0
5%
1/10W
FF
1 805
20%
16V
CERM 2
402
NO STUFF
1
C651
0.01uF
20%
16V
2 CERM
402
ENABLES PORT POWER WHEN

MACHINE IS RUNNING OR WHEN ASLEEP ON AC
CHGND1
CHGND1
28
+3V_FW_ESD
D22
D18
BAV99DW
BAV99DW
SOT-363
5
3
C640
0.01UF
20%
16V
CERM 2
402
BREF SHOULD BE HARD CONNECTED TO

LOGIC GROUND FOR SPEED SIGNALING
AND CONNECTION DETECTION CURRENTS
PER 1394B V1.33
SOT-363
2
6
AREF NEEDS TO BE ISOLATED FROM

ALL LOCAL GROUNDS PER 1394B SPEC
SO WHEN A BILINGUAL DEVICE IS
PLUGGED TO A BETA-ONLY DEVICE,
THERES NO DC PATH BETWEEN THEM
(TO AVOID GROUND OFFSET ISSUE)
D22
D18
BAV99DW
BAV99DW
SOT-363
2
C644
20%
16V
2 CERM
402
PORT 1
1394a ONLY
514-0057
L52
260-OHM-330MA
SM1
37 27
FW_TPA1P
0.01UF
SOT-363
5
SYM_VER-2
CRITICAL
J24
1394A
F-RT-TH
37 27
FW_TPA1N
FW_TPB1P
260-OHM-330MA
SM1
SYM_VER-2
4
3
L48
37 27
37 27
FW_TPB1N
39 37
FW_TPO1P
39 37
FW_TPO1N
39 37
FW_TPI1P
39 37
FW_TPI1N
39 38
+FW_VP1
FW_VGND1
CLEAR OUT ALL PLANES UNDER TRANSFORMERS

38
R471
0.01uF
20%
16V
2 CERM
402
5%
1/10W
FF
2 805
C662 C666 1
TPO
TPO#
TPI
TPI#
VP
VGND
7
FIREWIRE PORTS
10
0.01uF
20%
16V
CERM 2
402

CHGND1

SIZE
APPLE COMPUTER INC.
D
SCALE
DRAWING NUMBER
SHT
NONE
REV.
051-6338 C
28 40
1
OF
+3V_PMU
470K 2
10K
29
CHARGE_LED_L
R602
1
28 29 32
R582
10K
C255
SOFT_PWR_ON_L
C729
10uF
22 23 29 33 39
0.1uF
20%
10V
CERM 2
402
100K
4
IO_RESET_L
INT_RESET_L
100K
5%
1/16W
MF
402
23
NUMLOCK_LED_L
INT_SUSPEND_REQ_L
8 29
R596
23
PMU_BYTE
CAPSLOCK_LED_L
10K
39 23
KBD_Y<1>
85
39 23
KBD_Y<2>
84
39 23
KBD_Y<3>
83
39 23
KBD_Y<4>
82
39 23
KBD_Y<5>
81
39 23
KBD_Y<6>
80
39 23
KBD_Y<7>
79
PMU_NUMLOCK_LED_L
78
PMU_CAPSLOCK_LED_L
77
CHARGE_LED_L
76
29 25
39
29 28
32
2.2K 2
5%
1/16W
MF
402
29
R586
2
2.2K 2
5%
1/16W
MF
402
5%
1/16W
SM1
R587
1K
9 13 29
RP39
2
86
23 25 29 32 34 39
R597
5%
1/16W
SM1
SLEEP
5%
1/16W
SM1
RP39
100K
39 23
KBD_Y<0>
17 23 26 29
RP39
100K
29 23
PART#
C731 1
0.1uF
60
QTY
DESCRIPTION
IC,PMU,V81B
U29
BOM OPTION
29
PMU_CNVSS
39 33 29 23 22
14
29
5%
1/16W
MF
402
39 23
39 23
C
UNDERVOLTAGE RESET CIRCUIT
+3V_PMU
R267
1K
SOFT_PWR_ON_L
73
COMM_RING_DET_L
72
INT_WATCHDOG_L
71
KBD_X<0>
70
69
KBD_X<1>
39 23
KBD_X<2>
68
39 23
KBD_X<3>
67
39 23
KBD_X<4>
66
39 23
KBD_X<5>
65
39 23
KBD_X<6>
64
39 23
KBD_X<7>
63
39 23
KBD_X<8>
61
39 23
KBD_X<9>
59
IO_RESET_L
58
29 26 23 17
39 23
KBD_COMMAND_L
57
39 29 23
KBD_CONTROL_L
56
39 29 23
KBD_SHIFT_L
55
39 29 23
KBD_OPTION_L
54
KBD_FUNCTION_L
53
PMU_INT_L
52
5%
1/16W
MF
2 402
39
33
74
NC
39 25 14
75
PMU_POWER_UP_L
CPU_VCORE_HI_OC/PMU_AP should
have a pulldown for coming out of
reset. MLB will have a pull-up
to +3V_MAIN or +3V_SLEEP, which
will act as our pulldown since
both are off during PMU reset.
39 23
14
+3V_PMU_RESET
39 23
7
51
KBD_ID
50
CPU_PLL_STOP_OC
C370 1
49
NC
0.1uF
39 34 32 29 25 23
20%
10V
CERM 2
402
48
SLEEP
47
VCC
U26
MAX6804
INT_SUSPEND_ACK_L
46
29 8
INT_SUSPEND_REQ_L
45
OMIT
P50_WRL_WR
P51_WRH_BHE
M16C62
P52_RD
FLAS
P53_BCLK
P54_HLDA
P55_HOLD
P56_ALE
P57_RDY_CLKOUT
39 29
42
41
40
P70_TXD2_SDA_TA0OUT
P71_RXD2_SCL_TA0IN_TB5IN
P72_CLK2_TA1OUT_V
P73_CTS2_RTS2_TA1IN_V
P74_TA2OUT_W
P75_TA2IN_W
P76_TA3OUT
P77_TA3IN
38
37
35
34
33
32
31
30
29
P80_TA4OUT_U
P81_TA4IN_U
P82_INT0
P83_INT1
P84_INT2
P85_NMI
P86_XCOUT
P87_XCIN
27
26
25
24
23
22
P90_TB0IN_CLK3
P91_TB1IN_SIN3
P92_TB2IN_SOUT3
P93_DA0_TB3IN
P94_DA1_TB4IN
P95_ANEX0_CLK4
P96_ANEX1_SOUT4
P97_ADTRG_SIN4
29
GND
1
11
CLK10M_PMU_XIN
13
R580
38 29 25
29
96
+3V_PMU_AVCC
PMU_CNVSS
BYTE
XOUT
XIN
RESET
VREF
CNVSS
VSS
5%
1/16W
MF
402
R5811
0
12
62
14 17 18 19 24 29 39
39 30 29
29
INT_PU_RESET_L
13 25 29
PMU_CPU_HRESET_L
6 39
PMU_ACK_L
14
PMU_CLK
14
PMU_FROM_INT
14
PMU_TO_INT
14
PMU_REQ_L
14
PMU_LID_CLOSED_L
23 29 39
PMU_RESET_BUTTON_L
23 29
PMU_NMI_BUTTON_L
29
TPAD_RXD
23 29
TPAD_TXD
23 29
SYSTEM_CLK_EN
14
CPU_CLK_EN
PMU_CHARGE_V
30
PMU_CHRG_BATT_0
30
18
17
16
15
29
10K
PMU_NMI_BUTTON_L
29
7.15K1
7.15K1
10K
PMU_I2C_CLK
5%
1/16W
MF
402
PMU_I2C_DATA
98
93
92
91
90
89
88
87
CPU_SMI_L
POWER_VALID
29
PMU_PME_L
14 17 24 29 39
INT_PEND_PROC_INT
14
29 23
TPAD_RXD
Keep crystal subcircuit close to PMU.

CLK32K_PMU_XOUT
29
1K
PMU_POWERUP_OK
29
PMU_OOPS
29
THERM_L_OC
25
PMU_BATT_DET_L
1K
10M
+3V_MAIN
R249
0
5%
1/16W
MF
402
32.768K
1
29
CLK32K_PMU_XOUT_UF
39 29 24 17 14
29
PMU_I2C_DATA
29
PMU_SMB_CLK
29 30
PMU_SMB_DATA
29 30
R562
39 29 23
C339
12pF
PMU_LID_CLOSED_L
5%
50V
2 CERM
402
PMU_OOPS
+3V_PMU
38 31
10K
5%
1/16W
MF
402
A29 ADAPTER DETECTION

29 25 13
+4_85V_RAW
R561
1
INT_PU_RESET_L
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
2
R592
5%
50V
CERM 2
402
197S0604
197S0041
Y4
R348
100K
TABLE_ALT_ITEM
+3V_PMU
ADAPTER_DET
R364
52.3K
1%
1/16W
MF
1 402
1%
1/16W
MF
2 402
100K
C467
5%
1/16W
MF
2 402
0.1uF
20%
2 10V
CERM
402
25 39
100K 2
5%
1/16W
MF
402
TABLE_ALT_HEAD
12pF
5%
50V
CERM 2
402
100K 1
R594
29
Y5S LOAD CAPACITANCE IS 12PF
C728
5%
1/16W
MF
402
C340
12pF
5%
50V
2 CERM
402
10K
5%
1/16W
MF
402
94
8X4.5MM-SM
12pF
R575
2
PMU_PME_L
3
2
PMU_I2C_CLK
POWER_VALID
5%
1/16W
MF
402
29
NC
100K 1
2
5%
1/16W
MF
2 402
Y3
SM-2
26 28 30
R576
CRITICAL
AC_IN
10K
5%
1/16W
MF
402
5%
1/16W
MF
402
R564
2
TPAD_TXD
R248
29 30 39
R600
1
PMU_AC_IN
PMU_AC_DET
NO STUFF
5%
1/16W
MF
402
NC
10K
5%
1/16W
MF
402
29 23
R588
14
10K
+5V_SLEEP
29
10.0000M
C406 1
R563
CRITICAL
R598
5%
1/16W
MF
402
NC
NC
99
23
INT_PROC_SLEEP_REQ_L
+3V_SLEEP
R599
29
PMU_BATT0_DET_L
100
R585
2
PMU_SMB_CLK
CLK32K_PMU_XIN
5%
1/16W
SM1
1%
1/16W
MF
402
29
PMU_BATT1_DET_L_PU
10K
PMU_SMB_DATA
(CHARGE_I)
PMU_NMI_L
RP41
1
PMU_NMI_L
1%
1/16W
MF
402
R584
30 29
470K 1
5%
1/16W
MF
402
5%
1/16W
SM1
R589
2
RP41
Keep crystal subcircuit close to PMU.
Y4
470K 1
PMU_BATT_DET_L
14
PMU_EPM
Y3S LOAD CAPACITANCE IS 12.5PF
5%
1/16W
MF
402 2
CLK10M_PMU_XOUT_UF
10M
10
PMU_RESET_L
NO STUFF
PMU_BYTE
CLK10M_PMU_XOUT
MAIN_RESET_L
PMU_SLEEP_LED_L
19
95
P100_AN0
P101_AN1
P102_AN2
P103_AN3
P104_AN4_KI0
P105_AN5_KI1
P106_AN6_KI2
P107_AN7_KI3
AVSS
9 13 29
NC
NC
21
P40_A16
P41_A17
P42_A18
P43_A19
P44_CS0
P45_CS1
P46_CS2
P47_CS3
7 33
INT_RESET_L
30 29
20
P30_A8_D7
P31_A9
P32_A10
P33_A11
P34_A12
P35_A13
P36_A14
P37_A15
PMU_BATT1_DET_L_PU
5%
1/16W
MF
402
CPU_VCORE_HI_OC
PMU_INT_NMI
39
R591
29
NC
28
MR* RSET*
PMU KEYBOARD RESET CIRCUIT
43
36
P60_CTS0_RTS0
P61_CLK0
P62_RXD0
P63_TXD0
P64_CTS1_RTS1_CTS0_CLKS1
P65_CLK1
P66_RXD1
P67_TXD1
SOT143
PMU_KB_RESET_L
44
U29
P20_A0_D0
P21_A1_D1_D0
P22_A2_D2_D1
P23_A3_D3_D2
P24_A4_D4_D3
P25_A5_D5_D4
P26_A6_D6_D5
P27_A7_D7_D6
100K 1
5%
1/16W
MF
402
AVCC
P10_D8
P11_D9
P12_D10
P13_D11
P14_D12
P15_D13_INT3
P16_D14_INT4
P17_D15_INT5
PMU_POWERUP_OK
5%
1/16W
SM1
R261
TABLE_5_ITEM
341S1008
97
P00_D0
P01_D1
P02_D2
P03_D3
P04_D4
P05_D5
P06_D6
P07_D7
10K
PMU_RESET_BUTTON_L
TABLE_5_HEAD
VCC
14 17 18 19 24 29 39
RP41
25 29 38
(PMU_AP)
5%
1/16W
SM1
MAIN_RESET_L
5%
1/16W
MF
402
RP39
+3V_PMU_AVCC
20%
10V
CERM 2
402
14
100K 2
5%
1/16W
SM1
20%
10V
CERM 2
402
R560
1
4.7
5%
1/16W
MF
402
C724 1
0.1uF
20%
6.3V 2
CERM
805
5%
1/16W
MF
402
PMU_EPM
+3V_PMU
PMU_POWER_UP_L
5%
1/16W
MF
402
10K
25 29 39
5%
1/16W
MF
402
R583
1
+3V_PMU
RP41
R595
R593
5
39 33 29 23 22
SOFT_PWR_ON_L
39 29 23
KBD_CONTROL_L
SC70
4
U20 Y
PMU_KB_RESET_IN1
+3V_PMU
29
+3V_PMU
A29_DETECT
100K
NC7S32
1%
1/16W
MF
2 402
PMU_AC_DET
2
4
U33
Q30
LMC7211
R590
C277
0.1uF
20%
10V
CERM 2
402
+3V_PMU
5
1
SC70
4
A
2
NC7S32
U25 Y
PMU_KB_RESET_L
29 39
B
3
5
39 29 23
KBD_SHIFT_L
39 29 23
KBD_OPTION_L
NC7S32
SC70
4
U24 Y
ADAPTER
Q11 (65W)
ADAPTER IDs
ID RANGE
PIN VOLTAGE
1.65-2.31V
2.007-2.066V
A29 (45W)
2.31-2.97V
2.558-2.661V
AIRLINE
0.33-0.99V
0.589-0.663V
402K
A29_DET_L
1%
1/16W
MF
2 402
R349
127K
SM
S
2
5
A29_DET_REF
PMU
2N7002
SM
3
30
4.7M 2
1

5%
1/16W
MF
402

1%
1/16W
MF
2 402
PMU_KB_RESET_IN2

SIZE
B
3
KEEP CAP CLOSE TO ALL 3 OR GATES
APPLE COMPUTER INC.
DRAWING NUMBER
SHT
NONE
REV.
051-6338
SCALE
R345
OF
29 40
1
Q69
1K
SOI
39 38 31
2
1
S3
S2
+ADAPTER
C35
R212
0.1uF
C11 1
330K
10%
2 50V
X7R
603
S1
0.1uF
D4
D3
D2
D1
S3
S2
R51
20K
U3
47K
+3V_PMU
BKFD_PROT_GATE
R29
R402
C801
R161
97.6K
R15
10K
20%
16V
CERM 2
402
1%
1/16W
MF
402 2
5%
1/16W
MF
2 402
AC_IN
R771
30 29 28 26
AC_IN
R302
1M
57.6K
AC_IN_L
Q1
0.1%
1/16W
FF
2 603
D
2
S
R57
R821
4.7
D4
100K
GREATER THAN 13.1V DETECT
5%
1/16W
MF
402 2
1N914
1%
1/16W
MF
402 2
1%
1W
MF
2512
SOT23
3
R87
SWITCHER CURRENT CONTROL
R491
CHARGE DISABLED BY PMU OR INPUT VOLTAGE <18V
R731
R621
27.4K
1%
1/16W
MF
402 2
12.7K
C67
1uF
1%
1/16W
MF
402 2
CHARGE THROTTLED BY LOW BATTERY VOLTAGE
1772_CSSN
C71
R58
10K
1%
1/16W
MF
402 2
1%
1/16W
MF
2 402
OD OUTPUT LOW - WHEN AC GREATER THAN 18V
30
1772_ACOK_L
1772_VCTL
1772_ICTL
4.12K
1%
1/16W
MF
402 2
R7331
R7311
22
BST 25
QSOP
1%
1/16W
MF
402 2
1%
1/16W
MF
402 2
20K
BATTV_HIGH
R591
1772_IINP
1K
R561
100K
1772_CCI
1772_CCS
R75
Q4
2N7002DW
BATTV_LOW
SOT-363
5.23K
G
2N7002DW
SOT-363
S
4
PMU_CHARGE_V
R83
1%
1/16W
MF
2 402
+3V_PMU
R7411
1uF
38
R7291
100K
20%
10V
2 CERM
402
U57
SOT-363
C799
1%
1/16W
MF
402 2
BATT_LOW
+24V_PBUS
C97
SOT23
R96
4.7
5%
1/16W
MF
2 603
20%
25V
CERM 2
603
C96
6 7
1772_DLOV
38
C112
CRITICAL
Q70
C117
2.2uF
20%
50V
2 CERM
1812
C113
2.2uF
C115
2.2uF
20%
50V
2 CERM
1812
20%
50V
2 CERM
1812
20%
50V
2 CERM
1812
2.2uF
SM
CRITICAL
1772_DLO
37
1772_CSIP
37
1772_CSIN
1
0.1uF
1uF
0.1uF
XW1
SM
R941
1
10%
2 25V
X7R
402
R720
1
5%
1/16W
MF
603 2
R713
1
5%
1/16W
MF
603 2
C777
C795
4.7uF
20%
25V
2 CERM
1206
1
SO-8
C780
4.7uF
IRF7811W
1000pF
MBRS140T3
Q64
4
NO STUFF
1
1%
1W
MF
2512
D36
SM
CRITICAL
30 38
0.05 2
1
C99
20%
2 25V
CERM
603
20%
25V
CERM 2
603
20%
10V
2 CERM
603
6 7
+BATT_24V_FUSE
R715
10uH
SM1
C98 1
C41
+BATT_RSNS 38
L70
(GND)
C792
C785
C779
33uF
20%
2 25V
ELEC
SM1
4.7uF
20%
25V
CERM 2
1206
20%
25V
CERM 2
1206
20%
2 25V
CERM
1206
1
4.7uF
4.7uF
C790
4.7uF
20%
25V
2 CERM
1206
20%
25V
CERM 2
1206
5%
1/16W
MF
402 2
1772_CLS
1772_GND
+BATT_VSNS
BATTERY
CONNECTOR
R740
R471
499K
1%
1/16W
MF
2 402
6.34K
1%
1/16W
MF
402 2
= CELLS X (4.096 + (0.4096 * V
/ V
VCTL
100K
))
1%
1/16W
MF
402 2
REFIN
For 4.15V cells, VCTL = 0.123 REFIN
R735
100K
1%
1/16W
MF
2 402
J26
C807
30 29
ICTL
/ V
A29_DETECT
S
4
10%
2 16V
CERM
402
Q2
2N7002DW
SOT-363
BATTERY CHARGER
L4
FERR-EMI-100-OHM
+BATT_POS
(BATT_IN_PD)
39 38
39
BATT_CLK
39
BATT_DATA
PMU_BATT_DET_L
39
38
7
8
For 4.20V cells, VCTL = 0.245 REFIN
) * (V
0.047uF
1
SM
M-RT-SM
3
FERR-50-OHM
SM
87438-0833
D
1
L6
L5
FERR-EMI-100-OHM
BATT_DIV
CRITICAL
A29_CLS_ADJ
R7301
PMU_SMB_CLK

29

L3
29 39
FERR-EMI-100-OHM
BATT_NEG
L2
FERR-50-OHM
2
SM
PMU_SMB_DATA

29
SM
SIZE
REFIN
SM
APPLE COMPUTER INC.
DRAWING NUMBER
SHT
NONE
REV.
051-6338
SCALE
C116
20%
50V
2 CERM
1812
IRF7805
1772_LX
2.2uF
20%
50V
CERM 2
805
100K
1V65_REF
BATT
_62
WHEN AC IS IN, P-CHANNEL FETS ARE QUICKLY (DIODE) TURNED OFF
RC TIME IS 480K*10UF @ +3V_PMU
C853
= (0.2048/R
1772_DHI
R53
CHG
10uF
4.12K
LMC7211
SM
SOT-363
1772_BST_ESR
1772_BST
10K
20%
10V
CERM 2
603
C23
2N7002DW
1%
1/16W
MF
402 2
0.1uF
R541
1%
1/16W
MF
402 2
Q9
+BATT
2N7002DW
38
GND
8 9
BATT_14PBUS_EN
C118
0.1uF
38
SOT-363
Q72
0.1uF
1772_CELLS
20%
2 16V
CERM
402
1772_REF
1%
1/16W
MF
2 402
2N7002DW
CHARGE_DISABLE
5%
1/16W
MF
402 2
Q72
PMU_CHRG_BATT_0
REF CLS
3
4
SOT-363
5
2
BATT_24PBUS_EN
158K
20%
6.3V
CERM 2
805
0.01uF
0.1uF
5%
1/16W
MF
402 2
C42
20%
2 10V
CERM
402
+3V_PMU
100K
29
C24
1K
SOT-363
100K
BATT 17
2N7002DW
29
20%
16V
CERM 2
402
1772_CCV_RC
1
Q4
SOT-363
0.01uF
1%
1/16W
MF
402 2
C43
1K
Q71
2N7002DW
R551
Q71
1%
1/16W
MF
2 402
CSIP 19
CSIN 18
7 CCV
6 CCI
5 CCS
1772_CCV
1%
1/16W
MF
402 2
5%
1/16W
MF
402 2
20%
10V
CERM 2
603
BAS16TW
R102
D6
1N914
5%
1/8W
FF
1206
R52
DHI 24
LX 23
DLO 21
PGND 20
10K
5%
1/16W
MF
402 2
DP1
AC_IN_L_RC
1K
BATT_LOW_L
1uF
CRITICAL
10 ICHG
28 IINP
1772_ICHG
1772_LDO
1
26
CSSN
CELLS 16
LDO 2
R74
38
33
U6
13 RFIN
15 VCTL
14 ICTL
(+3V_PMU)
C95
MAX1772 DLOV
R7111
WHEN AC IS NOT PLUGGED, P-CHANNEL FETS ARE ON
0.47uF
11 ACIN
12 ACOK
1772_ACIN
BATT_14V_GATE
AC_IN_L
20%
50V
2 CERM
1206
27
CSSP
1 DCIN
1772_DCIN
38
20%
50V
CERM 2
1206
10K
0.47uF
20%
2 50V
CERM
1210
C809
SOT-363
47K
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
2 402
R725
PMU SELECTS BETWEEN TWO VOLTAGES
4.7
1772_CSSP 37
37
1772_ACOK_L
30
R7101
10K
SOT-363
2N7002DW
R7171
30
Q74
BATT_24V_GATE
Q74
GATE
R716
4
D
S1
0.0252
1
5%
1/16W
MF
1 402
D4
D3
D2
D1
5%
1/16W
MF
402 2
3
D
AC_GTR_18V 5
R61
470K
2N7002DW
SOT-363
CRITICAL
R22
SWITCHER VOLTAGE CONTROL
5%
1/16W
MF
2 402
Q2
2
31
OVER_18V_ADJ
2N7002DW
+3V_PMU
R744
PLACE U24 NEXT TO R382

2
1625_COMP
0.1%
1/16W
FF
2 603
S3
S2
R742
100K
2N7002DW
51.1K
82.5K
SOT-363
CRITICAL
1
42.2K
A29_DETECT
150
47K
+3V_PMU
30 29
1%
1/16W
MF
402
CURRENT_THRESHOLD
CRITICAL
1
R738
Q7
SUD45P03
SOI
ADAPTER_I_REG
0.1%
1/16W
FF
603 2
A29_CURRENT_ADJ
SOT-363
30
R7361
CRITICAL
Q6
R119
SOT-363
6
1
0.01uFCRITICAL
TO-252
BAS16TW
C826
20%
50V
2 CERM
603
2N7002DW
2
5%
1/16W
MF
402
1%
1/16W
MF
402 1
Q9
R41
+BATT_14V_FUSE
38
SI4435DY
DP1
U55
2 LMC7111
SOT23-5
Place close to RS-
0.1%
1/16W
MF
603 2
+BATT_24V_FUSE
CRITICAL
ROUTE LTC1625_ITH CAREFULLY

LTC1625_ITH
1%
1/16W
MF
402
10K
CRITICAL
0.1%
1/16W
FF
2 603
IAC_FB
R727
2
MAX4172_OUT
SOT-363
42.2K
NC
2.21K
2N7002DW
PG
NC1
NC2
OUT
GND
5
Q1
26 28 29 30
AC_DIV
1%
1/16W
MF
402 1
NC
5%
1/16W
MF
402 2
20%
10V
CERM 2
402
R745
RS-
BKFD_PROT_EN_L
LMC7211
SM
10K
NC
RS+
3
4
1V20_REF
R422
0.1uF
AC_ENABLE_L
U1
2
38 31
0.01uF
100K
1%
1/16W
MF
402 1
C803 1 R734
68K
5%
1/16W
MF
1 402
PLACE R383 CLOSE TO LTC1625
20%
10V
CERM 2
402
+24V_PBUS
TSSOP
38 30
0.1uF
CRITICAL
MAX4172
1
470K
SM-2
2
C794 1
0.01uF
V+
R7321
C36
20%
2 50V
CERM
603
CRITICAL
5%
1/16W
MF
402 2
1%
1/16W
MF
1 402
+3V_PMU
5AMP-125V
+PBUS
SM-2
20%
10V
CERM
402
+ADAPTER_SENSE 38
8
4
F4
5AMP-125V
+24V_PBUS
GATE
AC_ENABLE_GATE
S1
GATE
20%
50V
CERM 2
805
5%
1/16W
MF
402 1
D4
D3
D2
D1
IAC_RC_COMP
1%
1/16W
MF
402
D4
SI4435DY
SOI
F5
0.1uF
SI4435DY
M-RT-SM
C798
R728
2
Q68
J27
87438-0433
+PBUS CURRENT LIMIT
+ADAPTER_SW
38
CRITICAL
+BATT
BATTERY SWITCH-OVER CIRCUIT
DC INRUSH LIMITER
(POWER JACK, ETC. ON SEPARATE BOARD)
BACKFEED
PROTECTION
DP1
DC POWER INPUT
SOT-363
3
4
BAS16TW
OF
30 40
1
CRITICAL
Q15
FDG6324L
SC70-6
+5V_MAIN
3
D2
4 S2
R130
1625_EXTVCC 38
G2
6
470K
5%
1/16W
MF
402 2
1625_ENABLE_L
6
Q15
1
FDG6324L
5 G1
1625_ENABLE
12.8V PBUS SUPPLY
CRITICAL
D1
C134
0.1uF
SC70-6
S1
20%
2 10V
CERM
402
PBUS HOLD-UP CAPS

+24V_PBUS
CONNECT LTC1625 TK PIN AT TOP-SIDE FET

KEEP VIN/TK LOOP SHORT
+3V_PMU
6 7
1625_INTVCC 38
C772 1
1%
1/16W
MF
402 2
20%
10V
CERM 2
402
0.1uF
97.6K
2
38 30
1V20_REF
1
3
1625_DIV
R6731
10K
1M
30
1625_RUNSS
1625_COMP
C131
R1072
1%
1/16W
MF
402
1%
1/16W
MF
402 2
1N914
SOT23
R663
C137
16
15
2
3
5
1625_FCB 4
8
1625_VIN
D8
SM
Q17
5%
1/16W
MF
2 402
38
LMC7211
R120
0
U14
20%
50V
CERM 2
805
U13
LTC1625
VIN SSOP
BG
TK CRITICAL TG
SYNC VOSENSE
RUN/SS INTVCC
ITH
FCB
BOOST
VPROG
SW
SGND
5%
25V
CERM 2
603
1%
1/16W
MF
402 1
0.1uF
10
13
7
11
1625_BST_ESR
R122
2.2
5%
1/16W
MF
2 603
12
14
1625_BST
C135
10%
50V
2 CERM
603
WHEN +24V_PBUS IS BELOW ~13.1V,
C121
1625 IS SHUT-OFF
2.2uF
20%
2 35V
ELEC
SM-1
C753
2.2uF
20%
2 50V
CERM
1812
20%
2 50V
CERM
1812
+PBUS
38
1XW26 2
8.0uH-6.8A
SM1
C119
4.7uF
4700pF
SO-8
XW3
SM
158K
1%
1/16W
MF
2 402
C806 1
220uF
20%
25V 2
ELEC
SM
D32
SM
1
C138
2 3
MBRS140T3
R109
C767 1
0.0047uF
20%
10V
2 CERM
1206
OMIT
R108
4.7uF
NO STUFF
1
IRF7811W
1625_BG
JUMPER
OPEN
C771
20%
2 25V
CERM
1206
Q16
100uF
C153
+PBUS_JUMPER
1625_VSW
CRITICAL
5%
25V
CERM 2
603
L69
5 6
1625_SGND
C755
C804
CRITICAL
0.22uF
20%
2 25V
CERM
805
38
5%
1/16W
MF
2 402
470pF
MBR0540
C124
20%
50V
CERM 2
1812
20%
2 50V
CERM
1812
R118
PGND
2.2uF
2.2uF
COMP_RC
38
SM
D7
SM
EXTVCC
C155 1
20%
50V
CERM 2
1812
IRF7805
1625_TG
4700pF
4.99K
2.2uF
20%
50V
CERM 2
1812
R6901
C154
2.2uF
CRITICAL
5%
1/16W
MF
603 1
C754 1
NO STUFF
R127
16.2K
4.7uF
10%
25V
2 CERM
402
1%
1/16W
MF
2 402
20%
25V
CERM 2
1206
1625_VFB
PMU SUPPLY
B
+5V_MAIN
NC
BACKUP
BATTERY
BOOTSTRAP SYSTEM FROM

ADAPTER OR BATTERY
39 38 30
CRITICAL
5%
1/4W
FF
1210
J16
SM-2MT
+ADAPTER
390
+PBUS
INPUT TO AND OUTPUT

FROM BATTERY
OUTPUT FROM BATTERY
38
+ADAPTER_ILIM
38
+ADAPTER_OR_BATT
MBR0540
+BATT
D3
LP2951
SOI
IN
OUT
SENSE ERR
SHUT FDBK
GND
1N914
1
+PBUS
C244
0.1uF
SOT23
20%
50V
2 CERM
805
D11
SM
38
C737
0.1uF
R233
R604
294K
1%
1/16W
MF
402 2
1
20%
10V
CERM 2
402
C276
470pF
10%
50V
2 CERM
603
+3V_PMU
U22
32 38
2
1
1
MBR0520LT
5%
1/16W
MF
2 603
LP2951
SOI-3.3V
IN
OUT
SENSE ERR
SHUT FDBK
GND
4
1
5 NC
7
R231
1
5%
1/16W
MF
2 603
3V_PMU_SENSE
FB_4_85V_BU
+4_85V_ESR
38
R6051
C336
2.2uF
1%
1/16W
MF
402 2
VTAP
+4_6V_BU
5
7
100K
D2
SM
1
+4_85V_RAW 29
MBR0520LT
U23
PLUS5VTAP
+24V_PBUS
3V_PMU_VTAP
D1
SM
R39
D10
SM
1
20%
10V
2 CERM
805
C740
+3V_PMU_ESR
38
0.1uF
20%
10V
2 CERM
402
C326
10uF
20%
6.3V
2 CERM
805
MBR0540
12.8V REGULATOR

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6338
OF
31 40
1
3.3V/5V MAIN SUPPLY

+24V_PBUS
C558
2.2uF
20%
50V
CERM 2
1812
C559 1
C561
2.2uF
2.2uF
C560 1
6 5
5 6
CRITICAL
Q41
4
CRITICAL
OMIT
R522
25
38
+5V_MAIN_AUD
38
C687
330uF
20%
6.3V 2
TANT
CASE-D4
D26
SM
R521
22uF
20%
10V
2 CERM
1210
C575
Q42
100K
R409
NO STUFF
1
C114
C123
SSOP
TG1
TG2
25 BOOST1
BOOST2
26 SW1
SW2
23 BG1
BG2
5V_BOOST
0.001uF
38
20%
50V
CERM 2
402
C554
C7
5V_SW
5V_BG
C562
113K
C573
180pF
1%
1/16W
MF
402 2
C629
C571
18
SNS2+ 14
SNS1-
SNS2- 13
5V_VOSNS
5V_ITH
5V_RUNSS
VOSNS1
ITH1
RUN/
SS1
FCB
FREQSET
STBYMD
0.047uF
10%
50V
CERM 2
402
5V_ITH_RC
3707_FSET
10%
16V
CERM 2
402
6
3707_FCB
SGND
9
R410
R404
21.5K
15K
C570
C572
100pF
1%
1/16W
MF
402 2
20%
25V
2 CERM
805
38
3V_SNSM
5%
1/16W
MF
402 2
DISTRIBUTE CAPS ALONG TOP EDGE AND FAN CUT-OUT
20%
10V
2 CERM
402
+4_6V_BU
31 38
34 32
1M
DCDC_EN_L
C569
NO STUFF
5%
50V
CERM 2
402
C555 1
63.4K
1%
1/16W
MF
2 402
5%
50V
CERM 2
402
5%
1/16W
MF
402
R533
C578
R400
12K
20K
5%
1/16W
MF
2 402
1%
1/16W
MF
2 402
0.1uF
20%
10V
CERM 2
402
C627 1
C126
0.1uF
0.1uF
C556 1
C563
0.1uF
0.1uF
20%
10V
CERM 2
402
20%
10V
CERM 2
402
C143
0.1uF
20%
10V
CERM 2
402
20%
10V
CERM 2
402
34
20%
10V
CERM 2
402
C628
0.1uF
20%
10V
CERM 2
402
20%
10V
CERM 2
402
DISTRIBUTE CAPS ALONG TOP EDGE AND FAN CUT-OUT
5%
2 25V
CERM
402
C353
0.1uF
20%
10V
CERM 2
402
THIS SIGNAL IS OPEN COLLECTOR TO GND WHEN POWER IS NOT GOOD

220PF IS USED TO QUIET NOISE ON PGOOD ONCE INTERNAL OPEN DRAIN IS DISENGAGED
220pF
C416
0.1uF
2
1
25 38
20%
10V
CERM 2
1210
R401
180pF
R403
100pF
XW13
SM
+3V_MAIN_AUD
C568 1
3V_5V_OK
SM
22uF
3707_SGND
2N7002
LTC3707_START_RC
330uF
3V_ITH_RC
C567
Q43
R524
POWERDOWN DELAY IS AROUND 4MS-15.6MS
C703
20%
2 6.3V
TANT
CASE-D4
+3V_MAIN
10%
50V
2 CERM
402
0.1uF
DIODE WILL ENSURE DCDC_EN_L IS QUICKLY DISCHARGED DURING SHUT-DOWN
C699 1
10
5V START TO TURN ON ~12.5MS AFTER DCDC_EN_L

3V START TO TURN ON ~25MS AFTER DCDC_EN_L
OMIT
XW32
SM
CRITICAL
20%
50V
CERM
402
0.0022uF
C566
1%
1/16W
MF
2 402
R5391
5%
1/16W
MF
402 2
C565
PGOOD 28
20
JUMPER
OPEN
C700
22uF
R5371
2 3
3V_RUNSS
PGND
0.001uF
3V_ITH
+3V_MAIN_JUMPER
20%
2 10V
CERM
1210
10
3V_VOSNS
100K
20%
16V
CERM 2
402
5%
50V
2 CERM
402
3V_SNSP
R407
SOI
20%
2 50V
CERM
402
37
1XW20 2
C840
1
38
1%
1/4W
FF
1206
MBRS140T3
SI4888DY
2.2uF
20%
2 50V
CERM
1812
+3V_MAIN
0.0052
D28
SM
NO STUFF
0.001uF
37
VOSNS2 12
ITH2 11
RUN/ 15
SS2
2
CRITICAL
3V_BG
0.01uF
Q47
3V_SW
38
19
C564
3V_BOOST
17
5V_SNSM
37
C577
0.0022uF
5%
50V
2 CERM
402
1%
1/16W
MF
402 2
20%
10V
CERM 2
402
16
SNS1+
5V_SNSP
20%
50V
CERM
402
0.1uF
20%
10V
CERM 2
402
5 6
0.22uF
5%
1/16W
MF
603 2
C579
R538
1
IHLP-5050
20%
2 50V
CERM
1812
3V_RSNS 38
CRITICAL
4.7uH
2.2
C580
2.2uF
20%
2 50V
CERM
1812
L62
2 3
MBR0540
R4021
2
37
3707_STBY
20%
10V
CERM 2
402
0.1uF
20%
10V
CERM 2
402
NO STUFF
R4081
CRITICAL
0.1uF
20%
10V
CERM 2
402
0.1uF
20%
10V
CERM 2
402
0.1uF
20%
10V
CERM 2
402
0.1uF
20%
10V
CERM 2
402
0.1uF
C557
C415
0.1uF
D13
SM
10
LTC3707
27
5V_TG
C576
20%
10V
CERM 2
402
24
2.2uF
SOI
3V_BOOST_ESR
U35
5%
1/16W
MF
2 603
C839
3 2
1M
5%
1/16W
MF
2 402
21
C581
CRITICAL
R399
EXT INT VIN 3.3

VOUT
VCC VCC
2.2
0.001uF
C8
SI4888DY
+5V_MAIN
+5V_MAIN
0.1uF
20%
2 10V
CERM
1206
1%
1/16W
MF
2 402
1
1
20%
25V
CERM 2
805
SOI
10
Q45
4
3V_TG
4.7uF
NC
0.22uF
5%
1/16W
MF
2 402
C574
5V_BOOST_ESR
6 5
SI4888DY
R523
5%
1/16W
MF
2 402
5%
1/16W
MF
402 2
R406
22
10
CRITICAL
MBRS140T3
C686
1M
2
8
R411
MBR0540
IHLP-5050
20%
10V
CERM 2
1210
C685 1
D14
SM
1%
1/4W
FF
1206
22uF
CRITICAL
0.0052
3 2
4.7uH
+5V_MAIN_JUMPER
JUMPER
OPEN
XW31
SM
5%
1/16W
MF
402 2
L61
CRITICAL
1XW16 2
R4051
0
5V_RSNS
C582
20%
2 50V
CERM
1812
CRITICAL
3707_INTVCC
38
SOI
38
2.2uF
20%
50V
CERM 2
1812
SI4888DY
+5V_MAIN
2.2uF
20%
50V
CERM 2
1812
20%
50V
CERM 2
1812
470K
5%
1/16W
MF
2 402
D27
DCDC_EN
R534
29 28
PMU_POWER_UP_L
34 32
DCDC_EN_L
Q44
2N7002DW
SLEEP
0.01uF
+3V_MAIN
20%
16V
2 CERM
402
SOT-363
C694
NO STUFF
1
DCDC_EN TRUTH TABLE
PMU_POWER_UP_L
SLEEP
DCDC_EN
DCDC_EN_L
Run
1 (2.99V)
Sleep
5%
1/16W
MF
2 402
C432
0.01uF
1
State
32
100K 2
1
SLEEP_LS5
+3V_PMU
+3V_PMU
4
3
5V_HD_PWREN
1
C428
10uF
5%
1/16W
MF
2 402
VOLTAGE
C709
100uF
20%
2 10V
POLY
SMD-3
TSOP
SI3443DV
Q26
R3071
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
100K
R322
5) TRACKPAD
SLEEP_L_LS5
5V_SLEEP_PWREN
+5V_SLEEP
6
39 34 32 29 25 23
C429
10uF
20%
6.3V
2 CERM
805
TSOP
SI3443DV
Q27
C710
100uF
SLEEP
2N7002DW
100K 2
5%
1/16W
MF
402
SOT-363
20%
2 10V
POLY
SMD-3
SOT-363
NO STUFF
7) BOOT BANGER
8) HARD DRIVE (IF USING 3V LOGIC)
10) PMU - I2C PULLUPS
Q20
SLEEP_NET
SOT-363
S
1
NO STUFF
39 34 32 29 25 23
SLEEP
100K 2
Q20
R291
2N7002DW
SOT-363
S
4
3.3V/5V REGULATOR
32

SOT-363
6) DVI LEVEL SHIFTERS & PULLUPS & HPD
9) WIRELESS
6
2N7002DW
5) LVDS DDC PULL-UPS
5%
50V
CERM
603
Q24
100K 2
5%
1/16W
MF
402
4) GRAPHIC CHIP SPREAD SPECTRUM CHIP
Q21
C398
2N7002DW
5%
1/16W
MF
402
SLEEP_LS5
3) MAP31 - 3V RAIL (IF USING D3COLD)
SI3443DV
R310
1
3V_SLEEP_PWREN_L
5%
1/16W
MF
402 2
2N7002DW
5%
1/16W
MF
2 402
18 20 26 33 34
SLEEP_LS5_EN_L
Q24
R311
5
1
SLEEP_L_LS5_EN_L
4
100K
100K
20%
10V
CERM
402
Q50
R550
R3061
0.1uF
1
R3011
470K
4) DVI
3 NO STUFF
NO STUFF
1
1) FAN
3) OPTICAL DRIVE
2) INTREPID - I2C PULLUPS & OSCILLATOR

TSOP
2200pF
SLEEP_NET_INV
+5V_SLEEP LOADS
2) Headphone amplifier
20%
10V
POLY
SMD-3
5%
1/16W
MF
402 2
+5V_MAIN
+5V_MAIN
100uF
100K
SLEEP LEVEL SHIFTER (3V -> 5V)
24 38
C433
5%
1/16W
MF
402
Shutdown
+3V_PMU
1) CPU PLL CONFIG CONTROL

2
C713
100K
SOT-363

1
C410

0.01uF
20%
16V
2 CERM
402
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SHT
NONE
REV.
051-6338
SCALE
+3V_SLEEP LOADS
6
5
R572
2N7002DW
5%
1/16W
MF NO STUFF
402
1
Q50
R551
20%
6.3V
2 CERM
805
100K 2
+4_6V_BU
100K 2
NO STUFF
+3V_SLP_ON
+5V_HD_SLEEP
5%
1/16W
MF
402
NO STUFF
+3V_SLP_OK_L
20%
16V
CERM
402
R321
SLEEP
+5V_MAIN
34
39 34 32 29 25 23
100K
+3V_SLEEP
20%
2 16V
CERM
402
SLEEP_L_LS5_NET
R548
0.01uF
R294
SOT-363
+3V_SLEEP
+5V_MAIN
2N7002DW
3
D
39 34 32 29 25 23
C688
Q44
D
5%
1/16W
MF
402
1N914
SOT23
100K 2
1
20 28 33
OF
32 40
1
1.175V->1.025V
VCORE POWER SEQUENCING
1.25Ghz
+3V_MAIN
1.0Ghz
R794
VCORE_FAST<1>
33
NO STUFF
1
1
+5V_MAIN
470K
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
1
R101
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
R111
100K
5%
1/16W
MF
402 2
MAXBUS_SLEEP
38 16 15 8 7 6 5
CPU_BST
R137
R631 R662
470K
5%
1/16W
MF
2 402
CPU_BTR&CPU_BST NO STUFF
1
1
5%
1/16W
MF
2 402
DP2
VCORE_FAST<1>
33
VCORE_FAST<2>
3
5
6
11
VCORE_SLOW<3>
33
VCORE_FAST<3>
33
VCORE_FAST<4>
10
14
VCORE_SLOW<4>
R675
CPU_VCORE_SEQ_L
Q8
10K
5%
1/16W
MF
402 2
NO STUFF
1
1
NO STUFF
CPU_BST
CPU_BTR
R123 R129 1R647 1R671 1R126

0
2N3904
470K
470K
470K
CPU_BTR
470K
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
<D4>
<D3>
<D2>
<D1>
<D4>
<D3>
<D2>
DP2
R121
5%
1/16W
MF
2 402
VCORE_VID<3>
33
12
DP2
VCORE_VID<4>
33
R861
38
R80
33 29 7
CPU_VCORE_HI_OC
R851
R91
INT_GPIO1_PU
5%
1/16W
MF
402 2
27.4K
1%
1/16W
MF
402 2
R81
14
20%
10V
CERM 2
603
OMIT
OMIT
CRITICAL
1
VCORE_SHDN_L
(VCORE_SNS)
5%
1/16W
MF
402
38
5
10
VCORE_ILIM
(VCORE_GNDSNS) 11
+3V_MAIN
33
16
VCORE_AB_SEL
38
R66
0
5%
1/16W
MF
2 402
38
V+
MAX1717 VID INPUTS ARE 3.3-5V TOLERANT
VCORE_BST 2
VCORE_TON
2.2
LX
23
DL
14
38
VCORE_DL
GND
13
38
VCORE_GND
33
VCORE_VID<1>
20
VCORE_VID<2>
19
33
VCORE_VID<3>
18
33
VCORE_VID<4>
17
FB 4
TIME 3
VGATE 12
39 38
R65
470K
5%
1/16W
MF
2 402
R951
R67
C66 1
66.5K
0.01uF
12.7K
1%
1/16W
MF
402 2
1%
1/16W
MF
402 2
20%
16V
CERM 2
402
C80 1
C94
VCORE_TIME
VCORE_VGATE
R691
220pF
1uF
5%
25V
CERM 2
402
20%
10V
2 CERM
603
38
390K
5%
1/16W
MF
402 2
C64
OUTPUT VOLTAGE
R93
619
CPU_BST
VDAC
D3 D2 D1 D0
D4=0 D4=1
2.00
1.95
1.90
1.85
1.80
1.75
1.70
1.65
1.60
1.55
1.50
1.45
1.40
1.35
1.30
1.275
1.250
1.225
1.200
1.175
1.150
1.125
1.100
1.075
1.050
1.025
1.000
0.975
0.950
0.925
NO CPU
NO CPU
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1%
1/16W
MF
2 402
R7901
100K
5%
1/16W
MF
402 2
NO STUFF
R792
33
VCORE_AB_SEL
5%
1/16W
MF
402
VCORE_AB_SEL_INV
VCORE_OFFSET_DIV
Q82
R791
2N7002DW
5%
1/16W
3
CPU_BST MF
402
D
SOT-363
R98
158K (Ra)
1%
C841
Q82
C76
6 7
C106
2 3
38
Q65
CRITICAL
SO-8-PWRPK
C4
10uF
5 6
7 8
5 6
R743
CRITICAL
CRITICAL
Q60
Q63
Q66
IRF7832
IRF7832
IRF7832
C842 1
SO-8
1 2
C843
SO-8
CRITICAL
1
20%
50V
CERM 2
402
D33
B540C
5%
1/4W
MF
1210
NO STUFF2
2 3
10%
50V
CERM
603
XW2
SM
1.0Ghz
CPU_BTR
1
R97
CRITICAL
C781 1
C793 1
20%
2V 2
TANT
7343
20%
2V 2
TANT
7343
100
20%
2V 2
TANT
7343
220uF
220uF
5%
1/16W
MF
402
XW27
SM
1
Connect MAX1717 GND pin 13

to GND at bottom-side FET
Keep trace fat and short!!

PLACE THIS SHORT AT
PIN OF 1000uF CAP
CLOSEST TO CPU
PART#
QTY
DESCRIPTION
CRITICAL
BOM OPTION
116S1000
RES,MF,0 ohm,5%,1/16W,0402,SMD
R65
CPU_BST
114S3573
RES,MF,1/16W,3.57K ohm,1%,0402,SMD
R97
CPU_BST
TABLE_5_ITEM
(Rb)
>= 100K PD
<= 1K PD
VCORE_SNS
Fmax Test Connections

NO STUFF
VCORE_GNDDIV
2.05K2
1
J7
M-ST-SM-52465-1217
R708
38 33
VCORE_GNDSNS 1
100
1%
1/16W
MF 29
402
VCORE SUPPLY
NO STUFF
1%
1/16W
MF
402
NO STUFF
When A/B_ is high (fast): D4-D0 read as-is

When A/B_ is low (slow): <=1K-ohm -> 0
>=100K-ohm -> 1
If all pull-ups are >=100K and all
pull-downs are <=1K, V A = V B .
VCORE_GNDSNS
R706
38 33
1%
1/16W
MF
(For BEST config. R97 use 3.57K-ohm RES,see BOM table)
2 402
Lo/Slow
0
20%
2 2V
TANT
7343
20%
2 2V
TANT
7343
1.335V->1.080V
1.235V->1.060V
1.25Ghz
33 38
A/B_ =
C802
220uF
220uF
TABLE_5_ITEM
VCORE_GNDDIV
FOR V-STEP:
1
C774
CRITICAL
220uF
R72
C79
0.0022uF
CRITICAL
CRITICAL
1
C788 1
CRITICAL
NO STUFF
38 39
SM
CPU_VCORE_SNUB
XW28
SM
20%
2 2V
TANT
7343
R901
C797
220uF
CRITICAL
2.2
0.001uF
20%
50V
CERM 2
402
CPU_VCORE_SLEEP 5 33
1%
1W
MF
2512
TABLE_5_HEAD
ROUTE AS DIFFERENTIAL PAIR
>= 100K PU
(VCORE=1.385V for EVTB)
0.0022
38 33
<= 1K PU
20%
6.3V
CERM 2
805
38
Hi/Fast
10uF
CRITICAL
(CPU Vcore value with offset)
D<4..0>
C13 1
20%
6.3V
CERM 2
805
SOT-363
20%
6.3V
CERM 2
805
10uF
20%
6.3V
CERM 2
805
VCORE_VSENSE 1
1.2uH-18.3A

1
20%
50V
CERM 2
402
10uF
20%
6.3V
CERM 2
805
XW29
SM
SI7860DP
0.001uF
C105
C14 1
10uF
20%
6.3V
CERM 2
805
20%
6.3V
CERM 2
805
20%
6.3V
CERM 2
805
Sense resistor R650 may not be needed!
CRITICAL
14
38
C70 1
C5
10uF
10uF
10uF
C3
C15 1
20%
6.3V 2
CERM
805
2N7002DW
20%
6.3V 2
CERM
805
10uF
20%
6.3V 2
CERM
805
20%
6.3V
CERM 2
805
C6
10uF
10uF
20%
6.3V
CERM 2
805
SO-8-PWRPK
20%
50V
CERM 2
402
0.001uF
1/16W
MF
2 402
10uF
20%
6.3V 2
CERM
805
This allows for an offset to the ground sense to adjust the output voltage.
VREF = 2.0V, HENCE VOFFSET = 2.0V * (Rb / Ra) AND VCORE = VDAC + VOFFSET.
NOTE: Ra NO STUFFED FOR NO OFFSET CASE
CPU_BTR&CPU_BST
1
1K
20%
16V 2
TANT
CASE-D
SO-8
0.001uF
GROUND SENSE VOLTAGE DIVIDER
CPU_BST
10uF
20%
16V 2
TANT
CASE-D
SI7860DP
2 VCORE_AB_SEL_OPT
CPU_BST
C51
10uF
1 2
0.1uF
VCORE_GNDA
CPU_BST
1
C63
L71
Note:No stuff R67 to set skip mode of VCore

+3V_MAIN
CRITICAL
1
C111
20%
25V
2 CERM
603
VCORE_FB
VGATE PULLUP PROVIDED BY INTREPID
(For BEST config. R65 use 0-ohm RES,see BOM table)
C92
10uF
10%
25V
2 CERM
402
VCORE_LX
38
D0
D1
D2
D3
D4
33
OMIT
CRITICAL
1
C21
20%
6.3V 2
CERM
805
SM1
CC
VCORE_CC
OMIT
0.0047uF
REF
TON
C83
C65
NO STUFF
1
OMIT
CRITICAL
1
NO STUFF
1
VCORE_DH
C16 1
10uF
20%
6.3V 2
CERM
805
10uF
20%
6.3V
CERM 2
805
5%
1/16W
MF
603
38
C57
10uF
21
CPU_BTR
1
20%
16V 2
TANT
CASE-D
20%
16V 2
TANT
CASE-D
R71
38 22
BST
DH 24
C100
10uF
20%
6.3V 2
CERM
805
10uF
D5
SM
(VCORE_VPLUS)
C74
10uF
20%
6.3V 2
CERM
805
C52
10uF
20%
16V 2
TANT
CASE-D
Q62
VCORE_VID<0>
38
<D0>
VCORE_REF
C78
10uF
20%
16V 2
TANT
CASE-D
CRITICAL
NO STUFF
1
C91
10uF
20%
16V 2
TANT
CASE-D
VDD
SKP/SDN
FBS
ILIM
GNDS
A/B
C90
OMIT
10uF
U7
QSOP
C12
10uF
CRITICAL
1
CRITICAL
MAX1717
CPU_VCORE_SLEEP
20%
6.3V 2
CERM
805
CRITICAL
1
15
VCC
1uF
TABLE_5_ITEM
CRITICAL
D
39 38 33 5
C101
OMIT
MBR0530
38
C84 1
BOM OPTION
VCORE_VID<4> 33
5%
1/16W
MF
402
CRITICAL
1
20%
2 10V
CERM
603
VCORE_VCC
5%
1/16W
MF
402
33
33
NO STUFF
C93
1uF
20
CRITICAL
VCORE_VID<3> 33
Keep trace fat (40-100 mils) and short!!
VCORE_BOOST
SOT-363
4
3
5%
1/16W
MF
402 2
10uF
C77
PLACE C423 CLOSE

TO PINS 15 & 13!!
SEL = 0; Y1=A1
SEL = 1; Y1=B1
SOT-363
5
2
BAS16TW
126S0036
DESCRIPTION
CAP,AL,POLY,8.2uF,20%,16V,V CASE,SMD
C51,C52,C77,C78,C91,C92,C111
+PBUS
5%
1/16W
MF
2 402
<D1>
QTY
1K
5%
1/16W
MF
2 402
TABLE_5_HEAD
PART#
R797
VCORE_VID<2>
CRITICAL
DCDC_EN
33
33
+5V_MAIN
BAS16TW
32 28 20
VCORE_VID<1>
SEL
OE
33
VCORE_VID<2> 33
GND
R634 1R660
470K
VCORE_VID<1>
R795
PI3B3257
A1 QSOP Y1
B1
Y2
A2
B2
Y3
A3
B3
Y4
A4
B4
NO STUFF
R139
5%
1/16W
MF
2 402
SM
2
SLEEP_L_LS5
1
15
VCORE_MUX_EN
Q5
34 32 26 20 18
13
VCORE_MUX_SEL
5%
1/16W
MF
402
SM
3
1
CPU_VCORE_SEQ
29 7 CPU_VCORE_HI_OC
33
2N3904
33
U15
2
33
VCORE_SLOW<2>
SOT-363
6
1
R991
VCC
R796
20%
10V
2 CERM
402
16
5%
1/16W
MF
2 402
NO STUFF
5%
1/16W
MF
402
0 2
1
VCORE_FAST<2>
NO STUFF 5%
1/16W
MF
0 2 402
VCORE_FAST<3> 1
5% NO STUFF
1/16W
MF
402
0 2
1
VCORE_FAST<4>
SYM_VER-2
1%
1/16W
MF
2 402
BAS16TW
CPU_VCORE_PWR_SEQ
C130
0.1uF
10K
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
R676
VCORE_SLOW<1>
100K
5%
1/16W
MF
402 2
CPU_BST
R106
100K
NO STUFF
CPU_BTR
1
1
R635 R672 R757

R125 R135
470K
0
0
470K
NOTE: When U15 MUX is removed => NO SW Support,

R794,R795,R796&R797
NO STUFF have to be stuffed
CPU core follows CPU I/O voltage

(approx. 7ms delay)
5
1.300V->1.075V
1.225V->1.050V
(value without offset)
2
39 29
23 22
39
12
VCORE_D0
VCORE_GNDDIV_TEST
11
VCORE_D1
VCORE_GNDSNS_TEST
10
VCORE_D2
+3V_PMU_RESET
VCORE_D3
SOFT_PWR_ON_L
VCORE_D4
NC (RFU)

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6338 C
OF
33 40
1
+1_5V_SLEEP LOADS
1) AGP I/O - IF USING D3COLD
2) MAXBUS I/O - IF 1.5V INTERFACE
+1_5V_MAIN
1.5V/2.5V SWITCHER
M10 Power Shut down Sequencing
+1_5V_SLEEP
+3V_SLEEP
+2_5V_SLEEP
Q53
+5V_MAIN
+1_5V_MAIN LOADS
SI3446DV
XW8
SM
TSOP
1) INTREPID CORE
38
DP4
XW21
SM
BAS16TW
SOT-363
6 +3V_SLEEP_NECK
2 +2_5V_SLEEP_NECK2 1 38
+2_5V_MAIN LOADS
20%
6.3V
CERM 2
805
10%
25V
2 X7R
402
NO STUFF
+5V_MAIN
C195
NO STUFF
5%
1/16W
MF
2 402
SM
38
5%
1/16W
MF
402
DIODE PROVIDE PROVIDE QUICK SHUT-DOWN
POWER DOWN DELAY 1.5MS TO 3.5MS
100K
5%
1/16W
MF
402 2
C133
2_5V_ILIM
38
+PBUS
1_5V_ILIM
R2101
0.01uF
R211
1%
1/16W
MF
402 2
34
SLEEP_L_LS5_INV
21
32
SLEEP_L_LS5_NET
SLEEP_L_LS5 1
5%
1/16W
MF
402
4
CRITICAL
C232
2N7002DW
100K 2
2
1
C129
11
ILIM1
ILIM2
ON1
ON2
25
BST1
C209 1
R171
4.7uF
20%
25V
CERM 2
1206
10
CRITICAL
4.7uF
SOT-363
20%
25V
CERM 2
1206
8
10%
25V
2 X7R
402
6 5
1_5V_BOOST
38
1000pF
4.7
1_5V_BST
38
5%
1/16W
MF
603
C196
26
DH1
27
LX1
0.1uF
20%
25V
2 CERM
603
CRITICAL
Q56
+1_5V_MAIN
IRF7805
SM
24
5
38
1_5V_DH
1_5V_LX_F
38 34
CRITICAL
4.7uH
38 34
1_5V_LX_F
3 2
38
JUMPER
OPEN
38
MAX1715_REF
1_5V_FB
1_5V_LX
34
38
SM4
NO STUFF
R212
5.11K
C738
10uF
C307
150uF
20%
2 6.3V
CERM
805
20%
2 6.3V
TANT
SMD-1
1%
1/16W
MF
2 402
1_5V_FB
C267
150uF
38
23
NC
28
NC
DL1
DL2
19
TON
PGND
22
OUT1
PGOOD
REF
OUT2 14
FB1
AGND
FB2 13
THRML
IRF7811W
SO-8
D31
SM
38
MBRS130LT3
C844
0.001uF
20%
50V
CERM 2
402
OMIT
1uF
20%
10V
2 CERM
603
4.7
38
38 34
C355
C715 1
4.7uF
10uF
20%
6.3V 2
CERM
805
20%
2 25V
CERM
1206
2_5V_BOOST
C193
6 7
8
NO STUFF
0.1uF
38
2_5V_LX_F
R554
CRITICAL
20%
25V
2 CERM
603
Q55
SLEEP_L_LS5_INV
IRF7805
2_5V_DH
34
CRITICAL
1
38
2_5V_SLEEP_PWREN_L
5%
1/16W
MF
402
NO STUFF
C714
2
10%
25V
X7R
402
1000pF
100K 2
10%
25V 2
X7R
402
5%
1/16W
MF
402
SM
34
38
1000pF
100K 2
SLEEP
39 34 32 29 25 23
MAX1715_GND
C716
R557
+2_5V_MAIN
L65
OMIT
4.7uH
2 3
1
2_5V_LX
38 34
1XW22 2
2_5V_LX_F
SM4
JUMPER
OPEN
29
5
6 7
R220
CRITICAL
Q54
5%
1/16W
MF
2 402
38
SO-8
C845
0.001uF
C393
150uF
20%
2 6.3V
CERM
805
MBRS130LT3
NO STUFF
C725
10uF
D30
SM
IRF7811W
2_5V_DL
C298
XW25
SM
1
5%
1/16W
MF
603
1_5V_DL
NO STUFF
1
R170
2_5V_BST
DH2 17
16
20%
2 25V
CERM
1206
38
5%
1/16W
MF
402 2
Q57
34 38
R222
1%
1/16W
MF
2 402
NC
LX2
R2211
15
SKIP
C338
4.7uF
18
BST2
CRITICAL
CRITICAL
CRITICAL
1
4
V+
NC_15
NC_23
NC_28
10K
7 6
CRITICAL
20%
2 6.3V
TANT
SMD-1
NC
L67
OMIT
1XW24 2
MAX1715_SKIP
MAX1715
QSOP
Q11
R114
33
26
18
20
32
VDD
U19
12
20
VCC
SOT-363
+2_5V_SLEEP
TSSOP
34 38
+PBUS
2N7002DW
U48
SI6467BDQ
+2_5V_MAIN
+PBUS
1%
1/16W
MF
2 402
MAX1715_GND
Q11
1) FBCORE/FBIO IF USING D3COLD
158K
3
D
+2_5V_SLEEP LOADS
158K
20%
16V
2 CERM
402
1_5V_SLEEP_EN_L 34
38
MAX1715_ON_RC
SOT-363
4
2 +1_5V_SLEEP_NECK 3
0
MAX1715_TON
38
2N7002
330K 2
BAS16TW
DP4
XW23
SM
3 6
DCDC_EN_L
4) DDR MUXES
20%
10V
2 CERM
805
R226
Q10
R184
32
R1151
C194
38
+1_5V_SLEEP
3
D
3) DDR SODIMMS - CORE/IO
2.2uF
20%
2 10V
CERM
805
5%
1/16W
MF
2 402
SOT-363
6
1
2) GIGABIT ETHERNET - AVDDL

1
2.2uF
DP3
5%
1/16W
MF
402 2
R227
3V_5V_OK
BAS16TW
100K
1) MAP31 - FBCORE/FBIO IF USING D3HOT

MAX1715_VCC
38
1
34 32
R1161
5%
1/16W
MF
402
SOT-363
5
2 +1_8V_SLEEP_NECK 2
1000pF
20
BAS16TW
10uF
5%
1/16W
MF
402 2
C718
DP4
XW10
SM
100K
DP3
DP3
R117
C717 1
R177
SOT-363
4
3
BAS16TW
1_5V_SLEEP_EN_L 34
SOT-363
5
2
BAS16TW
+1_8V_SLEEP
20%
2 6.3V
TANT
SMD-1
C405
150uF
20%
2 6.3V
TANT
SMD-1
C396
150uF
20%
2 6.3V
TANT
SMD-1
1
1
2 3
20%
50V
2 CERM
402
MAX1715_GND
B
+1_8V_MAIN
1.8V SWITCHER
+3V_MAIN
+1_8V_MAIN LOADS
39 34 32 29 25 23
SLEEP
+1_8V_MAIN
L63
34 38
R531
C695
10uF
R398
20%
6.3V
CERM 2
805
1M
5%
1/16W
MF
2 402
LTC3411_EN_L
R535
2
324K 1
NO STUFF
1
R526
10K
5%
1/16W
MF
2 402
10
38 34
5%
R527 1/16W
MF
1M
CRITICAL
402
5%
1/16W
MF
2 402
34 32
3V_5V_OK
LTC3411_SYNC
LTC3411_SHDN
SHDN/RT
SYNC/MODE VFB
1_8V_SLEEP_PWREN_L
1%
1/16W
MF
402 2
PGOOD
PGND
NO STUFF
38
R571
1_8V_VFB
34
SM
R536
10K
(PULSE MODE)
5%
1/16W
MF
2 402
(CONTINUOUS MODE)
1
R525 C690
1M
5%
1/16W
MF
2 402
ITH 10 38 LTC3411_ITH
1
SGND
R532
3
16.2K
1uF
20%
10V
CERM 2
603
R528
698K
LTC3411_ITH_RC
1
SLEEP_L_LS5_INV
100K 2
1
5%
1/16W
MF
402
C697
22uF
1%
1/16W
MF
2 402
U50
C691
1000pF
NO STUFF
C720 1
1
10%
25V
X7R
402
1000pF
10%
25V
X7R 2
402
1.5V/1.8V/2.5V SUPPLIES
20%
2 10V
CERM
1210

XW17
SM
38
LTC3411_GND
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SHT
NONE
REV.
051-6338
SCALE

OMIT
5%
2 25V
CERM
603
2) CPU JTAG & MaxBus Pull-ups

3) CPU PLL Config Straps
1%
1/16W
MF
402 2
38
1) MPC7447 - MAXBUS I/O - IF 1.8V INTERFACE
SI3447DV
C722
SW 4
+1_8V_SLEEP LOADS
1
TSOP
1000pF
887K
5%
50V
CERM 2
402
20%
6.3V
CERM 2
805
1XW18 2
1_8V_SW_F
6
5
R5291
10pF
MSOP
NO STUFF
38
10uF
JUMPER
OPEN
C693
LTC3411
38
Q31
SVIN PVIN
(BURST MODE)
2N7002
U46
38
2
SM1
1_8V_SW
1%
1/16W
MF
402
38
LTC3411_VCC
100K 2
C719 1
OMIT
2.2uH
5%
1/16W
MF
402
CRITICAL
LTC3411_VCC
R566
1) INTREPID PLLS
+1_8V_SLEEP
OF
34 40
1
GROUP
SIG_NAME
PROPAGATION_DELAY
MAX_VIAS
MAX_EXPOSED_LENGTH
STUB_LENGTH
NET_SPACING_TYPE
NO_TEST
PULSE_PARAM
SIG_NAME
INTREPID
CLOCKS
STUB_LENGTH OF 200 MILS NEEDED WHEN WE CONVERT TO 14.2
DIGITAL SIGNALS
(200)
10 MIL SPACING
167.0 MHz:::
L:S:1903 MIL:2000 MIL
500.0000
L:S:1903 MIL:2000 MIL
500.0000
(200)
I267
RAM_DATA_B<7..0>
L:S:2000:2100
500
(200)
167 MHZ
10 11
RAM_DQM_B<0>
L:S:2000 MIL:2100 MIL
500.0000
(200)
167.0 MHz:::
10 11
RAM_DQS_B<0>
L:S:2000 MIL:2100 MIL
500.0000
(200)
167.0 MHz:::
10 11
L:S:1905:2000
L:S:1905 MIL:2000 MIL
7
7
500
500.0000
167 MHZ
(200)
167.0 MHz:::
(200)
167.0 MHz:::
TOTAL LENGTH CONTROLLED BY SPREADSHEET
(200)
167 MHZ
(200)
167.0 MHz:::
10 11
10 11
10 11
9 10
9 10
9 10
10 11
10 11
L:S:1905 MIL:2000 MIL
500.0000
(200)
167.0 MHz:::
10 11
RAM_DATA_B<15..8>
L:S:2004:2412
500
(200)
167 MHZ
10 11
L:S:2004 MIL:2412 MIL
500.0000
(200)
167.0 MHz:::
10 11
RAM_DQS_B<1>
L:S:2004 MIL:2412 MIL
500.0000
MEM_DATA<23..16>
L:S:1435:1500
500
(200)
(200)
I271
MEM_DQM<2>
L:S:1435 MIL:1500 MIL
500.0000
(200)
I272
MEM_DQS<2>
L:S:1435 MIL:1500 MIL
500.0000
I270
167.0 MHz:::
RAM_DATA_A<23..16>
L:S:1707:1800
500
I273
RAM_DQM_A<2>
L:S:1707 MIL:1800 MIL
500.0000
I275
RAM_DQS_A<2>
L:S:1707 MIL:1800 MIL
500.0000
I277
RAM_DATA_B<23..16>
L:S:1900:2000
I276
RAM_DQM_B<2>
L:S:1900 MIL:2000 MIL
I278
RAM_DQS_B<2>
MEM_DATA<31..24>
167.0 MHz:::
10 11
167 MHZ
9 10
167.0 MHz:::
(200)
167.0 MHz:::
(200)
167 MHZ
(200)
167.0 MHz:::
L:S:300 MIL:350
DDRCLK_A0_UF
MIL
SYSCLK_DDRCLK_A0_UF:G:L:S:0 MIL:25 4MIL
(200)
10 MIL SPACING
167.0 MHz:::
L:S:300 MIL:350
DDRCLK_A0_UF
MIL
(200)
10 MIL SPACING
167.0 MHz:::
SYSCLK_DDRCLK_A1_UF
L:S:300 MIL:350
DDRCLK_A1_UF
MIL
(200)
10 MIL SPACING
167.0 MHz:::
L:S:300 MIL:350
DDRCLK_A1_UF
MIL
(200)
10 MIL SPACING
167.0 MHz:::
SYSCLK_DDRCLK_A0_UF
SYSCLK_DDRCLK_B0_UF
L:S:300 MIL:350
DDRCLK_B0_UF
MIL
SYSCLK_DDRCLK_B0_UF:G:L:S:0 MIL:25 4MIL
(200)
10 MIL SPACING
167.0 MHz:::
L:S:300 MIL:350
MIL
DDRCLK_B0_UF
(200)
10 MIL SPACING
167.0 MHz:::
SYSCLK_DDRCLK_B1_UF
L:S:300 MIL:350
DDRCLK_B1_UF
MIL
(200)
10 MIL SPACING
167.0 MHz:::
L:S:300 MIL:350
DDRCLK_B1_UF
MIL
(200)
10 MIL SPACING
167.0 MHz:::
SYSCLK_DDRCLK_A0
L:S:2900 MIL:3000
DDRCLK_A0
MIL
SYSCLK_DDRCLK_A0:G:L:S:0 MIL:25 MIL7
250.0000
(200)
10 MIL SPACING
167.0 MHz:::
9 11
SYSCLK_DDRCLK_A0_L
L:S:2900 MIL:3000
DDRCLK_A0
MIL
250.0000
(200)
10 MIL SPACING
167.0 MHz:::
9 11
SYSCLK_DDRCLK_A1
L:S:2900 MIL:3000
DDRCLK_A1
MIL
250.0000
(200)
10 MIL SPACING
167.0 MHz:::
9 11
250.0000
(200)
10 MIL SPACING
167.0 MHz:::
9 11
9 11
SYSCLK_DDRCLK_A1_L
L:S:2900 MIL:3000
DDRCLK_A1
MIL
SYSCLK_DDRCLK_B0
L:S:3100 MIL:3200
DDRCLK_B0
MIL
SYSCLK_DDRCLK_B0:G:L:S:0 MIL:25 MIL7
250.0000
(200)
10 MIL SPACING
167.0 MHz:::
SYSCLK_DDRCLK_B0_L
L:S:3100 MIL:3200
DDRCLK_B0
MIL
250.0000
(200)
10 MIL SPACING
167.0 MHz:::
9 11
SYSCLK_DDRCLK_B1
L:S:3100 MIL:3200
DDRCLK_B1
MIL
250.0000
(200)
10 MIL SPACING
167.0 MHz:::
9 11
250.0000
(200)
10 MIL SPACING
167.0 MHz:::
9 11
(200)
10 MIL SPACING
49.92 MHz::: 14
(200)
(200)
10 MIL SPACING
49.92 MHz::: 14
10 MIL SPACING
167.0 MHz::: 14
SYSCLK_DDRCLK_B1_L
L:S:3100 MIL:3200
DDRCLK_B1
MIL
9 10
9 10
I260
INT_REF_CLK_OUT_UF
L:S::400 MIL
I256
INT_REF_CLK_OUT
L:S:1000 MIL:1150 MIL
250.0000
I257
INT_REF_CLK_IN
L:S:1900 MIL:2000 MIL
250.0000
10 11
10 11
(200)
167.0 MHz:::
10 11
CLK66M_GPU_AGP_UF
L:S::150 MIL
(200)
10 MIL SPACING
66.00 MHz::: 12
500
(200)
167 MHZ
10 11
CLK66M_GPU_AGP
L:S:1800 MIL:1900 MIL
(200)
10 MIL SPACING
66.00 MHz::: 12 19
500.0000
(200)
167.0 MHz:::
10 11
INT_AGP_FB_OUT
L:S::150 MIL
(200)
10 MIL SPACING
66.00 MHz::: 12
L:S:1900 MIL:2000 MIL
500.0000
(200)
167.0 MHz:::
10 11
INT_AGP_FB_IN
L:S:1450 MIL:1550 MIL
(200)
10 MIL SPACING
66.00 MHz::: 12
L:S:1233:1485
500
(200)
167 MHZ
9 10
CLK33M_CBUS_UF
L:S::250 MIL
(200)
10 MIL SPACING
33.00 MHz::: 12
MEM_DQM<3>
L:S:1233 MIL:1485 MIL
500.0000
(200)
167.0 MHz:::
9 10
CLK33M_CBUS
L:S:5000 MIL:6000 MIL
(200)
10 MIL SPACING
33.00 MHz::: 12 18
MEM_DQS<3>
L:S:1233 MIL:1485 MIL
500.0000
9 10
CLK33M_AIRPORT_UF
L:S::250 MIL
(200)
10 MIL SPACING
33.00 MHz::: 12
RAM_DATA_A<31..24>
L:S:1700:2165
500
(200)
10 MIL SPACING
33.00 MHz::: 12 24
RAM_DQM_A<3>
L:S:1700 MIL:2165 MIL
500.0000
(200)
167.0 MHz:::
(200)
167 MHZ
(200)
167.0 MHz:::
(200)
10 MIL SPACING
33.00 MHz::: 12
RAM_DQS_A<3>
L:S:1700 MIL:2165 MIL
500.0000
(200)
(200)
10 MIL SPACING
33.00 MHz::: 12 17
500
(200)
10 MIL SPACING
33.00 MHz::: 12
(200)
10 MIL SPACING
33.00 MHz::: 12
10 11
CLK33M_AIRPORT
L:S:9500 MIL:10500 MIL
I259
CLK33M_NEC_UF
L:S::250 MIL
I258
CLK33M_NEC
L:S:4000 MIL:6000 MIL
10 11
167.0 MHz:::
10 11
400.0000
500.0000
500.0000
500.0000
500.0000
500.0000
C
39
(200)
167 MHZ
10 11
INT_PCI_FB_OUT
L:S::300 MIL
(200)
167.0 MHz:::
10 11
INT_PCI_FB_IN
L:S:6500 MIL:7500 MIL
500
(200)
167 MHZ
10 11
500.0000
(200)
167.0 MHz:::
10 11
L:S:1907 MIL:2356 MIL
500.0000
(200)
167.0 MHz:::
10 11
L:S:1915:2000
500
(200)
167 MHZ
9 10
(200)
ATI_CLK27M_OSC
L:S::400 MIL
(200)
10 MIL SPACING
19
ATI_CLK27M_OSC_SS
L:S::400 MIL
(200)
10 MIL SPACING
19
ATI_CLK27M_IN
L:S::200 MIL
(200)
10 MIL SPACING
19 20
ATI_SSCLK_UF
L:S::200 MIL
(200)
10 MIL SPACING
19
ATI_SSCLK_IN
L:S::1800 MIL
10 MIL SPACING
19 20
CLK18M_INT_XIN
L:S:1400 MIL:1500 MIL
10 MIL SPACING
14
CLK18M_INT_XOUT
L:S:1250 MIL:1350 MIL
10 MIL SPACING
14
CLK18M_XTAL_IN
L:S::300 MIL
10 MIL SPACING
14
CLK18M_INT_EXT
L:S::400 MIL
10 MIL SPACING
14
10 MIL SPACING
14 25 39
RAM_DATA_B<25..24>
L:S:1907:2356
I279
RAM_DATA_B<26>
L:S:1907 MIL:2356 MIL
I280
RAM_DATA_B<31..27>
L:S:1907:2356
RAM_DQM_B<3>
L:S:1907 MIL:2356 MIL
RAM_DQS_B<3>
MEM_DATA<39..32>
MEM_DQM<4>
L:S:1915 MIL:2000 MIL
500.0000
MEM_DQS<4>
L:S:1915 MIL:2000 MIL
500.0000
RAM_DATA_A<39..32>
L:S:1205:1387
500
RAM_DQM_A<4>
L:S:1205 MIL:1387 MIL
500.0000
167.0 MHz:::
(200)
167.0 MHz:::
(200)
167 MHZ
(200)
167.0 MHz:::
9 10
9 10
10 11
M10
10 11
RAM_DQS_A<4>
L:S:1205 MIL:1387 MIL
500.0000
(200)
167.0 MHz:::
10 11
RAM_DATA_B<39..32>
L:S:1404:1686
500
(200)
167 MHZ
10 11
RAM_DQM_B<4>
L:S:1404 MIL:1686 MIL
500.0000
(200)
167.0 MHz:::
10 11
&
RAM_DQS_B<4>
L:S:1404 MIL:1686 MIL
500.0000
(200)
167.0 MHz:::
10 11
MEM_DATA<47..40>
L:S:1719:1893
500
(200)
167 MHZ
9 10
MEM_DQM<5>
L:S:1719 MIL:1893 MIL
500.0000
(200)
167.0 MHz:::
9 10
SECONDARY LAYERS: 2,9
MEM_DQS<5>
L:S:1719 MIL:1893 MIL
500.0000
9 10
GOAL: MINIMIZE
EXPOSED ROUTES
MINIMIZE VIAS
RAM_DATA_A<47..40>
L:S:1607:1898
500
RAM_DQM_A<5>
L:S:1607 MIL:1898 MIL
500.0000
(200)
167.0 MHz:::
(200)
167 MHZ
(200)
167.0 MHz:::
RAM_DQS_A<5>
L:S:1607 MIL:1898 MIL
500.0000
(200)
167.0 MHz:::
10 11
(200)
167 MHZ
10 11
L:S:1716:2102
500
10 11
10 11
500.0000
(200)
167.0 MHz:::
10 11
500.0000
(200)
167.0 MHz:::
10 11
(200)
167 MHZ
9 10
RAM_DQM_B<5>
L:S:1716 MIL:2102 MIL
RAM_DQS_B<5>
L:S:1716 MIL:2102 MIL
MEM_DATA<55..48>
L:S:2101:2170
500
MEM_DQM<6>
L:S:2101 MIL:2170 MIL
500.0000
MEM_DQS<6>
L:S:2101 MIL:2170 MIL
500.0000
RAM_DATA_A<55..48>
L:S:1204:1357
500
RAM_DQM_A<6>
L:S:1204 MIL:1357 MIL
500.0000
167.0 MHz:::
(200)
167.0 MHz:::
(200)
167 MHZ
(200)
167.0 MHz:::
RAM_DQS_A<6>
L:S:1204 MIL:1357 MIL
500.0000
(200)
167.0 MHz:::
10 11
RAM_DATA_B<55..48>
L:S:1400:1546
500
(200)
167 MHZ
10 11
L:S:1400 MIL:1546 MIL
500.0000
(200)
(200)
(200)
167.0 MHz:::
10 11
500.0000
167.0 MHz:::
10 11
L:S:1903:2000
500
(200)
167 MHZ
9 10
L:S:1903 MIL:2000 MIL
500.0000
(200)
167.0 MHz:::
9 10
RAM_DATA_A<63..56>
L:S:1611:1696
500
RAM_DQM_A<7>
L:S:1611 MIL:1696 MIL
500.0000
(200)
167.0 MHz:::
(200)
167 MHZ
(200)
167.0 MHz:::
9 10
10 11
L:S:1611 MIL:1696 MIL
500.0000
(200)
167.0 MHz:::
10 11
RAM_DATA_B<63..56>
L:S:1809:1887
500
(200)
167 MHZ
10 11
500.0000
(200)
167.0 MHz:::
10 11
L:S:1809 MIL:1887 MIL
7
7
MEM_ADDR<12..0>
L:S::500
RAM_ADDR<12..0>
L:S:2000:3000
10
MEM_BA<1..0>
L:S::500
RAM_BA<1..0>
L:S:2000:3300
MEM_CS_L<3..0>
L:S::500
RAM_CS_L<3..0>
L:S:2500:3200
MEM_CKE<3..0>
L:S::500
500.0000
(200)
167.0 MHz:::
83 MHZ
(200)
FIREWIRE
10 11
9
INT_I2S0_SND_MCLK
500.0000
(200)
(200)
CLKENET_PHY_RX
L:S::300 MIL
CLKENET_LINK_RX
L:S:8000 MIL:9000 MIL
CLKENET_PHY_GBE_REF
L:S::300 MIL
L:S:8000 MIL:9000 MIL
CLKENET_PHY_TX
L:S::300 MIL
CLKENET_LINK_TX
L:S:8000 MIL:9000 MIL
CLKENET_LINK_GTX
L:S::300 MIL
(200)
CLKENET_PHY_GTX
L:S:8000 MIL:9000 MIL
(200)
CLKFW_PHY_PCLK
L:S::300 MIL
CLKFW_LINK_PCLK
L:S:7500 MIL:8000 MIL
500.0000
(200)
CLKFW_PHY_LCLK
L:S:7500 MIL:8000 MIL
500.0000
(200)
CLKFW_LINK_LCLK
L:S::300 MIL
(200)
FW_XI
L:S::500 MIL
(200)
L:S::300 MIL
(200)
800.0000
(200)
125.0 MHz:::
10 MIL SPACING
500.0000
500.0000
(200)
13 26
125.0 MHz:::
26
10 MIL SPACING
125.0 MHz:::
13 26
25.00 MHz:::
26
10 MIL SPACING
25.00 MHz:::
13 26
125.0 MHz:::
13
(200)
600.0000
(200)
26
125.0 MHz:::
(200)
10 MIL SPACING
125.0 MHz:::
FW_OSC
(200)
13 26
49.15 MHz:::
27
10 MIL SPACING
49.15 MHz:::
13 27
10 MIL SPACING
49.15 MHz:::
13 27
49.15 MHz:::
13
10 MIL SPACING
98.03 MHz:::
27
10 MIL SPACING
98.03 MHz:::
27
9 11
9
(200)
9 11
9
(200)
SIGNAL CONSTRAINTS - PAGE 1
9 11
9
(200)
RAM_CKE<3..0>
L:S:2500:3200
MEM_RAS_L
L:S::500 MIL
RAM_RAS_L
L:S:2000 MIL:4100 MIL
MEM_CAS_L
L:S::500 MIL
RAM_CAS_L
L:S:2000 MIL:4100 MIL
MEM_WE_L
L:S::500 MIL
RAM_WE_L
L:S:2000 MIL:3100 MIL
MEM_MUXSEL_MSB
L:S:1700 MIL:3000 MIL
9 10
MEM_MUXSEL_LSB
L:S:1700 MIL:3000 MIL
9 10
PRIORITY: 1
PRIMARY LAYERS: 4,7
GOAL: MINIMIZE EXPOSURE ON LONG NETS
9 11
9
(200)
9 11

(200)
9 11
(200)
9 11
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
REV.
051-6338
SHT
NONE
10 11
RAM_DQS_A<7>
L:S:1809 MIL:1887 MIL
ETHERNET
10 11
L:S:1400 MIL:1546 MIL
500.0000
(200)
500.0000
10 11
MEM_DQM<7>
CRYSTALS
SOUND
9 10
MEM_DATA<63..56>
L:S:1903 MIL:2000 MIL
OSC
9 10
RAM_DQS_B<6>
MEM_DQS<7>
PRIORITY: 2
PRIMARY LAYERS: 4,7
SIZE
9 10
RAM_DQS_A<1>
RAM_DQS_B<7>
CONTROL
250.0000
RAM_DQS_A<0>
RAM_DQM_B<7>
ADDR
RAM_DQM_A<0>
RAM_DQM_B<6>
GROUP 7
L:S:700 MIL:800 MIL
I266
RAM_DATA_B<47..40>
GROUP 6
INT_CPUFB_IN
I265
GROUP 3
9 10
500
I274
GROUP 5
167.0 MHz:::
RAM_DQM_B<1>
DDR
RAM
167.0 MHz:::
L:S:1903:2000
RAM_DQM_A<1>
GROUP 4
167.0 MHz:::
RAM_DATA_A<7..0>
500.0000
5 8
167.0 MHz:::
I264
500.0000
10 MIL SPACING
I263
167.0 MHz:::
10 MIL SPACING
(200)
167.0 MHz:::
(200)
167 MHZ
(200)
167.0 MHz:::
10 MIL SPACING
10 MIL SPACING
500.0000
L:S:1344 MIL:1660 MIL
INT_CPUFB_OUT_NORM
250.0000
250.0000
L:S:1344 MIL:1660 MIL
167.0 MHz:::
250.0000
L:S:1602 MIL:1700 MIL
RAM_DATA_A<15..8>
L:S:700 MIL:850 MIL
167.0 MHz:::
10 MIL SPACING
250.0000
MEM_DQS<0>
MEM_DQS<1>
INT_CPUFB_OUT_SHORT
167.0 MHz:::
10 MIL SPACING
(200)
500.0000
MEM_DQM<1>
250.0000
(200)
250.0000
L:S:1602 MIL:1700 MIL
500
L:S::150 MIL
PULSE PARAM
10 MIL SPACING
L:S:1050 MIL:1150 MIL
MEM_DQM<0>
L:S:2650 MIL:2750 MIL
INT_CPUFB_OUT
NET_SPACING_TYPE
L:S:500 MIL:600 MIL
I262
L:S:1344:1660
SYSCLK_CPU
STUB_LENGTH
L:S:500 MIL:600 MIL
500
MEM_DATA<15..8>
MAX EXPOSED LENGTH
INT_CPUFB_LONG
GROUP 1
MAX VIAS
L:S::150 MIL
INT_CPUFB_IN_NORM
L:S:1602:1700
I269
MATCHED_DELAY
SYSCLK_CPU_UF
9 10
MEM_DATA<7..0>
(200)
PROPAGATION_DELAY
167 MHZ
I261
I268
GROUP 2
(200)
CLOCK LINE CONSTRAINTS

GROUP
GROUP 0
OF
35 40
1
8
GROUP
MAXBUS
SIG_NAME
PROPAGATION_DELAY
MAX_VIAS
MAX_EXPOSED_LENGTH
STUB_LENGTH
CPU_AACK_L
L:S:1500 MIL:2700 MIL
(250)
CPU_ADDR<0..31>
L:S:1500:3100
(250)
CPU_ARTRY_L
L:S:1500 MIL:2700 MIL
(250)
CPU_BG_L
L:S:1500 MIL:2700 MIL
(250)
CPU_BR_L
L:S:1500 MIL:2700 MIL
(250)
CPU_CI_L
L:S:1500 MIL:2700 MIL
(250)
CPU_DATA<0..31>
L:S:1100:2700
(250)
CPU_DATA<32..63>
L:S:1100:2700
(250)
CPU_DBG_L
L:S:1500 MIL:2700 MIL
(250)
CPU_DTI<0..2>
L:S:1500:2950
(250)
CPU_DRDY_L
L:S:1500 MIL:3200 MIL
(250)
CPU_GBL_L
DIGITAL SIGNALS
L:S:1500 MIL:2700 MIL
(250)
CPU_HIT_L
L:S:1500 MIL:2800 MIL
(250)
CPU_QACK_L
L:S:1500 MIL:2700 MIL
(250)
CPU_QREQ_L
L:S:1500 MIL:2700 MIL
(250)
CPU_TA_L
L:S:1500 MIL:2700 MIL
(250)
CPU_TBST_L
L:S:1500 MIL:2700 MIL
(250)
CPU_TEA_L
L:S:1500 MIL:3000 MIL
(250)
CPU_TS_L
L:S:1500 MIL:2700 MIL
(250)
CPU_TSIZ<0..2>
L:S:1500:3500
(250)
CPU_TT<0..4>
L:S:1500:3400
(250)
L:S:1500 MIL:3100 MIL
(250)
CPU_WT_L
NET_SPACING_TYPE
5
NO_TEST
PULSE_PARAM
TRUE
83 MHZ
5 8
Temporary Area for TMDS/DVO signal constraints
5 8
5 8
5 8
5 8
5 8
TRUE
ALL TMDS GROUP SIGNALS ROUTE AT LAYER 4 OR 7 AND HAVE SAME WIDTH SPACING RULE AS OTHER TMDS SIGNALES
100 OHM SPACING
GPU_TMDS_CLKN
GPU_CLKTMDS
GPUTMDS:G:L:S:0 MIL:50 MIL
500.0000
100 OHM SPACING
100 OHM SPACING
GPU_TMDS_CLKP
GPU_CLKTMDS
500.0000
100 OHM SPACING
I233
100 OHM SPACING
GPU_TMDS_DN<0>
GPU_TMDS_D0
500.0000
100 OHM SPACING
I232
100 OHM SPACING
GPU_TMDS_DP<0>
GPU_TMDS_D0
500.0000
100 OHM SPACING
I234
100 OHM SPACING
GPU_TMDS_DN<1>
GPU_TMDS_D1
500.0000
100 OHM SPACING
I235
100 OHM SPACING
GPU_TMDS_DP<1>
GPU_TMDS_D1
GPUTMDS:G:L:S:0
MIL:50
MIL
500.0000
100 OHM SPACING
I236
100 OHM SPACING
GPU_TMDS_DN<2>
GPU_TMDS_D2
500.0000
100 OHM SPACING
I238
100 OHM SPACING
19 20
19 20
19 20
19 20
19 20
19 20
19 20
19 20
OHM SPACING
19
OHM SPACING
19
19
19
19
19
19
19
I231
83 MHZ
6 8
83 MHZ
6 8
5 8
PRIORITY: 4
5 8
PRIMARY LAYERS: 9
5 8
5 8
GOAL: MINIMIZE TH VIAS
5 8
GPU_TMDS_DP<2>
I237
GPU_TMDS_D2
500.0000
100 OHM SPACING
5 8
5 8
5 8
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
OHM SPACING
OHM SPACING
OHM SPACING
OHM SPACING
OHM SPACING
OHM SPACING
OHM SPACING
OHM SPACING
OHM SPACING
OHM SPACING
OHM SPACING
OHM SPACING
OHM SPACING
SI_TMDS_CLKN
SI_CLKTMDS
SITMDS:G:L:S:0 MIL:50 MIL
I239
SI_TMDS_CLKP
SI_CLKTMDS
I242
SI_TMDS_DN<0>
SI_TMDS_D0
SI_TMDS_DP<0>
SI_TMDS_D0
I243
SI_TMDS_DN<1>
SI_TMDS_D1
I245
SI_TMDS_DP<1>
SI_TMDS_D1
I244
SI_TMDS_DN<2>
SI_TMDS_D2
I246
SI_TMDS_DP<2>
SI_TMDS_D2
ATI_DVOD<11..0>
ATIDVOD:G:L:S:0 MIL:50 MIL
610
I263
I265
ATI_DVOD_DE
19 20
I264
6
6
610.0000
ATI_DVO_HSYNC
610.0000
19 20
ATI_DVO_VSYNC
610.0000
ATI_DVO_CLKP
610.0000
I240
5 8
5 8
5 8
I241
5 8
5 8
5 8
100 OHM SPACING
STUB_LENGTH OF 250 MILS NEEDED WHEN DESIGN SWITCHED TO 14.2
ALL THE DVOD GROUP SIGNALS ROUTE AT LAYER 4 OR 7 AND ROUTE AS STANDARD 50OHM SIGNALS AT 4 MILS
I267
I266
19 20
19 20
165.0 MHz:::
19 20
GPU_DVOD<11..0>
GPUDVOD:G:L:S:0 MIL:50 MIL
700
I259
GPU_DVOD_DE
500.0000
19
I260
GPU_DVO_HSYNC
6
6
500.0000
19
GPU_DVO_VSYNC
500.0000
I262
GPU_DVO_CLKP
500.0000
I268
TMDS_CONN_CLKN
CLKCONN_TMDS
TMDS_CONN:G:L:S:0 MIL:50 MIL
500.0000
I269
TMDS_CONN_CLKP
CLKCONN_TMDS
500.0000
I271
TMDS_CONN_DN<0>
CONN_TMDS_D0
500.0000
I270
TMDS_CONN_DP<0>
CONN_TMDS_D0
500.0000
I272
TMDS_CONN_DN<1>
CONN_TMDS_D1
500.0000
TMDS_CONN_DP<1>
I273
I274 TMDS_CONN_DN<2>
CONN_TMDS_D1
500.0000
CONN_TMDS_D2
500.0000
TMDS_CONN_DP<2>
CONN_TMDS_D2
500.0000
I258
I261
I275
19
19
165.0 MHz:::
100 OHM SPACING

100 OHM SPACING
100 OHM SPACING
100 OHM SPACING
100
100
100
100
100
100
100
100
100
100
100
OHM
OHM
OHM
OHM
OHM
OHM
OHM
OHM
OHM
OHM
OHM
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
100 OHM SPACING
19
22 39
22 39
22
22
22
22
22
22

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6338
OF
36 40
1
7
Digital Signals (contd)
GROUP
SIG_NAME
AGP
AGP BYTES 0-1
AGP BYTES 2-3
AGP SIDEBAND
AGP CONTROL
PCI
ULTRA ATA-100
EIDE
NO_TEST
GROUP
PULSE_PARAM
L:S:1050:1450
66 MHz
12 19
AGP_CBE<1..0>
L:S:1050:1450
66 MHz
12 19
AGP_AD_STB<0>
L:S:1050 MIL:1450 MIL6
(250)
AGP_AD_STB_L<0>
L:S:1050 MIL:1450 MIL6
(250)
AGP_AD<31..16>
L:S:1050:1450
AGP_CBE<3..2>
L:S:1050:1450
FW_TPI0:G:L:S:0 MIL:5 MIL
500.0000
110 OHM SPACING
27 28 39
I242
FW_TPI0P
FW_TPI0
FW_TPI0:G:L:S:0 MIL:5 MIL
500.0000
110 OHM SPACING
27 28 39
FW_TPO0N
FW_TPO0
FW_TPO0:G:L:S:0 MIL:5 MIL
500.0000
110 OHM SPACING
27 28 39
I244
19
FW_TPO0P
FW_TPO0
FW_TPO0:G:L:S:0 MIL:5 MIL
500.0000
110 OHM SPACING
27 28 39
19
FW_TPBI0N
FW_TPBI0
FW_TPBI0:G:L:S:0 MIL:5 MIL
500.0000
110 OHM SPACING
28
66 MHz
12 19
FW_TPBI0P
FW_TPBI0
FW_TPBI0:G:L:S:0 MIL:5 MIL
500.0000
110 OHM SPACING
28
66 MHz
12 19
FW_TPAO0N
FW_TPAO0
FW_TPAO0:G:L:S:0 MIL:5 MIL
500.0000
110 OHM SPACING
28
PRIORITY: 4
PRIMARY LAYERS: 9
FW_TPAO0P
FW_TPAO0
FW_TPAO0:G:L:S:0 MIL:5 MIL
500.0000
110 OHM SPACING
28
FW_TPA1N
FW_TPA1
FW_TPA1:G:L:S:0 MIL:4%
500.0000
110 OHM SPACING
27 28
FW_TPA1P
FW_TPA1
FW_TPA1:G:L:S:0 MIL:4%
500.0000
110 OHM SPACING
27 28
GOAL: MINIMIZE TH VIAS
8 MIL SPACING
133.0 MHz::: 12
19
8 MIL SPACING
133.0 MHz::: 12
19
66 MHz
12 19
I243
AGP_SB_STB
L:S:1050 MIL:1450 MIL6
(350)
AGP_SB_STB_L
L:S:1050 MIL:1450 MIL6
(350)
AGP_FRAME_L
L:S:1250 MIL:1950 MIL6
66.00 MHz::: 12
19
FW_TPI1N
FW_TPI1
FW_TPI1:G:L:S:0 MIL:4%
500.0000
110 OHM SPACING
28 39
AGP_IRDY_L
L:S:1250 MIL:1950 MIL6
66.00 MHz::: 12
19
FW_TPI1P
FW_TPI1
FW_TPI1:G:L:S:0 MIL:4%
500.0000
110 OHM SPACING
28 39
FW_TPO1N
FW_TPO1
FW_TPO1:G:L:S:0 MIL:4%
500.0000
110 OHM SPACING
28 39
FW_TPO1:G:L:S:0 MIL:4%
500.0000
110 OHM SPACING
28 39
8 MIL SPACING
66.00 MHz::: 12
19
FW_TPB1N
FW_TPB1
FW_TPB1:G:L:S:0 MIL:4%
500.0000
110 OHM SPACING
27 28
8 MIL SPACING
66.00 MHz::: 12
19
FW_TPB1P
FW_TPB1
FW_TPB1:G:L:S:0 MIL:4%
500.0000
110 OHM SPACING
27 28
AGP_TRDY_L
L:S:1250 MIL:1950 MIL6
66.00 MHz::: 12
19
AGP_DEVSEL_L
L:S:1250 MIL:1950 MIL7
66.00 MHz::: 12
19
AGP_STOP_L
L:S:1250 MIL:1950 MIL6
66.00 MHz::: 12
19
AGP_PAR
L:S:1250 MIL:1950 MIL6
66.00 MHz::: 12
19
AGP_REQ_L
L:S:1250 MIL:1950 MIL6
66.00 MHz::: 12
19
AGP_GNT_L
L:S:1250 MIL:1950 MIL6
66.00 MHz::: 12
19
AGP_RBF_L
L:S:1250 MIL:1950 MIL6
66.00 MHz::: 12
19
ETHERNET
Zo = 100
PCI_AD<31..0>
L:S:6000:12500
MIN_DAISY_CHAIN
33 MHz
9 12 17 18 24 39
PCI_CBE<3..0>
L:S:6000:12500
MIN_DAISY_CHAIN
33 MHz
12 17 18 24
PCI_FRAME_L
L:S:6000 MIL:12500 MIL
MIN_DAISY_CHAIN
33.00 MHz::: 12
PCI_IRDY_L
L:S:6000 MIL:12500 MIL
MIN_DAISY_CHAIN
33.00 MHz::: 12
17 18 24 39
PCI_TRDY_L
L:S:6000 MIL:12500 MIL
MIN_DAISY_CHAIN
33.00 MHz::: 12
17 18 24 39
PCI_DEVSEL_L
L:S:6000 MIL:12500 MIL
MIN_DAISY_CHAIN
33.00 MHz::: 12
17 18 24 39
17 18 24 39
PRIORITY: 7
PRIMARY
LAYERS: 4,7
LVDS
Zo = 100
SECONDARY
LAYERS: 2,9
LOWER
FW_TPO1P
FW_TPO1
MDI_P<0>
ENET_MDI0
ENET_MDI0:G:U43.29:J23.1:0 MIL:100 MIL
MDI_M<0>
ENET_MDI0
MDI_P<1>
ENET_MDI1
MDI_M<1>
ENET_MDI1
MDI_P<2>
ENET_MDI2
MDI_M<2>
ENET_MDI2
MDI_P<3>
ENET_MDI3
MDI_M<3>
ENET_MDI3
CLKLVDS_LN
CLKLVDS_L
LVDS:G:L:S:0 MIL:110 MIL
500.0000
CLKLVDS_LP
CLKLVDS_L
500.0000
LVDS_L0N
LVDS_L0
500.0000
PCI_STOP_L
L:S:6000 MIL:12500 MIL
MIN_DAISY_CHAIN
33.00 MHz::: 12
17 18 24 39
LVDS_L0
500.0000
PCI_PAR
L:S:6000 MIL:12500 MIL
MIN_DAISY_CHAIN
33.00 MHz::: 12
17 18 24 39
LVDS_L1N
LVDS_L1
500.0000
LVDS_L1P
LVDS_L1
500.0000
UIDE_DATA<15..8>
L:S::710
U51.V1:RP19.3::600 MIL
UIDE_DATA<6..0>
L:S::600
UIDE_ADDR<2..0>
L:S::650
UIDE_RST_L
L:S::400 MIL
UIDE_DIOW_L
L:S::400 MIL
UIDE_DIOR_L
L:S::600 MIL
(200)
10 MIL SPACING
(200)
100 MHZ
13 24
LVDS_L2N
LVDS_L2
500.0000
(200)
100.0 MHz:::
13 24
LVDS_L2P
LVDS_L2
500.0000
(200)
100 MHZ
13 24
CLKLVDS_UN
CLKLVDS_U
500.0000
100 MHZ
13 24
CLKLVDS_UP
CLKLVDS_U
500.0000
(200)
100.0 MHz:::
13 24
LVDS_U0N
LVDS_U0
500.0000
(200)
100.0 MHz:::
13 24
LVDS_U0P
LVDS_U0
500.0000
(200)
100.0 MHz:::
13 24
LVDS_U1N
LVDS_U1
500.0000
(200)
100.0 MHz:::
13 24
NEED TO MATCH DELAY TO 250
UPPER
UIDE_DMACK_L
L:S::400 MIL
LVDS_U1P
LVDS_U1
500.0000
UIDE_CS0_L
L:S::500 MIL
(200)
100.0 MHz:::
13 24
LVDS_U2N
LVDS_U2
500.0000
UIDE_CS1_L
L:S::500 MIL
(200)
100.0 MHz:::
13 24
LVDS_U2P
LVDS_U2
500.0000
UIDE_DMARQ
L:S::400 MIL
(200)
100.0 MHz:::
13
UIDE_IOCHRDY
L:S::600 MIL
(200)
100.0 MHz:::
13 24
TMDS_CLKN
CLKTMDS
TMDS:G:L:S:0 MIL:50 MIL
500.0000
TMDS_CLKP
CLKTMDS
500.0000
TMDS_DN<0>
TMDS_D0
500.0000
TMDS_DP<0>
TMDS_D0
500.0000
TMDS_DN<1>
TMDS_D1
500.0000
TMDS_DP<1>
TMDS_D1
500.0000
10 MIL SPACING
UIDE_INTRQ
L:S::400 MIL
(200)
100.0 MHz:::
13
HD_DATA<15..0>
L:S:5000:6500
(200)
100 MHZ
24
HD_ADDR<2..0>
L:S:5000:6500
(200)
100 MHZ
24
HD_RESET_L
L:S:4000 MIL:6000 MIL

7
100.0 MHz:::
24
HD_DIOW_L
L:S:3000 MIL:5200 MIL

7
(200)
100.0 MHz:::
24
HD_DIOR_L
L:S:6100 MIL:6150 MIL

7
(200)
100.0 MHz:::
24
HD_DMACK_L
L:S:4500 MIL:6000 MIL

7
(200)
100.0 MHz:::
24
(200)
10 MIL SPACING
TOTAL UIDE+HD SKEW <500MIL
PRIMARY
LAYERS: 4,7
Zo = 100
SECONDARY
LAYERS: 2,9
TMDS_DN<2>
(200)
100.0 MHz:::
24
TMDS_D2
500.0000
(200)
100.0 MHz:::
24
TMDS_DP<2>
TMDS_D2
500.0000
(200)
100.0 MHz:::
13 24
I233
ATI_TMDS_CLKN
ATI_CLKTMDS
ATITMDS:G:L:S:0 MIL:50 MIL
200.0000
HD_IOCHRDY
L:S:6200 MIL:6300 MIL

7
(200)
100.0 MHz:::
24
I234
ATI_TMDS_CLKP
ATI_CLKTMDS
200.0000
HD_INTRQ
L:S:3000 MIL:5000 MIL

7
100.0 MHz:::
13 24
I235
ATI_TMDS_DN<0>
ATI_TMDS_D0
200.0000
I236
ATI_TMDS_DP<0>
ATI_TMDS_D0
200.0000
EIDE_DATA<15..0>
L:S::850
33 MHZ
13 24
EIDE_ADDR<2..0>
L:S::850
33 MHZ
13 24
EIDE_CS0_L
L:S::850 MIL
33.00 MHz:::
13 24
EIDE_CS1_L
L:S::850 MIL
33.00 MHz:::
13 24
EIDE_RD_L
L:S::500 MIL
33.00 MHz:::
13 24
EIDE_WR_L
L:S::500 MIL
33.00 MHz:::
13 24
EIDE_IOCHRDY
L:S::500 MIL
33.00 MHz:::
13 24
EIDE_INT
L:S::500 MIL
33.00 MHz:::
13 24
L:S::500 MIL
EIDE_DMACK_L
L:S::500 MIL
EIDE_DMARQ
L:S::500 MIL
33.00 MHz:::
33.00 MHz:::
EIDE_OPTICAL_ADDR<2..0>L:S:4000:6000
13 24
24 39
ATI_TMDS_DN<1>
ATI_TMDS_D1
200.0000
I238
ATI_TMDS_DP<1>
ATI_TMDS_D1
200.0000
I240
ATI_TMDS_DN<2>
ATI_TMDS_D2
500.0000
I239
ATI_TMDS_DP<2>
ATI_TMDS_D2
500.0000
OHM
OHM
OHM
OHM
OHM
OHM
OHM
OHM
OHM
OHM
OHM
OHM
OHM
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
26 39
26 39
26 39
20 22 39
20 22 39
20 22 39
20 22 39
20 22 39
20 22 39
20 22 39
20 22 39
20 22
20 22
20 22
Zo(diff) = 94 OHMS
Zo(single) = 50 OHMS
20 22
20 22
20 22
19 22
OHM
OHM
OHM
OHM
OHM
OHM
OHM
OHM
OHM
OHM
SPACING
SPACING
19 22
SPACING
19 22 39
SPACING
19 22 39
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
OHM
OHM
OHM
OHM
OHM
OHM
OHM
OHM
OHM
OHM
OHM
OHM
OHM
OHM
OHM
OHM
OHM
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
100 OHM SPACING
100
SPACING
100 OHM
OHM SPACING
19 22 39
19 22 39
19 22 39
19 22 39
20
20
20
20
20
20
20
20
24 39
USB_DE
USB_DE:G:L:S:0 MIL:200 MIL
10 MIL SPACING
14
USB_DEP
USB_DE
USB_DE:G:L:S:0 MIL:200 MIL
10 MIL SPACING
14
USB_DF
USB_DF:G:L:S:0 MIL:200 MIL
10 MIL SPACING
14
USB_DFP
USB_DF
USB_DF:G:L:S:0 MIL:200 MIL
10 MIL SPACING
14
BT_USB_DM
BT_USB_D
BT_USB:G:L:S:0 MIL:200 MIL
10 MIL SPACING
14 25 39
BT_USB_DP
BT_USB_D
BT_USB:G:L:S:0 MIL:200 MIL
10 MIL SPACING
14 25 39
USB 2.0
MODEM_USB_DM
MODEM_USB_D
MODEM_USB:G:L:S:0 MIL:200 MIL
10 MIL SPACING
14 25 39
Zo = 90
MODEM_USB_DP
MODEM_USB_D
MODEM_USB:G:L:S:0 MIL:200 MIL
10 MIL SPACING
14 25 39
PRIORITY: 8
PRIMARY
LAYERS: 4,7
USB_DEM
SECONDARY
LAYERS: 2,9
EIDE_OPTICAL_CS0_L
L:S:4500 MIL:6500 MIL
33.00 MHz:::
24 39
EIDE_OPTICAL_CS1_L
L:S:4500 MIL:6500 MIL
33.00 MHz:::
24 39
NEC_USB_DAM
USB_D1
USB_D1:G:L:S:0 MIL:20 MIL
500.0000
90 OHM SPACING
17 25 39
EIDE_OPTICAL_READ_L
L:S:4500 MIL:6500 MIL
33.00 MHz:::
24 39
NEC_USB_DAP
USB_D1
500.0000
90 OHM SPACING
17 25 39
EIDE_OPTICAL_WR_L
L:S:4500 MIL:6500 MIL
33.00 MHz:::
24 39
NEC_USB_DBM
USB_D2
500.0000
90 OHM SPACING
17 25 39
L:S:4500 MIL:6500 MIL
33.00 MHz:::
24 39
NEC_USB_DBP
USB_D2
500.0000
90 OHM SPACING
17 25 39
EIDE_OPTICAL_INT
L:S:5000 MIL:7000 MIL
33.00 MHz:::
24 39
EIDE_OPTICAL_RST_L
L:S:4500 MIL:6500 MIL
33.00 MHz:::
24 39
L:S:4500 MIL:6500 MIL
33.00 MHz:::
24 39
EIDE_OPTICAL_DMA_RQ
L:S:4500 MIL:6500 MIL
33.00 MHz:::
24 39
ENET_LINK_RXD<7..0>
L:S:8000:9000
ENET_RX_DV
L:S:8000 MIL:9000 MIL
ENET_RX_ER
(400)
(400)
POWER
SUPPLIES
ENET_PHY_TXD<7..0>
L:S:8000:9000
L:S::600
13 26
13 26
L:S:8000 MIL:9000 MIL
ENET_LINK_TXD<7..0>
ENET_PHY_TX_ER
1772_CSSN
1772_CSS
1772_CSS:G:L:S:0 MIL:100 MIL
30
1772_CSSP
1772_CSS
1772_CSS:G:L:S:0 MIL:100 MIL
30
1772_CSIN
1772_CSI
1772_CSI:G:L:S:0 MIL:100 MIL
30
1772_CSIP
1772_CSI
1772_CSI:G:L:S:0 MIL:100 MIL
30
(400)
13 26
THERMOSTAT
13
PRIORITY: 5
L:S:8000 MIL:9000 MIL7
13 26
ENET_LINK_TX_ER
L:S::400 MIL
13
ENET_PHY_TX_EN
L:S:8000 MIL:9000 MIL7
13 26
ENET_LINK_TX_EN
L:S::400 MIL
13
ENET_MDIO
L:S:8000 MIL:9000 MIL
ENET_MDC
ENET_COL
ENET_CRS
L:S:8000 MIL:9000 MIL
FW_LINK_DATA<7..0>
L:S:2700:3500
FW_PHY_DATA<7..0>
3V_SNSM
3V_SNS
3V_SNS:G:L:S:0 MIL:100 MIL
32
3V_SNSP
3V_SNS
32
5V_SNSM
5V_SNS
32
5V_SNSP
5V_SNS
32
13 26
(400)
PRIMARY
LAYERS: 4,7
SECONDARY
LAYERS: 2,9
THERM1_DM
THERM1:G:L:S:0 MIL:100 MIL
25
THERM1_DP
25
THERM2_DM
25
THERM2_DP
25
THERM1_M_DM
THERM1_MAIN
THERM1_MAIN:G:L:S:0 MIL:100 MIL
25
13 26
THERM1_M_DP
THERM1_MAIN
25
L:S:8000 MIL:9000 MIL
13 26
THERM2_M_DM
THERM2_MAIN
25
L:S:8000 MIL:9000 MIL
13 26
THERM2_M_DP
THERM2_MAIN
25
13 26
THERM1_A_DM
THERM1_ALT
THERM1_ALT:G:L:S:0 MIL:100 MIL
25
THERM1_A_DP
THERM1_ALT
25
THERM2_A_DM
THERM2_ALT
25
THERM2_A_DP
THERM2_ALT
25
L:S:4700:5500
7
7
(400)
(400)
(400)
(400)
13 27
27
PRIORITY: 5
FW_LINK_CNTL<1..0>
L:S:9000:10000
13 27
FW_PHY_CNTL<1..0>
L:S::300
27
FW_LINK_LREQ
L:S::300 MIL
13
FW_PHY_LREQ
L:S:8500 MIL:9500 MIL
13 27
FW_PINT
L:S:8500 MIL:9500 MIL
13 27
LAYERS 4 OR 7
Er = 4.3 (DIELECTRIC CONSTANT)
W = 3.1MIL (TRACE WIDTH)
S = 4.9MIL (TRACE SEPERATION)
H = 9.6MIL (DIST BETW PLANES)
T = 0.6MIL (TRACE THICKNESS)
20 22
20 22
100
100
100
100
100
100
100
100
100
100
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
Zo will be lower due to

asymmetric stackup.
26 39
100 OHM SPACING
100 OHM SPACING
Clear adjacent power plane!
26 39
USB_DFM
ETHERNET MII
FIREWIRE MII
100
100
100
100
100
100
100
100
100
100
100
100
100
Zo(diff) = 106.2 OHMS

Zo(single) = 55.4 OHMS
PRIMARY
LAYERS: 4,7
SECONDARY
LAYERS: 2,9

W = 3.6MIL (TRACE WIDTH)
S = 7MIL (TRACE SEPERATION)
Zo(diff) = 89.8 OHMS
Zo(single) = 46.6 OHMS
LAYERS 2 OR 9

SIZE
PRIORITY: 3
PRIMARY LAYERS: 4,7 FOR CONTROLLED IMPEDANCE DIFF PAIRS
SECONDARY LAYERS: 2,9 FOR UNCONTROLLED IMPEDANCE DIFF PAIRS
APPLE COMPUTER INC.
DRAWING NUMBER
REV.
051-6338
SCALE
LAYERS 4 OR 7
SHT
NONE
Zo = 90
13 24
33.00 MHz:::
33 MHZ
USB 1.1
13 24
33 MHZ
100 OHM SPACING
26 39
100 OHM SPACING
L:S:4500 MIL:6000 MIL

7
10 MIL SPACING
100 OHM SPACING

100 OHM SPACING
100 OHM SPACING
100 OHM SPACING
100 OHM SPACING
100 OHM SPACING
100 OHM SPACING
100 OHM SPACING
100 OHM SPACING
100 OHM SPACING
100 OHM SPACING
100 OHM SPACING
100
SPACING
100 OHM
OHM SPACING
100 OHM SPACING
100 OHM SPACING
100 OHM SPACING

W = 3MIL (TRACE WIDTH)
S = 11MIL (TRACE SEPERATION)
26 39
TMDS
L:S:3000 MIL:6000 MIL

7
L:S:3000 MIL:6000 MIL

7
HD_CS1_L
ENET 10 MIL SPACING
LAYERS 4 OR 7
26 39
PRIORITY: 6
HD_DMARQ
HD_CS0_L
EIDE_OPTICAL_DATA<15..0>
L:S:4000:6000
ENET 10 MIL SPACING

ENET 10 MIL SPACING
ENET 10 MIL SPACING
ENET 10 MIL SPACING
ENET 10 MIL SPACING
ENET 10 MIL SPACING
ENET 10 MIL SPACING
ENET 10 MIL SPACING
ENET 10 MIL SPACING
ENET 10 MIL SPACING
ENET 10 MIL SPACING
ENET 10 MIL SPACING
ENET 10 MIL SPACING
ENET 10 MIL SPACING
ENET 10 MIL SPACING
LVDS_L0P
EIDE_RST_L
OPTICAL
NET_SPACING_TYPE MAX_VIAS
FW_TPI0
I237
INTREPID
MAX_EXPOSED_LENGTH
FW_TPI0N
133.0 MHz::: 12
(250)
L:S:1050:1450
RELATIVE_PROPAGATION_DELAY
I241
133.0 MHz::: 12
L:S:1050 MIL:1450 MIL6
AGP_SBA<7..0>
DIFFERENTIAL_PAIR
8 MIL SPACING
L:S:1050 MIL:1450 MIL6
AGP_AD_STB_L<1>
FIREWIRE
Zo = 110
SIG_NAME
8 MIL SPACING
(250)
AGP_AD_STB<1>
Differential Signals
NET_SPACING_TYPE
AGP_AD<15..0>
UIDE_DATA<7>
PROPAGATION_DELAYMAX_VIAS MAX_EXPOSED_LENGTH STUB_LENGTH
OF
37 40
1
POWER NET CONSTRAINTS

GROUP
SIG_NAME
VOLTAGE
MIN_LINE_WIDTH
GROUP
SIG_NAME
CPU_VCORE_SLEEP
CPU
MIN_NECK_WIDTH
CPU_AVDD
MAXBUS_SLEEP
MAIN/SLEEP
I311
VOLTAGE=5V
MIN_LINE_WIDTH=10
MIN_LINE_WIDTH=10
+5V_MAIN
VOLTAGE=5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
39
1V20_REF
VOLTAGE=1.2V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=10
+5V_SLEEP
VOLTAGE=5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
39
3707_INTVCC
VOLTAGE=5V
MIN_LINE_WIDTH=10
MIN_NECK_WIDTH=10
32
5V_SW
VOLTAGE=5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
32
5V_RSNS
VOLTAGE=5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
32
+5V_MAIN_JUMPER
VOLTAGE=5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
32
3V_SW
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
32
3V_RSNS
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
32
+3V_MAIN_JUMPER
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
3707_SGND
VOLTAGE=0V
MIN_LINE_WIDTH=10
2_5V_LX
+3V_MAIN
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
23 39
+3V_SLEEP
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=6
39
+3V_PMU
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
39
+2_5V_MAIN
VOLTAGE=2.5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
39
+2_5V_SLEEP
VOLTAGE=2.5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
+1_8V_MAIN
VOLTAGE=1.8V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=6
+1_8V_SLEEP
VOLTAGE=1.8V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
+1_5V_MAIN
VOLTAGE=1.5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
+1_5V_SLEEP
VOLTAGE=1.5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
+1_5V_LDO
VOLTAGE=1.5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
+ADAPTER
VOLTAGE=1.5V
MIN_LINE_WIDTH=25
DDR RAM
DDR_VREF
INTREPID
I333
39
PLLS
MIN_NECK_WIDTH=10
VOLTAGE=24V
MIN_LINE_WIDTH=50
MIN_NECK_WIDTH=10
30 31 39
+ADAPTER_SW
VOLTAGE=24V
MIN_LINE_WIDTH=50
MIN_NECK_WIDTH=10
30 38
+ADAPTER_SW
VOLTAGE=24V
MIN_LINE_WIDTH=50
MIN_NECK_WIDTH=10
30 38
+ADAPTER_SENSE
VOLTAGE=24V
MIN_LINE_WIDTH=50
MIN_NECK_WIDTH=10
30
+BATT_POS
VOLTAGE=16.8V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
BATT_NEG
VOLTAGE=0V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
1772_DCIN
VOLTAGE=24V
MIN_LINE_WIDTH=10
REFERENCE
30 39
VOLTAGE=12.6V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
30
+BATT_14V_FUSE
VOLTAGE=12.6V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
30
+BATT_24V_FUSE
VOLTAGE=12.6V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
30
VOLTAGE=12.6V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=10
MIN_NECK_WIDTH=10
30
VOLTAGE=5.4V
MIN_LINE_WIDTH=10
30
1772_DLOV
VOLTAGE=5.4V
MIN_LINE_WIDTH=10
30
VOLTAGE=0V
+ADAPTER_ILIM
VOLTAGE=24V
VOLTAGE=24V
MIN_LINE_WIDTH=10
ATI M10
31
MIN_LINE_WIDTH=10
31
VOLTAGE=4.85V
MIN_LINE_WIDTH=10
+4_6V_BU
VOLTAGE=4.6V
MIN_LINE_WIDTH=10
31 32
+4_85V_ESR
VOLTAGE=4.85V
MIN_LINE_WIDTH=10
31
VOLTAGE=3.3V
CARDBUS
30
MIN_LINE_WIDTH=10
+4_85V_RAW
VOLTAGE=3.3V
AIRPORT
30
1772_LDO
1772_GND
11
+2_5V_INTREPID
29 31
MIN_LINE_WIDTH=10
31
MIN_LINE_WIDTH=10
25 29
9 10 15 16
+3V_INTREPID_USB
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
14
+1_5V_INTREPID_PLL
VOLTAGE=1.5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=10
8 12 14
+1_5V_INTREPID_PLL1
VOLTAGE=1.5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=6
14
+1_5V_INTREPID_PLL2
VOLTAGE=1.5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=6
14
VOLTAGE=2.5V
MIN_LINE_WIDTH=50
MIN_NECK_WIDTH=10
+1_5V_INTREPID_PLL3
VOLTAGE=1.5V
MIN_LINE_WIDTH=10
MIN_NECK_WIDTH=6
14
2_5V_LX_F
VOLTAGE=2.5V
MIN_LINE_WIDTH=50
MIN_NECK_WIDTH=10
34
+1_5V_INTREPID_PLL4
VOLTAGE=1.5V
MIN_LINE_WIDTH=10
MIN_NECK_WIDTH=6
14
2_5V_BST
VOLTAGE=5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=10
34
+1_5V_INTREPID_PLL5
VOLTAGE=1.5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=6
12
2_5V_BOOST
VOLTAGE=5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=10
34
+1_5V_INTREPID_PLL6
VOLTAGE=1.5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=6
12
2_5V_DH
VOLTAGE=2.5V
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
34
+1_5V_INTREPID_PLL7
VOLTAGE=1.5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=6
2_5V_DL
VOLTAGE=2.5V
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
34
+1_5V_INTREPID_PLL8
VOLTAGE=1.5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=6
14
1_5V_FB
VOLTAGE=1.5V
MIN_LINE_WIDTH=8
1_5V_LX
VOLTAGE=1.5V
MIN_LINE_WIDTH=50
MIN_NECK_WIDTH=10
34
1_5V_LX_F
VOLTAGE=1.5V
MIN_LINE_WIDTH=50
MIN_NECK_WIDTH=10
34
1_5V_BST
VOLTAGE=5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=10
34
1_5V_BOOST
VOLTAGE=5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=10
34
1_5V_DH
VOLTAGE=1.5V
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
34
1_5V_DL
VOLTAGE=1.5V
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
34
INT_MEM_VREF
VOLTAGE=1.25V
MIN_LINE_WIDTH=10
INT_AGP_VREF
VOLTAGE=1.25V
MIN_LINE_WIDTH=10
12 19
VOLTAGE=0V
UIDE_REF
VOLTAGE=0V
+3V_AIRPORT
VOLTAGE=3.3V
MIN_LINE_WIDTH=10
3V SWITCHER
MAX1715
2.5V SWITCHER
MIN_LINE_WIDTH=8
MIN_LINE_WIDTH=25
13
MIN_NECK_WIDTH=10
39
+VCC_CBUS_SW
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
18
+VPP_CBUS_SW
VOLTAGE=5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
18
CONTROL
MIN_LINE_WIDTH=8
MAX1715_TON
MIN_LINE_WIDTH=8
34
MIN_LINE_WIDTH=8
34
MIN_LINE_WIDTH=30
MIN_NECK_WIDTH=10
19 20 39
MAX1715_SKIP
+3V_GPU
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
12 19 20 21
MAX1715_REF
VOLTAGE=2.0V
MIN_LINE_WIDTH=8
+3V_GPU_FLT
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
21
MAX1715_VCC
VOLTAGE=5V
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
+2_5V_GPU
VOLTAGE=2.5V
MIN_LINE_WIDTH=30
MIN_NECK_WIDTH=10
21
MAX1715_GND
VOLTAGE=0V
MIN_LINE_WIDTH=30
MIN_NECK_WIDTH=10
34
GPU_MEM_IO
VOLTAGE=2.5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
19 21
VCORE_VCC
VOLTAGE=5V
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
33
GPU_MEM_IO_FLT
VOLTAGE=2.5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
21
VCORE_LX
VOLTAGE=1.4V
MIN_LINE_WIDTH=200
MIN_NECK_WIDTH=10
33
+2_5V_GPU_MEMCORE
VOLTAGE=2.5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
21
+1_8V_GPU
VOLTAGE=1.8V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
19 20 21
VCORE_DH
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
33
+1_5V_AGP
VOLTAGE=1.5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
12 15 16 19 20 21
VCORE_DL
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
33
+2_5V_GPU_PNLIO
VOLTAGE=2.5V
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
21
VCORE_BOOST
VOLTAGE=5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=10
+1_8V_ATI_PVDD
VOLTAGE=1.8V
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
20 21
VCORE_BST
VOLTAGE=5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=10
+1_5V_AGP_GPU
VOLTAGE=1.5V
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
21
VCORE_ILIM
+1_5V_GPU_VDD15
VOLTAGE=1.5V
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
20
VCORE_REF
MAX1717
33
33
MIN_LINE_WIDTH=8
33 39
MIN_LINE_WIDTH=8
33
MIN_LINE_WIDTH=8
14 33
VOLTAGE=0V
MIN_LINE_WIDTH=30
33
VCORE_GNDSNS
VOLTAGE=0V
MIN_LINE_WIDTH=8
33
VCORE_SNS
VOLTAGE=1.4V
MIN_LINE_WIDTH=8
33
VCORE_GNDDIV
VOLTAGE=0V
MIN_LINE_WIDTH=8
33
VCORE_GNDA
VOLTAGE=0V
MIN_LINE_WIDTH=10
1778_VIN
VOLTAGE=14V
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
1778_VCC
VOLTAGE=5V
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
20
1778_GND
VOLTAGE=0V
MIN_LINE_WIDTH=30
MIN_NECK_WIDTH=10
20
1778_BST
VOLTAGE=5V
MIN_LINE_WIDTH=15
1778_BST_RC
VOLTAGE=5V
21
VCORE_TON
MIN_NECK_WIDTH=10
21
VCORE_CC
GPU_VCORE_VDDCI
VOLTAGE=1.2V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=10
19
VCORE_FB
+2_5V_GPU_A2VDD
VOLTAGE=2.5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=10
21
VCORE_TIME
+1_8V_GPU_AVDD
VOLTAGE=1.8V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=10
21
VCORE_VGATE
+1_8V_GPU_PNLPLL
VOLTAGE=1.8V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=10
21
VCORE_GND
+1_8V_GPU_PNLIO
VOLTAGE=1.8V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=10
21
+2_5V_GPU_MCLK
VOLTAGE=2.5V
MIN_LINE_WIDTH=10
MIN_NECK_WIDTH=10
21
+1_8V_GPU_AVDDQ
VOLTAGE=1.8V
MIN_LINE_WIDTH=10
MIN_NECK_WIDTH=10
21
+1_8V_GPU_MEMPLL
VOLTAGE=1.8V
MIN_LINE_WIDTH=10
MIN_NECK_WIDTH=10
21
+3V_ATI_OSC_SLEEP
VOLTAGE=3.3V
MIN_LINE_WIDTH=10
MIN_NECK_WIDTH=10
19
+3V_ATI_SS
VOLTAGE=3.3V
MIN_LINE_WIDTH=10
MIN_NECK_WIDTH=10
19
+GPU_VDD15_UF
VOLTAGE=1.5V
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
20
VOLTAGE=5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25
22
MIN_NECK_WIDTH=10
22 39
+5V_DDC_SLEEP
VOLTAGE=5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=10
22 39
+5V_DDC_SLEEP_UF
VOLTAGE=5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=10
22
+3V_LCD
VOLTAGE=3.3V
MIN_LINE_WIDTH=12
MIN_NECK_WIDTH=10
22 39
+3V_LCD_SW
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
22
I346
GPU_TV_GND1
VOLTAGE=0V
MIN_LINE_WIDTH=25
22
GPU_TV_GND2
VOLTAGE=0V
MIN_LINE_WIDTH=25
22
TV_GND1
VOLTAGE=0V
MIN_LINE_WIDTH=25
22 39
VOLTAGE=0V
MIN_LINE_WIDTH=25
I315
I347
+2_5V_SLEEP_NECK1
VOLTAGE=2.5V
MIN_LINE_WIDTH=10
20
I348
+3V_SLEEP_NECK
VOLTAGE=3V
MIN_LINE_WIDTH=10
34
I349
+1_5V_AGP_NECK
VOLTAGE=1.5V
MIN_LINE_WIDTH=10
20
I350
+1_8V_PVDD_NECK
VOLTAGE=1.8V
MIN_LINE_WIDTH=10
20
I351
GPU_VCORE_NECK
I352
+GPU_VDD15_NECK
VOLTAGE=1.5V
MIN_LINE_WIDTH=10
20
I353
+2_5V_SLEEP_NECK2
VOLTAGE=2.5V
MIN_LINE_WIDTH=10
34
22 39
VOLTAGE=1.2V
MIN_LINE_WIDTH=10
20
+5V_MAIN_AUD
VOLTAGE=5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
25 32
I354
+1_8V_SLEEP_NECK
VOLTAGE=1.8V
MIN_LINE_WIDTH=10
34
I357
+3V_MAIN_AUD
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
25 32
I355
+1_5V_SLEEP_NECK
VOLTAGE=1.5V
MIN_LINE_WIDTH=10
34
I356
I358
AUD_GND
VOLTAGE=0V
MIN_LINE_WIDTH=50
25
I360
+FAN_PWR
VOLTAGE=5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
+1_8V_ATI_TPVDD
VOLTAGE=1.8V
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
21
+1_8V_GPU_TP_PLL
VOLTAGE=1.8V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=10
21
25 39
FAN1_GND
VOLTAGE=0V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
39
+2_5V_MARVELL
VOLTAGE=2.5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
26
FAN2_GND
VOLTAGE=0V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
39
+2_5V_MARVELL_AVDD
VOLTAGE=2.5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
26
+1_0V_MARVELL
VOLTAGE=1.0V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
26
LTC3405_SW
VOLTAGE=1.0V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
26
ETHERNET
NEC USB2.0
VOLTAGE=0V
MIN_LINE_WIDTH=25
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=6
MIN_NECK_WIDTH=12
CHGND1
VOLTAGE=0V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=12
CHGND2
VOLTAGE=0V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=12
CHGND3
VOLTAGE=0V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=12
TRACKPAD
IN
I316
+3V_NEC_VDD
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
17
MIN_NECK_WIDTH=10
20
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=10
20
1778_TG
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
20
1778_BG
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
20
GPU_VCORE_SW
VOLTAGE=1.2V
MIN_LINE_WIDTH=50
MIN_NECK_WIDTH=10
20
GPU_VCORE_SW_F
VOLTAGE=1.2V
MIN_LINE_WIDTH=50
MIN_NECK_WIDTH=10
20
1778_ION
MIN_LINE_WIDTH=8
20
1778_ITH
MIN_LINE_WIDTH=8
20
1778_ITH_RC
MIN_LINE_WIDTH=8
20
1778_VFB
MIN_LINE_WIDTH=8
20 39
1778_FCB
MIN_LINE_WIDTH=8
20
1778_VRNG
MIN_LINE_WIDTH=8
20
LTC3411_VCC
VOLTAGE=3.3V
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
LTC3411_GND
VOLTAGE=0V
MIN_LINE_WIDTH=30
MIN_NECK_WIDTH=10
34
1_8V_SW
VOLTAGE=1.8V
MIN_LINE_WIDTH=30
MIN_NECK_WIDTH=10
34
1_8V_SW_F
VOLTAGE=1.8V
MIN_LINE_WIDTH=30
MIN_NECK_WIDTH=10
34
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=10
17
1_8V_VFB
MIN_LINE_WIDTH=8
34
VOLTAGE=33V
MIN_LINE_WIDTH=40
MIN_NECK_WIDTH=12
27
LTC3411_ITH_RC
MIN_LINE_WIDTH=8
34
I312
+FW_PBUS
VOLTAGE=12.8V
MIN_LINE_WIDTH=100
MIN_NECK_WIDTH=12
28
LTC3411_ITH
MIN_LINE_WIDTH=8
34
+FW_SW
VOLTAGE=12.8V
MIN_LINE_WIDTH=100
MIN_NECK_WIDTH=12
28
LTC3411_SYNC
MIN_LINE_WIDTH=8
34
I345
+FW_AMP_SENSE
VOLTAGE=12.8V
MIN_LINE_WIDTH=100
MIN_NECK_WIDTH=12
LTC3411_SHDN
MIN_LINE_WIDTH=8
34
+FW_PWR_OR
VOLTAGE=33V
MIN_LINE_WIDTH=100
MIN_NECK_WIDTH=12
27 28
LTC1962_INT_VIN
MIN_LINE_WIDTH=20
+FW_PWR1
VOLTAGE=33V
MIN_LINE_WIDTH=100
MIN_NECK_WIDTH=12
28
+FW_VP0
VOLTAGE=33V
MIN_LINE_WIDTH=100
MIN_NECK_WIDTH=12
28 39
+FW_VP1
VOLTAGE=33V
MIN_LINE_WIDTH=100
MIN_NECK_WIDTH=12
+3V_FW
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
27 28
+3V_FW_UF
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
27
I310
MIN_NECK_WIDTH=12
LTC1962
INT PLLS
MIN_NECK_WIDTH=10
+3V_FW_AVDD_PORT2
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
27
+3V_FW_AVDD_PORT0
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
27
+3V_FW_AVDD
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
27
+1_95V_FW_DVDD
VOLTAGE=1.95V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
27
+1_95V_FW_DVDD_RX0
VOLTAGE=1.95V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
27
+1_95V_FW_DVDD_TX0
VOLTAGE=1.95V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
27
+1_95V_FW_DVDD_PORT1
VOLTAGE=1.95V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
27
+1_95V_FW_PLLVDD
VOLTAGE=1.95V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
27
+1_95V_FW_PLL400VDD
VOLTAGE=1.95V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
27
+1_95V_FW_PLL500VDD
VOLTAGE=1.95V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
27
27
FW_VGND0
VOLTAGE=0V
MIN_LINE_WIDTH=100
MIN_NECK_WIDTH=12
28
I314
FW_VGND1
VOLTAGE=0V
MIN_LINE_WIDTH=100
MIN_NECK_WIDTH=12
28
I359
FW_VDD_ON
VOLTAGE=12.8V
MIN_LINE_WIDTH=100
MIN_NECK_WIDTH=12

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SHT
NONE
REV.
051-6338
SCALE
14
28 39
+3V_FW_AVDD_PORT1
34
VOLTAGE=3.3V
IN
20
LM2594_IN
LVDS
MIN_LINE_WIDTH=25
33
NEC_AVDD
IN
FW
VOLTAGE=1.4V
I317
IN
IN
LTC3411
VOLTAGE=5V
I332
CHGND4
VOLTAGE=0V
LTC1778
33
33
33
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=15
33
MIN_LINE_WIDTH=8
MIN_LINE_WIDTH=8
MIN_LINE_WIDTH=15
VOLTAGE=1.8V
VOLTAGE=5V
34
MIN_LINE_WIDTH=8
VOLTAGE=1.8V
+1_8V_GPU_VDDDI
22 39
34
MIN_LINE_WIDTH=8
+1_8V_GPU_PLL
24
MIN_NECK_WIDTH=10
34
VOLTAGE=1.2V
24 32
MIN_LINE_WIDTH=25
34
GPU_VCORE
MIN_NECK_WIDTH=10
VOLTAGE=14V
34
2_5V_ILIM
MIN_NECK_WIDTH=10
23 39
34
MIN_LINE_WIDTH=8
MIN_LINE_WIDTH=25
MIN_LINE_WIDTH=10
32
32
1_5V_ILIM
MIN_LINE_WIDTH=25
VOLTAGE=3.3V
1.65V SWITCHER
VOLTAGE=3.3V
23 39
30 31
MIN_NECK_WIDTH=10
VOLTAGE=5V
MIN_LINE_WIDTH=10
31
MIN_LINE_WIDTH=25
+HD_LOGIC_SLEEP
VOLTAGE=5V
31
VOLTAGE=2.5V
+5V_HD_SLEEP
VOLTAGE=0V
MIN_LINE_WIDTH=10
30 39
30
1772_LX
VOLTAGE=12.6V
VOLTAGE=1.25V
LTC3707
5V SWITCHER
88E1111
ENET_CTAP_CHGND
31
31
VOLTAGE=0V
39
I361
MIN_LINE_WIDTH=10
1625_SGND
TV_GND2
INVERTER
VOLTAGE=5V
1625_INTVCC
+14V_INV
I/O AREA
1625_EXTVCC
31
39
+3V_HALL_EFFECT
I308
31
MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10
+5V_INV_SW
FAN
MIN_LINE_WIDTH=10
MIN_NECK_WIDTH=10
+5V_INV_UF_SW
AUDIO
MIN_LINE_WIDTH=25
VOLTAGE=14V
MIN_LINE_WIDTH=25
+5V_TPAD_SLEEP
VOLTAGE=14V
+PBUS_JUMPER
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
MISC
VIDEO
5 6 7 8 15 16 33
MIN_NECK_WIDTH
MIN_LINE_WIDTH=10
VOLTAGE=12.8V
+3V_PMU_AVCC
HALL EFFECT
14V SWITCHER
MIN_LINE_WIDTH
VOLTAGE=24V
1625_VSW
VOLTAGE=12.6V
+3V_PMU_ESR
TRACKPAD
MIN_NECK_WIDTH=10
VOLTAGE
1625_VIN
+PBUS
+ADAPTER_OR_BATT
HD
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
SIG_NAME
LTC1625
+BATT
+BATT_VSNS
PMU
VOLTAGE=1.8V
MIN_LINE_WIDTH=25
GROUP
5 33 39
MIN_LINE_WIDTH=25
+BATT_RSNS
VOLTAGE=1.4V
MIN_NECK_WIDTH
MIN_NECK_WIDTH=10
VOLTAGE=24V
INT_MEM_REF_H
BATTERY
CHARGER
MIN_LINE_WIDTH
MIN_LINE_WIDTH=25
+24V_PBUS
+1_5V_SLEEP_VIN
ADAPTER
VOLTAGE
VOLTAGE=1.4V
OF
38 40
1
FUNCTIONAL TEST POINTS

PROBES ARE ON BOTTOM SIDE. MINIMUM PAD/HOLE SIZE IS 25
FUNC_TEST IS ONLY PROPERTY USED BY THE TOOLS. FUNC_QTY
LISTS THE NUMBER OF TEST POINTS ON THAT NET AND WITHIN
FUNC_DIST IS SIMILARLY USED TO DEFINE MAXIMUM DISTANCE
GROUP
SCAN/TEST
SIG_NAME
I2
I3
TRUE
13
TRUE
I6
JTAG_ASIC_TRST_L
TRUE
I5
CPU_CHKSTP_OUT_L
TRUE
I7
CPU_SRESET_L
TRUE
I9
CPU_HRESET_L
TRUE
I8
JTAG_CPU_TMS
TRUE
5 6
PCI_STOP_L
TRUE
1000
TRUE
1000
I110
AIRPORT_PCI_REQ_L
TRUE
1000
I112
TRUE
1000
6 11 13 23
AIRPORT_PCI_GNT_L
AIRPORT_PCI_INT_L
TRUE
1000
MAIN_RESET_L
6 11 13 23
I114
I113
TRUE
TRUE
1778_VFB
TRUE
20 38
TRUE
VCORE_FB
TRUE
33 38
I217
+1_8V_MAIN
TRUE
38
I218
+2_5V_MAIN
TRUE
38
I219
+5V_MAIN
CBUS_DET_1_L
TRUE
TRUE
TRUE
TRUE
IN
TRUE
2000
TRUE
TMDS_DN<0..2>
TRUE
1000
I38
TMDS_DP<0..2>
TRUE
1000
I39
TMDS_CONN_CLKP
TRUE
1000
VGA_R
TRUE
1000
I42
I41
VGA_G
TRUE
1000
I44
VGA_B
TRUE
1000
VGA_HSYNC
TRUE
1000
I43
I46
VGA_VSYNC
TRUE
1000
1000
DVI_DDC_DATA_UF
TRUE
I48
DVI_HPD_UF
TRUE
1000
+5V_DDC_SLEEP
TRUE
2000
I49
TRUE
2000
TRUE
1000
TRUE
1000
TRUE
1000
TRUE
1000
LVDS_L1P
TRUE
1000
LVDS_L2N
TRUE
1000
TRUE
1000
I57
LVDS_L2P
I56
CLKLVDS_LN
CLKLVDS_LP
TRUE
1000
I59
LVDS_DDC_CLK
TRUE
1000
I60
LVDS_DDC_DATA
I223
+3V_LCD
+3V_SLEEP
CHGND4
TRUE
TRUE
TRUE
TRUE
1000
2000
I67
I66
+5V_INV_SW
TRUE
2000
I68
BRIGHT_PWM
TRUE
2000
TRUE
TRUE
2000
I249
INV_GND
I70
TV_C
TRUE
I72
TV_Y
TRUE
2000
I71
TV_COMP
TRUE
2000
TV_GND1
TRUE
2000
I73
I74
TV_GND2
TRUE
2000
I76
INT_I2S0_SND_TO_DAC
TRUE
1000
TRUE
I78
INT_I2S0_SND_MCLK
TRUE
1000
INT_I2S0_SND_SCLK
TRUE
1000
I83
TRUE
1000
I77
SND_HP_MUTE_L
TRUE
1000
TRUE
1000
I79
SND_AMP_MUTE
I84
SND_HW_RESET_L
TRUE
1000
I85
SND_HP_SENSE_L
TRUE
1000
TRUE
1000
I86
SND_LIN_SENSE_L
I81
INT_I2C_CLK2
TRUE
1000
I80
INT_I2C_DATA2
TRUE
1000
TRUE
1000
I88
CHARGE_LED_L
TRUE
1000
NEC_LUSB_OCI_UF
TRUE
1000
I89
NEC_LUSB_PPON
TRUE
1000
I87
I90
ADAPTER_DET
TRUE
2000
+5V_SLEEP
TRUE
3000
+3V_SLEEP
TRUE
I224
+5V_MAIN
I225
I226
TRUE
1000
I118
TRUE
I121
ROM_RW_L
TRUE
1000
I229
RF_DISABLE_L
TRUE
1000
I230
AIRPORT_CLKRUN_L
TRUE
I120
+3V_AIRPORT
TRUE
2000
(100 MIL PROBE PREFERRED)
28 37
28 38
39
1000
30 31 38
LMU/ALS
12 17 18 24 37
12 17 18 24 37
12 17 18 24 37
I251
ST7_SLEEP_LED_H
TRUE
23
I250
PMU_SLEEP_LED
TRUE
23
I253
PMU_LID_CLOSED_L
TRUE
23 29
I252
LMU_DETECT
TRUE
23
12 17 18 24 37
12 17 18 24 37
12 17 18 24 37
TRUE
1000
IN
12 24
12 24
14 24
MISC.
14 17 18 19 24 29
I192
I195
SLEEP_LED
TRUE
23
PMU_KB_RESET_L
TRUE
29
I196
SLEEP
TRUE
23 25 29 32 34
14 17 24 29
I198
PMU_CPU_HRESET_L
TRUE
6 29
9 24
I197
BB_RESET_L
TRUE
9 12 24
I248
+3V_PMU_RESET
TRUE
29 33
12 24 35
9 12 24
9 12 24
24
24
38
1000
IN
I124
EIDE_OPTICAL_DATA<0..15>
TRUE
I123
EIDE_OPTICAL_DMA_RQ
TRUE
2000
TRUE
2000
I126
EIDE_OPTICAL_READ_L
I125
TRUE
2000
I127
EIDE_OPTICAL_ADDR<0..2>
TRUE
2000
EIDE_OPTICAL_CS0_L
TRUE
2000
EIDE_OPTICAL_CS1_L
TRUE
2000
EIDE_OPTICAL_RST_L
TRUE
2000
EIDE_OPTICAL_WR_L
TRUE
2000
I132
TRUE
2000
EIDE_OPTICAL_INT
TRUE
2000
I134
+5V_TPAD_SLEEP
TRUE
3000
22 36
I131
22 36
I130
22
22
24 37
24 37
24 37
24 37
24 37
24 37
24 37
24 37
24 37
24 37
24 37
22
TRACKPAD
22
22
22
I133
I136
TPAD_F_TXD
TRUE
3000
TRUE
3000
I135
TPAD_F_RXD
LID_CLOSED_L
TRUE
3000
22
I137
I138
+3V_HALL_EFFECT
TRUE
3000
22
I139
SOFT_PWR_ON_L
TRUE
3000
22 38
I141
COMM_RESET_L
TRUE
4000
I140
COMM_SHUTDOWN
TRUE
4000
IN
IN
MODEM/
SERIAL
I142
COMM_RING_DET_L
TRUE
4000
I144
COMM_TXD_L
TRUE
4000
I143
COMM_TRXC
TRUE
4000
COMM_GPIO_L
TRUE
4000
20 22 37
20 22 37
20 22 37
I146
20 22 37
I145
COMM_DTR_L
TRUE
4000
TRUE
4000
I147
COMM_RTS_L
COMM_RXD
TRUE
4000
20 22 37
20 22 37
I149
23 38
23
23
23
23 38
22 23 29 33
14 25
14 25
14 25 29
14 25
14 25
14 25
14 25
14 25
14 25
20 22 37
20 22 37
KEYBOARD
20 22
I148
KBD_ID
TRUE
3000
KBD_INTL
TRUE
3000
I151
TRUE
3000
I152
KBD_CAPSLOCK_LED
TRUE
3000
I154
TRUE
3000
38 39
KBD_NUMLOCK_LED
IN
I153
KBD_FUNCTION_L
TRUE
3000
IN
I150
20 22
22 38
KBD_JIS
I155
KBD_COMMAND_L
TRUE
3000
22 38
TRUE
3000
I157
KBD_OPTION_L
22 38
I156
KBD_CONTROL_L
TRUE
3000
22
22
IN
22
22
BATTERY
I159
KBD_SHIFT_L
TRUE
3000
TRUE
3000
I158
KBD_X<0..9>
I161
KBD_Y<0..7>
TRUE
I160
+BATT_POS
TRUE
1000
BATT_NEG
TRUE
1000
I162
BATT_CLK
TRUE
1000
BATT_DATA
TRUE
1000
3000
23 29
23
23
23
23
23 29
23 29
23 29
23 29
23 29
23 29
23 29
30 38
30 38
22
22 38
I164
22 38
I163
I166
PMU_BATT_DET_L
TRUE
1000
I167
+FAN_PWR
TRUE
3000
FAN1_TACH
TRUE
3000
I168
I169
FAN2_TACH
TRUE
3000
I170
TRUE
3000
14 25
FAN1_GND
I171
FAN2_GND
TRUE
3000
25
MDI_P<0..3>
TRUE
1000
MDI_M<0..3>
TRUE
1000
14 25
30
30
29 30
14 25
14 25 35
FANS
14 25
14 25
25 38
25
25
38
14 25
ETHERNET
I174
I173
14 25

26 37

26 37
14 25
FW_TPO0P
TRUE
1000
I177
I176
FW_TPO0N
TRUE
1000
25 29
FW_TPO0R
TRUE
1000
25 29
I179
I178
FW_TPI0P
TRUE
1000
17 25
I180
FW_TPI0N
TRUE
1000
17 25
+FW_VP0
TRUE
1000
38 39
I182
I181
FW_VGND
TRUE
1000
38 39
14 25
FIREWIRE
27 28 37
27 28 37
28
27 28 37
SIZE
27 28 37
28 38
APPLE COMPUTER INC.
39
D
SCALE
38 39
DRAWING NUMBER
REV.
051-6338 C
39
40
1
SHT
NONE
38
14 25
2000
1000
4
2000
I129
1000
2000
1000
I82
ROM_OE_L
ROM_CS_L
I128
2000
2000
2000
TRUE
INT_I2S0_SND_LRCLK
I119
1000
19 22 37
1000
TRUE
+14V_INV
I75
1000
19 22 37
1000
TRUE
I58
I62
TRUE
18
1000
TRUE
I47
I54
ROM_ONBOARD_CS_L
18
1000
TRUE
TMDS_CONN_CLKN
I55
OPTICAL
38
TRUE
28 37
28 37
23 38
1000
CBUS_DET_2_L
LVDS_L1N
1000
9 12 17 18 24 37
38 39
I37
LVDS_L0P
TRUE
TRUE
I35
LVDS_L0N
PMU_PME_L
38 39
2000
DVI_DDC_CLK_UF
TRUE
I115
5 33 38
I26
I36
I116
1000
I117
19 20 38
+3V_PMU
1000
38
TRUE
I222
TRUE
CLK33M_AIRPORT
38
GPU_VCORE
+3V_MAIN
TRUE
1000
PCI_PAR
13 14 25
I221
TRUE
I111
13 14 25
+5V_SLEEP
1000
1000
I108
TRUE
I220
TRUE
13
TRUE
CPU_VCORE_SLEEP
PCI_TRDY_L
DC PWR IN
28 37
17 25
13
INT_I2C_DATA1
I53
I105
INT_I2C_CLK1
I51
I106
I17
I52
LIO
1000
I16
CHGND1
S-VIDEO
1000
TRUE
TRUE
I45
INVERTER
TRUE
TRUE
INT_I2C_DATA0
I40
17 25
13
TRUE
TRUE
14 25 37
TRUE
TRUE
INT_TST_PLLEN_PD
+ADAPTER
14 25 37
TRUE
NEC_RUSB_PPON
TRUE
INT_TST_MONOUT_TP
I21
I189
TRUE
MODEM_USB_DP
I109
I19
1000
MODEM_USB_DM
13
TRUE
1000
TRUE
I102
PCI_DEVSEL_L
I20
TRUE
FW_VGND
I100
5 6
TRUE
+FW_VP1
I188
I101
PCI_IRDY_L
INT_TST_MONIN_PD
TRUE
I187
5 6 7
I107
INT_JTAG_TEI
I186
PCI_FRAME_L
1000
17 25 37
14 25 37
PCI_AD<0..31>
TRUE
14 25 37
TRUE
NEC_RUSB_OCI_UF
1000
FW_TPO1N
1000
17 25 37
I103
FUNC_DIST
TRUE
TRUE
I104
FUNC_QTY
TRUE
FW_TPI1P
TRUE
WIRELESS
I185
FUNC_TEST
FW_TPO1P
FW_TPI1N
BT_USB_DP
RT. USB
SIG_NAME
I183
I184
BT_USB_DM
TRUE
FIREWIRE
(CONT.)
1000
I99
I11
I27
17 25 37
I98
5 6
+24V_PBUS
TRUE
I97
+PBUS
NEC_USB_DAP
13 26
5 6
I18
GROUP
17 25 37
TRUE
I215
FUNC_DIST
13 26
TRUE
INT_I2C_CLK0
FUNC_QTY
TRUE
NEC_USB_DBP
TRUE
I15
I96
FUNC_TEST
NEC_USB_DAM
NEC_USB_DBM
JTAG_CPU_TCK
TRUE
SIG_NAME
I94
I95
JTAG_CPU_TDO_TP
JTAG_CPU_TRST_L
USB
26
JTAG_CPU_TDI
I24
LVDS
TRUE
I12
I25
DVI
JTAG_ASIC_TDI
I4
I216
CARDBUS
GROUP
13 26
JTAG_ASIC_TCK
I14
FUNC_DIST
TRUE
JTAG_ASIC_TDO_TP
I13
PWR/GND
FUNC_QTY
JTAG_ASIC_TMS
I1
I10
INT I2C
FUNC_TEST
MIL.
IS FOR REFERENCE AND
THAT GROUP/CONNECTOR.
FROM A CONNECTOR.
OF
REVISION HISTORY
EVT RELEASE (continue)
Proto Release
7/22/02 - Initial acquisition of schematic (from 051-6278 Rev 01)

Added P59 SO-DIMM connector as placeholder (p.12)
Added P59 LVDS connector as placeholder (p.22)
Changed J9 to 10 pin Elco connector for modem (p.25)
Changed PBUS holdup caps to P59 electrolytic cans (p.30)
7/23/02 - Removed L3 (p.8)
Replaced processor with 360 pin Apollo (p.5,6)
7/24/02 - Added FETs between battery and PBUS rails for airline power (p.29)
8/10/02 - Added USB 2.0 (p.18)
8/20/02 - Removed spare pullup straps for Intrepid (p.9)
Removed USB overcurrent protection [to be placed on other boards] (p.18)
Changed right USB board connector to 16 pin Hirose connector (p.26)
Changed LIO board connector to 40 pin Molex connector (p.26)
Added 6 bypass caps to MAXBUS_SLEEP and CPU_VCORE_SLEEP (p.5)
8/26/02 - Removed 32 bypass caps for +3V_MAIN at Intrepid (p.16)
Removed 5 bypass caps for +2_5V_MAIN at Intrepid (p.16)
Removed 3 bypass caps for +1_5V_AGP at Intrepid (p.16)
Removed 4 bypass caps for MAXBUS_MAIN at Intrepid (p.16)
8/27/02 - Changed main battery connector to BP24067-R1, which is close to final (p.29)
8/29/02 - Added dedicated Boot Banger circuit (p.6)
Added 5 bypass caps to each SO-DIMM connector (p.11)
Added quad voltage circuit for bus slewing architecture (p.32)
8/30/02 - Changed to low profile 32.768kHz crystal for PMU (p.28)
Changed to Q11 adpater detection scheme (p.28)
9/03/02 - Corrected upper LVDS single pin nets (p.20)
Removed unintentional extra pulldown resistor at Intrepid (p.14)
9/17/02 - Numerous changes to stay in sync with P84 (all)
9/18/02 - Changed battery connector back to P84 part (p.29)
Added LMU circuitry to eliminate extra board (p.23)
Changed to P84 dual channel LVDS connector to reduce I2R cable losses(p.22)
9/19/02 - Removed unnecessary battery FETs [due to 3S only design] (p.29)
Modified chassis gnds on some components (all)
Removed LMU connector (p.23)
Corrected battery connector [same as P84] (p.29)
Removed P93 support (p.25)
Removed second fuse from FW ports [single fuse provides adequate power] (p.27)
9/23/02 - Replaced BCM5421 with Marvell 88E1111 (p.26)
Increased MAX_VIA_COUNT by two on most nets with this constraint for uVia (p.34,35)
9/27/02 - Corrected cpu, memory bus constraints to match manhattan lengths (p.34)
Swapped pins on L33, L35 for layout (p.31)
Changed Y6 to smaller form-factor crystal (p.26)
9/30/02 - Changed J19 (DC-in) to proper 4-pin connector (p.29)
Corrected holes and chassis gnds (p.4,all)
10/01/02 - Removed Intrepid 1.x specific circuitry (p.13)
10/03/02 - Numerous pin-swaps to accomodate board layout (all)
10/08/02 - Added page for functional test points (p.37)
10/09/02 - Changed 16 pin connectors (modem and right USB) to Foxconn parts (p.23)
10/10/02 - Clamped NEC NC pins high per documentation (p.17)
Added 10K pullup to CG_ADDRSEL and 10K pulldown to CG_FSEL on CY28512 (p.14)
Added SSCG/NO_SSCG stuffing options for CY28512 circuit (p.14)
Removed CPU_VGATE pullup to 5V to eliminate potential 3V/5V current path (p.32)
Removed Zebra 15/16 support per P84 (p.27)
Added second FW port power fuse (p.27)
Removed INT_CPUFB_IN cap per P84 (p.8)
Replaced IRF7822 FETs with IRF7811W in battery charger and 14V PBUS switchers (p.29,30)
Renamed optical interface for consistency (p.24,37)
Corrected PLL_CFG<4> for Apollo 7 [needs to always be zero] (p.5,7)
Removed temporary P84 constraints and finished up AGP clock changes (p.12,34)
Added stuffing options to power fans off 3V or 5V (p.25)
10/11/02 - Replaced DVI EMI caps with 0201 versions (p.22)
10/14/02 - Changed J18 to RJ45 with integrated magnetics (p.26)
10/15/02 - Moved FireWire connectors and port power switch to separate page (p.28)
Changed SMBus pullups to 7.15K, 1% as per iBooks/P84 [involved component net swaps] (p.29)
Added 0603 resistors as shorting pads for power up and reset (p.23)
Changed INT_MOD_SYNC, INT_MOD_DTI and INT_MOD_BITCLK to pulldowns per ERS [LA clk not used] (p.14)
Added damping resistor option to LMU crystal (p.23)
Changed INT_TST_PLLEN_PD to pulldown only [LA clk not used] (p.13)
Changed JTAG_ENET_TDI to pullup [LA clk not used] (p.13)
Removed FW_LKON from Intrepid EXTINT3 [no longer used], pullup added (p.14)
Changed BBANG_HRESET_L pullup to 3V_SLEEP (p.6)
Changed FW_PC_PD, FW_PC_PU resistors to 5% (p.27)
Added 1K pulldown and net FW_PD2 to FW PHY (p.27)
10/16/02 - Implemented new FW power switch and current limit (p.28)
Renamed +14V_PBUS to +PBUS (p.all)
Added A29 adapter detection circuit (p.29)
Added +PBUS current limiting circuit, removed battery charging current limit circuit (p.30)
Changed FW PHY pin DS1 to pullup to make Port 1 1394a only (p.27)
10/21/02 - Updated CY28512 clock chip to Rev B (p.14)
Changed keyboard ZIF to large SMK connector (p.23)
Added full support for non-zero CPU_PLL_CFG<4> in run state (p.7)
10/22/02 - Mirrored wireless connector for P50 flex (p.24)
10/23/02 - Changed LMU/sleep LED interface per p84 (p.23)
Changed LMU JTAG/I2C pinout/pullup/pulldown strategy per P84 (p.23)
Changed fan FETs to SI3446DV per P84 (p.25)
Pinned out audio connector (p.25)
Pinned out right USB connector (p.25)
Pinned out modem connector (p.25)
Added 2 functional test points to wireless connector (p.24,38)
Renamed FW low voltage power rails (p.27,37)
Renamed Vcore VID nets to be consistent with P84 (p.33)
Removed redundancy in DDR memory constraints (p.35)
10/24/02 - Changed FW DS2 strap to pullup to shut off port 2 (p.27)
Cleaned up CY28512B circuit as per P84 [powered off main, output divider and strap tweaks] (p.14)
Updated PCI clock series R values per P84 (p.12)
Changed power rail for ALS to +3V_MAIN per P84 (p.23)
Added 0 ohm short and bypass cap for GPU VDDDVO per P84 (p.21,37)
Split FW_VGND into FW_VGND0 and FW_VGND1 (p.28,37)
Added TP nets to GPU for XOR-tree testing (p.19-21)
Changed fan PWM output pullups to +3V_SLEEP to prevent pump-up (p.25)
10/28/02 - Added FW thermal pad ground hole back in (p.27)
Repinned LMU pulldown for layout (p.23)
10/30/02 - Changed fan power rails to common net (p.25)
10/31/02 - Removed MLB ALS (p.23)
Added wireless RF_DISABLE_L pullup and AIRPORT_CLKRUN_L pulldown (p.24)
11/05/02 - Added 6 decoupling caps to CPU_VCORE_SLEEP (p.5)
Broke out quad OR-gate to discrete components for better placement (p.22,29)
11/06/02 - Changed 10 uF FW current limit output cap to two 4.7 uF caps (p.28)
Added 3 decoupling caps to CPU_VCORE_SLEEP (p.5)
Added 9 decoupling caps to each of +5V_MAIN and +3V_MAIN (p.32)
Removed XW17, jumper for CPU_VCORE_SLEEP (p.33)
Added decoupling cap to PMU reset OR gates (p.29)
11/08/02 - Changed FireWire PHY to Z17 (p.27)
Added bulk caps to fan connectors (p.25)
Added alternate chassis gnd connection for sleep LED (p.23)
11/11/02 - Removed +3V_MAIN option for P50 card (p.24)
11/13/02 - Removed LMU and associated circuitry (p.23)
11/21/02 - Implemented D3cold for all PCI devices (p.12,14,18)
11/25/02 - Renamed all components (all pages)
11/26/02 - Removed chokes from 1394b data pairs (p.27,28)
02/13/03 - Add C825 (p.30)

02/17/03 - Rename all Reference Designators
EVT ENCLOSURE RELEASE

03/13/03 - Change
Add PU
Change
Change
Remove
03/28/03 - Due to MLB outline change at DVI connector, CHGND1 has to be splitted into
CHGND1 & CHGND2 (P 4 & 22)
Separate +3V and +5V traces running from 3/5V supply to 40Pin LIO connector (P 25 & 32)
R601 change from 100K to 4.7K (P 29)
Change airline detect to 13.1V or greater, R40 and R690 to 97.6K ohm (P 30 & 31)
Add C826 at U3 RS- pin (P 30)
Change D3 to 1N914 PN Junction Diode(P 31)
03/31/03 - Change AGPTEST Pull-up to 47ohm (it was 40ohm) (P 20)
Add circuits to prevent start-up Headphone POP (P 25)
Change all 1210 4.7uF to 1206 4.7uF Cap (138S0531) (various pages)
Modify FAN circuit to PWM active low signal (P25)
04/08/03 - Add SOFT MODEM support (P 14 & 25)
Add 10-Pin ELCO connector for Serial Debug Interface (P 25)
Change Q7 from SI4435DY to SUD45P03-10 (P 30)
Remove D34 RS3AB (P 30)
04/11/03 - Change FW Schottky Diode to a 3A part 371S0159 (P 28)
Change PBUS L69 and VCORE L71 Inductor (P 31 & 33)
Change C643 10uF Cap to 1206 package part (P 28)
Change all 6 VCORE Caps to 220uF Al Poly Cap 128S0024 (P 33)
Add Mitsumi MM1571J regulator to provide 1.8V TPVDD (P 21)
Change U34 to Mitsumi MM1571J part for ATI PLL 1.8V rail(P 21)
04/16/03 - Add FW Port ShutDown/PowerOn Circuit (P 28)
Change the I2C Pull-up for Sound/Modem to 1K ohm (P 14)
04/17/03 - Change 3V/5V inductors (152S0137) L61 & L62 (P 32)
04/21/03 - Add 12 ICT JTAG TEST PADs (P 39)
04/23/03 - Invert ATI GPIO15 signal, no stuff pull-up resistor (P 20)
Combine Q35 and Q36 into a Dual Package Part (P 22)
SWAP the ADT7460 Temperature Sense pair (P 25)
Change FW PHY to production part (P 26)
04/24/03 - Remove +3V_CBUS_SLEEP and U5, use +3V_SLEEP directly (P 14,18,24)
Add 0402 Res between ATI PVDD/TPVDD rail and 10uF caps for stability purpose (P 21)
Add 90ohm common mode choke at TMDS data <0..2> pairs (P 22)
Add Sense Resistor to Vcore power rail, remove one 220uF cap <back to EVTA design> (P 33)
04/25/03 - Change C826 to 0.01uF 50V Cap (P 30)
04/30/03 - No stuff R676 to prevent +3V rail leakage (P 33)
05/02/03 - L45,L46,L47 is using Common Mode Choke TDK ACM2012D Part, will replace with ACM2012H Part if available (P 22)
DVT RELEASE
05/21/03 - Swap +PBUS and +24V_PBUS at Backup Battery Connector - J16 (p.31)
05/27/03 - Change RP31 to 4.7K for I2C timing specification (p.13)
Change Q62 & Q65 to SI7860DP part (p.33)
Change Q60, Q63 & Q66 to IRF7832 part and split C102 into 3 10pF caps (p.33)
Enable VCore Burst(Skip) Mode by no stuffing R67 (p.33)
Enable 3V/5V Burst Mode by changing R406 & R407 to 100K ohm (p.32)
Change Q48 to SI7860DP part (p.20)
Change Q49 to IRF7832 part (p.20)
Enable GPUCore Burst Mode by changing R358 to 2.2 ohm, no stuffing R344 and stuffing R343 (p.20)
Reduce audible noise by changing L64 to 152S0139 (p.20)
Add C838, C840, C839, C844 & C845 10pF caps near the power switchers FETs (p.20, 32 & 34)
Change PWM_L Fan input (both L&R Fans) to +5V_SLEEP pull-up (p.25)
05/30/03 - Connect SLEEP_LED_DGND to digital ground instead of CHGND5 (p.23)
06/03/03 - Add CPU Core Voltage offset option circuit (p.33)
GPU Vcore on/off timimg (p.20)
06/05/03 - Change FW-B connector to 514S0058 with internal shield pins (p.28)
06/06/03 - Add four 0ohm jumper, in case there is no sw support for the multi-stage VCore (p.38)
Change the +2_5V_sleep FET to reduce Voltage drop on the rail (p.34)
06/12/03 - Change CBUS & USB2 REQ LINE Pullup to +3V_MAIN (p.12)
Add 0 ohm at USB AVSS GND (p.17)
Change TMDS common mode choke to TDK AMC2012-900H part (p.22)
Change HD_DMACK_L pullup R213 to 10K (p.24)
Add C847, C851 & C852 at ENET CLK for EMC (p.13 & 26)
Change Q34 to FDS3672 (p.28)
Change Q82 pin#4 connection to system digital GND (p.33)
Add C848 150uF cap at J3 for +5V_MAIN USB2 power (p.25)
Add C853 1000pF cap at Q64 (p.30)
Add RC at ADT7460 power rail for noise isolation (p.25)
Isolate THERM# signal at ADT7460 by using double inverters for THERM_L_OC (p.25)
Remove redundant pullup R601 for THERM_L_OC (p.29)
Remove SH2 EMI spring at CHGND5 (p.23)
Add additional PWR/GND pins at J17 for R-USB board (p.25)
06/13/03 - New SODIMM connector with 4 through-hole mounting pins (p.11)
Change CPU config stuffing option at R63 and R64 (p.7)
Stuff R288 for Cypress Clk chip (p.14)
Move CBUS_PCI_REQ_L back to +3V_SLEEP rail pull-up (p.12)
Change the TMDS Termination Resistor values to 162ohm (p.20)
Connect C847 at R160.1 (p.13)
Add 1000pF caps at ADT7460 D_plus/minus pairs (p.25)
Add SI1162 DVI transmitter to prevent leakage from DVI connector to the system (p.19&20)
06/16/03 - Replace C705,C707,C711,C703 & C685 with part 128S0025 (p.20&32)
Remove R271 0ohm resistor (p.34)
Edit Signal Constraints for TMDS routing and ENET routing (p.36&37)
DVT2 RELEASE
07/06/03 - Change R97 & R98 to 0402 package (p.33)

No Stuff R835 (p.19)
Change R198 to 100K ohm resistor (p.23)
Add Common Mode Choke L77 & L76 at FWB pairs (p.28)
Removed current monitoring IC for firewire port power (p.28)
Changed RP52,RP53,RP56,RP57 to 22ohm for EMI (p.19)
EVT RELEASE
3-P FAN connectors to 4-P (p.25)

at PMU_SLEEP_LED_L for LMU (p.23)
stuffing option for clock slewing & PLL5 (p.14)
ATI M10 GPIO8 to Pull-down (p.20)
Memory MUX 0ohm Resistors (p.10)
12/13/02 - Added 12 pF caps to source of 33MHz PCI clocks since they can not be buried (p.12)
Replaced ADM1031 with ADT7460 [I2C Address Change!] (p.25)
Added ADT7460 hookups to GPU thermal diode (p.21,25)
Added FireWire B ESD protection circuits (p.28)
12/16/02 - Removed hole from FireWire ground pad (p.27)
DDR memory connector renamed to J25 (p.11)
12/20/02 - Removed LT4210 from FireWire port power (p.28)
Added F10,F20 as placeholders and experiment guides (p.28)
Added diodes to OR +5V_SLEEP into FW PHY power supply (p.27)
12/26/02 - Updated CPU p/ns to production p/ns (p.5)
Removed RC glitch filter on CPU_DRDY_L (p.5,36)
Updated PCI source clock and internal spreading straps (p.8)
Changed BootROM PWD signal to INT_RESET_L per P84 (p.9)
Added CKE pulldowns per P84 (p.9)
Updated Ethernet series Rs per P84 [Clocks to 10 ohms, data to 22 ohms] (p.13)
Updated SSCG/NO_SSCG BOM options (p.14)
Renamed line-in and headphone sense lines to reflect active low signals (p.14,25.39)
Added 0 ohm Rs to make 2_5V Intrepid rail hot or cold (p.15.16,38)
NO STUFFed entire 1.5V LDO circuit (p.15)
Stuffed USB OCI RC filters for 0 time constant [due to new port current limiters] (p.17)
Renamed USB OCI/PPON signals for left/right ports (p.17,39)
Updated GPU VCore to stay in sync with P84 ["jitter" improvement] (p.20)
Added EMI caps to LVDS_DDC_CLK, INT_I2S0_SND_MCLK, INT_I2S0_SND_SCLK per P84 (p.22,25)
Added R800,R801 for eventual thermal diode in CPU (p.25)
Renamed R2000 to R799, R2001 to R802, R2002 to R803 (p.25)
Renamed F10 to F1, F20 to F2 [deleted old F1,F2] (p.28)
Added caps to FW ESD circuit that were missed (p.28)
Changed MAX4172 power source to save current on battery [per P84] (p.30)
Updated 1.5V/2.5V switcher BOM to stay in sync with P84 [FET change and current limits] (p.34)
Replaced all 132S1061 [1uF,0805,10V,20%] with 132S0046 [1uF,0603,10V,20%] (p.14,15,27,30,33,34)
Replaced all 138S0351 [1uF,0603,6.3V,10%] with 132S0046 [1uF,0603,10V,20%] (p.27,30)
01/02/03 - Updated FireWire fuse topology to that of P84 (p.28)
Updated system and power block diagrams (p.2,3)
01/03/03 - Corrected +2_5V_INTREPID connections to muxes and reference (p.9,10)
01/07/03 - Added NO_TEST nets to pads of DDR connector arms (p.11)
01/08/03 - Added 2N7002 circuits to ensure speakers are muted during power-up (p.25)
Changed R164 to 511 ohms to avoid low CPU clock amplitude (p.8)
01/09/03 - Added required pulldown to output of DVI HPD sense comparator (p.22)
Swapped R443 and R444 values to ensure Vgs < -4.5V (p.28)
Updated S-video filter values to those of P84 (p.22)
01/10/03 - ZT7,ZT23,ZT61,ZT76,ZT89,ZT87,ZT22,ZT38,ZT60,ZT42 & ZT17 are changed to HOLE-VIA-20R10 (p.4)
01/13/03 - Add L53, L54, L55 for TMDS Data<0:2> Diff Pair (p.22)
01/14/03 - Add C812 - C821 (Totol 10 0.22uF caps) for 2.5V Intrepid Decoupling (p.16)
Add C822 & C823 at Wireless Card connector MAIN_RESET_L & RF_DISABLE_L_SPN (p.24)
Change MATCHED_DELAY to 50 for all TMDS DIFF PAIR (p.37)
Change MATCHED_DELAY to 50 for all TMDS DIFF PAIR (p.37)
Add R810 & R811 for ALWAYS-ON FANs in Acrylic Build (p.25)
01/28/03 - Remove NV31/17 components (p.19-21)
Add M10 (p.19-21)
02/07/03 - Add Power Net Constraints for M10 (p.38)
Replace Singing PBus Cap C49,C50,C67,C68,C80,C81,C95,C96,C108,C109,C120,C121
with 126S0035 (or alt. 126S0036) (p.33)
02/11/03 - Add FW Power Net Constraints (p.38)
Change signal constraints for AGP signals (p.36)
Add LMU connector and components (p.23)
Edit I2C table for LMU (p.13)
Change R580 to 19.6K (p.14)
Connect Clock Slewing RESET# to MAIN_RESET_L (p.14)
Change Ferrite Bean of ATI power supply to correct values (p.21)
Remove C141 PBUS CAP (p.31)
02/12/03 - Change and Rotate Keyboard Connector (p.23)
Add ATI Power sequencing Circuit for M10 Power-up and Power-down (p.19-22, p.32-35)
PRODUCTION RELEASE
07/28/03 - Change
08/05/03 - Change
Change
08/07/03 - Change
BOM option for C51,C52,C77,C78,C91,C92,C111 to 8.2uF Panasonic AL cap only (p. 34)
+3V/5V ITH compensation and No-Stuff Feed Forward Caps (p. 32)
CPU VCORE setting for both BEST and BETTER configurations (p. 33)
CPU VCORE setting for both BEST and BETTER configurations again (p. 33)
PRODUCTION RELEASE(Version C)
08/18/03 - Change CPU VCORE setting for BEST configuration to: 1.335V(High)->1.080V(Low) (p. 33)

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SHT
NONE
REV.
051-6338
SCALE

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8

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

TITLE PAGE AND CONTENTS

VIDEO CONNECTORS - INVERTER, DVI, S-VIDEO,

KBD,TPAD,HALL EFFECT,PWR BUTTON,LMU/SENSOR

Fri Jan 23 20:30:40 2004

BOM OPTIONS (IN COMMON PARTS)

1.5V/ 1.8V / 2.5V SYSTEM POWER SUPPLIES

SIGNAL CONSTRAINTS (3 OF 4) - DIGITAL/DIFF

Apple Computer Inc.

NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

DO NOT SCALE DRAWING

THIRD ANGLE PROJECTION

2:1 DDR MUXES

DDR SDRAM DIMM 0

(INTERNAL MEM) (INTERNAL MEM)

LCD Panel S-Video

(INTERNAL MEM) (INTERNAL MEM)

LMU LUX Board

SYSTEM BLOCK DIAGRAM

DDR SDRAM DIMM 1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

APPLE COMPUTER INC.

POWER SYSTEM ARCHITECTURE

AFTER PMU IS UP AND RUNNING

STARTS 2.0MSEC AFTER DCDC_EN_L BECOMES LOW

MAIN 3V/5V PGOOD

14V CHARGES BACKUP BATTERY

TURNS ON OUTPUT @ 2.4V

MAP31 DDR CORE

TURNS ON AS LOW AS 0.8V/TYP 1.5V

INTERNAL ZENER CLAMP TO 6V

1M & 0.1UF @14V, IT TAKES

HOWEVER, 5V SHOULD TURN ON ~2.23MS AFTER

STARTS ~4.25MSEC AFTER DCDC_EN_L BECOMES LOW

WHEN ONLY BATTERY IS CONNECTED

BACKUP BATTERY CIRCUIT CHARGES OFF +PBUS

AND PREVENTS +PBUS AND +24V_PBUS FROM DROPPING BELOW 6V

WHEN ONLY BATTERY IS CONNECTED

POWER BLOCK DIAGRAM

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

APPLE COMPUTER INC.

ASICS HEATSINK MOUNTS

HOLE-VIA-20R10 LEFT CPU

HOLE-VIA-20R10 UPPER RT GPU

THICKNESS : 1.2 MM / 0.047 IN

HOLE-VIA-20R10 LWR CPU

HOLE-VIA-20R10 LWR RT GPU

IMPEDANCE : 50 OHMS +/- 10%

SEE PCB CAD FILES FOR MORE SPECIFIC INFO.

BOARD STACK-UP AND CONSTRUCTION

1-8-1 BLIND MICROVIA/20R10 BURIED VIA/20R10 TH VIA

SIGNAL (1/2 OZ + COPPER PLATING)

SIGNAL (1/2 OZ)

SIGNAL (1/2 OZ)

GROUND (1/2 OZ)

SIGNAL (1/2 OZ)

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

APPLE COMPUTER INC.

CPU_OVDD DECOUPLING NETWORK