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Want to give green light to highway as much as possible. Want to give green to farm when needed. Must always have at least one red light.
sensor
System operation
Sensor on farm road indicates when cars on farm road are waiting for green light. Must obey required lengths for green, yellow lights.
Separate counter isolates logical design from clock period. Separate counter greatly reduces number of states in sequencer.
farmyellow
hwyyellow
short / 1 yellow red cars & long / 1 red green farmgreen cars & long / 0 red green
FPGA-Based System Design: Chapter 5 Copyright 2004 Prentice Hall PTR
FARM_GREEN: begin if (cars & ~long) state = FARM_GREEN; else begin state = FARM_YX; count_reset = 1; end hg = 0; hy = 0; hr = 1; fg = 1; fy = 0; fr = 0; end FARM_YX: begin state = FARM_YELLOW; hg = 0; hy = 0; hr = 1; fg = 1; fy = 0; fr = 0; end FARM_YELLOW: begin if (~short) state = FARM_YELLOW; else begin state = HWY_GREEN; end hg = 0; hy = 0; hr = 1; fg = 0; fy = 1; fr = 0; end HWY_YY: begin state = HWY_GREEN; hg = 1; hy = 0; hr = 0; fg = 0; fy = 0; fr = 1; end endcase end // state machine end // always endmodule
Put a lot of work into designing the clock network so you dont have to worry about it throughout the combinational logic.
Copyright 2004 Prentice Hall PTR
Register characteristics
Form of clock signal used to trigger the register. How the behavior of data around the clock trigger affects the stored value. When the stored value is presented at the output. Whether there is ever a combinational path from input to output.
Types of registers
Latch: transparent when internal memory is being set. Flip-flop: not transparent, reading and changing output are separate.
Types of registers
D-type (data). Q output is determined by the D input at the clocking event. T-type (toggle). Toggles its state at input event. SR-type (set/reset). Set or reset by inputs (S=R=1 not allowed). JK-type. Allows both J and K to be 1, otherwise similar to SR.
Clock event
changing
stable
time
FPGA-Based System Design: Chapter 5 Copyright 2004 Prentice Hall PTR
Duty cycle
50%