Chapter 1. Numeration Systems ......................................................................1
1.1. Number and Symbol .................................................................................1 1.2. Octal and Hexadesimal to Decimal Convertion .......................................16 1.3. Convertion From Decimal Numeration ....................................................17
3.1. Digital Signal and Gates ...........................................................................35 3.2. The NOT Gates .........................................................................................39 3.3. The “Buffer” Gates ...................................................................................51 3.4. Multiple-input Gates .................................................................................55 3.5. The AND Gates .........................................................................................56 3.6. The NAND Gates ......................................................................................58 3.7. The OR Gates ............................................................................................59 3.8. The NOR Gates .........................................................................................62 3.9. The Negative AND Gates .........................................................................62 3.10. The Negative OR Gates ..........................................................................63 3.11. The Exlusive-OR Gates ..........................................................................64 3.12. The Exclusive-NOR Gates ......................................................................66 3.13. TTL NAND and AND Gates ..................................................................68 3.14. TTL NOR and NOR Gates .....................................................................74 3.15. CMOS Gates Cercuitry............................................................................77 3.16. Special Output Gates ..............................................................................91 3.17. Constructing The NOT Function ............................................................95 3.18. Constructing The Buffer Function ..........................................................96 3.19. Constructing The AND Function ............................................................97 3.20. Constructing The NAND Function .........................................................97 3.21. Constructing The OR Function ...............................................................98 3.22. Constructing The NOR Function ............................................................99 3.23. Logic Signal Voltage Levels ...................................................................100 3.24. DIP Gates Packaging ..............................................................................109