DCS ZUC IP

ZUC DCS ZUC

IP ZUC
IP

IP Verilog
Xilinx FPGA

1.
a) IP
ZUC1.5
Verilog
b) IP

Virtex5
xc5vlx110t-3ff1136

ISE11.5

Virtex5 Slices

347 slices

max frequency

116MHz

throughput

3.7Gbps

c) IP

IV[127:0]

KeySteam

Key[127:0]

ZUC _M
START
CLK

READY

END
RESET

IV[127 :0] IV
Key[127:0] Key
START IP
END IP
CLK
RESET
KeyStream
Ready

2.
a) IP

ZUC Working Mode

b) IP

Virtex5
xc5vlx110t-3ff1136

ISE11.5

Virtex5 Slices

575 slices

max frequency

222 MHz

throughput

7.0Gbps

c) IP
KeySteam
S_0,,S15

F_R1
F_R2

ZUC _H
START
CLK

READY

END
RESET

S0,,S15: LFSR
F_R1,F_R2: R1 R2
END: IP
CLK:
RESET:
KeyStream:
Ready: