Giao trnh VXL B

Pham Trung Hieu

TOM TAT NOI DUNG VE 89C51

Ly Thuyet ve 89C51

I.

1. Bang tom tat cac vung nh 8951.

Ban o bo nh Data tren Chip nh sau :

a ch
byte

a ch
byte

a ch
bit

7F

a ch
bit

FF
F0 F7 F6 F5 F4 F F2 F1 F0
3

RAM a dung
E0 E7 E6 E5 E4 E E2 E1 E0
3

ACC

D0 D7 D6 D5 D4 D3 D2 D1 D0 PSW
30
2F
2E
2D
2C
2B
2A
29
28

7F
77
6F
67
5F
57
4F
47

7E
76
6E
66
5E
56
4E
46

7D
75
6D
65
5D
55
4D
45

7C
74
6C
64
5C
54
4C
44

7B
73
6B
63
5B
53
4B
43

7A
72
6A
62
5A
52
4A
42

79
71
69
61
59
51
49
41

78
70
68
60
58
50
48
40

B8 -

27
26
25
24
23

3F
37
2F
27
1F

3E
36
2E
26
1E

3D
35
2D
25
1D

3C
34
2C
24
1C

3B
33
2B
23
1B

3A
32
2A
22
1A

39
31
29
21
19

38
30
28
20
18

22 17 16 15 14 13 12 11 10
21 0F 0E 0D 0C 0B 0A 09 08
20 07 06 05 04 03 02 01 00
1F Bank 3
18
17 Bank 2
10
0F Bank 1
08
07 Bank thanh ghi 0

BC BB BA B9 B8 IP

B0 B7 B6 B5 B4 B3 B2 B1 B0 P.3
A8 AF

AC AB AA A9 A8 IE

A0 A7 A6 A5 A4 A3 A2 A1 A0 P2
99 khong c a ch hoaSBUF
bit
98 9F 9E 9D 9C 9B9A 99 98 SCON
90 97 96 95 94 93 92 91 90
8D khong c
bit
8C khong c
bit
8B khong c
bit
8A khong c
bit
89 khong c
bit
88 8F 8E 8D 8C
87 khong c
bit

P1

a ch hoaTH1
a ch hoaTH0
a ch hoaTL1
a ch hoaTL0
a ch hoaTMOD
8B8A 89 88 TCON
a ch hoaPCON

83 khong c a ch hoaDPH
bit
82 khong c a ch hoaDPL
bit
81 khong c a ch hoaSP
Trang 1

Giao trnh VXL B

00 (mac nh cho R0 -R7)

Pham Trung Hieu

bit
80 87 86 85 84 83 82 81 80

Trang 2

P0

Giao trnh VXL B

Pham Trung Hieu

1. Chc nang cua cac chan cua 8951

a. port0 : la port co 2 chc nang tren chan t 32 en

39 trong cac thiet ke c nho
( khong dung bo nh m rong ) co hai chc nang nh cac
ng IO. oi vi cac thiet ke c ln ( vi bo nh m
rong ) no c ket hp kenh gi a cac bus )
b. port1 : port1 la mot port I/O tren cac chan 1-8. Cac
chan c ky hieu P1.0, P1.1, P1.2 co the dung cho cac
thiet b ngoai neu can. Port1 khong co chc nang khac, v
vay chung ta ch c dung trong giao tiep vi cac thiet b
ngoai.
c. port2 : port2 la mot port cong dung kep tren cac chan
21 28 c dung nh cac ng xuat nhap hoac la byte cao
cua bus a ch oi vi cac thiet ke dung bo nh m
rong.
d. Port3 : port3 la mot port cong dung kep tren cac chan
10 17. Cac chan cua port nay co nhieu chc nang, cac
cong dung chuyen oi co lien he vi cac ac tn ac biet
cua 8951 nh bang sau :
30
p
12MH
z
30
p

40
19

18

29
30
31
9

RD\
WR\
T1
T0
INT1
INT0
TXD
RXD

17
16
15
14
13
12
11
10

Vc
XTAL1 c
XTAL2

PSEN\
ALE
EA\
RET

Po.7
Po.6
Po.5
Po.4
Po.3
Po.2
Po.1
Po.0
P2.7
P2.6
P2.5
P2.4
P2.3
P2.2
P2.1
P2.0

P1.
7
P1.
6
P1.
5
P1.
4
Vss
P1.
Trang 3 3
20
P1.
2

32
33
34
35
36
37
38
39

AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

8
7
6
5
4
3
2
1
2
8
2
7
2
6
2
5
2
4
2
3
2

A1
5
A1
4
A1
3
A1
2
A1
1
A1
0

1
P1.
0

Giao trnh VXL B

Bit
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7

2
1

A8

Pham Trung Hieu

Ten

Chc nang chuyen oi

RXD
TXD
INTO
INT1
TO
T1
WR
RD

D lieu nhan cho port noi tiep

D lieu phat cho port noi tiep
Ngat 0 ben ngoai
Ngat 1 ben ngoai
Ngo vao cua timer/counter 0
Ngo vao cua timer/counter 1
Xung ghi bo nh d lieu ngoai
Xung oc bo nh d lieu ngoai

Bang 2.1 : Chc nang cua cac chan tren port3

e. PSEN (Program Store Enable ) : 8951 co 4 tn hieu ieu
khien
PSEN la tn hieu ra tren chan 29. No la tn hieu ieu
khien e cho phep bo nh chng trnh m rong va thng
c noi en chan OE (Output Enable) cua mot EPROM e cho
phep oc cac bytes ma lenh.
PSEN se mc thap trong thi gian lay lenh. Cac ma
nh phan cua chng trnh c oc t EPROM qua bus va c
chot vao thanh ghi lenh cua 8951 e giai ma lenh. Khi thi
hanh chng trnh trong ROM noi (8951) PSEN se mc thu
ong (mc cao).
f. ALE (Address Latch Enable ) :
tn hieu ra ALE tren chan 30 tng hp vi cac thiet b
lam viec vi cac x l 8585, 8088, 8086, 8951 dung ALE mot
cach tng t cho lam viec giai cac kenh cac bus a ch va
d lieu khi port 0 c dung trong che o chuyen oi cua
no : va la bus d lieu va la buyt thap cua a ch, ALE
la tn hieu e chot a ch vao mot thanh ghi ben ngoai
trong na au cua chu ky bo nh. Sau o, cac ng port 0
dung e xuat hoac nhap d lieu trong na sau chu ky cua
bo nh.
Cac xung tn hieu ALE co toc o bang 1/6 lan tan so dao
ong tren chip va co the c dung la nguon xung nhp cho
cac he thong. Neu xung tren 8951 la 12MHz th ALE co tan
so 2MHz. Ch ngoai tr khi thi hanh lenh MOVX, mot xung ALE
se b mat. Chan nay cung c lam ngo vao cho xung lap
trnh cho EPROM trong 8951.
g. EA (External Access) :
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Pham Trung Hieu

Tn hieu vao EA tren chan 31 thng c mac len mc

cao (+5V) hoac mc thap (GND). Neu mc cao, 8951 thi
hanh chng trnh t ROM noi trong khoang a ch thap (4K).
Neu mc thap, chng trnh ch c thi hanh t bo nh
m rong. Khi dung 8031, EA luon c noi mc thap v khong
co bo nh chng trnh tren chip. Neu EA c noi mc thap
bo nh ben trong chng trnh 8951 se b cam va chng trnh
thi hanh t EPROM m rong. Ngi ta con dung chan EA lam
chan cap ien ap 21V khi lap trnh cho EPROM trong 8951.
h. SRT (Reset) :
Ngo vao RST tren chan 9 la ngo reset cua 8951. Khi tn
hieu nay c a len muc cao (trong t nhat 2 chu ky may ),
cac thanh ghi trong 8951 c tai nhng gia tr thch hp e
khi ong he thong.
i. Cac ngo vao bo dao ong tren chip :
Nh a thay trong cac hnh tren , 8951 co mot bo dao
ong tren chip. No thng c noi vi thach anh gia hai
chan 18 va 19. Cac tu gia cung can thiet nh a ve. Tan
so thach anh thong thng la 12MHz.
J. Cac chan nguon :
8951 van hanh vi nguon n +5V. Vcc c noi vao chan 40
va Vss (GND) c noi vao chan 20.
c. Cac bank thanh ghi :
32 byte thap nhat cua bo nh noi la danh cho cac bank
thanh ghi. Bo lenh cua 8951 ho tr 8 thanh ghi (RO en R7) va
theo mac nh (sau khi Reset he thong) cac thanh ghi nay
cac a ch 00H-07H. Lenh sau ay se oc noi dung a
ch 05H vao thanh ghi tch luy.
MOV A,R5
ay la lenh mot byte dung a ch thanh ghi. Tat nhien,
thao tac tng t co the c thi hanh bang lenh 2 byte dung
a ch trc tiep nam trong byte th hai:
MOV A,05H
Cac lenh dung cac thanh ghi R0 en R7 th se ngan hn
va nhanh hn cac lenh tng ng nhng dung a ch trc
tiep. Cac gia tr d lieu c dung thng xuyen nen dung
mot trong cac thanh ghi nay.
Bank thanh ghi tch cc co the chuyen oi bang cach thay oi
cac bit chon bank thanh ghi trong t trang thai chng trnh (PSW). Gia
s rang bank thanh ghi 3 c tch cc, lenh sau se ghi noi dung cua
thanh ghi tch luy vao a ch 18H:

MOV R0,A
Trang 5

Giao trnh VXL B

Pham Trung Hieu

Y tng dung cac bank thanh ghi cho phep chuyen

hng chng trnh nhanh va hieu qua (tng phan rieng re
cua phan mem se co mot bo thanh ghi rieng khong phu
thuoc vao cac phan khac).

Trang 6

Giao trnh VXL B

Pham Trung Hieu

2. Thanh ghi trang ta thai.

Bit
PSW.7
PSW.6
PSW.5
PSW.4
PSW.3

Ky hieu
CY
AC
F0
RS1
RS0

a ch
D7H
D6H
D5H
D4H
D3H

Y ngha
C nh
C nh phu
C 0
Bit 1 chon bank thanh
ghi
Bit chon bank thanh ghi.
00=bank 0; a ch
00H-07H
01=bank 1: a ch
PSW.2 OV
D2H
08H-0FH
PSW.1
D1H
10=bank 2:a ch 10HPSW.0 P
D0H
17H
11=bank 3:a ch 18H1FH
C tran
D tr
C Parity chan.
C nh (CY) co cong dung kep. Thong thng no c
dung cho cac lenh toan hoc: no se c set neu co mot
so nh sinh ra bi phep cong hoac co mot so mn
phep tr . V du, neu thanh ghi tch luy cha FFH, th lenh
sau:
ADD A,#1
Se tra ve thanh ghi tch luy ket qua 00H va set c nh
trong PSW.
C nh cung co the xem nh mot thanh ghi 1 bit cho cac
lenh luan ly thi hanh tren bit. V du, lenh se AND bit 25H vi
c nh va at ket qua tr vao c nh:
ANL C,25H
C nh phu:
Khi cong cac so BCD, c nh phu (AC) c set neu ket
qua cua 4 bit thap trong khoang 0AH en 0FH. Neu cac gia
tr cong c la so BCD, th sau lenh cong can co DA A( hieu
chnh thap phan thanh ghi tch luy) e mang ket qua ln hn
9 tr ve tam t 09.
C 0
C 0 (F0)la mot bit c a dung danh cac ng dung cua
ngi dung.
Cac bit chon bank thanh ghi

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Giao trnh VXL B

Pham Trung Hieu

Cac bit chon bank thanh ghi (RSO va RS1) xac nh bank
thanh ghi c tch cc. Chung c xoa sau khi reset he thong
va c thay oi bang phan mem neu can. V du, ba lenh
sau cho phep bank thanh ghi 3 va di chuyen noi dung cua thanh
ghi R7 (a ch byte IFH) en thanh ghi tch luy:
SETB RS1
SETB RSO
MOV A,R7
Khi chng trnh c hp dch cac a ch bit ung c
thay the cho cac ky hieu RS1 va RS0. Vay lenh SETB RS1
se giong nh lenh SETB 0D4H.
C Tran
C tran (OV) c set mot lenh cong hoac tr neu co mot
phep toan b tran. Khi cac so co dau c cong hoac tr
vi nhau, phan mem co the kiem tra bit nay e xac nh
xem ket qua cua no co nam trong tam xac nh khong. Khi
cac so khong dau c cong, bit OV co the c bo qua.
Cac ket qua ln hn +127 hoac nho hn 128 se set bit OV.
Lenh reset.
8951 c reset bang cach gi chan RST mc cao t
nhat trong 2 chu ky may va tra no ve muc thap. RST co
the c kch khi cap ien dung mot mach R-C.
+5 V

100

+5 V
10UF

8 ,2 K

Hnh 2.9: Mach reset he thong.

Trang thai cua tat ca cac thanh ghi cua 8951 sau khi reset
he thong c tom tat trong bang sau:
Thanh ghi
Noi dung
em chng trnh
0000H
Tch luy
00H
00H
B
00H
PSW
07H
SP
0000H
DPTR
FFH
Port 0-3
XXX00000B
IP
Trang 8

Giao trnh VXL B

Pham Trung Hieu

IE
0XX00000B
Cac thanh ghi nh thi
00H
SCON
00H
SBUF
00H
PCON(HMOS)
0XXXXXXB
PCON(CMOS)
0XXX0000B
Bang 2.3: Trang thai cac thanh ghi sau khi reset
Quan trong nhat trong cac thanh ghi tren la thanh ghi em
chng trnh, no c at lai 0000H. Khi RST tr lai mc thap,
viec thi hanh chng trnh luon bat au a ch au tien
trong bo nh trong chng trnh: a ch 0000H. Noi dung cua
RAM tren chip khong b thay oi bi lenh reset.
3. Hoat ong cua bo nh thi (timer)
Truy xuat timer cua 8951 dung 6 thanh ghi chc nang ac
biet cho trong bang sau:
SFR
MUC CH
A
a ch hoa tng
CH
bit
TCON ieu
khien 88H
Co
TMOD timer
89H
Khong
TL0
Che o timer
8AH
Khong
TL1
Byte thap cua 8BH
Khong
TH0
timer 0
8CH
Khong
TH1
Byte thap cua 8DH
Khong
timer 1
Byte cao cua
timer 0
Byte cao cua
timer 1
Bang 2.4: Thanh ghi chc nang ac biet dung timer.
Thanh ghi che o timer (TMOD)
Thanh ghi TMOD cha hai nhom 4 bit dung e at che o lam
viec cho timer 0 va timer 1.
Bit

Ten

Timer

GATE

6
5
4

C/T
M1
M0

1
1
1

Mo ta

Bit (M) cong, khi len 1 timer ch chay

khi INT1
mc cao.
Bit chon che o counter/timer
1=bo em s kien
0=bo nh khoang thi gian
Bit 1 cua che o(mode)
Bit 0 cua che o
00: che o 0 : timer 13 bit
01: che o 1 : timer 16 bit

Trang 9

Giao trnh VXL B

3
2
1
0

GATE
C/T
M1
M0

0
0
0
0

Pham Trung Hieu

10: che o 2 : t ong nap lai 8255A bit

11: che o 3 : tach timer
Bit (m) cong
Bit chon counter/timer
Bit 1 cua che o
Bit 0 cua che o

Thanh ghi ieu khien timer (TCON)

Bang 2.5: Tom tat thanh ghi
Thanh ghi TCON cha cac bit trang thai va cac bit ieu
TMOD
khien cho timer 0 va timer 1.
Bit
Ky hieu
a ch Mo ta
TCON.7
TF1 8FH
C bao tran timer 1. at bi phan
cng khi tran, c xoa bi phan
mem hoac phan cng khi bo x ly
ch en chng trnh phuc vu ngat.
TCON.6

TR1

TCON.5
TCON.4
TCON.3
TCON.2

TF0
TR0
IE1
IT1

TCON.1
TCON.0

IE0
IT0

8EH

Bit ieu khien timer 1 chay. at/xoa

bang phan mem cho timer chay/ngng.
8DH
C bao tran timer 0
8CH
Bit ieu khien timer 0 chay
8BH
C canh ngat 1 ben ngoai, ac bi
8AH
C kieu ngat mot ben ngoai.
phan cng khi phat hien mot canh
xuong INT1, xoa bang phan mem
hoac phan cng khi CPU ch en
chng trnh phuc vu ngat.
at/xoa bang phan mem e ngat
ngoai tch cc canh xuong/mc thap
89H
C canh ngat 0 ben ngoai
88H
C kieu ngat 0 ben ngoai
Bang 2.6: Tom tat thanh ghi TCON

Khi ong va truy xuat cac thanh ghi timer.

Thong thng cac thanh ghi c khi ong mot lan
au chng trnh e at che o lam viec cho ung. Sau o
trong than chng trnh cac timer c cho chay, dng , cac bit
c c kiem tra va xoa, cac thanh ghi timer c oc va cap
nhat... theo oi hoi cua cac ng dung.
TMOD la thanh ghi th nhat c khi ong v no at
che o hoat ong. V du cac lenh sau khi khi ong timer 1
nh timer 16 bit (che o 1) co xung nhp t bo dao ong tren
chp cho viec ng khoang thi gian.

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Giao trnh VXL B

Pham Trung Hieu

MOV TMOD,#00010000B

Lenh nay se at M1=0 va M0=1 cho che o 1, C/T=0

va GATE=0 cho xung nhp noi va xoa cac bit che o timer 0.
D nhien timer that s khong bat au nh thi cho en khi
bit ieu khien chayy TR1 c at len 1.
Neu can so em ban au, cac thanh ghi timer TL1/TH1 cung
phai c khi ong. Nh lai la cac timer em len va at
c bao tran khi co s truyen tiep.
FFFFH sang 0000H.
- oc timer ang chay.
Trong mot so ng dung can oc gia tr trong cac thanh ghi timer
ang chay. V phai oc 2 thanh ghi timer sai pha co the xay ra neu
byte thap tran vao byte cao gia hai lan oc. Gia tr co the oc
c khong ung. Giai phap la oc byte cao trc, ke o oc byte
thap roi oc byte cao lai mot lan na. Neu byte cao a thay oi th
lap lai cac hoat ong oc.

Cac khoang ngan va cac khoang dai.

Day cac khoang thi gian co the nh thi la bao nhieu
? van e nay c khao sat vi 8951 hoat ong vi tan so
12MHz. nh vay xung nhp cua cac timer co tan so la 1 MHz.
Khoang thi gian ngan nhat co the co b gii han khong
ch bi tan so xung nhp cua timer ma con bi phan mem.
Do anh hng cua thi khoang thc hien mot lenh. Leng
ngan nhat 8951 la mot chu ky may hay 1s. Sau ay la bang
tom tat cac ky thuat e tao nhng khoang thi gian co
chieu dai khac nhau (vi gia s xung nhp cho 8951 co tan
so 12 MHz)
Khoang thi gian toi a

10
256
65535
Khong gii han
vong

Ky thuat

- Bang phan mem

- Timer 8 bit vi t ong nap
lai
- Timer 16 bit
- Timer 16 bit cong vi cac
lap phan mem

Cac ky thuat e lap trnh cac khoang thi gian (FOSC=12

MHz)
4. Hoat ong port noi tiep.
Gii thieu.
8951 co mot port noi tiep trong chip co the hoat ong
nhieu che o khac tren mot day tan so rong. Chc
nang chu yeu cua mot port noi tiep la thc hien chuyen
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Pham Trung Hieu

oi song song sang noi tiep vi d lieu xuat va chuyen oi

noi tiep sang song song vi d lieu nhap.
Truy xuat phan cng en port noi tiep qua cac chan
TXD va RXD. Cac chan nay co cac chc nang khac vi hai
bit cua port 3. P3 chan 11 (TXD) va P3.0 chan 10 (RXD).
Port noi tiep cho hoat ong song cong (full duplex : thu va
phat ong thi) va em luc thu (receiver buffering) cho phep
mot ky t se c thu va c gi trong khi ky t th hai
c nhan. Neu CPU oc ky t th nhat trc khi ky t th
hai c thu ay u th d lieu se khong b mat.
Hai thanh ghi chc nang ac biet cho phep phan mem
truy xuat en port noi tiep la : SBUF va SCON. Bo em port
noi tiep (SBUF) ai ch 99H that s la hai bo em. Viet
vao SBUF e truy xuat d lieu thu c. ay la hai thanh ghi
rieng biet thanh ghi ch ghi e phat va thanh ghi e thu.
TXD (P3.1) RXD (P3.0)
CLK

SUBF

(Ch ghi)

Xung nhp toc

o baud (thu)

Q
CLK
Xung nhp toc
o baud (thu)

Thanh D
ghi
dch
SBUF

(ch oc)
SBUF

(ch oc)
BUS noi 8951
Hnh 2.9: S o port noi tiep.
Thanh ghi ieu khien port noi tiep (SCON) a ch 98H
la thanh ghi co a ch bit cha cac bit trang thai va cac bit
ieu khien. Cac bit ieu khien at che o hoat ong cho
port noi tiep, va cac bit trang thai bao cao ket thuc viec
phat hoac thu ky t. Cac bit trang thai co the c kiem tra
bang phan mem hoac co the c lap trnh e tao ngat.
Tan so lam viec cua port noi tiep con goi la toc o
baund co the co nh (lay t bo giao ong cua chip). Neu
s dung toc o baud thay oi, timer 1 se cung cap xung nhp
toc o baud va phai c lap trnh.
Thanh ghi ieu khien port noi tiep.

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Pham Trung Hieu

Che o hoat ong cua port noi tiep c at bang

cach ghi vao thanh ghi che o port noi tiep (SCON) a ch
98H. Sau ay cac bang tom tat thanh ghi SCON va cac che
o cua port noi tiep :

Bit

SCON.7
tiep
SCON.6
tiep
SCON.5
tiep.

Ky hieu

a ch

SM0

9FH

Bit 0 cua che o port noi

SM1

9EH

Bit 1 cua che o port noi

SM2

9DH

Bit 2 cua che o 2 noi

cho phep truen

thong a x ly

trong cac che o

2 va 3 ;RI se

khong b tac ong neu

bit th
SCON.4
len
t
SCON.3
phat

REN

9CH

9 thu c la 0
Cho phep bo thu phai at
1 e thu (nhan) cac ky

TB8

9BH

Bit 8 phat, bit th 9 c

cac che o 2 va 3; c

at
SCON.2
SCON.1
khi

Mo ta

RB8
TI

9AH
99H

va xoa bang phan mem

Bit 8 thu, bit th 9 thu c
C ngat phat. at len 1
ket thuc phat ky t;

c xoa

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Giao trnh VXL B

SCON.0
khi

RI

Pham Trung Hieu

98H

phan mem
C ngat thu. at len 1
Ket thuc thu ky t; c

xoa

Bang phan mem

Bang 2.7:Tom tat thanh ghi che o port noi tiep

SCON.
SM0
0
0
1
Fosc/64)
1

SM1
0
1
0

Che o Mo ta
Toc o baud
0
Thanh ghi dch Co nh (Fosc/12)
1
UART 8 bit
Thay oi (at bang timer)
2
UART 9 bit
Co nh (Fosc/12 hoac

UART 9 bit

Thay oi (at bang timer)

Bang 2.8: Cac che o port noi tiep.

Trc khi s dung port noi tiep, phai khi ong SCON cho
ung che o. V du ,lenh sau:

II. MOV SCON,#01010010B

Khi ong port noi tiep cho che o 1 (SM0/SM1=0/1), cho
phep bo thu (REN=1) va at c ngat phat (TP=1) e ch bo
phat san sang hoat ong.
Khi ong va truy xuat cac thanh ghi cong noi tiep.
a. Cho phep thu:
Bit cho phep bo thu (REN = Receiver Enable) trong SCON phai
c at len 1 bang phan mem e cho phep thu cac ky t.
Thong thng thc hien viec nay au chng trnh khi khi
ong cong noi tiep, timer...Co the thc hien viec nay theo
hai cach. Lenh :

III. SETB REN

Se at REN len 1, hoac lenh :

IV. MOV SCON,#xxx1xxxxB

Se at REN 1 va ac hoac xoa i cac bit khac tren
SCON khi can (cac x phai la 0 hoac 2 e ac che o lam
viec).
b. Bit d lieu th 9:

Trang 14

Giao trnh VXL B

Pham Trung Hieu

Bit d lieu th 9 can phat trong cac che o 2 va 3,

phai c nap vao trong TB8 bang phan mem. Bit d lieu th
9 thu c at RBS. Phan mem co the can hoac khong
can bit d lieu th 9, phu thuoc vao cac ac tnh ky thuat
cua thiet b noi tiep s dung (bit d lieu th 9 cung ong
vai mot tro quan trong trong truyen thong a x ly).
c. Them 1 bit parity:
Thng s dung bit d lieu th 9 e them parity vao
ky t. Nh a xet cac chng trc, pit P trong t trang
thai chng trnh (PSW) c at len 1 hoac b xoa bi chu ky
may e thiet lap kiem tra chan vi 8 bit trong thanh tch luy.
d. Cac c ngat:
Hai c ngat thu va phat (RI va TI) trong SCON ong mot
vai tro quan trong truyen thong noi tiep dung 8951. Ca hai bit
c at len 1 bang phan cng, nhng phai c xoa bang
phan mem.
5. Toc o baud port noi tiep.
Nh a noi, toc o baud co nh cac che o 0 va 2.
Trong che o 0 no luon luon la tan so dao ong tren chip
c chia cho 12 . Thong thng thach anh an nh tan so dao
ong tren chip cua 8951 nhng cung co the s dung nguon
xung nhp khac. Gia s vi tan so dao ong danh nh la 12
MHz, tm toc o baud che o 0 la 1 MHz.

Trang 15

Giao trnh VXL B

Dao ong
tren chip

Pham Trung Hieu

Xung nhp
toc o baud

12
a. Che o 0
64

SMOD=0

Dao ong
tren chip

SMOD=1

Xung nhp
toc o baud

32
b. Che o 2

32

SMOD=0

Dao ong
tren chip

SMOD=1

16
16

Xung nhp
toc o baud

c. Che o 1 va 3.
Hnh 2.10. Cac nguon tao xung nhp cho port noi tiep.
Mac nhien, sau khi reset he thong, toc o baud che o
la 2 tan so bo dao ong chia cho 64. Toc o baud cung anh
hng bi 1 bit trong thanh ghi ieu khien nguon cung cap
(PCON). Bit 7 cua PCON la bit SMOD. at bit sMOD len mot lam
gap oi toc o baud trong che o 1,2 va 3. Trong che o 2,
toc o baud co the b gap oi t gia tr mac nhien cua
1/64 tan so dao ong (SMOD=0) en 1/32 tan so dao ong
(SMOD=1)
V PCON khong c nh a ch theo bit, nen e at bit
SMOD len 1 can phai theo cac lenh sau:
MOV A,PCON lay gia tr hien thi cua PCON
SETB ACC.7 at bit 7 (SMOD) len 1
MOV PCON,A ghi gia tr ngc ve PCON
Cac toc o baud trong cac che o 1 va 3 c xac nh
bang toc o tran cua timer 1. V timer hoat ong tan so

Trang 16

Giao trnh VXL B

Pham Trung Hieu

tng oi cao, tran timer c chia them cho 32 (hay 16 neu

SMOD=1) trc khi cung cap xung nhp toc o baud cho port noi
tiep.
Hoat ong ngat.
Ngat la hoat ong ngng tam thi mot chng trnh nay
e tji hanh mot chng trnh khac. Cac ngat co mot vai tro
quan trong trong thiet ke va kha nang thc thi cua vi ieu
khien. Chung cho phep he thon ap ng khong cung luc
ti mot cong viec va giai quyet mot cong viec o trong khi
mot chng trnh khac ang thc thi.
Mot he thong c ieu khien bang ngat cho ao giac
la lam nhieu viec ong thi. D nhien CPU moi lan khong
the thc thi mot chng trnh e thc thi mot chng trnh khac,
roi quay ve chng trnh au. khi co yeu cau ngat. Chng
trnh giai quyet ngat c goi la chng trnh phuc vu ngat (ISR
: Interrupt Sevice Reutine).
To chc ngat.
8951 co 5 nguon ngat:
- 2 ngat ngoai
- 2 ngat t timer.
- 1 ngat port noi tiep.
Tat ca cac ngat se khong c at sau khi reset he
thong va cho phep ngat rieng re bi phan mem.
a. Cho phep va khong cho phep ngat.
Moi nguon ngat c cho phep hoac khong cho phep
tng ngat mot qua thanh ghi chc nang at biet co nh a
ch bit IE (Interrupt Enable : cho phep ngat) a ch A8H.
Cung nh cac bit cho phep moi nguon ngat, co mot bit cho
phep hoac cam toan bo c xoa e cam tat ca cac
ngat hoac c at len 1 e cho phep tat ca cac ngat.
Bit
IE.7
IE.6
IE.5
IE.4
IE.3
IE.2
IE.1
IE.0

Ky hieu a ch
bit
EA
AFH
EA
AEH
ET5
ADH
E5
ACH
ET1
ABH
EX1
AAH
ET0
A9H
EX0
A8H

Mo ta (1=cho
phep,0=cam)
Cho phep hoac cam
toan bo
Khong c nh ngha
Cho phep ngat t timer
2 (8052)
Cho phep ngat Port noi
tiep
Cho phep ngat t timer
1

Trang 17

Giao trnh VXL B

Pham Trung Hieu

Cho phep ngat ngoai 1

Cho phep ngat t timer
0
Cho phep ngat ngoai 0
Tom tat thanh ghi IE.
b. u tien ngat.
Moi nguon ngat uc lap trnh rieng vao mot trong hai
mc u tien qua thanh ghi chc nang ac biet c a ch bit
Ip (Interrupt priority : u tien ngat) a ch B8H.
Bit
IP.7
IP.6
IP.5
IP.4
IP.3
IP.2
IP.1
IP.0

Ky
hieu

a ch
bit

PT2
PS
PT1
PX1
PT0
PX0

BDH
BCH
BBH
BAH
B9H
B8H

Mo ta (1=mc cao
hn,0=mc thap)
Khong c nh ngha
Khong c nh ngha
u tien cho ngat t timer
2 (8052)
u tien cho ngat Port noi
tiep
u tien cho ngat t timer
1
u tien cho ngat ngoai
u tien cho ngat t timer
0
u tien cho ngat ngoai 0

Tom tat thanh ghi IP.

Cac ngat u tien c xoa sau khi reset he thong e a
ttat ca cac ngat mc u tien thap hn.
X ly ngat.
Khi co mot ngan xay ra va c CPU chap nhan, chng
trnh chnh b ngat quang. Nhng hoat ong sau xay ra:
- Thi hanh hoan chnh lenh ang hien hanh.
- Cac DC vao ngat xep.
- Trang thai ngat hien hanh c cat ben trong.
- Cac ngat c chan tai mc cua ngat.
- Nap vap DC a ch Vector cua ISR.
- ISR thc thi.
ISR thc thi va ap ng ngat. ISR hoan tat bang lenh
RET1. ieu nay lam lay lai gia tr cu cua PC t ngan xep

Trang 18

Giao trnh VXL B

Pham Trung Hieu

va lay lai trang thai ngat cu. Chng trnh lai tiep tuc thi
hanh tai ni ma no dng.
Cac Vector ngat.
Khi chap nhan ngat, gia tr c nap vao PC c goi la
Vector ngat. No la a ch bat au cua ISR cho nguon tao
ngat. Cac Vector ngat c cho bang sau:

Trang 19

Giao trnh VXL B

Ngat
Reset he
thong
Ben ngoai
0
Timer 0
Ben ngoai
1
Timer 1
Port noi
tiep

GVGD : Nguyen Vien Quoc

C
RST
IE0
TF0
IE1
TF1
TI hoac RI

a ch Vector
0000H
0003H
000BH
0013H
001BH
0023H

Cac Vector ngat.

Vector reset he thong (RST a ch 0000H) no giong nh
mot ngat. No ngat chng trnh chnh va tai vao PC mot gia
tr mi.
Khi ch en mot ngat c gay ngat t ong b xoa bi
phan cng, tr ra R1, T1 cho cac ngat cong noi tiep. V co
hai nguon co the co cho ngat nay, khong thc te e CPU
xoa c ngat nay. Cac bit phai c kiem tra trong ISR e
xac nh nguon ngat va c tao ngat se c xoa bang
phan mem.
Cac ngat cua 8951.
a. Cac ngat timer.
Cac ngat timer co a ch Vector ngat la 000BH (timer 0)
va 001BH (timer 1). Ngat timer xay ra khi cac thanh ghi timer (TLx
ITHx) tran va set c bao tran (TFx) len 1. Cac c timer (TFx)
khong b xoa bang phan mem. Khi cho phep cac ngat, TFx t
ong b xoa bang phan cng khi CPU chuyen en ngat.
b. Cac ngat cong noi tiep.
Ngat cong noi tiep xay ra khi hoac c phat (TI) hoac
c ngat thu (KI) c at len 1. Ngat phat xay ra khi mot ky
t a c nhan xong va ang i trong SBUP e c oc.
Cac ngat cong noi tiep khac vi cac ngat timer. C
gay ra ngat cong noi tiep khong b xoa bang phan cng khi
CPU chuyen ti ngat. Do co hai nguon ngat cong noi tiep Ti
va RI. Nguon ngat phai c xac nh trong ISR va c tao
ngat se c xoa bang phan mem. Cac ngat timer c ngat
c ngat c xoa bang phan cng khi CPU hng ti ISR.
c. Cac ngat ngoai.
- Cac ngat ngoai xay ra khi co mot mc thap hoac canh
xuong tren chan INT0 hoac INT1 cua vi ieu khien. ay la
chc nang chuyen oi cua cac bit Port 3.(Port 3.2 va Port 3.3).

Trang 20

Giao trnh VXL B

GVGD : Nguyen Vien Quoc

Cac c tao ngat nay la cac bit IE0 va IE1 trong TCON. Khi
quyen ieu khien a chuyen en ISR, c tao ra ngat ch
c xoa neu ngat c tch cc bang canh xuong. Neu
ngat c tch cc theo mc, th nguon yeu cau ngat ben
ngoai se ieu khien mc cua c thay cho phan cng.
S la chon ngat tch cc mc thap hay tch cc canh
xuong c lap trnh qua cac bit IT0 va IT1 trong TCON. Neu IT1
= 0, ngat ngoai 1 c tac ong bang muc thap chan IT1.
Neu IT1 = 1 ngat ngoai 1 se c tac ong bang canh
xuong. trong che o nay, neu cac mau lien tiep tren chan
INT1 ch mc cao trong mot chu ky va ch mc thap trong chu
ky ke, c yeu cau ngat IE1 trong TCON c at len 1, roi
bit IE yeu cau ngat.
Neu ngat ngoai c tac ong bang canh xuong th
nguon ben ngoai phai gi chan tac ong mc cao toi
thieu mot chu ky va gi no mc thap them mot chu ky
na e am bao phat hien c canh xuong. Neu ngat
ngoai c tac ong theo mc th nguon ben ngoai phai gi
tn hieu yeu cau tac ong cho en khi ngat c yeu cau
c that s tao ra va khong tac ong yeu cau ngat trc
khi ISR c hoan tat . Neu khong mot ngat khac se c
lap lai.
6. Khao sat bo nh EPROM 2764
Trong cac mach ieu khien dung vi x ly PROM c s dung rat
pho bien v no cho phep ngi s dung co the nap va xoa cac
chng trnh de dang theo yeu cau cua moi ngi. EPROM 2764 co
dung lng 8kbyte co s o chan va s o logic nh sau:
A0
Vpp
Vcc

A12
PGM
D0
A7
NC
D1
A8
A6
A
A5
9
D2
2764
2764
A11
A4
D3
OE\
A3
A12
A10
D4
A2
CE\
CE\
A1
D5
OE\
D7=
A0
PGM\
D6
D6
VPP
D0
D5
D1
D7
D4
D2
Hnh 4.2 S o
D3 chan va s o logic EPROM 2764
GND
EPROM
2764 co 13 ng a ch va 8 ng d lieu

nen
dung lng cua 2764 la 2 =8192byte d leu hay 8kbyte ,co 2 nguon
cung capVcc va Vpp ngo vao Vcc luon noi ti nguon 5v ngo vao
Vpp c noi ti nguon+5v khi EPROM ang lam viec che o oc
13

Trang 21

Giao trnh VXL B

GVGD : Nguyen Vien Quoc

d lieu va noi ti nguon 26v khi lap trnh cho EPROM

Hai ngo vao ieu khien:
OE\ c dung e ieu khien bo em cho phep d lieu cua
EPROM xuat ra ngoai hay khong .
CE\ la ngo vao cho phep co hai chc nang :khi hoat ong bnh
thngCE\ la it1n hieu cho phep e doc d lieu t EPROM,CE\ phai
mc thap e mach ien ben trongla chon d lieu va chuyen
no en output buffer ket hp vi tn hieu cho OE\ mc thap,th
d lieu mi xuat cac ngo raD0-D7.Khi CE\ mc cao th EPROM
trang thai ch(Standby).cong suat tieu tan luc nay 132mw.
Bang trang thai lam viec cua EPROM
MODE

CE\

OE\

PGM\

Vpp

Vcc

READ
STANDBY
PROGAM
PROGRAM
VERYFY
PROGRAM
INHIBIT

Vil
Vih
Vil
Vil

Vil
X
X
Vil

Vih
X
Vil
Vih

Vcc
Vcc
Vpp
Vpp

Vcc
Vcc
Vcc
Vcc

Outpu
t
Dout
HighZ
Din
Dout

Vih

Vpp

Vcc

HighZ

7. BO NH RAM
-Ram la bo nh truy xuat ngau nhien, co ngha la bat
k o nh nao cung de dang truy xuat nh nhng o nh
khac.
-Khuyet iem cua Ram la d lieu lu tr trong Ram se
Data mat
mat
khi
ien.
Input
-u iem chnh cua Ram la co the oc va ghi nhanh
chong
RW
INPUT BUFFER
\
Cau Truc Cua Ram
Tng t nh bo nho Rom,bo nh Ram cung gom co
mot so thanh ghi .moi thanh ghi lu tr 1 t d lieu duy nhat
Register
va mot d lieu duy nhat.Dung
lng cua bo nh Ram la
0 512K, va 1024K.vaCS\
1K,2K ,8K, 16K
,32K,
64K,
128K,
256K,
t 72 d
Register
A
lieu la 8 hoac
4 bit.
1
A
5
4

Address
Input

A3
A2
A1
A0

Dec
ode
r
6
line
Selects
toOne
Register64
line

Register
2

Register
62
Register
63
Output
Trang
22
Buffer

Oo O1 O 2 O3

Data

Giao trnh VXL B

GVGD : Nguyen Vien Quoc

a.Hoat ong oc d lieu t Ram

Ma a ch cua o nh can oc d lieu c a en
ngo vao a ch cua Ram ong thi ngo tn hieu ieu khien
R/W phai mc logic 1 va ngo vao cho phep(CS) phai
mc logic1.khi o d lieu mi xuat hien ngo ra d lieu.
Khi R/W=1 se khong cho phep bo em ngo vao, do o
d lieu ngo vao khong anh hng g en o nh ang truy
xuat.
b. Hoat ong ghi d lieu len Ram
e ghi d lieu vao thanh ghi a c la chon bi cac
ngo vao a ch cua bo nh Ram,oi hoi ngo vaoR/W=0
va CS=1.To hp hai mc logic nay se cho phep bo em ngo
vao e a t d lieu (4bit) cac ngo vao se c nap
thanh
ghi
c
chon
KhiR/W mc thap se khong cho phep bo em ngo ra
va ngo ra trang thai tong tr cao(trong luc ghi d lieu).Khi
ghi d lieu vao o nh th d lieu trc o se mat i .
c.Chip selet (cs)
Hau het cac bo nh eu co hoat nhieu ngo vao CS
,c dung e cho phep hoac khong cho phep bo nh hoat
ong trong nhieu trng hp ket noi nhieu bo nh.Khi khong
cho tat ca cac ngo vao d lieu va ngo ra d lieu trang
thai tong tr cao.
d.Nhng chan data input-output
e giam so chan cho mot Icnha che tao ket hp 2 chc
nang data input va data output thanh mot chan Input/output,
chung co chc nang cua cac chan I/O.Khi hoat ong oc,ca
chan I/O hoat ong nh la cac chan xuat d lieu.Khi ghi d
lieu, cac chan I/o hoat ong nh la cac chan d lieu.
Cac loai Ram
Ram c chia lam 2 loai:

Trang 23

Giao trnh VXL B

GVGD : Nguyen Vien Quoc

-SRAM(Static RAM);la mot loai linh kien ma viec lu tr

d lieu da vao nguyen tac hoat ong cua flip flop D.D
lieu vao ton tai mot trong haitrang thai logic cua mach so.
DRAM(Dynamic Ram):la loai linh kien nh ma d lieu lu
tr nh ien tch tr trong tu ien.

Trang 24

Giao trnh VXL B

GVGD : Nguyen Vien Quoc

2. Tom tat cac lenh thng

dung cua VXL 89C51
a. Nhom lenh x ly so hoc:
ADD A,Rn (1byte, 1 chu ky may) : cong noi dung thanh ghi Rn vao
thanh ghi A.
ADD A,data
(2,1): Cong trc tiep 1 byte vao thanh ghi A.
ADD A,@Ri
(1,1): Cong gian tiep noi dung RAM cha tai a ch
c
khai bao trong Ri vao thanh ghi A.
ADD A,#data
(2,1):Cong d lieu tc thi vao A.
ADD A,Rn
(1,1): Cong thanh ghi va c nh vao A.
ADD A,data
(2,1): Cong trc tiep byte d lieu va c nh
vao A.
ADDC A,@Ri
(1,1): Cong gian tiep noi dung RAM va c nh vao
A.
ADDC A,#data
(2,1): Cong d lieu tc thi va c nh vao A.
SUBB A,Rn (1,1): Tr noi dung thanh ghi A cho noi dung thanh ghi Rn va
c nh.
SUBB A,data
(2,1): Tr trc tiep A cho mot so va c nh.
SUBB A,@Ri
(1,1): Tr gian tiep A cho mot so va c nh.
SUBB A,#data
(2,1): Tr noi dung A cho mot so tc thi va c
nh.
INC A
(1,1): Tang noi dung thanh ghi A len 1.
INC Rn
(1,1): Tang noi dung thanh ghi Rn len 1.
INC data
(2,1): Tang d lieu trc tiep len 1.
INC @Ri
(1,1): Tang gian tiep noi dung vung RAM len 1.
DEC A
(1,1): Giam noi dung thanh ghi A xuong 1.
DEC Rn
(1,1): Giam noi dung thanh ghi Rn xuong 1.
DEC data
(2,1): Giam d lieu trc tiep xuong 1
DEC @Ri
(1,1): Giam gian tiep noi dung vung RAM xuong 1.
INC DPTR
(1,2): Tang noi dng con tro d lieu len 1.
MUL AB
(1,4): Nhan noi dung thanh ghi A vi noi dung thanh
ghi B.
DIV AB
(1,4): Chia noi dung thanh ghi A cho noi dung thanh ghi
B.
DA A
(1,1,): hieu chnh thap phan thanh ghi A.
b. Nhom lenh luan ly:
ANL A,Rn
(1,1): AND noi dung thanh ghi A vi noi dung thanh ghi
Rn.
ANL A,data
(2,1): AND noi dung thanh ghi A vi d lieu trc tiep.
ANL A,@Ri
(1,1): AND noi dung thanh ghi A vi d lieu gian tiep
trong RAM.
ANL A,#data
(2,1): AND noi dung thanh ghi vi d lieu tc thi.
ANL data,A
(2,1): AND mot d lieu trc tiep vi A.
ANL data,#data (3,2): AND mot d lieu trc tiep vi A mot d lieu
tc thi.
ANL C,bit
(2,2): AND c nh vi 1 bit trc tiep.
Trang 25

Giao trnh VXL B

ANL C,/bit
ORL A,Rn
ORL A,data
ORL A,@Ri
ORL A,#data
ORL data,A
ORL data,#data
tc thi.
ORL C,bit
ORL C,/bit
XRL A,Rn
XRL A,data
XRL A,@Ri
XRL A,#data
XRL data,A
XRL dara,#data
tc thi.
SETB C
SETB bit
CLR A
CLR C
CPL A
CPL C
CPL bit
RL A
RLC A
RR A
RRC A
nh.
SWAP
c. Nhom
MOV A,Rn
MOV A,data
MOV A,@Ri
MOV A,#data
MOV Rn,data
Rn.
MOV Rn,#data
MOV data,A
MOV data,Rn
MOV data,data
MOV data,@Ri

GVGD : Nguyen Vien Quoc

(2,2):
(1,1):
(2,1):
(1,1):

AND c nh vi bu 1 bit trc tiep.

OR thanh ghi A vi thanh ghi Rn.
OR thanh ghi A vi mot d lieu trc tiep.
OR thanh ghi A vi mot d lieu gian tiep.
(2,1): OR thanh ghi A vi mot d lieu tc thi.
(2,1): OR mot d lieu trc tiep vi thanh ghi A.
(3,1) :OR mot d lieu trc tiep vi mot d lieu
(2,2):
(2,2):
(1,1):
(2,1):
(1,1):

OR c nh vi mot bit trc tiep.

OR c nh vi bu cua mot bit trc tiep.
XOR thanh ghi A vi thanh ghi Rn.
XOR thanh ghi A vi mo d lieu trc tiep.
XOR thanh ghi A vi mot d lieu gian tiep.
(2,1): XOR thanh ghi A vi mo d lieu tc thi.
(2,1): XOR mot d lieu trc tiep vi thanh ghi A.
(3,1): XOR mot d lieu trc tiep vi mot d lieu
(1,1):
(2,1):
(1,1):
(1,1):
(1,1):
(1,1):
(2,1):
(1,1):
(1,1):
(1,1):

at c nh.
at mot bit trc tiep.
Xoa thanh ghi A.
Xoa c nh.
Bu noi dung thanh ghi A.
Bu c nh.
Bu mot bit trc tiep.
Quay trai noi dung thanh ghi A.
Quay trai noi dung thanh ghi A qua c nh.
Quay phai noi dung thanh ghi A.
(1,1): Quay phai noi dung thanh ghi A qua c

(1,1): Quay trai noi dung thanh ghi A 1 nibble (1/2byte).

lenh chuyen d lieu:
(1,1):Chuyen noi dung thanh ghi Rn vao thanh ghi A.
(2,1): Chuyen d lieu trc tiep vao thanh ghi A.
(1,1): Chuyen d lieu gian tiep vao thanh ghi A.
(2,1): Chuyen d lieu tc thi vao thanh ghi A.
(2,2): Chuyen d lieu trc tiep vao thanh ghi
(2,1): Chuyen d lieu tc thi vao thanh ghi Rn.
(2,1): Chuyen noi dung thanh ghi A vao mot d lieu
trc tiep.
(2,2): Chuyen noi dung thanh ghi Rn vao mot d lieu
trc tiep.
(3,2): Chuyen mot d lieu trc tiep vao mot d
lieu trc tiep.
(2,2): Chuyen mot d lieu gian tiep vao mot d
lieu gian tiep.
Trang 26

Giao trnh VXL B

GVGD : Nguyen Vien Quoc

MOV data,#data (3,2): Chuyen mot d lieu tc thi vao mot d

lieu trc tiep.
MOV @Ri,A
(1,1): Chuyen noi dung thanh ghi A vao mot d lieu
gian tiep.
MOV @Ri,data
(2,2): Chuyen mot d lieu trc tiep vao mot d
lieu gian tiep.
MOV @Ri,#data (2,1): Chuyen d lieu tc thi vao d lieu gian
tiep.
MOV DPTR,#data (3,2): Chuyen mot hang 16 bit vao thanh ghi con tro
d lieu.
MOV C,bit
(2,1): Chuyen mot bit trc tiep vao c nh.
MOV bit,C
(2,2): Chuyen c nh vao mot bit trc tiep.
MOV A,@A+DPTR (1,2): Chuyen byte bo nh chng trnh co a ch
la @A+DPRT vao thanh ghi A.
MOVC A,@A+PC (1,2): Chuyen byte bo nh chng trnh co a ch
la @A+PC vao thanh ghi A.
MOVX A,@Ri
(1,2): Chuyen d lieu ngoai (8 bit a ch) vao thanh
ghi A.
MOVX A,@DPTR (1,2): Chuyen d lieu ngoai (16 bit a ch) vao
thanh ghi A.
MOVX @Ri,A
(1,2): Chuyen noi dung A ra d lieu ngoai (8 bit a
ch).
MOVX @DPTR,A (1,2): Chuyen noi dung A ra d lieu ben ngoai (16 bit
a ch).
PUSH data
(2,2): Chuyen d lieu trc tiep vao ngan xep va
tang SP.
POP data
(2,2): Chuyen d lieu trc tiep vao ngan xep va
giam SP.
XCH A,Rn
(1,1): Trao oi d lieu gia thanh ghi Rn v2 thanh ghi
A.
XCH A,data
(2,1): Trao oi gia thanh ghi A va mot d lieu
trc tiep.
XCH A,@Ri
(1,1): Trao oi gia thanh ghi A va mot d lieu
gian tiep.
XCHD A,@R
(1,1): Trao oi gia nibble thap (LSN) cua thanh ghi A
va LSN cua d lieu gian tiep.
d. Nhom lenh chuyen ieu khien:
ACALL addr11
(2,2): Goi chng trnh con dung a ch tuyet oi.
LCALL addr16
(3,2): Goi chng trnh con dung a ch dai.
RET
(1,2): Tr ve t lenh goi chng trnh con.
RET1
(1,2): Tr ve t lenh goi ngat.
AJMP addr11
(2,2): Nhay tuyet oi.
LJMP addr16
(3,2): Nhay dai.
SJMP rel
(2,2):Nhay ngan.
JMP @A+DPTR
(1,2): Nhay gian tiep t con tro d lieu.
JZ rel
(2,2): Nhay neu A=0.
Trang 27

Giao trnh VXL B

JNZ rel
JC rel
JNC rel
JB bit,rel
JNB bit,rel
at.
JBC bit,rel
roi xoa bit.
CJNE A,data,rel

GVGD : Nguyen Vien Quoc

(2,2): Nhay neu A khong bang 0.

(2,2): Nhay neu c nh c at.
(2,2): Nhay neu c nh khong c at.
(3,2): Nhay tng oi neu bit trc tiep c at.
(3,2):Nhay tng oi neu bit trc tiep khong c
(3,2): Nhay tng oi neu bit trc tiep c at ,

(3,2): So sanh d lieu trc tiep vi A va nhay neu

khong bang.
CJNE A,#data,rel (3,2): So sanh d lieu tc thi vi A va nhay neu
khong bang.
CJNE Rn,#data,rel
(3,2): So sanh d lieu tc thi vi noi dung
thanh ghi Rn va nhay neu khong bang.
CJNE @Ri,#data,rel (3,2): So sanh d lieu tc thi vi d lieu gian
tiep va nhay neu khong bang.
DJNZ Rn,rel
(2,2): Gian thanh ghi Rn va nhay neu khong
bang.
DJNZ data,rel
(3,2): Giam d lieu trc tiep va nhay neu
khong bang.
e. Cac lenh re nhanh:
Co nhieu lenh e ieu khien len chng trnh bao gom viec goi
hoac tra lai t chng trnh con hoac chia nhanh co ieu kien hay
khong co ieu kien.
Tat ca cac lenh re nhanh eu khong anh hng en c. Ta co
the nh nhan can nhay ti ma khong can ro a ch, trnh bien
dch se at a ch ni can nhay ti vao ung khau lenh a a
ra.

Tom Tat Cac Lenh NHAY (JMP)

Trang 28

Giao trnh VXL B

GVGD : Nguyen Vien Quoc

1. Cau truc repeat until

Repeat
Until

<action>
<condition>

Ngon ng Assembly
LOOP:
<action>
JUMP_if_not_<condition>,LOOP
VD: Cau truc repeat until
Repeat
Until

...
A=0

Ngon ng Assembly
LOOP:
...
JNZ LOOP

Trang 29

Giao trnh VXL B

GVGD : Nguyen Vien Quoc

2. Cau truc while do

while <condition> do <action>
Ngon ng Assembly
LOOP:
JUMP_if_not_<condition>,DO
SJMP
STOP
DO:
<action>
SJMP
LOOP
STOP:
...
VD: Cau truc while do
R7 = 0
while R7 10 do {
...
R7 = R7 + 1
}
Ngon ng Assembly
MOV
R7,#0
LOOP:
CJNE
R7,#10,DO
SJMP
STOP
DO:
...
INC
R7
SJMP
LOOP
STOP:
...
3. Cau truc if then else
if <condition> then
<action 1>
else
<action 2>
Ngon ng Assembly
JUMP_if_not_<condition>,ELSE
<action 1>
SJMP
ELSE:
DONE:
VD: Cau truc

DONE
<action 2>
...
if then else

if P0.1 = 0 then
R7 = R7 + 1
else
R7 = 0
Trang 30

Giao trnh VXL B

Ngon ng Assembly
JB
INC

R7

SJMP
ELSE:
DONE:

DONE
MOV
...

GVGD : Nguyen Vien Quoc

P0.1,ELSE

R7,#0

Trang 31

Giao trnh VXL B

GVGD : Nguyen Vien Quoc

4. Cau truc case of

case P1 of
#11111110b: P2.0 = 1
#11111101b: P2.1 = 1
#11111011b: P2.2 = 1
else P2 = 0
end
Ngon ng Assembly
CJNE
SKIP1
SETB

P1,#11111110b,
P2.0

SKIP1:

SJMP
CJNE
SETB

EXIT
P1,#11111101b,SKIP2
P2.1

SKIP2:

SJMP
CJNE
SETB

EXIT
P1,#11111011b,SKIP3
P2.2

SJMP
MOV
...

EXIT
P2,#0

SKIP3:
EXIT:

Sau ay la s tom tat tng hoat ong cua lenh nhay.

JC
rel
: Nhay en rel neu c Carry C = 1.
JNC rel
: Nhay en rel neu c Carry C = 0.
JB
bit, rel
: Nhay en rel neu (bit) = 1.
JNB bit, rel
: Nhay en rel neu (bit) = 0.
JBC bit, rel
: Nhay en rel neu bit = 1 va xoa bit.
ACALL
addr11: Lenh goi tuyet oi trong page 2K.
(PC) (PC) + 2
(SP) (SP) + 1
((SP)) (PC7PC0)
(SP) (SP) + 1
((SP)) (PC15PC8)
(PC10PC0) page Address.
LCALL
addr16: Lenh goi dai chng trnh con trong 64K.
(PC) (PC) + 3
(SP) (SP) + 1
((SP)) (PC7PC0)
(SP) (SP) + 1
((SP)) (PC15PC8)
(PC) Addr15Addr0.
RET
: Ket thuc chng trnh con tr ve chng trnh
chnh.
(PC15PC8) (SP)
(SP) (SP) - 1
(PC7PC0) ((SP))
Trang 32

Giao trnh VXL B

GVGD : Nguyen Vien Quoc

(SP) (SP) -1.

RETI
: Ket thuc thu tuc phuc vu ngat quay ve chng
trnh chnh hoat ong tng t nh RET.
AJMP Addr11
: Nhay tuyet oi khong ieu kien trong 2K.
(PC) (PC) + 2
(PC10PC0) page Address.
LJMP Addr16
: Nhay dai khong ieu kien trong 64K
Hoat ong tng t lenh LCALL.
SJMP rel
:Nhay ngan khong ieu kien trong (-128127) byte
(PC) (PC) + 2
(PC) (PC) + byte 2
JMP @ A + DPTR:Nhay khong ieu kien en a ch (A) + (DPTR)
(PC) (A) + (DPTR)
JZ
rel
: Nhay en A = 0. Thc hanh lenh ke neu A =
0.
(PC) (PC) + 2
(A) = 0 (PC) (PC) + byte 2
JNZ rel
: Nhay en A 0. Thc hanh lenh ke neu A = 0.
(PC) (PC) + 2
(A) < > 0 (PC) (PC) + byte 2
CJNE A, direct, rel : So sanh va nhay en A direct
(PC) (PC) + 3
(A) < > (direct) (PC) (PC) + Relative Address.
(A) < (direct) C = 1
(A) > (direct) C = 0
(A) = (direct). Thc hanh lenh ke tiep
CJNE A, # data, rel : Tng t lenh CJNE A, direct, rel.
CJNE Rn, # data, rel : Tng t lenh CJNE A, direct, rel.
CJNE @ Ri, # data, rel : Tng t lenh CJNE A, direct, rel.
DJNE Rn, rel
: Giam Rn va nhay neu Rn 0.
(PC) (PC) + 2
(Rn) (Rn) -1
(Rn) < > 0 (PC) (PC) + byte 2.
DJNZ direct, rel
: Tng t lenh DJNZ Rn, rel.
f. Cac lenh xen vao (Miscellamous Intstruction):
NOP : Khong hoat ong g ca, ch ton 1 byte va 1 chu ky may. Ta
dung e delay nhng khoang thi gian nho.
III. CAC V DU C BAN.

1.Instuctionset
Add
ORG

0H
MOV
MOV
MOV
ADD

R5,#25H ; na.p 25H va`o R5

R7,#34H ; na.p 34H va`o R7
A,#0 ; na.p 0 va`o A
A,R5 ; co^.ng R5 vo+'i A
; A = A + R5
ADD
A,R7 ; co^.ng R7 vo+'i A
; A = A + R7
ADD
A,#12H ; add 12H va`o A
; A = A + 12H
HERE: SJMP HERE ; du+`ng chuo+ng tri`nh ta.i dda^y
Trang 33

Giao trnh VXL B

GVGD : Nguyen Vien Quoc

END

BCD2ASCII

ORG

0
MOV
MOV
ANL
ORL
MOV
MOV
ANL
RR
RR
RR
RR
ORL
MOV
SJMP

A,#29H ; A = 29H, packed BCD

R2,A
; sao lu+u A va`o R2
A,#0FH ; che nibble cao (A=09)
A,#30H ; chuye^?n tha`nh ma~ ASCII, A=39H (`9')
R6,A
; lu+u ke^'t qua? va`o R6 (R6=39H ASCII char)
A,R2
; la^'y la.i gia' tri. A ban dda^`u
A,#0F0H ; che nibble tha^'p (A=20)
A
; quay pha?i 4 la^`n
A
;
A
;
A
; -> A=02
A,#30H ; chuye^? tha`nh ma~ ASCII
R2,A
; lu+u va`o R2
$

Bin2BCD
; ddo^?i Binary (P1) -> BCD (R5 R6 R7)
MOV
A,#0FFH
MOV
P1,A ; P1: input port
MOV
A,P1 ; ddo.c P1
MOV
B,#10 ; B=0A hex (10 dec)
DIV
AB
; chia cho 10
MOV
R7,B ; lu+u digit tha^'p
MOV
B,#10 ;
DIV
AB
; chia cho 10
MOV
R6,B ; lu+u digit tie^'p theo va`o R6
MOV
R5,A ; lu+u digit cuo^'i va`o R6
SJMP $
; Ba.n ha~y vie^'t la.i ddoa.n chuo+ng tri`nh tre^n
; tha`nh mo^.t chuo+ng tri`nh con, dda(.t te^n la` BIN2BCD

Cong_16bit

; co^.ng so^' 16-bit: 3CE7h + 3B8Dh

; ke^'t qua? lu+u trong: R7 R6
CLR
C
MOV
A,#0E7H
ADD
A,#8DH
MOV
R6,A
MOV
A,#3CH
ADDC A,#3BH
MOV
R7,A
SJMP $
; Ba.n ha~y vie^'t chuo+ng tri`nh con co^.ng 2 so^' 16-bit

Cong_5byte_BCD
; co^.ng 5 byte chu+'a so^' BCD, ddi.a chi? ba('t dda^`u la` 40h
ORG
0
Trang 34

Giao trnh VXL B

GVGD : Nguyen Vien Quoc

MOV
R0,#40H
; na.p con tro?
MOV
R2,#5
; na.p bie^'n dde^'m
CLR
A
; A=0
MOV
R7,A
; xo'a R7
AGAIN: ADD
A,@R0
; co^.ng o^ nho+' tro? bo+?i R0
DA
A
; hie^.u chi?nh BCD
JNC
NEXT
; ne^'u CY=0 -> kho^ng ta(ng R7
INC
R7
; CY=1 -> ta(ng R7
NEXT: INC
R0
; ta(ng con tro?
DJNZ R2,AGAIN
; la(.p dde^'n khi R2=0
SJMP $

Cong_Don

; co^.ng do^`n 5 byte

ORG
0
MOV
R0,#40H
; na.p ddi.a chi? cho con tro?
MOV
R2,#5
; R2: bie^'n dde^'m
CLR
A
;A=0
MOV
R7,A
; xo'a R7
AGAIN: ADD
A,@R0
; co^.ng o^ nho+' tro? bo+?i R0
JNC
NEXT
; ne^'u CY=0 thi` kho^ng ta(ng R7
INC
R7
; ne^'u CY=1 thi` ta(ng R7
NEXT: INC
R0
; di.ch con tro? le^n 1 ddi.a chi?
DJNZ R2,AGAIN
; la(.p cho dde^'n khi R2 = 0
SJMP $

Copy_String
; copy mo^.t chuo^~i tu+` bo^. nho+' chuo+ng tri`nh va`o RAM no^.i
ORG
0
MOV
DPTR,#MYDATA ; con tro? nguo^`n
MOV
R0,#40H
; con tro? ddi'ch
BACK: CLR
A
; A=0
MOVC A,@A+DPTR
; la^'y data tu+` bo^. nho+' CT
JZ
HERE
; thoa't ne^'u data = 0 (NULL)
MOV
@R0,A
; lu+u va`o RAM
INC
DPTR
; ta(ng con tro? nguo^`n
INC
R0
; ta(ng con tro? ddi'ch
SJMP BACK
;
HERE: SJMP HERE
ORG
250H
MYDATA: DB
'HUTECH',0
; chuo^~i du+~ lie^.u
; ke^'t thu'c la` 0 (NULL char)
END

Copyblock

; copy kho^'i du+~ lie^.u 10 byte tu+` 35h dde^'n 60h

ORG
0
MOV
R0,#35H ; con tro? nguo^`n
MOV
R1,#60H ; con tro? ddi'ch
MOV
R3,#10 ; bie^'n dde^'m (10 bytes)
BACK: MOV
A,@R0
; ddo.c 1 byte tu+` data nguo^`n
MOV
@R1,A
; copy va`o ddi'ch
INC
R0
; ta(ng con tro? nguo^`n
Trang 35

Giao trnh VXL B

GVGD : Nguyen Vien Quoc

INC
R1
; ta(ng con tro? ddi'ch
DJNZ R3,BACK ;
SJMP $

P1_55_AA

; ba^.t/ta('t ca'c bit cu?a P1 xen ke~: AAh <-> 55h

;
ORG
0
BACK: MOV
A,#55H
; A = 55h
MOV
P1,A
; P1 = 55h
LCALL DELAY
;
MOV
A,#0AAH
; A = AAh
MOV
P1,A
; P1 = AAh
LCALL DELAY
SJMP BACK
;
;this is the delay subroutine
ORG 300H
DELAY: PUSH 4
; PUSH R4
PUSH 5
; PUSH R5
MOV
R4,#0FFH
; R4=FFH
NEXT: MOV
R5,#0FFH
; R5=255
AGAIN: DJNZ R5,AGAIN
DJNZ R4,NEXT
POP
5
; POP INTO R5
POP
4
; POP INTO R4
RET
;
END

Trabang_X2
; ddo.c x tu+` P1
; tra ba?ng ti'nh x^2
; xua^'t ke^'t qua? ra P2
ORG
0
MOV
DPTR,#300H
; na.p ddi.a chi? ba?ng tra
MOV
A,#0FFH
;
MOV
P1,A
; P1: input
BACK: MOV
A,P1
; ddo.c x
MOVC A,@A+DPTR
; tra ba?ng ti'nh x^2
MOV
P2,A
; xua^'t ra P2
SJMP BACK
;
ORG
300H
XSQR_TABLE:
DB
0,1,4,9,16,25,36,49,64,81
END

Tru_16bit

; tru+` 16-bit: 2762h - 1296h

CLR
C
; CY=0
MOV
A,#62H
; A=62H
SUBB A,#96H
; 62H-96H=CCH, CY=1
MOV
R7,A
; lu+u ke^'t qua?
MOV
A,#27H
; A=27H
Trang 36

Giao trnh VXL B

SUBB
MOV

A,#12H
R6,A

SJMP

GVGD : Nguyen Vien Quoc

; 27H-12H-1=14H
; lu+u ke^'t qua?

Tru_8bit

; tru+`: 4Ch - 6Eh

;
CLR
C
MOV
A,#4Ch ; A=4CH
SUBB A,#6EH ; A=A-6Eh
JNC
NEXT
; ne^'u CY=0 nha?y dde^'n NEXT
CPL
A
; ne^'u CY=1 la^'y bu` 2
INC
A
;
NEXT: MOV
R1,A
; lu+u ke^'t qua? va`o R1
SJMP

2.INTERRUPT

INT1

; Button no^'i vo+'i /INT1

; Nha^'n button -> LED (P1.3) sa'ng mo^.t lu'c ro^`i ta('t
ORG 0000H
LJMP MAIN
;nha?y qua vu`ng vector nga('t
; ISR cu?a INT1
ORG 0013H
;INT1 ISR
SETB P1.3
;ba^.t LED sa'ng (1 byte)
MOV R3,#255
;(2 byte)
BACK: DJNZ R3,BACK
;delay 1 chu't (2 byte)
CLR P1.3
;ta('t LED (1 byte)
RETI
;(1 byte)
; MAIN program for initialization
ORG 30H
MAIN: MOV IE,#10000100B
;cho phe'p nga('t ngoa`i 1 (/INT1)
HERE: SJMP HERE
;cho+` nha^.n nga('t
END

Int1_Edge_Trigger
; Cha^n 1.3 no^'i vo+'i loa
; Khi co' ca.nh xuo^'ng o+? INT1 -> ba^.t loa 1 lu'c ro^`i ta('t
ORG
0000H
LJMP MAIN
;ISR cu?a INT1
ORG
0013H
;INT1 ISR
SETB P1.3
;ba^.t loa
MOV
R3,#255
BACK: DJNZ R3,HERE
;delay 1 chu't
CLR
P1.3
;ta('t loa
RETI
;
;MAIN program for initialization
ORG
30H
Trang 37

Giao trnh VXL B

GVGD : Nguyen Vien Quoc

MAIN: SETB TCON.2

;INT1 ta'c ddo^.ng ca.nh
MOV
IE,#10000100B ;cho phe'p nga('t ngoa`i 1
HERE: SJMP HERE
;cho+` nga('t
END

Pulse

;Pha't xung
ORG
LJMP
ORG
CPL
MOV
MOV
RETI

vuo^ng o+? P1.2 du`ng nga('t

0
MAIN
000BH
P1.2
TL0,#0H
TH0,#0DCH

ORG
30H
MAIN:
MOV
TMOD,#01H
MOV
TH0,#0DCH
MOV
IE,#82H
SETB TR0
HERE: SJMP HERE
END

Read_P0_Write_P1_Pulse_P21_1
; DDo.c data o+? P0, xua^'t ra P1, trong khi P2.1 pha't xung vuo^ng
; Du`ng Timer 0, mode 2 (auto reload)
ORG 0000H
LJMP MAIN
;nha?y qua vu`ng vector nga('t
;
; ISR cua? Timer 0 -> pha't xung vuo^ng
ORG 000BH
;vector cu?a Timer 0
CPL P2.1
;dda?o P2.1
RETI
;
; Chuo+ng tri`nh chi'nh
ORG 0030H
MAIN: MOV TMOD,#02H ;Timer 0,mode 2(auto reload)
MOV P0,#0FFH ;P0: input port
MOV TH0,#-92
MOV IE,#82H ;IE=10000010b cho phe'p nga('t Timer 0
SETB TR0
;cho phe'p Timer 0 cha.y
BACK: MOV A,P0
;ddo.c ddu+~ lie^.u tu+` P0
MOV P1,A
;xua^'t ra P1
SJMP BACK
END

Read_P0_Write_P1_Pulse_P21_2

; DDo.c data tu+` P0, xua^'t ra P1, trong khi P2.1 pha't xung
; Du`ng Timer 1, mode 1
ORG
0000H
LJMP MAIN
;nha?y qua vu`ng vector nga('t
; ISR cu?a Timer 1 -> pha't xung
ORG
001BH
;vector nga('t Timer 1
Trang 38

Giao trnh VXL B

LJMP

GVGD : Nguyen Vien Quoc

ISR_T1

; Chuo+ng tri`nh chi'nh

ORG
0030H
MAIN: MOV
TMOD,#10H
;timer 1, mode 1
MOV
P0,#0FFH
;P0: input port
MOV
TL1,#low(-1000)
MOV
TH1,#high(-1000)
MOV
IE,#88H
;IE=10001000b cho phe'p nga('t Timer 1
SETB TR1
;cho phe'p Timer 1 cha.y
BACK: MOV
A,P0
;ddo.c data tu+` P0
MOV
P1,A
;xua^'t ra P1
SJMP BACK
;
; Timer 1 ISR. Timer 1 pha?i dduo+.c na.p la.i vi` mode 1 kho^ng na.p tu+.
ddo^.ng
ISR_T1: CLR
TR1
;du+`ng Timer 1
CLR
P2.1
;P2.1=0
MOV
R2,#4
;2 MC
HERE: DJNZ R2,HERE
;4x2MC = 8MC
MOV
TL1,#low(-1000) ;2 MC
MOV
TH1,#high(-1000);2 MC
SETB TR1
;cho phe'p Timer 1 cha.y, 1 MC
SETB P2.1
;P2.1=1, 1 MC
RETI
END

Serial_Port_Interrupt_1

; DDo.c data tu+` P1, xua^'t ra P2 va` serial port

ORG
0
LJMP MAIN
ORG
23H
LJMP SERIAL
; nha?y dde^'n ISR cu?a nga('t port nt
ORG
30H
MAIN: MOV
P1,#0FFH
; P1: input port
MOV
TMOD,#20H
; timer 1, mode 2 (auto reload)
MOV
TH1,#0FDH
; 9600 baud rate
MOV
SCON,#50H
; 8-bit, REN enabled
MOV
IE,#10010000B ; cho phe'p nga('t port nt
SETB TR1
; cho phe'p timer 1 cha.y
BACK: MOV
A,P1
; ddo.c data tu` port 1
MOV
SBUF,A
; xua^'t ra port nt
MOV
P2,A
; xua^'t ra P2
SJMP BACK
;
;------------------SERIAL PORT ISR
ORG
100H
SERIAL: JNB
RI,CHK_TI
; RI = 0 -> nha?y dde^'n CHK_TI
MOV
A,SBUF
; RI = 1 -> receive
CLR
RI
; xo'a RI
CHK_TI: JNB
TI,EXIT
CLR
TI
; xo'a TI
Trang 39

Giao trnh VXL B

GVGD : Nguyen Vien Quoc

EXIT: RETI
END

Serial_Port_Interrupt_2

; DDo.c data tu+` P1, xua^'t ra P2

; Nha^.n data tu+` serial port, xua^'t ra P0
ORG
0
LJMP MAIN
ORG
23H
LJMP SERIAL
;nha?y dde^'n serial ISR
ORG
30H
MAIN: MOV
P1,#0FFH
;P1: input port
MOV
TMOD,#20H
;timer 1, mode 2 (auto reload)
MOV
TH1,#0FDH
;9600 baud rate
MOV
SCON,#50H
;8-bit, REN enabled
MOV
IE,#10010000B ;cho phe'p serial interrupt
SETB TR1
;cho phe'p timer 1 cha.y
BACK: MOV
A,P1
;ddo.c data tu+` Port 1
MOV
P2,A
;xua^'t ra P2
SJMP BACK
;SERIAL PORT ISR
SERIAL: JNB
RI,TRANS
;RI=0 -> nha?y
MOV
A,SBUF
;RI=1
MOV
P0,A
;xua^'t data nha^.n dduo+.c ra P0
CLR
RI
;xo'a RI
RETI
TRANS: CLR
TI
;xo'a TI
RETI
END

Serial_Port_Timer_Interrupt
; Pha't xung vuo^ng 5KHz o+? P0.1,
; nha^.n data tu+` serial port, xua^'t ra P0
; DDc.c data tu++` P1, ghi va`o 30h, va` xua^'t ra serial port
ORG
0
LJMP MAIN
ORG
000BH
;ISR cu?a Timer 0
CPL
P0.1
;dda?o P0.1
RETI
ORG
23H
LJMP SERIAL
;nha?y dde^'n ISR cu?a nga('t port nt
ORG
30H
MAIN: MOV
P1,#0FFH
; P1: input port
MOV
TMOD,#22H
; Timer 0&1, mode 2, AUTO RELOAD
MOV
TH1,#0F6H
; 4800 BAUD RATE
MOV
SCON,#50H
; 8-bit, REN = 1
MOV
TH0,#-92
; TH0 = -92 -> pha't xung 5 KHz
MOV
IE,#10010010B ; cho phe'p nga('t serial port, Timer 0
SETB TR1
; cho phe'p Timer 1 cha.y
SETB TR0
; cho phe'p Timer 0 cha.y
BACK: MOV
A,P1
; ddo.c data tu+` port 1
MOV
SBUF,A
; xua^'t ra serial port
Trang 40

Giao trnh VXL B

MOV
SJMP

P2,A
BACK

GVGD : Nguyen Vien Quoc

; xua^'t ra P2

;SERIAL PORT ISR

SERIAL: JNB
RI,TRANS
; RI = 0 -> nha?y
MOV
A,SBUF
; RI = 1: receive
MOV
30h,A
; lu+u data va`o o^ nho+' 30h
CLR
RI
; xo'a RI
RETI
TRANS: CLR
TI
; xo'a TI
RETI
END

3.Keypad
Scankp
;
;
;
;
;

Ba`n phi'm hex no^'i va`o P1

Chuo+ng tri`nh hie^?n thi. phi'm nha^'n ra LED 7 ddoa.n
P1.0-P1.3: columns
P1.4-P1.7: rows
DDi.a chi? LED: A000h)

LOOP: LCALL READKB

MOV
DPTR,#T7SEG
MOVC A,@A+DPTR
MOV
DPTR,#0A000H
MOVX @DPTR,A
SJMP LOOP

; tri. tra? ve^`: A = 0-15

; A000h: LED 1

READKB: PUSH 7
SCAN: MOV
A,#11111110B ; col_0 -> GND
MOV
R7,#0
; R7 = i
CONT: MOV
P1,A
; no^'i col i -> GND
MOV
A,P1
; ddo.c row
JNB
ACC.4,ROW_0
; xe't xem row na`o?
JNB
ACC.5,ROW_1
JNB
ACC.6,ROW_2
JNB
ACC.7,ROW_3
RL
A
; chua^?n bi. no^'i GND
INC
R7
; co^.t tie^'p theo
CJNE R7,#4,CONT
; la^`n luo+.t no^'i GND 4 co^.t
SJMP SCAN
; quay la.i que't tu+` co^.t 0
ROW_0: MOV
A,R7
ADD
A,#0
SJMP EXIT
ROW_1: MOV
A,R7
ADD
A,#4
SJMP EXIT
ROW_2: MOV
A,R7
ADD
A,#8
SJMP EXIT
ROW_3: MOV
A,R7

; Row=0, Col=R7
; A = 0 + R7
; Row=1, Col=R7
; A = 4 + R7
; Row=2, Col=R7
; A = 8 + R7
; Row=3, Col=R7
Trang 41

Giao trnh VXL B

ADD
A,#12
EXIT: POP
7
RET

GVGD : Nguyen Vien Quoc

; A = 12 + R7

T7SEG: DB
40H,79H,24H,30H,19H,12H,02H,78H,00H,10H,
DB
08H,03H,46H,21H,04H,0EH
END

4.LCD
LCD_BusyFlag
;Xua^'t ra LCD "Hello"
;P1=data pin
;P3.0 -> RS pin
;P3.1 -> R/W pin
;P3.2 -> E pin
RS
RW
E

EQU
EQU
EQU
ORG
MOV
ACALL
MOV
ACALL
MOV
ACALL
MOV
ACALL

P3.0
P3.1
P3.2
0
A,#38H
CSTROBE
A,#0CH
CSTROBE
A,#01H
CSTROBE
A,#06H
CSTROBE

MOV
A,#86H
ACALL CSTROBE
MOV
A,#'H'
ACALL DSTROBE
MOV
A,#'e'
ACALL DSTROBE
MOV
A,#'l'
ACALL DSTROBE
MOV
A,#'l'
ACALL DSTROBE
MOV
A,#'o'
ACALL DSTROBE
HERE: SJMP HERE
CSTROBE:
ACALL
MOV
CLR
CLR
SETB
CLR
RET

;init. LCD 2 do`ng, ma tra^.n 5x7

;LCD on, cursor on
;clear LCD
;cursor di.ch pha?i
;chuye^?n cursor dde^'n line 1, pos. 6

;command strobe
READY
;is LCD ready?
P1,A
;xua^'t ma~ le^.nh
RS
;RS=0: le^.nh
RW
;R/W=0 -> ghi ra LCD
E
;E=1 -> ta.o ca.nh xuo^'ng
E
;E=0 ,cho^'t

Trang 42

Giao trnh VXL B

DSTROBE:
ACALL
MOV
SETB
CLR
SETB
CLR
RET

GVGD : Nguyen Vien Quoc

;data strobe
READY
;is LCD ready?
P1,A
;xua^'t du+~ lie^.u
RS
;RS=1 for data
RW
;R/W=0 to write to LCD
E
;E=1 -> ta.o ca.nh xuo^'ng
E
;E=0, cho^'t

; kie^?m tra co+` BF

READY: SETB P1.7
;P1.7: input
CLR
RS
;RS=0: thanh ghi le^.nh
SETB RW
;R/W=1: ddo.c
BACK: CLR
E
;E=0 -> ta.o ca.nh le^n
SETB E
;E=1
JB
P1.7,BACK
;cho+` busy flag=0
RET
END

LCD_ScanKB

;P1 = data/command pin

;P3.0 -> RS pin
;P3.1 -> R/W pin
;P3.2 -> E pin
;P2 -> Keypad
ORG
0
RS
EQU
P3.0
RW
EQU
P3.1
EN
EQU
P3.2
MOV
ACALL
MOV
ACALL
MOV
ACALL
MOV
ACALL
MOV
ACALL

A,#38H
CSTROBE
A,#0EH
CSTROBE
A,#01H
CSTROBE
A,#06H
CSTROBE
A,#80H
CSTROBE

;init. LCD 2 lines,5x7 matrix

;LCD on, cursor on
;clear LCD
;cursor di.ch pha?i
;cursor: line 1, pos. 0

AGAIN: LCALL READKP

ORL
A,#30h
ACALL DELAY
ACALL DSTROBE
SJMP AGAIN
;command strobe
CSTROBE:
ACALL READY
MOV
P1,A

;is LCD ready?

;xua^'t ma~ le^.nh
Trang 43

Giao trnh VXL B

CLR
RS
CLR
RW
SETB EN
CLR
EN
RET
;data strobe
DSTROBE:
ACALL READY
MOV
P1,A
SETB RS
CLR
RW
SETB EN
CLR
EN
RET

GVGD : Nguyen Vien Quoc

;RS=0: le^.nh
;R/W=0: ghi ra LCD
;EN=1 -> ta.o ca.nh xuo^'ng
;EN=0 ,cho^'t

;is LCD ready?

;xua^'t du+~ lie^.u ra P1
;RS=1: du+~ lie^.u
;R/W=0 ghi ra LCD
;EN=1 -> ta.o ca.nh xuo^'ng
;EN=0, cho^'t

READY: SETB P1.7

;P1.7: input
CLR
RS
;RS=0: le^.nh
SETB RW
;R/W=1: ddo.c
BACK: CLR
EN
;EN=0 -> ta.o ca.nh le^n
SETB EN
;EN=1
JB
P1.7,BACK
;cho+` busy flag=0
RET
; DDo.c ba`n phi'm
READKP: PUSH 7
SCAN: MOV
A,#11111110B ; col_0 -> GND
MOV
R7,#0
; R7 = i
CONT: MOV
P2,A
; no^'i col i -> GND
MOV
A,P2
; ddo.c row
JNB
ACC.4,ROW_0
; xe't xem row na`o?
JNB
ACC.5,ROW_1
JNB
ACC.6,ROW_2
JNB
ACC.7,ROW_3
RL
A
; chua^?n bi. no^'i GND
INC
R7
; co^.t tie^'p theo
CJNE R7,#4,CONT
; la^`n luo+.t no^'i GND 4 co^.t
SJMP SCAN
; quay la.i que't tu+` co^.t 0
ROW_0: MOV
A,R7
; Row=0, Col=R7
ADD
A,#0
; A = 0 + R7
SJMP EXIT
ROW_1: MOV
A,R7
; Row=1, Col=R7
ADD
A,#4
; A = 4 + R7
SJMP EXIT
ROW_2: MOV
A,R7
; Row=2, Col=R7
ADD
A,#8
; A = 8 + R7
SJMP EXIT
ROW_3: MOV
A,R7
; Row=3, Col=R7
ADD
A,#12
; A = 12 + R7
EXIT: POP
7
RET
Trang 44

Giao trnh VXL B

GVGD : Nguyen Vien Quoc

DELAY: PUSH 6
PUSH 7
MOV
R7,#0FFh
LP1: MOV
R6,#0FFh
LP0: DJNZ R6,LP0
DJNZ R7,LP1
POP
7
POP
6
RET
END

5.LED
counter_led
;
;
;
;
;
;
;
;
;

Que't LED
a,b,c,d,e,f,g -> Port 2
P3.0 -> LED1
P3.1 -> LED2
P3.2 -> LED3
P3.4(T0) -> Button
40h: ha`ng do+n vi.
41h: ha`ng chu.c
42h: ha`ng tra(m

ORG
0H
MOV
DPTR,#LED7SEG ; DPTR tro? dde^'n ba?ng ma~ LED
MOV
TMOD,#06h
; counter 0, mode 2
MOV
TH0,#0
SETB P3.0
; ta('t ta^'t ca? ca'c LED
SETB P3.1
SETB P3.2
SETB P3.4
; P3.4: input
SETB TR0
; cho phe'p counter 0 cha.y
BEGIN: MOV
A,TL0
LCALL BIN2BCD
; tra ba?ng, ddo^?i BCD -> LED 7 ddoa.n
MOV
A,40h
MOVC A,@A+DPTR
MOV
40h,A
MOV
A,41h
MOVC A,@A+DPTR
MOV
41h,A
MOV
A,42h
MOVC A,@A+DPTR
MOV
42h,A
LCALL DISPLAY
SJMP BEGIN
DISPLAY:
MOV
P2,40H
CLR
P3.0
ACALL DELAY

; LED1
; ba^.t LED1 sa'ng
; delay
Trang 45

Giao trnh VXL B

GVGD : Nguyen Vien Quoc

SETB

P3.0

; ta('t LED1

MOV
CLR
ACALL
SETB

P2,41H
P3.1
DELAY
P3.1

; LED2
; ba^.t LED2 sa'ng
; delay
; ta('t LED2

MOV
CLR
ACALL
SETB
RET

P2,42H
P3.2
DELAY
P3.2

; LED 3
; ba^.t LED3 sa'ng
; delay
; ta('t LED3

BIN2BCD:
MOV
DIV
MOV
MOV
DIV
MOV
MOV
RET

B,#10
AB
40h,B
B,#10
AB
41h,B
42h,A

; B=10
; chia cho 10
; lu+u digit tha^'p
;
; chia cho 10
; lu+u digit tie^'p theo va`o 41h
; lu+u digit cuo^'i va`o 42h

DELAY:
MOV
R1,#10
MOV
R0,#0FFh
LOOP: DJNZ R0,LOOP
DJNZ R1,LOOP
RET
;
LED7SEG:
DB
0C0H,0F9H,0A4H,0B0H,99H,92H,82H,0F8H,80H,98H
DB
88H,0C6H,86H,8EH,82H,89H
END
;
;
;
;

quetled

a,b,c,d,e,f,g -> Port 2

P3.0 -> LED1
P3.1 -> LED2
P3.1 -> LED3
ORG
0H
MOV
P3,#0FFH
MOV
DPTR,#LED7SEG
BEGIN:
MOV
A,#4
MOVC A,@A+DPTR
MOV
40H,A
MOV
A,#3
MOVC A,@A+DPTR
MOV
41H,A

Trang 46

Giao trnh VXL B

GVGD : Nguyen Vien Quoc

MOV
A,#2
MOVC A,@A+DPTR
MOV
42H,A
MOV
A,#1
MOVC A,@A+DPTR
MOV
43H,A
LCALL DISPLAY
SJMP BEGIN
DISPLAY:
; LED1
MOV
P2,40H
CLR
P3.0
ACALL DELAY_25
SETB P3.0
; LED2
MOV
P2,41H
CLR
P3.1
ACALL DELAY_25
SETB P3.1
; LED 3
MOV
P2,42H
CLR
P3.2
ACALL DELAY_25
SETB P3.2
; LED 4
MOV
P2,43H
CLR
P3.3
ACALL DELAY_25
SETB P3.3
RET
;
DELAY_25:
MOV
R1,#10
MOV
R0,#0
LOOP: DJNZ R0,LOOP
DJNZ R1,LOOP
RET
;
LED7SEG:
DB
0C0H,0F9H,0A4H,0B0H,99H,92H,82H,0F8H,80H,98H
DB
88H,0C6H,86H,8EH,82H,89H
END
;
;
;
;

quetled_123

a,b,c,d,e,f,g -> Port 2

P3.0 -> LED1
P3.1 -> LED2
P3.1 -> LED3
ORG
0H

Trang 47

Giao trnh VXL B

MOV

P3,#0FFh

GVGD : Nguyen Vien Quoc

; ta('t ta^'t ca? ca'c LED

BEGIN: MOV
P2,#0B0h
; xua^'t ra P2 ma~ cu?a '3'
CLR
P3.0
; ba^.t LED1
ACALL DELAY
; delay
SETB P3.0
; ta('t LED1
MOV
CLR
ACALL
SETB

P2,#0A4h
; xua^'t ra P2 ma~ cu?a '2'
P3.1
; ba^.t LED2
DELAY
; delay
P3.1
; ta('t LED2

MOV
CLR
ACALL
SETB
SJMP

P2,#0F9h
; xua^'t ra P2 ma~ cu?a '1'
P3.2
; ba^.t LED3
DELAY
; delay
P3.2
; ta('t LED3
BEGIN

DELAY: MOV
R1,#10
MOV
R0,#0FFh
LOOP: DJNZ R0,LOOP
DJNZ R1,LOOP
RET
END

quetled_8255

ORG

0H
MOV
MOV
MOVX
MOV
MOV
BEGIN:
MOV
MOVC
MOV

DPTR,#4003H
A,#80H
@DPTR,A
P3,#0FFH
DPTR,#LED7SEG
A,#4
A,@A+DPTR
40H,A

MOV
A,#3
MOVC A,@A+DPTR
MOV
41H,A
MOV
A,#2
MOVC A,@A+DPTR
MOV
42H,A
MOV
A,#1
MOVC A,@A+DPTR
MOV
43H,A
LCALL DISPLAY
SJMP BEGIN

Trang 48

Giao trnh VXL B

DISPLAY:
PUSH
PUSH
MOV
MOV
MOVX
MOV
MOV
MOVX
ACALL

DPH
DPL
A,40H
DPTR,#4000H
@DPTR,A
DPTR,#4001H
A,#0FEH
@DPTR,A
DELAY_25

GVGD : Nguyen Vien Quoc

; chon LED o PB

MOV
MOV
MOVX
MOV
MOV
MOVX
ACALL

A,41H
; xuat nd o nho 41h ra PA
DPTR,#4000H
@DPTR,A
DPTR,#4001H
; cho.n
A,#0FDH
@DPTR,A
DELAY_25

MOV
MOV
MOVX
MOV
MOV
MOVX
ACALL

A,42H
DPTR,#4000H
@DPTR,A
DPTR,#4001H
A,#0FBH
@DPTR,A
DELAY_25

MOV
MOV
MOVX
MOV
MOV
MOVX
ACALL
POP
POP
RET

A,43H
DPTR,#4000H
@DPTR,A
DPTR,#4001H
A,#0F7H
@DPTR,A
DELAY_25
DPL
DPH

;
DELAY_25:
MOV
R1,#10
MOV
R0,#0
LOOP: DJNZ R0,LOOP
DJNZ R1,LOOP
RET
;
LED7SEG:
DB
0C0H,0F9H,0A4H,0B0H,99H,92H,82H,0F8H,80H,98H
DB
88H,0C6H,86H,8EH,82H,89H
END

quetled_8255_ram
Trang 49

Giao trnh VXL B

0H
MOV
MOV
MOVX
MOV
MOV
BEGIN:
MOV
MOVC
MOV
MOVX
MOV

GVGD : Nguyen Vien Quoc

ORG

DPTR,#4003H
A,#80H
@DPTR,A
P3,#0FFH
DPTR,#LED7SEG
A,#9
A,@A+DPTR
DPTR,#2000H
@DPTR,A
DPTR,#LED7SEG

MOV
A,#3
MOVC A,@A+DPTR
MOV
41H,A
MOV
A,#2
MOVC A,@A+DPTR
MOV
42H,A
MOV
A,#1
MOVC A,@A+DPTR
MOV
43H,A
LCALL DISPLAY
SJMP BEGIN
DISPLAY:
PUSH
PUSH
MOV
MOVX
MOV
MOVX
MOV
MOV
MOVX
ACALL
MOV
MOV
MOVX
MOV
MOV
MOVX
ACALL

DPH
DPL
DPTR,#2000H
A,@DPTR
DPTR,#4000H
@DPTR,A
DPTR,#4001H
A,#0FEH
@DPTR,A
DELAY_25

; chon LED o PB

A,41H
; xuat nd o nho 41h ra PA
DPTR,#4000H
@DPTR,A
DPTR,#4001H
; cho.n
A,#0FDH
@DPTR,A
DELAY_25

MOV
A,42H
MOV
DPTR,#4000H
MOVX @DPTR,A
MOV
DPTR,#4001H
Trang 50

Giao trnh VXL B

GVGD : Nguyen Vien Quoc

MOV
A,#0FBH
MOVX @DPTR,A
ACALL DELAY_25
MOV
MOV
MOVX
MOV
MOV
MOVX
ACALL
POP
POP
RET

A,43H
DPTR,#4000H
@DPTR,A
DPTR,#4001H
A,#0F7H
@DPTR,A
DELAY_25
DPL
DPH

;
DELAY_25:
MOV
R1,#10
MOV
R0,#0
LOOP: DJNZ R0,LOOP
DJNZ R1,LOOP
RET
;
LED7SEG:
DB
0C0H,0F9H,0A4H,0B0H,99H,92H,82H,0F8H,80H,98H
DB
88H,0C6H,86H,8EH,82H,89H
END

Led Blink

ORG
0
LOOP: SETB P2.0
ACALL DELAY
CLR
P2.0
ACALL DELAY
SJMP LOOP
DELAY: MOV
R6,#0FFh
LP2: MOV
R7,#0FFh
LP1: DJNZ R7,LP1
DJNZ R6,LP2
RET

Switch Led On
ORG
0
SETB P3.0
;P3.0: input
LOOP: JNB
P3.0,LOOP
LOOP1: JB
P3.0,LOOP1
CLR
P2.0
ACALL DELAY
SETB P2.0
SJMP LOOP
DELAY: MOV

R6,#0FFh
Trang 51

Giao trnh VXL B

LP2:
LP1:

GVGD : Nguyen Vien Quoc

MOV
R7,#0FFh
DJNZ R7,LP1
DJNZ R6,LP2
RET

6.SERIALPORT
Receive_Char_Send_To_P1
; Nha^.n ky' tu+. tu+` serial port, xua^'t ra P1
ORG
0
MOV
TMOD,#20H ;timer1, mode 2 (auto reload)
MOV
TH1,#-6 ;4800 baud
MOV
SCON,#50H ;8-bit, REN enabled
SETB TR1
;cho phe'p timer 1 cha.y
HERE: JNB
RI,HERE ;cho+` thu xong (cho+` RI=1)
MOV
A,SBUF ;ddo.c du+~ lie^.u va`o A
MOV
P1,A
;xua^'t ra port 1
CLR
RI
;xo'a RI dde^? chua^?n bi. nha^.n byte tie^'p theo
SJMP HERE

Transmit

; pha't ki' tu+. 'A' lie^n tu.c

; XTAL 11.0592MHz
MOV
TMOD,#20H
; timer 1, mode 2
MOV
TH1,#-6
; 4800 baud rate
MOV
SCON,#50H
; 8-bit UART, REN enable
SETB TR1
; cho phe'p Timer 1 cha.y
AGAIN: MOV
SBUF,#'A'
; pha't ky' tu+. 'A'
HERE: JNB
TI,HERE
; cho+` pha't xong
CLR
TI
; xo'a TI
SJMP AGAIN
; tie^'p tu.c pha't
Transmit_B
; xua^'t ki' tu+. 'B' lie^n tu.c
ORG
0
MOV
A,PCON
;A=PCON
SETB ACC.7
;
MOV
PCON,A
;SMOD=1
MOV
TMOD,#20H
;Timer 1, mode 2,auto reload
MOV
TH1,-3
;baud rate 19200
MOV
SCON,#50H
;8-bit data, RI enabled
SETB TR1
;cho phe'p Timer 1 cha.y
MOV
A,#'B'
;luu+ ma~ ASCII cu?A 'B' va`o ACC
A_1: CLR
TI
;xo'a TI
MOV
SBUF,A
;pha't
H_1: JNB
TI H_1
;cho+` pha't xong
SJMP A_1
;tie^'p tu.c pha't

Transmit_String_Receive_Char

; Pha't chuo^~i "We are ready!"

; Sau ddo' nha^.n ki' tu+. tu+` serial port, xua^'t no' ra P1
ORG 0
MOV P2,#0FFH
;P2: input port
Trang 52

Giao trnh VXL B

GVGD : Nguyen Vien Quoc

MOV TMOD,#20H
;timer 1,mode 2(auto-reload)
MOV TH1,#0FAH
;4800 baud rate
MOV SCON,#50H
;8-bit, REN enabled
SETB TR1
;cho phe'p timer 1 cha.y
MOV DPTR,#MYDATA ;na.p ddi.a chi? chuo^~i va`o DPTR
H_1:
CLR A
MOVC A,@A+DPTR
;ddo.c 1 ki' tu+.
JZ
B_1
;nha?y ne^'u la` ki' tu+. NULL (0)
ACALL SEND
;ne^'u kho^ng, go.i CT con SEND
INC DPTR
;ta(ng con tro? DPTR
SJMP H_1
B_1:

MOV A,P2
ACALL SEND
ACALL RECV
MOV P1,A
SJMP B_1

;ddo.c du+~ lie^.u o+? P2

;xua^'t ki' tu+. ddo' ra port nt
;nha^.n du+~ lie^.u tu+` port nt
;xua^'t ra P1
;

;CTC pha't data. ACC chu+'a data ca^`n pha't.

SEND: MOV SBUF,A
;na.p data va`o SBUF dde^? pha't
H_2:
JNB TI,H_2
;cho+` pha't xong
CLR TI
;xo'a TI
RET
;
;CTC nha^.n data tu+` port nt.
RECV: JNB RI,RECV
;cho+` thu xong
MOV A,SBUF
;ca^'t data va`o ACC
CLR RI
;xo'a RI
RET
;
;
MYDATA: DB
'We Are Ready!',0
END

transmit_YES

ORG
0h
MOV
TMOD,#20H
;timer 1, mode 2
MOV
TH1,#-3
;9600 baud
MOV
SCON,#50H
;8-bit, REN enabled
SETB TR1
;cho phe'p Timer 1 cha.y
AGAIN: MOV
A,#'Y'
;pha't 'Y'
ACALL TRANS
MOV
A,#'E'
;pha't 'E'
ACALL TRANS
MOV
A,#'S'
;pha't 'S'
ACALL TRANS
SJMP AGAIN
;CTC pha't du+~ lie^.u
TRANS: MOV
SBUF,A
;na.p data va`o SBUF
HERE: JNB
TI,HERE
;cho+` pha't xong
CLR
TI
;xo'a TI
RET
Trang 53

Giao trnh VXL B

GVGD : Nguyen Vien Quoc

4.Timer
Counter

; DDe^'m xung ngoa`i tu+` ngo~ T1 (P3.5)

MOV
TMOD,#01100000B
; counter 1,mode 2,C/T=1
; xung ngoa`i
MOV
TH1,#0
; xo'a TH1
SETB P3.5
; T1: input
AGAIN: SETB TR1
; cho phe'p dde^'m
BACK: MOV
A,TL1
; ddo.c tri. dde^'m o+? TL1
MOV
P2,A
; xua^'t ra port 2
JNB
TF1,Back
; dde^'m cho dde^'n khi TF=0
CLR
TR1
; du+`ng counter 1
CLR
TF1
; xo'a co+` TF
SJMP AGAIN

Delay

; Delay da`i (Timer tra`n nhie^`u la^`n)

MOV
TMOD,#10H
; Timer 1,mode 1(16-bit)
MOV
R3,#200
; bie^'n dde^'m so^' la^`n tra`n
AGAIN: MOV
TL1,#08
; TL1=08,low byte
MOV
TH1,#01
; TH1=01,Hi byte
SETB TR1
; cho phe'p Timer 1 cha.y
BACK: JNB
TF1,BACK
; cho+` Timer 1 tra`n
CLR
TR1
; du+`ng timer 1
CLR
TF1
; xo'a TF1
DJNZ R3,AGAIN
; tie^'p tu.c ne^'u R3 chu+a = 0
;
END

Pulse
; pha't xung o+? P1.5
ORG
0
MOV
TMOD,#01
; Timer 0,mode 1(16-bit mode)
HERE: MOV
TL0,#0F2H
; TL0=F2H, low byte
MOV
TH0,#0FFH
; TH0=FFH, high byte
CPL
P1.5
; dda?o bit P1.5
ACALL DELAY
SJMP HERE
;
; delay using timer 0
DELAY: SETB TR0
; cho phe'p Timer 0 cha.y
AGAIN: JNB
TF0,AGAIN
; cho+` Timer 0 tra`n
CLR
TR0
; du+`ng Timer 0
CLR
TF0
; xo'a TF0
RET

Pulse1

; pha't xung ta.i P1.5 du`ng Timer 1, mode 1

ORG
0
MOV
TMOD,#10H
; timer 1, mode 1(16-bit)
AGAIN: MOV
TL1,#34H
; TL1=34H,low byte
MOV
TH1,#76H
; TH1=76H,Hi byte
; (tri. dde^'m = 7634H)
SETB TR1
; cho phe'p timer 1 cha.y
Trang 54

Giao trnh VXL B

GVGD : Nguyen Vien Quoc

BACK: JNB
TF1,BACK
; cho+` Timer 1 tra`n
CLR
TR1
; ddu+`ng timer 1
CPL
P1.5
; dda?o bit P1.5
CLR
TF1
; xo'a TF1
SJMP AGAIN
;

Pulse2

; pha't xung ta.i P1.5

MOV TMOD,#10H
;timer 1, mode 1(16-bit)
AGAIN: MOV TL1,#1AH
;TL1=1A,low byte
MOV TH1,#0FFH
;TH1=FF,Hi byte
SETB TR1
;cho phe'p Timer 1 cha.y
BACK:
JNB TF1,BACK
;cho+` Timer 1 tra`n
CLR TR1
;du+`ng Timer 1
CPL P1.5
;dda?o bit P1.5
CLR TF1
;xo'a TF1
SJMP AGAIN
;

Pulse3
; pha't xung ta.i P2.3
ORG
0
MOV
TMOD,#10H
;timer 1, mode 1 (16-bit)
AGAIN: MOV
TL1,#00
;TL1=00, low byte
MOV
TH1,#0DCH
;TH1=DC, hi byte
SETB TR1
;cho phe'p Timer 1 cha.y
BACK: JNB
TF1,BACK
;cho+` tra`n
CLR
TR1
;du+`ng Timer 1
CPL
P2.3
;dda?o bit P2.3
CLR
TF1
;xo'a TF1
SJMP AGAIN
;

Pulse4

ORG
0
MOV

TMOD,#2H
; Timer 0,mode 2
; (8-bit,auto reload)
MOV
TH0,#-150
; TH0=6AH = bu`2 cu?a -150
AGAIN: SETB P1.3
; P1.3=1
ACALL DELAY
ACALL DELAY
CLR
P1.3
; P1.3=0
ACALL DELAY
SJMP AGAIN
DELAY: SETB TR0
; cho phe'p Timer 0 cha.y
BACK: JNB
TF0,BACK
; cho+` TF0 tra`n
CLR
TR0
; du+`ng Timer0
CLR
TF0
; xo'a TF0
RET

Pulse5
; pha't xung o+? P1.0
ORG
0
MOV
TMOD,#2H
;Timer 0,mode 2
;(8-bit,auto reload)
Trang 55

Giao trnh VXL B

GVGD : Nguyen Vien Quoc

MOV
TH0,#0
;TH0=0
AGAIN: MOV
R5,#250
;dde^'m so^' la^`n tra`n (250 la^`n)
ACALL DELAY
CPL
P1.0
SJMP AGAIN
DELAY: SETB TR0
;cho phe'p Timer0 cha.y
BACK: JNB
TF0,BACK
;cho+` tra`n
CLR
TR0
;du+`ng timer 0
CLR
TF0
;xo'a TF0
DJNZ R5,DELAY
RET

Trang 56