JULY 2007

VOLUME 15

NUMBER 7

ITCOB4

(ISSN 1063-8210)

REGULAR PAPERS

Low-Power Design
A Novel Charge Recycling Design Scheme Based on Adiabatic Charge Pump . ..... K.-M. Keung, Manne, and A. Tyagi
Variations-Aware Low-Power Design and Block Clustering With Voltage Scaling ...... ......... ........ ......... ......... ..
.. ........ ......... ......... ........ ......... ......... ........ ......... ...... N. Azizi, M. M. Khellah, V. K. De, and F. N. Najm
Supply Switching With Ground Collapse: Simultaneous Control of Subthreshold and Gate Leakage Current in
Nanometer-Scale CMOS Circuits ...... ......... ........ . ........ ......... ...... Y. Shin, S. Heo, H.-O. Kim, and J. Y. Choi
Testing
A Multilayer Data Copy Test Data Compression Scheme for Reducing Shifting-in Power for Multiple Scan Design ... ..
.. ........ ......... ......... ........ ......... ......... . S.-P. Lin, C.-L. Lee, J.-E. Chen, J.-J. Chen, K.-L. Luo, and W.-C. Wu
A BIST TPG for Low Power Dissipation and High Fault Coverage ...... ........ ......... ......... ........ ......... . S. Wang
Diagnosing At-Speed Scan BIST Circuits Using a Low Speed and Low Memory Tester ........ ........ ......... ......... ..
.. ........ ......... ......... ........ ......... ......... ........ ..... Y. Nakamura, T. Clouqueur, K. K. Saluja, and H. Fujiwara
Turbo/ReedSolomon Decoders
SIMD Processor-Based Turbo Decoder Supporting Multiple Third-Generation Wireless Standards .... ......... ......... ..
.. ........ ......... ......... ........ ......... ......... ........ ......... ......... ........ ......... ....... M.-C. Shin and I.-C. Park
Further Exploring the Strength of Prediction in the Factorization of Soft-Decision ReedSolomon Decoding . ......... ..
.. ........ ......... ......... ........ ......... ......... ........ ......... ......... ........ ......... ......... ........ ......... X. Zhang
Physical Design
Utilizing Reverse Short-Channel Effect for Optimal Subthreshold Circuit Design ....... ......... ........ ......... ......... ..
.. ........ ......... ......... ........ ......... ......... ........ ......... ......... ... T.-H. Kim, J. Keane, H. Eom, and C. H. Kim
Microarchitecture Configurations and Floorplanning Co-Optimization .. . .. C. Long, L. J. Simonson, W. Liao, and L. He

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TRANSACTIONS BRIEFS

Concurrent Error Detection in ReedSolomon Encoders and Decoders .. ........ ......... ......... ........ ......... ......... ..
.. ........ ......... ......... ........ ......... ......... ........ ......... .. G. C. Cardarilli, S. Pontarelli, M. Re, and A. Salsano
A Low-Power Multiplier With the Spurious Power Suppression Technique ..... ....... ... ....... K.-H. Chen and Y.-S. Chu

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Call for PapersSpecial Section on Application-Specific Processors ... ........ ......... ......... ........ ......... ......... .
ISCAS 2008 ...... ......... ........ ......... ......... ........ ......... ......... ........ ......... ......... ........ ......... ......... .

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