SPRS039C ÷ FEBRUARY 1996 ÷ REVÌSED DECEMBER 1999 17 POST OFFÌCE BOX 1443 HOUSTON, TEXAS 77251÷1443 functionaI bIock diagram of the '54x internaI hardware M P A T Register A(40) B(40) MuItipIier (17 17) FractionaI MUX 0 Adder(40) ZERO ROUND SAT System ControI Interface Program Address Generation Logic (PAGEN) Data Address Generation Logic (DAGEN) PC, IPTR, RC, BRC, RSA, REA ARAU0, ARAU1, AR0-AR7 ARP, BK, DP, SP Memory And ExternaI Interface PeripheraIs (SeriaI Ports, HPI, etc.) PAB PB CAB CB DAB DB EAB EB Sign Ctr Sign Ctr MUX EXP Encoder Sign Ctr Sign Ctr Sign Ctr MUX ALU(40) BarreI Shifter MUX COMP TRN TC MSW/LSW SeIect C A B D S B A S D A B C T C D A D T B U A A B X D A B A AccumuIator A B AccumuIator B C CB Data Bus D DB Data Bus E EB Data Bus M MAC Unit P PB Program Bus S BarreI Shifter T T Register U ALU Legend: E