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Module 1
Introduction
Version 2 EE IIT, Kharagpur 1
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Lesson 1
Version 2 EE IIT, Kharagpur 2
Pre-Requisite
Digital Electronics, Microprocessors
Introduction
In the day-to-day life we come across a wide variety of consumer electronic products. We are habituated to use them easily and flawlessly to our advantage. Common examples are TV Remote Controllers, Mobile Phones, FAX machines, Xerox machines etc. However, we seldom ponder over the technology behind each of them. Each of these devices does have one or more programmable devices waiting to interact with the environment as effectively as possible. These are a class of embedded systems and they provide service in real time. i.e. we need not have to wait too long for the action. Let us see how an embedded system is characterized and how complex it could be? Take example of a mobile telephone: (Fig. 1.1)
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When we want to purchase any of them what do we look for? Let us see what are the choices available? Phone Price Phone 1 Rs 5000/Weight / Size 88.1 x 47.6 x 23.6 mm 116 g Screen TFT1 65k Color 96x32 screen Games Camera Yes 4 x Zoom Radio Ring tones Memory No Polyphonic
Phone 2 Rs 6000/-
89 x 49 x 24.8 mm 123 g
Phone 3 Rs 5000/-
Stauntman2 & Monopoly3 included more downloadable TFT J2ME 65k Games: Color Stauntman 176x220 and screen Monopoly More downloadable 176 x Symbian and 208 Java pixel download backlit games or screen packaged on with MMC cards 4096 colors
No
No
Besides the above tabulated facts about the mobile handset, being a student of technology you may also like to know the following Network type GSM2 or CDMA3 (Bandwidth),
it c Battery: Type and ampere hour . Talk-time per one charge, Standby time w w w
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3.4 MB user memory built in.
Short for thin film transistor, a type of LCD flat-panel display screen, in which each pixel is controlled by from one to four transistors. The TFT technology provides better resolution of all the flat-panel techniques, but it is also the most expensive. TFT screens are sometimes called active-matrix LCDs.
short form of Global System for Mobile Communications, one of the leading digital cellular systems. GSM uses narrowband Time Division Multiple Access (TDMA), which allows eight simultaneous calls on the same radio frequency. GSM was first introduced in 1991. As of the end of 1997, GSM service was available in more than 100 countries and has become the de facto standard in Europe and Asia.
Short form of Code-Division Multiple Access, a digital cellular technology that uses spread-spectrum techniques. Unlike competing systems, such as GSM, that use TDMA, CDMA does not assign a specific frequency to each user. Instead, every channel uses the full available spectrum. Individual conversations are encoded with a pseudo-random digital sequence. CDMA is a military technology first used during World War II by the English allies to foil German attempts at jamming transmissions. The allies decided to transmit over several frequencies, instead of one, making it difficult for the Germans to pick up the complete signal.
From the above specifications it is clear that a mobile phone is a very complex device which houses a number of miniature gadgets functioning coherently on a single device. Moreover each of these embedded gadgets such as digital camera or an FM radio along with the telephone has a number of operating modes such as: you may like to adjust the zoom of the digital camera, you may like to reduce the screen brightness, you may like to change the ring tone, you may like to relay a specific song from your favorite FM station to your friend using your mobile You may like to use it as a calculator, address book, emailing device etc.
m o This flexible device sitting at the heart of the circuits is none tother .c than a Customized Microprocessor better known as an Embedded Processor and the o mobile phone housing a number of functionalities is known as an Embedded System. sp g o Since it satisfies the requirement of a number of users at the l same time (you and your friend, b you and the radio station, you and the telephone network etc) it is working within a time. acceptable p constraint, i.e. it has to satisfy everyone with the minimum delay. We call this as to u work in Real Time. This is unlike your holidaying o attitude when you take the clock on your r stride. g s twait long for taking our words and relaying them as We can also say that it does not make us n e well as receiving them, unlike an email server, which might take days to receive/deliver your d message when the network is congested u or slow. t s y Thus we can name the mobile t i telephone as a Real Time Embedded System (RTES) c . w Definitions w wtake some definitions Now we are ready to
These variations in the functionality can only be achieved by a very flexible device.
Real Time
Real-time usually means time as prescribed by external sources For example the time struck by clock (however fast or late it might be). The timings generated by your requirements. You may like to call someone at mid-night and send him a picture. This external timing requirements imposed by the user is the real-time for the embedded system.
Embedded (Embodiment)
Embodied phenomena are those that by their very nature occur in real time and real space In other words, A number of systems coexist to discharge a specific function in real time Thus A Real Time Embedded System (RTES) is precisely the union of subsystems to discharge a specific task coherently. Hence forth we call them as RTES. RTES as a generic term may mean a wide variety of systems in the real world. However we will be concerned about them which use programmable devices such as microprocessors or microcontrollers and have specific functions. We shall characterize them as follows.
m o Here single-functioned means specific functions. The RTES is c meant for very . usually t specific functions. Generally a special purpose microprocessor executes a program over and o over again for a specific purpose. If the user wants to change the functionality, e.g. changing the p mobile phone from conversation to camera mode or calculator s mode the program gets flushed g function. These operations are out and a new program is loaded which carries out the requisite o l monitored and controlled by an operating system called asb Real Time Operating System (RTOS) . which has much simpler complexity but more rigid constraints p etc. as compared to the conventional operating systems such as Micro Soft Windows and Unix u o r g Tightly Constrained s t n e The constraints on the design and marketability of RTES are more rigid than their non-reald time non-embedded counter parts. Time-domain constraints are the first thing that is taken care u t while developing such a system. Size, s weight, power consumption and cost are the other major y factors. it c .Time Reactive and Real w w wsystems must continually react to changes in the systems environment and Many embedded
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must compute certain results in real time without delay. For example, a cars cruise controller continually monitors and reacts to speed and brake sensors. It must compute acceleration or deceleration amounts repeatedly within a limited time; a delayed computation could result in a failure to maintain control of the car. In contrast a desktop computer system typically focuses on computations, with relatively infrequent (from the computers perspective) reactions to input devices. In addition, a delay in those computations, while perhaps inconvenient to the computer user, typically does not result in a system failure.
Very few in India will be interested to buy a mobile phone if it costs Rs50,000/- even if it provides you a faster processor with 200MB of memory to store your address, your favorite mp3 music and plays them , acts as a smallscreen TV whenever you desire, takes your call intelligently However in USA majority can afford it !!!!!!
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System
Subsystems
Components
g o = key interface bl . p standards = uses open u o r Fig. 1.2 The System Interface g and Architecture s trepresent interface standards. When a system is The red and grey spheres in Fig.1.2 n esingle subsystem. Subsequently subsystems are added assembled it starts with some chassis or a d onto it to make it a complete system. u t s Let us take the example of a Desktop Computer. Though not an Embedded System it can ty i c give us a nice example of assembling a system from its subsystems. . w a desktop computer (Fig.1.3) starting with the chassis and then You can start assembling w take the SMPS (switched w mode power supply), motherboard, followed by hard disk drive,
= interfaces CDROM drive, Graphic Cards, Ethernet Cards etc. Each of these subsystems consists of several components e.g. Application Specific Integrated Circuits (ASICs), microprocessors, Analog as well as Digital VLSI circuits, Miniature Motor and its control electronics, Multilevel Power supply units crystal clock generators, Surface mounted capacitors and resistors etc. In the end you close the chassis and connect Keyboard, Mouse, Speakers, Visual Display Units, Ethernet Cable, Microphone, Camera etc fitting them into certain well-defined sockets.
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As we can see that each of the subsystems inside or outside the Desktop has cables fitting well into the slots meant for them. These cables and slots are uniform for almost any Desktop you choose to assemble. The connection of one subsystem into the other and vice-versa is known as Interfacing. It is so easy to assemble because they are all standardized. Therefore, standardization of the interfaces is most essential for the universal applicability of the system and its compatibility with other systems. There can be open standards which makes it exchange Version 2 EE IIT, Kharagpur 9
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information with products from other companies. It may have certain key standards, which is only meant for the specific company which manufactures them.
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t i c A Desktop Computer will . have more open standards than an Embedded System. This is because of the level of integration w in the later. Many of the components of the embedded systems w chip. This concept is known as System on Chip (SOC) design. Thus are integrated on to a single w there are only few subsystems left to be connected.
Analyzing the assembling process of a Desktop let us comparatively assess the possible subsystems of the typical RTES. One such segregation is shown in Fig.1.4. The explanation of various parts as follows: User Interface: for interacting with users. May consists of keyboard, touch pad etc ASIC: Application Specific Integrated Circuit: for specific functions like motor control, data modulation etc. Microcontroller(C): A family of microprocessors
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Real Time Operating System (RTOS): contains all the software for the system control and user interface Controller Process: The overall control algorithm for the external process. It also provides timing and control for the various units inside the embedded system. Digital Signal Processor (DSP) a typical family of microprocessors DSP assembly code: code for DSP stored in program memory Dual Ported Memory: Data Memory accessible by two processors at the same time CODEC: Compressor/Decompressor of the data User Interface Process: The part of the RTOS that runs the software for User Interface activities Controller Process: The part of the RTOS that runs the software for Timing and Control amongst the various units of the embedded system
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The above architecture represents a hypothetical Embedded System (we will see more realistic ones in subsequent examples). More than one microprocessor (2 DSPs and 1 C) are employed here to carry out different tasks. As we will learn later, the C is generally meant for simpler and slower jobs such as carrying out a Proportional Integral (PI) control action or interpreting the user commands etc. The DSP is a more heavy duty processor capable of doing real time signal processing and control. Both the DSPs along with their operating systems and codes are independent of each other. They share the same memory without interfering with each other. This kind of memory is known as dual ported memory or two-way post-box memory. The Real Time Operating System (RTOS) controls the timing requirement of all the devices. It executes the over all control algorithm of the process while diverting more complex tasks to the DSPs. It also specifically controls the C for the necessary user interactivity. The ASICs are specialized Version 2 EE IIT, Kharagpur 11
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units capable of specialized functions such as motor control, voice encoding, modulation/demodulation (MODEM) action etc. They can be digital, analog or mixed signal VLSI circuits. CODECs are generally used for interfacing low power serial Analog-to-Digital Converters (ADCs). The analog signals from the controlled process can be monitored through an ADC interfaced through this CODEC.
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(c) (d)
Ceiling Fans: These are not programmable. & (e) obey all definitions of Embedded Systems such as (i) Working in Real Time (ii) Programmable (iii) A number of systems coexist on a single platform to discharge one function(single functioned) Television Set: Only a small part of it is programmable. It can work without being programmable. It is not tightly constrained. Desktop Keyboard: Though it has a processor normally it is not programmable.
o r g s t is called a real-time operation if the combined An operation within a larger dynamic system n reaction- and operation-time of a task operating on current events or input, is no longer than the e maximum delay allowed, in view of circumstances outside the operation. The task must also d u occur before the system to be controlled becomes unstable. A real-time operation is not t s necessarily fast, as slow systems allow slow real-time operations. This applies for all types tycan i of dynamically changing systems. The polar opposite of a real-time operation is a batch job with .csomewhere in between the two extremes. interactive timesharing falling w w is said to be hard real-time if the correctness of an operation depends Alternately, a system w correctness of the operation but also upon the time at which it is not only upon the logical
performed. An operation performed after the deadline is, by definition, incorrect, and usually has no value. In a soft real-time system the value of an operation declines steadily after the deadline expires.
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Embedded System
An embedded system is a special-purpose system in which the computer is completely encapsulated by the device it controls. Unlike a general-purpose computer, such as a personal computer, an embedded system performs pre-defined tasks, usually with very specific requirements. Since the system is dedicated to a specific task, design engineers can optimize it, reducing the size and cost of the product. Embedded systems are often mass-produced, so the cost savings may be multiplied by millions of items. Version 2 EE IIT, Kharagpur 13
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Handheld computers or PDAs are generally considered embedded devices because of the nature of their hardware design, even though they are more expandable in software terms. This line of definition continues to blur as devices expand. Q.2 Write five advantages and five disadvantages of embodiment. Ans: Five advantages: 1. 2. 3. 4. 5. Five disadvantages 1. 2. 3. 4. 5.
Smaller Size Smaller Weight Lower Power Consumption Lower Electromagnetic Interference Lower Price
Lower Mean Time Between Failure Repair and Maintenance is not possible Faster Obsolesce Unmanageable Heat Loss Difficult to Design
o r g s Many embedded systems must continually t react to changes in the systems environment and n must compute certain results in real time delay. For example, a cars cruise controller ewithout d continually monitors and reacts to speed and brake sensors. It must compute acceleration or u a limited time; a delayed computation could result in a t deceleration amounts repeatedly within s In contrast a desktop computer system typically focuses on failure to maintain control of they car. t computations, with relatively iinfrequent (from the computers perspective) reactions to input .c devices. In addition, a delay those computations, while perhaps inconvenient to the computer w in user, typically does not result in a system failure. w w Q4. Give at least five examples of embedded systems you are using/watching in your day to day
Ans: life. (i) Mobile Telephone (ii)Digital Camera (iii) A programmable calculator (iv) An iPod digital blood pressure machine (v) A
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iPod: The iPod is a brand of portable media players designed and marketed by Apple Computer. Devices in the iPod family are designed around a central scroll wheel (except for the iPod shuffle) and provide a simple user interface. The full-sized model stores media on a built-in hard drive, while the smaller iPod use flash memory. Like many digital audio players, iPods can serve as external data storage devices when connected to a computer.
Q5. Write the model number and detailed specification of your/friends mobile telephone. Manufacturer Model: Network Types: EGSM/ GSM /CDMA Form Factor: The industry standard that defines the physical, external dimensions of a particular device. The size, configuration, and other specifications used to describe hardware. Battery Life Talk (hrs): Battery Life Standby (hrs): Battery Type: Measurements Weight: Dimensions: Display Display Type: Colour or Black & White Display Size (px): Display Colours: General Options Camera: Mega Pixel: Email Client: Games: Yes High Speed Data: MP3 Player: PC Sync: Yes Phonebook: Platform Series Polyphonic Ring tones: Predictive Text: Streaming Multimedia: Text Messages: Wireless Internet: Opera Other Options Alarm: Bluetooth: Calculator: Calendar: Data Capable: EMS: FM Radio: Graphics (Custom): Infrared: Speaker Phone: USB: Vibrate:
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Module 1
Introduction
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Lesson 2
Version 2 EE IIT, Kharagpur 2
Pre-Requisite
Digital Electronics, Microprocessors
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u o r g s cameras, camcorders, DVD players, portable t Consumer electronics cell phones, pagers, digital n assistants etc. video games, calculators, and personal digital e d u t s ty i .c w w w Fig. 2.1(a) Digital Camera
Some of the common examples of Embedded Systems are given below:
m o Fig. 2.1(c) Personal Digital Assistants .c t o p s g lo b . thermostats, home security systems, Home appliances microwave ovens, answering machines. p u washing machines. and lighting systems etc. o r g s t n e d u t 2.1(d) Microwave Oven Fig. s ty i .c w w w
Fig. 2.1(e) Washer and Dryers
business equipment electronic cash registers, curbside check-in, alarm systems, card readers product scanners, and automated teller machines
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automobiles Electronic Control Unit(ECU) which includes transmission control, cruise control, fuel injection, antilock brakes, and active suspension in the same or separate modules.
Mobile Phone
Let us take the same mobile phone as discussed in Lesson 1 as example for illustrating the typical architecture of RTES.
o r g components: In general, a cell phone is composed of the following s t n A Circuit board (Fig. 2.2) e d Antenna u t s Microphone y t Speaker ci . Liquid crystal display w (LCD) w Keyboard w
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Fig. 2.3 The block diagram A typical mobile phone handset (Fig. 2.3) should include standard I/O devices (keyboard, LCD), plus a microphone, speaker and antenna for wireless communication. The Digital Signal Processor (DSP) performs the signal processing, and the micro-controller controls the user interface, battery management, call setup etc. The performance specification of the DSP is very crucial since the conversion has to take place in real time. This is why almost all cell phones contain such a special processor dedicated for making digital-to-analog (DA) and analog-todigital(AD) conversions and real time processing such as modulation and demodulation etc. The Read Only Memory (ROM) and flash memory (Electrically Erasable and Programmable Memory) chips provide storage for the phones operating system(RTOS) and various data such as phone numbers, calendars information, games etc. Version 2 EE IIT, Kharagpur 7
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1. Microprocessor
This is the heart of any RTES. The microprocessors used here are different from the general purpose microprocessors like Pentium Sun SPARC etc. They are designed to meet some specific requirements. For example Intel 8048 is a special purpose microprocessor which you will find in the Keyboards of your Desktop computer. It is used to scan the keystrokes and send them in a synchronous manner to your PC. Similarly mobile phones Digital Cameras use special purpose processors for voice and image processing. A washer and dryer may use some other type of processor for Real Time Control and Instrumentation.
2. Memory
o p s Circuit Board(PCB) or same The microprocessor and memory must co-exit on the same Power g chip. Compactness, speed and low power consumption areo the characteristics required for the l memory to be used in an RTES. Therefore, very low power semiconductor memories are used in b . almost all such devices. For housing the operating system Read Only Memory(ROM) is used. pduration. The program or data loaded might exist for considerable It is like changing the setup of u o your Desktop Computer. Similar user defined setups exist in RTES. For example you may like to r g change the ring tone of your mobile and keep it for some time. You may like to change the s be capable of retaining the information even t screen color etc. In these cases the memory should n the memory should be non-volatile and should be after the power is removed. In other words e easily programmable too. It is achievedd by using Flash memories. u t s 3. Input Output Devices ty and Interfaces i c .necessary Input/Output interfaces are to make the RTES interact with the external world. They w could be Visual Display Units such as TFT screens in a mobile phone, touch pad key board, w antenna, microphones, speakers etc. These RTES should also have open interfaces to other w devices such as Desktop Computers, Local Area Networks (LAN) and other RTES. For example
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you may like to download your address book into your personal digital assistant (PDA). Or you may like to download some mp3 songs from your favorite internet site into your mp3 player. These input/output devices along with standard software protocols in the RTOS provide the necessary interface to these standards.
A memory technology similar in characteristics to EPROM(Erasable Programmable Read Only Memory) memory, with the exception that erasing is performed electrically instead of via ultraviolet light, and, depending upon the organization of the flash memory device, erasing may be accomplished in blocks (typically 64k bytes at a time) instead of the entire device.
4. Software
The RTES is the just the physical body as long as it is not programmed. It is like the human body without life. Whenever you switch on your mobile telephone you might have marked some activities on the screen. Whenever you move from one city to the other you might have noticed the changes on your screen. Or when you are gone for a picnic away from your city you might have marked the no-signal sign. These activities are taken care of by the Real Time Operating System sitting on the non-volatile memory of the RTES. Besides the above an RTES may have various other components and Application Specific Integrated Circuits (ASIC) for specialized functions such as motor control, modulation, demodulation, CODEC. The design of a Real Time Embedded System has a number of constraints. The following section discusses these issues.
Design Issues
o p The constraints in the embedded systems design are imposed s by external as well as internal g specifications. Design metrics are introduced to measure the cost function taking into account lo the technical as well as economic considerations. b . p Design Metrics u o r A Design Metric is a measurable feature g of the systems performance, cost, time for sare conflicting requirements i.e. optimizing one t implementation and safety etc. Most of these n processor may have a lousy performance as far as shall not optimize the other: e.g. a cheaper e d speed and throughput is concerned. u t s Following metrics are generally taken ty into account while designing embedded systems i .c engineering cost) NRE cost (nonrecurring w w It is one-time cost of designing the system. Once the system is designed, any number of units can w be manufactured without incurring any additional design cost; hence the term nonrecurring.
Suppose three technologies are available for use in a particular product. Assume that implementing the product using technology A would result in an NRE cost of $2,000 and unit cost of $100, that technology B would have an NRE cost of $30,000 and unit cost of $30, and that technology C would have an NRE cost of $100,000 and unit cost of $2. Ignoring all other design metrics, like time-to-market, the best technology choice will depend on the number of units we plan to produce.
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Unit cost
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Size
The physical space required by the system, often measured in bytes for software, and gates or transistors for hardware.
Performance
The execution time of the system
Power Consumption
It is the amount of power consumed by the system, which may determine the lifetime of a battery, or the cooling requirements of the IC, since more power means more heat.
Flexibility
The ability to change the functionality of the system without incurring heavy NRE cost. Software is typically considered very flexible.
Time-to-prototype
. p The time needed to build a working version of the u system, which may be bigger or more expensive than the final system implementation,o but it can be used to verify the systems r functionality. usefulness and correctness and to refine the systems g s t n Time-to-market e d u t to the point that it can be released and sold to customers. The time required to develop a system s The main contributors are design time, manufacturing time, and testing time. This metric has y t i become especially demanding in recent years. Introducing an embedded system to the c marketplace early can make.a big difference in the systems profitability. w w Maintainability w
It is the ability to modify the system after its initial release, especially by designers who did not originally design the system.
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Correctness
This is the measure of the confidence that we have implemented the systems functionality correctly. We can check the functionality throughout the process of designing the system, and we can insert test circuitry to check that manufacturing was correct.
Throughput
This is the number of tasks that can be processed per unit time. For example, a camera may be able to process 4 images per second These are the some of the cost measures for developing an RTES. Optimization of the overall cost of design includes each of these factors taken with some multiplying factors depending on their importance. And the importance of each of these factors depends on the type of application. For instance in defense related applications while designing an anti-ballistic system the execution time is the deciding factor. On the other hand, for de-noising a photograph in an embedded camera in your mobile handset the execution time may be little relaxed if it can bring down the cost and complexity of the embedded Digital Signal Processor.
g o The design flow of an RTES involves several steps. The cost performance is tuned and fineblisand . tuned in a recursive manner. An overall design methodology enumerated below. p u o Design Methodology (Fig. 2.4) r g s t System Requirement and Specifications n Define the problem e d What your embedded system is required to do? u control) t Define the requirements (inputs, outputs, s What are the inputs and outputs of your system? y t i Write down the specifications for them .c or analogue form. Specify the voltage levels, frequency etc. Specify if the signals are in digital w The design task can be further w segregated into the following steps w System level Design
Find out the possible subsystems of the system and the interconnections between them.
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Node level design Processor Level Specifications Processor level design Task Specifications
. p Output u to task level design o r Task level g design s t n e Fig. 2.4 The design approach d u t Conclusion s y t i systems has been encompassing more and more diverse The scope of embedded c . disciplines of technology day by day. Obsolescence of technology occurs at a much faster w pace as compared to the same in other areas. The development of Ultra-Low-Power VLSI w mixed signalw technology is the prime factor in the miniaturization and enhancement of the performance of the existing systems. More and more systems are tending to be
compact and portable with the RTES technology. The future course of embedded systems depends on the advancements of sensor technology, mechatronics and battery technology. The design of these RTES by and large is application specific. The time-gap between the conception of the design problem and marketing has been the key factor for the industry. Most of the cases for very specific applications the system needs to be developed using the available processors rather than going for a custom design.
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Questions
Q1. Give one example of a typical embedded system other than listed in this lecture. Draw the block diagram and discuss the function of the various blocks. What type of embedded processor they use? Ans:
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For details please http://www.gpsworld.com/ A GPS receiver receives signals from a constellation of at least four out of a total of 24 satellites. Based on the timing and other information signals sent by these satellites the digital signal processor calculates the position using triangulation.
The major block diagram is divided into (1) Active Antenna System (2)RF/IF front end (3) The Digital Signal Processor(DSP) The Active Antenna System houses the antenna a band pass filter and a low noise amplifier (LNA) The RF/IF front end houses another band pass filter, the RF amplifier and the demodulator and A/D converter. The DSP accepts the digital data and decodes the signal to retrieve the information sent by the GPS satellites. Q2. Discuss about the Hard Disk Drive housed in your PC. Is it an RTES?
Ans:
Hard drives have two kinds of components: internal and external. External components are located on a printed circuit board called logic board while internal components are located in a sealed chamber called HDA or Hard Drive Assembly. For details browse http://www.hardwaresecrets.com/article/177/3
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The big circuit is the controller. It is in charge of everything: exchanging data between the hard drive and the computer, controlling the motors on the hard drive, commanding the heads to read or write data, etc. All these tasks are carried out as demanded by the processor sitting on the motherboard. It can be verified to be single-functioned, tightly constrained, Therefore one can say that a Hard Disk Drive is an RTES.
Q3. Elaborate on the time-to-market design metric. Ans: The time required to develop a system to the point that it can be released and sold to customers. The main contributors are design time, manufacturing time, and testing time. This metric has become especially demanding in recent years. Introducing an embedded system to the marketplace early can make a big difference in the systems profitability. Q4. What is Moores Law? How was it conceived? Moore's law is the empirical observation that the complexity of integrated circuits, with respect to minimum component cost, doubles every 24 months. It is attributed to Gordon E. Moor, a cofounder of Intel.
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Module 1
Introduction
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Lesson 3
Version 2 EE IIT, Kharagpur 2
Pre-Requisite
Digital Electronics, Microprocessors
Introduction
The various components of an Embedded System can be hierarchically grouped as System Level Components to Transistor Level Components. A system (subsystem) component is different than what is considered a "standard" electronic component. Standard components are the familiar active devices such as integrated circuits, microprocessors, memory, diodes, transistors, etc. along with passives such as resistors, capacitors, and inductors. These are the basic elements needed to mount on a circuit board for a customized, application-specific design.
o r ghas active and passive components mounted on A system component on the other hand, s t task. (Fig. 3.1) System components can be either circuit boards that are configured for a specific n e as highly integrated building blocks of a system. A single- or multi-function modules that serve d system component can be as simpleu as a digital I/O board or as complex as a computer with t video, memory, networking, and I/O all a single board. System components support industry s on y standards and are available from multiple sources worldwide. t i .c w w w
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System
Subsystems (PCBs)
Processor Level Components (Integrated Circuits) (Microprocessors, Memory, I/O devices etc)
Gate Level Components Generally inside the Integrated Circuits rarely outside
The typical structure of an embedded system is shown in Fig. 3.2. This can be compared with that of a Desktop Computer as shown in Fig. 3.3. Normally in an embedded system the primary memory, central processing unit and many peripheral components including analog-todigital converters are housed on a single chip. These single chips are called as Microcontrollers. This is shown by dotted lines in Fig. 3.2.
t s y computer may contain all these units on a single Power On the other hand a desktop t i Circuit Board (PCB) called c the Mother Board. Since these computers handle much larger . as to dimension of data as compared the embedded systems there has to be elaborate arrangements w for storage and faster data between the CPU and memory, CPU and input/output devices w transfer and memory and input/output devices. The storage is accomplished by cheaper secondary w memories like Hard Disks and CDROM drives. The data transfer process is improved by
incorporating multi-level cache and direct memory access methods. Generally no such arrangements are necessary for embedded systems. Because of the number of heterogeneous components in a desktop computer the power supply is required at multiple voltage-levels (typically 12, 5, 3, 25 volts). On the other hand an Embedded Systems chip may just need one level DC power supply (typically +5V). In a desktop computer various units operate at different speeds. Even the units inside a typical CPU such as Pentium-IV may operate at different speeds. The timing and control units are complex and provide multi-phase clock signal to the CPU and other peripherals at different voltage levels. The timing and control unit for an Embedded system may be much simpler.
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Primary Memory
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Keyboard, Hard Disk Drive, Network Card, Video Display Units Fig. 3.3 The structural layout of a desktop Computer
Typical Example
A Single Board Computer (SBC)
Power Supply
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Since you are familiar with Desktop Computers, we should see how to make a desktop PC on a single power circuit board. They will be called Single Board Computers or SBC. These SBCs are typical embedded systems custom-made generally for Industrial Applications. In the introductory lectures you should have done some exercises on your PC. Now try to compare with this SBC with your desktop. Let us look at an example of a single board computer from EBC-C3PLUS SBC from Winsystems1.
Let us discuss and try to understand the features of the above single board Embedded computer. This will pave the way of our understanding more complex System-On-Chip (SOC) type of systems.
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The various unit and their specifications are as follows VIA 733MHz or 1 GHz low power C3 processor EBX-compliant board (Fig. 3.5) This is the processor on this SBC. VIA represents the company which manufactures the processor (www.via.com.tw), 733MHz or 1GHz is the clock frequency of this processor. C3 is
Courtesy WinSystems, Inc. 715 Stadium Drive, Arlington Texas 76011 http://sbc.winsystems.com/products/sbcs/ebcc3plus.html
the brand name as P3 and P4 for Intel. (You must be familiar with Intel processors as your PC has one)
o p 32 to 512MB of system PC133 SDRAM supported in a 168-pin DIMM s socket g 32 to 512 MB tells the possible Random Access Memory size o on the SBC. SDRAM stands for l Synchronous Dynamic RAM. We will learn more about bthis in the memory chapter. 168-pin . DIMM stands for Dual-In-Line Memory-Modules which holds p the memory chips and can fit into u the board easily. o r DIMMs Look like this g s t n e d u t s y t i .c w Fig. 3.6 DIMM w w Socket for up to 1Giga Byte bootable DiskOnChip or 512KB SRAM or 1MB EPROM
These are Static RAMs (SRAM) or EPROM which houses the operating system just like the Hard Disk in a Desktop computer Type I and II Compact Flash (CF) cards supported It is otherwise known as semiconductor hard-disk or floppy disk. Flash memory is an advanced form of Electrically Erasable and Programmable Read Only Memory (EEPROM). Type I and Type II are just two different designs Type II being more compact and is a recent version.
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Fig. 3.7 Flash Memory PC-compatible supports Linux, Windows CE.NET and XP, plus other x86-compatible RTOS This indicates the different types of operating systems supported on this SBC platform. High resolution video controller supports: Color panels supported with up to 36-bits/pixel Supports resolutions up to 1920 x 1440 This is the video quality supported by the on-board video chips Simultaneous CRT and LCD operation: 4X AGP local bus for high speed operation: LVDS supported
m o CRT is for cathode ray terminal, LCD for Liquid Crystal Display terminal c . t AGP means Accelerated Graphic Port o p 4X represents the speed of the graphic port s g Accelerated Graphics Port: An extremely fast expansion-sloto and bus (64 bit) designed for highl performance graphics cards b . p low power, low amplitude method for LVDS Low Voltage Differential Signaling, a low noise, u high-speed (gigabits per second) data transmission o over copper wire on the Power Circuit r Boards. g s t Dual 10/100 Mbps Intel PCI Ethernet controllers n The networking interface e d 4 RS-232 serial ports with FIFO, COM1 u & COM2 with RS-422/485 support t s First in First Out, The serial interface FIFO stands y for t i are the serial communication standards which you will study in RS-232/RS-422/RS-485: These c . due course. COM1 and COM2 stands for the same RS232 port. (your desktop has COM ports) w Bi-directional LPT port wsupports EPP/ECP LPT stands for Linew Printer Terminal: EPP/ECP stands for Enhanced Parallel Port and Extended
Capabilities Port 48 bi-directional TTL digital I/O lines with 24 pins capable of event sense interrupt generation These are extra digital Input/Output lines. 24 lines are capable of sensing interrupts. Four USB ports onboard USB Universal Serial Bus, an external bus standard that supports data transfer rates of 12 Mbps. A single USB port can be used to connect up to 127 peripheral devices, such as mouse, modems, and keyboards.
Two, dual Ultra DMA 33/66/100 EIDE connectors Ultra DMA DMA stands for Direct Memory Access. It is a mode to transfer a bulk of data from the memory to hard-drive and vice-versa EIDE Short for Enhanced Integrated Drive Electronics (IDE), a newer version of the IDE mass storage device interface. It supports higher data rates about three to four times faster than the old IDE standard. In addition, it can support mass storage devices of up to 8.4 gigabytes, whereas the old standard was limited to 528 MB. The numbers 33/66/100 indicates bit rates in Mbps Floppy disk controller supports 1 or 2 drives AC97 Audio-Codec 97 Audio Codec '97 (AC'97) is the specification for, 20-bit audio architecture used in many desktop PCs. The specification was developed in the old Intel Architecture Labs in 1997 to provide system developers with a standardized specification for integrated PC audio devices. AC'97 defined a high-quality audio architecture for the PC and is capable of delivering up to 96kHz/20bit playback in stereo and 48kHz/20-bit in multi-channel playback modes
g o PC104 gets its name from the popular desktop personal computers initially designed by IBM bl the cards . called the PC, and from the number of pins used to connect together (104). PC104 p cards are much smaller than ISA-bus cards found in PC's u and stack together which eliminates the need for a motherboard, backplane, and/or card cage o r AT keyboard controller and PS/2 mouse supportg s t An 84-key keyboard introduced with the PC n/AT. It was later replaced with the 101-key e Enhanced Keyboard. d Three, 16-bit counter/timers, Real Time Clock, u Two interrupt controllers and 7 DMA channels, t Test s Watch Dog Timer and Power on Self y tchannels, i The interrupt controllers, DMA counter/timers and Real Time Clock are used for real .c time applications. w Specifications w w +5 volt only operation
PC/104 and PC/104-Plus expansion connectors Mechanical Dimensions: 5.75" x 8.0" (146mm x 203mm) Jumpers: 0.025" square posts Connectors Serial, Parallel, Keyboard: 50-pin on 0.100" grid COM3 & 4: 20-pin on 0.100" grid Floppy Disk Interface: 34-pin on 0.100" grid EIDE Interface: 40-pin on 0.100" grid (Primary) 44-pin on 2mm grid (Primary) 40-pin on 0.100" grid (Secondary) 50-pin 2mm Flash connector Parallel I/O: Two, 50-pin on 0.100" grid Version 2 EE IIT, Kharagpur 9
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CRT: 14-pin on 2-mm. grid FP-100 Panel: Two, 50-pin on 2-mm. grid LVDS 20-pin on 0.100" grid Ethernet: Two RJ-45 PC/104 bus: 64-pin 0.100" socket, 40-pin 0.100" socket PC/104-Plus 120-pin (4 x 30; 2mm) stackthrough with shrouded header USB Four, 4-pin 0.100 Audio Three, 3.5mm stereo phone jacks Power: 9-pin in-line Molex Environmental Operating Temperature: -40 to +85C (733MHz) -40 to +60C (1GHz) Non-condensing relative humidity: 5% to 95%
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Conclusion
It is apparent from the above example that a typical embedded system consist of by and large the following units housed on a single board or chip. Version 2 EE IIT, Kharagpur 10
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1. 2. 3. 4. 5. 6. 7.
Processor Memory Input/Output interface chips I/O Devices including Sensors and Actuators A-D and D-A converters Software as operating system Application Software
One or more of the above units can be housed on a single PCB or single chip In a typical Embedded Systems the Microprocessor, a large part of the memory and major I/O devices are housed on a single chip called a microcontroller. Being custom-made the embedded systems are required to function for specific purposes with little user programmability. The user interaction is converted into a series of commands which is executed by the RTOS by calling various subroutines. RTOS is stored in a flash memory or read-only-memory. There will be additional scratch-pad memory for temporary data storage. If the CPU sits on the same chip as memory then a part of the memory can be used for scratch-pad purposes. Otherwise a number of CPU registers will be required for the same. CPU communicates with the memory through the address and data bus. The timing and control of these data exchange takes place by the control unit of the CPU via the control lines. The memory which is housed on the same chip as the CPU has the fastest transfer rate. This is also known as the memory band-width or bit rate. The memory outside the processor chip is slower and hence has a lesser transfer rate. On the other hand Input/Output devices have a varied degree of bandwidth. These varying degrees of data transfer rates are handled in different ways by the processor. The slower devices need interface chips. Generally chips which are faster than the microprocessor are not used. Architecture of a typical embedded-system is shown in Fig. 3.8. The hardware unit consists of the above units along with a digital as well as an analog subsystem. The software in the form of a RTOS resides in the memory.
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Question Answers
Q1. What are the Hierarchical components in a embedded system design. Ans: System
Subsystems (PCBs)
Processor Level Components (Integrated Circuits) (Microprocessors, Memory, I/O devices etc)
Gate Level Components Generally inside the Integrated Circuits rarely outside The Hierarchical Components Q.2. What is LVDS? Ans:
t s Known as Low Voltage Differential Signaling. The advantages of such a standard is low noise ty can i and low interference such that one increase the data transmission rate. Instead of 0 and 5 V c . or 5V a voltage level of 1.5 or 3.3 V is used for High and 0 or 1 V is used for Low. The Low to w High voltage swing reduces interference. A differential mode rejects common mode noises. w w Q.3. Is there any actuator in your mobile phone?
Ans: There is a vibrator in a mobile phone which can be activated to indicate an incoming call or message. Generally there is a coreless motor which is operated by the microcontroller for generating the vibration.
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Module 1
Introduction
Version 2 EE IIT, Kharagpur 1
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Lesson 4
Version 2 EE IIT, Kharagpur 2
Pre-Requisite
Digital Electronics, Microprocessors
You are now almost familiar with the various components of an embedded system. In this chapter we shall discuss some of the general components such as Processors Memory Input/Out Devices
Processors
The central processing unit is the most important component in an embedded system. It exists in an integrated manner along with memory and other peripherals. Depending on the type of applications the processors are broadly classified into 3 major categories 1. General Purpose Microprocessors 2. Microcontrollers 3. Digital Signal Processors For more specific applications customized processors can also be designed. Unless the demand is high the design and manufacturing cost of such processors will be high. Therefore, in most of the applications the design is carried out using already available processors in the market. However, the Field Programmable Gate Arrays (FPGA) can be used to implement simple customized processors easily. An FPGA is a type of logic chip that can be programmed. They support thousands of gates which can be connected and disconnected like an EPROM (Erasable Programmable Read Only Memory). They are especially popular for prototyping integrated circuit designs. Once the design is set, hardwired chips are produced for faster performance.
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generally cheap because of the manufacturing of large number of units. The NRE (Non-recurring Engineering Cost: Lesson I) is spread over a large number of units. Being cheaper the manufacturer can invest more for improving the VLSI design with advanced optimized architectural features. Thus the performance, size and power consumption can be improved. Most cases, for such processors the design tools are provided by the manufacturer. Also the supporting hardware is cheap and easily available. However, only a part of the processor capability may be needed for a specific design and hence the over all embedded system will not be as optimized as it should have been as far as the space, power and reliability is concerned. Processor
Control unit
Datapath ALU
Control /Status
Controller
PC
IR
Fig. 4.1 The architecture of a General Purpose Processor Pentium IV is such a general purpose processor with most advanced architectural features. Compared to its overall performance the cost is also low. A general purpose processor consists of a data path, a control unit tightly linked with the memory. (Fig. 4.1)
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I/O
Memory
The Data Path consists of a circuitry for transforming data and storing temporary data. It contains an arithmetic-logic-unit(ALU) capable of transforming data through operations such as addition, subtraction, logical AND, logical OR, inverting, shifting etc. The data-path also contains registers capable of storing temporary data generated out of ALU or related operations. The internal data-bus carries data within the data path while the external data bus carries data to and from the data memory. The size of the data path indicates the bit-size of the CPU. An 8-bit data path means an 8-bit CPU such as 8085 etc. The Control Unit consists of circuitry for retrieving program instructions and for moving data to, from, and through the data-path according to those instructions. It has a program counter(PC) to hold the address of the next program instruction to fetch and an Instruction register(IR) to hold Version 2 EE IIT, Kharagpur 4
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the fetched instruction. It also has a timing unit in the form of state registers and control logic. The controller sequences through the states and generates the control signals necessary to read instructions into the IR and control the flow of data in the data path. Generally the address size is specified by the control unit as it is responsible to communicate with the memory. For each instruction the controller typically sequences through several stages, such as fetching the instruction from memory, decoding it, fetching the operands, executing the instruction in the data path and storing the results. Each stage takes few clock cycles.
Microcontroller
Just as you put all the major components of a Desktop PC on to a Single Board Computer (SBC) if you put all the major components of a Single Board Computer on to a single chip it will be called as a Microcontroller. Because of the limitations in the VLSI design most of the input/output functions exist in a simplified manner. Typical architecture of such a microprocessor is shown in Fig. 4.2.
Address Bus
Interrupt Controller
IRAM
Peripheral Bus
A D
MDU
Port0/Port2 WDU
Fig. 4.2 The architecture of a typical microcontroller named as C500 from Infineon Technology, Germany *The double-lined blocks are core to the processor. Other blocks are on-chip The various units of the processors (Fig. 4.2) are as follows: The C500 Core contains the CPU which consists of the Instruction Decoder, Arithmetic Logic Unit (ALU) and Program Control section The housekeeper unit generates internal signals for controlling the functions of the individual internal units within the microcontroller. Port 0 and Port 2 are required for accessing external code and data memory and for emulation purposes. Version 2 EE IIT, Kharagpur 5
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Data Bus
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XRAM
ROM
Control
Access Control
The external control block handles the external control signals and the clock generation. The access control unit is responsible for the selection of the on-chip memory resources. The IRAM provides the internal RAM which includes the general purpose registers. The XRAM is another additional internal RAM sometimes provided The interrupt requests from the peripheral units are handled by an Interrupt Controller Unit. Serial interfaces, timers, capture/compare units, A/D converters, watchdog units (WDU), or a multiply/divide unit (MDU) are typical examples for on-chip peripheral units. The external signals of these peripheral units are available at multifunctional parallel I/O ports or at dedicated pins.
Processing Unit
Result/Operands
Status
Opcode
Control w w Unit
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Data Memory
Instructions Address
Program Memory
Fig. 4.3 The modified Harvard architecture The MACD type of instructions can be executed faster by parallel implementation. This is possible by separately accessing the program and data memory in parallel. This can be accomplished by the modified architecture shown in Fig. 4.3. These DSP units generally use Multiple Access and Multi Ported Memory units. Multiple access memory allows more than one access in one clock period. The Multi-ported Memory allows multiple addresses as well Data ports. This also increases the number of access per unit clock cycle.
Address Bus 1
Data Bus 1
Address Bus 2
Data Bus 2
Fig. 4.4 Dual Ported Memory The Very Long Instruction Word (VLIW) architecture is also suitable for Signal Processing applications. This has got a number of functional units and data paths as seen in Fig. 4.5. The long instruction words are fetched from the memory. The operands and the operation to be performed by the various units are specified in the instruction itself. The multiple functional units share a common multi-ported register file for fetching the operands and storing the results. Parallel random access to the register file is possible through the read/write cross bar. Execution in the functional units is carried out concurrently with the load/store operation of data between RAM and the register file.
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Microprocessors vs Microcontrollers
A microprocessor is a general-purpose digital computers central processing unit. To make a complete microcomputer, you add memory (ROM and RAM) memory decoders, an oscillator, and a number of I/O devices. The prime use of a microprocessor is to read data, perform extensive calculations on that data, and store the results in a mass storage device or display the results. These processors have complex architectures with multiple stages of pipelining and parallel processing. The memory is divided into stages such as multi-level cache and RAM. The development time of General Purpose Microprocessors is high because of a very complex VLSI design. Version 2 EE IIT, Kharagpur 7
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ROM
EEPROM
RAM
Microprocessor
Serial I/O
A/D
Analog I/O
D/A
Fig. 4.6 A Microprocessor based System The design of the microcontroller is driven by the desire to make it as expandable and flexible as possible. Microcontrollers usually have on chip RAM and ROM (or EPROM) in addition to on chip i/o hardware to minimize chip count in single chip solutions. As a result of using on chip hardware for I/O and RAM and ROM they usually have pretty low performance CPU. Microcontrollers also often have timers that generate interrupts and can thus be used with the CPU and on chip A/D D/A or parallel ports to get regularly timed I/O. The prime use of a microcontroller is to control the operations of a machine using a fixed program that is stored in ROM and does not change over the lifetime of the system. The microcontroller is concerned with getting data from and to its own pins; the architecture and instruction set are optimized to handle data in bit and byte size.
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Parallel I/O
Timer
PWM
ROM
EEPROM
RAM
Analog in
A/D
Timer
Microcontroller
The contrast between a microcontroller and a microprocessor is best exemplified by the fact that most microprocessors have many operation codes (opcodes) for moving data from external memory to the CPU; microcontrollers may have one or two. Microprocessors may have one or two types of bit-handling instructions; microcontrollers will have many. A basic Microprocessors vs a basic DSP
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Program Memory
Fig. 4.8 The memory organization in a DSP DSP Characterization 1. Microprocessors specialized for signal processing applications 2. Harvard architecture 3. Two to Four memory accesses per cycle 4. Dedicated hardware performs all key arithmetic operations in 1 cycle Version 2 EE IIT, Kharagpur 9
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5. Very limited SIMD(Single Instruction Multiple Data) features and Specialized, complex instructions 6. Multiple operations per instruction 7. Dedicated address generation units 8. Specialized addressing [ Auto-increment Modulo (circular) Bit-reversed ] 9. Hardware looping. 10. Interrupts disabled during certain operations 11. Limited or no register Shadowing 12. Rarely have dynamic features 13. Relatively narrow range of DSP oriented on-chip peripherals and I/O interfaces 14. synchronous serial port Processor Memory
Fig. 4.9 Memory Organization in General Purpose Processor Characterization of General Purpose Processor 1. 2. 3. 4. 5. 6. 7. 8. 9.
. p CPUs for PCs and workstations E.g., Intel Pentium u IV o r Von Neumann architecture g s Typically 1 access per cycle t n Most operations take more than 1 e cycle d only one operation per instruction General-purpose instructions Typically u t s Often, no separate address generation units y t i General-purpose addressing .c modes w Software loops only w Interrupts rarely w disabled
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10. Register shadowing common 11. Dynamic caches are common 12. Wide range of on-chip and off-chip peripherals and I/O interfaces 13. Asynchronous serial port...
Memory
Memory serves processor short and long-term information storage requirements while registers serve the processors short-term storage requirements. Both the program and the data are stored in the memory. This is known as Princeton Architecture where the data and program occupy the same memory. In Harvard Architecture the program and the data occupy separate Version 2 EE IIT, Kharagpur 10
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memory blocks. The former leads to simpler architecture. The later needs two separate connections and hence the data and program can be made parallel leading to parallel processing. The general purpose processors have the Princeton Architecture. The memory may be Read-Only-Memory or Random Access Memory (RAM). It may exist on the same chip with the processor itself or may exist outside the chip. The on-chip memory is faster than the off-chip memory. To reduce the access (read-write) time a local copy of a portion of memory can be kept in a small but fast memory called the cache memory. The memory also can be categorized as Dynamic or Static. Dynamic memory dissipate less power and hence can be compact and cheaper. But the access time of these memories are slower than their Static counter parts. In Dynamic RAMs (or DRAM) the data is retained by periodic refreshing operation. While in the Static Memory (SRAM) the data is retained continuously. SRAMs are much faster than DRAMs but consume more power. The intermediate cache memory is an SRAM. In a typical processor when the CPU needs data, it first looks in its own data registers. If the data isn't there, the CPU looks to see if it's in the nearby Level 1 cache. If that fails, it's off to the Level 2 cache. If it's nowhere in cache, the CPU looks in main memory. Not there? The CPU gets it from disk. All the while, the clock is ticking, and the CPU is sitting there waiting.
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b . p users through some inbuilt hardware. Typical RTES interact with the environment and u Occasionally external circuits are required for communicating with user, other computers or a o r network. g s t the input output devices are, keyboard, the display In the mobile handset discussed earlier n e LED indicators etc. The signal to these units may screen, the antenna, the microphone, speaker, d be analog or digital in nature. To generate an analog signal from the microprocessor we need an u t Digital to Analog Converter(DAC) to accept analog signal we need and Analog to Digital s and y Converter (ADC). These DAC and ADC again have certain control modes. They may also t i operate at different speed than To synchronize and control these interface c the microprocessor. .interface chips we may need another chip. Similarly we may have interface chips for keyboard, w screen and antenna. These serve as relaying units to transfer data between the processor w chips and input/output devices. The input/output devices are generally slower than the processor. w Therefore, the processor may have to wait till they respond to any request for data transfer.
Number of idle clock cycles may be wasted for doing so. However, the input-output interface chips carry out this task without making the processor to wait or idle. Sensor Signal Conditioning and Amplification Amplification A-D Converter Processor Actuator D-A Converter Memory
Conclusion
Besides the above units some real time embedded systems may have specific circuits included on the same chip or circuit board. They are known as Application Specific Integrated Circuit (ASIC). Some examples are
m o c 2. CODECs (Compress and Decompress Units) t. o p It is generally used to process digital video and/or audio files. A s CODEC reduces the amount of g data to be transmitted by discarding redundant data on the transmitting end and reconstituting the o l signal on the receiving end. b . p u 3. Filters o r g by eliminating the out-band noise and other Filters are used to condition the incoming signal s t called Anti-aliasing filters, are used before the Aunnecessary signals. A specific class of filters n e a broad-band signal (signal with a very wide D converters to prevent aliasing while acquiring d frequency spectrum) u t s y t 4. Controllers ci . These are specific circuits for controlling, motors, actuators and light-intensities etc. w w w
Questions-Answers
Q1. Enumerate the similarities and differences between the Microcontroller and Digital Signal Processor Ans: Microcontrollers usually have on chip RAM and ROM (or EPROM) in addition to on chip i/o hardware to minimize chip count in single chip solutions. As a result of using on chip hardware for I/O and RAM and ROM they usually have pretty low performance CPU. Microcontrollers also often have timers that generate interrupts and can thus be used with the CPU and on chip A/D D/A or parallel ports to get regularly timed I/O. The prime use of a microcontroller is to control the operations of a machine using a fixed program that is stored in ROM and does not change over the lifetime of the system. The microcontroller is concerned with getting data from and to its own pins; the architecture and instruction set are optimized to handle data in bit and byte size. Digital Signal Processors have been designed based on the modified Harvard Architecture to handle real time signals. The features of these processors are suitable for implementing signal processing algorithms. One of the common operations required in such applications is array multiplication. For example convolution and correlation require array multiplication. This is accomplished by multiplication followed by accumulation and addition. This is generally carried out by Multiplier and Accumulator (MAC) units. Some times it is known as MACD, where D stands for Data move. Generally all the instructions are executed in single cycle. These DSP units generally use Multiple Access and Multi Ported Memory units. Multiple access memory allows more than one access in one clock period. The Multiported Memory allows multiple addresses as well Data ports. This also increases the number of access per unit clock cycle. Q2. Name few chips in each of the family of processors such as: Microcontroller, Digital Signal Processor, General Purpose Processor
w w Microcontroller: Intel 8051, Intel 80196, Motorola 68705 w Digital Signal Processors: TI 3206711, TI 3205000
Ans: General Purpose Processor: Intel Pentium IV, Power PC Q3. Enlist the following in the increasing order of their access speed Flash Memory, Dynamic Memory, Cache Memory, CDROM, Hard Disk, Magnetic Tape, Processor Memory Ans: Magnetic Tape, CDROM, Hard Disk, Dynamic Memory, Flash Memory, Cache Memory, Processor Memory
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Q4. Draw the circuit of an anti-aliasing Filter using Operational amplifiers Ans:
m o Low Pass Sallen Key Butterworth Filter t.c o p Q5. Is it possible to implement an anti-aliasing filter in the digitals form? g lo Ans: b . p No it is not possible to implement an anti-aliasing filter in digital form. Because aliasing is an u error introduced at the sampling phase of analog to o converter. If the sampling frequency is r digital less than twice of the highest frequency presentg the higher signal frequencies fold back to lower sin the digital/discrete domain. frequency band and hence can be distinguished t n e Q6. Download any free emulator of some d simple microcontrollers such as 8051, 68705 etc and learn about it. u t s ty Home work i c . Q7. Draw the internal architecture w of 8051 and explain the functions of various units. See http://www.atmel.com/products/8051/ w w
Q8. State with justification if the following statements are right (or wrong) Cache memory can be a static RAM Dynamic RAMs occupy more space per word storage The full-form of SDRAM is static-dynamic RAM BIOS in your PC is not a Random Access Memory (RAM) Ans: Cache memory can be a static RAM right The cache memory need to have very fast access time which is possible with static RAM. Dynamic RAMs occupy more space per word storage wrong DRAMs are basically simple MOS based capacitors. Therefore occupy much lower space as compared to static RAMs. Version 2 EE IIT, Kharagpur 14
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The full-form of SDRAM is static-dynamic RAM wrong SDRAM is Synchronous Dynamic RAM. Covered in later chapters BIOS in your PC is not a Random Access Memory (RAM) Wrong The BIOS is a CMOS based memory which can be accessed uniformly. Q9. Explain the function of the following units in a general purpose processor Instruction Register Program Counter Instruction Queue Control Unit Ans: Instruction Register: A register inside the CPU which holds the instruction code temporarily before sending it to the decoding unit. Program Counter: It is a register inside the CPU which holds the address of the next instruction code in a program. It gets updated automatically by the address generation unit. Instruction Queue: A set of memory locations inside the CPU to hold the instructions in a pipeline before rending them to the next instruction decoding unit. Control Unit: This is responsible in generating timing and control signals for various operations inside the CPU. It is very closely associated with the instruction decoding unit.
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Lesson 5
Memory-I
Version 2 EE IIT, Kharagpur 2
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Instructional Objectives
After going through this lesson the student would o Different kinds of Memory Processor Memory Primary Memory Memory Interfacing
Pre-Requisite
Digital Electronics, Microprocessors
5.1 Introduction
m o This chapter shall describe about the memory. Most of the modern computer .c system has been t designed on the basis of an architecture called Von-Neumann Architecture o p s g Input Central lo Memory Output b Processing . Devices Unitup o r g Fig. 5.1 The Von Neumann Architecture s t n as data. No one can distinguish an instruction and The Memory stores the instructions as well e data. The CPU has to be directed to thed address of the instruction codes. u t through the following lines The memory is connected to the CPU s 1. Address ty i .c 2. Data w 3. Control w w
1
http://en.wikipedia.org/wiki/John_von_Neumann. The so-called von Neumann architecture is a model for a computing machine that uses a single storage structure to hold both the set of instructions on how to perform the computation and the data required or generated by the computation. Such machines are also known as storedprogram computers. The separation of storage from the processing unit is implicit in this model. By treating the instructions in the same way as the data, a stored-program machine can easily change the instructions. In other words the machine is reprogrammable. One important motivation for such a facility was the need for a program to increment or otherwise modify the address portion of instructions. This became less important when index registers and indirect addressing became customary features of machine architecture.
Data Lines
CPU
Address Lines
Control Lines
Fig. 5.2 The Memory Interface
Memory
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. p In a memory read operation the CPU loads the onto the address bus. Most cases u address these lines are fed to a decoder which selects the proper memory location. The CPU then sends a o r is transferred to the processor via the data read control signal. The data is stored in that location g s lines. t In the memory write operation aftern the address is loaded the CPU sends the write control e signal followed by the data to the requested memory location. d u The memory can be classified t in various ways i.e. based on the location, power s consumption, way of data storage etc ty be classified as The memory at the basic level i can .c Array) 1. Processor Memory (Register w 2. Internal on-chip Memory w w 3. Primary Memory
4. Cache Memory 5. Secondary Memory
g o bl
Primary Memory
This is the one which sits just out side the CPU. It can also stay in the same chip as of CPU. These memories can be static or dynamic.
Cache Memory
This is situated in between the processor and the primary memory. This serves as a buffer to the immediate instructions or data which the processor anticipates. There can be more than one levels of cache memory.
Secondary Memory
o r Volatile Memory g s tis switched off. Semiconductor Random Access n The contents are erased when the power e Memories fall into this category. d u t Non-volatile Memory ys it c . of the power is switched off. Magnetic Memories (Hard Disks), The contents are intact even w Optical Disks (CDROMs), w Read Only Memories (ROM) fall under this category. w
These are generally treated as Input/Output devices. They are much cheaper mass storage and slower devices connected through some input/output interface circuits. They are generally magnetic or optical memories such as Hard Disk and CDROM devices. The memory can also be divided into Volatile and Non-volatile memory.
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CPU
Control Unit
ALU
Registers
Input
Output
g o Fig. 5.3 The Internal Registers bl . p u 5.2 Data Storage o r g An m word memory can store m x n: m wordss of n bits each. One word is located at one address t therefore to address m words we need. n e k = Log2(m) address input signals d or k number address lines can u address m = 2 words t s Example 4,096 x 8 memory: ty i 32,768 bits .c w input signals 12 address w 8w input/output data signals
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n bits per word Fig. 5.4 Data Array Version 2 EE IIT, Kharagpur 6
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Memory access
The memory location can be accessed by placing the address on the address lines. The control lines read/write selects read or write. Some memory devices are multi-port i.e. multiple accesses to different locations simultaneously memory external view
r/w
enable
A0 Ak-1
Qn-1
Memory Specifications
The specification of a typical memory is as follows The storage capacity: The number of bits/bytes or words it can store The memory access time (read access and write access): How long the memory takes to load the data on to its data lines after it has been addressed or how fast it can store the data upon supplied through its data lines. This reciprocal of the memory access time is known as Memory
Bandwidth
The Power Consumption and Voltage Levels: The power consumption is a major factor in embedded systems. The lesser is the power consumption the more is packing density. Size: Size is directly related to the power consumption and data storage capacity.
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Generation 1
Generation 3
Generation 4 Fig. 5.6 Four Generations of RAM chips There are two important specifications for the Memory as far as Real Time Embedded Systems are concerned. Write Ability Storage Performance
Write ability
Ranges of write ability High end processor writes to memory simply and quickly e.g., RAM Middle range processor writes to memory, but slower e.g., FLASH, EEPROM (Electrically Erasable and Programmable Read Only Memory) Lower range special equipment, programmer, must be used to write to memory e.g., EPROM, OTP ROM (One Time Programmable Read Only Memory) Low end bits stored only during fabrication e.g., Mask-programmed ROM
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In-system programmable memory Can be written to by a processor in the embedded system using the memory Memories in high end and middle range of write ability
Storage permanence
It is the ability to hold the stored bits. Range of storage permanence High end essentially never loses bits e.g., mask-programmed ROM Version 2 EE IIT, Kharagpur 8
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Middle range holds bits days, months, or years after memorys power source turned off e.g., NVRAM Lower range holds bits as long as power supplied to memory e.g., SRAM
Low end begins to lose bits almost immediately after written e.g., DRAM Nonvolatile memory Holds bits after power is no longer supplied High end and middle range of storage permanence
g o l not written to, by a processor in an This is a nonvolatile memory. It can only be read from but b . embedded system. Traditionally written to, programmed, before inserting to embedded system p Uses u o processor r Store software program for general-purpose g s program instructions can be t one or more ROM words n esystem by Store constant data needed d ucircuit Implement combinational t s y t External view i .c w 2 n ROM wenable w A
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Q0
The figure shows the structure of a ROM. Horizontal lines represents the words. The vertical lines give out data. These lines are connected only at circles. If address input is 010 the decoder sets 2nd word line to 1. The data lines Q3 and Q1 are set to 1 because there is a programmed Version 2 EE IIT, Kharagpur 9
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connection with word 2s line. The word 2 is not connected with data lines Q2 and Q0. Thus the output is 1010 Internal view 8 4 ROM
word 0 enable
38 decoder
A0 A1 A2
Q3 Q2 Q1 Q0
Fig. 5.8 The example of a ROM with decoder and data storage
u o Any combinational circuit of n functions of same r can be done with 2 x n ROM. The g kofvariables inputs of the combinatorial circuit are the address the ROM locations. The output is the word s t stored at that location. n e Truth table ud t 82 ROM s y it c . w w w
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Inputs (address) a b c 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1
Outputs y z 0 0 0 1 0 1 1 0 1 0 1 1 1 1 1 1
enable
c b a
0 0 0 1 1 1 1 1
0 1 1 0 0 1 1 1 z
word 0 word 1
word 7
Mask-programmed ROM
The connections programmed at fabrication. They are a set of masks. It can be written only once (in the factory). But it stores data for ever. Thus it has the highest storage permanence. The bits never change unless damaged. These are typically used for final design of high-volume systems. Version 2 EE IIT, Kharagpur 10
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0V floating
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EEPROM
EEPROM is otherwise known as Electrically Erasable and Programmable Read Only Memory. It is erased typically by using higher than normal voltage. It can program and erase individual words unlike the EPROMs where exposure to the UV light erases everything. It has Version 2 EE IIT, Kharagpur 11
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can be in-system programmable with built-in circuit to provide higher than normal voltage
built-in memory controller commonly used to hide details from memory user busy pin indicates to processor EEPROM still writing
can be erased and programmed tens of thousands of times Similar storage permanence to EPROM (about 10 years) Far more convenient than EPROMs, but more expensive
Flash Memory
It is an extension of EEPROM. It has the same floating gate principle and same write ability and storage permanence. It can be erased at a faster rate i.e. large blocks of memory erased at once, rather than one word at a time. The blocks are typically several thousand bytes large Writes to single words may be slower Entire block must be read, word updated, then entire block written back Used with embedded systems storing large data items in nonvolatile memory
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bits are not held without power supply Read and written to easily by embedded system during execution Internal structure more complex than ROM a word consists of several memory cells, each storing 1 bit each input and output data line connects to each cell in its column rd/wr connected to every cell when row is enabled by decoder, each cell has logic that stores input data bit when rd/wr indicates write or outputs stored bit when rd/wr indicates read
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SRAM
DRAM
Data' Data
Data W
Ram variations
PSRAM: Pseudo-static RAM
5.4
o r g nonvolatile ROM-based memory no limit on number of writes unlike s t SRAM with EEPROM or flashn stores complete RAM contents on EEPROM or flash e before power d u t s& 27C256 RAM/ROM devices Example: HM6264 y t i Low-cost low-capacity .c memory devices w8-bit microcontroller-based embedded systems Commonly used in w First two numeric digits indicate device type w RAM: 62
writes as fast as reads
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11-13, 15-19
27,26,2,23,21,
24,25, 3-10 22 20
device characteristics Read operation data addr OE /CS1 CS2 data addr WE
Write operation
/CS1
timing diagrams
5.5
o r g s t memory device Example: TC55V2325FF-100 n e d 2-megabit synchronous pipelined burst SRAM memory device u32-bit t Designed to be interfaced with processors s y Capable of fast sequential it reads and writes as well as single byte I/O c . w w w
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/WE /ADSP /OE /ADSC MODE /ADV /ADSP /ADSC /ADV CLK TC55V2325 FF-100 block diagram addr <150> /WE /OE /CS1 and /CS2 CS3 data<310>
e d Memory size needed often differs size of readily available memories u from t When available memory is larger, simply ignore unneeded high-order address bits and s y higher data lines it is smaller, compose several smaller memories into one larger c When available memory . memory w w to increase width of words Connect side-by-side w Connect top to bottom to increase number of words
added high-order address line selects smaller memory containing desired word
using a decoder Combine techniques to increase number and width of words
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5.7 Conclusion
In this chapter you have learnt about the following 1. Basic Memory types 2. Basic Memory Organization 3. Definitions of RAM, ROM and Cache Memory Version 2 EE IIT, Kharagpur 17
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4. Difference between Static and Dynamic RAM 5. Various Memory Control Signals 6. Memory Specifications 7. Basics of Memory Interfacing
5.8 Questions
Q1. Ans:
11-13, 15-19 2,23,21,24, 25, 3-10 22 27 20 26 data<70> addr<15...0> /OE /WE /CS1 CS2
Discuss the various control signals in a typical RAM device (say HM626)
HM6264
/OE: output enable bar: the output is enables when it is low. It is same as the read bar line /WE: write enable bar: the line has to made low while writing to this device CS1: chip select 1 bar: this line has to be made low along with CS2 bar to enable this chip Q2.
o r g s Download the datasheet of TC55V2325FF t chip and indicate the various signals. n e d u t s y t i .c w w w
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Lesson 6
Memory-II
Version 2 EE IIT, Kharagpur 2
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Instructional Objectives
After going through this lesson the student would Memory Hierarchy Cache Memory - Different types of Cache Mappings - Cache Impact on System Performance Dynamic Memory - Different types of Dynamic RAMs Memory Management Unit
Pre-Requisite
Digital Electronics, Microprocessors
Objective is to use inexpensive, fast memory Main memory Large, inexpensive, slow memory stores entire program and data Cache Small, expensive, fast memory stores copy of likely accessed parts of larger memory Can be multiple levels of cache
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Process
Registers Cache Main memory Disk Tape Fig. 6.1 The memory Hierarchy
6.2 Cache
Usually designed with SRAM faster but more expensive than DRAM Usually on same chip as processor space limited, so much smaller than off-chip main memory faster access (1 cycle vs. several cycles for main memory) Cache operation Request for main memory access (read or write) First, check cache for copy cache hit - copy is in cache, quick access cache miss - copy not in cache, read address and possibly its neighbors into cache Several cache design choices cache mapping, replacement policies, and write techniques
is necessary as there are far fewer number of available cache addresses than the memory Are address contents in cache? Cache mapping used to assign main memory address to cache address and determine hit or miss Three basic techniques: Direct mapping Fully associative mapping Set-associative mapping Caches partitioned into indivisible blocks or lines of adjacent memory addresses usually 4 or 8 addresses per line
Direct Mapping
Main memory address divided into 2 fields Index which contains - cache address - number of bits determined by cache size Tag - compared with tag stored in cache at address indicated by index - if tags match, check valid bit Valid bit indicates whether data in slot has been loaded from memory Offset used to find particular word in cache line
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Tag
Index
Offset
T D
Data
Valid =
Complete main memory address stored in each cache address All addresses stored in cache simultaneously compared with desired address Valid bit and offset same as direct mapping
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Set-Associative Mapping
Compromise between direct mapping and fully associative mapping Index same as in direct mapping But, each cache address contains content and tags of 2 or more memory address locations Tags of that set simultaneously compared as in fully associative mapping Cache with set size N called N-way set-associative 2-way, 4-way, 8-way are common
Tag
V T
Index
D V T
Offset
D
Data
Valid = =
6.5
it c . Cache Write Techniques w w When written, data cache must update main memory w Write-through