Acer 5940G LA-55119 NCQD0

A
Compal Confidential
2
NCQD0 M/B Schematics Document

Intel Arrandale/Clarksfield Processor with DDRIII + Ibex Peak-M
2009-08-10
REV:1.0
2009/08/10
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2010/08/10
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
http://laptop-motherboard-schematic.blogspot.com/
Date:
SCHEMATICS,MB A5511
Rev
C
401762
Tuesday, August 18, 2009
Sheet
E
of
60
Clock Generator
Compal Confidential
IDT: 9LRS3199AKLFT
SILEGO: SLG8SP587
Model Name : NCQD0

File Name : LA5511P
133/120/100/96/14.318MHZ to PCH
Fan Control
48MHZ to CardReader
page 43
page 12
100MHz
PEG(DIS)
ATI
M96/M92XT
PCI-E 2.0x16 5GT/s PER LANE
Memory BUS(DDRIII)
Intel
204pin DDRIII-SO-DIMM X2
Dual Channel
page 10,11
Auburndale / Clarksfield
BANK 0, 1, 2, 3
1.5V DDRIII 800/1066/1333
(UMA/DIS)
(DIS)
6.4G/8.5G/10.6G
133MHz
page
23,24,25,26,27,28,29
HDMI SW
& Level shift
HDMI Conn.
page 32
LVDS Conn.
CRT(DIS)
HDMI(DIS)
page 4,5,6,7,8,9
page 30
FDI x8
(UMA)
CRT SW.
CRT Conn.
page 31
LVDS SW
page 30
page 31
page 32
100MHz
2.7GT/s
1GB/s x4
LVDS(UMA)
Intel
Ibex Peak-M
HDMI(UMA)
page 33
1394
Conn.
5 in 1 socket
port 3
NEW CARD
page 36
Sub-board
LS-5511P
Switch/B
page 39
LS-5512P
MEADIA/B
page39
RTC CKT.
page 36
Power On/Off CKT.

page 40
LS-5513P
port 2,4
LAN(GbE)
WLAN, TV
BCM57780
page 33
DC/DC Interface CKT.

page 44,45
Power Circuit DC/DC
CMOS Camera
USB port 10
USB port 3
page 37
page 36
USBx14
3.3V 48MHz
HD Audio
3.3V 24MHz
ALC669X
page 41
page 13
LPC BUS
page 35
port 1
port 4
SATA HDD
Conn.
SATA ODD
Conn.
eSATA
Conn.
page 33
page 33
page 37
TPA6017
page 42
Braidwoood
page 22
LS-5014P
Phone Jack x 3
+SubWoofer
Int. Speaker
ENE KB926
page 41
page 42
page 38
Volumn/B
page 39
LS-5015P
USB/B
FP/B
page 37
page39
LS-5514P
Touch Pad
Int.KBD
page 39
page 39
EC I/O Buffer
Card Reader/B
BIOS ROM
page 39
page 39
PCH XDP
LS-5515P
TP BTN/B
CPU XDP
133MHz
page 21
page 39
page 5
LS-5516P
PWR SAVING/B
2009/08/10
Issued Date
Compal Secret Data
page 39
page 46~58
2010/08/10
Deciphered Date
Title
Size
B
Date:
Audio AMP
Daul CH NAND interface
33MHz
page 39
page 30
SPI
SPI ROM x2
page 34
Cap Sensor/B
page 33
Bluetooth
Conn
port 0
RJ45
LS-5011P
USB port 0,1

USB port 8 HS USB
USB Port 2 (eSATA)
HDA Codec
page 13,14,15,16,17
18,19,20,21
port 1
MINI Card x2
USB conn x2
SATA x 6 (GEN1 1.5GT/S ,GEN2 3GT/S) 100MHz
PCH
PCI-Express x 8 (ABD PCIE1 2.5GT/S CKD PCIE1/2 2.5/5GT/S) 100MHz
CardReader
JMB380
DMI x4
100MHz
CRT(UMA)
port 5
100M/133M/166M(CFD)
Processor
rPGA988A
LVDS(DIS)
SCHEMATICS,MB A5511
Document Number
Rev
C
401762
Sheet

E
of
60
Voltage Rails
SIGNAL
STATE
Power Plane
Description
S1
S3
S5
DGPU DGPU
(UMA) (DIS)
VIN
Adapter power supply (19V)
N/A
N/A
N/A
B+
AC or battery power rail for power circuit.
N/A
N/A
N/A
+CPU_CORE
Core voltage for CPU
ON
ON
OFF
+0.75VS
0.75V switched power rail for DDR terminator
ON
OFF
OFF
+1.05VS
1.05V switched power rail for PCH
ON
OFF
OFF
+1.1VS_VTT
1.1V switched power rail (1.05 for AUB CPU)
ON
OFF
OFF
+1.5V
1.5V power rail for DDRIII
ON
ON
OFF
+1.5VS
1.5V switched power rail
ON
OFF
OFF
+1.8VS
ON
OFF
OFF
+3VALW
3.3V always on power rail
ON
ON
ON*
+3V
3.3V power rail for PCH
ON
ON
ON
Vcc
Ra/Rc/Re
+3V_LAN
3.3V power rail for LAN
ON
ON
ON*
Board ID
+3VS
ON
OFF
OFF
+5VALW
5V always on power rail
ON
ON
ON*
+5VS
5V switched power rail
ON
OFF
OFF
+5V
5V power rail for PCH
ON
ON
ON
+VSB
VSB always on power rail
ON
ON
ON*
+RTCVCC
RTC power
ON
ON
ON
+5VSDGPU
5V power rail for GPU
OFF
ON
+1.5VSDGPU
1.5V power rail for VRAM
OFF
ON
0
1
2
3
4
5
6
7
+1.8VSDGPU
1.8V switched power rail for GPU
OFF
ON
IDSEL#
EC SM Bus1 address
Device
Address
Smart Battery
0001 011X b
REQ#/GNT#
HIGH
HIGH
ON
ON
ON
ON
HIGH
HIGH
HIGH
ON
ON
ON
LOW
S3 (Suspend to RAM)
LOW
LOW
HIGH
HIGH
ON
ON
OFF
OFF
S4 (Suspend to Disk)
LOW
LOW
LOW
HIGH
ON
OFF
OFF
OFF
S5 (Soft OFF)
LOW
LOW
LOW
LOW
ON
OFF
OFF
OFF
Board ID
* 0
1
2
3
4
5
6
7
DDR DIMM0
1001 000Xb
DDR DIMM2
1001 010Xb
ISL90727
ISL90728
0101 1100b
0111 1100b
V AD_BID min
0 V
0.216 V
0.436 V
0.712 V
1.036 V
1.453 V
1.935 V
2.500 V
V AD_BID typ
0 V
0.250 V
0.503 V
0.819 V
1.185 V
1.650 V
2.200 V
3.300 V
V AD_BID max
0 V
0.289 V
0.538 V
0.875 V
1.264 V
1.759 V
2.341 V
3.300 V
BTO Option Table

BTO Item
UMA
UMA Only
DIS Only
DGPU
Braidwood
M96
Broadway
PCB Revision
0.1
4 External
USB Port
USB Conn.
USB/B
USB 2.0 USB 1.1 Port
UHCI2
UHCI3
UHCI4
EHCI2
UHCI5
UHCI6
0
1
2
eSATA USB
3
4
5
6
CMOS Camera
Mini Card 1
Mini Card 2
7
8
9
10
11
12
13
2009/08/10
Issued Date
USB Conn.
Switchable
Graphics
BOM Config
Switchable Graphics (M96)SKU: UMA@/SG@/VGA@
UMA only SKU: UMA@/UMAO@
DIS ONLY (M96): DIS@/VGA@
Blue Tooth
Finger Print
NewCard
4
Deciphered Date

2010/08/10
Title
Size
B
Date:
SG@
Compal Secret Data
BOM Structure
UMA@
UMAO@
DIS@
VGA@
NV@
M96@
MAD@
USB Port Table
Ibex SM Bus address

1101 0010b
3.3V +/- 5%
100K +/- 5%
Rb / Rd / Rf
0
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
NC
BOARD ID Table
EHCI1
Clock Generator
(9LRS3199AKLFT, SLG8SP587)
UHCI1
Address
Clock
HIGH
UHCI0
Device
+VS
Board ID / SKU ID Table for AD channel
EC SM Bus2 address
Address
+V
LOW
Interrupts
Device
+VALW
HIGH
External PCI Devices

Device
SLP_S1# SLP_S3# SLP_S4# SLP_S5#
S1(Power On Suspend)
Full ON
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
SCHEMATICS,MB A5511
Document Number
Rev
C
401762
Sheet
E
of
60
JCPU1E
DMI_PTX_HRX_P0
DMI_PTX_HRX_P1
DMI_PTX_HRX_P2
DMI_PTX_HRX_P3
B24
D23
B23
A22
DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]
DMI_HTX_PRX_N0
DMI_HTX_PRX_N1
DMI_HTX_PRX_N2
DMI_HTX_PRX_N3
D24
G24
F23
H23
DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]
DMI_HTX_PRX_P0
DMI_HTX_PRX_P1
DMI_HTX_PRX_P2
DMI_HTX_PRX_P3
D25
F24
E23
G23
DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]
E22
D21
D19
D18
G21
E19
F21
G18
FDI_TX#[0]
FDI_TX#[1]
FDI_TX#[2]
FDI_TX#[3]
FDI_TX#[4]
FDI_TX#[5]
FDI_TX#[6]
FDI_TX#[7]
H_FDI_TXP0
H_FDI_TXP1
H_FDI_TXP2
H_FDI_TXP3
H_FDI_TXP4
H_FDI_TXP5
H_FDI_TXP6
H_FDI_TXP7
D22
C21
D20
C18
G22
E20
F20
G19
FDI_TX[0]
FDI_TX[1]
FDI_TX[2]
FDI_TX[3]
FDI_TX[4]
FDI_TX[5]
FDI_TX[6]
FDI_TX[7]
F17
E17
FDI_FSYNC[0]
FDI_FSYNC[1]
H_FDI_INT
C17
FDI_INT
15 H_FDI_LSYNC0
15 H_FDI_LSYNC1
F18
D17
FDI_LSYNC[0]
FDI_LSYNC[1]
15 H_FDI_FSYNC0
15 H_FDI_FSYNC1
15
Intel(R) FDI
H_FDI_TXN0
H_FDI_TXN1
H_FDI_TXN2
H_FDI_TXN3
H_FDI_TXN4
H_FDI_TXN5
H_FDI_TXN6
H_FDI_TXN7
PCI EXPRESS -- GRAPHICS
DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]
DMI
A24
C23
B22
A21
PEG_IRCOMP
R659
1
2 49.9_0402_1%
EXP_RBIAS
R669
1
2 750_0402_1%
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS
B26
A26
B27
A25
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
K35
J34
J33
G35
G32
F34
F31
D35
E33
C33
D32
B32
C31
B28
B30
A31
PEG_GTX_C_HRX_N0
PEG_GTX_C_HRX_N1
PEG_GTX_C_HRX_N2
PEG_GTX_C_HRX_N3
PEG_GTX_C_HRX_N4
PEG_GTX_C_HRX_N5
PEG_GTX_C_HRX_N6
PEG_GTX_C_HRX_N7
PEG_GTX_C_HRX_N8
PEG_GTX_C_HRX_N9
PEG_GTX_C_HRX_N10
PEG_GTX_C_HRX_N11
PEG_GTX_C_HRX_N12
PEG_GTX_C_HRX_N13
PEG_GTX_C_HRX_N14
PEG_GTX_C_HRX_N15
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
J35
H34
H33
F35
G33
E34
F32
D34
F33
B33
D31
A32
C30
A28
B29
A30
PEG_GTX_C_HRX_P0
PEG_GTX_C_HRX_P1
PEG_GTX_C_HRX_P2
PEG_GTX_C_HRX_P3
PEG_GTX_C_HRX_P4
PEG_GTX_C_HRX_P5
PEG_GTX_C_HRX_P6
PEG_GTX_C_HRX_P7
PEG_GTX_C_HRX_P8
PEG_GTX_C_HRX_P9
PEG_GTX_C_HRX_P10
PEG_GTX_C_HRX_P11
PEG_GTX_C_HRX_P12
PEG_GTX_C_HRX_P13
PEG_GTX_C_HRX_P14
PEG_GTX_C_HRX_P15
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
L33
M35
M33
M30
L31
K32
M29
J31
K29
H30
H29
F29
E28
D29
D27
C26
PEG_HTX_GRX_N0
PEG_HTX_GRX_N1
PEG_HTX_GRX_N2
PEG_HTX_GRX_N3
PEG_HTX_GRX_N4
PEG_HTX_GRX_N5
PEG_HTX_GRX_N6
PEG_HTX_GRX_N7
PEG_HTX_GRX_N8
PEG_HTX_GRX_N9
PEG_HTX_GRX_N10
PEG_HTX_GRX_N11
PEG_HTX_GRX_N12
PEG_HTX_GRX_N13
PEG_HTX_GRX_N14
PEG_HTX_GRX_N15
C722
C724
C718
C720
C693
C716
C691
C698
C689
C707
C687
C705
C685
C703
C683
C701
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
PEG_HTX_C_GRX_N0
PEG_HTX_C_GRX_N1
PEG_HTX_C_GRX_N2
PEG_HTX_C_GRX_N3
PEG_HTX_C_GRX_N4
PEG_HTX_C_GRX_N5
PEG_HTX_C_GRX_N6
PEG_HTX_C_GRX_N7
PEG_HTX_C_GRX_N8
PEG_HTX_C_GRX_N9
PEG_HTX_C_GRX_N10
PEG_HTX_C_GRX_N11
PEG_HTX_C_GRX_N12
PEG_HTX_C_GRX_N13
PEG_HTX_C_GRX_N14
PEG_HTX_C_GRX_N15
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
L34
M34
M32
L30
M31
K31
M28
H31
K28
G30
G29
F28
E27
D28
C27
C25
PEG_HTX_GRX_P0
PEG_HTX_GRX_P1
PEG_HTX_GRX_P2
PEG_HTX_GRX_P3
PEG_HTX_GRX_P4
PEG_HTX_GRX_P5
PEG_HTX_GRX_P6
PEG_HTX_GRX_P7
PEG_HTX_GRX_P8
PEG_HTX_GRX_P9
PEG_HTX_GRX_P10
PEG_HTX_GRX_P11
PEG_HTX_GRX_P12
PEG_HTX_GRX_P13
PEG_HTX_GRX_P14
PEG_HTX_GRX_P15
C723
C725
C719
C721
C694
C717
C692
C699
C690
C708
C688
C706
C686
C704
C684
C702
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
PEG_HTX_C_GRX_P0
PEG_HTX_C_GRX_P1
PEG_HTX_C_GRX_P2
PEG_HTX_C_GRX_P3
PEG_HTX_C_GRX_P4
PEG_HTX_C_GRX_P5
PEG_HTX_C_GRX_P6
PEG_HTX_C_GRX_P7
PEG_HTX_C_GRX_P8
PEG_HTX_C_GRX_P9
PEG_HTX_C_GRX_P10
PEG_HTX_C_GRX_P11
PEG_HTX_C_GRX_P12
PEG_HTX_C_GRX_P13
PEG_HTX_C_GRX_P14
PEG_HTX_C_GRX_P15
AP25
AL25
AL24
AL22
AJ33
AG9
M27
L28
J17
H17
G25
G17
E31
E30
R796
100K_0402_5%
1
2
@
10 H_DIMMA_REF
11 H_DIMMB_REF
@
1
2
R797
100K_0402_5%
R136
3.01K_0402_1%
1 @
R139
3.01K_0402_1%
R138
3.01K_0402_1%
1 @
1 @
2
2
R137
3.01K_0402_1%
1 @
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
WW41 Recommend not pull down

PCIE2.0 Jitter is over on ES1
R690
0_0402_5%
@
1
2
@
1
2
H_RSVD17_R
H_RSVD18_R
R695
0_0402_5%
DMI_PTX_HRX_N[0..3] 15
DMI_PTX_HRX_P[0..3] 15
15
15
PEG_GTX_C_HRX_N[0..15] 23
PEG_GTX_C_HRX_P[0..15] 23
PEG_HTX_C_GRX_N[0..15] 23
PEG_HTX_C_GRX_P[0..15] 23
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
RSVD_TP_86
B19
A19
RSVD15
RSVD16
A20
B20
RSVD17
RSVD18
U9
T9
RSVD19
RSVD20
AC9
AB9
RSVD21
RSVD22
C1
A3
DMI_HTX_PRX_N[0..3] 15
DMI_HTX_PRX_P[0..3] 15
H_FDI_TXN[0..7]
H_FDI_TXP[0..7]
AM30
AM28
AP31
AL32
AL30
AM31
AN29
AM32
AK32
AK31
AK28
AJ28
AN30
AN32
AJ32
AJ29
AJ30
AK30
H16
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
SA_DIMM_VREF (CFD Only)
SB_DIMM_VREF (CFD Only)
RSVD11
RSVD12
RSVD13
RSVD14
RESERVED
JCPU1A
DMI_PTX_HRX_N0
DMI_PTX_HRX_N1
DMI_PTX_HRX_N2
DMI_PTX_HRX_N3
RSVD32
RSVD33
AJ13
AJ12
RSVD34
RSVD35
AH25
AK26
RSVD36
RSVD_NCTF_37
AL26
AR2
RSVD38
RSVD39
AJ26
AJ27
RSVD_NCTF_40
RSVD_NCTF_41
AP1
AT2
RSVD_NCTF_42
RSVD_NCTF_43
AT3
AR1
RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52
RSVD53
RSVD_NCTF_54
RSVD_NCTF_55
RSVD_NCTF_56
RSVD_NCTF_57
RSVD58
AL28
AL29
AP30
AP32
AL27
AT31
AT32
AP33
AR33
AT33
AT34
AP35
AR35
AR32
RSVD_TP_59
RSVD_TP_60
KEY
RSVD62
RSVD63
RSVD64
RSVD65
E15
F15
A2
D15
C15
AJ15
AH15
RSVD_TP_66
RSVD_TP_67
RSVD_TP_68
RSVD_TP_69
RSVD_TP_70
RSVD_TP_71
RSVD_TP_72
RSVD_TP_73
RSVD_TP_74
RSVD_TP_75
AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3
RSVD_TP_76
RSVD_TP_77
RSVD_TP_78
RSVD_TP_79
RSVD_TP_80
RSVD_TP_81
RSVD_TP_82
RSVD_TP_83
RSVD_TP_84
RSVD_TP_85
V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9
RSVD_NCTF_23
RSVD_NCTF_24
J29
J28
RSVD26
RSVD27
A34
A33
RSVD_NCTF_28
RSVD_NCTF_29
C35
B35
RSVD_NCTF_30
RSVD_NCTF_31
IC,AUB_CFD_rPGA,R1P0
CONN@
VSS
R313
0_0402_5%
RSVD64_R 2
@
@
RSVD65_R 2
R312
0_0402_5%
1
1
AP34
CONN@
eDP Signals MAPPING

eDP Singal
PEG Singals
eDP_TX0
PEG_HTX_C_GRX_P15
eDP_TX#0 PEG_HTX_C_GRX_N15
eDP_TX1
PEG_HTX_C_GRX_P14
PEG_HTX_C_GRX_P13
eDP_TX2
PEG_HTX_C_GRX_P12
eDP_TX3
eDP_AUX
PEG_GTX_C_HRX_P13
eDP_AUX# PEG_GTX_C_HRX_N13
eDP_HPD# PEG_GTX_C_HRX_P12
Lane Reversal
PEG_HTX_C_GRX_P0
PEG_HTX_C_GRX_N0
PEG_HTX_C_GRX_P1
PEG_HTX_C_GRX_N1
PEG_HTX_C_GRX_P2
PEG_HTX_C_GRX_N2
PEG_HTX_C_GRX_P3
PEG_HTX_C_GRX_N3
PEG_GTX_C_HRX_P2
PEG_GTX_C_HRX_N2
PEG_GTX_C_HRX_P3
H_FDI_FSYNC0
H_FDI_FSYNC1
R711 1 DIS@
R705 1 DIS@
2 1K_0402_5%
2 1K_0402_5%
H_FDI_INT
R699 1 DIS@
2 1K_0402_5%
H_FDI_LSYNC0
H_FDI_LSYNC1
R710 1 DIS@
R697 1 DIS@
2 1K_0402_5%
2 1K_0402_5%
CFG0 - PCI-Express Configuration Select
CFG4 - Display Port Presence
*1:Single PEG
0:Bifurcation enabled
*1:Disabled; No Physical Display Port

attached to Embedded Display Port
0:Enabled; An external Display Port
device is connected to the Embedded
Display Port
CFG3 - PCI-Express Static Lane Reversal

*:Default
*1 :Normal Operation
0 :Lane Numbers Reversed
15 -> 0, 14 -> 1, ...
CheckList0.8 1.22
Auburndale Graphics Disable
Compal Secret Data
2009/08/10
Issued Date
Deciphered Date
2010/08/10
Title
Size
B
Date:
SCHEMATICS,MB A5511
Document Number
Rev
C
401762
Sheet
1
of
60
JCPU1B
COMP0
AH24
SKTOCC#
SKTOCC#_R
H_CATERR#
AK14
CATERR#
H_PECI_R
AT15
PECI
R298 1
0_0402_5%
18 H_THERMTRIP#
H_THERMTRIP#_R
H_CPURST#
AP26
RESET_OBS#
H_PM_SYNC_R
AL15
PM_SYNC
R317 1
0_0402_5%
H_CPUPWRGD_1
AN14
VCCPWRGOOD_1
R322 1
0_0402_5%
15 PM_DRAM_PWRGD
H_CPUPWRGD_0
PM_DRAM_PWRGD_R
H_VTTPWRGD
53 H_VTTPWRGD
H_PWRGD_XDP
R86 1
0_0402_5%
R261
1
1.5K_0402_1%
AN27
VCCPWRGOOD_0
AK13
SM_DRAMPWROK
AM15
VTTPWRGOOD
H_PWRGD_XDP_R
AM26
TAPPWRGOOD
PLT_RST#_R
AL14
RSTIN#
R720 1
R723 1
2 0_0402_5%
2 0_0402_5%
AR30
AT30
CLK_CPU_ITP_R
CLK_CPU_ITP#_R
R657 1
R663 1
2 0_0402_5%
2 0_0402_5%
PEG_CLK
PEG_CLK#
E16
D16
CLK_CPU_DMI_R
CLK_CPU_DMI#_R
R717 1
R714 1
2 0_0402_5%
2 0_0402_5%
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
A18
A17
CLK_CPU_DP_R
CLK_CPU_DP#_R
R703 1 UMA@ 2 0_0402_5%

R708 1 UMA@ 2 0_0402_5%
BCLK_ITP
BCLK_ITP#
2009/2/4
#414044 DG
Update Rev1.11
CLK_CPU_XDP
CLK_CPU_XDP#
CLK_CPU_DMI 14
CLK_CPU_DMI# 14
CLK_CPU_DP_R
CLK_CPU_DP#_R
CLK_CPU_DP 14
CLK_CPU_DP# 14
R230 1 DIS@
R238 1 DIS@
SM_DRAMRST#
F6
SM_DRAMRST# 10
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
AL1
AM1
AN1
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
R225 1
PM_EXT_TS#[0]
PM_EXT_TS#[1]
AN15
AP15
PM_EXTTS#0
PM_EXTTS#1_R
PRDY#
PREQ#
AT28
AP27
XDP_PRDY#
XDP_PREQ#
TCK
TMS
TRST#
AN28
AP28
AT27
XDP_TCLK
XDP_TMS
XDP_TRST#
TDI
TDO
TDI_M
TDO_M
AT29
AR27
AR29
AP29
XDP_TDI_R
XDP_TDO_R
XDP_TDI_M
XDP_TDO_M
DBR#
AN25
XDP_DBR#_R
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
AJ22
AK22
AK24
AJ24
AJ25
AH22
AK23
AH23
2 100K_0402_5%
R730 1
R726 1
R740 1
+1.1VS_VTT
2 10K_0402_5%
2 10K_0402_5%
2 0_0402_5%
R197 1
2 0_0402_5% XDP_DBRESET#
R191
R79
R680
R199
R74
XDP_TRST#
R193 1
2 51_0402_5%
XDP_TDI_R
XDP_TDO_M
R672 1
R662 1 @
2 0_0402_5%
2 0_0402_5%
5
P
4
+1.5V_1
R334
1.1K_0402_1%
R336
1.5K_0402_1%
@ Change to
R335
750_0402_1%
@
2
A
XDP_OBS0
XDP_OBS1
+1.1VS_VTT
R330 1
R206 1
R207 1 @
XDP_OBS2
XDP_OBS3
2 49.9_0402_1%
2 68_0402_5%
2 68_0402_5%
1.5K
H_COMP0
H_COMP1
H_COMP2
H_COMP3
PM_DRAM_PWRGD_R
R337
3K_0402_1%
H_CATERR#
H_PROCHOT#
H_CPURST#
R673
R249
R684
R689
1
1
1
1
SM_RCOMP_0 R749 1
SM_RCOMP_1 R748 1
SM_RCOMP_2 R747 1
2
2
2
2
49.9_0402_1%
49.9_0402_1%
20_0402_1%
20_0402_1%
2 100_0402_1%
2 24.9_0402_1%
2 130_0402_1%
XDP_OBS4
XDP_OBS5
15,21,38 PBTN_OUT#
+1.1VS_VTT
R96
1K_0402_5%
H_CPUPWRGD 1
1
R93
C168
1
0.1U_0402_16V4Z
@
When implement S3 power reduction

not to pop R337
pop U49,R336,R335,R334...
XDP_OBS6
XDP_OBS7
2
2
H_PWRGOOD_R
PBTN_OUT#_XDP
0_0402_5%
H_PWRGD_XDP
21 SMB_DATA_S3
21 SMB_CLK_S3
XDP_TCLK
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
GND1
OBSFN_C0
OBSFN_C1
GND3
OBSDATA_C0
OBSDATA_C1
GND5
OBSDATA_C2
OBSDATA_C3
GND7
OBSFN_D0
OBSFN_D1
GND9
OBSDATA_D0
OBSDATA_D1
GND11
OBSDATA_D2
OBSDATA_D3
GND13
ITPCLK/HOOK4
ITPCLK#/HOOK5
VCC_OBS_CD
RESET#/HOOK6
DBR#/HOOK7
GND15
TD0
TRST#
TDI
TMS
GND17
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
1 @
R671 1
R192
2009/08/10
STUFF -> R653, R657, R662

NO STUFF -> R655, R660
CPU Only
STUFF -> R653, R655

NO STUFF -> R657, R660, R662
GMCH Only
STUFF -> R660, R662

NO STUFF -> R653, R655, R657
Deciphered Date
R89
1K_0402_5%
1
2
1 @
2
H_CPURST#
PLT_RST#
R92
0_0402_5%
CLK_CPU_XDP
CLK_CPU_XDP#
H_RESET#_R
XDP_DBRESET#
XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS
+1.1VS_VTT
R87
1K_0402_5%
2 R85
51_0402_5%
+3VS
Leakage Issue
+1.1VS_VTT
SAMTE_BSH-030-01-L-D-A

2010/08/10
Title
Date:
2
2 0_0402_5%
0_0402_5%
Scan Chain
(Default)
H_RESET#_R
Size
B
XDP_TDI
XDP_TDO
Compal Secret Data
51_0402_5%
51_0402_5%
51_0402_5%
51_0402_5%
51_0402_5%
XDP Connector
GND0
OBSFN_A0
OBSFN_A1
GND2
OBSDATA_A0
OBSDATA_A1
GND4
OBSDATA_A2
OBSDATA_A3
GND6
OBSFN_B0
OBSFN_B1
GND8
OBSDATA_B0
OBSDATA_B1
GND10
OBSDATA_B2
OBSDATA_B3
GND12
PWRGOOD/HOOK0
HOOK1
VCC_OBS_AB
HOOK2
HOOK3
GND14
SDA
SCL
TCK1
TCK0
GND16
CONN@
2009/4/13
Intel Suggestion by Desige guide V1.52
Issued Date
2
2
2
2
2
JTAG MAPPING
XDP_PREQ#
XDP_PRDY#
H_VTTPWRGD_3.3 53
NC7SZ08P5X_NL_SC70-5
@
@
@
@
@
@
R667
0_0402_5%
XDP_TDI_M
XDP_TDO_R
JP5
H_VTTPWRGD_3.3
1
1
1
1
1
XDP_DBRESET# 15,21
2009/2/4
Delete dampling resistor for
power noise and Layout space
issue
CONN@
XDP_PRDY#
XDP_TMS
XDP_TDI_R
XDP_PREQ#
XDP_TCLK
PM_EXTTS#0_1 10,11
XDP_OBS0
XDP_OBS1
XDP_OBS2
XDP_OBS3
XDP_OBS4
XDP_OBS5
XDP_OBS6
XDP_OBS7
+3VALW
U49
B 2
2 0_0402_5%
2 0_0402_5%
D
R260
750_0402_1%
CLK_CPU_BCLK 18
CLK_CPU_BCLK# 18
+1.1VS_VTT
17,21,34,38 PLT_RST#
THERMTRIP#
R297 1
0_0402_5%
R320 1
0_0402_5%
18 H_CPUPWRGD
AK15
PROCHOT#
PWR MANAGEMENT
15 H_PM_SYNC
AN26
CLOCKS
COMP1
AT26
H_PROCHOT#
56 H_PROCHOT#
G16
H_COMP0
CLK_CPU_BCLK_R
CLK_CPU_BCLK#_R
H_COMP1
A16
B16
BCLK
BCLK#
R741 1
0_0402_5%
H_PECI
COMP2
THERMAL
18
AT24
DDR3
MISC
COMP3
H_COMP2
JTAG & BPM
PAD
AT23
MISC
T7
H_COMP3
SCHEMATICS,MB A5511
Document Number
Rev
C
401762
Sheet
1
of
60
10
10
10
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
10 DDR_A_CAS#
10 DDR_A_RAS#
10 DDR_A_WE#
A10
C10
C7
A7
B10
D10
E10
A8
D8
F10
E6
F7
E9
B7
E7
C6
H10
G8
K7
J8
G7
G10
J7
J10
L7
M6
M8
L9
L6
K8
N8
P9
AH5
AF5
AK6
AK7
AF6
AG5
AJ7
AJ6
AJ10
AJ9
AL10
AK12
AK8
AL7
AK11
AL8
AN8
AM10
AR11
AL11
AM9
AN9
AT11
AP12
AM12
AN12
AM13
AT14
AT12
AL13
AR14
AP14
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
AC3
AB2
U7
DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#
AE1
AB3
AE9
SA_CK[0]
SA_CK#[0]
SA_CKE[0]
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
SA_BS[0]
SA_BS[1]
SA_BS[2]
SA_CAS#
SA_RAS#
SA_WE#
AA6
AA7
P7
Y6
Y5
P6
DDR_A_CLK1 10
DDR_A_CLK1# 10
DDR_A_CKE1 10
SA_CS#[0]
SA_CS#[1]
AE2
AE8
DDR_A_CS0# 10
DDR_A_CS1# 10
SA_ODT[0]
SA_ODT[1]
AD8
AF9
DDR_A_ODT0 10
DDR_A_ODT1 10
B9
D7
H7
M7
AG6
AM7
AN10
AN13
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
DDR_A_CLK0 10
DDR_A_CLK0# 10
DDR_A_CKE0 10
SA_CK[1]
SA_CK#[1]
SA_CKE[1]
SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]
DDR SYSTEM MEMORY A
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
C9
F8
J9
N9
AH7
AK9
AP11
AT13
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
C8
F9
H9
M9
AH8
AK10
AN11
AR13
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15
11
11
11
DDR_B_BS0
DDR_B_BS1
DDR_B_BS2
11 DDR_B_CAS#
11 DDR_B_RAS#
11 DDR_B_WE#
JCPU1D
11 DDR_B_D[0..63]
11 DDR_B_DM[0..7]
11 DDR_B_DQS#[0..7]
11 DDR_B_DQS[0..7]
11 DDR_B_MA[0..15]
JCPU1C
10 DDR_A_D[0..63]
10 DDR_A_DM[0..7]
10 DDR_A_DQS#[0..7]
10 DDR_A_DQS[0..7]
10 DDR_A_MA[0..15]
B5
A5
C3
B3
E4
A6
A4
C4
D1
D2
F2
F1
C2
F5
F3
G4
H6
G2
J6
J3
G1
G5
J2
J1
J5
K2
L3
M1
K5
K4
M4
N5
AF3
AG1
AJ3
AK1
AG4
AG3
AJ4
AH4
AK3
AK4
AM6
AN2
AK5
AK2
AM4
AM3
AP3
AN5
AT4
AN6
AN4
AN3
AT5
AT6
AN7
AP6
AP8
AT9
AT7
AP9
AR10
AT10
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
DDR_B_BS0
DDR_B_BS1
DDR_B_BS2
AB1
W5
R7
SB_BS[0]
SB_BS[1]
SB_BS[2]
DDR_B_CAS#
DDR_B_RAS#
DDR_B_WE#
AC5
Y7
AC6
SB_CAS#
SB_RAS#
SB_WE#
DDR SYSTEM MEMORY - B
SB_CK[0]
SB_CK#[0]
SB_CKE[0]
W8
W9
M3
DDR_B_CLK0 11
DDR_B_CLK0# 11
DDR_B_CKE0 11
SB_CK[1]
SB_CK#[1]
SB_CKE[1]
V7
V6
M2
DDR_B_CLK1 11
DDR_B_CLK1# 11
DDR_B_CKE1 11
SB_CS#[0]
SB_CS#[1]
AB8
AD6
DDR_B_CS0# 11
DDR_B_CS1# 11
SB_ODT[0]
SB_ODT[1]
AC7
AD1
DDR_B_ODT0 11
DDR_B_ODT1 11
SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]
D4
E1
H3
K1
AH1
AL2
AR4
AT8
DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
D5
F4
J4
L4
AH2
AL4
AR5
AR8
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
C5
E3
H4
M5
AG2
AL5
AP5
AR7
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15
CONN@
CONN@
Compal Secret Data
2009/08/10
Issued Date
Deciphered Date
2010/08/10
Title
Size
B
Date:
SCHEMATICS,MB A5511
Document Number
Rev
C
401762
Sheet
1
of
60
JCPU1F
WW15 MOW
+CPU_CORE
Peak 21A
POWER
+1.1VS_VTT
10U_0805_6.3V6M
VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8
VTT0_9
VTT0_10
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31
VTT0_32
AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_43
VTT0_44
AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15
10U_0805_6.3V6M
10U_0805_6.3V6M
+CPU_CORE
C412
C386
C381
C411
10U_0805_6.3V6M
C408
C392
10U_0805_6.3V6M
10U_0805_6.3V6M
C368
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C330
10U_0805_6.3V6M
C344
10U_0805_6.3V6M
1
C365
C384
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C398
10U_0805_6.3V6M
C349
C333
C364
10U_0805_6.3V6M
C399
10U_0805_6.3V6M
(Place these capacitors between inductor and socket on Bottom)

+1.1VS_VTT
+CPU_CORE
1
330U_X_2VM_R6M
1
C800 + C799 +
<BOM Structure>
2
C802
@
10U_0805_6.3V6M
1
+
C401
C335
10U_0805_6.3V6M
1
C402
C385
C334
C400
2
2
330U_X_2VM_R6M
10U_0805_6.3V6M
1
C397
330U_X_2VM_R6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
(Place these capacitors under CPU socket, top layer)
CSC (Current Sense Configuration)

8/25
+1.1VS_VTT
C413
C414
2
2
22U_0805_6.3V6M
PSI#
AN33
H_PSI#
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
PROC_DPRSLPVR
AK35
AK33
AK34
AL35
AL33
AM33
AM35
AM34
CPU_VID0 56
CPU_VID1 56
CPU_VID2 56
CPU_VID3 56
CPU_VID4 56
CPU_VID5 56
CPU_VID6 56
H_DPRSLPVR 56
VTT_SELECT
G15
H_VTTVID1
VTT_SENSE
VSS_SENSE_VTT
AN35
2 1K_0402_1%
2 1K_0402_1%
CPU_VID2
R607 1
R618 1 @
2 1K_0402_1%
2 1K_0402_1%
CPU_VID3
R608 1 @
R619 1
2 1K_0402_1%
2 1K_0402_1%
CPU_VID4
R259 1 @
R263 1
2 1K_0402_1%
2 1K_0402_1%
CPU_VID5
R609 1
R620 1 @
2 1K_0402_1%
2 1K_0402_1%
CPU_VID6
R610 1 @
R621 1
2 1K_0402_1%
2 1K_0402_1%
H_DPRSLPVR R611 1
R622 1 @
2 1K_0402_1%
2 1K_0402_1%
H_PSI#
2 1K_0402_1%
2 1K_0402_1%
R612 1 @
R623 1
+CPU_CORE
22U_0805_6.3V6M
C774
C772
22U_0805_6.3V6M
C773
C771
22U_0805_6.3V6M
C770
22U_0805_6.3V6M
C769
22U_0805_6.3V6M
+CPU_CORE
22U_0805_6.3V6M
C787
56
C792
22U_0805_6.3V6M
C791
C790
22U_0805_6.3V6M
22U_0805_6.3V6M
C789
22U_0805_6.3V6M
C788
22U_0805_6.3V6M
(Place these capacitors on CPU cavity, Bottom Layer)

B
Auburndale +1.1VS_VTT=1.05V
Clarksfield +1.1VS_VTT=1.1V
+CPU_CORE
4 x 330uF(6m ohm@100kHz)
2 0_0402_5%
2 0_0402_5%
VTT_SENSE 53
VSS_SENSE_VTT
R727 1
1
R604
VCCSENSE
VSSSENSE
2
100_0402_1%
1
R603
2
100_0402_1%
+CPU_CORE
VCCSENSE 56
VSSSENSE 56
C232
330U_D2_2.5VM_R6M
+
2
1
C186
@
330U_D2_2.5VM_R6M
2 0_0402_5%
+
2
C711
330U_D2_2.5VM_R6M
+
2
C221
330U_D2_2.5VM_R6M
C259
330U_D2_2.5VM_R6M
1
C196
@
330U_D2_2.5VM_R6M
+
2
TOP side (under inductor)
2009/08/10
Issued Date
C,uF
ESR, mohm
4X330uF
6m ohm/4
16X22uF
3m ohm/12
16X10uF
3m ohm/16
Stuffing Option
2X330uF
2010/08/10
Deciphered Date
Title
SCHEMATICS,MB A5511
Custom
Date:
Compal Secret Data
(Place these capacitors on CPU cavity, Bottom Layer)
+CPU-CORE
Decoupling
SPCAP,Polymer
CONN@
22U_0805_6.3V6M
IMVP_IMON 56
AJ34 VCCSENSE_CPU R615 1

AJ35 VSSSENSE_CPU R614 1
B15
A15
2 1K_0402_1%
2 1K_0402_1%
R606 1
R617 1 @
VTT Rail
H_VTTVID1 = high, 1.05V
VCC_SENSE
VSS_SENSE
R605 1
R616 1 @
CPU_VID1
H_VTTVID1 53
H_VTTVID1 = low, 1.1V
ISENSE
CPU_VID0
22U_0805_6.3V6M
MLCC 0805 X5R
10U_0805_6.3V6M
1
+1.1VS_VTT
CPU VIDS
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100
SENSE LINES
CPU CORE SUPPLY
AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26
Continuous 18A
1.1V RAIL POWER
48A
Rev
C
401762
Sheet

1
of
60
+VGFX_CORE
JCPU1G
C405
@
C404
@
C403
UMA@
C357
UMA@
C786
UMA@
2
C785
UMA@
2
+
C406
@
2
330U_X_2VM_R6M
R696
0_0402_5%
DIS@
J24
J23
H25
VTT1_45
VTT1_46
VTT1_47
15A
GRAPHICS
C795
330U_X_2VM_R6M
UMA@
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
10U_0805_6.3V6M
VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
3A
22U_0805_6.3V6M
C416
FDI
C415
AR22
AT22
GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]
AM22
AP22
AN22
AP23
AM23
AP24
AN24
GFX_VR_EN
GFX_DPRSLPVR
GFX_IMON
AR25
AT25
AM24
VCC_AXG_SENSE 54
VSS_AXG_SENSE 54
D
GFXVR_VID_0
GFXVR_VID_1
GFXVR_VID_2
GFXVR_VID_3
GFXVR_VID_4
GFXVR_VID_5
GFXVR_VID_6
GFXVR_DPRSLPVR_R
R679 1
R198 1 DIS@
54
54
54
54
54
54
54
GFXVR_EN 54
GFXVR_DPRSLPVR 54
GFXVR_IMON 54
2 0_0402_5%
2 1K_0402_5%
+1.5V_1
+1.1VS_VTT
VAXG_SENSE
VSSAXG_SENSE
- 1.5V RAILS
DDR3
C358
@
AT21
AT19
AT18
AT16
AR21
AR19
AR18
AR16
AP21
AP19
AP18
AP16
AN21
AN19
AN18
AN16
AM21
AM19
AM18
AM16
AL21
AL19
AL18
AL16
AK21
AK19
AK18
AK16
AJ21
AJ19
AJ18
AJ16
AH21
AH19
AH18
AH16
SENSE
LINES
10U_0805_6.3V6M
GRAPHICS VIDs
C359
@
22U_0805_6.3V6M
22U_0805_6.3V6M
POWER
22U_0805_6.3V6M
22U_0805_6.3V6M
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1
VTT0_59
VTT0_60
VTT0_61
VTT0_62
P10
N10
L10
K10
1U_0402_6.3V4Z
1U_0402_6.3V4Z
22U_0805_6.3V6M
1
C438
C472
C436
1U_0402_6.3V4Z
C466
1U_0402_6.3V4Z
C434
C468
C471
+ C467
330U_D2_2V_Y
1U_0402_6.3V4Z
22U_0805_6.3V6M
+1.1VS_VTT
1
+1.1VS_VTT
C417
10U_0805_6.3V6M
C420
22U_0805_6.3V6M
VTT1_63
VTT1_64
VTT1_65
VTT1_66
VTT1_67
VTT1_68
J22
J20
J18
H21
H20
H19
VCCPLL1
VCCPLL2
VCCPLL3
L26
L27
M26
C418
22U_0805_6.3V6M
B
+1.8VS
0.6A
1.8V
22U_0805_6.3V6M
VTT1_48
VTT1_49
VTT1_50
VTT1_51
VTT1_52
VTT1_53
VTT1_54
VTT1_55
VTT1_56
VTT1_57
VTT1_58
PEG & DMI
C419
K26
J27
J26
J25
H27
G28
G27
G26
F26
E26
E25
1.1V
+1.1VS_VTT
2.2U_0603_6.3V6K
+1.8VS_VCCSFR
C337
1U_0402_6.3V4Z
CONN@
R211
0_0805_5%
1
2
C331
C348
1U_0402_6.3V4Z
C345
2 22U_0805_6.3V6M
C346
4.7U_0603_6.3V6K
Compal Secret Data
2009/08/10
Issued Date
Deciphered Date
2010/08/10
Title
SCHEMATICS,MB A5511
Custom
Date:
Rev
C
401762
Sheet
1
of
60
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
JCPU1I
VSS
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30
K27
K9
K6
K3
J32
J30
J21
J19
H35
H32
H28
H26
H24
H22
H18
H15
H13
H11
H8
H5
H2
G34
G31
G20
G9
G6
G3
F30
F27
F25
F22
F19
F16
E35
E32
E29
E24
E21
E18
E13
E11
E8
E5
E2
D33
D30
D26
D9
D6
D3
C34
C32
C29
C28
C24
C22
C20
C19
C16
B31
B25
B21
B18
B17
B13
B11
B8
B6
B4
A29
A27
A23
A9
CONN@
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS
NCTF
JCPU1H
AT20
AT17
AR31
AR28
AR26
AR24
AR23
AR20
AR17
AR15
AR12
AR9
AR6
AR3
AP20
AP17
AP13
AP10
AP7
AP4
AP2
AN34
AN31
AN23
AN20
AN17
AM29
AM27
AM25
AM20
AM17
AM14
AM11
AM8
AM5
AM2
AL34
AL31
AL23
AL20
AL17
AL12
AL9
AL6
AL3
AK29
AK27
AK25
AK20
AK17
AJ31
AJ23
AJ20
AJ17
AJ14
AJ11
AJ8
AJ5
AJ2
AH35
AH34
AH33
AH32
AH31
AH30
AH29
AH28
AH27
AH26
AH20
AH17
AH13
AH9
AH6
AH3
AG10
AF8
AF4
AF2
AE35
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
AT35
AT1
AR34
B34
B2
B1
A35
H_NCTF1
H_NCTF2
@
@
PAD T17
PAD T21
H_NCTF6
H_NCTF7
@
@
PAD T20
PAD T16
CONN@
Compal Secret Data
2009/08/10
Issued Date
Deciphered Date
2010/08/10
Title
SCHEMATICS,MB A5511
Custom
Date:
Rev
C
401762
Sheet
1
of
60
+1.5V
M1 Circuit
6 DDR_A_D[0..63]
M3 Circuit
6 DDR_A_DQS[0..7]
RST_GATE
PCH_SMBDATA
12,14,21,33,36 PCH_SMBDATA
R409
DDR_A_DM0
12
R541
@
1K_0402_1%
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
PCH_SMBCLK
12,14,21,33,36 PCH_SMBCLK
+V_DDR3_DIMM_REF
Q70
1
BSH111_SOT23
@
R566
@
100K_0402_1%
6 DDR_A_MA[0..15]
DIS@ 2 0_0402_5%
VREF_DQA
R410
1K_0402_1%
4 H_DIMMA_REF
R429 1
JDIMM1
R504
@
1K_0402_1%
6 DDR_A_DM[0..7]
+V_DDR3_DIMM_REF
DDR_A_D8
DDR_A_D9
M1 Circuit
1K_0402_1%
DDR_A_DQS#1
DDR_A_DQS1
R430 1 UMA@ 2 0_0402_5%
+V_DDR3_DIMM_REF
2009/04/13
For Arrandale ,it should be use M1 Circuit
For Clarksfield ,it should be use M3 Circuit
DG V1.52
DDR_A_D10
DDR_A_D11
C538
0.1U_0402_16V4Z
DDR_A_D16
DDR_A_D17
C537
2.2U_0805_16V4Z
1
R497 1
2 0_0402_5%
DDR_A_D24
DDR_A_D25
R502
@
1K_0402_1%
DIMM_DRAMRST#
DDR_A_DM3
DDR_A_D26
DDR_A_D27
R823
@
100K_0402_1%
Q78
1
BSH111_SOT23
@
RST_GATE
D
5 SM_DRAMRST#
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D18
DDR_A_D19
+1.5V
DDR_A_CKE0
DDR_A_BS2
DDR_A_CKE0
11,18 RST_GATE
DDR_A_BS2
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
6
6
6
6
6
DDR_A_CLK0
DDR_A_CLK0#
DDR_A_CLK0
DDR_A_CLK0#
DDR_A_MA10
DDR_A_BS0
DDR_A_BS0
DDR_A_WE#
DDR_A_CAS#
DDR_A_WE#
DDR_A_CAS#
DDR_A_MA13
DDR_A_CS1#
DDR_A_CS1#
DDR_A_D32
DDR_A_D33
Layout Note:
Place near JDIMM1
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D34
DDR_A_D35
Layout Note: Place these 4 Caps near Command

and Control signals of DIMMA
DDR_A_D40
DDR_A_D41
+1.5V
DDR_A_DM5
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_A_D42
DDR_A_D43
1
C534
C541
C542
10U_0805_6.3V6M
C540
C539
10U_0805_6.3V6M
C544
10U_0805_6.3V6M
C810
0.1U_0402_16V4Z
C809
C808
C807
+ C563
330U_D2_2V_Y
DDR_A_D48
DDR_A_D49
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51
0.1U_0402_16V4Z
DDR_A_D56
DDR_A_D57
DDR_A_DM7
DDR_A_D58
DDR_A_D59
Layout Note:
Place near JDIMM1.203 & JDIMM1.204
R452 1
2 10K_0402_5%
+0.75VS
C816
2.2U_0603_6.3V4Z
1U_0603_10V4Z
C815
+3VS
1U_0603_10V4Z
R451
0.1U_0402_16V4Z
10K_0402_5%
2
C814
C813
C811
C822
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
VREF_DQ
VSS
DQ0
DQ1
VSS
DM0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
VSS
DQ26
DQ27
VSS
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
CKE0
VDD
NC
BA2
VDD
A12/BC#
A9
VDD
A8
A5
VDD
A3
A1
VDD
CK0
CK0#
VDD
A10/AP
BA0
VDD
WE#
CAS#
VDD
A13
S1#
VDD
TEST
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SA0
VDDSPD
SA1
VTT
205
207
GND1
GND2
VSS
DQ4
DQ5
VSS
DQS0#
DQS0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
RESET#
VSS
DQ14
DQ15
VSS
DQ20
DQ21
VSS
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
CKE1
VDD
A15
A14
VDD
A11
A7
VDD
A6
A4
VDD
A2
A0
VDD
CK1
CK1#
VDD
BA1
RAS#
VDD
S0#
ODT0
VDD
ODT1
NC
VDD
VREF_CA
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
EVENT#
SDA
SCL
VTT
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
BOSS1
BOSS2
206
208
DDR_A_D4
DDR_A_D5
DDR_A_DQS#0
DDR_A_DQS0
DDR_A_D6
DDR_A_D7
DDR_A_D12
DDR_A_D13
D
DDR_A_DM1
DIMM_DRAMRST#
DIMM_DRAMRST# 11
DDR_A_D14
DDR_A_D15
DDR_A_D20
DDR_A_D21
DDR_A_DM2
DDR_A_D22
DDR_A_D23
DDR_A_D28
DDR_A_D29
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31
DDR_A_CKE1
DDR_A_CKE1 6
DDR_A_MA15
DDR_A_MA14
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
DDR_A_CLK1
DDR_A_CLK1#
DDR_A_CLK1 6
DDR_A_CLK1# 6
DDR_A_BS1
DDR_A_RAS#
DDR_A_BS1 6
DDR_A_RAS# 6
DDR_A_CS0#
DDR_A_ODT0
DDR_A_CS0# 6
DDR_A_ODT0 6
DDR_A_ODT1
+V_DDR3_DIMM_REF
DDR_A_ODT1 6
DDR_VREF_CA_DIMMA R413 1
2 0_0402_5%
DDR_A_D36
DDR_A_D37
DDR_A_DM4
DDR_A_D38
DDR_A_D39
C527
2.2U_0603_6.3V4Z
DDR_A_D44
DDR_A_D45
C526
0.1U_0402_16V4Z
B
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
DDR_A_DM6
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
PM_EXTTS#0_1
D_CK_SDATA
D_CK_SCLK
PM_EXTTS#0_1 5,11
D_CK_SDATA 11,12
D_CK_SCLK 11,12
+0.75VS
DDR3 SO-DIMM A
Standard Type
CONN@
10U_0805_6.3V6M
Compal Secret Data

2009/08/10
Issued Date
1U_0603_10V4Z
2010/08/10
Deciphered Date
Title
SCHEMATICS,MB A5511
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
Date:
DDR_A_DQS#5
DDR_A_DQS5
FOX_AS0A626-U2SN-7F_204P
C819
1U_0603_10V4Z
+1.5V
6 DDR_A_DQS#[0..7]
+1.5V
+1.5V
Rev
C
401762
Sheet

1
10
of
60
2008/9/8 #400755
Calpella Clarksfield
DDR3 SO-DIMM
VREFDQ Platform
Design Guide Change Details
1
R445
4 H_DIMMB_REF
M3 Circuit
1
2 0_0402_5%
Q77
1
BSH111_SOT23
@
RST_GATE
DDR_B_D0
DDR_B_D1
R550
@
1K_0402_1%
6 DDR_B_DQS[0..7]
R824
@
100K_0402_1%
6 DDR_B_DM[0..7]
DIS@
+1.5V
JDIMM2
12
6 DDR_B_D[0..63]
+1.5V
R546
@
1K_0402_1%
DDR_B_DM0
DDR_B_D2
DDR_B_D3
6 DDR_B_DQS#[0..7]
6 DDR_B_MA[0..15]
D
DDR_B_D8
DDR_B_D9
10,18 RST_GATE
PCH_SMBCLK
12,14,21,33,36 PCH_SMBCLK
PCH_SMBDATA
12,14,21,33,36 PCH_SMBDATA
DDR_B_DQS#1
DDR_B_DQS1
M1 Circuit
DDR_B_D10
DDR_B_D11
UMA@
+V_DDR3_DIMM_REF
2009/04/13
For Arrandale ,it should be use M1 Circuit
For Clarksfield ,it should be use M3 Circuit
DG V1.52
R446
2 0_0402_5%
DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
C553
2.2U_0805_16V4Z
C554
DDR_B_D18
DDR_B_D19
DDR_B_D24
DDR_B_D25
DDR_B_DM3
DDR_B_D26
DDR_B_D27
0.1U_0402_16V4Z
DDR_B_CKE0
6 DDR_B_CKE0
DDR_B_BS2
6 DDR_B_BS2
C
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
6
6
DDR_B_CLK0
DDR_B_CLK0#
DDR_B_CLK0
DDR_B_CLK0#
DDR_B_MA10
DDR_B_BS0
6 DDR_B_BS0
DDR_B_WE#
DDR_B_CAS#
6 DDR_B_WE#
6 DDR_B_CAS#
Layout Note:
Place near JDIMM2
DDR_B_MA13
DDR_B_CS1#
6 DDR_B_CS1#
Layout Note: Place these 4 Caps near Command

and Control signals of DIMMA
DDR_B_D32
DDR_B_D33
+1.5V
DDR_B_DQS#4
DDR_B_DQS4
10U_0805_6.3V6M
10U_0805_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_B_D34
DDR_B_D35
1
C839
C860
10U_0805_6.3V6M 2
C852
C862
C845
C856
C844
C843
C842
C841
+ C855
330U_D2_2V_Y
DDR_B_D40
DDR_B_D41
DDR_B_DM5
DDR_B_D42
DDR_B_D43
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_B_D48
DDR_B_D49
DDR_B_DQS#6
DDR_B_DQS6
Layout Note:
Place near JDIMM2.203 & JDIMM2.204
DDR_B_D50
DDR_B_D51
DDR_B_D56
DDR_B_D57
+0.75VS
DDR_B_DM7
1U_0603_10V4Z
C825 2 C827 2 C837 2 C836 2
DDR_B_D58
DDR_B_D59
R773 1
1 C838
+3VS
R453
1U_0603_10V4Z
10U_0805_6.3V6M
C569
2.2U_0603_6.3V4Z
1U_0603_10V4Z
+1.5V
2 10K_0402_5%
1
C568
0.1U_0402_16V4Z
2
10K_0402_5%
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
VREF_DQ
VSS
DQ0
DQ1
VSS
DM0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
VSS
DQ26
DQ27
VSS
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
CKE0
VDD
NC
BA2
VDD
A12/BC#
A9
VDD
A8
A5
VDD
A3
A1
VDD
CK0
CK0#
VDD
A10/AP
BA0
VDD
WE#
CAS#
VDD
A13
S1#
VDD
TEST
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SA0
VDDSPD
SA1
VTT
205
207
GND1
GND2
VSS
DQ4
DQ5
VSS
DQS0#
DQS0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
RESET#
VSS
DQ14
DQ15
VSS
DQ20
DQ21
VSS
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
CKE1
VDD
A15
A14
VDD
A11
A7
VDD
A6
A4
VDD
A2
A0
VDD
CK1
CK1#
VDD
BA1
RAS#
VDD
S0#
ODT0
VDD
ODT1
NC
VDD
VREF_CA
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
EVENT#
SDA
SCL
VTT
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
BOSS1
BOSS2
206
208
DDR_B_D4
DDR_B_D5
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D6
DDR_B_D7
DDR_B_D12
DDR_B_D13
DDR_B_DM1
DIMM_DRAMRST#
DDR_B_D20
DDR_B_D21
DDR_B_DM2
DDR_B_D22
DDR_B_D23
DDR_B_D28
DDR_B_D29
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D30
DDR_B_D31
DDR_B_CKE1
DDR_B_CKE1 6
DDR_B_MA15
DDR_B_MA14
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
DDR_B_CLK1
DDR_B_CLK1#
2010/08/10
Deciphered Date
+V_DDR3_DIMM_REF
2 0_0402_5%
DDR_B_D36
DDR_B_D37
DDR_B_DM4
DDR_B_D38
DDR_B_D39
C552
2.2U_0603_6.3V4Z
DDR_B_D44
DDR_B_D45
C551
0.1U_0402_16V4Z
B
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53
DDR_B_DM6
DDR_B_D54
DDR_B_D55
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
PM_EXTTS#0_1
D_CK_SDATA
D_CK_SCLK
PM_EXTTS#0_1 5,10
D_CK_SDATA 10,12
D_CK_SCLK 10,12
+0.75VS
DDR3 SO-DIMM B
Standard Type
Title
Date:
DDR_B_ODT1 6
DDR_VREF_CA_DIMMB R442 1
4
DDR_B_CS0# 6
DDR_B_ODT0 6
DDR_B_ODT1
Size
DDR_B_BS1 6
DDR_B_RAS# 6
DDR_B_CS0#
DDR_B_ODT0
Compal Secret Data

2009/08/10
DDR_B_CLK1 6
DDR_B_CLK1# 6
DDR_B_BS1
DDR_B_RAS#
TYCO_2-2013310-1_204P
CONN@
Issued Date
DDR_B_MA11
DDR_B_MA7
1U_0603_10V4Z
DIMM_DRAMRST# 10
DDR_B_D14
DDR_B_D15

SCHEMATICS,MB A5511
Document Number
Rev
C
401762
Sheet
1
11
of
60
+CLK_VDD
+CLK_VDDSRC
+CLK_1.5VDD
L34 2
1
FBMA-L11-201209-221LMA30T_0805
+1.05VS
1
1
C481
C479
10U_0805_10V4Z
10U_0805_10V4Z
C490
C487
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
@
C496
@
C589
0.1U_0402_16V4Z
C506
C510
10U_0805_10V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
L37 2
1
FBMA-L11-201209-221LMA30T_0805
+3VS
L39 2
1
FBMA-L11-201209-221LMA30T_0805
@
1
1
C588
C590
@
10U_0805_10V4Z
10U_0805_10V4Z
2 @
2
+1.5VS
C502
C507
C497
0.1U_0402_16V4Z
C485
C488
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+CLK_VDDSRC
+CLK_1.5VDD
+CLK_VDD
+CLK_VDDSRC
CLK_BUF_DREF_96M
CLK_BUF_DREF_96M#
1
2
RP17
4
3
CLK_BUF_DREF_96M_R
CLK_BUF_DREF_96M#_R
0_0404_4P2R_5%
1 R479
2
0_0402_5%
1 R480@ 2
0_0402_5%
+CLK_VDD
14 CLK_BUF_PCIE_SATA
14 CLK_BUF_PCIE_SATA#
14 CLK_BUF_CPU_DMI
14 CLK_BUF_CPU_DMI#
CLK_BUF_PCIE_SATA
CLK_BUF_PCIE_SATA#
CLK_BUF_CPU_DMI
CLK_BUF_CPU_DMI#
1
2
RP16
1
2
RP15
4
3
4
3
Clock Generator
U35
Integrated 33ohm Resistor

14 CLK_BUF_DREF_96M
14 CLK_BUF_DREF_96M#
+CLK_VDD
CLK_BUF_PCIE_SATA_R
CLK_BUF_PCIE_SATA#_R
0_0404_4P2R_5%
CLK_BUF_CPU_DMI_R
CLK_BUF_CPU_DMI#_R
0_0404_4P2R_5%
H_STP_CPU#
1
2
3
4
5
6
7
8
VDD_USB_48
VSS_48M
DOT_96
DOT_96#
VDD_27
27MHZ
27MHZ_SS
USB_48
9
10
11
12
13
14
15
16
VSS_27M
SATA
SATA#
VSS_SRC
SRC_1
SRC_1#
VDD_SRC_IO
CPU_STOP#
33
TGND
SCL
SDA
REF_0/CPU_SEL
VDD_REF
XTAL_IN
XTAL_OUT
VSS_REF
CKPWRGD/PD#
32
31
30
29
28
27
26
25
VDD_CPU
CPU_0
CPU_0#
VSS_CPU
CPU_1
CPU_1#
VDD_CPU_IO
VDD_SRC
24
23
22
21
20
19
18
17
D_CK_SCLK
D_CK_SDATA
REF_0/CPU_SEL
R388 1
D_CK_SCLK 10,11
D_CK_SDATA 10,11
CLK_BUF_ICH_14M 14
2 33_0402_5%
CLK_XTAL_IN
CLK_XTAL_OUT
CK505_PWRGD
2
CLK_BUF_CPU_BCLK_R
CLK_BUF_CPU_BCLK#_R
CLK_BUF_CPU_BCLK
4
CLK_BUF_CPU_BCLK#
3
0_0404_4P2R_5%
1
2
CLK_BUF_CPU_BCLK 14
CLK_BUF_CPU_BCLK# 14
RP14

1 R481
2
0_0402_5%
1 R484@ 2
0_0402_5%
IDT SA000030P00
SLG8SP587VTR_QFN32_5X5
<BOM Structure>
IDT: 9LRS3199AKLFT, SA000030P00

SILEGO: SLG8SP587V(WF), SA00002XY10
+CLK_VDD
+CLK_1.5VDD
+3VS
R382
10K_0402_5%
+3VS
Silego Have Internal Pull-Up
R383
0_0402_5%
@
1
2
CK505_PWRGD
VGATE
15,56
D
+3VS
H_STP_CPU#
R389
4.7K_0402_5%
1
2
3
S
14,21,33,36 PCH_SMBDATA
IDT Have Internal Pull-Down
CLK_ENABLE# 56
D_CK_SDATA
0 (Default)
133MHz
133MHz
100MHz
100MHz
14,21,33,36 PCH_SMBCLK
3
S
CPU_1
2
Y1
14.318MHZ_16PF_7A14300083
+3VS
D_CK_SCLK
CLK_XTAL_OUT
C491
22P_0402_50V8J
2
1
R390
4.7K_0402_5%
1
2
CPU_0
C495
22P_0402_50V8J
2
1
CLK_XTAL_IN
+3VS
2 10K_0402_5% REF_0/CPU_SEL
PIN 30
+3VS
2
G
Q29
2N7002_SOT23
Q31
2N7002_SOT23
2
G
R395 1
2 10K_0402_5%
2
G
R384 1
Q32
2N7002_SOT23
update PCB footprint
Issued Date
Compal Secret Data
2009/08/10
Deciphered Date
2010/08/10
Title
SCHEMATICS,MB A5511
Custom
Date:
Rev
C
401762

G
Sheet
12
of
H
60
C768
18P_0402_50V8J
2
1
RC Delay 18~25mS
close to RAM door
PCH_RTCX1
X2
1
2
J4
@
10K_0603_5%
C369
1U_0603_10V6K
1
2
NC
OSC
NC
OSC
R692
U60A
10M_0402_5%
32.768KHZ_12.5PF_Q13MC14610002
C766
2
1
REV1.0
B13
D13
PCH_RTCX2
D33
B33
C32
A32
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
FWH4 / LFRAME#
C34
LPC_FRAME#
LDRQ0#
LDRQ1# / GPIO23
A34
F34
SERIRQ
AB9
SERIRQ
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
AK7
AK6
AK11
AK9
SATA_DTX_C_PRX_N0
SATA_DTX_C_PRX_P0
SATA_PTX_DRX_N0
SATA_PTX_DRX_P0
SATA_DTX_C_PRX_N0 33
SATA_DTX_C_PRX_P0 33
SATA_PTX_DRX_N0 33
SATA_PTX_DRX_P0 33
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
AH6
AH5
AH9
AH8
SATA_DTX_C_PRX_N1
SATA_DTX_C_PRX_P1
SATA_PTX_DRX_N1
SATA_PTX_DRX_P1
SATA_PTX_DRX_N1 33
SATA_PTX_DRX_P1 33
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
AF11
AF9
AF7
AF6
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
AH3
AH1
AF3
AF1
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
AD9
AD8
AD6
AD5
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
AD3
AD1
AB3
AB1
RTCX1
RTCX2
FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3
2 1M_0402_5%
SM_INTRUDER#
A16
R223 1
2 332K_0402_1% PCH_INTVRMEN
A14
INTVRMEN
HDA_BITCLK_PCH
A30
HDA_BCLK
HDA_SYNC_PCH
D29
HDA_SYNC
R660
41 HDA_RST#_AUDIO
R653
41 HDA_SDOUT_AUDIO
R665
HDA_BITCLK_PCH
2
33_0402_5%
HDA_SYNC_PCH
2
33_0402_5%
HDA_RST#_PCH
2
33_0402_5%
HDA_SDOUT_PCH
2
33_0402_5%
1
1
1
1
PCH_SPKR
38,41 PCH_SPKR
41 HDA_SDIN0
1
1
100K_0402_5%
R321
Q22
2N7002_SOT23
HDA_SDIN0
HDA_SDIN2
F32
HDA_SDIN3
HDA_SDOUT_PCH
B29
HDA_SDO
ME_EN#
H32
HDA_DOCK_EN# / GPIO33
J30
HDA_DOCK_RST# / GPIO13
M3
JTAG_TCK
K3
JTAG_TMS
21 PCH_JTAG_TDI
K1
JTAG_TDI
21 PCH_JTAG_TDO
J2
JTAG_TDO
J4
TRST#
PCH_JTAG_TCK
21 PCH_JTAG_TMS
2
G
3
ME_EN
HDA_RST#
HDA_SDIN1
21 PCH_JTAG_TCK
ME_EN#
C30
G30
F30
GPIO33 can not pull down

(manufacturing environments)
R319
SPKR
E32
+3VS
38
P1
HDA_RST#_PCH
If GPIO33 pull down, ME will not working.

For factory update ME, pull down resistor pull
under door.
INTRUDER#
INTVRMEN - Integrated SUS 1.1V VRM Enable

High - Enable Internal VRs
R655
41 HDA_SYNC_AUDIO
SRTCRST#
R220 1
HDA for AUDIO

41 HDA_BITCLK_AUDIO
D17
21 PCH_JTAG_RST#
IHDA
1
2
J5
@
10K_0603_5%
C370
1U_0603_10V6K
1
2
RTCRST#
PCH_SRTCRST#
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
38
38
38
38
+3VS
LOCAL_DIM
LPC_FRAME# 38
R565
@
1
2
20K_0402_5%
R799
1 @
2
0_0402_5%
LOCAL_DIM
SERIRQ
LOCAL_DIM 30
38
SATA for HDD1
SATA for ODD
2/10 SATA2, SATA3 not support on HM55

C
SATA_DTX_C_PRX_N4
SATA_DTX_C_PRX_P4
SATA_PTX_DRX_N4
SATA_PTX_DRX_P4
SATA_PTX_DRX_N4 37
SATA_PTX_DRX_P4 37
SATA for eSATA
+1.05VS
JTAG
close to RAM door
C14
LPC
+RTCVCC
RC Delay 18~25mS
PCH_RTCRST#
SATA
PCH_SRTCRST#
1
2
R221
20K_0402_1%
RTC
18P_0402_50V8J
+RTCVCC
PCH_RTCRST#
1
2
R222
20K_0402_1%
+RTCVCC
SATAICOMPO
AF16
SATAICOMPI
AF15
SATA_COMP
R208 1
2 37.4_0402_1%
R272 1
2 10K_0402_5%
100K_0402_5%
PCH_SPKR
PCH_SPI_CS1#
SERIRQ
PCH_SPI_MOSI_1 R736
PCH_SPI_MOSI_2 R737
PCH_SPI_MISO_1 R734
PCH_SPI_MISO_2 R733
Have internal PD
R738 1
+3VS
2 0_0402_5%
2 0_0402_5%
2 15_0402_5%
PCH_SPI_CLK
PCH_SPI_CS0#_R AV3
SPI_CS0#
2 15_0402_5%
PCH_SPI_CS1#_R AY3
SPI_CS1#
15_0402_5%
15_0402_5%
33_0402_5%
33_0402_5%
PCH_SPI_MOSI AY1
SPI_MOSI
PCH_SPI_MISO AV1
SPI_MISO
BA2
SPI_CLK
PCH_SATALED#
SATALED#
T3
SATA0GP / GPIO21
Y9
R292 1
2 10K_0402_5%
SATA1GP / GPIO19
V1
R268 1
2 10K_0402_5%
PCH_SATALED# 40
@
@
2
2
2
2
IBEXPEAK-M_FCBGA107
UMA@
+3V
PCH_GPIO21 21
PCH_GPIO19 21
+1.05VS
R728 1
R722 1
R725 1
R719 1
R716 1
R713 1
PCH_JTAG_TDO
R718 1
R715 1
R712 1
PCH_JTAG_TDI
PCH_JTAG_RST#
R278 1
R304 1
R303 1
2 51_0402_5%
2 200_0402_5%
2 100_0402_5%
2 51_0402_5%
2 200_0402_5%
2 100_0402_5%
2 51_0402_5%
2 200_0402_5%
2 100_0402_5%
R269
U31
2008 Intel MOW36/MOW50
TDO:
Reserved on ES1 Sample
Mount R516, R517 on ES2 Sample
+3VS
R325 1
R326 1
@
@
2 3.3K_0402_5%
2 3.3K_0402_5%
PCH_SPI_CS1#
SPI_WP2#
SPI_HOLD2#
1
3
7
4
CS#
WP#
HOLD#
GND
8
6
5
2
VCC
SCLK
SI
SO
R307
10K_0402_5%
+3VS
PCH_JTAG_TMS
+3VS
B
1
1
1
1
1
2
R295
10K_0402_5%
10K_0402_5%
PCH_SPI_CLK_1 R739 1
PCH_SPI_CLK_2 R724 1
PCH_SPI_CS0# R735 1
R287
1K_0402_5%
@
1
2
SPI
+3VS
PCH_SPI_CLK_2
PCH_SPI_MOSI_2
PCH_SPI_MISO_2
S IC FL 32M MX25L3205DM2I-12G SOP 8P

SA000021A00
@
MP mount R689, R690,

R691, R692 and remove
others
+3VS
U32
2 51_0402_5%
2 20K_0402_5%
2 10K_0402_5%
+3VS
R328 1
R329 1
2 3.3K_0402_5%
2 3.3K_0402_5%
PCH_SPI_CS0#
SPI_WP1#
SPI_HOLD1#
1
3
7
4
CS#
WP#
HOLD#
GND
VCC
SCLK
SI
SO
8
6
5
2
PCH_SPI_CLK_1
PCH_SPI_MOSI_1
PCH_SPI_MISO_1
S IC FL 32M MX25L3205DM2I-12G SOP 8P

SA000021A00
SPI ROM Footprint 150mil

+3VS
PCH_SPI_MOSI
R732
2 1K_0402_5%
enable iTPM: SPI_MOSI High
PCH_JTAG_TCK
2009/08/10
Issued Date
Deciphered Date
2010/08/10
Title
SCHEMATICS,MB A5511
Custom
R277
2 4.7K_0402_5%
CRB 1.0 Change to 4.7K
Compal Secret Data
Date:
Rev
C
401762
Sheet
1
13
of
60
U60B
AK48
AK47
R323 1
2 0_0402_5%
R564 1
R563 1
2 0_0402_5%
2 0_0402_5%
CLK_PCIE_MINI1#_R
CLK_PCIE_MINI1_R
PCH_GPIO73
AM43
AM45
R273 1
2 0_0402_5%
PCH_GPIO18
U4
P9
AM47
AM48
PCH_GPIO20
2 0_0402_5%
For Mini2
B
33 CLK_PCIE_MINI2#
33 CLK_PCIE_MINI2
R578 1
R579 1
2 0_0402_5%
2 0_0402_5%
33 CLK_PCIE_READER#
33 CLK_PCIE_READER
For CardReader
R577 1
R576 1
2 0_0402_5%
2 0_0402_5%
AH42
AH41
PCH_GPIO25
A8
CLK_PCIE_MINI2#_R
CLK_PCIE_MINI2_R
AM51
AM53
MINI2_CLKREQ#_1
M9
CLK_PCIE_READER#_R
CLK_PCIE_READER_R
AJ50
AJ52
H6
AK53
AK51
PCH_GPIO56
P13
+3VS
CLKOUT_DP_N / CLKOUT_BCLK1_N
CLKOUT_DP_P / CLKOUT_BCLK1_P
AT1
AT3
CLK_CPU_DP# 5
CLK_CPU_DP 5
CLKOUT_PCIE0N
CLKOUT_PCIE0P
PCIECLKRQ0# / GPIO73
CLKOUT_PCIE1N
CLKOUT_PCIE1P
CLKOUT_PCIE2N
CLKOUT_PCIE2P
CLK_BUF_CPU_DMI# 12
CLK_BUF_CPU_DMI 12
CLKIN_BCLK_N
CLKIN_BCLK_P
AP3
AP1
CLK_BUF_CPU_BCLK# 12
CLK_BUF_CPU_BCLK 12
CLKIN_DOT_96N
CLKIN_DOT_96P
F18
E18
CLK_BUF_DREF_96M# 12
CLK_BUF_DREF_96M 12
AH13
AH12
CLK_BUF_PCIE_SATA# 12
CLK_BUF_PCIE_SATA 12
REFCLK14IN
P41
CLK_BUF_ICH_14M
CLKIN_PCILOOPBACK
J42
CLK_PCI_FB 17
CLKIN_SATA_N / CKSSCD_N
CLKIN_SATA_P / CKSSCD_P
EC_SMB_CK2
EC_SMB_CK2 24,38
Q19
2N7002_SOT23
AW24
BA24
CLKIN_DMI_N
CLKIN_DMI_P
PCH_SML1CLK
+3VS
PCH_SML1DAT
EC_SMB_DA2
EC_SMB_DA2 24,38
Q17
2N7002_SOT23
CLKOUT_PCIE3N
CLKOUT_PCIE3P
XTAL25_IN
XTAL25_OUT
AH51
AH53
XCLK_RCOMP
AF38
CLKOUT_PCIE4N
CLKOUT_PCIE4P
CLKOUT_PCIE5N
CLKOUT_PCIE5P
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
PEG_B_CLKRQ# / GPIO56
12
R571 1 DIS@
0_0402_5%
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
R166 1
R704 1
R682 1
R246 1
2 10K_0402_5%
2 2.2K_0402_5%
2 2.2K_0402_5%
PCH_GPIO60
R216 1
2 10K_0402_5%
PCH_SML1CLK
PCH_SML1DAT
R241 1
R234 1
2 2.2K_0402_5%
2 2.2K_0402_5%
PCH_GPIO74
R215 1
2 10K_0402_5%
PCH_GPIO44
PCH_GPIO56
PCH_GPIO73
R256 1
R214 1
R316 1
2 10K_0402_5%
2 10K_0402_5%
2 10K_0402_5%
C681 UMA@
27P_0402_50V8J
1
2
2 90.9_0402_1%
R593
1M_0402_5%
UMA@
+1.05VS
+3VS
CLKOUTFLEX0 / GPIO64
T45
P43 PROJECT_ID1
R150 1
R145 1
2 10K_0402_5%
2 10K_0402_5%
T42
PROJECT_ID0
R151 1
R165 1
2 10K_0402_5%
2 10K_0402_5%
N50
Y4
25MHZ_20PF_7A25000012
UMA@
Project Port ID
2
UMA@
C682
27P_0402_50V8J
+3VS
+3VS
+3V
R347
10K_0402_5%
@
1
EC_LID_OUT#
PCH_SMBCLK
PCH_SMBDATA
Project ID
ID1
ID0
0
0
0
1
R348
10K_0402_5%
Project
JV
Future
Q23
2N7002_SOT23
@
1
33 MINI2_CLKREQ#
2009/08/10
Issued Date
Deciphered Date
2010/08/10
MINI2_CLKREQ#_1
A
R346
2 0_0402_5%
Title
SCHEMATICS,MB A5511
Custom
Date:
R345
10K_0402_5%
@
Compal Secret Data
2
+3VS
+3V
2 10K_0402_5%
PEG_CLKREQ# 24
R243 1
CLK_CPU_DMI# 5
CLK_CPU_DMI 5
PCH_GPIO25
+3VS
CLKOUT_DMI_N
CLKOUT_DMI_P
IBEXPEAK-M_FCBGA107
UMA@
2 10K_0402_5%
2 10K_0402_5%
9/1: Change to +3VS
PERN8
PERP8
PETN8
PETP8
R342
2.2K_0402_5%
DIS@
R793
1 @
2
0_0402_5%
R104
2.2K_0402_5%
CLK_PEG_VGA# 23
CLK_PEG_VGA 23
Layout guide 1.52 update
CLK_PCIE_CARD#_R
CLK_PCIE_CARD_R
PCH_GPIO44
MINI1_CLKREQ# R285 1
PCH_GPIO20
R275 1
AD43
AD45
AN4
AN2
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
R235 1
PERN7
PERP7
PETN7
PETP7
PEG_CLKREQ#_R
36 EXP_CLKREQ#
H1
2 0_0402_5%
2 0_0402_5%
PEG_A_CLKRQ# / GPIO47
Q21
2N7002_SOT23
SG@
R156 1
R162 1
36 CLK_PCIE_CARD#
36 CLK_PCIE_CARD
For NEWCRAD
N4
T9
21 PCH_GPIO20
CL_RST1#
R279
10K_0402_5%
@
33 MINI1_CLKREQ#
21 PCH_GPIO18
CLK_PCIE_LAN#_R
CLK_PCIE_LAN_R
T11
33 CLK_PCIE_MINI1#
33 CLK_PCIE_MINI1
For Wireless LAN
2 0_0402_5%
2 0_0402_5%
CL_DATA1
R264
10K_0402_5%
SG@
2 2
34 LAN_CLKREQ#
R562 1
R561 1
T13
18,21,40,45
+3VS_DELAY
R341
SG@
10K_0402_5%
34 CLK_PCIE_LAN#
34 CLK_PCIE_LAN
For PCIE LAN
CL_CLK1
DGPU_PWR_EN
@
R305
10K_0402_5%
+3V
BG34
BJ34
BG36
BJ36
PCH_SML1DAT
2/10 PCIE7, PCIE8 not support on HM55
SML1DATA / GPIO75
G12
2
G
AT34
AU34
AU36
AV36
SML1CLK / GPIO58
PCH_SML1CLK
2
G
PERN6
PERP6
PETN6
PETP6
PCH_GPIO74
E10
BA34
AW34
BC34
BD34
M14
C747 2
C744 2
+3VS_DELAY
SML1ALERT# / GPIO74
PERN5
PERP5
PETN5
PETP5
C6
G8
BF33
BH33
BG32
BJ32
SML0CLK
SML0DATA
1
1
PCIE_DTX_C_PRX_N5
PCIE_DTX_C_PRX_P5
0.1U_0402_16V7K
PCIE_PTX_DRX_N5
0.1U_0402_16V7K
PCIE_PTX_DRX_P5
PCH_GPIO60
2
G
For CardReader
C750 2
C748 2
PCH_SMBDATA 12,21,33,36
J14
PERN4
PERP4
PETN4
PETP4
PCH_SMBCLK 12,21,33,36
PCH_SMBDATA
BA32
BB32
BD32
BE32
PCH_SMBCLK
1
1
PCIE_DTX_C_PRX_N4
PCIE_DTX_C_PRX_P4
0.1U_0402_16V7K
PCIE_PTX_DRX_N4
0.1U_0402_16V7K
PCIE_PTX_DRX_P4
H14
C8
PCIE_DTX_C_PRX_N5
PCIE_DTX_C_PRX_P5
PCIE_PTX_C_DRX_N5
PCIE_PTX_C_DRX_P5
For Mini2
C740 2
C745 2
SML0ALERT# / GPIO60
1. Connect Directly
EXPRESS CARD, MINI1, MINI2
2. Level Shift1, Pull-Up to +3VS
CLOCK GEN, DIMM1, DIMM2
LAN
CPU & PCH XDP
EC_LID_OUT# 38
33
33
33
33
PERN3
PERP3
PETN3
PETP3
EC_LID_OUT#
PCIE_DTX_C_PRX_N4
PCIE_DTX_C_PRX_P4
PCIE_PTX_C_DRX_N4
PCIE_PTX_C_DRX_P4
AU30
AT30
AU32
AV32
B9
33
33
33
33
1
1
PCIE_DTX_C_PRX_N3
PCIE_DTX_C_PRX_P3
0.1U_0402_16V7K
PCIE_PTX_DRX_N3
0.1U_0402_16V7K
PCIE_PTX_DRX_P3
PERN2
PERP2
PETN2
PETP2
SMBus
PCIE_DTX_C_PRX_N3
PCIE_DTX_C_PRX_P3
PCIE_PTX_C_DRX_N3
PCIE_PTX_C_DRX_P3
1
1
SMBCLK
SMBDATA
Link
For NEWCRAD
36
36
36
36
C752 2
C753 2
PCIE_DTX_C_PRX_N2 AW30
PCIE_DTX_C_PRX_P2 BA30
0.1U_0402_16V7K
PCIE_PTX_DRX_N2 BC30
0.1U_0402_16V7K
PCIE_PTX_DRX_P2 BD30
SMBALERT# / GPIO11
Controller
PCIE_DTX_C_PRX_N2
PCIE_DTX_C_PRX_P2
PCIE_PTX_C_DRX_N2
PCIE_PTX_C_DRX_P2
1
1
PERN1
PERP1
PETN1
PETP1
PEG
33
33
33
33
2
2
BG30
BJ30
BF29
BH29
PCI-E*
For Wireless LAN
C751
C749
REV1.0
PCIE_DTX_C_PRX_N1
PCIE_DTX_C_PRX_P1
0.1U_0402_16V7K
PCIE_PTX_DRX_N1
0.1U_0402_16V7K
PCIE_PTX_DRX_P1
From CLK BUFFER
For PCIE LAN
PCIE_DTX_C_PRX_N1
PCIE_DTX_C_PRX_P1
PCIE_PTX_C_DRX_N1
PCIE_PTX_C_DRX_P1
Clock Flex
34
34
34
34
Rev
C
401762
Sheet
1
14
of
60
DMI_PTX_HRX_N[0..3]
4 DMI_PTX_HRX_N[0..3]
DMI_PTX_HRX_P[0..3]
4 DMI_PTX_HRX_P[0..3]
H_FDI_TXN[0..7]
DMI_HTX_PRX_N0 BC24
DMI_HTX_PRX_N1 BJ22
DMI_HTX_PRX_N2 AW20
DMI_HTX_PRX_N3 BJ20
+3V
+1.05VS
R656
49.9_0402_1%
1<BOM Structure>
2
DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP
DMI_PTX_HRX_N0
DMI_PTX_HRX_N1
DMI_PTX_HRX_N2
DMI_PTX_HRX_N3
BE22
BF21
BD20
BE18
DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN
DMI_PTX_HRX_P0
DMI_PTX_HRX_P1
DMI_PTX_HRX_P2
DMI_PTX_HRX_P3
BD22
BH21
BC20
BD18
DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP
BH25
DMI_COMP
5,21 XDP_DBRESET#
1 0_0402_5%
1 0_0402_5%
PWROK
MEPWROK
A10
LAN_RST#
DRAMPWROK
C16
RSMRST#
SUS_PWR_ACK
M1
PBTN_OUT#
P5
BH13
H_FDI_FSYNC1
FDI_LSYNC0
BJ12
H_FDI_LSYNC0
FDI_LSYNC1
BG14
H_FDI_LSYNC1
PCH_ACIN
P7
ACPRESENT / GPIO31
PCH_GPIO72
A6
BATLOW# / GPIO72
J12
PCH_PCIE_WAKE#
CLKRUN# / GPIO32
Y1
PM_CLKRUN#
SUS_STAT# / GPIO61
P8
PCH_GPIO61
PAD
T8
PCH_GPIO62
PAD
T10
PWRBTN#
PCH_PCIE_WAKE#
33,34,36
PM_CLKRUN# 38
SUSCLK / GPIO62
F3
SLP_S5# / GPIO63
E4
PM_SLP_S5# 38
SLP_S4#
H7
PM_SLP_S4# 38
SLP_S3#
P12
SLP_M#
K8
PM_SLP_M#
PAD
T9
TP23
N2
PM_SLP_DSW# @
PAD
T19
SUS_PWR_DN_ACK / GPIO30
1
R315
38
FDI_FSYNC1
PM_SLP_S3# 38
@
1 0_0402_5%
R676 2
Q63
MMBT3906_SOT23-3
PCH_RSMRST#
1
3
EC_RSMRST# 38
ACIN_BUF
H_FDI_FSYNC0
SYS_PWROK
PCH_RSMRST#
24,38
H_FDI_INT
M6
D9
5,21,38 PBTN_OUT#
2
100K_0402_5%
2
D17
CH751H-40PT_SOD323-2
BJ14
BF13
SYS_PWROK_R
5 PM_DRAM_PWRGD
FDI_INT
WAKE#
K5
FDI_FSYNC0
DMI_IRCOMP
B17
38 SUS_PWR_ACK
H_FDI_TXP0
H_FDI_TXP1
H_FDI_TXP2
H_FDI_TXP3
H_FDI_TXP4
H_FDI_TXP5
H_FDI_TXP6
H_FDI_TXP7
SYS_RESET#
1 ME_PWROK
0_0402_5%
10/2 Intel suggestion change to 10K
BB18
BF17
BC16
BG16
AW16
BD14
BB14
BD12
T6
LAN_RST#
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
XDP_DBRESET#
SYS_PWROK
2
R301
H_FDI_TXN0
H_FDI_TXN1
H_FDI_TXN2
H_FDI_TXN3
H_FDI_TXN4
H_FDI_TXN5
H_FDI_TXN6
H_FDI_TXN7
EC_SWI#
EC_SWI#
F14
PMSYNCH
RI#
SLP_LAN# / GPIO29
BJ10
F6
H_PM_SYNC 5
2
B
R289 2
R288 2
BA18
BH17
BD16
BJ16
BA16
BE14
BA14
BC12
SYS_PWROK
VGATE
DMI_ZCOMP
BF25
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
R681
10K_0402_5%
PM_SLP_LAN#
1
R194
IBEXPEAK-M_FCBGA107
UMA@
2
4.7K_0402_5%
+3V
D14A
SUS_PWR_ACK
2
10K_0402_5%
PCH_GPIO72
2
8.2K_0402_5%
EC_SWI#
2
10K_0402_5%
PCH_PCIE_WAKE#
2
1K_0402_5%
PM_SLP_LAN#
2
10K_0402_5%
BD24
BG22
BA20
BG20
FDI
PM_CLKRUN#
2
8.2K_0402_5%
XDP_DBRESET#
2
10K_0402_5%
DMI_HTX_PRX_P0
DMI_HTX_PRX_P1
DMI_HTX_PRX_P2
DMI_HTX_PRX_P3
DMI
+3VS
+3V
REV1.0
DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN
U60C
H_FDI_TXP[0..7]
4 H_FDI_TXP[0..7]
System Power Management
4 H_FDI_TXN[0..7]
D
DMI_HTX_PRX_P[0..3]
4 DMI_HTX_PRX_P[0..3]
1
R276
1
R709
1
R195
1
R245
1 @
R252
DMI_HTX_PRX_N[0..3]
4 DMI_HTX_PRX_N[0..3]
1
R283
1 @
R309
1
6
2
EC_PWROK
VGATE
4
3
EC_PWROK 38
VGATE
12,56
P
SYS_PWROK
D14B
U27
2
R204
2.2K_0402_5%
BAV99DW-7_SOT363
21
SYS_PWROK
BAV99DW-7_SOT363
+3VS
SYS_PWROK
1
R296
2
10K_0402_5%
EC_PWROK
1
R311
2
10K_0402_5%
LAN_RST#
1
R698
2
10K_0402_5%
Compal Secret Data
2009/08/10
Issued Date
Deciphered Date
2010/08/10
Title
SCHEMATICS,MB A5511
Custom
No used Integrated LAN,

connecting LAN_RST# to GND
Date:
Rev
C
401762
Sheet
1
15
of
60
U60D
30 DPST_PWM
30 PCH_LCD_CLK
30 PCH_LCD_DATA
R119 1
2 100K_0402_5% IGPU_BKLT_EN
11/21 intel JIM suggest Pull high at LVDS Conn

R110 1
2 2.2K_0402_5%
PCH_LCD_CLK
R113 1
2 2.2K_0402_5%
PCH_LCD_DATA
2 10K_0402_5%
LCTLA_CLK
R111 1
R112 1
2 10K_0402_5%
LCTLB_DATA
R590 1
2 2.2K_0402_5%
PCH_CRT_CLK
R589 1
2 2.2K_0402_5%
PCH_CRT_DATA
R581
R582
LCTLA_CLK
LCTLB_DATA
AB46
V48
L_CTRL_CLK
L_CTRL_DATA
AP39
AP41
LVD_IBG
LVD_VBG
LVD_VREF
AT43
AT42
LVD_VREFH
LVD_VREFL
30 PCH_TXOUT030 PCH_TXOUT130 PCH_TXOUT230 PCH_TXOUT0+

30 PCH_TXOUT1+
30 PCH_TXOUT2+
30 PCH_TZCLK30 PCH_TZCLK+
PCH_CRT_B
150_0402_1%
PCH_CRT_G
150_0402_1%
PCH_CRT_R
150_0402_1%
L_DDC_CLK
L_DDC_DATA
R153 1 UMA@ 2
0_0402_5%
30 PCH_TZOUT0+
30 PCH_TZOUT1+
30 PCH_TZOUT2+
L_BKLTCTL
AB48
Y45
LVDS_IBG
30 PCH_TZOUT030 PCH_TZOUT130 PCH_TZOUT2-
R580
Y48
PCH_LCD_CLK
PCH_LCD_DATA
R163 1 UMA@ 2
2.37K_0402_1%
30 PCH_TXCLK30 PCH_TXCLK+
+3VS
L_BKLTEN
L_VDD_EN
31 PCH_CRT_B
31 PCH_CRT_G
31 PCH_CRT_R
PCH_TXCLKPCH_TXCLK+
AV53
AV51
LVDSA_CLK#
LVDSA_CLK
PCH_TXOUT0PCH_TXOUT1PCH_TXOUT2-
BB47
BA52
AY48
AV47
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
PCH_TXOUT0+
PCH_TXOUT1+
PCH_TXOUT2+
BB48
BA50
AY49
AV48
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
PCH_TZCLKPCH_TZCLK+
AP48
AP47
LVDSB_CLK#
LVDSB_CLK
PCH_TZOUT0PCH_TZOUT1PCH_TZOUT2-
AY53
AT49
AU52
AT53
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
PCH_TZOUT0+
PCH_TZOUT1+
PCH_TZOUT2+
AY51
AT48
AU50
AT51
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3
PCH_CRT_B
PCH_CRT_G
PCH_CRT_R
AA52
AB53
AD53
CRT_BLUE
CRT_GREEN
CRT_RED
PCH_CRT_CLK
PCH_CRT_DATA
31 PCH_CRT_CLK
31 PCH_CRT_DATA
31 PCH_CRT_HSYNC
31 PCH_CRT_VSYNC
CRT_DDC_CLK
CRT_DDC_DATA
Y53
Y51
CRT_HSYNC
CRT_VSYNC
DAC_IREF
CRT_IRTN
BJ46
BG46
SDVO_STALLN
SDVO_STALLP
BJ48
BG48
SDVO_INTN
SDVO_INTP
BF45
BH45
T51
T53
SDVO_SCLK 32
SDVO_SDATA 32
R168 1 UMA@ 2 100K_0402_5%
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
BG44
BJ44
AU38
PCH_DPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
BD42
BC42
BJ42
BG42
BB40
BA40
AW38
BA38
PCH_DPB_N0
PCH_DPB_P0
PCH_DPB_N1
PCH_DPB_P1
PCH_DPB_N2
PCH_DPB_P2
PCH_DPB_N3
PCH_DPB_P3
DDPC_CTRLCLK
DDPC_CTRLDATA
Y49
AB49
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
BE44
BD44
AV40
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36
PCH_DPB_HPD
C715
C726
C697
C700
C727
C729
C710
C713
2
2
2
2
2
2
2
2
1
1
1
1
1
1
1
1
UMA@
UMA@
UMA@
UMA@
UMA@
UMA@
UMA@
UMA@
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
32
PCH_TMDS_D2# 32
PCH_TMDS_D2 32
PCH_TMDS_D1# 32
PCH_TMDS_D1 32
PCH_TMDS_D0# 32
PCH_TMDS_D0 32
PCH_TMDS_CK# 32
PCH_TMDS_CK 32
HDMI D2
HDMI D1
HDMI D0
HDMI CLK
DDPD_CTRLCLK
DDPD_CTRLDATA
V51
V53
CRT_IREF AD48
AB51
REV1.0
U50
U52
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
BC46
BD46
AT38
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36
IBEXPEAK-M_FCBGA107
UMA@
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_CTRLCLK
SDVO_CTRLDATA
Digital Display Interface
PCH_ENVDD
CRT
30
T48
T47
LVDS
IGPU_BKLT_EN
R143
1K_0402_0.5%
2/3 Change to 1K_0402_0.5% from Intel

Suggestion. (EDS 1.0 is incorrect)
+3VS_DELAY
R61
2.2K_0402_5%
@
U18
+5VS
C176
SG@
0.1U_0402_16V4Z
2
IGPU_BKLT_EN
30 PWMSEL_1#
30 IGPU_PWM_SELECT#
2
5
1
7
1A
2A
1OE#
2OE#
VCC
1B
2B
GND
8
3
6
4
ENBKL
ENBKL
SN74CBTD3306CPWR_TSSOP8
SG@
R78
100K_0402_5%
38
24 DGPU_BKL_EN
IGPU_BKLT_EN
R90
1 UMAO@ 2 0_0402_5%
ENBKL
DGPU_BKL_EN
R71
1 DIS@
2 0_0402_5%
Deciphered Date
2010/08/10
Title
SCHEMATICS,MB A5511
Custom
Reserved for DIS Only

5
2009/08/10
Issued Date
ENBKL
Compal Secret Data
Reserved for UMA Only
Date:
Rev
C
401762
Sheet
1
16
of
60
R624
R625
R602
R613
2
2
2
2
1
1
1
1
2
2
2
2
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
PCI_FRAME#
PCI_REQ1#
PCI_PIRQH#
PCI_TRDY#
REQ0#
REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54
PCI_GNT0#
PCI_GNT1#
DGPU_PWMSEL#
PCI_GNT3#
F48
K45
F36
H53
GNT0#
GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55
30 DGPU_PWMSEL#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
B41
K53
A36
A48
PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5
36
PCI_RST#
5,21,34,38 PLT_RST#
R588
R141
1
1
2 22_0402_5%
2 22_0402_5%
PCI_RST#
K6
SERR#
PERR#
PCI_IRDY#
PCI_DEVSEL#
PCI_FRAME#
A42
H44
F46
C46
IRDY#
PAR
DEVSEL#
FRAME#
PCI_PLOCK#
D49
PLOCK#
PCI_STOP#
PCI_TRDY#
D41
C48
STOP#
TRDY#
M7
PME#
CLK_PCI_LPC_R
CLK_PCI_FB_R
D5
2008/1/6 2009MOW01 change to 22 ohm
Boot BIOS Strap

PCI_GNT#0
PCI_GNT#1
Boot BIOS Location
LPC
Reserved (NAND)
PCI
SPI
NV_ALE
NV_CLE
NV_RCOMP
AU2
NV_RCOMP
NV_RB#
AV7
NV_RB#
NV_WR#0_RE#
NV_WR#1_RE#
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
+3VS
U30
2 B
PLT_RST#
2 32.4_0402_1%
U29
2 B
18 DGPU_HOLD_RST#
NV_WE#_CK0
NV_WE#_CK1
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24
USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USBRBIAS#
B25
USB_BIAS
USBRBIAS
D25
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14
N16
J16
F16
L16
E14
G16
F12
T15
R340 1 VGA@
100_0402_5%
USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
37
37
37
37
37
37
30
30
33
33
33
33
USB20_N8 37
USB20_P8 37
PLTRST#
CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4
PCI_GNT0#
R123 1
2 1K_0402_5%
PCI_GNT1#
R149 1
2 1K_0402_5%
PCI_GNT3#
R585 1
2 1K_0402_5%
Have internal PU
Have internal PU
USB/B
eSATA USB Conn.
CMOS Camera (LVDS)
EHCI 1
Danbury Technology Enabled
Mini Card(WLAN)
Mini Card(Mini2)
High = Enabled
Low = Disabled
USB Conn.(HS) JUSB2

DMI Termination Voltage
USB20_N10
USB20_P10
USB20_N11
USB20_P11
USB20_N12
USB20_P12
USB20_N10
USB20_P10
USB20_N11
USB20_P11
USB20_N12
USB20_P12
36
36
39
39
36
36
Bluetooth
Set to Vss when LOW
NV_CLE
EHCI 2
Fingerprint
Set to Vcc when HIGH
NEWCARD
1
2
R188
22.6_0402_1%
USB_OC#0_R
USB_OC#1_R
USB_OC#2_R
USB_OC#3_R
USB_OC#4_R
USB_OC#5_R
USB_OC#6_R
USB_OC#7_R
R664 1
R668 1
R253 1
2 0_0402_5%
2 0_0402_5%
2 0_0402_5%
R677 1
2 0_0402_5%
(For USB Port0)

(For USB Port1)
(For eSATA USB Port)
USB_OC#0 37
USB_OC#1 37
USB_OC#2 37
USB_OC#3_R 21
USB_OC#4 37
USB_OC#5_R 21
USB_OC#6_R 21
USB_OC#7_R 21
USB_OC#0_R
USB_OC#1_R
USB_OC#2_R
USB_OC#4_R
USB_OC#0_R
USB_OC#1_R
USB_OC#2_R
USB_OC#4_R
21
21
21
21
(For USB Port8)

RP13
USB_OC#3_R
USB_OC#5_R
USB_OC#7_R
USB_OC#6_R
OC[0..3] use for EHCI 1

OC[4..7] use for EHCI 2
1
2
3
4
8
7
6
5
+3V
10K_1206_8P4R_5%
Compal Secret Data
2009/08/10
Issued Date
Deciphered Date
2010/08/10
Title
SCHEMATICS,MB A5511
Custom
4
PLTRST_VGA# 23
USB Conn.(HS) JUSB1
NV_ALE
USB20_N8
USB20_P8
R339
100K_0402_5%
VGA@
NV_WE#_CK0 22
NV_WE#_CK1 22
Date:
PLT_RST_BUF# 33
R338
100K_0402_5%
Y
A
VGA@
NV_RE#_WR#0 22
NV_RE#_WR#1 22
AV11
BF5
+3VS
R765
0_0402_5%
DIS@
NV_RB# 22
AY8 NV_RE#_WR#0
AY5 NV_RE#_WR#1
Y
A
NV_ALE 22
NV_CLE 22
R731 1
2 1K_0402_5%
2 1K_0402_5%
Have internal PU
Swap Override jumper
Low = A16 swap

High = Default
BD3
AY6
NV_DQ0
NV_DQ1
NV_DQ2
NV_DQ3
NV_DQ4
NV_DQ5
NV_DQ6
NV_DQ7
NV_DQ8
NV_DQ9
NV_DQ10
NV_DQ11
NV_DQ12
NV_DQ13
NV_DQ14
NV_DQ15
IBEXPEAK-M_FCBGA107
UMA@
A16 swap override Strap/Top-Block
PCI_GNT#3
PCIRST#
E44
E50
N52
P53
P46
P51
P48
NV_ALE
NV_CLE
NV_WE#_CK0
NV_WE#_CK1
PCI_SERR#
PCI_PERR#
PLT_RST#
NV_DQ0
NV_DQ1
NV_DQ2
NV_DQ3
NV_DQ4
NV_DQ5
NV_DQ6
NV_DQ7
NV_DQ8
NV_DQ9
NV_DQ10
NV_DQ11
NV_DQ12
NV_DQ13
NV_DQ14
NV_DQ15
@
@
F51
A46
B45
M53
AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6
R721 1
R240 1
PCI_REQ0#
PCI_REQ1#
DGPU_SELECT#
PCI_REQ3#
NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11
NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15
NV_ALE
NV_CLE
PIRQA#
PIRQB#
PIRQC#
PIRQD#
NV_DQS0 22
NV_DQS1 22
G38
H51
B37
A44
NV_DQS0
NV_DQS1
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
AV9
BG8
C/BE0#
C/BE1#
C/BE2#
C/BE3#
PCI_IRDY#
PCI_PIRQD#
DGPU_SELECT#
PCI_DEVSEL#
30,31,32 DGPU_SELECT#
38 CLK_PCI_LPC
14
CLK_PCI_FB
J50
G42
H47
G34
PCI_REQ0#
PCI_PIRQB#
PCI_PIRQF#
PCI_REQ3#
NV_DQS0
NV_DQS1
+VCCQ_NAND
1
1
1
1
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
NV_CE#0 22
NV_CE#1 22
2
2
2
2
PCI_PLOCK#
PCI_PERR#
PCI_PIRQE#
PCI_STOP#
NV_CE#0
NV_CE#1
1
1
1
1
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
NVRAM
2
2
2
2
AY9
BD1
AP15
BD8
R630
R628
R626
R146
1
1
1
1
NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3
R583
R584
R586
R587
2
2
2
2
REV1.0
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
PCI_PIRQA#
PCI_PIRQG#
PCI_PIRQC#
PCI_SERR#
USB
R592
R147
R636
R634
1
1
1
1
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
PCI
R148
R652
R650
R595
H40
N34
C44
A38
C36
J34
A40
D45
E36
H48
E40
C40
M48
M45
F53
M40
M43
J36
K48
F40
C42
K46
M51
J52
K51
L34
F42
J40
G46
F44
M47
H36
U60E
+3VS
Rev
C
401762
Sheet
1
17
of
60
+3VS
U60F
2 10K_0402_5% PCH_GPIO57
R247 1
2 10K_0402_5% EC_SMI#
R310 1
2 1K_0402_5% PCH_GPIO15
10/7 Not Use PCH_GPIO15 PU 1K to +3V
R308
R244
R262
R258
1
1
1
1
2
2
2
2
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
EC_SMI#
PCH_GPIO28
CP_PE#
RST_GATE
PCH_GPIO45
30 COLOR_ENG_EN
R152 1
0_0402_5%
33
2 10K_0402_5%
PCH_GPIO37
R155 1 @
2 10K_0402_5% DGPU_PWROK_BUF_R
R291 1
2 10K_0402_5% PCH_GPIO35
D37
TACH2 / GPIO6
EC_SCI#
J32
TACH3 / GPIO7
EC_SMI#
F10
CP_PE#
K9
1 R224
2DGPU_HOLD_RST#_R
0_0402_5% UMA@
DGPU_PWROK_BUF_R
2
CR_CPPE#
CR_CPPE#
PCH_SATA1_CE#
37 PCH_SATA1_CE#
(Rev:1.0 GPIO24 Only)
21 PCH_GPIO28
COLOR_ENG_EN
CR_WAKE#
2 10K_0402_5% PCH_GPIO27
GPIO27 (Have internal Pull-High)

High: VCCVRM VR Enable
Low: VCCVRM VR Disable
2
R266
10K_0402_5%
CRT_DET#
2
Q20G
2N7002_SOT23
1
31
CRT_DET
High: CRT Plugged
AF48
AF47
EC_GA20
A20GATE
EC_GA20
U2
EC_GA20 38
SATA4GP / GPIO16
CLKOUT_BCLK0_N / CLKOUT_PCIE8N
AM3
CLK_CPU_BCLK# 5
F38
TACH0 / GPIO17
CLKOUT_BCLK0_P / CLKOUT_PCIE8P
AM1
CLK_CPU_BCLK 5
Y7
SCLOCK / GPIO22
AB12
GPIO27
V13
GPIO28
PCH_GPIO34
M11
STP_PCI# / GPIO34
PCH_GPIO35
V6
PECI
RCIN#
BG10
R286 1
2 10K_0402_5%
EC_KBRST# R284 1
2 10K_0402_5%
PROCPWRGD
BE10
THRMTRIP#
BD10
H_PECI 5
EC_KBRST#
T1
EC_KBRST# 38
H_CPUPWRGD
THRMTRIP_PCH#
2
R233
1
56_0402_5%
H_THERMTRIP#
2
R232
H_THERMTRIP# 5
1
56_0402_5%
+1.1VS_VTT
SATACLKREQ# / GPIO35
AB7
SATA2GP / GPIO36
TP1
BA22
AB13
SATA3GP / GPIO37
TP2
AW22
V3
SLOAD / GPIO38
TP3
BB22
P3
SDATAOUT0 / GPIO39
TP4
AY45
PCH_GPIO45
H3
TP5
AY46
RST_GATE
F1
TP6
AV43
PCH_GPIO48
AB6
SDATAOUT1 / GPIO48
TP7
AV45
PCH_TEMP_ALERT#
AA4
SATA5GP / GPIO49
TP8
AF13
F8
+3VS
AA2
A4
A49
A5
A50
A52
A53
B2
B4
B52
B53
BE1
BE53
BF1
BF53
BH1
BH2
BH52
BH53
BJ1
BJ2
BJ4
BJ49
BJ5
BJ50
BJ52
BJ53
D1
D2
D53
E1
E53
+3VS
CLKOUT_PCIE7N
CLKOUT_PCIE7P
GPIO15
PCH_GPIO28
PCH_GPIO57
R282 1 @
LAN_PHY_PWR_CTRL / GPIO12
PCH_GPIO27
1 @ R804 2COLOR_ENG_EN_R
0_0402_5%
CR_WAKE#
21,38 PCH_TEMP_ALERT#
AH45
AH46
GPIO8
GPIO24
PCH_GPIO37
10,11 RST_GATE
T7
CLKOUT_PCIE6N
CLKOUT_PCIE6P
(GPIO8 Should not be Pull-Low)
H10
DGPU_PWR_EN
14,21,40,45 DGPU_PWR_EN
33
R333 1 VGA@
PCH_GPIO6
PCH_GPIO15
21 PCH_GPIO37
C
TACH1 / GPIO1
MISC
38
36 CP_PE#
21 DGPU_HOLD_RST#_R
17 DGPU_HOLD_RST#
40 DGPU_PWROK_BUF
R306 1
EC_SCI#
C38
GPIO57
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
TP9
M18
TP10
N18
TP11
AJ24
TP12
AK41
TP13
AK42
TP14
M32
TP15
N32
TP16
M30
TP17
N30
TP18
H12
TP19
AA23
NC_1
AB45
NC_2
AB38
NC_3
AB42
NC_4
AB41
NC_5
T39
INIT3_3V#
REV1.0
TP24
P6
WW46 Platform/Design Updates

2008/11/17 54.9 1% ->56 5%
C
MAINPWROFF# 49
R239
@ 330_0402_5%
1
2
+1.1VS_VTT
+3V
38
BMBUSY# / GPIO0
DGPU_EDIDSEL#
2
B
Q18
E
2 10K_0402_5% PCH_GPIO34
2 10K_0402_5% EC_SCI#
30 DGPU_EDIDSEL#
Y3
CPU
R302 1
R173 1
CRT_DET
CRT_DET
RSVD
1
2 10K_0402_5% CR_CPPE#
1
2 10K_0402_5% COLOR_ENG_EN_R
1
2 10K_0402_5% CR_WAKE#
1
2 10K_0402_5% DGPU_PWR_EN
UMAO@
1
2 10K_0402_5% PCH_GPIO37
1
2 10K_0402_5% PCH_GPIO48
1
2 10K_0402_5% PCH_TEMP_ALERT#
21
GPIO
R314
R267
R274
R290
R293
R294
R270
2 10K_0402_5% DGPU_EDIDSEL#
2 10K_0402_5% PCH_GPIO6
2 10K_0402_5% DGPU_HOLD_RST#_R
NCTF
R644 1
R649 1
R271 1
2SC2411K_SOT23
@
H_THERMTRIP#
(Have internal PD,

Do not pull high)
@
C10 TP24_SST
PAD T18
IBEXPEAK-M_FCBGA107
UMA@
Compal Secret Data
2009/08/10
Issued Date
Deciphered Date
2010/08/10
Title
SCHEMATICS,MB A5511
Custom
Date:
Rev
C
401762
Sheet
1
18
of
60
+1.05VS
+3VS
Near AB24
Near AB24
Top Side
All Ibex Peak-M Power rails with netnames +1.1VS and
+1.1V rails are actually +1.05VS and +1.05V rails
10U_0805_10V4Z
1
C299
Near AN20
1U_0402_6.3V4Z
1
1
C314
C303
Top Side
1U_0402_6.3V4Z
1
1
C306
1U_0402_6.3V4Z
C313
1U_0402_6.3V4Z
Near AN35
+3VS
Follow Intel suggestion 8/21

0.1U_0402_16V4Z
C294 2
1
LVDS
42mA
1uH inductor, 405mA

Change to 0 ohm
for discrete
+VCCAPLL_FDI
VCCIO[25]
VCCIO[26]
VCCIO[27]
VCCIO[28]
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCIO[34]
VCCIO[35]
VCCIO[36]
VCCIO[37]
VCCIO[38]
VCCIO[39]
VCCIO[40]
VCCIO[41]
VCCIO[42]
VCCIO[43]
VCCIO[44]
VCCIO[45]
VCCIO[46]
VCCIO[47]
VCCIO[48]
VCCIO[49]
VCCIO[50]
VCCIO[51]
VCCIO[52]
VCCIO[53]
AN30
AN31
VCCIO[54]
VCCIO[55]
AN35
VCC3_3[1]
AT22
VCCVRM[1]
BJ18
VCCFDIPLL
1
+1.05VS
C763
10U_0805_10V4Z
2
@
AM23
VCCIO[1]
R120
0_0402_5%
@
VCCALVDS
AH38
VSSA_LVDS
AH39
VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]
AP43
AP45
AT46
AT45
VCC3_3[2]
AB34
VCC3_3[3]
AB35
VCC3_3[4]
AD35
C296
35mA
3208mA
61mA
Near AE50
VCCDMI[1]
VCCDMI[2]
AU16
156mA
R132
600 ohm bead,350mA
+3VS
CRB 0.9 is 180 ohm @ 100MHz

DG0.8 is 600 ohm FB (Page 290)
1 UMA@ 2 0_0805_5%
+1.8VS
0.1uH inductor, 200mA
1 DIS@
R140
0_0402_5%
+3VS
Near AB34
R183 1 @
2 0_0805_5%
+1.05VS
R182 1 @
2 0_0805_5%
+1.5VS
R189 1
2 0_0805_5%
+1.8VS
+1.1VS_VTT
+VCC_DMI
1
R202 1
2 0_0805_5%
+1.05VS
C351
1U_0402_6.3V4Z
2
AM16
AK16
AK20
AK19
AK15
AK13
AM12
AM13
AM15
L27 UMA@
2
1
0.1UH_MLF1608DR10KT_10%_1608
+VCCTX_LVDS
C242
UMA@ 1
C280 1
1
0.01U_0402_16V7K
22U_0805_6.3V6M
C276
0.01U_0402_16V7K
UMA@
2
2
UMA@ 2
AT24
AT16
VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCPNAND[5]
VCCPNAND[6]
VCCPNAND[7]
VCCPNAND[8]
VCCPNAND[9]
C230
10U_0805_10V4Z
2
0.1U_0402_16V4Z
2
1
2
L23
MBK1608601YZF_2P
Near AP43
0.1U_0402_16V4Z
2
VCCVRM[2]
C264
R169
0_0402_5%
DIS@
+VCCVRM
6mA
0.01U_0402_16V7K
1
C263
+VCCADAC
1
AF51
HVCMOS
AN20
AN22
AN23
AN24
AN26
AN28
BJ26
BJ28
AT26
AT28
AU26
AU28
AV26
AV28
AW26
AW28
BA26
BA28
BB26
BB28
BC26
BC28
BD26
BD28
BE26
BE28
BG26
BG28
BH27
FDI
+VCCVRM
VSSA_DAC[2]
VCCAPLLEXP
+1.05VS
L71 1
@
2
1UH_CBC2012T1R0M_20%
AF53
DMI
+1.05VS
BJ24
VCCIO[24]
NAND / SPI
VSSA_DAC[1]
300mA
PCI E*
DG 0.8 is 1uH Inductor (Page 291)

Have Internal VRM (DG0.8 Page 293)
+VCCAPLL_EXP
1
C759
@
10U_0805_10V4Z
2
AE52
59mA
AK24
L70 1
@
2
1UH_CBC2012T1R0M_20%
AE50
VCCADAC[2]
+VCCA_LVDS
+1.05VS
+1.05VS
1uH inductor, 405mA
VCCADAC[1]
69mA
C307
VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]1524mA
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]
C298
AB24
AB26
AB28
AD26
AD28
AF26
AF28
AF30
AF31
AH26
AH28
AH30
AH31
AJ30
AJ31
1U_0402_6.3V4Z
1
CRT
Intel suggest follow CRB 8/21
VCC CORE
10U_0805_10V4Z
1
60mA
POWER
U60G
R205 1 @
2 0_0805_5%
Near AT16
+VCCQ_NAND
+1.8VS
R257 1
C347
2 0_0805_5%
0.1U_0402_16V4Z
2
85mA
VCCME3_3[1]
VCCME3_3[2]
VCCME3_3[3]
VCCME3_3[4]
AM8
AM9
AP11
AP9
REV1.0
Near AK13
+3VS
C396
IBEXPEAK-M_FCBGA107
UMA@
0.1U_0402_16V4Z
2
Near AM8

Compal Secret Data
2009/08/10
Issued Date
Deciphered Date
2010/08/10
Title
SCHEMATICS,MB A5511
Custom
Date:
Rev
C
401762
Sheet
1
19
of
60
AF42
VCCME[6]
V39
VCCME[7]
V41
VCCME[8]
V42
VCCME[9]
Y39
VCCME[10]
Y41
VCCME[11]
Near V39
1U_0402_6.3V4Z
All Ibex Peak-M Power rails with netnames +1.1VS and

+1.1V rails are actually +1.05VS and +1.05V rails
Y42
Near V9
C387
0.1U_0402_16V4Z
+VCCRTCEXT
1
2
AU24
+VCCVRM
BB51
BB53
+VCCADPLLA
+VCCADPLLB
+1.05VS
Near AF32
1
C295
1U_0402_6.3V4Z
C304
Near AH23
Near AH35
C325
1U_0402_6.3V4Z
+3V
72mA
VCCADPLLA[1]
VCCADPLLA[2]
73mA
AH23
AJ35
AH35
VCCIO[21]
VCCIO[22]
VCCIO[23]
AF34
VCCIO[2]
VCCIO[4]
V12
DCPSST
+VCCSUS
1
2
C328
Near
0.1U_0402_16V4Z
Y22
Y22
4.7U_0603_6.3V6K
C336
VCCSUS3_3[29]
VCCSUS3_3[30]
U20
VCCSUS3_3[31]
U22
VCCSUS3_3[32]
V15
VCC3_3[5]
V16
VCC3_3[6]
1
Y16
C341
0.1U_0402_16V4Z
2
2
0.1U_0402_16V4Z
Near
AU18
AT18
A12
VCC3_3[7]
> 1mA
V_CPU_IO[1]
V_CPU_IO[2]
2mA
VCCRTC
IBEXPEAK-M_FCBGA107
UMA@
+RTCVCC
C363
C372
VCC3_3[8]
J38
VCC3_3[9]
L38
+3V
Near A12
+1.05VS
2/12 Follow
EDS1.11 Change
to 100 ohm
+VCC5REFSUS
+3VS
+5V
R185
2 100_0402_5%
C322
1U_0402_6.3V6K
Near F24
+VCC5REF
D10
R134
100_0402_5%
1
2
Change to 1U for power

sequence issue on ICH9
+5VS
Near K49
+3VS
N36
P36
C288
VCC3_3[13]
U35
0.1U_0402_16V4Z
2
VCC3_3[14]
AD13
+3VS
Near J38
Near AD13
+1.05VS
2 C367
0.1U_0402_16V4Z
+VCCSATAPLL
L31 1 @
2
1 10UH_LB2012T100MR_20%
10uH inductor, 120mA
C407
10U_0805_10V4Z
2
@
C409
1U_0402_6.3V4Z
2
@

Near AK1
VCCIO[9]
AH22
VCCVRM[4]
AT20
VCCIO[10]
AH19
VCCIO[11]
AD20
VCCIO[12]
AF22
VCCIO[13]
VCCIO[14]
VCCIO[15]
VCCIO[16]
AD19
AF20
AF19
AH20
C356
1U_0402_6.3V4Z
2
VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]
AB19
AB20
AB22
AD22
VCCME[13]
VCCME[14]
VCCME[15]
VCCME[16]
AA34
Y34
Y35
AA35
+VCCVRM
+1.05VS
+5VALW
Near AB19
44
SBPWR_EN#
R203
0_0402_5%
1
+1.05VS
2
1
C353
0.1U_0402_16V4Z
PCH_VCCME13
PCH_VCCME14
PCH_VCCME15
PCH_VCCME16
R175
R170
R161
R167
1
1
1
1
2
2
2
2
L30
Q15
AO3413_SOT23-3
0_0603_5%
0_0603_5%
0_0603_5%
0_0603_5%
+5V
+3V
C311 1
2 1U_0402_6.3V4Z
Near L30
Compal Secret Data

2009/08/10
Issued Date
Deciphered Date
2010/08/10
Title
SCHEMATICS,MB A5511
Custom
4
2/12 Follow EDS1.11

Change to 100 ohm
C274
1U_0402_6.3V6K
Date:
Near BD51
VCC3_3[12]
6mA
D12
M36
VCCSUSHDA
+VCCADPLLB
C272
C679
1U_0402_6.3V4Z
2
220U_B2_2.5VM_R35
2
VCC3_3[11]
AK3
AK1
VCC3_3[10]
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
K49
Near U23
R575
0_0402_5%
@
L62 1
2
10UH_LB2012T100MR_20%
C382
1U_0402_6.3V4Z
V5REF
357mA
C273
C680
1U_0402_6.3V4Z
2
220U_B2_2.5VM_R35
2
10uH inductor, 120mA 1
>1mA
DCPSUS
P18
Near V15
F24
VCCSATAPLL[1]
VCCSATAPLL[2]
U19
AT18
C339
V5REF_SUS
>1mA
32mA
RTC
0.1U_0402_16V4Z
VCCIO[56]
V23
0.1U_0402_16V4Z
2
Near A26
+3VS
+1.1VS_VTT
U23
0.1U_0402_16V4Z
2
+1.05VS
Near P18
C354
VCCSUS3_3[28]
C323
VCCIO[3]
AF32
V12
0.1U_0402_16V4Z
VCCVRM[3]
VCCADPLLB[1]
VCCADPLLB[2]
+VCCSST
1
2
C366
Near
0.1U_0402_16V4Z
C352
DCPRTC
BD51
BD53
AH34
1U_0402_6.3V4Z
V9
VCCME[12]
163mA
VCCME[5]

1
C755
AF41
USB
VCCME[4]
Near BB51
Near AD38
VCCME[3]
AF43
+VCCADPLLA
L67 1
2
10UH_LB2012T100MR_20%
C255
C287
22U_0805_6.3V6M
2
2
1U_0402_6.3V4Z
VCCME[2]
AD41
+3V
Near V24
C285
VCCME[1]
AD39
V28
U28
U26
U24
P28
P26
N28
N26
M28
M26
L28
L26
J28
J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26
+1.05VS
C312
1U_0402_6.3V4Z
2
VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCCSUS3_3[6]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]
VCCSUS3_3[21]
VCCSUS3_3[22]
VCCSUS3_3[23]
VCCSUS3_3[24]
VCCSUS3_3[25]
VCCSUS3_3[26]
VCCSUS3_3[27]
+1.05VS
1998mA
AD38
HDA
22U_0805_6.3V6M
1
DCPSUSBYP
Clock and Miscellaneous
0.1U_0402_16V4Z
2
V24
V26
Y24
Y26
SATA
C343
2
22U_0805_6.3V6M
VCCLAN[2]
Follow Intel suggestion
C253
VCCLAN[1]
AF24
Y20
Near Y20
+1.05VS
C254
AF23
+PCH_VCCD6W
VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]
344mA
PCI/GPIO/LPC
C327
1U_0402_6.3V4Z
2
@
Near AF23
VCCACLK[2]
R200
0_0402_5%
AP53
PCI/GPIO/LPC
Near AP51
2
1
VCCACLK[1]
CPU
+1.05VS
C256
1U_0402_6.3V4Z
2
@
REV1.0
52mA
AP51
C229
10U_0805_10V4Z
2
@
R184 1
0_0603_5%
POWER
U60J
L24 1 @
+1.1VS_VCCACLK
2
10UH_LB2012T100MR_20% 1
1
+1.05VS

Rev
C
401762
Sheet
1
20
of
60
AB16
VSS[0]
AA19
AA20
AA22
AM19
AA24
AA26
AA28
AA30
AA31
AA32
AB11
AB15
AB23
AB30
AB31
AB32
AB39
AB43
AB47
AB5
AB8
AC2
AC52
AD11
AD12
AD16
AD23
AD30
AD31
AD32
AD34
AU22
AD42
AD46
AD49
AD7
AE2
AE4
AF12
Y13
AH49
AU4
AF35
AP13
AN34
AF45
AF46
AF49
AF5
AF8
AG2
AG52
AH11
AH15
AH16
AH24
AH32
AV18
AH43
AH47
AH7
AJ19
AJ2
AJ20
AJ22
AJ23
AJ26
AJ28
AJ32
AJ34
AT5
AJ4
AK12
AM41
AN19
AK26
AK22
AK23
AK28
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
REV1.0
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
AK30
AK31
AK32
AK34
AK35
AK38
AK43
AK46
AK49
AK5
AK8
AL2
AL52
AM11
BB44
AD24
AM20
AM22
AM24
AM26
AM28
BA42
AM30
AM31
AM32
AM34
AM35
AM38
AM39
AM42
AU20
AM46
AV22
AM49
AM7
AA50
BB10
AN32
AN50
AN52
AP12
AP42
AP46
AP49
AP5
AP8
AR2
AR52
AT11
BA12
AH48
AT32
AT36
AT41
AT47
AT7
AV12
AV16
AV20
AV24
AV30
AV34
AV38
AV42
AV46
AV49
AV5
AV8
AW14
AW18
AW2
BF9
AW32
AW36
AW40
AW52
AY11
AY43
AY47
17 USB_OC#0_R
R401 1 @
2 33_0402_5%
XDP_FN0
17 USB_OC#2_R
R402 1 @
2 33_0402_5%
XDP_FN2
17 USB_OC#4_R
R403 1 @
2 33_0402_5%
XDP_FN4
R378
R379
R380
R381
R368
R369
R370
R371
2
2
2
2
2
2
2
2
14 PCH_GPIO20
14 PCH_GPIO18
13 PCH_GPIO21
13 PCH_GPIO19
14,18,40,45 DGPU_PWR_EN
18 PCH_GPIO37
18 DGPU_HOLD_RST#_R
18,38 PCH_TEMP_ALERT#
18
CRT_DET
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
XDP_FN8
XDP_FN9
XDP_FN10
XDP_FN11
XDP_FN12
XDP_FN13
XDP_FN14
XDP_FN15
R377 1 @
2 33_0402_5%
XDP_FN17
R400
R376
R375
R373
2 0_0402_5%
2 0_0402_5%
2 0_0402_5%
2
0_0402_5%
2 0_0402_5%
1
1
1
1
1
1
1
1
@
@
@
@
@
@
@
@
1 @
1 @
1 @
1
@
R374 1 @
13 PCH_JTAG_TCK
13 PCH_JTAG_TMS
13 PCH_JTAG_TDI
13 PCH_JTAG_TDO
13 PCH_JTAG_RST#
PCH_JTAG_TCK_R
PCH_JTAG_TMS_R
PCH_JTAG_TDI_R
PCH_JTAG_TDO_R
PCH_JTAG_RST#_R
JP11
XDP_FN0
(XDP_FN1) 17 USB_OC#1_R
XDP_FN2
XDP_FN4
15 SYS_PWROK
5,15,38 PBTN_OUT#
+3VS
@1
R399
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
2
0_0402_5%
5 SMB_DATA_S3
5 SMB_CLK_S3
PCH_JTAG_TCK_R
GND0
OBSFN_A0
OBSFN_A1
GND2
OBSDATA_A0
OBSDATA_A1
GND4
OBSDATA_A2
OBSDATA_A3
GND6
OBSFN_B0
OBSFN_B1
GND8
OBSDATA_B0
OBSDATA_B1
GND10
OBSDATA_B2
OBSDATA_B3
GND12
PWRGOOD/HOOK0
HOOK1
VCC_OBS_AB
HOOK2
HOOK3
GND14
SDA
SCL
TCK1
TCK0
GND16
CONN@
GND1
OBSFN_C0
OBSFN_C1
GND3
OBSDATA_C0
OBSDATA_C1
GND5
OBSDATA_C2
OBSDATA_C3
GND7
OBSFN_D0
OBSFN_D1
GND9
OBSDATA_D0
OBSDATA_D1
GND11
OBSDATA_D2
OBSDATA_D3
GND13
ITPCLK/HOOK4
ITPCLK#/HOOK5
VCC_OBS_CD
RESET#/HOOK6
DBR#/HOOK7
GND15
TD0
TRST#
TDI
TMS
GND17
(XDP_FN16)
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
XDP_FN8
XDP_FN9
XDP_FN10
XDP_FN11
XDP_FN12
XDP_FN13
XDP_FN14
XDP_FN15
+3VS
@2
1
R372
1K_0402_5%
PCH_JTAG_TDO_R
PCH_JTAG_RST#_R
PCH_JTAG_TDI_R
PCH_JTAG_TMS_R
PLT_RST# 5,17,34,38
XDP_DBRESET# 5,15
+3VS
UMA@
IBEXPEAK-M_FCBGA107
+3VS
R353
4.7K_0402_5%
1
2
+3VS
@
SMB_DATA_S3
Q28
2N7002_SOT23
@
R397
4.7K_0402_5%
1
2
+3VS
@
SMB_CLK_S3
Q34
2N7002_SOT23
@
REV1.0
Compal Secret Data
IBEXPEAK-M_FCBGA107
UMA@
2009/08/10
Issued Date
Deciphered Date
2010/08/10
Title
SCHEMATICS,MB A5511
Custom
Date:
PCH_GPIO28 18
XDP_FN17
SAMTE_BSH-030-01-L-D-A
2
G
H49
H5
J24
K11
K43
K47
K7
L14
L18
L2
L22
L32
L36
L40
L52
M12
M16
M20
N38
M34
M38
M42
M46
M49
M5
M8
N24
P11
AD15
P22
P30
P32
P34
P42
P45
P47
R2
R52
T12
T41
T46
T49
T5
T8
U30
U31
U32
U34
P38
V11
P16
V19
V20
V22
V30
V31
V32
V34
V35
V38
V43
V45
V46
V47
V49
V5
V7
V8
W2
W52
Y11
Y12
Y15
Y19
Y23
Y28
Y30
Y31
Y32
Y38
Y43
Y46
P49
Y5
Y6
Y8
P24
T43
AD51
AT8
AD47
Y47
AT12
AM6
AT13
AM5
AK45
AK39
AV14
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[326]
VSS[327]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[332]
VSS[333]
VSS[334]
VSS[335]
VSS[336]
VSS[337]
VSS[338]
VSS[339]
VSS[340]
VSS[341]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
VSS[353]
VSS[354]
VSS[355]
VSS[356]
VSS[366]
PCH XDP Port
U60H
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]
2
G
U60I
AY7
B11
B15
B19
B23
B31
B35
B39
B43
B47
B7
BG12
BB12
BB16
BB20
BB24
BB30
BB34
BB38
BB42
BB49
BB5
BC10
BC14
BC18
BC2
BC22
BC32
BC36
BC40
BC44
BC52
BH9
BD48
BD49
BD5
BE12
BE16
BE20
BE24
BE30
BE34
BE38
BE42
BE46
BE48
BE50
BE6
BE8
BF3
BF49
BF51
BG18
BG24
BG4
BG50
BH11
BH15
BH19
BH23
BH31
BH35
BH39
BH43
BH47
BH7
C12
C50
D51
E12
E16
E20
E24
E30
E34
E38
E42
E46
E48
E6
E8
F49
F5
G10
G14
G18
G2
G22
G32
G36
G40
G44
G52
AF39
H16
H20
H30
H34
H38
H42
Rev
C
401762
Sheet
1
21
of
60
U81
H2
H9
L3
L8
M4
M7
P2
P9
VssQ
VssQ
VssQ
VssQ
VssQ
VssQ
VssQ
VssQ
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NV_ALE
17
17
NV_CE#0
NV_CE#1
K7
K6
ALE-1
ALE-2
CE#
CE2#
NV_CLE
M5
L5
CLE-1
CLE-2
17 NV_RE#_WR#0
M6
L6
RE#-1/W/R#-1
RE#-2/W/R#-2
17
CLK0_R
P7
N7
WE#-1/CLK-1
WE#-2/CLK-2
WP#
E5
D5
WP#-1
WP#-2
J6
H6
R/B#
R/B2#
A1
A2
A9
A10
B1
B10
D4
D6
D7
E4
E6
E7
H7
J5
J7
K5
T1
T10
U1
U2
U9
U10
DNU
DNU
DNU
DNU
D3
D8
E3
E8
RFU
RFU
RFU
RFU
RFU
RFU
RFU
RFU
D2
D9
E2
E9
N4
N6
P4
P6
H2
H9
L3
L8
M4
M7
P2
P9
VssQ
VssQ
VssQ
VssQ
VssQ
VssQ
VssQ
VssQ
NV_ALE
K4
J4
ALE-1
ALE-2
NV_CE#0
NV_CE#1
K7
K6
CE#
CE2#
NV_CLE
M5
L5
CLE-1
CLE-2
M6
L6
RE#-1/W/R#-1
RE#-2/W/R#-2
CLK1_R
P7
N7
WE#-1/CLK-1
WE#-2/CLK-2
WP#
E5
D5
WP#-1
WP#-2
J6
H6
R/B#
R/B2#
NV_RB#
17
NV_RB#
DQS1_R
DQ0-1
DQ1-1
DQ2-1
DQ3-1
DQ4-1
DQ5-1
DQ6-1
DQ7-1
DQ0-2
DQ1-2
DQ2-2
DQ3-2
DQ4-2
DQ5-2
DQ6-2
DQ7-2
K2
N2
K3
N3
N8
K8
N9
K9
J2
M2
J3
M3
M8
J8
M9
J9
DQ8_R
DQ9_R
DQ10_R
DQ11_R
DQ12_R
DQ13_R
DQ14_R
DQ15_R
DQ8_R
DQ9_R
DQ10_R
DQ11_R
DQ12_R
DQ13_R
DQ14_R
DQ15_R
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
DNU
DNU
DNU
DNU
D3
D8
E3
E8
RFU
RFU
RFU
RFU
RFU
RFU
RFU
RFU
D2
D9
E2
E9
N4
N6
P4
P6
R903
10K_0402_5%
DQ0_R
DQ1_R
DQ2_R
DQ3_R
DQ4_R
DQ5_R
DQ6_R
DQ7_R
DQ8_R
DQ9_R
DQ10_R
DQ11_R
DQ12_R
DQ13_R
DQ14_R
DQ15_R
CLK0_R
CLK1_R
DQS0_R
DQS1_R
R904NV@
R905NV@
R906NV@
R907NV@
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
R908NV@
R909NV@
R910NV@
R911NV@
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
R912NV@
R913NV@
R914NV@
R915NV@
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
R916NV@
R917NV@
R918NV@
R919NV@
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
R920NV@
R921NV@
R922NV@
R923NV@
NV_DQ0
NV_DQ1
NV_DQ2
NV_DQ3
17
17
17
17
NV_DQ4
NV_DQ5
NV_DQ6
NV_DQ7
17
17
17
17
NV_DQ8
NV_DQ9
NV_DQ10
NV_DQ11
17
17
17
17
NV_DQ12
NV_DQ13
NV_DQ14
NV_DQ15
17
17
17
17
NV_WE#_CK0 17
NV_WE#_CK1 17
NV_DQS0 17
NV_DQS1 17
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
+3VS_NVRAM
1 C950
1
1
NV@
C951
NV@
C952
C953 +
C954
@
1U_0402_6.3V4Z
0.033U_0402_16V4Z
150U_B_6.3VM_R40M
2
2
2
2
2
0.1U_0402_16V4Z
0.33U_0603_16V4Z
NV@
NV@
+1.8VS_NVRAM
1
+3VS
C955
C956
C957
C959
22U_0805_6.3V6M
1U_0402_6.3V4Z
0.033U_0402_16V4Z
2
2
2
2
2
@
0.33U_0603_16V4Z
0.1U_0402_16V4Z
NV@
R488
300_0402_5%
NV@
NV@
NV@
NV@
NV@ 10K_0402_5%
NV_RB#
A1
A2
A9
A10
B1
B10
D4
D6
D7
E4
E6
E7
H7
J5
J7
K5
T1
T10
U1
U2
U9
U10
MT29H32G08GCAH2-12 A_TBGA100
NV@
MT29H32G08GCAH2-12 A_TBGA100
NV@
+1.8VS_NVRAM
WP#
R900
Data Inputs/Outputs
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
17 NV_RE#_WR#1
Reserved
17
K4
J4
Do Not Use
G2
G3
G4
G5
G6
G7
G8
G9
P5
N5
No Connect
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
VccQ
VccQ
VccQ
VccQ
VccQ
VccQ
VccQ
VccQ
+1.8VS_NVRAM
NA/DQS-1
NA/DQS-2
Do Not Use
G2
G3
G4
G5
G6
G7
G8
G9
H3
H8
L2
L4
L7
L9
P3
P8
DQ0_R
DQ1_R
DQ2_R
DQ3_R
DQ4_R
DQ5_R
DQ6_R
DQ7_R
DQ0_R
DQ1_R
DQ2_R
DQ3_R
DQ4_R
DQ5_R
DQ6_R
DQ7_R
I/O Power Supply Core Power Supply
VccQ
VccQ
VccQ
VccQ
VccQ
VccQ
VccQ
VccQ
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Core Gound
Connection
NV@
H3
H8
L2
L4
L7
L9
P3
P8
F2
F3
F4
F5
F6
F7
F8
F9
DQS0_R
I/O Ground
Connection
+1.8VS_NVRAM
0_0805_5%
R902
DQ0-1
DQ1-1
DQ2-1
DQ3-1
DQ4-1
DQ5-1
DQ6-1
DQ7-1
DQ0-2
DQ1-2
DQ2-2
DQ3-2
DQ4-2
DQ5-2
DQ6-2
DQ7-2
K2
N2
K3
N3
N8
K8
N9
K9
J2
M2
J3
M3
M8
J8
M9
J9
Data Inputs/Outputs
+1.8VS
NA/DQS-1
NA/DQS-2
No Connect
I/O Power Supply Core Power Supply
NV@
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
+3VS_NVRAM
P5
N5
Core Gound
Connection
R901
F2
F3
F4
F5
F6
F7
F8
F9
I/O Ground
Connection
+3VS_NVRAM
0_0805_5%
Reserved
U80
+3VS
LED14
S LED HT-150NB 1206 BLUE
+3VS
NV@
R489
2.2K_0402_5%
NV@
NV@
Q75B
NV@
2N7002DW-T/R7_SOT363-6
Q75A
NV_RB#
2N7002DW-T/R7_SOT363-6
Compal Secret Data
2009/08/10
Issued Date
Deciphered Date
2010/08/10
Title
SCHEMATICS,MB A5511
Custom
Date:
Rev
C
401762
Sheet
1
22
of
60
add for DPST support.

R84
10K_0402_5%
1
2
VGA@
U54G
LVDS CONTROL
D
VARY_BL
DIGON
AK27
AJ27
TXCLK_UP_DPF3P
TXCLK_UN_DPF3N
AK35
AL36
VGA_TZCLK+
VGA_TZCLK-
TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N
AJ38
AK37
VGA_TZOUT0+
VGA_TZOUT0-
TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N
AH35
AJ36
VGA_TZOUT1+
VGA_TZOUT1-
TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N
AG38
AH37
VGA_TZOUT2+
VGA_TZOUT2-
TXOUT_U3P
TXOUT_U3N
AF35
AG36
TXCLK_LP_DPE3P
TXCLK_LN_DPE3N
AP34
AR34
VGA_TXCLK+
VGA_TXCLK-
TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N
AW37
AU35
VGA_TXOUT0+
VGA_TXOUT0-
TXOUT_L1P_DPE1P
TXOUT_L1N_DPE1N
AR37
AU39
VGA_TXOUT1+
VGA_TXOUT1-
TXOUT_L2P_DPE0P
TXOUT_L2N_DPE0N
AP35
AR35
VGA_TXOUT2+
VGA_TXOUT2-
R88
10K_0402_5%
1 VGA@ 2
U54A
4 PEG_HTX_C_GRX_P0
4 PEG_HTX_C_GRX_N0
4 PEG_HTX_C_GRX_P1
4 PEG_HTX_C_GRX_N1
Y35
W36
4 PEG_HTX_C_GRX_P2
4 PEG_HTX_C_GRX_N2
4 PEG_HTX_C_GRX_P3
4 PEG_HTX_C_GRX_N3
4 PEG_HTX_C_GRX_P5
4 PEG_HTX_C_GRX_N5
PCIE_RX0P
PCIE_RX0N
PCIE_TX0P
PCIE_TX0N
Y33
Y32
PEG_GTX_HRX_P0
PEG_GTX_HRX_N0
PEG_GTX_HRX_P1
PEG_GTX_HRX_N1
C66
C67
C82
C83
2 VGA@ 0.1U_0402_16V7K
2 VGA@ 0.1U_0402_16V7K
1
1
2 VGA@ 0.1U_0402_16V7K
2 VGA@ 0.1U_0402_16V7K
PEG_GTX_C_HRX_P0 4
PEG_GTX_C_HRX_N0 4
PCIE_RX1P
PCIE_RX1N
PCIE_TX1P
PCIE_TX1N
W33
W32
W38
V37
PCIE_RX2P
PCIE_RX2N
PCIE_TX2P
PCIE_TX2N
U33
U32
PEG_GTX_HRX_P2
PEG_GTX_HRX_N2
C54
C55
1
1
2 VGA@ 0.1U_0402_16V7K
2 VGA@ 0.1U_0402_16V7K
PEG_GTX_C_HRX_P2 4
PEG_GTX_C_HRX_N2 4
V35
U36
PCIE_RX3P
PCIE_RX3N
PCIE_TX3P
PCIE_TX3N
U30
U29
PEG_GTX_HRX_P3
PEG_GTX_HRX_N3
C56
C57
1
1
2 VGA@ 0.1U_0402_16V7K
2 VGA@ 0.1U_0402_16V7K
PEG_GTX_C_HRX_P3 4
PEG_GTX_C_HRX_N3 4
U38
T37
T35
R36
PCIE_RX4P
PCIE_RX4N
PCIE_RX5P
PCIE_RX5N
PCI EXPRESS INTERFACE
4 PEG_HTX_C_GRX_P4
4 PEG_HTX_C_GRX_N4
AA38
Y37
PCIE_TX4P
PCIE_TX4N
T33
T32
PEG_GTX_HRX_P4
PEG_GTX_HRX_N4
C58
C59
T30
T29
PEG_GTX_HRX_P5
PEG_GTX_HRX_N5
C84
C85
PCIE_TX6P
PCIE_TX6N
P33
P32
PEG_GTX_HRX_P6
PEG_GTX_HRX_N6
PCIE_TX7P
PCIE_TX7N
P30
P29
PEG_GTX_HRX_P7
PEG_GTX_HRX_N7
PCIE_TX8P
PCIE_TX8N
N33
N32
PEG_GTX_HRX_P8
PEG_GTX_HRX_N8
PCIE_TX9P
PCIE_TX9N
N30
N29
PCIE_TX10P
PCIE_TX10N
1
1
2 VGA@ 0.1U_0402_16V7K
2 VGA@ 0.1U_0402_16V7K
1
1
PEG_GTX_C_HRX_P1 4
PEG_GTX_C_HRX_N1 4
1
1
2 VGA@ 0.1U_0402_16V7K
2 VGA@ 0.1U_0402_16V7K
C60
C61
1
1
2 VGA@ 0.1U_0402_16V7K
2 VGA@ 0.1U_0402_16V7K
PEG_GTX_C_HRX_P6 4
PEG_GTX_C_HRX_N6 4
C86
C87
1
1
2 VGA@ 0.1U_0402_16V7K
2 VGA@ 0.1U_0402_16V7K
PEG_GTX_C_HRX_P7 4
PEG_GTX_C_HRX_N7 4
C88
C89
1
1
2 VGA@ 0.1U_0402_16V7K
2 VGA@ 0.1U_0402_16V7K
PEG_GTX_C_HRX_P8 4
PEG_GTX_C_HRX_N8 4
PEG_GTX_HRX_P9
PEG_GTX_HRX_N9
C52
C53
1
1
2 VGA@ 0.1U_0402_16V7K
2 VGA@ 0.1U_0402_16V7K
PEG_GTX_C_HRX_P9 4
PEG_GTX_C_HRX_N9 4
L33
L32
PEG_GTX_HRX_P10
PEG_GTX_HRX_N10
C62
C63
1
1
2 VGA@ 0.1U_0402_16V7K
2 VGA@ 0.1U_0402_16V7K
PEG_GTX_C_HRX_P10 4
PEG_GTX_C_HRX_N10 4
PCIE_TX11P
PCIE_TX11N
L30
L29
PEG_GTX_HRX_P11
PEG_GTX_HRX_N11
C90
C91
1
1
2 VGA@ 0.1U_0402_16V7K
2 VGA@ 0.1U_0402_16V7K
PEG_GTX_C_HRX_P11 4
PEG_GTX_C_HRX_N11 4
PCIE_TX12P
PCIE_TX12N
K33
K32
PEG_GTX_HRX_P12
PEG_GTX_HRX_N12
C92
C93
1
1
2 VGA@ 0.1U_0402_16V7K
2 VGA@ 0.1U_0402_16V7K
PEG_GTX_C_HRX_P12 4
PEG_GTX_C_HRX_N12 4
PCIE_TX5P
PCIE_TX5N
PEG_GTX_C_HRX_P5 4
PEG_GTX_C_HRX_N5 4
4 PEG_HTX_C_GRX_P6
4 PEG_HTX_C_GRX_N6
R38
P37
PCIE_RX6P
PCIE_RX6N
4 PEG_HTX_C_GRX_P7
4 PEG_HTX_C_GRX_N7
P35
N36
PCIE_RX7P
PCIE_RX7N
4 PEG_HTX_C_GRX_P8
4 PEG_HTX_C_GRX_N8
N38
M37
PCIE_RX8P
PCIE_RX8N
4 PEG_HTX_C_GRX_P9
4 PEG_HTX_C_GRX_N9
M35
L36
PCIE_RX9P
PCIE_RX9N
4 PEG_HTX_C_GRX_P10
4 PEG_HTX_C_GRX_N10
L38
K37
PCIE_RX10P
PCIE_RX10N
4 PEG_HTX_C_GRX_P11
4 PEG_HTX_C_GRX_N11
K35
J36
PCIE_RX11P
PCIE_RX11N
4 PEG_HTX_C_GRX_P12
4 PEG_HTX_C_GRX_N12
J38
H37
PCIE_RX12P
PCIE_RX12N
4 PEG_HTX_C_GRX_P13
4 PEG_HTX_C_GRX_N13
H35
G36
PCIE_RX13P
PCIE_RX13N
PCIE_TX13P
PCIE_TX13N
J33
J32
PEG_GTX_HRX_P13
PEG_GTX_HRX_N13
C45
C46
1
1
2 VGA@ 0.1U_0402_16V7K
2 VGA@ 0.1U_0402_16V7K
PEG_GTX_C_HRX_P13 4
PEG_GTX_C_HRX_N13 4
4 PEG_HTX_C_GRX_P14
4 PEG_HTX_C_GRX_N14
G38
F37
PCIE_RX14P
PCIE_RX14N
PCIE_TX14P
PCIE_TX14N
K30
K29
PEG_GTX_HRX_P14
PEG_GTX_HRX_N14
C80
C81
1
1
2 VGA@ 0.1U_0402_16V7K
2 VGA@ 0.1U_0402_16V7K
PEG_GTX_C_HRX_P14 4
PEG_GTX_C_HRX_N14 4
4 PEG_HTX_C_GRX_P15
4 PEG_HTX_C_GRX_N15
F35
E37
PCIE_RX15P
PCIE_RX15N
PCIE_TX15P
PCIE_TX15N
H33
H32
PEG_GTX_HRX_P15
PEG_GTX_HRX_N15
C64
C65
1
1
2 VGA@ 0.1U_0402_16V7K
2 VGA@ 0.1U_0402_16V7K
PEG_GTX_C_HRX_P15 4
PEG_GTX_C_HRX_N15 4
VGA_TZCLK+ 30
VGA_TZCLK- 30
VGA_TZOUT0+ 30
VGA_TZOUT0- 30
VGA_TZOUT1+ 30
VGA_TZOUT1- 30
VGA_TZOUT2+ 30
VGA_TZOUT2- 30
T12
T13
@
@
LVTMDP
PEG_GTX_C_HRX_P4 4
PEG_GTX_C_HRX_N4 4
VGA_PNL_PWM 30
ENVDD 30
TXOUT_L3P
TXOUT_L3N
VGA_TXCLK+ 30
VGA_TXCLK- 30
VGA_TXOUT0+ 30
VGA_TXOUT0- 30
VGA_TXOUT1+ 30
VGA_TXOUT1- 30
C
VGA_TXOUT2+ 30
VGA_TXOUT2- 30
T15
T14
AN36
AP37
@
@
216-0729002 A12 M96_BGA962

VGA@
CLOCK
14 CLK_PEG_VGA
14 CLK_PEG_VGA#
AB35
AA36
PCIE_REFCLKP
PCIE_REFCLKN
AJ21
AK21
AH16
NC#1
NC#2
NC_PWRGOOD
CALIBRATION
40,55 DGPU_PWROK
R517
0_0402_5%
DGPU_PWROK 1
2
@
AA30
Y30
R75
1 VGA@ 2
1.27K_0402_1%
Y29
R82
1 VGA@ 2
2K_0402_1%
+1.1VSDGPU
PERSTB
17 PLTRST_VGA#
PCIE_CALRP
PCIE_CALRN
216-0729002 A12 M96_BGA962

VGA@
R766
10K_0402_1%
MAD@
M96 P/N : SA00002UQ50 (S IC 216-0729042-00 A13 M96 FCBGA962 0FA)

M92 P/N : SA00002YX10 ( S IC 216-0728014 A12 M92-M2 XT FCBGA 0FA)
Issued Date
Compal Secret Data
2009/08/10
2010/08/10
Deciphered Date
Title
SCHEMATICS,MB A5511
Custom
4
Rev
C
401762
Date:
Sheet

1
23
of
60
U54B
AUD[1]
AUD(0)
CCBYPASS
GPIO22
Enable external BIOS ROM device

0: Diable, 1: Enable
HSYNC
VSYNC
00: No audio function;

10: Audio for DisplayPort only;
01: Audio for DisplayPort and HDMI if adapter is detected;
11: Audio for both DisplayPort and HDMI
0
11
GENERICC
SMS_EN_HARD
H2SYNC
VIP_DEVICE
_STRAP_DIS
V2SYNC
0
0
If VIP_DEVICE_STRAP_EN is set to ?? then this pin is used to sense
whether a VIP slave device is connected to the VIP Host interface.
If VIP_DEVICE_STRAP_EN is set to ?? then this pin is not used as a
strap at all (i.e. its value during reset is unimportant), and it can be
used as a regular GPIO
HYNIX
R534
R536
1 VGA@
1 VGA@
2
1
2
1
1
2
T1
55
@
GPU_VID0
GPU_VID0
THM_ALERT#
55
26
GPU_VID1
BB_EN
ROMSE_GPIO22
PEG_CLKREQ#
GPU_VID1
BB_EN
14 PEG_CLKREQ#
+3VS_DELAY
GENERICC
R106 1 VGA@
R131 1 VGA@
@ R568 1
2 10K_0402_5%
2 10K_0402_5%
2 10K_0402_5%
VGA_GPIO0
VGA_GPIO1
VGA_GPIO2
R115 1 VGA@
2 10K_0402_5%
VGA_AC_DET
2 10K_0402_5%
SOUT_GPIO8
@ R180 1
@ R190 1
2 10K_0402_5%
SIN_GPIO9
R135 1 VGA@
@ R133 1
@ R128 1
2 10K_0402_5%
2 10K_0402_5%
2 10K_0402_5%
VGA_GPIO11
VGA_GPIO12
VGA_GPIO13
VGA_HDMI_DET
32 VGA_HDMI_DET
AK24
HPD1
DAC1
R142
R144
GENERICC
2 249_0402_1%
XTALOUT
R524
PLL/CLOCK
AM32
AN32
300mA
2
VGA@
VGA@
VGA@
+TSVDD
1
VGA@
AN31
XTALIN
AV33
XTALOUT AU34
AF29
AG29
20mA
C127
0.1U_0402_16V4Z
18P_0402_50V8J
VGA@
C99
1U_0402_6.3V4Z
C651
27MHZ_16PF_X5H027000FG1H
VGA@
VGA@
C658
C75
10U_0603_6.3V6M
L12
BLM18AG121SN1D_0603
2
1
VGA@
1
VGA@
120mA
GPU_THERM_D+
GPU_THERM_D-
Y3
AU20
AT19
TX3P_DPD2P
TX3M_DPD2N
AT21
AR20
TX4P_DPD1P
TX4M_DPD1N
AU22
AV21
TX5P_DPD0P
TX5M_DPD0N
AT23
AR22
R
RB
AD39
AD37
VGA_CRT_R 31
G
GB
AE36
AD35
VGA_CRT_G 31
B
BB
AF37
AE38
HSYNC
VSYNC
AC36
AC38
VGA_SMB_CK2
R47
4.7K_0402_5%
VGA@
VGA@
4
VGA_SMB_DA2
AK32
AJ32
AJ33
DDC/AUX
DPLL_PVDD
DPLL_PVSS
Q9A
VGA@
THERM#
GND
5
1
EC_SMB_CK2
R68
AB34
AD34
AE34
+AVDD
VDD1DI
VSS1DI
AC33
AC34
+VDD1DI
R2
R2B
AC30
AC31
G2
G2B
AD30
AD31
B2
B2B
AF30
AF31
C
Y
COMP
AC32
AD32
AF32
H2SYNC
V2SYNC
AD29
AC29
EC_SMB_DA2
EC_SMB_DA2 14,38
2N7002DW-T/R7_SOT363-6
R833
@
0_0603_5%
Q10
SI2301BDS_SOT23
+3VS
100K_0402_5%
VGA@
VGA@
2
499_0402_1%
70mA
2
VGA@
THERMAL
A2VDD
AG33
+A2VDD
A2VDDQ
AD33
+A2VDDQ
A2VSSQ
AF33
R2SET
AA29
VGA@
2
VGA@
VGA@
DDCCLK_AUX3P
DDCDATA_AUX3N
AL30
AM30
DDCCLK_AUX4P
DDCDATA_AUX4N
AL29
AM29
DDCCLK_AUX5P
DDCDATA_AUX5N
AN21
AM21
DDC6CLK
DDC6DATA
AJ30
AJ31
NC_DDCCLK_AUX7P
NC_DDCDATA_AUX7N
AK30
AK29
L10
BLM18AG121SN1D_0603
1
+1.8VSDGPU
VGA@
L9
BLM18AG121SN1D_0603
1
VGA@
PWR Sequence
VGA_CORE (VDDC)
+1.8VS
+3VS_DELAY
V2SYNC
H2SYNC
+1.8VSDGPU
R72
0_0603_5%
65mA
R81
715_0402_1%
1
2
VGA_HDMI_SCLK
VGA_HDMI_SDATA
HDMI
+3VS_DELAY
1
2
VGA@
VGA@
L8
BLM18AG121SN1D_0603
2
1
+1.8VSDGPU
VGA@
@ R63
@ R62
VGA_CRT_VSYNC
VGA_CRT_HSYNC
VGA_HDMI_SCLK
VGA_HDMI_SDATA
VGA_DDC_CLK
VGA_DDC_DATA
VGA_CRT_R
VGA_CRT_G
VGA_CRT_B
VGA_HDMI_SCLK 32
VGA_HDMI_SDATA 32
2 10K_0402_5%
2 10K_0402_5%
1
1
R510 1 VGA@
R513 1
VGA@
2 10K_0402_5%
2 10K_0402_5%
R528 1 VGA@
R529 1 VGA@
R530 1 VGA@
R532 1 VGA@
2
2
2
2
R514 1 VGA@
R511 1 VGA@
R515 1 VGA@
2 150_0402_1%
2 150_0402_1%
2 150_0402_1%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
FLASH ROM
U22 @
M96 only
VGA_DDC_CLK
VGA_DDC_DATA
SIN_GPIO9
CLK_GPIO10
ROMSE_GPIO22 1
+3VS_DELAY
VGA_DDC_CLK 31
VGA_DDC_DATA 31
@
R181
0_0402_5%
R186
CRT
2009/08/10
Deciphered Date
SOUT_GPIO8
TYPE 1
HOLD
VCC
VSS
M25P10-AVMN6P
C300
.1U_0402_16V7K
@
Compal Secret Data
VGA_ON# 45
Q7
2
G
2
VGA@
2VGA_ON#
G
Q76
2N7002_SOT23
VGA@
S SSM3K7002FU_SC70-3
VGA@
D
+1.8VSDGPU
2010/08/10
4
1
510K_0402_1%
Title
Size
C
Use boradway GPU,

R28 change to
0 Ohm(SD028000080)..
0_0402_5%@
Issued Date
+3VS_DELAY
VGA@
AM26
AN26
VGA_ON
100mA
R795
470_0603_5%
VGA@
10U_0805_6.3V6M
2
VGA@
R76
0_0603_5% VGA@
40mA
AN20
AM20
216-0729002 A12 M96_BGA962

VGA@
VGA@
AUX2P
AUX2N
18P_0402_50V8J
2
VGA@
H2SYNC
V2SYNC
+VDD2DI
DDC2CLK
DDC2DATA
TS_FDO
TSVDD
TSVSS
1 M96@
+3VS_DELAY
1
1
VGA@ C476
R28
40,45,51,52,55
VGA@
AG31
AG32
AM27
AL27
XTALIN
XTALOUT
R45
31
31
42mA
VDD2DI
VSS2DI
AM19
AL19
4.7K_0402_5%
EC_SMB_CK2 14,38
VGA_CRT_B 31
VGA_CRT_HSYNC
VGA_CRT_VSYNC
RSET
DDC1CLK
DDC1DATA
+3VS_DELAY
2
R32
+3VS_DELAY
AVDD
AVSSQ
AUX1P
AUX1N
DPLL_VDDC
DPLUS
DMINUS
THM_ALERT#
Q9B
2N7002DW-T/R7_SOT363-6
VGA@
+DPLL_VDDC
+1.8VSDGPU
XTALIN
1M_0603_5%
VGA@
C149
1U_0402_6.3V4Z
VGA@
2
VGA@
C134
1U_0402_6.3V4Z
VGA@
C159
0.1U_0402_16V4Z
GPU_VID1
2
100P_0402_50V8J
2
VGA@
C150
10U_0603_6.3V6M
C278
TXCDP_DPD3P
TXCDM_DPD3N
VREFG
+DPLL_PVDD
1
C124
0.1U_0402_16V4Z
+VGA_VREF AH13
2 C277
0.1U_0402_16V4Z
VGA@
L16
BLM18AG121SN1D_0603
2
1
VGA@
1
C123
10U_0603_6.3V6M
+1.1VSDGPU
L19
BLM18AG121SN1D_0603
2
1
VGA@
1
AT17
AR16
+3VS_DELAY
R48
4.7K_0402_5%
VGA@
C71
10U_0603_6.3V6M
2 10K_0402_5%
+1.8VSDGPU
TX2P_DPC0P
TX2M_DPC0N
ALERT#
+3VS_DELAY
C78
0.1U_0402_16V4Z
@ R121 1
2 10K_0402_5%ROMSE_GPIO22
TX1P_DPC1P
TX1M_DPC1N
AU16
AV15
C97
1U_0402_6.3V4Z
1
R177 1 @
AT15
AR14
D-
VGA@
2 499_0402_1%
VGA@
Do not PU R177 for GPIO22 if not implement external flash ROM
TX0P_DPC2P
TX0M_DPC2N
VGA_SMB_DA2
VGA@
DAC2
VGA@
+1.8VSDGPU
AU14
AV13
VGA_SMB_CK2
C136
10U_0603_6.3V6M
@
@
@
@
@
TXCCP_DPC3P
TXCCM_DPC3N
SDATA
ADM1032ARMZ-2REEL_MSOP8
C148
0.1U_0402_16V4Z
T5
T4
T3
T6
T2
AT33
AU32
SCLK
D+
0.1U_0402_16V4Z
DGPU_BKL_EN
SOUT_GPIO8
SIN_GPIO9
CLK_GPIO10
VGA_GPIO11
VGA_GPIO12
VGA_GPIO13
AR32
AT31
TX5P_DPB0P
TX5M_DPB0N
VDD
C69
VGA_AC_DET
16 DGPU_BKL_EN
TX4P_DPB1P
TX4M_DPB1N
C72
22U_0805_6.3V6M
1
2
1
2VGA@
D9
ACIN_BUF
U15
1
15,38
VRAM_ID0
VRAM_ID1
VRAM_ID2
VRAM_ID3
R637
10K_0402_5%
R639
10K_0402_5%
R640
10K_0402_5%
R638
10K_0402_5%
AV31
AU30
C79
0.1U_0402_16V4Z
GPIO_0
GPIO_1
GPIO_2
GPIO_3_SMBDATA
GPIO_4_SMBCLK
GPIO_5_AC_BATT
GPIO_6
GPIO_7_BLON
GPIO_8_ROMSO
GPIO_9_ROMSI
GPIO_10_ROMSCK
GPIO_11
GPIO_12
GPIO_13
GPIO_14_HPD2
GPIO_15_PWRCNTL_0
GPIO_16_SSIN
GPIO_17_THERMAL_INT
GPIO_18_HPD3
GPIO_19_CTF
GPIO_20_PWRCNTL_1
GPIO_21_BB_EN
GPIO_22_ROMCSB
GPIO_23_CLKREQB
JTAG_TRSTB
JTAG_TDI
JTAG_TCK
JTAG_TMS
JTAG_TDO
GENERICA
GENERICB
GENERICC
GENERICD
GENERICE_HPD4
GENERICF
GENERICG
TX3P_DPB2P
TX3M_DPB2N
C137
1U_0402_6.3V4Z
AH20
AH18
AN16
AH23
AJ23
AH17
AJ17
AK17
AJ13
AH15
AJ16
AK16
AL16
AM16
AM14
AM13
AK14
AG30
AN14
AM17
AL13
AJ14
AK13
AN13
AM23
AN23
AK23
AL24
AM24
AJ19
AK19
AJ20
AK20
AJ24
AH26
AH24
2
VGA@
VGA@
GPU_THERM_D+
2200P_0402_50V7K
1
2
C109
GPU_THERM_D-
VGA_GPIO0
VGA_GPIO1
VGA_GPIO2
AR30
AT29
C96
1U_0402_6.3V4Z
SCL
SDA
TXCBP_DPB3P
TXCBM_DPB3N
R645
10K_0402_5%
R647
10K_0402_5%
R648
10K_0402_5%
R646
10K_0402_5%
I2C
AK26
AJ26
GENERAL PURPOSE I/O
2 4.7K_0402_5%
2 4.7K_0402_5%
VGA_LCD_CLK
VGA_LCD_DAT
30 VGA_LCD_CLK
30 VGA_LCD_DAT
+1.8VSDGPU
DPC
DPD
+3VS_DELAY
VRAM_ID3 VRAM_ID2 VRAM_ID1 VRAM_ID0
Samsung
DPB
VGA_HDMI_TXD2+ 32
VGA_HDMI_TXD2- 32
Location
VRAM
001
VGA_HDMI_TXD1+ 32
VGA_HDMI_TXD1- 32
AT27
AR26
BIOS_ROM_EN
VRAM_ID0
VRAM_ID1
VRAM_ID2
VRAM_ID3
AU26
AV25
TX2P_DPA0P
TX2M_DPA0N
GPIO13
GPIO12
GPIO11
CONFIG[2]
CONFIG[1]
CONFIG[0]
GPIO13,12,11 (config 2,1,0) :

memory apertures
a) If BIOS_ROM_EN = 1, then Config[2:0] defines CONFIG[3:0]
the ROM type.
128 MB 000
b) If BIOS_ROM_EN = 0, then Config[2:0] defines 256 MB 001
64 MB 010
the primary memory aperture size.
TX1P_DPA1P
TX1M_DPA1N
11
GPIO22
DVPCNTL_MVP_0
DVPCNTL_MVP_1
DVPCNTL_0
DVPCNTL_1
DVPCNTL_2
DVPCLK
DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8
DVPDATA_9
DVPDATA_10
DVPDATA_11
DVPDATA_12
DVPDATA_13
DVPDATA_14
DVPDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23
Enable CLKREQ# Power Management

0: CLKREQ# power management capability is disabled
1: CLKREQ# power management capability is enabled
STRAP_BIF
_CLK_PM_EN
AR8
AU8
AP8
AW8
AR3
AR1
AU1
AU3
AW3
AP6
AW5
AU5
AR6
AW6
AU6
AT7
AV7
AN7
AV9
AT9
AR10
AW10
AU10
AP10
AV11
AT11
AR12
AW12
AU12
AP12
DPA
External VGA Thermal Sensor

+3VS_DELAY
0= Advertises the PCI-E device as 2.5 GT/s capable at power-on

1= Advertises the PCI-E device as 5.0 GT/s capable at power-on
5.0 GT/s capability will be controlled by software
VGA_HDMI_TXD0+ 32
VGA_HDMI_TXD0- 32
GPIO2
VGA_HDMI_TXC+ 32
VGA_HDMI_TXC- 32
TX0P_DPA2P
TX0M_DPA2N
BIF_GEN2_EN
MUTI GFX
AU24
AV23
AT25
AR24
TXCAP_DPA3P
TXCAM_DPA3N
GPIO1
TX_DEEMPH_EN
PCI Express Transmitter De-emphasis Enable

0: Tx de-emphasis diabled for mobile mode
1: Tx de-emphasis enabled (Defailt setting for desktop)
Transmitter Power Saving Enable

0: 50% Tx output swing for mobile mode
1: full Tx output swing (Default setting for Desktop)
C111
0.1U_0402_16V4Z
GPIO0
TX_PWRS_ENB
Default
Pin Straps description
Strap Name
Date:
SCHEMATICS,MB A5511
Document Number
Rev
C
401762
Sheet

1
24
of
60
U54C
U54D
MVREFDA
MVREFSA
NC_MEM_CALRN0
NC_MEM_CALRN1
NC_MEM_CALRN2
QSA_0/RDQSA_0
QSA_1/RDQSA_1
QSA_2/RDQSA_2
QSA_3/RDQSA_3
QSA_4/RDQSA_4
QSA_5/RDQSA_5
QSA_6/RDQSA_6
QSA_7/RDQSA_7
C34
D29
D25
E20
E16
E12
J10
D7
QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7
QSA_0B/WDQSA_0
QSA_1B/WDQSA_1
QSA_2B/WDQSA_2
QSA_3B/WDQSA_3
QSA_4B/WDQSA_4
QSA_5B/WDQSA_5
QSA_6B/WDQSA_6
QSA_7B/WDQSA_7
A34
E30
E26
C20
C16
C12
J11
F8
QSA#0
QSA#1
QSA#2
QSA#3
QSA#4
QSA#5
QSA#6
QSA#7
ODTA0
ODTA1
J21
G19
ODTA0
ODTA1
CLKA0
CLKA0B
H27
G27
CLKA0
CLKA0#
CLKA1
CLKA1B
J14
H14
CLKA1
CLKA1#
RASA0B
RASA1B
K23
K19
RASA0#
RASA1#
CASA0B
CASA1B
K20
K17
CASA0#
CASA1#
CSA0B_0
CSA0B_1
K24
K27
CSA0#_0
CSA1B_0
CSA1B_1
M13
K16
CSA1#_0
CKEA0
CKEA1
K21
J20
CKEA0
CKEA1
WEA0B
WEA1B
K26
L15
WEA0#
WEA1#
RSVD#1
RSVD#2
RSVD#3
AF28
AG28
AL31
RSVD#5
RSVD#6
H23
J19
RSVD#9
RSVD#11
T8
W8
MEM_CALRP1
NC_MEM_CALRP0
NC_MEM_CALRP2
A_BA[0..2] 28
DQMA#[0..7]
DQMA#[0..7] 28
QSA[0..7]
QSA[0..7]
QSA#[0..7]
ODTA0
ODTA1
28
QSA#[0..7] 28
28
28
CLKA0
CLKA0#
28
28
CLKA1
CLKA1#
28
28
RASA0#
RASA1#
28
28
CASA0#
CASA1#
28
28
CSA0#_0
28
+1.5VSDGPU
R129
100_0402_1%
M96@
CSA1#_0
28
CKEA0
CKEA1
28
28
WEA0#
WEA1#
28
28
MVREFDB
GCORE_SEN
VDDCI_SEN
R118
100_0402_1%
VGA@
2
VGA@
GCORE_SEN 55
VDDCI_SEN 52
R83
1K_0402_5%
1
2 TESTEN
VGA@
TEST_MCLK
TEST_YCLK
+1.5VSDGPU
MAA13
28
DQB_0
DQB_1
DQB_2
DQB_3
DQB_4
DQB_5
DQB_6
DQB_7
DQB_8
DQB_9
DQB_10
DQB_11
DQB_12
DQB_13
DQB_14
DQB_15
DQB_16
DQB_17
DQB_18
DQB_19
DQB_20
DQB_21
DQB_22
DQB_23
DQB_24
DQB_25
DQB_26
DQB_27
DQB_28
DQB_29
DQB_30
DQB_31
DQB_32
DQB_33
DQB_34
DQB_35
DQB_36
DQB_37
DQB_38
DQB_39
DQB_40
DQB_41
DQB_42
DQB_43
DQB_44
DQB_45
DQB_46
DQB_47
DQB_48
DQB_49
DQB_50
DQB_51
DQB_52
DQB_53
DQB_54
DQB_55
DQB_56
DQB_57
DQB_58
DQB_59
DQB_60
DQB_61
DQB_62
DQB_63
P8
T9
P9
N7
N8
N9
U9
U8
Y9
W9
AC8
AC9
AA7
AA8
Y8
AA9
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
B_BA2
B_BA0
B_BA1
DQMB_0
DQMB_1
DQMB_2
DQMB_3
DQMB_4
DQMB_5
DQMB_6
DQMB_7
H3
H1
T3
T5
AE4
AF5
AK6
AK5
DQMB#0
DQMB#1
DQMB#2
DQMB#3
DQMB#4
DQMB#5
DQMB#6
DQMB#7
QSB_0/RDQSB_0
QSB_1/RDQSB_1
QSB_2/RDQSB_2
QSB_3/RDQSB_3
QSB_4/RDQSB_4
QSB_5/RDQSB_5
QSB_6/RDQSB_6
QSB_7/RDQSB_7
F6
K3
P3
V5
AB5
AH1
AJ9
AM5
QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7
G7
K1
P1
W4
AC4
AH3
AJ8
AM3
QSB#0
QSB#1
QSB#2
QSB#3
QSB#4
QSB#5
QSB#6
QSB#7
ODTB0
ODTB1
T7
W7
ODTB0
ODTB1
CLKB0
CLKB0B
L9
L8
CLKB0
CLKB0#
CLKB1
CLKB1B
AD8
AD7
CLKB1
CLKB1#
RASB0B
RASB1B
T10
Y10
RASB0#
RASB1#
CASB0B
CASB1B
W10
AA10
CASB0#
CASB1#
CSB0B_0
CSB0B_1
P10
L10
CSB0#_0
CSB1B_0
CSB1B_1
AD10
AC10
CSB1#_0
CKEB0
CKEB1
U10
AA11
CKEB0
CKEB1
WEB0B
WEB1B
N10
AB11
WEB0#
WEB1#
QSB_0B/WDQSB_0
QSB_1B/WDQSB_1
QSB_2B/WDQSB_2
QSB_3B/WDQSB_3
QSB_4B/WDQSB_4
QSB_5B/WDQSB_5
QSB_6B/WDQSB_6
QSB_7B/WDQSB_7
MVREFDB
MVREFSB
AD28
TESTEN
AK10
AL10
CLKTESTA
CLKTESTB
DRAM_RST
ODTB0
ODTB1
29
29
CLKB0
CLKB0#
29
29
CLKB1
CLKB1#
29
29
RASB0#
RASB1#
29
29
CASB0#
CASB1#
29
29
CSB0#_0
29
CSB1#_0
29
CKEB0
CKEB1
29
29
WEB0#
WEB1#
29
29
R126
4.7K_0402_5%
1
2
M96@
R512
0_0402_5%
1
2
M96@
VRAM_RST# 28,29
1
C241
R265
4.7K_0402_5%
M96@
2009/08/10
Broadway
4.7k Ohm
SD028470180
0 Ohm
SD028000080
4.7k Ohm
SD028470180
1000 pF
SE074102K80
R512
Route 100 Ohm differential trace and keep short

Place 0.1u cap(SE070104Z80) to substitue R124 and R125
R327 and R265 change to 51.1 Ohm (SD034511A80)
when use Broadway chip
R126
C241
10k Ohm
SD028100280
680 Ohm
SD028680080
DNI
68 pF
SE071680J80

2010/08/10
Deciphered Date
4
+1.5VSDGPU
2 1000P_0402_50V7K
M96@
M96@
Title
Custom
QSB#[0..7] 29
R127
4.7K_0402_5%
216-0729002 A12 M96_BGA962
VGA@
Compal Secret Data
29
QSB#[0..7]
M96
Use boradway GPU,R129 and R130 must

chaneg to 40.2 Ohm(SD034402A80)..
Issued Date
DQMB#[0..7] 29
QSB[0..7]
R127
Use boradway GPU,R114 and R101 must

chaneg to 40.2 Ohm(SD034402A80)..
B_BA[0..2] 29
QSB[0..7]
R327
4.7K_0402_5%
M96@
1
2
VGA@
GCORE_SEN and FB_GND should route as differential pair

Same as VDDCI_SEN and FB_GND
100_0402_1%
VGA@
B_BA[0..2]
DQMB#[0..7]
AH11
R124
0_0402_5%
M96@
2
2
MVREFSB
1
R122
MAB[0..12] 29
D
MAB_0
MAB_1
MAB_2
MAB_3
MAB_4
MAB_5
MAB_6
MAB_7
MAB_8
MAB_9
MAB_10
MAB_11
MAB_12
MAB_13/BA2
MAB_14/BA0
MAB_15/BA1
1
A
2
VGA@
R125
0_0402_5%
M96@
R130 M96@
100_0402_1%
C233
0.1U_0402_16V4Z
For M97,Broadway,Madison and Park only

C205
0.1U_0402_16V4Z
100_0402_1%
VGA@
29
MVREFSA
1
R100
MAB13
reserve 128Mx16 DDR3 for

next generation of M96
216-0729002 A12 M96_BGA962

VGA@
100_0402_1%
M96@
R101
C5
C3
E3
E1
F1
F3
F5
G4
H5
H6
J4
K6
K5
L4
M6
M1
M3
M5
N4
P6
P5
R4
T6
T1
U4
V6
V1
V3
Y6
Y1
Y3
Y5
AA4
AB6
AB1
AB3
AD6
AD1
AD3
AD5
AF1
AF3
AF6
AG4
AH5
AH6
AJ4
AK3
AF8
AF9
AG8
AG7
AK9
AL7
AM8
AM7
AK1
AL4
AM6
AM1
AN4
AP3
AP1
AP5
MVREFDB Y12
MVREFSB AA12
1243_0402_1%
2 M12
1243_0402_1%
2 M27
1243_0402_1%
2 AH12
DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7
MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
MDB8
MDB9
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
MDB17
MDB18
MDB19
MDB20
MDB21
MDB22
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB57
MDB58
MDB59
MDB60
MDB61
MDB62
MDB63
L18
L20
MAD@ R343 1243_0402_1%

L27
2
MAD@ R344 1243_0402_1%
N12
2
MAD@ R361 1243_0402_1%
2 AG12
VGA@ R498
MAD@ R499
MAD@ R500
+1.5VSDGPU
MVREFDA
MVREFSA
A32
C32
D23
E22
C14
A14
E10
D9
A_BA[0..2]
MDB[0..63]
+1.5VSDGPU
DQMA_0
DQMA_1
DQMA_2
DQMA_3
DQMA_4
DQMA_5
DQMA_6
DQMA_7
MAB[0..12]
29
VGA@
2
VGA@
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
A_BA2
A_BA0
A_BA1
C247
0.1U_0402_16V4Z
100_0402_1%
G24
J23
H24
J24
H26
J26
H21
G21
H19
H20
L13
G16
J16
H16
J17
H17
R117
B
C216
0.1U_0402_16V4Z
MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8
MAA_9
MAA_10
MAA_11
MAA_12
MAA_13/BA2
MAA_14/BA0
MAA_15/BA1
MVREFDA
100_0402_1%
M96@
R114
DQA_0
DQA_1
DQA_2
DQA_3
DQA_4
DQA_5
DQA_6
DQA_7
DQA_8
DQA_9
DQA_10
DQA_11
DQA_12
DQA_13
DQA_14
DQA_15
DQA_16
DQA_17
DQA_18
DQA_19
DQA_20
DQA_21
DQA_22
DQA_23
DQA_24
DQA_25
DQA_26
DQA_27
DQA_28
DQA_29
DQA_30
DQA_31
DQA_32
DQA_33
DQA_34
DQA_35
DQA_36
DQA_37
DQA_38
DQA_39
DQA_40
DQA_41
DQA_42
DQA_43
DQA_44
DQA_45
DQA_46
DQA_47
DQA_48
DQA_49
DQA_50
DQA_51
DQA_52
DQA_53
DQA_54
DQA_55
DQA_56
DQA_57
DQA_58
DQA_59
DQA_60
DQA_61
DQA_62
DQA_63
+1.5VSDGPU
C37
C35
A35
E34
G32
D33
F32
E32
D31
F30
C30
A30
F28
C28
A28
E28
D27
F26
C26
A26
F24
C24
A24
E24
C22
A22
F22
D21
A20
F20
D19
E18
C18
A18
F18
D17
A16
F16
D15
E14
F14
D13
F12
A12
D11
F10
A10
C10
G13
H13
J13
H11
G10
G8
K9
K10
G9
A8
C8
E8
A6
C6
E6
A5
MDB[0..63]
MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63
MDA[0..63]
MEMORY INTERFACE A
28
MAA[0..12] 28
MDA[0..63]
MEMORY INTERFACE B
MAA[0..12]
D
SCHEMATICS,MB A5511
Rev
C
401762
Date:
Sheet

1
25
of
60
For DDR3 , MVDDQ=1.5V
C114
10U_0805_6.3V6M
C139
1U_0402_6.3V4Z
M97 and Mahattan VDDC and VDDCI

ball assignmentsare different from M96
If M96 is populated on this design,
VDDC and VDDCI shoudl be shorted
C210
1U_0402_6.3V4Z
+ C577
+ C578
330U_D2_2V_Y 330U_D2_2V_Y
2
2
VGA@ VGA@
+BBP
1
2
Q60
SI2301BDS_SOT23
+GPU_CORE
M96@
2
2
G
1
3
+5VSDGPU
R526
1
M96@
100K_0402_5%
Q59
R527
SSM3K7002FU_SC70-3
M96@
M96@
1
10K_0402_5%
2
G
BB_EN
+1.8VSDGPU
24
C657
1U_0402_6.3V4Z
M96@
1
@
L56
BLM18PG121SN1D_0603
C163
1U_0402_6.3V4Z
VGA@
1
+GPU_CORE
VGA@
1
C194
1U_0402_6.3V4Z
VGA@
1
C146
10U_0805_6.3V6M
C239
10U_0805_6.3V6M
VGA@
1
C183
1U_0402_6.3V4Z
VGA@
1
C170
1U_0402_6.3V4Z
C164
1U_0402_6.3V4Z
VGA@
1
VGA@
1
C180
1U_0402_6.3V4Z
VGA@
1
C189
1U_0402_6.3V4Z
VGA@
1
C201
1U_0402_6.3V4Z
C219
1U_0402_6.3V4Z
C632
10U_0805_6.3V6M
C145
1U_0402_6.3V4Z
VGA@
1
BB_EN=0V,for Back Biasing Disabled,

Q59=OFF,Q60=OFF and Q56=ON,
+BBP=+GPU_CORE
BB_EN=+3.3V,for Back Biasing Enabled,
Q59=ON,Q60=ON and Q2006=OFF,
+BBP=+1.8VSDGPU
VGA@
1
VGA@
1
VGA@
1
VGA@
1
C179
1U_0402_6.3V4Z
VGA@
1
C190
1U_0402_6.3V4Z
VGA@
1
C202
1U_0402_6.3V4Z
VGA@
1
C177
1U_0402_6.3V4Z
VGA@
1
C161
1U_0402_6.3V4Z
VGA@
1
C203
1U_0402_6.3V4Z
VGA@
1
375mA
VGA@
1
VGA@
1
+VDDCI
C279
10U_0805_6.3V6M
M15 +VDDC1
VGA@
N13
R12
1
T12
2
216-0729002 A12 M96_BGA962

VGA@
VGA@
1
VGA@
1
M96@
C674
10U_0805_6.3V6M
VGA@
2
ISOLATED VDDCI#1
CORE I/O VDDCI#2
VDDCI#3
VDDCI#4
PCIE_VDDC
+1.1VSDGPU
C678
10U_0805_6.3V6M
C235
0.1U_0402_16V4Z
VGA@
2
A
C228
1U_0402_6.3V4Z
C193
1U_0402_6.3V4Z
+BBP
Back Bias is not supported on

M97,Broadway,Madison and Park
VGA@
VGA@
1
C132
10U_0805_6.3V6M
BBP#1
BBP#2
C178
1U_0402_6.3V4Z
AA13
Y13
C217
1U_0402_6.3V4Z
32mA
C224
1U_0402_6.3V4Z
BACK BIAS
VGA@
C154
1U_0402_6.3V4Z
SPVSS
C130
1U_0402_6.3V4Z
SPV10
AN10
VGA@
1
Q56
SSM3K7002FU_SC70-3
C199
1U_0402_6.3V4Z
VGA@
2
136mA
Back Biasing
C175
1U_0402_6.3V4Z
For M96 SPV10=+GPU_CORE

For M97,Madison and Park SPV10=+1.1VSDGPU
VGA@
2
C251
0.1U_0402_16V4Z
1
L66
VGA@
2
BLM18AG121SN1D_0603
C265
1U_0402_6.3V4Z
NC_SPV18
AN9
VGA@
1
VGA@
1
C125
10U_0805_6.3V6M
AM10
VGA@
1
VGA@
1
C192
1U_0402_6.3V4Z
+SPV_18
+SPV10
NC_MPV18#1
NC_MPV18#2
C222
1U_0402_6.3V4Z
H7
H8
L50
BLM18AG121SN1D_0603
VGA@ 2
1
+1.8VSDGPU
VGA@
1
VGA@
VGA@
C143
1U_0402_6.3V4Z
+MPV_18
PLL
PCIE_PVDD
VGA@
C126
1U_0402_6.3V4Z
BLM18AG121SN1D_0603
2
1
L26 M96@
AB37
C153
1U_0402_6.3V4Z
68mA
C129
1U_0402_6.3V4Z
VDDRHB
VSSRHB
C275
10U_0805_6.3V6M
V12
U12
C218
1U_0402_6.3V4Z
VDDRHA
VSSRHA
VGA@
1
VGA@
C223
1U_0402_6.3V4Z
M20
M21
VGA@
1
VGA@
1
C152
1U_0402_6.3V4Z
MEM CLK
+VDDRHA
+PCIE_PVDD
VDDR4#1
VDDR4#2
VDDR4#3
VDDR4#4
C271
10U_0805_6.3V6M
AD12
AF11
AF12
AG11
VGA@
1
VGA@
1
VGA@
1
VGA@
VGA@
C200
1U_0402_6.3V4Z
170mA
VGA@
1
VGA@
C165
1U_0402_6.3V4Z
M96@
2
VGA@
1
C151
1U_0402_6.3V4Z
VDDR5#1
VDDR5#2
VDDR5#3
VDDR5#4
VGA@
1
C257
10U_0805_6.3V6M
AF13
AF15
AG13
AG15
I/O
AA15
AA17
AA20
AA22
AA24
AA27
AB13
AB16
AB18
AB21
AB23
AB26
AB28
AC12
AC15
AC17
AC20
AC22
AC24
AC27
AD13
AD16
AD18
AD21
AD23
AD26
AF17
AF20
AF22
AG16
AG18
AG21
AH22
M16
M18
M23
M26
N15
N17
N20
N22
N24
N27
R13
R16
R18
R21
R23
R26
T15
T17
T20
T22
T24
T27
U16
U18
U21
U23
U26
V15
V17
V20
V22
V24
V27
Y16
Y18
Y21
Y23
Y26
Y28
AH27
AH28
C162
1U_0402_6.3V4Z
VDDR3#1
VDDR3#2
VDDR3#3
VDDR3#4
VGA@
C188
1U_0402_6.3V4Z
AF23
AF24
AG23
AG24
170mA
+VDDR4_5
0.1U_0402_16V4Z
+VDDR3
POWER
C182
0.1U_0402_16V4Z
VDD_CT#1
VDD_CT#2
VDD_CT#3
VDD_CT#4
VDDC#1
VDDC#2
VDDC#3
VDDC#4
VDDC#5
VDDC#6
VDDC#7
VDDC#8
VDDC#9
VDDC#10
VDDC#11
VDDC#12
VDDC#13
VDDC#14
VDDC#15
VDDC#16
VDDC#17
VDDC#18
VDDC#19
VDDC#20
VDDC#21
VDDC#22
VDDC#23
VDDC#24
VDDC#25
VDDC#26
VDDC#27
VDDC#28
VDDC#29
VDDC#30
VDDC#31
VDDC#32
VDDC#33
VDDC#34
VDDC#35
VDDC#36
VDDC#37
VDDC#38
VDDC#39
VDDC#40
VDDC#41
VDDC#42
VDDC#43
VDDC#44
VDDC#45
VDDC#46
VDDC#47
VDDC#48
VDDC#49
VDDC#50
VDDC#51
VDDC#52
VDDC#53
VDDC#54
VDDC#55
VDDC#56
VDDC#57
VDDC#58
VDDC#59
VDDC#60
VDDC#61
VDDC#62
VDDC#63
VDDC#64
VDDC#65
VDDC#66
VDDC#67
VDDC#68
VDDC#69
VDDC#70
VDDC#71
VDDC#72
VDDC#73
VDDC#74
VGA@
29500mA
CORE
VGA@
C158
1U_0402_6.3V4Z
C160
0.1U_0402_16V4Z
M96@
2
AF26
AF27
AG26
AG27
G30
G31
H29
H30
J29
J30
L28
M28
N28
R28
T28
U28
VGA@
C131
1U_0402_6.3V4Z
1400mA
PCIE_VDDC#1
PCIE_VDDC#2
PCIE_VDDC#3
PCIE_VDDC#4
PCIE_VDDC#5
PCIE_VDDC#6
PCIE_VDDC#7
PCIE_VDDC#8
PCIE_VDDC#9
PCIE_VDDC#10
PCIE_VDDC#11
PCIE_VDDC#12
LEVEL
TRANSLATION
136mA
+VDD_CT
AA31 +PCIE_VDDR VGA@ VGA@

AA32
AA33
1
1
AA34
V28
W29
2
2
W30
Y31
C144
0.1U_0402_16V4Z
PCIE_VDDR#1
PCIE_VDDR#2
PCIE_VDDR#3
PCIE_VDDR#4
PCIE_VDDR#5
PCIE_VDDR#6
PCIE_VDDR#7
PCIE_VDDR#8
C142
0.1U_0402_16V4Z
C244
1U_0402_6.3V4Z
VGA@
2
C237
0.1U_0402_16V4Z
MAD@
2
C712
0.1U_0402_16V4Z
MAD@
2
C709
1U_0402_6.3V4Z
C714
10U_0603_6.3V6M
MAD@
2
VGA@
2
M96@
2
+VDDRHB
C260
10U_0603_6.3V6M
+1.1VSDGPU
C211
1U_0402_6.3V4Z
C212
VGA@
2
MAD@
BLM18AG121SN1D_0603
2
1
L68
MAD@
1
1
+1.8VSDGPU
VGA@
C236
0.1U_0402_16V4Z
VGA@
2
C695
1U_0402_6.3V4Z
C77
0.1U_0402_16V4Z
VGA@
2
C95
1U_0402_6.3V4Z
+GPU_CORE
C70
10U_0603_6.3V6M
For Mahattan only
MAD@
2
C292
0.1U_0402_16V4Z
MAD@
2
C289
1U_0402_6.3V4Z
C290
0.1U_0402_16V4Z
C291
1U_0402_6.3V4Z
C293
10U_0603_6.3V6M
MAD@
2
C181
1U_0402_6.3V4Z
VGA@
2
L65
BLM18AG121SN1D_0603
C226
1U_0402_6.3V4Z
C240
10U_0603_6.3V6M
M96@
MAD@
2
C166
1U_0402_6.3V4Z
VGA@
2
M96@
2
MAD@
2
60mA
1
2
1
BLM18AG121SN1D_0603
M96@
C191
10U_0603_6.3V6M
L60
+1.5VSDGPU
VGA@
2
VGA@
2
2
1
L28
BLM18AG121SN1D_0603
M96 only
C635
10U_0603_6.3V6M
1
L21
BLM18AG121SN1D_0603
VGA@
2
VGA@
VGA@
VGA@
2
VGA@
1
C243
1U_0402_6.3V4Z
C245
1U_0402_6.3V4Z
VGA@
VGA@
BLM18AG121SN1D_0603
2
1
L29
MAD@
1
1
+1.8VSDGPU
210mA
PCIE
VDDR1#1
VDDR1#2
VDDR1#3
VDDR1#4
VDDR1#5
VDDR1#6
VDDR1#7
VDDR1#8
VDDR1#9
VDDR1#10
VDDR1#11
VDDR1#12
VDDR1#13
VDDR1#14
VDDR1#15
VDDR1#16
VDDR1#17
VDDR1#18
VDDR1#19
VDDR1#20
VDDR1#21
VDDR1#22
VDDR1#23
VDDR1#24
VDDR1#25
VDDR1#26
VDDR1#27
VDDR1#28
VDDR1#29
VDDR1#30
VDDR1#31
VDDR1#32
VDDR1#33
VDDR1#34
+3VS_DELAY
+1.5VSDGPU
C249
1U_0402_6.3V4Z
VGA@
2
+1.8VSDGPU
2
1
L11
BLM18AG121SN1D_0603
1
VGA@
AC7
AD11
AF7
AG10
AJ7
AK8
AL9
G11
G14
G17
G20
G23
G26
G29
H10
J7
J9
K11
K13
K8
L12
L16
L21
L23
L26
L7
M11
N11
P7
R11
U11
U7
Y11
Y7
+1.8VSDGPU
+1.8VSDGPU
MEM I/O
2900mA
VGA@
1
L51
BLM18AG121SN1D_0603
VGA@
C248
1U_0402_6.3V4Z
VGA@
VGA@
C267
1U_0402_6.3V4Z
C215
1U_0402_6.3V4Z
VGA@
C269
1U_0402_6.3V4Z
VGA@
C262
1U_0402_6.3V4Z
C195
1U_0402_6.3V4Z
VGA@
VGA@
C169
1U_0402_6.3V4Z
VGA@
C743
10U_0805_6.3V6M
VGA@
C238
1U_0402_6.3V4Z
C736
10U_0805_6.3V6M
VGA@
VGA@
C231
1U_0402_6.3V4Z
C738
10U_0805_6.3V6M
VGA@
C742
10U_0805_6.3V6M
C746
10U_0805_6.3V6M
VGA@
C261
1U_0402_6.3V4Z
VGA@
C155
1U_0402_6.3V4Z
VGA@
C266
1U_0402_6.3V4Z
VGA@
D
VGA@
C250
1U_0402_6.3V4Z
VGA@
C268
1U_0402_6.3V4Z
330U_D2_2V_Y
VGA@ 2
VGA@
C270
1U_0402_6.3V4Z
+ C581
VGA@
C258
1U_0402_6.3V4Z
U54E
VGA@
+1.5VSDGPU
R525
MAD@
0_0603_5%
Issued Date
Compal Secret Data
2009/08/10
2010/08/10
Deciphered Date
Title
Custom
4
SCHEMATICS,MB A5511
Rev
C
401762
Date:
Sheet

1
26
of
60
U54F
L55
BLM18AG121SN1D_0603
2
1
+1.8VSDGPU
MAD@
MAD@ +DPC_VDD18
0_0603_5%
R591
+1.1VSDGPU
2
DP A/B POWER
0_0603_5%
AP20
AP21
+DPC_VDD10
VGA@
NC_DPC_VDD18#1
NC_DPC_VDD18#2
NC_DPA_VDD18#1
NC_DPA_VDD18#2
AN24
AP24
DPA_VDD10#1
DPA_VDD10#2
AP31
AP32
AN17
AP16
AP17
AW14
AW16
DPC_VSSR#1
DPC_VSSR#2
DPC_VSSR#3
DPC_VSSR#4
DPC_VSSR#5
DPA_VSSR#1
DPA_VSSR#2
DPA_VSSR#3
DPA_VSSR#4
DPA_VSSR#5
AN27
AP27
AP28
AW24
AW26
NC_DPB_VDD18#1
NC_DPB_VDD18#2
AP25
AP26
+DPA_VDD10
VGA@
R832
+1.1VSDGPU
MAD@ +DPD_VDD18
0_0603_5%
R573
FB_GND
M96@
R80
0_0402_5%
+1.8VSDGPU
+DPE_VDD18
Ball AW34 and AW35 are short to GND in M96,

but NC in Broadway
AN19
AP18
AP19
AW20
AW22
DPD_VSSR#1
DPD_VSSR#2
DPD_VSSR#3
DPD_VSSR#4
DPD_VSSR#5
DPB_VSSR#1
DPB_VSSR#2
DPB_VSSR#3
DPB_VSSR#4
DPB_VSSR#5
AN29
AP29
AP30
AW30
AW32
AW18
DPCD_CALR
AH34
AJ34
DP E/F POWER
DPE_VDD18#1
DPE_VDD18#2
AL33
AM33
VGA@
VGA@
AN34
AP39
AR39
AU37
2 AW35
M96@
R771 0_0402_5%
+DPE_VDD18
AF34
AG34
+DPE_VDD10
AK33
AK34
+DPE_VDD18
R770 0_0402_5%
2
M96@
AN33
AP33
VGA@
R834
+DPB_VDD18
+DPB_VDD10
MAD@
0_0603_5%
+1.8VSDGPU
+1.1VSDGPU
C
R533
150_0402_1%
1
2
VGA@
DPAB_CALR
AW28
DP PLL POWER
DPA_PVDD
DPA_PVSS
AU28
AV27
+DPA_PVDD
DPE_VDD10#1
DPE_VDD10#2
DPB_PVDD
DPB_PVSS
AV29
AR28
+DPB_PVDD
+1.8VSDGPU
DPE_VSSR#1
DPE_VSSR#2
DPE_VSSR#3
DPE_VSSR#4
DPE_VSSR#5
DPC_PVDD
DPC_PVSS
AU18
AV17
+DPC_PVDD
+1.8VSDGPU
DPD_PVDD
DPD_PVSS
AV19
AR18
+DPD_PVDD
+1.8VSDGPU
DPE_PVDD
DPE_PVSS
AM37
AN38
+DPE_PVDD
NC_DPF_PVDD
NC_DPF_PVSS
AL38
AM35
VGA@
+DPE_VDD10
C98
1U_0402_6.3V4Z
VGA@
C128
0.1U_0402_16V4Z
+DPE_VDD18
+DPE_VDD10
1
DPB_VDD10#1
DPB_VDD10#2
VGA@
VGA@
VGA@
VGA@
C76
10U_0603_6.3V6M
VGA@
VGA@
L13
BLM18AG121SN1D_0603
2
1
VGA@
1
R558
150_0402_1%
2
1
DPD_VDD10#1
DPD_VDD10#2
+DPE_VDD10
DPF_VDD10#1
DPF_VDD10#2
DPEF_CALR
2
VGA@
216-0729002 A12 M96_BGA962

VGA@
2
VGA@
Issued Date
216-0729002 A12 M96_BGA962

VGA@
5
2009/08/10
2
VGA@
2
MAD@
2010/08/10
Deciphered Date
3
L52
BLM18AG121SN1D_0603
2
1
MAD@
2
MAD@
+1.8VSDGPU
Title
Custom
+1.8VSDGPU
Compal Secret Data
C639
10U_0603_6.3V6M
A39
AW1
AW39
L54
BLM18AG121SN1D_0603
2
1
VGA@
C643
1U_0402_6.3V4Z
2
MAD@
C648
0.1U_0402_16V4Z
VSS_MECH#1
VSS_MECH#2
VSS_MECH#3
VGA@
C638
10U_0603_6.3V6M
1 AM39
C642
1U_0402_6.3V4Z
DPF_VSSR#1
DPF_VSSR#2
DPF_VSSR#3
DPF_VSSR#4
DPF_VSSR#5
1
150_0402_1%
VGA@
VGA@
+1.8VSDGPU
+DPF_PVDD
R516
2
C645
0.1U_0402_16V4Z
AF39
AH39
AK39
AL34
AM34
DPF_VDD18#1
DPF_VDD18#2
L58
BLM18AG121SN1D_0603
2
1
VGA@
C665
10U_0603_6.3V6M
AP14
AP15
C664
1U_0402_6.3V4Z
+1.1VSDGPU
+DPD_VDD10
NC_DPD_VDD18#1
NC_DPD_VDD18#2
MAD@
C663
0.1U_0402_16V4Z
L14
BLM18AG121SN1D_0603
2
1
VGA@
1
1
0_0603_5%
VGA@
FB_GND 52,55
AP22
AP23
L18
BLM18AG121SN1D_0603
2
1
+1.1VSDGPU
1
+1.8VSDGPU
MAD@
C135
10U_0603_6.3V6M
DPC_VDD10#1
DPC_VDD10#2
MAD@
C133
1U_0402_6.3V4Z
AP13
AT13
+DPA_VDD18
C185
1U_0402_6.3V4Z
DP C/D POWER
R831
+1.8VSDGPU
C644
0.1U_0402_16V4Z
U54H
C647
10U_0603_6.3V6M
C141
1U_0402_6.3V4Z
GND#101
GND#102
GND#103
GND#104
GND#105
GND#106
GND#107
GND#108
GND#109
GND#110
GND#111
GND#112
GND#113
GND#114
GND#115
GND#116
GND#117
GND#118
GND#119
GND#120
GND#121
GND#122
GND#123
GND#124
GND#125
GND#126
GND#127
GND#128
GND#129
GND#130
GND#131
GND#132
GND#133
GND#134
GND#135
GND#136
GND#137
GND#138
GND#139
GND#140
GND#141
GND#142
GND#143
GND#144
GND#145
GND#146
GND#147
GND#148
GND#149
GND#150
GND#151
GND#152
GND#153
GND#154
GND#155
GND#156
GND#157
GND#158
GND#159
GND#160
GND#161
GND#162
GND#163
GND#164
GND#165
GND#166
GND#167
GND#168
GND#169
GND#170
GND#171
GND#172
GND#173
GND#174
GND#175
GND#176
A3
A37
AA16
AA18
AA2
AA21
AA23
AA26
AA28
AA6
AB12
AB15
AB17
AB20
AB22
AB24
AB27
AC11
AC13
AC16
AC18
AC2
AC21
AC23
AC26
AC28
AC6
AD15
AD17
AD20
AD22
AD24
AD27
AD9
AE2
AE6
AF10
AF16
AF18
AF21
AG17
AG2
AG20
AG22
AG6
AG9
AH21
AH29
AJ10
AJ11
AJ2
AJ28
AJ6
AK11
AK31
AK7
AL11
AL14
AL17
AL2
AL20
AL21
AL23
AL26
AL32
AL6
AL8
AM11
AM31
AM9
AN11
AN2
AN30
AN6
AN8
AP11
AP7
AP9
AR5
AW34
B11
B13
B15
B17
B19
B21
B23
B25
B27
B29
B31
B33
B7
B9
C1
C39
E35
E5
F11
F13
C140
0.1U_0402_16V4Z
GND
GND#1
GND#2
GND#3
GND#4
GND#5
GND#6
GND#7
GND#8
GND#9
GND#10
GND#11
GND#12
GND#13
GND#14
GND#15
GND#16
GND#17
GND#18
GND#19
GND#20
GND#21
GND#22
GND#23
GND#24
GND#25
GND#26
GND#27
GND#28
GND#29
GND#30
GND#31
GND#32
GND#33
GND#34
GND#35
GND#36
GND#37
GND#38
GND#39
GND#40
GND#41
GND#42
GND#43
GND#44
GND#45
GND#46
GND#47
GND#48
GND#49
GND#50
GND#51
GND#52
GND#53
GND#54
GND#55
GND#56
GND#57
GND#58
GND#59
GND#60
GND#61
GND#62
GND#63
GND#64
GND#65
GND#66
GND#67
GND#68
GND#69
GND#70
GND#71
GND#72
GND#73
GND#74
GND#75
GND#76
GND#77
GND#78
GND#79
GND#80
GND#81
GND#82
GND#83
GND#84
GND#85
GND#86
GND#87
GND#88
GND#89
GND#90
GND#91
GND#92
GND#93
GND#94
GND#95
GND#96
GND#97
GND#98
GND#99
GND#100
C94
10U_0603_6.3V6M
F15
F17
F19
F21
F23
F25
F27
F29
F31
F33
F7
F9
G2
G6
H9
J2
J27
J6
J8
K14
K7
L11
L17
L2
L22
L24
L6
M17
M22
M24
N16
N18
N2
N21
N23
N26
N6
R15
R17
R2
R20
R22
R24
R27
R6
T11
T13
T16
T18
T21
T23
T26
U15
U17
U2
U20
U22
U24
U27
U6
V11
V16
V18
V21
V23
V26
W2
W6
Y15
Y17
Y20
Y22
Y24
Y27
U13
V13
PCIE_VSS#1
PCIE_VSS#2
PCIE_VSS#3
PCIE_VSS#4
PCIE_VSS#5
PCIE_VSS#6
PCIE_VSS#7
PCIE_VSS#8
PCIE_VSS#9
PCIE_VSS#10
PCIE_VSS#11
PCIE_VSS#12
PCIE_VSS#13
PCIE_VSS#14
PCIE_VSS#15
PCIE_VSS#16
PCIE_VSS#17
PCIE_VSS#18
PCIE_VSS#19
PCIE_VSS#20
PCIE_VSS#21
PCIE_VSS#22
PCIE_VSS#23
PCIE_VSS#24
PCIE_VSS#25
PCIE_VSS#26
PCIE_VSS#27
PCIE_VSS#28
PCIE_VSS#29
PCIE_VSS#30
PCIE_VSS#31
PCIE_VSS#32
PCIE_VSS#33
PCIE_VSS#34
PCIE_VSS#35
C147
0.1U_0402_16V4Z
AB39
E39
F34
F39
G33
G34
H31
H34
H39
J31
J34
K31
K34
K39
L31
L34
M34
M39
N31
N34
P31
P34
P39
R34
T31
T34
T39
U31
U34
V34
V39
W31
W34
Y34
Y39
SCHEMATICS,MB A5511
Rev
C
401762
Date:
Sheet

1
27
of
60
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
M2
N8
M3
BA0
BA1
BA2
J7
K7
K9
CK
CK
CKE/CKE0
K1
L2
J3
K3
L3
ODT/ODT0
CS/CS0
RAS
CAS
WE
QSA2
QSA0
F3
C7
DQSL
DQSU
DQMA#2
DQMA#0
E7
D3
DML
DMU
QSA#2
QSA#0
G3
B7
DQSL
DQSU
T2
RESET
L8
ZQ/ZQ0
J1
L1
J9
L9
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
CLKA0
CLKA0#
ODTA0_1
CSA0#_0
RASA0#
CASA0#
WEA0#
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
M2
N8
M3
BA0
BA1
BA2
CLKA0
CLKA0#
CKEA0
J7
K7
K9
CK
CK
CKE/CKE0
A1
A8
C1
C9
D2
E9
F1
H2
H9
ODTA0_1
CSA0#_0
RASA0#
CASA0#
WEA0#
K1
L2
J3
K3
L3
ODT/ODT0
CS/CS0
RAS
CAS
WE
QSA3
QSA1
F3
C7
DQSL
DQSU
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQMA#3
DQMA#1
E7
D3
DML
DMU
QSA#3
QSA#1
G3
B7
DQSL
DQSU
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
Pull high for Madison and Park...
B1
B9
D1
D8
E2
E8
F9
G1
G9
25
+1.5VSDGPU
CLKA1
CLKA1#
J7
K7
K9
CK
CK
CKE/CKE0
K1
L2
J3
K3
L3
ODT/ODT0
CS/CS0
RAS
CAS
WE
QSA4
QSA5
F3
C7
DQSL
DQSU
DQMA#4
DQMA#5
E7
D3
DML
DMU
QSA#4
QSA#5
G3
B7
DQSL
DQSU
CKEA1
ODTA1_1
25
25
25
25
CSA1#_0
RASA1#
CASA1#
WEA1#
D7
C3
C8
C2
A7
A2
B8
A3
MDA43
MDA44
MDA40
MDA45
MDA42
MDA46
MDA41
MDA47
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
M8
H1
VREFCA
VREFDQ
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
A_BA0
A_BA1
A_BA2
M2
N8
M3
BA0
BA1
BA2
CLKA1
CLKA1#
CKEA1
J7
K7
K9
CK
CK
CKE/CKE0
A1
A8
C1
C9
D2
E9
F1
H2
H9
ODTA1_1
CSA1#_0
RASA1#
CASA1#
WEA1#
K1
L2
J3
K3
L3
ODT/ODT0
CS/CS0
RAS
CAS
WE
QSA6
QSA7
F3
C7
DQSL
DQSU
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQMA#6
DQMA#7
E7
D3
DML
DMU
QSA#6
QSA#7
G3
B7
DQSL
DQSU
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
+1.5VSDGPU
VRAM_RST# T2
RESET
L8
ZQ/ZQ0
J1
L1
J9
L9
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
+1.5VSDGPU
VRAM_RST# T2
RESET
L8
ZQ/ZQ0
J1
L1
J9
L9
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
R107
243_0402_1%
VGA@
R632
243_0402_1%
VGA@
96-BALL
SDRAM DDR3
K4B1G1646E-HC12_FBGA96
X76@
+1.5VSDGPU
+1.5VSDGPU
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
MDA63
MDA58
MDA60
MDA59
MDA61
MDA56
MDA62
MDA57
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
+1.5VSDGPU
+1.5VSDGPU
+1.5VSDGPU
VGA@
R548
4.99K_0402_1%
VGA@
R158
4.99K_0402_1%
VGA@
C284
VREFDA_Q3
1
VGA@
R633
4.99K_0402_1%
VREFCA_A3
1
VGA@
C198
VGA@
C737
VREFCA_A4
1
VGA@
R556
4.99K_0402_1%
VGA@
C677
VGA@
VGA@
2
VGA@
2
VGA@
2
VGA@
2
C735
1U_0402_6.3V6K
VGA@
2
C734
1U_0402_6.3V6K
VGA@
2
C733
1U_0402_6.3V6K
VGA@
2
C732
1U_0402_6.3V6K
VGA@
2
C731
1U_0402_6.3V6K
VGA@
C281
1U_0402_6.3V6K
VGA@
2
C213
1U_0402_6.3V6K
VGA@
2
C283
1U_0402_6.3V6K
VGA@
2
VGA@
+1.5VSDGPU
2
VGA@
2
VGA@
2
VGA@
2
VGA@
C326
10U_0603_6.3V6M
2
VGA@
VRAM P/N :
Samsung : SA000035700 (S IC D3 64MX16 K4W1G1646E-HC12 FBGA 96P)
Hynix : SA000032400 (S IC D3 64MX16 H5TQ1G63BFR-12C FBGA 1.5V )
C316
10U_0603_6.3V6M
2
VGA@
C310
10U_0603_6.3V6M
2
VGA@
C302
10U_0603_6.3V6M
Compal Secret Data
Issued Date
2009/08/10
2010/08/10
Deciphered Date
Title
SCHEMATICS,MB A5511
Custom
VREFDA_Q4
1
+1.5VSDGPU
C282
1U_0402_6.3V6K
VGA@
2
C115
1U_0402_6.3V6K
2
VGA@
VGA@
R631
4.99K_0402_1%
VGA@
R105
4.99K_0402_1%
+1.5VSDGPU
VGA@
R157
4.99K_0402_1%
VREFDA_Q2
1
VGA@
C656
C675
1U_0402_6.3V6K
VGA@
C654
1U_0402_6.3V6K
96-BALL
SDRAM DDR3
X76@
VGA@
R108
4.99K_0402_1%
VGA@
R523
4.99K_0402_1%
VREFCA_A2
1
VGA@
C676
C655
1U_0402_6.3V6K
VGA@
2
C301
10U_0603_6.3V6M
VGA@
MDA48
MDA51
MDA55
MDA54
MDA50
MDA52
MDA49
MDA53
1
2
VGA@
R555
4.99K_0402_1%
2
1
VREFDA_Q1
1
C652
1U_0402_6.3V6K
VGA@
2
C309
10U_0603_6.3V6M
E3
F7
F2
F8
H3
H8
G2
H7
0.1U_0402_16V4Z
VGA@
R518
4.99K_0402_1%
+1.5VSDGPU
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
0.1U_0402_16V4Z
VGA@
C208
C653
1U_0402_6.3V6K
VGA@
2
C116
1U_0402_6.3V6K
VGA@
2
C122
1U_0402_6.3V6K
C315
10U_0603_6.3V6M
CLKA1#
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
BA0
BA1
BA2
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VREFCA_A4
VREFDA_Q4
+1.5VSDGPU
C329
10U_0603_6.3V6M
25
R627 VGA@
56_0402_1%
1
2
VGA@
C739
0.01U_0402_25V7K
R629 VGA@
56_0402_1%
2
VGA@
R103
4.99K_0402_1%
VREFCA_A1
1
C119
1U_0402_6.3V6K
CLKA1
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
M2
N8
M3
MDA35
MDA32
MDA38
MDA34
MDA37
MDA36
MDA39
MDA33
+1.5VSDGPU
25
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A_BA0
A_BA1
A_BA2
E3
F7
F2
F8
H3
H8
G2
H7
0.1U_0402_16V4Z
VGA@
C112
+1.5VSDGPU
C118
1U_0402_6.3V6K
CLKA0#
VGA@ R64
56_0402_1%
1
2
A1
A8
C1
C9
D2
E9
F1
H2
H9
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
0.1U_0402_16V4Z
VGA@
R49
4.99K_0402_1%
C117
1U_0402_6.3V6K
VGA@ R73
56_0402_1%
1
2
C121
0.01U_0402_25V7K
25
CLKA0
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
0.1U_0402_16V4Z
R160
56_0402_1%
2
MAD@
ODTA1_1
25
B2
D9
G7
K2
K8
N1
N9
R1
R9
0.1U_0402_16V4Z
VGA@
R547
4.99K_0402_1%
0.1U_0402_16V4Z
VGA@
ODTA1
R159
0_0402_5%
VGA@
R102
4.99K_0402_1%
0.1U_0402_16V4Z
ODTA1
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
96-BALL
SDRAM DDR3
X76@
+1.5VSDGPU
VGA@
R60
4.99K_0402_1%
R522
56_0402_1%
1
2
MAD@
0_0402_5%
25
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
+1.5VSDGPU
VGA@
R521
ODTA0
J1
L1
J9
L9
MDA15
MDA11
MDA14
MDA10
MDA13
MDA9
MDA12
MDA8
VREFCA
VREFDQ
+1.5VSDGPU
ODTA0_1
ODTA0
ZQ/ZQ0
R549
243_0402_1%
VGA@
96-BALL
SDRAM DDR3
X76@
+1.5VSDGPU
+1.5VSDGPU
25
RESET
L8
D7
C3
C8
C2
A7
A2
B8
A3
M8
H1
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
+1.5VSDGPU
R59
243_0402_1%
VGA@
VRAM_RST# T2
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VREFCA_A3
VREFDA_Q3
+1.5VSDGPU
MDA25
MDA30
MDA24
MDA29
MDA26
MDA31
MDA27
MDA28
VRAM_RST#
25,29 VRAM_RST#
A_BA0
A_BA1
A_BA2
E3
F7
F2
F8
H3
H8
G2
H7
QSA#[7..0]
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
QSA[7..0]
25
B2
D9
G7
K2
K8
N1
N9
R1
R9
VREFCA
VREFDQ
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
+1.5VSDGPU
DQMA#[7..0]
25
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
M8
H1
MAA[13..0]
25
25
25
25
25
MDA0
MDA5
MDA1
MDA7
MDA3
MDA4
MDA2
MDA6
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
CKEA0
D7
C3
C8
C2
A7
A2
B8
A3
VREFCA_A2
VREFDA_Q2
25
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
MDA[0..63]
MDA[0..63]
25
A_BA0
A_BA1
A_BA2
MDA22
MDA19
MDA21
MDA18
MDA23
MDA16
MDA20
MDA17
25
25
25
25
E3
F7
F2
F8
H3
H8
G2
H7
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
VREFCA
VREFDQ
U58
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
U21
VREFCA_A1 M8
VREFDA_Q1 H1
U52
U20
4
Rev
C
401762
Date:
Sheet

1
28
of
60
U62
VREFCB_A1 M8
VREFDB_Q1 H1
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13
B_BA0
B_BA1
B_BA2
25
CKEB0
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
M2
N8
M3
BA0
BA1
BA2
J7
K7
K9
CK
CK
CKE/CKE0
K1
L2
J3
K3
L3
ODT/ODT0
CS/CS0
RAS
CAS
WE
QSB3
QSB1
F3
C7
DQSL
DQSU
DQMB#3
DQMB#1
E7
D3
DML
DMU
QSB#3
QSB#1
G3
B7
DQSL
DQSU
T2
RESET
L8
ZQ/ZQ0
J1
L1
J9
L9
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
CLKB0
CLKB0#
MAB[13..0]
25
ODTB0_1
25
25
25
25
DQMB#[7..0]
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
MDB15
MDB10
MDB12
MDB11
MDB13
MDB9
MDB14
MDB8
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A1
A8
C1
C9
D2
E9
F1
H2
H9
CSB0#_0
RASB0#
CASB0#
WEB0#
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
VREFCB_A2 M8
VREFDB_Q2 H1
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
B_BA0
B_BA1
B_BA2
M2
N8
M3
BA0
BA1
BA2
CLKB0
CLKB0#
CKEB0
J7
K7
K9
CK
CK
CKE/CKE0
ODTB0_1
CSB0#_0
RASB0#
CASB0#
WEB0#
K1
L2
J3
K3
L3
ODT/ODT0
CS/CS0
RAS
CAS
WE
QSB2
QSB0
F3
C7
DQSL
DQSU
DQMB#2
DQMB#0
E7
D3
DML
DMU
QSB#2
QSB#0
G3
B7
DQSL
DQSU
+1.5VSDGPU
+1.5VSDGPU
VREFCA
VREFDQ
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
MDB22
MDB20
MDB21
MDB18
MDB19
MDB17
MDB23
MDB16
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
MDB1
MDB6
MDB0
MDB4
MDB3
MDB7
MDB2
MDB5
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
VREFCB_A3 M8
VREFDB_Q3 H1
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13
25
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
B_BA0
B_BA1
B_BA2
M2
N8
M3
BA0
BA1
BA2
CLKB1
CLKB1#
J7
K7
K9
CK
CK
CKE/CKE0
K1
L2
J3
K3
L3
ODT/ODT0
CS/CS0
RAS
CAS
WE
QSB4
QSB5
F3
C7
DQSL
DQSU
DQMB#4
DQMB#5
E7
D3
DML
DMU
QSB#4
QSB#5
G3
B7
DQSL
DQSU
VRAM_RST#
T2
RESET
L8
ZQ/ZQ0
J1
L1
J9
L9
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
CKEB1
ODTB1_1
25
25
25
25
CSB1#_0
RASB1#
CASB1#
WEB1#
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
MDB35
MDB37
MDB34
MDB39
MDB33
MDB38
MDB32
MDB36
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
MDB44
MDB43
MDB47
MDB41
MDB45
MDB40
MDB46
MDB42
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
VREFCA
VREFDQ
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
+1.5VSDGPU
+1.5VSDGPU
U23
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
B_BA0
B_BA1
B_BA2
M2
N8
M3
BA0
BA1
BA2
CLKB1
CLKB1#
CKEB1
J7
K7
K9
CK
CK
CKE/CKE0
ODTB1_1
CSB1#_0
RASB1#
CASB1#
WEB1#
K1
L2
J3
K3
L3
ODT/ODT0
CS/CS0
RAS
CAS
WE
QSB6
QSB7
F3
C7
DQSL
DQSU
DQMB#6
DQMB#7
E7
D3
DML
DMU
QSB#6
QSB#7
G3
B7
DQSL
DQSU
VRAM_RST#
T2
RESET
L8
ZQ/ZQ0
J1
L1
J9
L9
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
+1.5VSDGPU
+1.5VSDGPU
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
MDB55
MDB49
MDB52
MDB50
MDB53
MDB48
MDB54
MDB51
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
MDB56
MDB59
MDB63
MDB62
MDB57
MDB61
MDB58
MDB60
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
+1.5VSDGPU
+1.5VSDGPU
+1.5VSDGPU
96-BALL
SDRAM DDR3
X76@
+1.5VSDGPU
+1.5VSDGPU
96-BALL
SDRAM DDR3
X76@
96-BALL
SDRAM DDR3
X76@
+1.5VSDGPU
R217
4.99K_0402_1%
2
VGA@
VREFCB_A3
1
R683
4.99K_0402_1%
VGA@
VGA@
C765
VREFDB_Q3
1
2
VGA@
1
R702
4.99K_0402_1%
2
2
VGA@
VGA@
C775
R237
4.99K_0402_1%
VGA@
VGA@
C388
VREFCB_A4
1
2
VGA@
R201
4.99K_0402_1%
VREFDB_Q4
1
VGA@
C338
VGA@
VGA@
2
C395
1U_0402_6.3V6K
VGA@
2
C321
1U_0402_6.3V6K
VGA@
2
C393
1U_0402_6.3V6K
VGA@
2
C383
1U_0402_6.3V6K
VGA@
C394
1U_0402_6.3V6K
VGA@
2
C757
1U_0402_6.3V6K
VGA@
2
C761
1U_0402_6.3V6K
VGA@
2
C764
1U_0402_6.3V6K
VGA@
2
C784
1U_0402_6.3V6K
VGA@
C783
1U_0402_6.3V6K
VGA@
2
C324
1U_0402_6.3V6K
VGA@
2
C355
1U_0402_6.3V6K
VGA@
2
C332
1U_0402_6.3V6K
VGA@
2
C342
1U_0402_6.3V6K
VGA@
C391
1U_0402_6.3V6K
VGA@
2
+1.5VSDGPU
VGA@
+1.5VSDGPU
+1.5VSDGPU
2
VGA@
2
VGA@
2
VGA@
Compal Secret Data
Issued Date
C373
10U_0603_6.3V6M
2
VGA@
2
VGA@
C374
10U_0603_6.3V6M
2
VGA@
C375
10U_0603_6.3V6M
2
VGA@
C378
10U_0603_6.3V6M
2
VGA@
C377
10U_0603_6.3V6M
VGA@
C376
10U_0603_6.3V6M
1
1
2009/08/10
2010/08/10
Deciphered Date
Title
SCHEMATICS,MB A5511
Custom
0.1U_0402_16V4Z
VREFDB_Q2
1
VGA@
C350
0.1U_0402_16V4Z
VGA@
R213
4.99K_0402_1%
2
VREFCB_A2
1
0.1U_0402_16V4Z
+1.5VSDGPU
R236
4.99K_0402_1%
VGA@
0.1U_0402_16V4Z
VGA@
C389
R231
4.99K_0402_1%
R651
4.99K_0402_1%
VGA@
0.1U_0402_16V4Z
2
VGA@
C754
1U_0402_6.3V6K
VGA@
2
C756
1U_0402_6.3V6K
VGA@
2
C380
10U_0603_6.3V6M
CLKB1#
VGA@
2
C379
10U_0603_6.3V6M
25
R687
56_0402_1%
2
VGA@
R688
56_0402_1%
1
2
VGA@
VGA@
C767
1U_0402_6.3V6K
C758
0.01U_0402_25V7K
CLKB1
VREFDB_Q1
1
R701
4.99K_0402_1%
+1.5VSDGPU
25
VGA@
C762
+1.5VSDGPU
+1.5VSDGPU
C782
1U_0402_6.3V6K
CLKB0#
R674
4.99K_0402_1%
+1.5VSDGPU
C780
1U_0402_6.3V6K
25
R642
56_0402_1%
2
VGA@
R641
56_0402_1%
1
2
VGA@
2
VGA@
C741
0.01U_0402_25V7K
CLKB0
VREFCB_A1
1
+1.5VSDGPU
VGA@
0.1U_0402_16V4Z
ODTB1_1
25
VGA@
C781
R706
4.99K_0402_1%
0.1U_0402_16V4Z
R248
56_0402_1%
2
MAD@
0.1U_0402_16V4Z
ODTB1
VGA@
0_0402_5%
ODTB1 R242
0_0402_5%
VGA@
VGA@
VGA@
R212
4.99K_0402_1%
R694
56_0402_1%
2
MAD@
R227
4.99K_0402_1%
VGA@
ODTB0 R700
R675
4.99K_0402_1%
ODTB0
R707
4.99K_0402_1%
2
+1.5VSDGPU
ODTB0_1
VGA@
96-BALL
SDRAM DDR3
X76@
+1.5VSDGPU
VGA@
R226
243_0402_1%
VGA@
R686
243_0402_1%
R218
243_0402_1%
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
J1
L1
J9
L9
ZQ/ZQ0
Pull high for Madison and Park...
RESET
L8
1
VGA@
R693
243_0402_1%
VRAM_RST# T2
VRAM_RST#
25,28 VRAM_RST#
VREFCA
VREFDQ
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
QSB#[7..0]
25
25
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13
QSB[7..0]
25
VREFCB_A4 M8
VREFDB_Q4 H1
25
MDB26
MDB28
MDB27
MDB31
MDB25
MDB30
MDB24
MDB29
MDB[0..63]
MDB[0..63]
25
E3
F7
F2
F8
H3
H8
G2
H7
U63
25
25
25
25
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
VREFCA
VREFDQ
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
U24
4
Rev
C
401762
Date:
Sheet

1
29
of
60
4
1
R27
38
2
0_0402_5%
U10
23
ENVDD
16 PCH_ENVDD
DGPU_SELECT#
IGPU_SELECT#
R31
100K_0402_5%
2
5
1
7
1A
2A
1OE#
2OE#
2
5
1
7
1
1A
2A
1OE#
2OE#
VCC
1B
2B
GND
8
3
6
4
R18
10K_0402_5%
SG@
SG For LVDS
SG@
SEL=LOW, B1
SEL=High, B2
U19
LED PANEL Conn.
ENVDD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
C31
DISPOFF#
C30
L6
2
1
FBMA-L11-201209-221LMA30T_0805
B+
PCH_ENVDD
C36
68P_0402_50V8J
+3VS
TZOUT0TZOUT0+
LOCAL_DIM
TZOUT1TZOUT1+
COLOR_ENG_EN
TZOUT2TZOUT2+
2 0_0402_5%
R26
2 10K_0402_5%
DGPU_SELECT#
LOCAL_DIM 13
IGPU_SELECT#
IGPU_SELECT# 32
UMA@
18 DGPU_EDIDSEL#
R36
@
1
2
0_0402_5%
R35
SG@
1
2
0_0402_5%
DGPU_EDIDSEL_R#2
220P_0402_50V7K
220P_0402_50V7K
IGPU_EDIDSEL#
10U_0805_10V4Z
0.1U_0402_16V4Z
2B2
3B2
23 VGA_TXOUT223 VGA_TXOUT2+
VGA_TXOUT2- 73
VGA_TXOUT2+ 72
4B1
5B1
16 PCH_TXOUT216 PCH_TXOUT2+
PCH_TXOUT2- 71
PCH_TXOUT2+ 70
4B2
5B2
TXOUT2+
TXOUT2RP7
TXCLK+
TXCLK-
RP1
23 VGA_TZOUT123 VGA_TZOUT1+
12B1
13B1
+3VS
16 PCH_TZOUT116 PCH_TZOUT1+
PCH_TZOUT1- 54
PCH_TZOUT1+ 53
12B2
13B2
VGA_TZOUT2- 51
VGA_TZOUT2+ 50
14B1
15B1
PCH_TZOUT2- 49
PCH_TZOUT2+ 48
14B2
15B2
C32
RP2
TZOUT2+
TZOUT2RP3
TZCLK+
TZCLKRP4
2
1
2
1
2
1
U8
VGA_TXOUT0+
2
VGA_TXOUT01
RP25
VGA_TXOUT1+
2
VGA_TXOUT11
RP24
VGA_TXOUT2+
2
VGA_TXOUT21
RP23
VGA_TXCLK+
2
VGA_TXCLK1
RP22
VGA_TZOUT0+
2
VGA_TZOUT01
RP21
VGA_TZOUT1+
2
VGA_TZOUT11
RP20
VGA_TZOUT2+
2
VGA_TZOUT21
RP19
VGA_TZCLK+
2
VGA_TZCLK1
RP18
24 VGA_LCD_DAT
16 PCH_LCD_DATA
VGA_LCD_DAT
PCH_LCD_DATA
DGPU_EDIDSEL_R#
IGPU_EDIDSEL#
R109 1 UMAO@ 2 0_0402_5%

R98 1 UMAO@ 2 0_0402_5%
I2CC_SCL
I2CC_SDA
VGA_LCD_CLK
VGA_LCD_DAT
R97
R99
1 DIS@
1 DIS@
2 0_0402_5%
2 0_0402_5%
I2CC_SCL
I2CC_SDA
2
5
1
7
1A
2A
1OE#
2OE#
VCC
1B
2B
GND
8
3
6
4
16 PCH_TZCLK16 PCH_TZCLK+
46
45
16B1
17B1
PCH_TZCLKPCH_TZCLK+
44
43
16B2
17B2
42
41
18B1
19B1
40
39
18B2
19B2
3
13
20
21
31
38
52
74
25
7
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
OE2#
OE1#
I2CC_SDA
+5VS C22 SG@

0.1U_0402_16V4Z
1
2
U9
24 VGA_LCD_CLK
16 PCH_LCD_CLK
VGA_LCD_CLK
PCH_LCD_CLK
DGPU_EDIDSEL_R#
IGPU_EDIDSEL#
2
5
1
7
1A
2A
1OE#
2OE#
VCC
1B
2B
GND
8
3
6
4
LCDVDD_ON
I2CC_SCL
R95
10K_0402_5%
SG@
TXOUT1TXOUT1+
A4
A5
11
12
TXOUT2TXOUT2+
A6
A7
14
15
TXCLKTXCLK+
A8
A9
17
18
SEL2
34
A10
A11
23
24
TZOUT0TZOUT0+
A12
A13
26
27
TZOUT1TZOUT1+
A14
A15
29
30
TZOUT2TZOUT2+
A16
A17
32
33
TZCLKTZCLK+
A18
A19
35
36
R44
0_0603_5%
SG@
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
+3VS_SWITCH
4
10
19
22
1
1
1
C110C108 C103
28
37
@ SG@SG@
47
2
2
2
69
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
SCHEMATICS,MB A5511
Custom
3
8
9
Title
4
A2
A3

2010/08/10
Deciphered Date
Date:
TXOUT0TXOUT0+
PI3LVD1012BE_BQSOP80
SG@
Compal Secret Data

2009/08/10
5
6
+3VS
Q13
2N7002_SOT23
SG@
SG@
A0
A1
+3VS
SG@
Issued Date
PCH_LCD_CLK
PCH_LCD_DATA
+5VS C21
SG@
0.1U_0402_16V4Z
1
2
VGA_TZCLKVGA_TZCLK+
TZOUT1+
TZOUT1-
2
1
8B2
9B2
10B2
11B2
2
1
62
61
VGA_TZOUT1- 56
VGA_TZOUT1+ 55
RP8
TZOUT0+
TZOUT0-
2
1
8B1
9B1
RP6
2
1
6B2
7B2
64
63
PCH_TZOUT0- 58
PCH_TZOUT0+ 57
2
0.1U_0402_16V4Z
3
4
DIS@
3
4
DIS@
3
4
DIS@
3
4
DIS@
3
4
DIS@
3
4
DIS@
3
4
DIS@
3
4
DIS@
66
65
RP5
TXOUT1+
TXOUT1-
TXOUT0+
TXOUT00_0404_4P2R_5%
TXOUT1+
TXOUT10_0404_4P2R_5%
TXOUT2+
TXOUT20_0404_4P2R_5%
TXCLK+
TXCLK0_0404_4P2R_5%
TZOUT0+
TZOUT00_0404_4P2R_5%
TZOUT1+
TZOUT10_0404_4P2R_5%
TZOUT2+
TZOUT20_0404_4P2R_5%
TZCLK+
TZCLK0_0404_4P2R_5%
PCH_TXCLKPCH_TXCLK+
PCH_LCD_CLK
PCH_LCD_DATA
DIS ONLY
PCH_TXOUT0+
3
PCH_TXOUT04
UMAO@
0_0404_4P2R_5%
PCH_TXOUT1+
3
PCH_TXOUT14
UMAO@
0_0404_4P2R_5%
PCH_TXOUT2+
3
PCH_TXOUT24
UMAO@
0_0404_4P2R_5%
PCH_TXCLK+
3
PCH_TXCLK4
UMAO@
0_0404_4P2R_5%
PCH_TZOUT0+
3
PCH_TZOUT04
UMAO@
0_0404_4P2R_5%
PCH_TZOUT1+
3
PCH_TZOUT14
UMAO@
0_0404_4P2R_5%
PCH_TZOUT2+
3
PCH_TZOUT24
UMAO@
0_0404_4P2R_5%
PCH_TZCLK+
3
PCH_TZCLK4
UMAO@
0_0404_4P2R_5%
2
1
6B1
7B1
10B1
11B1
1 UMA@ 2 4.7K_0402_5%
1 UMA@ 2 4.7K_0402_5%
TXOUT0+
TXOUT0-
68
67
IGPU_EDIDSEL# 31,32
23 VGA_TZCLK23 VGA_TZCLK+
UMA ONLY
VGA_TXCLKVGA_TXCLK+
DGPU_SELECT#
16
SG@
2009/04/14 UPDATE
C35
USB20_N3 17
USB20_P3 17
C38
2B1
3B1
PCH_TXOUT1- 76
PCH_TXOUT1+ 75
U7
+LCDVDD
VGA_TXOUT1- 78
VGA_TXOUT1+ 77
VGA_TZOUT0- 60
VGA_TZOUT0+ 59
R17
R16
0_0402_5%
1 R20
1 R19
0_0402_5%
0B2
1B2
16 PCH_TXCLK16 PCH_TXCLK+
+3VS
+3VS
2
2
23 VGA_TXCLK23 VGA_TXCLK+
+3VS C27
SG@
0.1U_0402_16V4Z
1
2
31,32 DGPU_EDIDSEL_R#
COLOR_ENG_EN 18
TZCLKTZCLK+
USB20_CMOS_N3
USB20_CMOS_P3
TXCLKTXCLK+
R25
BKOFF#
BKOFF#
R22
@
4.7K_0402_5%
DISPOFF#
38
DGPU_SELECT# 2
17,31,32 DGPU_SELECT#
0B1
1B1
TXOUT2TXOUT2+
D5
@
1
2
U13
NC
TXOUT0TXOUT0+
TXOUT1TXOUT1+
C43
UMA@
0.1U_0402_16V4Z
1
2
1
+3VS
C26
680P_0402_50V7K
2
1
INVTPWM
DISPOFF#
I2CC_SCL
I2CC_SDA
VGA_TXOUT0VGA_TXOUT0+
PCH_TXOUT0- 80
PCH_TXOUT0+ 79
LCDVDD_ON
1 UMAO@ 2 0_0402_5%
L5
2
1
FBMA-L11-201209-221LMA30T_0805
+3VS
R41
NC
W=40mils
+LCDVDD
IPEX_20143-040E-20F
CONN@
INVTPWM
SLE1
+INVPWR_B+
W=60mils
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
G1
G2
G3
G4
G5
G6
LCDVDD_ON
2 0_0402_5%
+INVPWR_B+
41
42
43
44
45
46
1 DIS@
JLVDS1
R37
INVTPWM
0.1U_0402_16V4Z
LCDVDD_ON
8
3
6
4
VCC
1B
2B
GND
+5VS C23
SG@
0.1U_0402_16V4Z
1
2
U11
DPST_PWM_1
PWMSEL_1#
IGPU_PWM_SELECT#
16 PWMSEL_1#
16 IGPU_PWM_SELECT#
+5VS C25
SG@
1
2
C102
0.1U_0402_16V4Z
INVT_PWM
R39
2.2K_0402_5%
@
2
5
P
@
R40
0_0402_5%
1 @
2
R38
SG@ 2
1
0_0402_5%
23 VGA_PNL_PWM
W=60mils
C106
2N7002DW-T/R7_SOT363-6
4.7U_0603_6.3V6K
GPU Support DPST for DIS Only
1 UMAO@ 2 INVTPWM
0_0402_5%
+LCDVDD
Q6B
R30
SG@
DPST_PWM_1
U16
IGPU_PWM_SELECT#
4
LCDVDD_ON
C74
0.047U_0402_16V7K
2N7002DW-T/R7_SOT363-6
16
+3VS
U14
UMA@
2
DPST_PWM
Q8
AO3413_SOT23-3
R33
1K_0402_5%
2
1
1
6 2
4.7U_0603_6.3V6K
Q6A
R69
0_0402_5%
@
1
2 PWMSEL_1#
SG@ 2
1
R70
0_0402_5%
C101
17 DGPU_PWMSEL#
+3VS
R29
100K_0402_5%
300_0603_5%
DGPU_SELECT#
2 0_0402_5% INVT_PWM
2 0_0402_5% VGA_PNL_PWM
1 DIS@
NC
1 @
R34
W=60mils
R43
R42
NC
+3VS
+3V
+3VS C107
SG@
0.1U_0402_16V4Z
1
2
INVTPWM
LCD POWER CIRCUIT
+LCDVDD
Rev
C
401762
Sheet

1
30
of
60
CRT Connector
D6
D4
W=40mils
D3
+5VS
+R_CRT_VCC
+CRT_VCC
D2
DAN217_SC59 DAN217_SC59 DAN217_SC59

F1
L43 1
CRT_B
R508
R503
1
C631
R501
150_0402_1%
2
150_0402_1%
2
UMAO@
CRT_R_1
2
FCM2012CF-800T06_2P
L49 1
2 FCM2012CF-800T06_2P
CRT_R_2
CRT_G_1
2
FCM2012CF-800T06_2P
L44 1
2 FCM2012CF-800T06_2P
CRT_G_2
UMAO@
CRT_B_1
2
FCM2012CF-800T06_2P
L41 1
2 FCM2012CF-800T06_2P
CRT_B_2
UMAO@
JCRT1
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
L40 1
1
C623
2
12P_0402_50V8J
150_0402_1%
1
C611
C630
C615
UMAO@
UMAO@
2
2
22P_0402_50V8J
2
12P_0402_50V8J
12P_0402_50V8J
C610
C50
UMAO@
15P_0402_50V8J
2
22P_0402_50V8J
C41
15P_0402_50V8J
2
C24
15P_0402_50V8J
22P_0402_50V8J
2
+CRT_VCC
R21
CRT_HSYNC
1 10K_0402_5%
1
L3
2
MBC1608121YZF_0603
CRT_HSYNC_2
1
L2
2
MBC1608121YZF_0603
CRT_VSYNC_2
1
1
U12
Y
DSUB_12
C37
10P_0402_50V8J
CRT_HSYNC_1
DSUB_15
2
C40
68P_0402_50V8J 1
74AHCT1G125GW_SOT353-5
16
17
R13
100K_0402_5%
C19
10P_0402_50V8J
G
G
ALLTO_C10532-11505-L
CONN@
CRT_DET# 18
100P_0402_50V8J
2 0.1U_0402_16V4Z
OE#
C49
C18
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
CRT_G
C17
0.1U_0402_16V4Z
L48 1
1.1A_6VDC_FUSE
1
+3VS
Change to 0 ohm for DIS

BOM Structure:VGA@
CRT_R
RB491D_SC59-3
W=40mils
C14
+CRT_VCC
68P_0402_50V8J
+CRT_VCC
5
P
2
U4
Y
CRT_VSYNC_1
CRT_VSYNC
2 0.1U_0402_16V4Z
OE#
C29
74AHCT1G125GW_SOT353-5
+3VS_DELAY
+3VS
Q5
2N7002_SOT23
DIS@
DSUB_12
1
S
2
1
C171
23
21
16
15
13
16 PCH_CRT_R
16 PCH_CRT_G
16 PCH_CRT_B
16 PCH_CRT_HSYNC
16 PCH_CRT_VSYNC
A1
B1
C1
D1
E1
CRT_R
CRT_G
CRT_B
YD
YE
8
11
CRT_HSYNC
CRT_VSYNC
GND
GND
GND
GND
3
7
10
20
+CRT_VCC
DGPU_SELECT# 17,30,32
+3VS_DELAY
R23
2.2K_0402_5%
@
+5VS C16
SG@
0.1U_0402_16V4Z
1
2
U5
2
5
6
R15
2.2K_0402_5%
R14
2.2K_0402_5%
2
A0
B0
C0
D0
E0
12
YA
YB
YC
24
22
18
17
14
SEL
VDD
VDD
VDD
VDD
DSUB_15
24 VGA_CRT_R
24 VGA_CRT_G
24 VGA_CRT_B
24 VGA_CRT_HSYNC
24 VGA_CRT_VSYNC
1
4
9
19
Q4
1 2N7002_SOT23
DIS@
Reserved for DIS only
Reserved for UMA only
U17
+3VS
DSUB_15
SEL=Low, N0
SEL=High, N1
VGA_DDC_CLK
Q3
1 2N7002_SOT23
UMAO@
PCH_CRT_CLK
SG@
2
SG@
2
VGA_DDC_DATA
1
C172
0.1U_0402_16V4Z
SG@
2
0.1U_0402_16V4Z
SG@
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C173
VGA DDC PU 4.7K

on Page 23
PCH_CRT_DATA
1
C113
Q2
2N7002_SOT23
UMAO@
DSUB_12
1
PCH DDC PU 2.2K

on Page 17
+3VS
2
5
1
7
24 VGA_DDC_DATA
16 PCH_CRT_DATA
30,32 IGPU_EDIDSEL#
PI3V512QE_QSOP24
SG@
+3VS_DELAY
1A
2A
1OE#
2OE#
VCC
1B
2B
GND
8
3
6
4
DSUB_12
SG@
DSUB_15
Reserved for DIS only
PCH_CRT_R
PCH_CRT_G
PCH_CRT_B
PCH_CRT_HSYNC
PCH_CRT_VSYNC
R56
R58
R51
R52
R54
2
2
2
2
2
UMAO@ 1
UMAO@ 1
UMAO@ 1
UMAO@ 1
UMAO@ 1
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
CRT_R
CRT_G
CRT_B
CRT_HSYNC
CRT_VSYNC
VGA_CRT_R
VGA_CRT_G
VGA_CRT_B
VGA_CRT_HSYNC
VGA_CRT_VSYNC
R55
R57
R50
R46
R53
2
2
2
2
2
DIS@
DIS@
DIS@
DIS@
DIS@
1
1
1
1
1
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
CRT_R
CRT_G
CRT_B
CRT_HSYNC
CRT_VSYNC
+5VS C15
SG@
0.1U_0402_16V4Z
1
2
U6
2
Reserved for UMA only

4
R24
2.2K_0402_5%
@
24 VGA_DDC_CLK
16 PCH_CRT_CLK
DGPU_EDIDSEL_R#
IGPU_EDIDSEL#
pull-up 2.2k on PCH side
1A
2A
1OE#
2OE#
VCC
1B
2B
GND
8
3
6
4
SG@
pull-up 10k on GPU SIDE
Compal Secret Data
2009/08/10
Issued Date
2
5
1
7
2010/08/10
Deciphered Date
Title
Size
B
Date:
SCHEMATICS,MB A5511
Document Number
Rev
C
401762
Sheet

E
31
of
60
+3VS
+3VS
JHDMI1
0.1U_0402_16V4Z
C671
UMA@
C667
UMA@
0.1U_0402_16V4Z
R94
2 0_0603_5%
D8
2
0.1U_0402_16V4Z
W=40mils
F2
+5VS
+HDMI_5V
RB491D_SC59-3
HDMI_SDATA
HDMI_SCLK
HDMI_OE#
HDMI_R_CK-
2
1
1.1A_6VDC_FUSE
C184
0.1U_0402_16V4Z
D
Q12
2N7002_SOT23
UMA@
2
G
S
C167
UMA@
0.1U_0402_16V4Z
HDMI_R_D0+
HDMI_R_D1-
R91
UMA@
100K_0402_5%
HDMI_R_D1+
HDMI_R_D2-
+3VS
HDMI_R_CK+
HDMI_R_D0-
HDMI_HPD
11
12
14
15
17
18
20
21
CLK-B
CLK+B
D0-B
D0+B
D1-B
D1+B
D2-B
D2+B
26
28
29
30
31
50
27
49
2
1
R772 2
UMA@
0_0402_5%
2
2
2
2
2
@
@
@
@
@
1
1
1
1
1
R535 1 UMA@ 2 2.2K_0402_5%
SDVO_SDATA
R542 1 UMA@ 2 2.2K_0402_5%
SDVO_SCLK
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
HDMI_OE#
0_0402_5%
HDMI_R_CK+
HDMI_TX0-
R544 1
0_0402_5%
HDMI_R_D0-
L61
WCM-2012-900T_0805
@
4
HDMI_SCLK_1
L25
IGPU_SELECT# 30
HDMI_SDATA_1
L22
PI3HDMI201ZFEX_TQFN56_11X5
HDMI_TX1-
R557 1
L63
WCM-2012-900T_0805
@
4
C204
12P_0402_50V8J
UMAO@
HDMI_TX1+
R560
HDMI_TX2-
R569
HDMI_SDATA
C227
12P_0402_50V8J
1
L64
WCM-2012-900T_0805
@
4
HDMI_TX2+
2 0_0402_5% HDMI_HPD_SW
HDMI_C_CLKHDMI_C_CLK+
RP9
HDMI_SDA_SW
3
HDMI_SCL_SW
4
UMAO@
0_0404_4P2R_5%
+5VS
8
3
6
4
HDMI_SDA_SW
SG@
16 PCH_DPB_HPD
2N7002_SOT23
1 Q58
2N7002_SOT23
Q57
0_0402_5%
HDMI_R_D1-
0_0402_5%
HDMI_R_D1+
0_0402_5%
HDMI_R_D2-
3
2
0_0402_5%
HDMI_R_D2+
HDMI_CLKHDMI_CLK+
0_0404_4P2R_5%
HDMI_TX0HDMI_TX0+
0_0404_4P2R_5%
HDMI_TX1HDMI_TX1+
0_0404_4P2R_5%
HDMI_TX2HDMI_TX2+
0_0404_4P2R_5%
HDMI_SCLK_1
24 VGA_HDMI_TXD224 VGA_HDMI_TXD2+
C246 VGA@2
C252 VGA@2
1 0.1U_0402_16V7K HDMI_C_TX2-R594 1 DIS@

1 0.1U_0402_16V7K HDMI_C_TX2+R601 1 DIS@
2 499_0402_1%
2 499_0402_1%
C225 VGA@2
C234 VGA@2
1 0.1U_0402_16V7K HDMI_C_TX1-R570 1 DIS@

1 0.1U_0402_16V7K HDMI_C_TX1+R574 1 DIS@
2 499_0402_1%
2 499_0402_1%
C214 VGA@2
C220 VGA@2
1 0.1U_0402_16V7K HDMI_C_TX0-R559 1 DIS@

1 0.1U_0402_16V7K HDMI_C_TX0+R567 1 DIS@
2 499_0402_1%
2 499_0402_1%
24 VGA_HDMI_TXC24 VGA_HDMI_TXC+
C197 VGA@2
C206 VGA@2
1 0.1U_0402_16V7K HDMI_C_CLK-R545 1 DIS@

1 0.1U_0402_16V7K HDMI_C_CLK+R553 1 DIS@
2 499_0402_1%
2 499_0402_1%
+HDMI_5V_OUT
Q61
VGA@
2
2N7002_SOT23G
R531
@
100K_0402_5%
2
2
5
1
7
1A
2A
1OE#
2OE#
VCC
1B
2B
GND
8
3
6
4
HDMI_HPD_SW
Compal Secret Data
2009/08/10
Issued Date
SG@
Deciphered Date
2010/08/10
Title
SCHEMATICS,MB A5511
Custom
Date:
HDMI_R_D0+
+5VS C672 SG@

0.1U_0402_16V4Z
1
2
U55
VGA_HDMI_DET
PCH_DPB_HPD
DGPU_EDIDSEL_R#
IGPU_EDIDSEL#
HDMI_SDATA_1
HDMI_SCL_SW
SG@
A
8
3
6
4
VCC
1B
2B
GND
1A
2A
1OE#
2OE#
2
5
1
7
2.2K_0402_5%
VGA_HDMI_SCLK
SDVO_SCLK
DGPU_EDIDSEL_R#
IGPU_EDIDSEL#
24 VGA_HDMI_SCLK
16 SDVO_SCLK
2
1
RP10
2
1
RP11
2
1
RP12
3
4
DIS@
3
4
DIS@
3
4
DIS@
3
4
DIS@
0_0402_5%
R520
R519
2.2K_0402_5%
R792
R794
2.2K_0402_5%2.2K_0402_5%
+5VS C666 SG@

0.1U_0402_16V4Z
1
2
U53
HDMI_C_TX2HDMI_C_TX2+
VCC
1B
2B
GND
1A
2A
1OE#
2OE#
+HDMI_5V_OUT
2
5
1
7
VGA_HDMI_SDATA
SDVO_SDATA
DGPU_EDIDSEL_R#
IGPU_EDIDSEL#
+3VS
+3VS
C659
SG@
0.1U_0402_16V4Z
1
2
U51
24 VGA_HDMI_SDATA
16 SDVO_SDATA
30,31 IGPU_EDIDSEL#
2
1
RP27
SDVO_SDATA
SDVO_SCLK
2
1
R572 1
3
2
HDMI_SDA_SW
3
HDMI_SCL_SW
4
DIS@
0_0404_4P2R_5%
2
1
RP26
R554 1
1
2
MBK1608221YZF_2P 1
R551 1
HDMI_SCLK
2
MBK1608221YZF_2P
HDMI_TX0+
DGPU_SELECT# 17,30,31
PCH_DPB_HPD
R540 1
At UMA only SKU,

Change the L25 and L22 PN to Ohm(SD013000080)
And unpop the C204 and C227.
VGA_HDMI_SDATA
VGA_HDMI_SCLK
HDMI_R_CK-
HDMI_CLK+
R65
10K_0402_5%
VGA@
Place closed to JHDMI1
+3VS
R67
365K_0402_1%
0_0402_5%
HDMI_CLKHDMI_CLK+
HDMI_TX0HDMI_TX0+
HDMI_TX1HDMI_TX1+
HDMI_TX2HDMI_TX2+
R596
R597
R598
R599
R600
R538 1
1
L59
WCM-2012-900T_0805
@
4
HDMI_HPD
2
150K_0402_5%
1
R66
@
HDMI_HPD_SW
EQ_S1
EQ_S0
OC_S2
OC_S1
OC_S0
/OE
SEL2
SEL1
DIS@
2
B
CLKCLK+
D0D0+
D1D1+
D2D2+
43
42
40
39
37
36
34
33
24 VGA_HDMI_DET
47
46
45
HDMI_CLK-
Q11
MMBT3904_NL_SOT23-3
R786
VGA_HDMI_DET 2
DIS@ 1
0_0402_5%
HPDA
SDAA
SCLA
HDPB
SDAB
SCLB
VDD
VDD
VDD
VDD
VDD
VDD
VDD
51
52
53
23
24
25
HPD_SINK
SDA_SINK
SCL_SINK
4
10
16
22
32
38
44
54
57
HDMI_C_CLKHDMI_C_CLK+
CLK-A
CLK+A
D0-A
D0+A
D1-A
D1+A
D2-A
D2+A
R767 0_0402_5%
2
UMA@
55
56
2
3
5
6
8
9
GND
GND
GND
GND
GND
GND
GND
GND
GND
16 PCH_TMDS_CK#
16 PCH_TMDS_CK
16 PCH_TMDS_D0#
16 PCH_TMDS_D0
16 PCH_TMDS_D1#
16 PCH_TMDS_D1
16 PCH_TMDS_D2#
16 PCH_TMDS_D2
20
21
22
23
TAITW_PDVBR9-19FLBS4NN4N1
CONN@
Discrete change to 220pf
R768
R769
0_0402_5% 0_0402_5%
DIS@
UMA@
48
41
35
19
13
7
1
UMA@
U57
HDMI_R_D2+
+3VS_DELAY
+3VS
HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CKGND
CK_shield GND
CK+
GND
D0GND
D0_shield
D0+
D1D1_shield
D1+
D2D2_shield
D2+
C207
UMA@
C668
UMA@
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
C187
UMA@
2
0.1U_0402_16V4Z
HDMI_HPD
+HDMI_5V_OUT
R77
10K_0402_5%
UMA@
C209
C696
<BOM Structure>
UMA@
+HDMI_5V_OUT
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Rev
C
401762
Sheet
1
32
of
60
SATA HDD1 Conn.

CL 4.0 mm
JSATA3
13 SATA_PTX_DRX_P0
13 SATA_PTX_DRX_N0
13 SATA_DTX_C_PRX_N0
13 SATA_DTX_C_PRX_P0
+5VS_HDD1
0.1U_0402_16V4Z
1
C515
C514
SATA_PTX_DRX_P0
SATA_PTX_DRX_N0
C428 1
C427 1
2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
SATA_PTX_C_DRX_P0
SATA_PTX_C_DRX_N0
SATA_DTX_C_PRX_N0
SATA_DTX_C_PRX_P0
C425 1
C424 1
2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
SATA_DTX_PRX_N0
SATA_DTX_PRX_P0
10U_0805_10V4Z
1
C516
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
+3VS
C517
2
+3VS
1000P_0402_50V7K
1
2
3
4
5
6
7
+5VS
R411 1
2 0_0805_5%
+5VS_HDD1
1U_0402_6.3V4Z
C429
C433
C432
1U_0402_6.3V4Z
0.1U_0402_16V4Z
2
2
2
0.1U_0402_16V4Z
GND
A+
AGND
BB+
GND
VCC3.3
VCC3.3
VCC3.3
GND
GND
GND
VCC5
VCC5
VCC5
GND
RESERVED
GND
VCC12
G1
VCC12
G2
VCC12
23
24
SUYIN_127077MA022G206_NR
CONN@
SATA ODD Conn.

CL 6.0 mm
+5VS_ODD
+5VS_ODD
0.1U_0402_16V4Z
1
C426
C422
1000P_0402_50V7K
10U_0805_10V4Z
1
C423
JSATA2
Placea caps. near ODD CONN.
13 SATA_PTX_DRX_P1
13 SATA_PTX_DRX_N1
C421
C470 1
C469 1
2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
SATA_PTX_C_DRX_P1
SATA_PTX_C_DRX_N1
C465 1
C437 1
2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
SATA_DTX_PRX_N1
SATA_DTX_PRX_P1
2
R299 1
1U_0402_6.3V4Z
+5VS
R300 1
@
2
2 1K_0402_1%
+5VS_ODD
0_0805_5%
1
2
3
4
5
6
7
GND
A+
AGND
BB+
GND
8
9
10
11
12
13
DP
+5V
+5V
MD
GND
GND
GND
GND
GND
GND
17
16
15
14
OCTEK_SLS-13SB1G_RV
CONN@
Card Reader & MINI CARD x2(WLAN & TV)

JP12
3
Card Reader
14 PCIE_PTX_C_DRX_P5
14 PCIE_PTX_C_DRX_N5
14 PCIE_DTX_C_PRX_P5
14 PCIE_DTX_C_PRX_N5
TV
WLAN
TV
WLAN
17
17
USB20_N5
USB20_P5
17
17
USB20_N4
USB20_P4
+3VALW
+3VS
60
58
56
54
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
60
58
56
54
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
59
57
55
53
51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
59
57
55
53
51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
RCIRRX
WL_OFF#
E51RXD_P80CLK
E51TXD_P80DATA
RCIRRX 38
WL_OFF# 38
PLT_RST_BUF# 17
MINI2_CLKREQ# 14
E51RXD_P80CLK 38
E51TXD_P80DATA 38
CLK_PCIE_MINI2# 14
CLK_PCIE_MINI2 14
CLK_PCIE_MINI1# 14
CLK_PCIE_MINI1 14
CLK_PCIE_READER# 14
CLK_PCIE_READER 14
PCH_PCIE_WAKE#
PCH_SMBDATA
PCH_SMBCLK
PCH_PCIE_WAKE# 15,34,36
CR_CPPE# 18
CR_WAKE# 18
MINI1_CLKREQ# 14
PCH_SMBDATA 12,14,21,36
PCH_SMBCLK 12,14,21,36
5IN1_LED# 40
MINI1_LED# 39
+1.5VS
+3VS
ACES_88076-06071
CONN@
4
Issued Date
Compal Secret Data
2009/08/10
2010/08/10
Deciphered Date
Title
SCHEMATICS,MB A5511
Size
B
Document Number
Date:
Rev
C
401762
G
Sheet
33
H
of
60
+3V_LAN
+3VALW
R800
60mil
0_1206_5%
1
U70
2
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
+LAN_AVDDL
+LAN_GPHYPLLVDDL
VDDC
VDDC
VDDC
XTALVDDH
14
AVDDH
30
AVDDH
36
27
33
39
24
AVDDL
AVDDL
AVDDL
+LAN_XTALVDDH
+LAN_AVDDH
TRD3_N
37
LAN_MIDI3-
TRD3_P
38
LAN_MIDI3+
TRD2_N
35
LAN_MIDI2-
TRD2_P
34
LAN_MIDI2+
TRD1_N
31
LAN_MIDI1-
TRD1_P
32
LAN_MIDI1+
TRD0_N
29
LAN_MIDI0-
TRD0_P
28
LAN_MIDI0+
LAN_MIDI3- 35
LAN_MIDI3+ 35
LAN_MIDI2- 35
SPROM_CLK
(EECLK)
SPROM_DOUT
(EEDATA)
On chip
AT24C02
+3V_LAN
LAN_MIDI2+ 35
C906 1
GPHY_PLLVDDL
+LAN_PCIEPLLVDD 18
PCIE_PLLVDDL
21
PCIE_PLLVDDL
LAN_MIDI1- 35
R802
1K_0402_1%
@
LAN_MIDI1+ 35
LAN_MIDI0- 35
LAN_MIDI0+ 35
2
0.1U_0402_16V7K
15,33,36 PCH_PCIE_WAKE#
38
EC_PME#
+3V_LAN
5,17,21,38 PLT_RST#
R806 1
R807 1
R808 1
R809
17
16
22
23
LAN_PME#
4
LAN_RESET# 2
20
19
2 0_0402_5%
2 0_0402_5%
24.7K_0402_5%
PCIE_TXD_P
PCIE_TXD_N
PCIE_RXD_P
PCIE_RXD_N
WAKE#
REST#
PCIE_REFCLK_P
PCIE_REFCLK_N
LINKLED#
48
SPD100LED#
47
SPD1000LED#
46
TRAFFICLED#
45
2
R801
0_0402_5%
2
R805
0_0402_5%
LAN_LINK# 35
R811
1K_0402_1%
+3VS
R810 1
2 1K_0402_5%
40
R813 1
2 10K_0402_5%
EECLK
44
SPROM_CLK
SR_LX
13
XTALO
LAN_XTALI
12
XTALI
SR_VFB
11
+1.2V_LAN_OUT
1
2
4.7UH_PG031B-4R7MS_1.1A_20%
LAN_RDAC
26
C913
0.1U_0402_16V4Z
RDAC
SR_VDDP
1.24K_0402_1%
0.1U_0402_16V4Z
2
C914
10U_0805_10V4Z
NC
0.1U_0402_16V4Z
1
C917
C918
BOM Structure =
L104
1
2
BLM18AG601SN1D_2P
C916
+1.2V_LAN
4.7U_0603_6.3V6K
L105
+LAN_GPHYPLLVDDL
1
2
BLM18AG601SN1D_2P
1
1
C919
C920
0.1U_0402_16V4Z
49
BCM57780A0KMLG_QFN48_7X7
20mil
2
2
4.7U_0603_6.3V6K 0.1U_0402_16V4Z
CLKREQ#
0.1U_0402_16V4Z
+LAN_PCIEPLLVDD
1
C915
+3V_LAN
1
9
20mil
PAD
14 LAN_CLKREQ#
10
SR_VDD
L102
1
2
BLM18AG601SN1D_2P
B
+1.2V_LAN
1
R814
1
0.1U_0402_16V4Z
+LAN_AVDDH
1
1
C911
C912
L103
LAN_XTALO_R
20mil
LOW_PWR
+3V_LAN
L101
1
2
BLM18AG601SN1D_2P
+LAN_BIASVDDH 1
C910
VMAIN_PRSINT
L100
1
2
BLM18AG601SN1D_2P
0.1U_0402_16V4Z
20mil
SPROM_DOUT
R812
1K_0402_1%
@
+LAN_XTALVDDH 1
C909
43
1
2
3
4
AT24C02_SO8
20mil
5
14 CLK_PCIE_LAN
14 CLK_PCIE_LAN#
EEDATA
A0
A1
NC
GND
LAN_ACTIVITY# 35
20_0402_5%
MODE
VCC
WP
SCL
SDA
PCIE_DTX_PRX_P1
PCIE_DTX_PRX_N1
U71 @
8
7
6
5
0.1U_0402_16V7K
1
2 C907
1
2 C908
R803
1K_0402_1%
SPROM_CLK
SPROM_DOUT
2 0.1U_0402_16V4Z
@
4.7U_0603_6.3V6K
2
BIASVDDH
6
15
41
+LAN_BIASVDDH
C900
VDDC
25
0.1U_0402_16V4Z
1
1
1
C903
C904
C905
+1.2V_LAN
42
+3V_LAN
C902
4.7U_0603_6.3V6K
2
2
0.1U_0402_16V4Z
C901
20mil
+LAN_AVDDL
1
C921
LAN_XTALI
0.1U_0402_16V4Z
+1.2V_LAN
4.7U_0603_6.3V6K
L106
1
2
BLM18AG601SN1D_2P
C922
+1.2V_LAN
4.7U_0603_6.3V6K
LAN_XTALO_R
A
R815
200_0402_1%
Y10
1
1
2 LAN_XTALO
1
25MHZ_20PF_7A25000012
C923
C924
27P_0402_50V8J
27P_0402_50V8J
2
Compal Secret Data
Issued Date
2009/08/10
2010/08/10
Deciphered Date
Title

SCHEMATICS,MB A5511
Custom
Date:
4
Rev
C
401762
Sheet
1
34
of
60
LAN Connector
D
C925
1
T11
34
34
LAN_MIDI0+
LAN_MIDI0-
LAN_MIDI0+
LAN_MIDI0-
34
34
LAN_MIDI1+
LAN_MIDI1-
LAN_MIDI1+
LAN_MIDI1-
34
34
LAN_MIDI2+
LAN_MIDI2-
LAN_MIDI2+
LAN_MIDI2-
34
34
LAN_MIDI3+
LAN_MIDI3-
LAN_MIDI3+
LAN_MIDI3-
1
2
3
4
5
6
7
8
9
10
11
12
TCT1
TD1+
TD1TCT2
TD2+
TD2TCT3
TD3+
TD3TCT4
TD4+
TD4-
RJ45_MIDI0+
24
23
22
21
20
19
18
17
16
15
14
13
RJ45_MIDI0+
RJ45_MIDI0RJ45_MIDI1+
RJ45_MIDI3-
LED_GREEN-
TX0-
RJ45_MIDI1+
TX1+
RJ45_MIDI2+
TX2+
RJ45_MIDI2-
TX2-
RJ45_MIDI1-
TX1-
RJ45_MIDI3+
RJ45_MIDI3-
TX0+
RJ45_MIDI0-
350uH_GSL5009-1 LF
R819
75_0402_1%
C931
0.1U_0402_16V4Z
2
12
LED_YELLOW-
13
GND
14
GND
15
1
1K_0402_5%
TX3-
R816
+3V_LAN
C926
220P_0402_50V7K
2
R818
+3V_LAN
220P_0402_50V7K
C927
FOX_JM3611L-N3255-7F
R820
75_0402_1%
LAN_ACTIVITY#
34
@68P_0402_50V8J
1
0.1U_0402_16V4Z
2
2
2
C932
R821
75_0402_1%
0.1U_0402_16V4Z
R822
75_0402_1%
2
0.1U_0402_16V4Z
C930
11
LAN_LINK# 34
2
1
1K_0402_5%
LAN_ACTIVITY#
C929
LED_ORANGE-
R817 @
1
2
0_0402_5%
1
2
C928
10
TX3+
68P_0402_50V8J
LAN_LINK#
COMMON+
LED_YELLOW+
CONN@
JRJ1
MCT1
MX1+
MX1MCT2
MX2+
MX2MCT3
MX3+
MX3MCT4
MX4+
MX4-
LAN_ACTIVITY#
LAN_LINK#
RJ45_GND
RJ45_GND
LANGND
1
C933
1000P_1206_2KV7K
2
40mil
Place close to TCT pin
1
C934
2
D40
40mil
C935
4.7U_0603_6.3V6K
C
0.1U_0402_16V4Z
BOM Structure =
PJDLC05_SOT23-3
@
Compal Secret Data
Issued Date
2009/08/10
Deciphered Date
2010/08/10
Title
Size
Date:

SCHEMATICS,MB A5511
Document Number
Rev
C
401762
Sheet

1
35
of
60
New Card Power Switch

U33
17
+3V
17
PCI_RST#
PCI_RST#
38,44,50
SYSON
38,40,44,51,52 SUSP#
11
13
3.3Vin
3.3Vin
3.3Vout
3.3Vout
3
5
AUX_IN
AUX_OUT
15
OC#
19
SYSRST#
SYSON
20
SHDN#
PERST#
SUSP#
STBY#
NC
CP_PE#
10
(Internal Pull High to AUXIN)
CP_USB#
9
(Internal Pull High to AUXIN)
RCLKEN1
18
CPPE#
CPUSB#
GND
Thermal_Pad
Imax = 0.275A
+1.5VS_CARD
60mils
C508
+3VS_CARD
10U_0805_10V4Z
2
40mil
+3VALW_CARD
Imax = 1.35A
C509
C513
10U_0805_10V4Z
2
2
0.1U_0402_16V4Z
17
17
C499
USB20_N12
USB20_P12
R406 0_0402_5% CLKREQ1#

CP_PE# 1
2CP_PE#_R
18 CP_PE#
1
R391
10K_0402_5%
10U_0805_10V4Z
2
RCLKEN1 2
G
14 CLK_PCIE_CARD#
14 CLK_PCIE_CARD
C503
0.1U_0402_16V4Z
U37
4
EXP_CLKREQ# 14
27
28
1
C492
+1.5VS
G Vcc
2
CLKREQ1#
Q30
2N7002_SOT23
+3VS
+3VS
C853
1U_0603_10V4Z
G
1
1
2
R775
10K_0402_5%
BT_ON#
Lid Switch
+RTCBATT
Q71
AO3413_SOT23-3
C849
0.1U_0402_16V4Z
+BT_VCC
1
C859
R777
300_0603_5%
D20
4.7U_0603_6.3V6K
C858
LID_R
1
D19
LID_SW#
+RTCVCC
3
Q72
2N7002_SOT23
2
G
3
VDD
GND
0.1U_0402_16V4Z
R387
47K_0402_5%
R449
1K_0402_5%
+3VALW
29
30
(Hall Effect Switch)
OUTPUT
10U_0805_10V4Z
2
38,39
GND
USB_DUSB_D+
CPUSB#
RSV
RSV
SMB_CLK
SMB_DATA
+1.5V
+1.5V
WAKE#
+3.3VAUX
PERST#
+3.3V
+3.3V
CLKREQ#
CPPE#
REFCLKREFCLK+
GND
PERn0
PERp0
GND
PETn0
PETp0
GND
GND3
GND4
GND1
GND2
SANTA_131851-A_LT
CONN@
C850
0.1U_0402_16V4Z
2
C498
0.1U_0402_16V4Z
PERST1#
+3VS_CARD
+3VS
21
CP_USB#
10U_0805_10V4Z
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+3VS
BT
15,33,34 PCH_PCIE_WAKE#
+3VALW_CARD
2
10U_0805_10V4Z
2
C482
16
+3V
C500
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
+1.5VS_CARD
G577NSR91U_TQFN20_4x4
C475
C512
PERST1#
RCLKEN
+3VS
JEXP1
Imax = 0.75A
1 1
2
4
+3VS
1.5Vout
1.5Vout
+1.5VS_CARD
1.5Vin
1.5Vin
+3VS_CARD
BAS40-04_SOT23-3
38
1
+BT_VCC
C501
U36
10P_0402_50V8J
A3212ELHLT-T_SOT23W-3
2
JBT1
10
GND 8
7
6
5
4
3
2
GND 1
8
7
6
5
4
3
2
1
12
14
+1.5VS
New Card Socket (Left/TOP)

+3VALW_CARD
40mil
+CHGRTC
C566
0.1U_0402_16V4Z
USB20_P10 17
USB20_N10 17
ACES_87213-0800G
CONN@
A
Compal Secret Data
2009/08/10
Issued Date
Deciphered Date
2010/08/10
Title
Size
Date:

SCHEMATICS,MB A5511
Document Number
Rev
C
401762
Sheet
1
36
of
60
+3V
+USB_VCCD
eSATA
U59
C728
GND
IN
IN
EN#
TPS2061DRG4_SO8
<BOM Structure>
4.7U_0603_6.3V6K
2
100K_0402_5%
1
2
R635
10K_0402_5%
R210 1
R209 1
CH3
Vp
CH4
CH2
Vn
USB_OC#2 17
C730
CH1
R196
17
USB20_N2
17
USB20_P2
CH0->2.5dB pre-emphasis;CH1->0dB
CH1->2.5dB pre-emphasis;CH0->0dB
CH0/CH1->2.5dB pre-emphasis
+3VS
1
+
USB20_P2
C286
C297
150U_B_6.3VM_R40M
2
2
470P_0402_50V7K
JSATA1
WCM2012F2S-900T04_0805
@
1
2
R658
0_0402_5%
D1
2 0_0402_5% SATA_DTX_RPI_PRX_N4
2 0_0402_5% SATA_DTX_RPI_PRX_P4
USB20_N2
Function
defalut; CH0/CH1 ->0dB
D0
2 470_0402_5%
2 0_0402_5%
L69
0.1U_0402_16V4Z
R654 1
USB20_P2_1
CM1293-04SO_SOT23-6
2 0_0402_5% SATA_PTX_RPO_DRX_P4
2 0_0402_5% SATA_PTX_RPO_DRX_N4
SATA_DTX_RPO_PRX_N4 R178 1
SATA_DTX_RPO_PRX_P4 R174 1
+USB_VCCD
+USB_VCCD
SATA_PTX_RPI_DRX_P4
SATA_PTX_RPI_DRX_N4
USB20_N2_1
R643
8
7
6
5
OUT
OUT
OUT
FLG
SYSON#
1
2
3
4
D13
+5VALW
1
2
3
4
USB20_N2_1
USB20_P2_1
SATA_PTX_RPO_DRX_P4 C318 2
SATA_PTX_RPO_DRX_N4 C317 2
1 0.01U_0402_25V7K SATA_PTX_C_DRX_P4
1 0.01U_0402_25V7K SATA_PTX_C_DRX_N4
SATA_DTX_RPI_PRX_N4
SATA_DTX_RPI_PRX_P4
1 0.01U_0402_25V7K
1 0.01U_0402_25V7K
C308 2
C305 2
SATA_DTX_PRX_N4
SATA_DTX_PRX_P4
+3VS
+3VS
C779 1
C778 1
2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
SATA_DTX_RPO_PRX_P4
SATA_DTX_RPO_PRX_N4
5
4
TX_1P
TX_1N
D0
D1
3
13
17
18
19
21
GND
GND
GND
GND
GND
PAD
R670
4.7K_0402_5%
@
ESATA_D0
ESATA_D1
9
8
ESATA_D0
TX_0P
TX_0N
15
14
SATA_PTX_RPO_DRX_P4
SATA_PTX_RPO_DRX_N4
RX_1N
RX_1P
12
11
SATA_DTX_RPI_PRX_N4
SATA_DTX_RPI_PRX_P4
R678
4.7K_0402_5%
@
R666
0_0402_5%
1U_0402_6.3V4Z
1
1
C340
C760
@
@
0.1U_0402_16V4Z
1
C360
@
GND
A+ ESATA
AGND
BB+
GND
12
13
14
15
GND
GND
GND
GND
R691
10K_0402_5%
@
ESATA_D1
0.1U_0402_16V4Z
R685
0_0402_5%
@
5
6
7
8
9
10
11
T-SOL_199-2000000903
CONN@
SATA_DTX_C_PRX_P4
SATA_DTX_C_PRX_N4
6
10
16
20
USB
VCC
VCC
VCC
VCC
SATA2_CE
18 PCH_SATA1_CE#
2
Q65G
2N7002_SOT23
RX_0P
RX_0N
1
2
SATA_PTX_RPI_DRX_P4
SATA_PTX_RPI_DRX_N4
2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
C776 1
C777 1
SATA_PTX_DRX_P4
SATA_PTX_DRX_N4
EN
13 SATA_PTX_DRX_P4
13 SATA_PTX_DRX_N4
U61
SATA2_CE
+3VS
VBUS
DD+
GND
SN75LVCP412RTJR_QFN20_4X4~D
+5VALW
+3V
USB/B & ACER LOGO Backlight Conn
+USB_VCCA
U64
+3V
+USB_VCCB
C798
+5VALW
U50
C636
GND
IN
IN
EN#
1
2
R506
10K_0402_5%
TPS2061DRG4_SO8
<BOM Structure>
4.7U_0603_6.3V6K
2
USB_OC#1 17
44,51
C625
C794
150U_B_6.3VM_R40M
1
JP3
USB20_N1 17
USB20_P1 17
17
USB20_N0
USB20_P0
USB20_N0
USB20_P0
L17
PJDLC05_SOT23~D
0.1U_0402_16V4Z
1
C120
D7
+USB_VCCA
CH3
CH2
USB20_N8_1
R281
+5VS
C793
+USB_VCCA
2
470P_0402_50V7K
USB20_P8_1
Vp
CH4
Vn
CH1
2 0_0402_5%
C796
USB20_N0_1
R324 1
JUSB1
3
2
WCM2012F2S-900T04_0805
1
2
0_0402_5%
FBM-L11-160808-601LMT 0603
+USB_VCCA
C797
2
470P_0402_50V7K
USB20_N0_1
USB20_P0_1
1
2
3
4
5
6
7
8
VCC
DD+
GND
2 0_0402_5%
HS USB Port
L33 @
17
17
USB20_N8
USB20_N8
USB20_P8
USB20_P8
GND1
GND2
GND3
GND4
4
1
JUSB2
USB20_N8_1
USB20_P8_1
WCM2012F2S-900T04_0805
1
2
R331
0_0402_5%
SUYIN_020173MR004G565ZR
CONN@
2009/08/10
Issued Date
Deciphered Date
5
6
7
8
GND1
GND2
GND3
GND4
Title
SCHEMATICS,MB A5511
Date:
VCC
DD+
GND

2010/08/10
Custom
1
2
3
4
SUYIN_020173MR004G565ZR
CONN@
Compal Secret Data
For EMI solution 02/23
0.1U_0402_16V4Z
+USB_VCCA
150U_B_6.3VM_R40M
1
L32 @
17
ACES_87213-0800G
CONN@
USB_OC#0 17
C801
CM1293-04SO_SOT23-6
R280 1
2
470P_0402_50V7K
USB20_N1
USB20_P1
C640
@
10
1
2
3
4
5
6
7
8
GND 1
2
3
4
5
6
7
GND 8
D26
USB20_P0_1
150U_B_6.3VM_R40M
1
+USB_VCCB
SYSON#
+USB_VCCA
0.1U_0402_16V4Z
C633
@
USB_OC#4 17
SYSON#
1
2
R751
10K_0402_5%
TPS2061DRG4_SO8
<BOM Structure>
4.7U_0603_6.3V6K
2
R507
100K_0402_5%
8
7
6
5
OUT
OUT
OUT
FLG
R750
100K_0402_5%
8
7
6
5
OUT
OUT
OUT
FLG
1
2
3
4
GND
IN
IN
EN#
1
2
3
4
Rev
C
401762
Sheet
E
37
of
60
For EC Tools
C530
1000P_0402_50V7K
C483
12
13
37
20
38
PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D
18
EC_SCI#
15 PM_CLKRUN#
0.1U_0402_16V4Z
+3VALW
2 EC_SMB_CK1
2.2K_0402_5%
2 EC_SMB_DA1
2.2K_0402_5%
1
R360
1
R359
2 LID_SW#
100K_0402_5%
1
R396
2 KSO1
47K_0402_5%
2 KSO2
47K_0402_5%
1
R407
1
R405
10/1 ENE Recommand

1
R398
2 EC_PME#
10K_0402_5%
+3VALW
39 EC_I2C_DA
EC_SMB_DA1
Q24B
2N7002DW-T/R7_SOT363-6
39
EC_I2C_CK
2N7002DW-T/R7_SOT363-6
47
47
14,24
14,24
EC_SMB_CK1
Q25A
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
63
64
65
66
75
76
BATT_TEMP
BATT_OVP
ADP_I
AD_BID0
ENCODER_DIR
AD
DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3E
DA3/GPIO3F
68
70
71
72
BACKUP_LED#
EN_DFAN1
IREF
CALIBRATE#
PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C
PSDAT2/GPIO4D
TP_CLK/PSCLK3/GPIO4E
TP_DATA/PSDAT3/GPIO4F
83
84
85
86
87
88
EC_MUTE#
PWR_SUSP_LED
PWR_SAVE_LED#
T/P_LOCK_LED#
TP_CLK
TP_DATA
SDICS#/GPXOA00
SDICLK/GPXOA01
SDIDO/GPXOA02
SDIDI/GPXID0
97
98
99
109
3S/4S#
65W/90W#
SBPWR_EN
LID_SW#
SPIDI/RD#
SPIDO/WR#
SPICLK/GPIO58
SPICS#
119
120
126
128
EC_SI_SPI_SO
EC_SO_SPI_SI
EC_SPICLK
EC_SPICS#/FSEL#
CIR_RX/GPIO40
CIR_RLC_TX/GPIO41
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
BATT_LOW_LED#/GPIO54
SUSP_LED#/GPIO55
SYSON/GPIO56
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59
73
74
89
90
91
92
93
95
121
127
EC_RCIRRX
PCH_TEMP_ALERT#
FSTCHG
BATT_BLUE_LED#
CAPS_LED#
BATT_AMB_LED#
PWR_LED
SYSON
VR_ON
ACIN
+3VALW
BATT_TEMP 47
BATT_OVP 48
ADP_I
48
DA Output
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82
KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25 Int. K/B
KSO6/GPIO26 Matrix
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
77
78
79
80
SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47
PS2 Interface
ENCODER_DIR
SPI Flash ROM
GPIO
SM Bus
Rb
EC_MUTE# 42
PWR_SUSP_LED 40
PWR_SAVE_LED# 39
T/P_LOCK_LED# 40
TP_CLK 39
TP_DATA 39
TP_CLK
2 EC_SMB_CK2
2.2K_0402_5%
C536
2 EC_SMB_DA2
2.2K_0402_5%
15P_0402_50V8J
2 EC_ESB_CK_1
2
1
4.7K_0402_5%
2 EC_ESB_DA_1
4.7K_0402_5%
2 PCH_TEMP_ALERT#
2.2K_0402_5%
2 EC_ESB_INT
2.2K_0402_5%
43 FAN_SPEED1
36,39 BT_ON#
40
ON/OFF
13,41 PCH_SPKR
40
NUM_LED#
FAN_SPEED1
E51TXD_P80DATA
E51RXD_P80CLK
ON/OFF
PCH_SPKR
NUM_LED#
EC_CRY1
EC_CRY2
122
123
+3VALW
U28
2
B
A
Y
3
15,24 ACIN_BUF
11
24
35
94
113
ENCODER_PULSE
10K_0402_5%
1
R419
PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPXID3
GPXID4
GPXID5
GPXID6
GPXID7
110
112
114
115
116
117
118
V18R
124
GPI
XCLK1
XCLK0
GND
GND
GND
GND
GND
1
R358
1
R357
1
R421
1
R422
1
R362
1
R416
2 0_0402_5%
2 0_0402_5%
EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
GPO
BKOFF#/GPXO08
WL_OFF#/GPXO09
GPXO10
GPXO11
KB926QFD3_LQFP128_14X14
3S/4S#
65W/90W#
2
R385
1
100K_0402_5%
2
R386
1
100K_0402_5%
+3VALW
PCH_TEMP_ALERT# 18,21
FSTCHG 48
BATT_BLUE_LED# 40
CAPS_LED# 40
BATT_AMB_LED# 40
PWR_LED 40
SYSON
36,44,50
VR_ON
56
ACIN
40,44,46
R363
10K_0402_5%
D18
RCIRRX
EC_RCIRRX
EC_RSMRST# 15
EC_LID_OUT# 14
EC_ON
40
EC_SWI# 15
EC_PWROK 15
BKOFF# 30
WL_OFF# 33
EC_CYP_RST# 39
ME_EN
13
Analog Board ID definition,

Please see page 3.
EC_CRY1
C518
PM_SLP_S4# 15
ENBKL
16
EAPD
41
SUS_PWR_ACK 15
SUSP#
36,40,44,51,52
PBTN_OUT# 5,15,21
EC_PME# 34
15P_0402_50V8J
EC_CRY2
X1
C523
C519
15P_0402_50V8J
32.768KHZ_12.5PF_Q13MC14610002
C493
BATT_TEMP
2
C489
BATT_OVP
2
C528
ACIN
2
4.7U_0603_6.3V6K
20mil
L35
ECAGND 2
1
FBMA-L11-160808-800LMT_0603
100P_0402_50V8J
1
100P_0402_50V8J
1
100P_0402_50V8J
1
ACIN
Compal Secret Data
2009/08/10
Issued Date
Deciphered Date
2010/08/10
Title
Size
B
Date:
1
R356
1
R355
+3VALW
EC_SI_SPI_SO 39
EC_SO_SPI_SI 39
EC_SPICLK 39
EC_SPICS#/FSEL# 39
ENBKL
EAPD
SUS_PWR_ACK
SUSP#
PBTN_OUT#
EC_PME#
10/1 EC Recommand
NC
EC suggested 2.2K for SMBus...
R417 1
R418 1
EC_I2C_INT
KB_BL_LED#
PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
GPIO
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A
2
4.7K_0402_5%
2
4.7K_0402_5%
TP_DATA
3S/4S# 48
65W/90W# 48
SBPWR_EN 44
LID_SW# 36
EC_RSMRST#
EC_LID_OUT#
EC_ON
EC_SWI#
EC_PWROK
BKOFF#
WL_OFF#
EC_CYP_RST#
ME_EN
AGND
+3VS
PM_SLP_S3#
PM_SLP_S5#
EC_SMI#
69
15
15
18
39 EC_ESB_INT
39
EC_ESB_CK
39 EC_ESB_DA
39
EC_I2C_INT
39
KB_BL_LED#
100
101
102
103
104
105
106
107
108
1
C484
R365
100K_0402_5% 0.1U_0402_16V4Z
2
+5VS
33
6
14
15
16
17
18
19
25
28
29
30
31
32
34
36
AD_BID0
39
BACKUP_LED# 39
EN_DFAN1 43
IREF
48
CALIBRATE# 48
SPI Device Interface
PM_SLP_S3#
PM_SLP_S5#
EC_SMI#
EC_ESB_INT
EC_ESB_CK_1
EC_ESB_DA_1
R364
100K_0402_5%
Ra
C520
5,17,21,34 PLT_RST#
1 47K_0402_5%
BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
Input
AD3/GPIO3B
AD4/GPIO42
SELIO2#/AD5/GPIO43
PWM Output
ACOFF
INVT_PWM 30
BEEP#
41
ENCODER_PULSE 39
48
ECAGND
2
1
C494 0.01U_0402_16V7K
R408 2
INVT_PWM
BEEP#
ENCODER_PULSE
ACOFF
EC_RST#
EC_SCI#
17 CLK_PCI_LPC
+3VALW
21
23
26
27
INVT_PWM/PWM1/GPIO0F
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
ACOFF/FANPWM2/GPIO13
OSC
GA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1
LAD0 LPC & MISC
NC
1
2
3
4
5
7
8
10
E51RXD_P80CLK 33
E51TXD_P80DATA 33
ACES_85205-0400
R415 2
EC_GA20
EC_KBRST#
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
0.1U_0402_16V4Z
E51RXD_P80CLK
E51TXD_P80DATA
AVCC
VCC
VCC
VCC
VCC
VCC
VCC
18
EC_GA20
18 EC_KBRST#
13
SERIRQ
13 LPC_FRAME#
13
LPC_AD3
13
LPC_AD2
1 @ 33_0402_5% 13
LPC_AD1
13
LPC_AD0
1
2
3
4
67
9
22
33
96
111
125
U38
1
2
3
4
1
1
1000P_0402_50V7K
+3VALW
JP10
KSO[0..17] 39,40
2
2
0.1U_0402_16V4Z
KSO[0..17]
2
2
0.1U_0402_16V4Z
+3VALW_EC
39,40
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
1
2
C486
C524
C511
C525
C531
KSI[0..7]
KSI[0..7]
OSC
ECAGND
1
R354
0_0805_5%
L36
FBMA-L11-160808-800LMT_0603
1
2 +EC_VCCA
+3VALW
C533
@ 22P_0402_50V8J
2
1
SCHEMATICS,MB A5511
Document Number
Rev
C
401762
Sheet
1
38
of
60
JKB1
KSO0
G2
KSO1
G1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSI[0..7]
EC_SPICS#/FSEL#
2 4.7K_0402_5% SPI_WP#
2 4.7K_0402_5% SPI_HOLD#
R425 1
R423 1
38,40
+3VALW
KSO[0..17]
T/P + Fringer Print
BIOS
2 0.1U_0402_16V4Z
+5V_FP
+SPI_VCC
U40
38 EC_SPICS#/FSEL#
KSI[0..7]
C532 1
2
0_0603_5%
KSO[0..17] 38,40
1
3
7
4
Conn
+5V_FP
220mils
@
CE#
WP#
HOLD#
VSS
VDD
SCK
SI
SO
8
6 R426 1
5 R427 1
2 R404 1
2 0_0402_5%
2 0_0402_5%
2 0_0402_5%
EC_SPICLK 38
EC_SO_SPI_SI 38
EC_SI_SPI_SO 38
+5VS
R332 1
+5VALW
R318 1
2 0_0603_5%
@
2 0_0603_5%
1
C430 C431
1U_0603_10V4Z
2
0.1U_0402_16V4Z
MX25L8005M2C-15G_SOP8
+5VS
150mils
U41
EC_SPICS#/FSEL#
SPI_WP#
SPI_HOLD#
1
3
7
4
CE#
WP#
HOLD#
VSS
VDD
SCK
SI
SO
+SPI_VCC
8
6
5
2
EC_SPICLK
EC_SO_SPI_SI
EC_SI_SPI_SO
JTP1
MX25L1005AMC-12G_SOP8
@
R432
0_0402_5%
Reserved for BIOS simulator.

Footprint SO8
@
C543
33P_0402_50V8K
11
12
ACES_88747-2601
CONN@
GND
GND
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
10
C435
0.1U_0402_16V4Z
TP_DATA 38
TP_CLK 38
USB20_N11
USB20_P11
+5V_FP
USB20_N11 17
USB20_P11 17
ACES_85201-10051
CONN@
100P_0402_50V8J
KSO15
C449 1
100P_0402_50V8J
KSO7
C457 1
100P_0402_50V8J
KSO14
C450 1
100P_0402_50V8J
KSO6
C458 1
100P_0402_50V8J
KSO13
C451 1
100P_0402_50V8J
KSO5
C459 1
100P_0402_50V8J
KSO12
C452 1
100P_0402_50V8J
KSO4
C460 1
100P_0402_50V8J
KSI0
C446 1
100P_0402_50V8J
KSO3
C461 1
100P_0402_50V8J
KSO11
C453 1
100P_0402_50V8J
KSI4
C442 1
100P_0402_50V8J
KSO10
C454 1
100P_0402_50V8J
KSO2
C462 1
100P_0402_50V8J
KSI1
C445 1
100P_0402_50V8J
KSO1
C463 1
100P_0402_50V8J
KSI2
C444 1
100P_0402_50V8J
KSO0
C464 1
100P_0402_50V8J
KSO9
C455 1
100P_0402_50V8J
KSI5
C441 1
100P_0402_50V8J
KSI3
C443 1
100P_0402_50V8J
KSI6
C440 1
100P_0402_50V8J
KSO8
C456 1
100P_0402_50V8J
KSI7
C439 1
100P_0402_50V8J
CAP Sansor B COVER(ENE)
R742
0_0805_5%
CONN@
ACES_85201-04051
6
5
4
3
2
1
D16
PSOT24C-LF-T7_SOT23-3
+3VS
R743 1
R746 1
2 0_0402_5%
2 0_0402_5%
JP2
2N7002_SOT23
0402
1 R6 FBM-11-100505-301T
2
0402
1 R5 FBM-11-100505-301T
2
FBM-11-100505-301T
0402
1
2
R486 1
1
1
C9
C7
C8
38 EC_ESB_CK
38 EC_ESB_DA
2 0_0402_5%
2 0_0402_5%
R744 1
R745 1
Q67
2
G
G2
G1
4
3
2
1
JP9
TP_DATA
TP_CLK
KB +5VS
back light Conn
100P_0402_50V8J
38 EC_ESB_INT
38 KB_BL_LED#
33P_0402_50V8K
C447 1
33P_0402_50V8K
C448 1
KSO17
33P_0402_50V8K
KSO16
1
2
3
4
5
6
7
1
2
3
4
5
GND1
GND2
BTN/B CONN.
JP6
ACES_88266-05001
CONN@
11
12
GND
GND
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
10
KSI1
BACKUP_LED#
KSI3
BACKUP_LED# 38
BT_ON#
KSI4
MINI1_LED#
36,38
MINI1_LED# 33
+3VS
KSO0
KSO0
ACES_85201-10051
CONN@
CAP Sansor right(Cypress) & Power Saving & Volume Control Conn.
+3VS
(Right)
1
R420
+3VALW
INT_KBD Conn.
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
(Left)
KSI7
KSI6
KSI5
KSI4
KSI3
KSI2
KSI1
KSI0
KSO17
KSO16
KSO15
KSO14
KSO13
KSO12
KSO11
KSO10
KSO9
KSO8
KSO7
KSO6
KSO5
KSO4
KSO3
KSO2
KSO1
KSO0
KSI1 Backup BTN

KSI2 TP LOCK BTN
+MCVCC
4.7K_0402_5%
VR_B
51ON#
40,46
Q62
2N7002_SOT23
R164
1
2
1
C371
2
1
C410
2
2
G
10U_0805_10V4Z
CD1#
D1
CP1
SD1#
Q1
Q1#
GND
VCC
CD2#
D2
CP2
SD2#
Q2
Q2#
14
13
12
11
10
09
08
TC74LCX74FT_TSSOP14
C362
0.1U_0402_16V4Z
ENCODER_DIR 38
ENCODER_PULSE 38
EC_I2C_INT 38
10K_0402_5%
1
2
R798
+3VALW
Issued Date
Compal Secret Data
1
U25
1
2
3
4
5
6
7
2
10K_0402_5%
10K_0402_5%
S 2N7002_SOT23
1
C320
+3VS
C361
0.1U_0402_16V4Z
+3VALW
Q14
0.1U_0402_16V4Z
2
G
3
defult=H
20MIL
S 2N7002_SOT23
10K_0402_5%
CY_I2C_INT
R187
1
2
0_0603_5%
Q16
3
R172
+MCVCC
2
G
1
R229
0.01U_0402_16V7K
R171
510K_0402_5%
+MCVCC
C319
2
P
+MCVCC
ACES_85201-1605N
CONN@
+3VLP
1
2
R255 10K_0402_5%
U26
VR_A
R219
100K_0402_5%
0.1U_0402_16V4Z
5
KSI5
38
KSO0
38,40
PWR_SAVE_LED# 38
R154 1
2
0_0402_5%
+3VS
R254
10K_0402_5%
NC
1
R228
10K_0402_5%
EC_CYP_RST# 38
C390
2
VR_A
VR_B
EC_I2C_CK 38
EC_I2C_DA 38
EC_I2C_CK
EC_I2C_DA
CY_I2C_INT
EC_CYP_RST#
KSI5 Pwr Save BTN
+3VS
4.7K_0402_5%
+3VS
0.01U_0402_16V7K
GND
GND
R179
17
18
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
R176
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
KSI4 WLAN BTN
KSI3 BT BTN
JP7
2009/08/10
Deciphered Date
2010/08/10
Title
Size
B
Date:
SCHEMATICS,MB A5511
Document Number
Rev
C
401762
Sheet
39
of
60
R471 68_0402_5%
2
1
2
+3VALW
Power Button
R490 0_0603_5%
+5VALW
LED3
@
R491 0_0603_5%
AC_IN LED
2N7002_SOT23
Q49

R473 68_0402_5%
2
1
2
+3VALW
ACIN_LED#

R470 68_0402_5%
LED5
2
1
2
1
2
G
ACIN
38,44,46
LED4
1

1
R469
ON/OFF switch
POWER LED
ON/OFF
51ON#
3
4
51ON#
39,46
Q50
2
G
2N7002_SOT23
PWR_LED#
DAN202UT106_SC70-3
1
R478
D
Q51
2
G
3
PWR_LED
2
38
PWR_LED
6
5
38
1
2
1
D21
ON/OFFBTN#
LED1
1
R474
1
49.9_0402_1%
2

LED6
R475
1
2
1
49.9_0402_1%
2

LED2
R472
1
2
1
49.9_0402_1%
2

LED7
R476
1
2
1
49.9_0402_1%
2
100K_0402_5%
SW1
SMT1-05-A_4P
1
3
S 2N7002_SOT23
+3VALW
R493 0_0603_5%
+5VALW
@
R494 0_0603_5%
100K_0402_5%
LED12
EC_ON
EC_ON
+3VS
300_0402_5% R459
1
2
2
+3VALW
300_0402_5% R458
1
2
4
Q48
2
G
3
38
R468
PWR_SUSP_LED#
S 2N7002_SOT23
PWR_LED#
PWR_SUSP_LED#
HT-297UD/CB _BLUE/AMB_0603
10K_0402_5%
1
Q73
3
LED13
2
G
38 PWR_SUSP_LED
+3VALW
R461 300_0402_5%
1
2
2
+3VALW
R460 300_0402_5%
1
2
4
S 2N7002_SOT23
R785
100K_0402_5%
BATT_BLUE_LED#
BATT_BLUE_LED# 38
BATT_AMB_LED#
BATT_AMB_LED# 38
HT-297UD/CB _BLUE/AMB_0603
Power ON Circuit
+3VS
+3VS_DELAY
T/P Lock Button/LED
+3VALW
+3VALW
LED8
14
I
R366 1
38 T/P_LOCK_LED#
DGPU_PWROK_BUF
SW2
18
1
38,39
2 150_0402_1%
HT-191UY_Amber_0603
For PCH
O
G
2
C480
1U_0603_10V6K
@
U34B
SN74LVC14APWLE_TSSOP14
23,55 DGPU_PWROK
U34A
14
R350
10K_0402_1%
KSO0
KSI2
38,39
6
5
1
SMT1-05_4P
+3VS
+3VALW
+3VALW
P
O
VS_ON
+3VS
50,51,52,53
+3VS
For +VCCP/+1.05VS
13 PCH_SATALED#
5IN1_LED#
LED9
Y
33
U45
2 B
14
Meadia/Num/Cap LED
U34D
DATA ACCESS_LED#
I
7
SUSP
C478
0.1U_0402_16V7K
3
44,51
2
G
Q26
2N7002_SOT23
14
5
2
SUSP
U34C
R367
75K_0402_1%
1
2
1
36,38,44,51,52 SUSP#
R351
10K_0402_1%
@
R455 300_0402_5%
R456 300_0402_5%
13
14
I
12
VGA_ON
24,45,51,52,55
38
CAPS_LED#
CAPS_LED#
10
LED11
2
R457 300_0402_5%
Cap Lock
4
HT-191NB_BLUE_0603
Num Lock
HT-191NB_BLUE_0603
U34F
DGPU_PWR_EN
1
R394
2
0_0402_5%
2009/08/10
Issued Date
Compal Secret Data
2010/08/10
Deciphered Date
Title
Size
B
Date:
LED10
2
14
P
2
1
2
G
Q52
2N7002_SOT23
DIS@
NUM_LED#
NUM_LED#
1U_0603_10V6K
1
SUSP
C504
3
2
G
Q33
2N7002_SOT23
SG@
45 DGPU_PWR_EN#
11
D
U34E
14,18,21,45 DGPU_PWR_EN
4
38
2 0.1U_0402_16V4Z
R392
31.6K_0402_1%
DIS@
R393
10K_0402_1%
1SG@
2
+3VALW
C505
ACCESS_LED#
HT-191NB_BLUE_0603
+3VS
+3VALW
DATA
SCHEMATICS,MB A5511
Document Number
Rev
C
401762
Sheet

E
40
of
60
+VDDA
+3VS
1
R776
2
0_0805_5%
+5VAMP
D29
L79 1
2
FBMA-L11-201209-221LMA30T_0805
MONO_IN
C854
R784
PCH_SPKR
C866 1
1U_0402_6.3V4Z
R783
0.1U_0402_16V4Z
42
LINE_R
LINE_L
C861
LINE_R
C857
C967
2.2U_0603_6.3V6K
42
MIC1_LFE_L
42
MIC1_CEN_R
LINE_C_L
4.7U_0603_6.3V6K
LINE_C_R
4.7U_0603_6.3V6K
MIC_PLUG#
R790 2
1 20K_0402_1%
HP_PLUG#
R791 2
1 39.2K_0402_1%
R789 2
1 20K_0402_1%
EAPD
SPDIF
PORT-A (PIN 39, 41)
16
MIC2-IN-L(PORT-F-IN-L)
SURR-L(PORT-A-L)
39
AMP_LEFT
17
MIC2-IN-R(PORT-F-IN-R)
SURR-R(PORT-A-R)
41
AMP_RIGHT
23
LINE1-L(PORT-C-L)
MIC2-OUT-L
35
24
LINE1-R(PORT-C-R)
MIC2-OUT-R
33
29
CBP
MONO-OUT
37
30
CBN
NC
43
CPVEE
BITCLK
SDATA_IN
HP_RIGHT-FRONT_RIGHT
42
AMP_LEFT 42
AMP_RIGHT 42
LINE_LEFT-SURR_LEFT_R
42
LINE_RIGHT-SURR_RIGHT_R
WOOFER_MONO 42
WOOFER_MONO
1
R778
For EMI
6
HP_LEFT-FRONT_LEFT 42
2
1
27_0402_5%
HDA_BITCLK_AUDIO
42
2 C863
33P_0402_50V8K
HDA_BITCLK_AUDIO
13
MIC1-L(PORT-B-L)
MIC1-R(PORT-B-R)
MIC1-VREFO
28
LINE1_VREFO
18
LINE2_VREFO
20
DMIC-CLK1/2
46
PCBEEP
SYNC
C570
DVDD
HP_RIGHT-FRONT_RIGHT
RESET#
2
0_0402_5%
2 SPDIF_R
0_0402_5%
DVDD_IO
HP_LEFT-FRONT_LEFT
32
10
1
R454
1
R450
1
1
10P_0402_25V8K
Codec Signals
10P_0402_25V8K
C564
20K
34
LINE2-OUT-R
HDA_SYNC_AUDIO
SENSE_A
42
LINE2-OUT-L
LINE2-IN-R(PORT-E-IN-R)
11
DMIC_DATA
38
LINE2-IN-L(PORT-E-IN-L)
HDA_RST#_AUDIO
HDA_SDOUT_AUDIO
13 HDA_SDOUT_AUDIO
Place close to Codec
15
31
2 C968
2.2U_0603_6.3V6K
MIC1_LFE_L
MIC1_C_L
21
1
2
C868
4.7U_0603_6.3V6K
MIC1_CEN_R
MIC1_C_R
22
1
2
C864
4.7U_0603_6.3V6K
MONO_IN
12
13 HDA_SYNC_AUDIO
C573
14
13 HDA_RST#_AUDIO
C865
SDATA_OUT
45
2
13
36
SPDIFO2
GPIO0_DMIC-1/2
SENSE A
SENSE B
47
EAPD
48
3
4
7
SPDIFO1
GPIO0_DMIC-3/4
DVSS
DVSS
DMIC-CLK3/4
44
MIC2_VREFO
19
VREF
27
JDREF
40
AVSS1
AVSS2
26
42
HDA_SDIN0_R
ALC669X-GR_LQFP48_7X7
1
R780
10mil
2 HDA_SDIN0
33_0402_5%
HDA_SDIN0 13
MIC1_VREFO
Digital MIC
+3VS
DMIC_CLK
R251
DMIC_CLK
DMIC_DATA
R250
10mil
C572
0.1U_0402_16V4Z
LINE_L
C565
10U_0805_10V4Z
2 @
R774
0_0603_5%
0_0603_5%
DGND
PORT-B (PIN 21, 22)
AGND
PORT-C (PIN 23, 24)
SENSE B
39.2K
PORT-E (PIN 32, 34)
20K
PORT-F (PIN 33, 35)
2
0_0805_5%
1
R754
2
0_0805_5%
1
R756
2
0_0805_5%
1
R779
2
0_0805_5%
GND
PORT-H (PIN 37)
Issued Date
2009/08/10
2010/08/10
Deciphered Date
D
GNDA
SCHEMATICS,MB A5511
Document Number
Rev
C
401762
Date:
Title
Size
B
1
R753
Compal Secret Data
5
6
ACES_88266-04001
CONN@
D15
SM05T1G_SOT23-3
@
For ESD 10/11
20K_0402_1%
L30
MBK1608121YZF_0603 JP8
1 1
1
2
DMIC_CLK_R
2 2
DMIC_DATA_R
3 3 G1
4 4 G2
42
38
U67
25
40mil
AVDD1
C867
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
10U_0805_10V4Z
AVDD2
L38
0.1U_0402_16V4Z
1
2
FBMA-L11-160808-800LMT_0603 1
1
C571
C575
10U_0805_10V4Z
2
2
+VDDA
SENSE A
SHDN
1
2
C835
0.01U_0402_25V7K
@
L81
1
2
+3VS
MBK1608121YZF_0603
+3VS_DVDD
1
Impedance
4.75V
+VDDA
HD Audio Codec
+AVDD_HDA
Sense Pin
BYP
(output = 300 mA)
15mil
42
G9191-475T1U_SOT23-5
@
2
2.4K_0402_1%
D28
42 LINEIN_PLUG#
40mil
OUT
560_0402_5%
42
GND
2SC2411K_SOT23
13,38
1
R787
Q74
2
B
560_0402_5%
C870 1
1U_0402_6.3V4Z
BEEP#
IN
38
1
1U_0402_6.3V4Z
C834
U66
60mil
0.1U_0402_16V4Z
C869
L80 1
2
FBMA-L11-201209-221LMA30T_0805
+5VS
R788
R781
20K_0402_5%
10K_0402_5%
2

G
Sheet
41
H
of
60
Int. Speaker Conn.
D25
SPK_L- 2
20mil
+5VAMP
0.1U_0402_16V4Z
1
C960
10U_0805_10V4Z
JP4
SPKL+
SPKLSPKR+
SPKR-
R552
R543
R539
R537
1
1
1
1
2
2
2
2
0_0603_5%
0_0603_5%
0_0603_5%
0_0603_5%
SPK_L+
SPK_LSPK_R+
SPK_R-
1
2
3
4
C961
2
PJDLC05_SOT23-3
1
2
3
4
G1
G2
5
6
D24
SPK_R- 2
ACES_88266-04001
CONN@
SPK_L+ 3
SPK_R+ 3
PJDLC05_SOT23-3
1
10 dB
41
AMP_LEFT
C965
AMP_C_LEFT
2
0_0603_5%
2
1
3900P_0402_50V7K R929
LIN+
LIN-
SPKL+
LOUT-
SPKL-
SPDIF_PLUG#
Q69A
2N7002DW-T/R7_SOT363-6
+5VSPDIF
20mil
S/PDIF Out JACK

LINE Out/Headphone Out
HPF 600Hz
EC_MUTE#
19
NC
12
BYPASS
10
SHUTDOWN
Keep 10 mil width

2
GND5
GND1
GND2
GND3
GND4
38
EC_MUTE#
3
4
LOUT+
R927
100K_0402_5%
@ R926
100K_0402_5%
6 1
ROUT-
SPKR-
SPKR+
14
HP_PLUG# 41
Q69B
2N7002DW-T/R7_SOT363-6
18
ROUT+
RIN-
R762
100K_0402_5%
Q68
AO3413_SOT23-3
GAIN1
2
3
2 0.47U_0603_10V7K
HP_PLUG#
R761
100K_0402_5%
C964 1
GAIN1
AMP_C_RIGHT 17
2
0_0603_5%
2
1
3900P_0402_50V7K R928
GAIN0
GAIN0
C963
RIN+
AMP_RIGHT
+5VAMP
41
2 0.47U_0603_10V7K
+5VAMP
@ R925
100K_0402_5%
VDD
PVDD1
PVDD2
R924
100K_0402_5%
C962 1
16
15
6
+5VAMP
U65
C966
0.47U_0603_10V7K
21
20
13
11
1
C820
R763
56.2_0603_1%
HP_RIGHT-FRONT_RIGHT 1
2 HP_RIGHT_R_11
L77
HP_LEFT-FRONT_LEFT
1
2 HP_LEFT_R_1 1
L76
R764
56.2_0603_1%
41 HP_RIGHT-FRONT_RIGHT
TPA6017A2_TSSOP20
41 HP_LEFT-FRONT_LEFT
C812
1
2
C818
D27
PJDLC05_SOT23~D
<BOM Structure>
1
0.1U_0402_16V4Z
330P_0402_50V7K 330P_0402_50V7K
1
1
JHP1
1
2
2 HP_RIGHT_R_2
FBMA-L11-160808-700LMT_2P
2 HP_LEFT_R_2
FBMA-L11-160808-700LMT_2P
3
4
SPDIF_PLUG#
41
SPDIF
SPDIF
+5VSPDIF
8
7
6
DRIVE IC
C817
100P_0402_50V8J
9
10
2
SINGA_2SJ-D373-B01 CONN@
LINE-IN JACK
SINGA_2SJ-B351-S02
1 R931
2
75_0402_1%
1 R930
2
75_0402_1%
R755
1K_0603_5%
1
2 LINE_RIGHT-SURR_RIGHT
41 LINE_RIGHT-SURR_RIGHT_R
+5VS
Fc(low)= 2KHz
LINE_R
41
LINE_L
Fc(high)= 482Hz
For ESD
I/O status:
a. input/output mount 75 ohm
b. input only mount 1K ohm
0.01U_0603_50V7K
2
U1
41 WOOFER_MONO
C6
0.33U_0603_16V4Z
C5
0.068U_0603_16V7K
VDD SHUTDOWN#
IN-
Vo+
IN+
BYPASS
Vo-
GND
GND
7
9
EC_MUTE#
1
2
1
2
30mil
3
4
ACES_88266-02001
CONN@
41
MIC1_CEN_R
41
MIC1_LFE_L
2009/08/10
1CH751H-40PT_SOD323-2
2
D42
1CH751H-40PT_SOD323-2
8
JLINE1
CONN@
(HDA Jack)
MIC JACK
SINGA_2SJ-B351-S01
5
L75
FBMA-L11-160808-700LMT_2P
1
2
1
2 MIC1_L_1
1K_0603_5%
R758
1
2
FBMA-L11-160808-700LMT_2P
L74
1
1
C805
220P_0402_50V7K
4
R760
2.2K_0402_5%
3
6
2
1
MIC1_R_R
MIC1_L_R
8
C806
220P_0402_50V7K
JMIC1
CONN@
(HDA Jack)

2010/08/10
Deciphered Date
Title
Date:
C804
220P_0402_50V7K
Size
B
LINE_L_R
Compal Secret Data
LINE_R_R
3
6
2
1
MIC_PLUG#
2
D41
R759
1K_0603_5%
1
2 MIC1_R_1
Subwoofer Conn.
Issued Date
R757
2.2K_0402_5%
G1
G2
C1
2.2U_0603_6.3V4Z
41
MIC1_VREFO
JP1
WOOFER+
WOOFER-
APA3011XA-TRL_MSOP8
WOOFER_IN- 4
WOOFER_IN+ 3
1
2
FBMA-L11-160808-700LMT_2P
<BOM Structure>
L72
1
1
C803
220P_0402_50V7K
C3
R4
1
2
4.7K_0402_1%
LINE_LEFT-SURR_LEFT
1.8K_0402_5%
1
R3
1K_0402_1%
1
2
1
2
1K_0603_5%
R752
R2
41
L73
FBMA-L11-160808-700LMT_2P
1
2
C4
0.1U_0603_25V7K
1
2
Gain = 5.1dB(BTL Mode)
C2
10U_0805_10V4Z
1
2
41 LINE_LEFT-SURR_LEFT_R
LINEIN_PLUG#
41 LINEIN_PLUG#
SCHEMATICS,MB A5511
Document Number
Rev
C
401762
Sheet

E
42
of
60
H10
H_6P6
H5
H_2P8
H9
H_2P6N
R492
10K_0402_5%
H13
H_4P2
H17
H_4P2
1
@
H20
H_3P1X2P6N
@
H16
H_4P2
JFAN1
@
1
2
3
ACES_85205-03001
CONN@
H14
H_4P0
@
H6
H_4P0
@
FD1
@
FIDUCIAL_C40M80
FD4
@
FIDUCIAL_C40M80
2009/08/10
Deciphered Date
FD2
@
FIDUCIAL_C40M80
FIDUCIAL_C40M80
Compal Secret Data
Issued Date
FD3
H11
H_4P0
C603
1000P_0402_50V7K
+VCC_FAN1
H26
H_3P1X2P6N
H2
H_3P2
H12
H_4P2
38 FAN_SPEED1
H3
H_3P2
C602
1000P_0402_50V7K
1
2
40mil
H4
H_3P2
BAS16_SOT23-3
C604
10U_0805_10V4Z
1
2
+3VS
APL5605KI_SOP8
C11
0.1U_0402_16V4Z
@
H25
H_3P0
H18
H_3P0
D23
1
8
7
6
5
0_0402_5%
GND
GND
GND
GND
R8
VEN
VIN
VO
VSET
1
2
3
4
+VCC_FAN1
H15
H_3P0
D22
1SS355_SOD323-2
U3
EN_DFAN1
H23
H_3P0
+5VS
10U_0805_10V4Z
2
H24
H_3P0
H21
H_3P7
@
+5VS
38
H22
H_3P7
FAN1 Conn
C12
H8
H_3P0
H1
H_3P0
H7
H_3P0
H19
H_3P0
2010/08/10
Title
Size
B
Date:
SCHEMATICS,MB A5511
Document Number
Rev
C
401762
Sheet
43
of
60
+3VALW TO +3V(PCH AUX Power)
For EMI Require 1/21

Put near Right side of DIMM
+5VS
+3VALW
+5VALW
+5VALW
+3V
+5VALW TO +5VS
+5VALW
U47
0.1U_0402_16V4Z
C585
D
D
D
D
S
S
S
G
1
2
3
4
C579
SI4800BDY-T1-E3_SO8
C567
SI4800BDY-T1-E3_SO8 10U_0805_10V4Z
2
2
10U_0805_10V4Z
1U_0603_10V4Z
2
2
10U_0805_10V4Z
8
7
6
5
C556
10U_0805_10V4Z
C580
R463
470_0603_5%
10U_0805_10V4Z
2
2
1U_0603_10V4Z
R428
100K_0402_5%
R439
100K_0402_5%
R443
470_0603_5%
C555
SYSON#
37,51 SYSON#
SBPWR_EN#
20 SBPWR_EN#
6
C562
1
2
3
4
S
S
S
G
D
D
D
D
3 1
C574
U44
8
7
6
5
Q40A
C561
200K_0402_5%
38
2
G
Q36
S
2N7002_SOT23
SBPWR_EN
1
R434
100K_0402_5%
2N7002DW-T/R7_SOT363-6
R431
100K_0402_5%
0.1U_0603_25V7K
SBPWR_EN#
2
2N7002DW-T/R7_SOT363-6
C582
Q46A
0.1U_0603_25V7K
2
2N7002DW-T/R7_SOT363-6
SYSON
36,38,50 SYSON
SBPWR_EN#
3V_GATE
R465 2
+VSB
Q42A
SUSP
Q46B
SUSP
Q42B
2N7002DW-T/R7_SOT363-6
5VS_GATE
2
1
R444
200K_0402_5%
+VSB
2
2N7002DW-T/R7_SOT363-6
+5VALW
+3VALW TO +3VS
+3VALW
R433
100K_0402_5%
U42
2
1
C545
C549
R440
470_0603_5%
SI4800BDY-T1-E3_SO8 10U_0805_10V4Z
2
2
1U_0603_10V4Z
10U_0805_10V4Z
2
2
10U_0805_10V4Z
2
Q40B
5
36,38,40,51,52 SUSP#
R438
10K_0402_5%
Q43B
2N7002DW-T/R7_SOT363-6
3VS_GATE
2N7002DW-T/R7_SOT363-6
SUSP
2
1
R447
200K_0402_5%
+VSB
SUSP
SUSP
40,51
1
2
3
4
C547
S
S
S
G
D
D
D
D
3 1
C548
8
7
6
5
+3VS
C560
0.1U_0603_25V7K
2
2N7002DW-T/R7_SOT363-6
Q43A
2
1
SUSP
+1.5V
+1.5V to +1.5VS
+1.5V
Optional, if +1.5VS can combine with +1.5V_1
+1.5V_1
C969
+1.5VS
C970
U43
C558
C559
SI4800BDY-T1-E3_SO8
<BOM Structure>
C557
1
R782
1
2
3
4
S
S
S
G
C971
2
+1.5V_1
0_0805_5%
@
For Calpella CPU S3 DRAM Power

(1.5V_CPU VDDQ)
R441
470_0603_5%
10U_0805_10V4Z
2
2
1U_0603_10V4Z
C972
J1
1
JUMP_43X118@
10U_0805_10V4Z
2
2
10U_0805_10V4Z
D
D
D
D
C550
8
7
6
5
@
2
@ 0.1U_0402_16V4Z
2
@ 0.1U_0402_16V4Z
2
@ 0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
J3
JUMP_43X118@
U48
ACIN
D
D
D
D
S
S
S
G
250mil(6A)
1
2
3
4
8
7
6
5
0.1U_0603_25V7K
Q39
@
2
G
+VSB
2N7002_SOT23
R496
100K_0402_1%
@
2
2
G
Q79
S
2N7002_SOT23
C593
0.1U_0603_25V7K
@
SUSP
2
G
Q55
2N7002_SOT23
@
SUSP
R495
470_0603_5%
@
1.5V_1_GATE
1
C592
@
2
0.1U_0402_16V4Z
1
ACIN
SUSP
SI4856ADY_SO8
@
38,40,46
C546
SUSP
2
Q41A
2N7002DW-T/R7_SOT363-6
R435
510K_0402_5%
1.5VS_GATE
2
1
R436
510K_0402_5%
+VSB
Q41B
2N7002DW-T/R7_SOT363-6
+0.75VS
+1.05VS
+1.1VS_VTT
+1.8VS
+1.5V
R437
470_0603_5%
@
2 SYSON#
G
Q38
2N7002_SOT23
@
2009/08/10
Issued Date
Compal Secret Data
D
2 SUSP
G
Q37
2N7002_SOT23
D
2 SUSP
G
Q66
S
2N7002_SOT23
D
2 SUSP
G
Q64
S
2N7002_SOT23
2
1
R424
470_0603_5%
R729
470_0603_5%
2 SUSP
G
Q44
S
2N7002_SOT23
R661
470_0603_5%
R448
470_0603_5%
2010/08/10
Deciphered Date
Title
Size
B
Date:
SCHEMATICS,MB A5511
Document Number
Rev
C
401762
Sheet

E
44
of
60
+5VS to +5VSDGPU
+5VS
40mil(1A)
1
2
Q53
AO3413_SOT23-3
SG@
40mil(1A)
+5VSDGPU
1
SG@ 2
0_0402_5%
DGPU_PWR_EN# 1
R477
R509
0_0805_5%
DIS@
1
2
S
C634
10U_0805_10V4Z
SG@
C627
C622
R505
470_0603_5%
SG@
+5VALW
2
G
10U_0805_10V4Z 0.1U_0402_16V4Z
2
2
Q54
2N7002_SOT23
SG@
R349
100K_0402_5%
+1.5V
U46
1.5VSDGPU_GATE
Q47A
2
VGA@
2N7002DW-T/R7_SOT363-6
Q47B
2N7002DW-T/R7_SOT363-6
VGA@
C583
0.1U_0603_25V7K
VGA@
1
R485
VGA@2 VGA_ON#
0_0402_5%
VGA@2
0_0402_5%
R352
100K_0402_5%
2
VGA@
R467
470_0603_5%
VGA@
2
G
Q27
S
2N7002_SOT23
14,18,21,40 DGPU_PWR_EN
2
C586
C587
VGA@
VGA@
10U_0805_10V4Z
2
2
0.1U_0402_16V4Z
1
VGA_ON#
1
R487
3 1
SI4856ADY_SO8
R466
510K_0402_1%
VGA@2
250mil(6A)
1
2
3
4
S
S
S
G
+VSB
D
D
D
D
8
7
6
5
DGPU_PWR_EN#
40 DGPU_PWR_EN#
+1.5VSDGPU
C576
10U_0805_10V4Z
VGA@
+1.5V to +1.5VSDGPU Transfer
+5VALW
R464
100K_0402_5%
VGA_ON#
VGA_ON#
24
1
R462
+1.8VS to +1.8VSDGPU Transfer
1
1
1
+ C584
C521
C522
VGA@
VGA@
VGA@
330U_D2_2V_Y 10U_0805_10V4Z
2
2
2
0.1U_0402_16V4Z
SI4856ADY_SO8
1.8VSDGPU_GATE
VGA@2
0_0402_5%
VGA@
2N7002DW-T/R7_SOT363-6
C529
0.1U_0603_25V7K
VGA@
Q35B
2N7002DW-T/R7_SOT363-6
VGA@
1
R483
VGA@2 VGA_ON#
0_0402_5%
1
R482
1
Q35A
VGA_ON#
R412
470_0603_5%
VGA@
VGA@
R414
510K_0402_1%
VGA@2
1
2
2
S
S
S
G
+VSB
D
D
D
D
100mil(1.5A)
1
2
3
4
C535
10U_0805_10V4Z
VGA@
22K_0402_5%
+1.8VSDGPU
U39
8
7
6
5
+1.8VS
2
G
Q45
S
2N7002_SOT23
24,40,51,52,55 VGA_ON
2009/08/10
Issued Date
Compal Secret Data
2010/08/10
Deciphered Date
Title
Size
B
Date:
SCHEMATICS,MB A5511
Document Number
Rev
C
401762
Sheet

E
45
of
60
DC231000N00 For DIS

DC231000P00 For UMA
Footpront
SINGA_2DC-S756B200_3P
VIN
VIN
VIN
VS
@ PR2
10K_0402_5%
2
PR9
10K_0402_5%
PR8
20K_0402_1%
PD1
GLZ4.3B_LL34-2
10K_0402_5%
2
PU1A
LM358DT_SO8
PC6
0.1U_0603_25V7K
2
1
ACIN
38,40,44
PC4
100P_0402_50V8J
PR4
22K_0402_5%
1
2
PC2
1000P_0402_50V7K
PR6
10K_0402_5%
1
2 1
1
PC3
1000P_0402_50V7K
PR3
84.5K_0402_1%
PR5
0_0402_5%
1
2
PR7
1
PC1
100P_0402_50V8J
PJP1
DC_IN_S2
2
1
G
G
PL1
SMB3025500YA_2P
1
DC_IN_S1
PR1
1M_0402_1%
1
2
SINGA_2DC-G756I200
PC5
1000P_0402_50V7K
RTCVREF
Vin Detector
PBJ1
2
Min.
H-->L 17.208V
L-->H 17.879V
+RTCBATT
+RTCBATT
ML1220T13RE
45@
Typ
17.212V
17.894V
Max.
17.217V
17.909V
PJ1
2
+3VALWP
PJ2
1
+3VALW
+1.1VS_VTTP
JUMP_43X118
PJ3
VIN
+5VALWP
+1.1VS_VTT
PJ4
1
+5VALW
JUMP_43X118
JUMP_43X118
JUMP_43X118
PD2
LL4148_LL34-2
PD3
LL4148_LL34-2
N1
+VSB
+1.5VP
VS
+1.05VSP
+1.05VS
+GPU_CORE
+0.75VP
1
2
+VGFX_COREP
+VGFX_CORE
PJ11
2
JUMP_43X118
PC10
1U_0805_25V4Z
PJ31
2
+VDDCIP
PJ13
1
+VDDCI
+1.8VSP
JUMP_43X118
Issued Date
2009/08/10
Deciphered Date
C
+1.8VS

2010/08/10
Title
Custom
JUMP_43X118
Compal Secret Data
+0.75VS
1
1
PJ32
JUMP_43X118
JUMP_43X118
N2
GND
PC9
10U_0805_10V4Z
PJ9
1
IN
JUMP_43X118
JUMP_43X118
G920AT24U_SOT89-3
OUT
PU2
3.3V
PJ10
1
JUMP_43X118
PR15
200_0603_5%
PR17
560_0603_5%
1
2
JUMP_43X118
PJ14
PR16
560_0603_5%
1
2
+1.5V
PJ8
1
PJ12
2
+GPU_COREP
2
PR14
22K_0402_1%
RTCVREF
+CHGRTC
PC8
0.1U_0603_25V7K
0.22U_0603_25V7K
JUMP_43X118
PJ7
PC7
51ON#
JUMP_43X118
PR13
100K_0402_1%
39,40
PR11
68_1206_5%
2
PR12
200_0603_5%
1
2
PR10
68_1206_5%
JUMP_43X39
CHGRTCP
PJ6
1
PQ1
TP0610K-T1-E3_SOT23-3
BATT+
PJ5
2
+VSBP
SCHEMATICS,MB A5511
Rev
C
401762
Date:

D
Sheet
46
of
60
PH1 under CPU botten side :

CPU thermal protection at 92 degree C
Recovery at 56 degree C
VL
VMB
VL
ENTRIP1
49
VL
PL2
SMB3025500YA_2P
1
2
8
2
PD4
2
ENTRIP2
49
LL4148_LL34-2
LM393DG_SO8
2
G
2
PQ3
2N7002W-T/R7_SOT323-3
VL
PR25
100K_0402_1%
PR27
100K_0402_1%
2
PR26
1K_0402_1%
PU3A
PC15
1000P_0402_50V7K
1
2
+3VALWP
PR23
6.49K_0402_1%
2
1
PR24
15.4K_0402_1%
PC14
0.22U_0603_16V7K
2
1
2
PR22
100_0402_1%
PR21
100_0402_1%
DC040006G00 Main for Arctek

DC040006F00 2nd for SUYIN
Footprint
SUYIN_200275MR007G12MZR_7P
PQ2
2N7002W-T/R7_SOT323-3
TM_REF1
PR20
13.7K_0402_1%
1
2
2
G
100K_0402_1%_NCP15WF104F03RC
PR19
47K_0402_1%
1
2
PC13
0.1U_0603_25V7K
PH1
PC12
0.01U_0402_25V7K
1
PC11
1000P_0402_50V7K
EC_SMCA
EC_SMDA
PR18
47K_0402_1%
BATT+
1
BATT_S1
1
SUYIN_200275MR007G12MZR
PJP2
1 1
2 2
3 3
4 4
5 5
6 6
7 7
GND 8
GND 9
BATT_TEMP 38
EC_SMB_CK1 38
EC_SMB_DA1 38
PH2 near main Battery CONN :

BAT. thermal protection at 76 degree C
Recovery at 56 degree C
VL
@ PR28
47K_0402_1%
@ PR29
47K_0402_1%
1
2
PH2
PR34 @
17.8K_0402_1%
PU3B
O
PD5
1
LL4148_LL34-2
LM393DG_SO8
PC18
0.22U_0603_16V7K
2
1
TM_REF1
2
G
PQ5
2N7002W-T/R7_SOT323-3
3
SPOK
49
PC19
0.1U_0402_16V7K
@ PR31
3.32K_0402_1%
1
2
1
2
PR33
100K_0402_1%
PR35
0_0402_5%
1
2
VL
@ PC17
0.1U_0603_25V7K
1
2
100K_0402_1%_NCP15WF104F03RC
VL
PC16
0.22U_1206_25V7K
PR32
22K_0402_1%
1
2
2
1
PR30
100K_0402_1%
+VSBP
B+
VL
PQ4
TP0610K-T1-E3_SOT23-3
Issued Date
Compal Secret Data
2009/08/10
Deciphered Date
2010/08/10
Title
Custom
SCHEMATICS,MB A5511
Rev
C
401762
Date:

D
Sheet
47
of
60
PR161
4.7_1206_5%
1
2
HIDRV
26
DH_CHG
PH
25
LX_CHG
23
OVPSET
AGND
PGND
22
LEARN
21
CELLS
20
CELLS
3
2
1
2
1
PC46
0.1U_0402_16V7K
1
2
VDAC
SRP
19
SE_CHG+
SRN
18
SE_CHG-
BAT
17
TP
29
VADJ
CP Point=(Vacset/Vvdac)*(0.1/PR56)=4.04A
13
ACGOOD#
Calibrate#
4.0V
L=0V
4.2V
1.8755V
4.3V
2.8132V
4.35V
H=3.3V
2
1
38
2009/08/10
Deciphered Date
1
S
2N7002W-T/R7_SOT323-3
4

2010/08/10
Title
Custom
C
CP setting
PQ17
2
G
FSTCHG
@ PQ18
2N7002W-T/R7_SOT323-3
2
G
CHGEN#
1
2
1
PR70
499K_0402_1%
2
PR69
210K_0402_1%
Compal Secret Data
Issued Date
PR65
100K_0402_5%
@ PR67
100K_0402_1%
Charger ADJ
24751_VREF
VADJ
PQ19
2N7002W-T/R7_SOT323-3
PR72
100K_0402_1%
PC56
0.01U_0402_25V7K
1
2
LI-4S :18.0V----BATT-OVP=2.677V
BATT-OVP=0.1487*VMB
LI-3S :13.5V----BATT-OVP=2.007V
BATT-OVP=0.1487*VMB
Per cell=3.5V
@ PR63
@PR63
0_0402_5%
1
2
REGN
2
G
2
1
2
1
@ PR61
887K_0402_1%
PR66
105K_0402_1%
24751_VREF
@ PQ16
SI2301BDS-T1-E3_SOT23-3
38 CALIBRATE#
2
1
@ PR60
0_0402_5%
1
2
ADP_I
PR62
499K_0402_1%
2
G
8
+
IREF=0.77484*Icharge
@ PC52
0.01U_0402_25V7K
38
PR59
340K_0402_1%
IREF 38
PR71
100K_0402_1%
PR55
100K_0402_1%
ACSET
2
1
17.4K_0402_1%
38 BATT_OVP
PR68
64.9K_0402_1%
24751_VREF 1
2
15
PC53
100P_0402_50V8J
VMB
VS
PU1B
LM358DT_SO8
PR64
10K_0402_5%
1
2
SRSET
PR54
10_0603_5%
1
2
PQ14
2N7002W-T/R7_SOT323-3
16
For 2200mA, Icharge=0.8C=0.8*2*2.2=3.52A

For 2400mA, Icharge=0.8C=0.8*2.4*2=3.84A
Icharge=(Vsrset/Vdac)*(0.1/PR62)
IREF*(100k/(100K+17.4K)/3.3)*(0.1/0.02)=Icharge
PR51
BQ24751ARHDR_QFN28_5X5
PQ13
2N7002W-T/R7_SOT323-3
PC55
0.01U_0402_25V7K
2
G
SRSET
BATDRV
IADAPT
2
G
3
2
PR58
340K_0402_1%
2
1
Fsw : 300KHz
0.1U_0402_16V7K
PC54
ACOFF 1
Input UVP : 17.26V
PR52
100K_0402_5%
2
1
Input OVP : 22.3V
14
PQ12_GATE
1
CP POINT=(1.436V/3.3V)*(0.1/0.015)=2.901A
/BATDRV
24751_VREF
PR53
200K_0402_5%
2
1
24751_VREF
Icharge Setting
ICHG setting
ACGOOD
65W adapter R=(100K*100K)/(100K+100K)=50K

Vacset=3.3*(50K/(50K+64.9K))=1.436V
PC50
0.1U_0603_25V7K
12
ACSET
11
PC48
0.1U_0603_25V7K
VREF
VADJ
2
PC51
0.1U_0603_25V7K
1U_0603_10V6K
PC49
CP point=Iadapter*85%
38
1
ACOFF
PC47
0.1U_0603_25V7K
24751_VREF
SI2301BDS-T1-E3_SOT23-3
24751_VREF 10
PQ12
PQ12_GATE
90W adapter
Vacset=3.3*(100K/(64.9K+100K))=2.001V
@PR158
@
PR158
1K_0402_5%
CP Point Setting
65W/90W#
5
6
7
8
DL_CHG
LODRV
2
G
3
PR49
54.9K_0402_1%
@ PQ15
2N7002W-T/R7_SOT323-3
PR50
100K_0402_1%
38
@ PC45
680P_0402_50V7K
PQ11
2N7002W-T/R7_SOT323-3
Cells selector
PQ10
AO4466_SO8
1
38
2
3S/4S#
REGN
1
1
2
G
PC43
1U_0603_10V6K
OVPSET
@ PR45
4.7_1206_5%
24
ACOP
PC44
0.47U_0603_16V7K
1
2
7
BATT+
1
@ PR57
10K_0402_5%
PC39
0.1U_0603_25V7K
2
@ PC35
2.2U_0805_25V6K
PR48
340K_0402_1%
CELLS
ACSET
@ PR47
0_0402_5%
1
2
REGN
@ PD9
GLZ24B_LL34-2
1
4 Cell
VREF
ACSET
PD6
LL4148_LL34-2
PR43
0.02_2512_1%
PL3
10UH_PCMB104T-100MS_6A_20%
1
2
ACDRV
ACDET
4
5
PC40
10U_1206_25V6M
ACDRV
ACN
ACP
4
PQ9
AO4407A_SO8
2
3
ACN
ACP
/BATDRV
PQ8
AO4466_SO8
PR41
0_0603_5%
1
2
BTST
PC42
10U_1206_25V6M
27
PC41
10U_1206_25V6M
BTST
5
6
7
8
PC27
0.01U_0402_25V7K
1
2
PVCC
PC26
2200P_0402_25V7K
2
28
PR38
100K_0402_1%
3
2
1
PC34
0.1U_0603_25V7K
PC32
0.22U_0603_25V7K
2
PVCC
1
2
CHGEN
PU4
1
@ PD8
GLZ24B_LL34-2
PR44
54.9K_0402_1%
1
3 Cell
CHG_B+
3
2
1
1
2
PR46
100K_0402_5%
GND
CELLS
24751_VREF
JUMP_43X118
CHGEN#
PR40
100K_0402_1%
PC33
0.1U_0603_25V7K
PR56
1K_0603_5%
1
2
ACDET
PC25
4.7U_1206_25V6K
PC24
4.7U_1206_25V6K
PC31
0.1U_0402_16V7K
1
2
PC36
1000P_0402_50V7K
1
2
PC30
0.022U_0402_25V7K
PC29
0.022U_0603_50V7K
PC23
0.01U_0603_50V7K
1
2
2
1
1
G
PJ15
PR42
340K_0402_1%
PC38
2.2U_0805_25V6K
B+
PR36
0.015_2512_1%
PR39
PR37
3.3_1210_5%
3.3_1210_5%
2
1 2
1
1
2
3
PQ7
AOD425L_TO252-3
8
7
6
5
5
6
7
8
PQ6
AO4407A_SO8
VIN
SCHEMATICS,MB A5511
Rev
C
401762
Date:

D
Sheet
48
of
60
Frequency different
RT8205C
300KHZ/375KHZ
2VREF_51125
TPS51125
245KHZ/305KHZ
RT8205C
Rtrip*Itrip/10
PR74
30K_0402_1%
1
2
PQ24
2N7002W-T/R7_SOT323-3
2
G
VL
1
@ PC71
0.01U_0402_16V7K
PR87
100K_0402_1%
PQ26
2N7002W-T/R7_SOT323-3
2
G
1
2
1
PR88
49.9K_0402_1%
18 MAINPWROFF#
1
2
PC61
10U_1206_25V6M
PC64
0.1U_0603_25V7K
3
2
1
PC60
2200P_0402_50V7K
5
6
7
8
4
47
@ PC68
680P_0603_50V7K
@ PR82
4.7_1206_5%
3
2
1
TPS51125RGER_QFN24_4X4
PC69
4.7U_0805_10V6K
B++
+5VALWP Ipeak=7.0A ; Imax=4.9A

Rds(on)=18m ohm(max) ; Rds(on)=15m ohm(typical)
Vtrip=(10E-06 * 158K)/9-24=151.56mV
Ilimit=151.56mV/18m ~ 151.56mV/15m
=8.42A ~ 10.104A
Iocp=Ilimit+Delta I/2
=9.195A ~ 10.879A
Delta I=0.775A (Freq=245KHz)
+3.3VALWP Ipeak=6.61A ; Imax=4.627A

Rds(on)=18m ohm(max) ; Rds(on)=15m ohm(typical)
Vtrip=(10E-06 * 147K)/9-24=194mV
Ilimit=194mV/18m ~ 194mV/15m
=10.778A ~ 12.933A
Iocp=Ilimit+Delta I/2
=11.148A ~ 13.303A
Delta I=0.74A (Freq=300KHz)
Compal Secret Data
2009/08/10
Issued Date
Deciphered Date
2010/08/10
Title
SCHEMATICS,MB A5511
4
PC66
330U_6.3V_M
VL
Custom
Date:
+5VALWP
5
6
7
8
PL5
10UH_MSCDRI-104A-100M-E_4.6A_20%
1
2
PQ23
AO4712_SO8
PR86
100K_0402_1%
VS
@ PR85
0_0402_5%
PR84
100K_0402_1%
Avoid pre-charge
can not finish
PQ25
2N7002W-T/R7_SOT323-3
2
G
PQ21
AO4466_SO8
13
PR83
499K_0402_1%
1
2
47
ENTRIP1
LG_5V
2VREF_51125
D
19
EN0
B+
DRVL1
SPOK
VCLK
DRVL2
VFB1
LX_5V
18
12
VREF
20
VREG5
LL1
VIN
UG_5V
17
LG_3V
21
16
LL2
VFB2
22
DRVH1
GND
11
TONSEL
VBST1
DRVH2
SKIPSEL
VBST2
PR80
0_0603_5%
BST_5V 1
2 1
15
LX_3V
ENTRIP1
ENTRIP2
10
24
23
14
8
7
6
5
UG_3V
PR78
158K_0402_1%
2
VO1
2
1
PC70
0.1U_0603_25V7K
ENTRIP2
BST_3V
B++
PGOOD
47
VREG3
PQ22
AO4712_SO8
ENTRIP1
VO2
PR79
2 1
2
0_0603_5%
PC67
680P_0603_50V7K
2
1
PC65
330U_6.3V_M
P PAD
PC135
1U_0402_6.3V6K
1
2
3
+3VALWP
@ PR81
4.7_1206_5%
2
1
PL4
4.7UH_SIL1045R-4R7PF_6.3A_30%
2
1
PC63
0.1U_0603_25V7K
1
1
2
3
PU5
25
2
PQ20
AO4466_SO8
PC62
4.7U_0805_10V6K
8
7
6
5
1
2
1
2
PC59
10U_1206_25V6M
PR77
147K_0402_1%
1
2
ENTRIP2
+3VLP
PR76
19.1K_0402_1%
1
2
JUMP_43X118
PC58
2200P_0402_50V7K
B+
VFB=2V
PR75
19.6K_0402_1%
1
2
VFB=2V
PJ16
Add pull high resistor to +3VLP on pin13
PR73
13K_0402_1%
1
2
B++
TPS51125
(Rtrip*Itrip/9)-24mV
GND pad need add via to ground

2
PC57
1U_0603_10V6K
OCP calculation method different
Rev
C
401762
Sheet
1
49
of
60
LG_1.5V
TPS51117RGYR_QFN14_3.5x3.5
PR95
15.8K_0402_1%
PGND
8
DRVL
PC73
4.7U_1206_25V6K
PQ28
FDS6670AS_NL_SO8
4 G
PC79
4.7U_0603_6.3V6K
PGOOD
@ PC80
47P_0402_50V8J
1
2
Layout Note:
Place near V5FILT Pin
+5VALW
VFB
@ PR93
4.7_1206_5%
PC78
4.7U_0805_10V6K
1
+
2
@ PC77
680P_0603_50V8J
PC76
330U_6.3V_M
V5DRV
10
+5VALW
11
D
D
D
D
12
+1.5VP
LX_1.5V
LL
TRIP
0.1U_0603_25V7K
UG_1.5V
5
6
7
8
14
13
S
S
S
V5FILT
GND
PR94
100_0603_1%
1
2
3
2
1
VOUT
DRVH
VFB=0.75V
Vo=VFB*(1+PR101/PR102)=1.52V
Ton=19E-12*Ron*(((2/3)*Vo+150mV)/Vin)+50ns=2.4E-7
Freq=282KHz
Cesr=15m ohm
Ipeak=13.00A Imax=9.10A
Delta I=((19.5-1.5)*(1.5/19.5))/(L*Freq)=2.728A
Vtrip=Rtrip*10uA=0.137V
Iocp-min=16.47A
Iocp-max=16.60A
Iocp=16.47~16.60A
PR96
59K_0402_1%
1
2
B+
PL6
1.8UH_MSCDRI-104A-1R8N-E_9.5A_30%
1
2
PC75
1
TON
PR91
0_0603_5%
1
2BST_1.5V-1
VBST
15
TP
1
EN_PSV
@ PC74
0.1U_0402_16V7K
@ PR92
47K_0402_5%
3
2
1
BST_1.5V
PU6
1
36,38,44 SYSON
1.5V_EN
PR90
0_0402_5%
1
2
JUMP_43X118
1
PR89
280K_0402_1%
1
2
5
6
7
8
PQ27
AO4466_SO8
PC72
4.7U_1206_25V6K
@PJ17
@
PJ17
51117_1.5V_B+
VFB=0.75V
PR97
57.6K_0402_1%
PR98
280K_0402_1%
1
2
1
8
2
PR106
24K_0402_1%
1
2
PR104
8.06K_0402_1%
PGND
PC82
4.7U_1206_25V6K
PQ30
FDS6670AS_NL_SO8
4 G
LG_1.05V
PC87
4.7U_0805_10V6K
+1.05VSP
PR102
2.2_1206_5%
1
+
PC85
330U_D2E_2.5VM
VFB=0.75V
Vo=VFB*(1+PR111/PR112)=1.05V
Freq=282KHz
PC86
470P_0603_50V8J
Cesr=15m ohm
Delta I=((19.5-1.05)*(1.05/19.5))/(L*Freq)=2.728A
Iocp-min=9.87A
Iocp-max=9.94A
Iocp=9.87~9.94A
VFB=0.75V
@ PR105
23.7K_0402_1%
2
1
B+
PR107
59K_0402_1%
2
+1.05VS
DRVL
+5VALW
V5DRV
10
11
12
5
6
7
8
LX_1.05V
LL
TRIP
0.1U_0603_25V7K
D
D
D
D
UG_1.05V
S
S
S
15
14
13
PC88
4.7U_0603_6.3V6K
PGOOD
@ PC89
47P_0402_50V8J
1
2
Layout Note:
VFB
GND
PR103
100_0603_1%
1
2
+5VALW
3
2
1
V5FILT
DRVH
PL7
1.8U_FDV0630-1R8M-P3_5.7A_20%
1
2
PC84
1
VOUT
VBST
TP
TON
PR100
0_0603_5%
1
2BST_1.05V-1
EN_PSV
1
PC83
1U_0402_6.3V6K
@ PR101
47K_0402_5%
3
2
1
BST_1.05V
,51,52,53 VS_ON
PU7
1.05V_EN
PR99
9.76K_0402_1%
1
2
JUMP_43X118
PC81
4.7U_1206_25V6K
PQ29
AO4466_SO8
5
6
7
8
@PJ18
@
PJ18
51117_1.05V_B+
Issued Date
Compal Secret Data
2009/08/10
Deciphered Date
2010/08/10
Title
Custom
SCHEMATICS,MB A5511
Rev
C
401762
Date:

D
Sheet
50
of
60
PJ19 @
JUMP_43X79
+1.5V
NC
REFEN
NC
VOUT
NC
GND
+3VALW
1
VCNTL
GND
PR108
100K_0402_1%
PC90
4.7U_0603_6.3V6K
VIN
2
1
PU8
1
PC91
1U_0402_6.3V6K
+0.75VP
2
PR110
100K_0402_1%
2
1
3
PC92
0.1U_0402_16V7K
2
1
PR109
PQ31
0_0402_5% 2N7002W-T/R7_SOT323-3
1
2
2
G
1
2
PC94
@ PR111 0.1U_0402_16V7K
0_0402_5%
2
40,44 SUSP
37,44 SYSON#
RT9173DPSP_SO8
PC93
10U_0805_6.3V6M
C
For AMD NEW VGA (Braidway)

Output= 1.0V (PR113= 5.9K SD034590180)
+3VALW
VGA@ PC95
1U_0402_6.3V6K
+1.5V
PJ20 @
JUMP_43X79
40,50,52,53 VS_ON
@ PR114
1K_0402_1%
1
2
APL5913-KAC-TRL_SO8
VGA@ PC96
0.022U_0402_25V7K
VGA@ PR112
1.54K_0402_1%
FB=0.8V
M96@ PR113
4.02K_0402_1%
PR113
@ PR115
10K_0402_1%
1
2
5.9K_0402_1%
MAD@
VGA@ PR116
22K_0402_5%
2
VGA@ PC99
0.1U_0402_10V7K
36,38,40,44,52 SUSP#
VGA@ PC98
22U_0805_6.3V6M
VGA@ PR159
1K_0402_1%
1
2
1
24,40,45,52,55 VGA_ON
FB
+1.1VSDGPU
2
EN
POK
3
4
8
7
VOUT
VOUT
2
1
VCNTL
VIN
VIN
VGA@ PC97
4.7U_0603_6.3V6K
6
5
9
GND
VGA@ PU9
B
Ien=10uA, Vth=0.3V, notice

the res. and pull high
voltage from HW
2009/08/10
Issued Date
Compal Secret Data
Deciphered Date
2010/08/10
Title
Custom
SCHEMATICS,MB A5511
Rev
C
401762
Date:
Sheet
1
51
of
60
12
11
V5DRV
10
PC101
4.7U_1206_25V6K
1
2
LG_1.8V
@ PR121
4.7_1206_5%
PQ33
FDS6670AS_NL_SO8
4 G
PR123
3.09K_0402_1%
PGND
DRVL
+5VALW
PC107
4.7U_0603_6.3V6K
PGOOD
@ PC108
47P_0402_50V8J
1
2
Layout Note:
+5VALW
VFB
GND
PR122
100_0603_1%
1
2
+1.8VSP
PC106
4.7U_0805_10V6K
1
+
LX_1.8V
LL
TRIP
0.1U_0603_25V7K
14
UG_1.8V
V5FILT
13
5
6
7
8
VOUT
DRVH
D
D
D
D
VBST
15
TP
TON
PL8
1.8UH_MSCDRI-104A-1R8N-E_9.5A_30%
1
2
PC102
BST_1.8V-1 1
PR119
0_0603_5%
1
2
S
S
S
@ PC103
0.1U_0402_16V7K
@ PR120
47K_0402_5%
PC104
330U_6.3V_M
VFB=0.75V
Vo=VFB*(1+PR124/PR125)=1.8V
Freq=282KHz
@ PC105
680P_0603_50V8J
Cesr=15m ohm
Delta I=((19.5-1.5)*(1.5/19.5))/(L*Freq)=2.232A
Iocp-min=4.60A
Iocp-max=4.76A
Iocp=4.60~4.76A
VFB=0.75V
PR124
59K_0402_1%
1
2
B+
3
2
1
BST_1.8V
PU10
EN_PSV
36,38,40,44,51 SUSP#
1.8V_EN
@ PR118
@PR118
0_0402_5%
1
2
40,50,51,53 VS_ON
3
2
1
PR148
0_0402_5%
1
2
JUMP_43X118
1
PR117
280K_0402_1%
1
2
5
6
7
8
PQ32
AO4466_SO8
PC100
4.7U_1206_25V6K
@PJ21
@
PJ21
51117_1.8V_B+
PR125
41.2K_0402_1%
MAD@ PR149
MAD@PR149
280K_0402_1%
1
2
JUMP_43X118
MAD@ PC124
4.7U_1206_25V6K
MAD@ PC132
4.7U_1206_25V6K
MAD@ PQ58
MAD@PQ58
AO4466_SO8
5
6
7
8
@PJ30
@
PJ30
51117_VDDCI_B+
VDDCI_SEN
1
15
MAD@ PC134
330U_D2E_2.5VM
MAD@PC127
MAD@
PC127
4.7U_0805_10V6K
@ PC133
680P_0603_50V8J
MAD@ PR299
MAD@PR299
0_0402_5%
1
2
FB_GND
FB_GND 27,55
VFB=0.75V
Vo=VFB*(1+PR156/PR150)=1.1V
Freq=282KHz
Cesr=15m ohm
Delta I=((19.5-1.1)*(1.1/19.5))/(L*Freq)=1.67A
Iocp-min=4.06A
Iocp-max=5.83A
Iocp=4.06~5.83A
VFB=0.75V
MAD@ PR156
MAD@PR156
59K_0402_1%
1
2
+
2
LG_VDDCI
DRVL
MAD@ PQ57
AO4712_SO8
10
9
@ PR155
4.7_1206_5%
+5VSDGPU
MAD@ PR153
6.65K_0402_1%
PGND
8
GND
V5DRV
3
2
1
LX_VDDCI
PC123 MAD@
4.7U_0603_6.3V6K
PGOOD
@ PC129
47P_0402_50V8J
1
2
Layout Note:
VFB
+5VSDGPU
+VDDCIP
11
12
0.1U_0603_25V7K
LL
TRIP
UG_VDDCI
5
6
7
8
13
3
2
1
V5FILT
PR151 MAD@
100_0603_1%
1
2
VDDCI_SEN 25
MAD@PR298
MAD@
PR298
10_0402_5%
MAD@ PL17
2.2UH_PCMC063T-2R2MN_8A_20%
1
2
PC131
VOUT
DRVH
MAD@
BST_VDDCI-11
TP
TON
VBST
MAD@ PR157
MAD@PR157
0_0603_5%
1
2
@ PC128
0.1U_0402_16V7K
@ PR154
47K_0402_5%
EN_PSV
MAD@PU15
MAD@
PU15
BST_VDDCI
14
EN_VDDCI
MAD@ PR152
MAD@PR152
0_0402_5%
1
2
B+
24,40,45,51,55 VGA_ON
MAD@ PR150
MAD@PR150
124K_0402_1%
Issued Date
Compal Secret Data
2009/08/10
Deciphered Date
2010/08/10
Title
Custom
SCHEMATICS,MB A5511
Rev
C
401762
Date:

D
Sheet
52
of
60
PL18
FBMA-L11-322513-151LMA50T_1210
PR162
4.53K_0402_1%
1
2
DH_1.1VS_VTT
1 PR128 2
PR129 0_0603_5%
BST_1.1VS_VTT
1
2
0_0603_5%
15
16
BOOT
VIN
UG
PHASE
PGOOD
PVCC
13
PGND
12
ISEN
11
PQ34
SI7686DP-T1-E3_SO8
PR132
4.7_0603_5%
1
2 6268_VCORE_1.1VS_VTT
14
LG
PR131
0_0603_5%
Layout Note:
Close IC
PC112
2.2U_0603_6.3V6K
DL_1.1VS_VTT
DCR=2.7m(Typ)
3.0m(Max)
PL9
1UH_PCMB103E-1R0MS_20A_20%
1
2
PR134
57.6K_0402_1%
1
2
PR133
4.7_1206_5%
Material Note:
330uF/6 m, number
are 3, Power 1, HW 2
PR145
100K_0402_5%
PR146
10K_0402_5%
PR147
100K_0402_5%
2
PC121
0.01U_0402_16V7K
2
PQ38
PMBT2222A_SOT23-3
1
2
PQ37
2N7002W-T/R7_SOT323-3
PC120
0.1U_0402_16V7K
1
2
G
PR143
6.65K_0402_1%
Rds=4.5m(Typ)
5.6m(Max)
+3VS
PR144
4.7K_0402_5%
2
1
PC116
330U_D2E_2VM_R6M
VTT_SENSE 7
PR142
180K_0402_1%
+3VS
+1.1VS_VTTP
PR160
0_0402_5%
1
2
PR141
46.4K_0402_1%
1 2
2
3
2
1
PR139
10_0402_5%
1
2
VFB=0.6V
1
PC114
680P_0402_50V7K
Layout Note:
Close IC
Pin15
10
2
2
1
PR138
57.6K_0402_1%
PR137
90.9K_0402_1%
PC118
0.01U_0402_25V7K
ISL6268CAZ-T_SSOP16
PR140
4.99K_0402_1%
1
2
Ipeak=18.062A
Imax=12.6434A
Freq.=230KHz
Iocp=20.01~27.39A
PR135
4.02K_0402_1%
PC119
6800P_0402_25V7K
1
2
22P_0402_50V8J
PC117
Layout Note:
Close IC
ISEN_1.1VS_VTT
1
2
VO
FSET
9
1
PC115
0.1U_0402_16V7K
FB
COMP
EN
@ PR136
10K_0402_5%
C
PQ35
AON6704L_DFN8-5
+1.1VS_VTTP
PC113
2.2U_0603_6.3V6K
40,50,51,52 VS_ON
6268_VCORE_1.1VS_VTT
4 VCC
PC111
0.1U_0603_25V7K
+5VS
8
GND
PU11
DH_1.1VS_VTT-1
1
PR130
2.26K_0402_1%
1
2
LX_1.1VS_VTT
3
2
1
H_VTTPWRGD 5
H_VTTPWRGD_3.3 5
2 PR127 1
3.4K_0402_1%
+5VS
PR126
0_0402_5%
1
2
PC110
10U_1206_25V6M
1
2
Layout Note:
Place near high-side MOS Drain
and low-side MOS Source
6268_B+
PC109
10U_1206_25V6M
B+
H_VTTVID1 7
Voltage Select
VID
Vout
High
1.05 V
Low
1.1 V
VTT Rail
Arrandale +1.1VS_VTT=1.05V
Clarksfield +1.1VS_VTT=1.1V
A
Issued Date
Compal Secret Data
2009/08/10
2010/08/10
Deciphered Date
Title
Custom
SCHEMATICS,MB A5511
Rev
C
401762
Date:
Sheet
1
53
of
60
@ PJP3
2
2
UMA@ PR265
22.6K_0402_1%
UMA@ PC191
0.22U_0402_6.3V6K
GFXVR_IMON 8
ISUMBST_GFX 1
1
14
3
2
1
VID0
20
VID1
21
UMA@ PR269
3.65K_0805_1%
UMA@
PQ41
AO4456_SO8
UMA@ PR274 UMA@ PH3

1
2 1
2
2
1
1
UMA@ PC198
2.2U_0603_6.3V6K
Rds=4.5mOHM(typ)
Rds=5.6mOHM(max)
UMA@ PC199
470P_0603_50V8J
Layout Note:
Place near Choke
@ PR279
10K_0402_1%
UMA@
PR270
0_0402_5%
PC130 UMA@
330U_D2E_2VM_R6M
+5VALW
3
2
1
UMA@ PR273
1
2
0_0603_5%
2
1
UMA@ PR268
2.2_1206_5%
UMA@ PQ40
AO4456_SO8
2
VCCP
17
19
VID2
5
6
7
8
5
6
7
8
16 LX_GFX
18 DL_GFX
+VGFX_COREP
UMA@ PL10
0.45UH_PCMB104T-R45MN_25A_20%
4
1
22
2.61K_0402_1% 10KB_0402_5%_ERTJ1VR103J
1
2
UMA@ PR277
11K_0402_1%
Material Note:
330uF/6 m, number are 3, PW
1, HW 1, 1 of HW is backup
UMA@ PC202
.1U_0402_16V7K
UMA@
1
UMA@
1
UMA@
1
UMA@
1
UMA@
1
UMA@
1
UMA@
1
UMA@
1
UMA@
1
PR280
PR281
PR282
PR285
PR286
PR287
PR289
PR290
PR291
GFXVR_VID_0 8
GFXVR_VID_1 8
GFXVR_VID_2 8
GFXVR_VID_3 8
GFXVR_VID_4 8
GFXVR_VID_5 8
GFXVR_VID_6 8
GFXVR_EN 8
GFXVR_DPRSLPVR
UMA@ PC203
.1U_0402_16V7K
UMA@ PR283
UMA@ PR288 1.69K_0402_1%
82.5_0402_1%
1
2
1
2
2
2
2
2
2
2
2
2
2
1
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
UMA@ PC204
0.01U_0402_16V7K
VID3
VID4
DCR=1.1 mOHM
2 DH_GFX1
3
2
1
12
11
10
13
IMON
VIN
VDD
RTN
ISUM
BOOT
15 DH_GFX
@
PR284
100_0402_1%
1
UMA@ PR276
8.06K_0402_1%
23
CLK_EN#
VID5
+VGFX_COREP
2
UMA@ PR275
17.8K_0402_1%
UMA@ PC201
22P_0402_50V8J
1
2
PGOOD
UMA@ PQ39
SI7686DP-T1-E3_SO8
UMA@ PC200
150P_0402_50V8J
RBIAS
24
1 2
VSSP
LGATE
25
VW
VID6
147K for CPU

47K for GPU
UMA@ PC196
100P_0402_50V8J
COMP
VR_ON
UMA@ PU12
ISL62881HRZ-T_QFN28_4X4 PHASE
DPRSLPVR
2 1
FB
26
UMA@ PC197
1000P_0402_50V7K
2
1
UMA@ PR267
0_0603_5%
UGATE
27
UMA@ PR271
8.66K_0402_1%
2
1
UMA@ PR294
2
1
47K_0402_1%
VSEN
28
UMA@ PR272
825K_0402_1%
ISUM+
29
AGND
UMA@ PC195
330P_0402_50V7K
UMA@ PC193
0.22U_0603_25V7K
UMA@ PR293
2
1
10_0402_5%
UMA@ PR266
0_0603_5%
UMA@ PC194
330P_0402_50V7K
8 VCC_AXG_SENSE
8 VSS_AXG_SENSE
ISUM+
UMA@ PC192
1000P_0402_50V7K
1
2
+VGFX_COREP
VSS_AXG_SENSE
1 1
UMA@ PC189
1U_0603_6.3V6M
UMA@ PR264
2
1
1_0603_5%
+5VALW
UMA@ PC190
0.22U_0603_25V7K
@ PC188
0.1U_0402_25V6
UMA@ PR263
0_0603_5%
UMA@ PC126
10U_1206_25V6M
2
1
UMA@ PC125
10U_1206_25V6M
2
1
1
2
UMA@ PR292
2
1
10_0402_5%
GFX_CORE
Freq.=300KHz
Imax=15.40A
Ipeak=22.00A
Iocp=24.5A
LL=7m ohm
Cesr=6 mOHM
GFX_B+
PAD-OPEN 4x4m
UMA@ PC187
2200P_0402_50V7K
B+
ISUM+
@
PC205
180P 50V J NPO 0402
ISUM-
Issued Date
Compal Secret Data
2009/08/10
Deciphered Date
2010/08/10
Title
Size
C
Date:
SCHEMATICS,MB A5511
Document Number
Rev
C
401762
Sheet

1
54
of
60
@ PJ23
1
B+_core
23,40
DGPU_PWROK
@ PR184
3.09K_0402_1%
1
2
VGA_CORE
Imax=21.03A
Ipeak=30.04A
Iocp=32.93~45.07A
Cesr=6 mOHM
LX_VCORE
VGA@
DH_VCORE
1 PR182 2
VGA@ PR183 0_0603_5%
BST_VCORE
1
2
0_0603_5%
DH_VCORE-1
1
VGA@ PC142
0.22U_0603_25V7K
+5VSDGPU
1
VGA@ PC141
10U_1206_25V6M
VGA@ PC140
10U_1206_25V6M
1
2
VGA@ PC139
10U_1206_25V6M
1
2
VGA@ PC138
0.1U_0805_50V7K
+5VSDGPU
VGA@ PR180
0_0402_5%
1
2
JUMP_43X118
PR181
2.05K_0402_1%
B+
VCC
2
UG
BOOT
4.7_0603_5%
14
1
2
VGA@ PC143
2.2U_0603_6.3V6K
LG
13
PGND
12
ISEN
11
GCORE_SEN 25
15
16
PVCC
GCORE_SEN
DCR=1.1 mOHM
VGA@ PR297
10_0402_5%
VGA@ PL11
0.36UH_PCMC104T-R36MN1R17_30A_20%
DL_VCORE
PHASE
VIN
VGA@ PQ42
SI7686DP-T1-E3_SO8
6268_VCORE
1 2
VGA@ PR188
4.7_1206_5%
VGA@ PC145
330U_D2E_2VM_R6M
+
VGA@ PR296
0_0402_5%
2
1FB_GND
VGA@ PC146
680P_0402_50V7K
VGA@ PR192
4.99K_0402_1%
1
Rds=4.5mOHM(typ)
Rds=5.6mOHM(max)
+3VS_DELAY
VGA@ PR200
10K_0402_1%
1
2
D
D
2
G
S
@
PR202
VGA@ PC151
10K_0402_1%
4700P_0402_16V7K
VGA@ PC152
4700P_0402_16V7K
2
G
2
1
@ PR203
10K_0402_1%
VGA@ PR198
10K_0402_5%
1
VGA@ PQ46
2N7002W-T/R7_SOT323-3
VGA@ PR201
10K_0402_1%
2
1
VGA@ PR199
10K_0402_5%
PQ45 VGA@
2N7002W-T/R7_SOT323-3
VGA@ PR197
39.2K_0402_1%
+3VS_DELAY
VGA@ PR196
9.53K_0402_1%
VGA@ PR195
18.7K_0402_1%
1
VGA@ PC149
0.01U_0402_25V7K
VFB=0.6V
FB_GND 27,52
Layout Note:
Close IC
Pin15
+GPU_COREP
3
2
1
3
2
1
10
1
2
9
VGA@ PR194
44.2K_0402_1%
2
1
1
2
1
ISL6268CAZ-T_SSOP16
VGA@ PC150
2200P_0402_25V7K
VGA@ PC148
22P_0402_50V8J
2
1
VGA@ PR193
33K_0402_1%
5
6
7
8
VGA@ PQ44
AO4456_SO8
ISEN_VCORE
1
2
VGA@ PR190
6.81K_0402_1%
VO
FSET
M96@ PC147
0.1U_0402_16V7K
FB
COMP
EN
100K_0402_1%
VGA@ PQ43
AO4456_SO8
5
VGA@ PR189
1
2
VGA_ON
24,40,45,51,52
VGA@ PC144
2.2U_0603_6.3V6K
@ PR187
10K_0402_5%
5
6
7
8
6268_VCORE
VGA@
PR1862
3
2
1
+3VS_DELAY
PGOOD
GND
VGA@ PU13
VGA@ PR185
0_0603_5%
+3VS_DELAY
+3VS_DELAY
2
VGA@ PR204
10K_0402_5%
VGA@ PQ47
2N7002W-T/R7_SOT323-3
VGA@ PQ48
2N7002W-T/R7_SOT323-3
GPU_VID1 GPU_VID0 Core Voltage Level
0.90 V
0.98 V
1.07 V
1.15 V
GPU_VID0 24
@ PR208
10K_0402_1%
@ PR209
10K_0402_1%
VGA@ PR206
10K_0402_1%
21
2
G
VGA@ PR207
10K_0402_1%
2
12
G
24 GPU_VID1
VGA@ PR205
10K_0402_5%
Compal Secret Data
Issued Date
2009/08/10
2010/08/10
Deciphered Date
Title

SCHEMATICS,MB A5511
Custom
Rev
C
401762
Date:
Sheet
1
55
of
60
PL12
FBMA-L18-453215-900LMA90T_1812
+CPU_B+
PR219 499_0402_1%
1
PC157
0.22U_0603_25V7K
1
2
CLK_ENABLE#
LGATE2
2
2
PR235
1
PR234
0_0402_5%
1
0_0402_5%
2
PQ53
TPCA8030-H_SOP-ADV8-5
PR251
2.61K_0402_1%
2
1
10_0402_5%
2
1
@ PC185
1200P_0402_50V7K
2 1
1
1
PL14
0.36UH_PCMC104T-R36MN1R17_30A_20%
Layout Note:
Place near DC side of
Phase1 Choke
PR255
1_0402_5%
@ PR259
0_0402_5%
1
PQ56
AON6704L_DFN8-5
VSUM+
PC184
680P_0402_50V7K
+CPU_CORE
V1N
1
1
2
4
2
PH6
10K_0402_1%_TSM1A103F34D1RZ
PR252
4.7_1206_5%
LGATE1
PHASE1
AON6704L_DFN8-5
PR256
1.27K_0402_1%
1
2
@ PQ54
PC179
0.068U_0603_16V7K
2
1
PC178
0.22U_0603_10V7K
2
1
PC176
0.22U_0603_25V7K
BOOT1_1 1
2
PR261
1
0_0402_5%
2
4
PR249
0_0603_5%
2
1
PQ55
PR258
11K_0402_1%
2
1
PR260
1
VSSSENSE
PC182
1000P_0402_50V7K
7
GNDA_VCORE
PC183
330P_0402_50V7K
<BOM Structure>
PC181
PC180
330P_0402_50V7K
@ PC177
2700P_0402_50V7K
2
1
2
0_0402_5%
PR250
VCCSENSE
82.5_0402_5%
PR248
10_0402_5%
0.01U_0402_25V7K
PR247
2
1
UGATE1
VSUM+
PC175
10U_1206_25V6M
2
1
VSSSENSE
PR254
10K_0402_5%
1
2
PR246
9.53K_0402_1%
VSUM+CPU_CORE
GNDA_VCORE
PC170
0.22U_0603_25V7K
+CPU_B+
PC172
0.1U_0603_25V7K
2
1
1_0402_5%
2
+5VALW
0_0402_5%
2
IMVP_IMON
PR245
3
2
1
0_0402_5%
2
+CPU_B+
PR241
BOOT1
Layout Note:
PH5 place near Phase1 H-MOS
PC163
1U_0603_10V6K
PR240
1
PR242
412K_0402_1%
+5VALW
11
12
13
14
15
16
17
18
19
20
GNDA_VCORE
ISEN1
ISL62883HRZ-T_QFN40_5X5~D
ISEN2
VSUM-
Load Line=1.9mV/A
Vout= 1.075V(Arrandale)0.95V(Clarksfield)
Iccmax=48A(Arrandale)52A(Clarksfield)
IccTDC=32A(Arrandale)40A(Clarksfield)
OCP_typ=60.00A
3
2
1
AGND
30
29
28
27
26
25
24
23
22
21
41
BOOT2
UGATE2
PHASE2
VSSP2
LGATE2
VCCP
PWM3
LGATE1
VSSP1
PHASE1
390P_0402_50V7K
PR239
3.01K_0402_1%
1
2
PC166
150P_0402_50V8J
PGOOD
PSI#
RBIAS
VR_TT#
NTC
VW
COMP
FB
ISEN3
ISEN2
PC169
1U_0603_10V6K
2
1
PC164
2
PR237
8.06K_0402_1%
1
2
PR238
562_0402_1%
1
2
1
2
PC165
10P_0402_50V8J
1
PC161
22P_0402_50V8J
H_PROCHOT#_R
PH5
470K_0402_1%_ERTJ1VG103FA~D
GNDA_VCORE
@ PR236
249K_0402_1%
1
4.02K_0402_1%
2
2
PR233
1
GNDA_VCORE
1
2
3
4
5
6
7
8
9
10
3
2
1
0_0402_5%
3
2
1
PR232
56P_0402_50V8
2
PC162
1000P_0402_50V7K
ISEN2
PC158
680P_0402_50V7K
PC159
1U_0603_10V6K
1
2
CLK_EN#
DPRSLPVR
VR_ON
VID6
VID5
VID4
VID3
VID2
VID1
VID0
PU14
68_0402_5%
1
2
PC168
0.22U_0402_10V6K
@ PC160
1
PR231
5 H_PROCHOT#
V1N
PC171
0.22U_0603_25V7K
+1.1VS_VTT
PR223
1_0402_5%
@ PR225
0_0402_5%
1
0_0402_5%
2
40
39
38
37
36
35
34
33
32
31
PR230
ISEN1
VSEN
RTN
ISUMISUM+
VDD
VIN
IMON
BOOT1
UGATE1
+1.1VS_VTT
7
H_PSI#
PR229
1
2
147K_0402_1%
GNDA_VCORE
PR228 100K_0402_5%
1
2
PC167
0.22U_0402_10V6K
+CPU_CORE
V2N
VSUM+
3
2
1
3
2
1
VGATE
PQ52
AON6704L_DFN8-5
@ PD7
RB751V-40TE17_SOD323-2
2
1
PR220
4.7_1206_5%
PR222
10K_0402_5%
AON6704L_DFN8-5
PR226
1.91K_0402_1%
12,15
PQ51
PR224
1.91K_0402_1%
1
PR227
0_0402_5%
1
PHASE2
12 CLK_ENABLE#
+3VS
PC122
220U_25V_M
PL13
0.36UH_PCMC104T-R36MN1R17_30A_20%
UGATE2
PC174
10U_1206_25V6M
7 H_DPRSLPVR
BOOT2_2
PR217
0_0603_5%
2
1
BOOT2
VR_ON
B+
@ PQ50
PR218 0_0402_5%
38
PC156
10U_1206_25V6M
2
1
PR216 0_0402_5%
PC155
10U_1206_25V6M
PR215 0_0402_5%
PR221
3.65K_0805_1%
2
1
CPU_VID6
PQ49
PC173
2200P_0402_50V7K
2
1
CPU_VID5
PR253
3.65K_0805_1%
PC153
0.1U_0603_25V7K
2
1
CPU_VID4
1
PR214 0_0402_5%
1
PR213 0_0402_5%
CPU_VID3
CPU_VID2
PR212 0_0402_5%
3
2
1
PR211 0_0402_5%
CPU_VID1
CPU_VID0
3
2
1
PC154
2200P_0402_50V7K
2
1
2
PR210 0_0402_5%
V2N
VSUM-
ISEN1
VSUM-
@ PR262
100_0402_1%
1
2
PJP5
1
PC186
0.1U_0402_16V7K
GNDA_VCORE
PAD-OPEN1x1m
GNDA_VCORE
GNDA_VCORE
2009/08/10
Issued Date
Deciphered Date
2010/08/10
Title
Size
C
Compal Secret Data
Date:
SCHEMATICS,MB A5511
Document Number
Rev
C
401762
Sheet
56
1
of
60
Version change list (P.I.R. List)

Item
D
1
2
Fixed Issue
Reason for change
Rev.
BQ24751A has very low rate crack
Add BQ24751A voltage clamp protection

but disable first
Optimize by control IC vendor suggestion
PG#
0.1
47
0.1
56
0.1
54
0.1
53
0.1
52
0.1
50
0.1
56
3
4

5
6
7
C
8
9
Tune OCP from 15.81A to 18.62A(min) & optimize

compensation by control IC vendor suggestion
Tune VDDCI output voltage to 1.1V by HW request

Tune VDDCI output voltage to 1.1V by HW request
SH16118AM00 is non lead-free part, SH16118AM10 is
SH16118AM00 is non lead-free part, SH16118AM10 is
Co-lay will cause DRC, but reserve the space
Co-lay will cause DRC, but reserve the space
10
There is not enough space
Choke change size from 10x10 to 7x7
0.2
52
11
Tune sequence by HW request and

prevent enable abnormally
Tune sequence by HW request and

prevent enable abnormally
0.2
51
12
Power ON while no CPU will burn out
Power ON while no CPU will burn out
0.2
53
13
PQ7 has very low rate crack
Change PQ7 package to TO-253 DPAK
0.2
48
14
HW request
Don't need this signal
0.2
54
0.2
56
15
16
17
18

To avoid pre-charge can not finish
0.2
To avoid pre-charge can not finish
To avoid 2nd source RT8209B can no power on
49
0.2
To avoid 2nd source RT8209B can no power on

Switch delay time can't over 1mS and OCP has risk
Tune switch delay time to 1mS and OCP to 32.93A(min)
0.2
55
19
Tune OCP from 18.62A to 20.01A(min)
Tune OCP from 18.62A to 20.01A(min)
0.2
53
20
Sense from VTTP and CPU both
Sense from VTTP and CPU both
0.2
53
Tune OCP to 16.47A(min) & ripple noise
0.2
50
21
Tune OCP from 15.81A to 18.62A(min) & optimize

compensation by control IC vendor suggestion
Tune OCP to 16.47A(min) & ripple noise
22
Tune Output Voltage to 1.15V(max) for

batter performance by HW request
Tune Output Voltage to 1.15V(max) for

batter performance by HW request
0.3
55
23
Tune CPU transient
Tune CPU transient
0.3
56
Page 1 of 2
for PWR
2009/08/10
Date
Change PR56 from 150 to 0(SD013000080)

Disable PD8PD9PR57PR158PC35PQ15
Change PQ7 to power pack
Disable PR236PC177PC185PR262
Change PR239 from 2.26K to 2.61K(SD000009M80)
Change PC179 from 0.47U to 0.047U(SE026473K80)
Change PR256 from 1K to 1.21K(SD000004C00)
Delete PR243PR244PR257
Change PR271 from 10.2K to 8.66K(SD034866180)
Change PC203 from 0.068U to 0.1U(SE076104KM8)
Change PR283 from 3.01K to 1.69K(SD00000JB80)
Disable PR284PC205
Phase
2009 EVT
05/07
2009 EVT
05/11
2009 EVT
05/11
2009 EVT
05/11
2009 EVT
Change PR156 from 27.4K to 124K(SD034590280)
05/13
2009 EVT
Change PL7 from SH16118AM00 to SH16118AM10
05/13
2009 EVT
Delete PL15PL16
05/14
2009 EVT2
Change PL17 from SH000007E80 to SH000006I80
05/27
Change EN net from DGPU_PWR_EN# to VGA_ON
2009 EVT2
Change PR116 from 47K to 22K(SD028220280)
05/27
Change Feedback from +1.1VS_VTT to +1.1VS_VTTP 2009
EVT2
05/27
2009 EVT2
Change PQ7 from AO4407 to AOD425(SB00000K800)
05/27
2009 EVT2
Delete net GFX_CORE_PWRGD
06/01
Change PR226 from 10K to 1.91K(SD000009O80)
2009 EVT2
06/01
2009 EVT2
Add PC135 as 1U
06/02
Change PR94PR103PR122PR151 from 300 to 100(SD014100080)
2009 EVT2
Change PC79PC88PC107PC123 from 1U to 4.7U(SE107475K80)
06/02
2009 EVT2
06/29
Change PC151PC152 from 0.1U to 0.22U(SE095224K00)
Change back
06/02
PC151PC152
2009 EVT2
06/02
Change PR139 to +1.1VS_VTTP
2009 EVT2
Add PR160 to VTT_SENSE
06/03
06/22
Delete PC136
2009 EVT2
Add PC136
06/08
2009 EVT3
Change PR297 from 0 to 10(SD028100A80)
06/17
2009 EVT3
Change PC179 from 47nF to 68nF(SE026683K80)
06/17
Compal Secret Data
Issued Date
Modify List
Deciphered Date
2010/08/10
Title
Custom
SCHEMATICS,MB A5511
Rev
C
401762
Date:
Sheet
1
57
of
60
Version change list (P.I.R. List)

Item
D
24
25
26
27
28
Fixed Issue
Reason for change

Enable BQ24751A voltage clamp protection
To prevent +3VALW/+5VALW cant boot up when VREG3

To prevent +3VALW/+5VALW cant boot up when VREG3
and VREG5 capacitor has big different
and VREG5 capacitor has big different
PG#
0.3
48
0.3
2009
06/25
Change PL5 from Molding to Coil(SH000008N80)
2009
Change PL8 from Modling to Coil 1.8uH(SH000008U80)
07/02
2009
PR196 from 7.32K to 9.53K(SD034953180)
55 Change
07/03
Change PC32 from 0.1U to 0.22U(SE000005Z80)
2009
PR161 as 4.7(SD001470B80)
48 Add
Change PR56 from 150 to 1K(SD013100180)
07/09
Add PC36 as 1000pF(SE074102K80)
0.4
Cost Down
Cost Down
Dividing equally GPU output voltage

from 0.9V to 1.15V by HW request
Dividing equally GPU output voltage

from 0.9V to 1.15V by HW request
To prevent PVCC has spike voltage
Page 2 of 2
for PWR
Rev.
0.4
0.4
49
Modify List
Date
Phase
2009 EVT3
06/25
Enable PD8PD9PC35PQ15PR57PR158
Change PR56 from 0 to 150(SD014150080)
Change PC57 from 0.22U to 1U(SE080105K80)
EVT3
PVT
PVT
PVT
Change PC30 from 0.01uF to 0.022uF(SE075223K80)

Disable PD8PD9PQ15PC35PR57PR158
29
C
30
31
To avoid false trigger of current imbalance

protection if ISEN caps have wider tolerance
Tune VID delay time to about 470uS
Cut in EMI solution
0.4
To avoid false trigger of current imbalance

protection if ISEN caps have wider tolerance
0.4
To false avoid trigle of OVP/UVP, the normal switch time

is 220uS
Cut in EMI solution
56
Change PC167PC168 AGND net to VSUM-
55
Change PC151PC152 from 0.1U to 0.047U(SE076473K80)

4.7n(SE076472K80)
0.4
Change PJ22 jump to PL18 bead(SM010016410)

Enable PR133PR188PR220PR252PC114
PC146PC153PC158PC172PC184
Change PQ35 from AO4456 to AO6704L(SB00000I900)

Delete PQ36
32
Cost Down
Cost Down
0.4
33
Vendor production phase out
Vendor production phase out
0.4
53
Change PC116PC130PC145 from SGA00002380 to SGA00002U00
34
Adjust OCP from ~52A to ~60A
Adjust OCP from ~52A to ~60A
0.4
56
35
Cost Down
Cost Down
0.5
56
36
HW request
HW request
0.5
56
37
HW request
0.5
For Intel S3 POWER reduce
53
Change
Change
Change
Change
Change
Change
PR239 from 2.61K to 3.01K(SD034301180)

PR246 from 8.25K to 9.53K(SD034953180)
PR256 from 1.1K to 1.27K(SD034127180)
PH6 from 0603 to 0402(SL200000W00)
PH1PH2 from 0603 to 0402(SL200000V00)
PH3 from 0603 to 0402(SL200001100)
Change PR108PR110 from 1K to 100K(SD034100380)

Add PR162 4.53K(SD034453180)
Change PR130 from 1K to 2.26K(SD034226180)
2009
07/09
2009
07/09
2009
07/10
2009
07/10
2009
07/10
2009
07/21
2009
08/06
2009
08/06
2009
08/10
PVT
PVT
Change
2009
07/10
PVT
PVT
PVT
PVT
Pre-MP
Pre-MP
Pre-MP
B
Issued Date
Compal Secret Data
2009/08/10
Deciphered Date
2010/08/10
Title
Custom
SCHEMATICS,MB A5511
Rev
C
401762
Date:
Sheet
1
58
of
60
A1--> A2 Change List

2009/05/26
Page 33 SWAP HDD SATA_DTX_C_PRX_N1/P1
Page 38 Del DPIO42 (GFX_CORE_PWRGD) and ADD ME_EN in GPIO42 to PCH GPIO33 (For enable ME to entry manufactruing mode )
Page 12/37 Del PCH_SATA2_CE# and change PCH_SATA1_CE# for Esata redriver IC enable singal
2009/06/02
Page 30 Reverse JLVDS1 pin 36 and pin 37
Page 39 Reverse JKB1 pin defined
Page 12 colay Relatek CLK Gen
Page 39 Follow EMI request,add R486 and C9...
Page 24 switch the net name EC_SMB_DA2 and EC_SMB_CK2
2009/06/03
Page 40 add R490,R491,R493 and R494 for LED brightness
Page 38 change EC pin 75 from GFX_CORE_PWRGD to ME_EN
2009/06/04
change Y1,Y3,Y4,Y10,X1 crystal PCB footprint
Page 45 change R462 to 22k
Page 15 change R315 to 100k
A2--> A3 Change List
2009/06/25
Page 14 R305 pull high to +3VS_Delay
Page 15,24,38 Add ACIN_BUF for PCH/VGA
Page 24 Un-pop R177 (No use external Vbios ROM)
change R28 to 510K (for VGA Power on sequence )
Page5,6,7,44 Reserve INTEL Capella new design schematic
Page 24 SWAP Q57,Q58,Q62 Pin1 and PIN3,
change Q62 to UMA@
Page 38 change PWR_SUSP_LED to U38.84
Page 36,38,39 combine LED fuction to BT_ON#
Page 39 SWAP JP9
Page 40 Add discharge schematic for VGA_ON
A3-->C Change List

2009/07/06
Page 32 Switch the U57 Pin 27 and Pin 49 (IGPU_SELECT# and DGPU_SELECT#)
2009/07/08
Page 24 Add
Page 25 Add
Page 25 Add
Page 27 Add
Page 32 Add
Page 18 Add
R833,for short +3VS to +3VS_DELAY

R116 and R225 for Boradway MVREFDA/B and MVREFSA/B
C473,C474,R265 and R327 for Boradway CLKTESTA/B
R770 and R771
R768,R769,R767,R786,R772 and Delete Q62,R793 to verify HDMI HPD
R333 to pull down GPIO37 and change R293 to UMAO@
2009/07/10
change 4.7u_0805 to 4.7u_0603
Page 14 Add R104,R793,R342 and R341 for PEG_CLKREQ#
Page 38 update Board ID to 0.4 R364=100K,R365=56K
2009/07/13
Page 25 add R343,R344,R361,R498,R499 and R500 for broadway
Page 7 update 470uF to 330uF(C232, C186, C711, C221, C259 and C196 )
Page 39 Update R5 and R6 package from 0402 to 0603...
Page 24 add Q76,C476 and R795 for +3VS_DELAY
Page 24 Switch Q9 and change the +3VS to +3VS_DELAY
C-->Pre-MP Change List

2009/07/17
Page 42 switch MIC1_LFE_L and MIC1_CEN_R
2009/07/28
Page 39 Add Q62 to replace D11
Page 25 Add R502 and R504
Compal Secret Data
2009/08/10
Issued Date
Deciphered Date
2010/08/10
Title
SCHEMATICS,MB A5511
Custom
Date:
Rev
C
401762
Sheet
1
59
of
60
COMPAL CONFIDENTIAL
EC
13
B7
PM_DRAM_PWRGD
PCH
PBTN_OUT#
EC_ON
15
SYSON#
VV
SUSP#,SUSP
8a
VS_ON
U20
U39
+5VS
VS_ON
U19
+3VS
(DIS)
V
V
GFXVR_EN
PU12
MAX17028
Power Up
8b
PU13
+1.1VS_VTT
PU8
+0.75V
10
VGATE
EC_PWROK
MXM
8c
CLK_ENABLE#
PU11
+CPU_CORE
11b
(UMA)
(DIS)
VGA_PWRGD
11a
PU7
+1.05VS
VGA_ON
U26
+1.5VS
VR_ON
+1.5V
PU6
8c
H_VTTPWRGD
SYSON
ON/OFF
SLP_S3#
SLP_S4#
SLP_S5#
CPU
V V
B6
(UMA)
14
H_CPUPWRGD
PLT_RST#
A4
PCH_RSMRST#
V V
EC_RSMRST#
A5
SYS_PWROK
51ON#
12
V V
B3
+3V
+5V
B4
PQ1
B+
B7
B2
A5
B1
+3VALW
BATT
B5
PU4
VV
B+
A3
V V
A2
PU5
BATT
MODE
A1
VIN
U28,+3V
Q5,+5V
SBPWR_EN
AC
MODE
MODEL NAME: KBLA0 Power Sequence Block Diagram

LA4811P
PCB NAME:
REVISION:
2008/12/04
DATE:
GFX_CORE_PWRGD
8c
U36
CK505
2009/08/10
Issued Date
Compal Secret Data
2010/08/10
Deciphered Date
Title
SCHEMATICS,MB A5511
Custom
Date:
Rev
C
401762
Sheet

E
60
of
60

Acer 5940G LA-55119 NCQD0

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A

NCQD0 M/B Schematics Document

Compal Electronics, Inc.

Compal Secret Data

Tuesday, August 18, 2009

Model Name : NCQD0

PCI-E 2.0x16 5GT/s PER LANE

Power On/Off CKT.

DC/DC Interface CKT.

Power Circuit DC/DC

Compal Electronics, Inc.

Compal Secret Data

Daul CH NAND interface

USB port 0,1

SATA x 6 (GEN1 1.5GT/S ,GEN2 3GT/S) 100MHz

PCI-Express x 8 (ABD PCIE1 2.5GT/S CKD PCIE1/2 2.5/5GT/S) 100MHz

Tuesday, August 18, 2009

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for CPU

0.75V switched power rail for DDR terminator

1.05V switched power rail for PCH

1.1V switched power rail (1.05 for AUB CPU)

1.5V power rail for DDRIII

1.5V switched power rail

1.8V switched power rail

3.3V always on power rail

3.3V power rail for PCH

3.3V power rail for LAN

3.3V switched power rail

5V always on power rail

5V switched power rail

5V power rail for PCH

VSB always on power rail

5V power rail for GPU

1.5V power rail for VRAM

1.8V switched power rail for GPU

BTO Option Table

USB 2.0 USB 1.1 Port

Compal Electronics, Inc.

Compal Secret Data

USB Port Table

Ibex SM Bus address

Board ID / SKU ID Table for AD channel

External PCI Devices

SLP_S1# SLP_S3# SLP_S4# SLP_S5#

PCI EXPRESS -- GRAPHICS

WW41 Recommend not pull down

eDP Signals MAPPING

CFG0 - PCI-Express Configuration Select

CFG4 - Display Port Presence

*1:Disabled; No Physical Display Port

CFG3 - PCI-Express Static Lane Reversal

Compal Electronics, Inc.

Compal Secret Data

R703 1 UMA@ 2 0_0402_5%

When implement S3 power reduction

STUFF -> R653, R657, R662

STUFF -> R653, R655

STUFF -> R660, R662

Compal Electronics, Inc.

Compal Secret Data

JTAG & BPM