Professional Documents
Culture Documents
ZZZ
ZZZ1
ZZZ2
ZZZ3
PCB
LA-5081P
LS-5081P
LS-5082P
DAZ@
DAZ@
DAZ@
KIWA5/A6
Schematics Document
Mobile Penryn uFCPGA with Intel
Cantiga_GM/PM+ICH9-M core logic
REV:1.0
Issued Date
Security Classification
2009/04/23
Deciphered Date
2010/05
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Cover Sheet
Size
B
Document Number
Rev
1.0
KIWAX_LA-5081P
Sheet
E
of
51
ZZZ
Compal confidential
File Name :
POWER Board
PCB KIWA5 LA-5081P LS-5081P/5082P
VRAM
64*16
DDRII
page20,21
Mobile Penryn
uFCPGA-478 CPU
PCI-E X16
NV10M-GS
40nmpage16,17,18,19
Parade 8101T
ASM 1442T
page22
H_A#(3..35)
FSB
PCBGA 1329
DDR3-SO-DIMM X2
BANK 0, 1, 2, 3
page 14,15
Dual Channel
LVDS I/F
page25
LVDS
Connector
DDR3 -800
DDR3-1066
667/800/1066MHz
PCI-E
page23
page23
Clock Gen.
SLG8SP556VTR
ICS9LPRS387AKLFT
page5,6,7
H_D#(0..63)
HDMI
CONN
page 8,9,10,11,12,13
2
DMI
page24
C-Line
AMP&Audio Jack
page35
AZALIA
PCI Express
Mini card Slotpage30
1
6*PCI-E BUS
12*USB2.0
Intel ICH9-M
Audio Codec
CX20561
mBGA-676
New Card
page30
BCM5906
10/100/LAN
page34
Card Reader
page31
RTS 5159
Key component
Manufacturer
Compal P/N
R1 Desc
4*SATA serial
CMOS Camera
LPC BUS
page37
page39
BlueTooth Conn
page39
RJ45 CONN
page32
Card reader(XD/SD
MMC/MS/MS-Pro
HD SD) page37
EC
ENE KB926
USB conn X3
page39
page36
Int.KBD
Touch Pad
BIOS
page39
page39
Intel / Cantiga GM 45
SA00002JTD0
S IC AC82GM45 SLB94 B3 FCBGA1329 GM C38!
SouthBridge
Intel / ICH9M
SA00002JH90
S IC AF82801IBM SLB8Q A3 676P ICH9M C38! (MP)
VGA Chip
Nvidia / N10M
SA00002V810
S IC N10M-GE1-S-U2(H) BGA 533P C38
page38
SATA HDD
Connector
Northbridge
Intel / Cantiga PM45
SA00002JJM0
S IC AC82PM45 QV11 A1 FCBGA 1329 PM C38
page33
SATA CDROM
Connector page33
VRAM
DDR2/512MB
SA00002MF00 (14")
S IC D2 64M16/500 HYB18T1G161C2F-20
SA00002UH00 (15.6")
S IC D2 64M16/500 H5PS1G63EFR-20L FBGA84
Security Classification
2009/04/23
Issued Date
2010/05
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
Rev
1.0
KIWAX_LA-5081P
Sheet
E
of
51
+5VALW
+5VS
B+
+3VS
+3VALW
+1.5VS
+0.75VS
State
+VCCP
+CPU_CORE
+VGA_CORE
+1.8VS
S0
S1
S3
S5 S4/AC
SOURCE HDMI
LVDS
CRT
HDCP
SERIAL
EEPROM
NEW
CLK
CAP
CARD
GEN
Mini
Mini
BATT
THERMAL
SENSOR
(VGA)
THERMAL
SENSOR
(CPU)
X X X X
X X X X
X X X
X X X
X X X V X
V X X X V
X
V
ICH9
X X X X
X V V
X V V X X
LVDS_SCL
LVDS_SDA
Cantiga
X V X X
X X X
X X X X X
GMCH_CRT_CLK
GMCH_CRT_DAT
Cantiga
HDMICLK_NB
HDMIDAT_NB
Cantiga
VGA_DDCCLK
VGA_DDCDATA
N10M
VGA_LVDS_SCL
VGA_LVDS_DAT
N10M
X
V
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
VGA_HDMI_SCL
VGA_HDMI_DAT
(55nm)
N10M
HDCP_SMB_CK1
HDCP_SMB_DA1
X
X
X
EC_SMB_CK1
EC_SMB_DA1
KB926
EC_SMB_CK2
EC_SMB_DA2
KB926
ICH_SMBCLK
ICH_SMBDAT
IFPC_AUX
IFPC_AUX_N
(40nm)
X
X
X
V
V
X
V
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
N10M
V X X X
X X X V
X X X
X X X
X X X X X
X X X X X
N10M
V X X X
X X X
X X X X X
FSEL#SPICS#
FRD#SPI_SO
SPI_CLK
FWR#SPI_SI
KB926
X X X X
V X X
X X X X X
X
Compal Secret Data
Security Classification
2009/04/23
Issued Date
2010/05
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
Size
B
Date:
Document Number
Rev
1.0
KIWAX_LA-5081P
Tuesday, April 28, 2009
Sheet
E
of
51
(N10M)
EDP at Tj = 97C*
Power Supply Rail
NVVDD
power
plane
1
10.87A
13.56A
13.47A
FB_DLLAVDD
1.1
25mA
25mA
10mA
10mA
1.1
385mA
180mA
+VGA_CORE
IFPD_IOVDD
1.1
385mA
180mA
+1.1VS
IFPE_IOVDD
1.1
385mA
180mA
+1.8VS
IFPF_IOVDD
1.1
385mA
180mA
PEX_IOVDD/Q
1.1
1550mA
1550mA
PEX_PLLVDD
1.1
165mA
65mA
PLLVDD
1.1
55mA
30mA
SP_PLLVDD
1.1
25mA
10mA
VID_PLLVDD
1.1
50mA
25mA
TOTAL
1.1
3.425A
2.435A
DDR2
11.22A
1.1
S1
GDDR3
IFPC_IOVDD
S5 S4/AC
DDR2
FB_PLLAVDD
S0
Variable
GDDR3
+3VS
State
S3
N10M-GE1-S
NB10M-GS
(V)
X
X
X
FBVDD/Q
1.8
IFPA_IOVDD
1.8
2.24A
50mA
1.65A
50mA
IFPB_IOVDD
1.8
50mA
50mA
IFPAB_PLLVDD
1.8
100mA
75mA
IFPCD_PLLVDD
1.8
160mA
80mA
IFPEF_PLLVDD
1.8
160mA
TOTAL
1.8
2.76A
2.24A
1.75A
80mA
2.17A
2.575A
DACA_VDD
3.3
110mA
110mA
DACB_VDD
3.3
125mA
125mA
DACC_VDD
3.3
110mA
110mA
MIOA_VDDQ
3.3
10mA
10mA
MIOB_VDDQ
3.3
10mA
10mA
VDD33
3.3
80mA
80mA
3.3
0.445A
0.445A
TOTAL
2.085A
POWER SQUENCE
The ramp time for any rail must be more than 40us
VDD33
(+3VS)
(1.1VS) PEX_VDD
tNVVDD>=0
(+VGA_CORE)
NVVDD
tNV-FB
tFBVDDQ>=0
(1.8VS)
FBVDDQ
Security Classification
2009/04/23
Issued Date
2010/05
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
Size
B
Date:
Document Number
Rev
1.0
KIWA5/6 LA-5081P
Tuesday, April 28, 2009
Sheet
E
of
51
XDP Reserve
+3VS
XDP_DBRESET#
H_ADSTB#1
(27)
(27)
(27)
(27)
H_STPCLK#
H_INTR
H_NMI
H_SMI#
A6
A5
C4
A[17]#
A[18]#
A[19]#
A[20]#
A[21]#
A[22]#
A[23]#
A[24]#
A[25]#
A[26]#
A[27]#
A[28]#
A[29]#
A[30]#
A[31]#
A[32]#
A[33]#
A[34]#
A[35]#
ADSTB[1]#
A20M#
FERR#
IGNNE#
H_STPCLK# D5
H_INTR
C6
H_NMI
B4
H_SMI#
A3
STPCLK#
LINT0
LINT1
SMI#
M4
N5
T2
V3
B2
D2
D22
D3
F6
RSVD[01]
RSVD[02]
RSVD[03]
RSVD[04]
RSVD[05]
RSVD[06]
RSVD[07]
RSVD[08]
RSVD[09]
H_IERR#
H_INIT#
LOCK#
H4
H_LOCK#
RESET#
RS[0]#
RS[1]#
RS[2]#
TRDY#
C1
F3
F4
G3
G2
H_RESET#
H_RS#0
H_RS#1
H_RS#2
H_TRDY#
HIT#
HITM#
G6
E4
H_HIT#
H_HITM#
BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#
AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20
PROCHOT#
THERMDA
THERMDC
THERMTRIP#
H_THERMTRIP#
A22
A21
CLK_CPU_BCLK
CLK_CPU_BCLK#
54.9_0402_1%
XDP_TRST#
R16
54.9_0402_1%
XDP_TCK
R15
54.9_0402_1%
SA00001Z700
SA00001UN00
+3VS
R95
10K_0402_5%
1
C89
U5
2200p change to
1000p for ADT7421
XDP_DBRESET# (28)
1
68_0402_5%
+3VS
+VCCP
SMCLK
EC_SMB_CK2
DP
SMDATA
EC_SMB_DA2
DN
ALERT#
GND
VDD
H_THERMDA
H_THERMDC
2200P_0402_50V7K
THERM#
3
4
THERM#
C95
2
R84
H CLK
BCLK[0]
BCLK[1]
XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
XDP_DBRESET#
EMC1402
ADT7421ARMZ
+3VS
H_HIT#
(8)
H_HITM# (8)
C7
R12
(27)
H_RESET# (8)
H_RS#0
(8)
H_RS#1
(8)
H_RS#2
(8)
H_TRDY# (8)
H_THERMDA
H_THERMDC
54.9_0402_1%
XDP_TDO
R83
56_0402_5%
H_LOCK# (8)
D21
A24
B25
54.9_0402_1%
(8)
H_INIT#
H_PROCHOT#
D20
B3
THERMAL
ICH
H_A20M#
H_FERR#
H_IGNNE#
(27) H_A20M#
(27) H_FERR#
(27) H_IGNNE#
IERR#
INIT#
R14
(8)
(8)
(8)
H_DEFER# (8)
H_DRDY# (8)
H_DBSY# (8)
H_BR0#
R11
XDP_TMS
R94
1
2
10K_0402_5%
EC_SMB_CK2 (16,36)
EC_SMB_DA2 (16,36)
EMC1402-1-ACZL-TR_MSOP8
Address:100_1100
H_PROCHOT#
H_THERMTRIP# (8,27)
G990
APL5605
RT9027
CLK_CPU_BCLK (22)
CLK_CPU_BCLK# (22)
SA00002GW00
SA00001Z900
SA000022J00
FAN1 Conn
+5VS
+5VS
C594
1
(36)
EN_FAN1
+VCC_FAN1
EN_FAN1_R
2
R667
1K_0402_5%
1
<BOM Structure>
Penryn
1
2
3
4
VEN
VIN
VO
VSET
GND
GND
GND
GND
8
7
6
5
@
1
D16
BAS16_SOT23-3
2
G990P11U_SO8
C810
0.1U_0402_16V4Z
C595
1U_0603_10V4Z
1
2
+3VS
C597
0.1U_0402_16V4Z
1
2
D17
@ 1SS355TE-17_SOD323-2
U24
10U_0805_10V4Z
2
(8)
H_BR0#
XDP_TDI
Y2
U5
R3
W6
U4
Y5
U1
R4
T5
T3
W2
W5
Y4
U2
V4
W3
AA4
AB2
AA3
V1
H_DEFER#
H_DRDY#
H_DBSY#
F1
BR0#
ADDR GROUP_1
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_ADSTB#1
H5
F21
E1
H_ADS#
H_BNR#
H_BPRI#
+VCCP
REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#
H_ADS#
H_BNR#
H_BPRI#
K3
H2
K2
J3
L1
DEFER#
DRDY#
DBSY#
H1
E2
G5
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
ADS#
BNR#
BPRI#
0.1U_0402_16V4Z
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_A#[17..35]
A[3]#
A[4]#
A[5]#
A[6]#
A[7]#
A[8]#
A[9]#
A[10]#
A[11]#
A[12]#
A[13]#
A[14]#
A[15]#
A[16]#
ADSTB[0]#
CONTROL
H_ADSTB#0
(8)
(8)
(8)
(8)
(8)
(8)
J4
L5
L4
K5
M3
N2
J1
N3
P5
P2
L2
P4
P1
R1
M1
ADDR GROUP_0
(8)
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_ADSTB#0
XDP/ITP SIGNALS
H_A#[3..16]
RESERVED
(8)
+VCCP
CONN@
JCPUA
2 @ 1K_0402_5%
R43
R469
10K_0402_5%
40mil
JP13
+VCC_FAN1
1
2
3
(36) FAN_SPEED1
C596
1000P_0402_50V7K
4
5
2009/04/23
Issued Date
Deciphered Date
2010/05
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
GND
GND
A
E&T_3801-F03N-01R
Security Classification
1
2
3
Title
Size
B
Date:
Document Number
Rev
1.0
KIWAX_LA-5081P
Tuesday, April 28, 2009
Sheet
1
of
51
+CPU_CORE
+CPU_CORE
CONN@
JCPUC
R45
R46
H_DSTBN#1
H_DSTBP#1
H_DINV#1
2 @ 1K_0402_5%
2 @ 1K_0402_5%
T16
T15
T14
T17
T10
1
1
(22) CPU_BSEL0
(22) CPU_BSEL1
(22) CPU_BSEL2
D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#
+CPU_GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
TEST7
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
AD26
C23
D25
C24
AF26
AF1
A26
C3
B22
B23
C21
GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
TEST7
BSEL[0]
BSEL[1]
BSEL[2]
Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_DSTBN#2
H_DSTBP#2
H_DINV#2
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
DSTBN[3]#
DSTBP[3]#
DINV[3]#
AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_DSTBN#3
H_DSTBP#3
H_DINV#3
COMP[0]
COMP[1]
COMP[2]
COMP[3]
R26
U26
AA1
Y1
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
E5
B5
D24
D6
D7
AE6
MISC
COMP0
COMP1
COMP2
COMP3
A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18
(8)
H_DSTBN#2 (8)
H_DSTBP#2 (8)
H_DINV#2 (8)
H_D#[48..63] (8)
H_DSTBN#3 (8)
H_DSTBP#3 (8)
H_DINV#3 (8)
R63 1
R64 1
R10 1
R9 1
2
2
2
2
27.4_0402_1%
54.9_0402_1%
27.4_0402_1%
54.9_0402_1%
H_DPRSTP#_R
H_DPSLP#
H_DPW R#
H_PW RGOOD
H_CPUSLP#
H_PSI#
H_DPSLP# (27)
H_DPW R# (8)
H_PW RGOOD (27)
H_CPUSLP# (8)
H_PSI#
(49)
R1089
2
H_DPRSTP#_R
0.01U_0402_16V7K
1CPU_BSEL1
C1164
C1163
1CPU_BSEL0
(8) H_DPRSTP#_R
2
@
0_0402_5%
H_DPRSTP#
1
H_DPRSTP# (27,49)
1CPU_BSEL2
C1165
0.01U_0402_16V7K
0.01U_0402_16V7K
Penryn
Width=4 mil ,
Spacing: 15mil
(55Ohm)
C1162
68P_0402_50V8J
VCC[001]
VCC[002]
VCC[003]
VCC[004]
VCC[005]
VCC[006]
VCC[007]
VCC[008]
VCC[009]
VCC[010]
VCC[011]
VCC[012]
VCC[013]
VCC[014]
VCC[015]
VCC[016]
VCC[017]
VCC[018]
VCC[019]
VCC[020]
VCC[021]
VCC[022]
VCC[023]
VCC[024]
VCC[025]
VCC[026]
VCC[027]
VCC[028]
VCC[029]
VCC[030]
VCC[031]
VCC[032]
VCC[033]
VCC[034]
VCC[035]
VCC[036]
VCC[037]
VCC[038]
VCC[039]
VCC[040]
VCC[041]
VCC[042]
VCC[043]
VCC[044]
VCC[045]
VCC[046]
VCC[047]
VCC[048]
VCC[049]
VCC[050]
VCC[051]
VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]
VCC[066]
VCC[067]
VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]
G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
VCCA[01]
VCCA[02]
B26
C26
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
AD6
AF5
AE5
AF4
AE3
AF3
AE2
VCCSENSE
AF7
VCCSENSE
VSSSENSE
AE7
VSSSENSE
0_0402_5%
1
1
0_0402_5%
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
(49)
(49)
(49)
(49)
(49)
(49)
(49)
0.01U_0402_16V7K
(8)
(8)
(8)
N22
K25
P26
R23
L23
M24
L22
M23
P25
P23
P22
T24
R24
L25
T25
N25
L26
M26
N24
DATA GRP 1
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_DSTBN#1
H_DSTBP#1
H_DINV#1
D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#
DSTBN[2]#
DSTBP[2]#
DINV[2]#
C599
H_DSTBN#0
H_DSTBP#0
H_DINV#0
H_D#[16..31]
D[0]#
D[1]#
D[2]#
D[3]#
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10]#
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#
DATA GRP 0
(8)
(8)
(8)
(8)
E22
F24
E26
G22
F23
G25
E25
E23
K24
G24
J24
J23
H22
F26
K22
H23
J26
H26
H25
DATA GRP 2
H_D#[32..47]
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_DSTBN#0
H_DSTBP#0
H_DINV#0
10U_0805_10V4Z
C598
CONN@
JCPUB
H_D#[0..15]
DATA GRP 3
(8)
+1.5VS
VCCSENSE (49)
VSSSENSE (49)
Penryn
.
layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs
BCLK
533
133
BSEL2
BSEL1
BSEL0
667
166
800
200
1067
266
FSB
+VCCP
R471
1K_0402_1%
+CPU_GTLREF
Security Classification
2009/04/23
Issued Date
Deciphered Date
2010/05
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
R23
100_0402_1%
2
VCCSENSE
R24
100_0402_1%
1
2
VSSSENSE
Layout Note:
Route VCCSENSE and VSSSENSE traces at
27.4 Ohms with 50 mil spacing.
Place PU and PD within 1 inch of CPU.
Length matched to within 25 mils.
R470
2K_0402_1%
+CPU_CORE
Size
B
Date:
Document Number
Rev
1.0
KIWAX_LA-5081P
Tuesday, April 28, 2009
Sheet
1
of
51
CONN@
JCPUD
+CPU_CORE
1
Place these capacitors on L8
(North side,Secondary Layer)
1
C13
10U_0805_6.3V6M
1
C39
10U_0805_6.3V6M
1
C36
10U_0805_6.3V6M
1
C30
10U_0805_6.3V6M
1
C27
10U_0805_6.3V6M
1
C19
10U_0805_6.3V6M
1
C14
10U_0805_6.3V6M
C12
10U_0805_6.3V6M
+CPU_CORE
1
Place these capacitors on L8
(North side,Secondary Layer)
1
C28
10U_0805_6.3V6M
1
C24
10U_0805_6.3V6M
1
C40
10U_0805_6.3V6M
1
C37
10U_0805_6.3V6M
1
C31
10U_0805_6.3V6M
1
C26
10U_0805_6.3V6M
1
C20
10U_0805_6.3V6M
C15
10U_0805_6.3V6M
+CPU_CORE
1
Place these capacitors on L8
(Sorth side,Secondary Layer)
1
C583
10U_0805_6.3V6M
1
C585
10U_0805_6.3V6M
1
C586
10U_0805_6.3V6M
1
C589
10U_0805_6.3V6M
1
C591
10U_0805_6.3V6M
1
C593
10U_0805_6.3V6M
1
C582
10U_0805_6.3V6M
C584
10U_0805_6.3V6M
+CPU_CORE
1
Place these capacitors on L8
(Sorth side,Secondary Layer)
1
C588
10U_0805_6.3V6M
1
C587
10U_0805_6.3V6M
1
C590
10U_0805_6.3V6M
1
C592
10U_0805_6.3V6M
1
C35
10U_0805_6.3V6M
1
C29
10U_0805_6.3V6M
1
C25
10U_0805_6.3V6M
C33
10U_0805_6.3V6M
Delete "REMOVE?"
1
+
1 @
+
C16
330U_D2_2.5VY_R9M
C41
330U_D2_2.5VY_R9M
+CPU_CORE
C17
330U_D2_2.5VY_R9M
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
330U_D2_2.5VY_R9M
VSS[001]
VSS[002]
VSS[003]
VSS[004]
VSS[005]
VSS[006]
VSS[007]
VSS[008]
VSS[009]
VSS[010]
VSS[011]
VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]
VSS[052]
VSS[053]
VSS[054]
VSS[055]
VSS[056]
VSS[057]
VSS[058]
VSS[059]
VSS[060]
VSS[061]
VSS[062]
VSS[063]
VSS[064]
VSS[065]
VSS[066]
VSS[067]
VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]
VSS[073]
VSS[074]
VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]
C47
A4
A8
A11
A14
A16
A19
A23
AF2
B6
B8
B11
B13
B16
B19
B21
B24
C5
C8
C11
C14
C16
C19
C2
C22
C25
D1
D4
D8
D11
D13
D16
D19
D23
D26
E3
E6
E8
E11
E14
E16
E19
E21
E24
F5
F8
F11
F13
F16
F19
F2
F22
F25
G4
G1
G23
G26
H3
H6
H21
H24
J2
J5
J22
J25
K1
K4
K23
K26
L3
L6
L21
L24
M2
M5
M22
M25
N1
N4
N23
N26
P3
1
+
+VCCP
0113
Penryn
.
C8
220U_D2_4VM
1
C11
0.1U_0402_16V4Z
1
C10
0.1U_0402_16V4Z
1
C51
0.1U_0402_16V4Z
1
C50
0.1U_0402_16V4Z
1
C48
0.1U_0402_16V4Z
C9
0.1U_0402_16V4Z
Security Classification
2009/04/23
Issued Date
Deciphered Date
2010/05
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Size
B
Date:
Document Number
Rev
1.0
KIWAX_LA-5081P
Tuesday, April 28, 2009
Sheet
1
of
51
U26B
H_AVREF
H_DVREF
GM45@
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
(6)
(6)
(6)
(6)
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
(6)
(6)
(6)
(6)
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
(5)
(5)
(5)
(5)
(5)
H_RS#0
H_RS#1
H_RS#2
(5)
(5)
(5)
(28,49)
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
CFG5
T48
T47
T45
T41
T50
T49
T39
T43
T38
T37
T46
T42
T55
T53
T54
+3VS
R206
10K_0402_5%
R217
10K_0402_5%
PLT_RST#
PM_BMBUSY#
H_DPRSTP#_R
PM_EXTTS#0
PM_EXTTS#1
PM_POK_R
PLT_RST#_R
H_THERMTRIP#
DPRSLPVR
(28) PM_BMBUSY#
(6)
H_DPRSTP#_R
(14,15) PM_EXTTS#0
PM_EXTTS#1
PM_POK_R
1
0_0402_5%
0309 add
1
@ 0_0402_5%
PLT_RST#_R
2
100_0402_5%
2
R177
2
R178
1
R103
+VCCP
Near B3 pin
SA_ODT_0
SA_ODT_1
SB_ODT_O
SB_ODT_1
SM_RCOMP
SM_RCOMP#
SM_RCOMP_VOH
SM_RCOMP_VOL
SM_VREF
SM_PWROK
SM_REXT
SM_DRAMRST#
DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
PEG_CLK
PEG_CLK#
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
PM_SYNC#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_23
NC_24
NC_25
NC_26
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3
BC28
AY28
AY36
BB36
DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_CKE2_DIMMB
DDR_CKE3_DIMMB
BA17
AY16
AV16
AR13
DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
BD17
AY17
BF15
AY13
M_ODT0
M_ODT1
M_ODT2
M_ODT3
BG22
BH21
SMRCOMP
SMRCOMP#
BF28
BH28
SMRCOMP_VOH
SMRCOMP_VOL
AV42
AR36
BF17
BC36
+DDR_MCH_REF
SM_PWROK
SM_REXT
TP_SM_DRAMRST#
B38
A38
E41
F41
CLK_MCH_DREFCLK
CLK_MCH_DREFCLK#
MCH_SSCDREFCLK
MCH_SSCDREFCLK#
F43
E43
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
AE41
AE37
AE47
AH39
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
AE40
AE38
AE48
AH40
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
AE35
AE43
AE46
AH42
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
AD35
AE44
AF46
AH43
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
B33
B32
G33
F33
E33
GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4
C34
GFX_VR_EN
T90
T89
T65
T64
T63
M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3
R497
(14)
(14)
(15)
(15)
DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_CKE2_DIMMB
DDR_CKE3_DIMMB
(14)
(14)
(15)
(15)
DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
(14)
(14)
(15)
(15)
M_ODT0
M_ODT1
M_ODT2
M_ODT3
PAD
PAD
PAD
PAD
PAD
(14)
(14)
(15)
(15)
(14)
(14)
(15)
(15)
+1.5V
20mil
For Crestline: 20ohm
For Calero: 80.6ohm
For Cantiga: 80.6ohm
2 80.6_0402_1%
R483 1
2 0_0402_5%
1.5V_PGOOD
(47)
Delete "DDR3_SM_PWROK"
R148 1 @
1
SM_DRAMRST#
R125
80.6_0402_1%
0113
2 10K_0402_5%
2
R111
499_0402_1%
(14,15)
DDR3
CLK_MCH_DREFCLK
(22)
CLK_MCH_DREFCLK#
(22)
MCH_SSCDREFCLK
(22)
MCH_SSCDREFCLK#
(22)
CLK_MCH_3GPLL (22)
CLK_MCH_3GPLL# (22)
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
(28)
(28)
(28)
(28)
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
(28)
(28)
(28)
(28)
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
(28)
(28)
(28)
(28)
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
(28)
(28)
(28)
(28)
MCH_HDA_BCLK
T91
+VCCP
CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF
CL_CLK0
CL_DATA0
R143
CL_CLK0
(28)
CL_DATA0 (28)
M_PWROK (28)
CL_RST# (28)
CL_RST#
CL_VREF
1K_0402_1%
0.1U_0402_16V4Z
N28
M28
G36
E36
K36
H36
DDPC_CTRLCLK
DDPC_CTRLDATA
SDVO_CTRLCLK
SDVO_CTRLDATA
CLKREQ#
ICH_SYNC#
HDMICLK_NB
HDMIDAT_NB
MCH_CLKREQ#
MCH_ICH_SYNC#
B12
TSATN#
T52
T51
B28
B30
B29
C29
A28
HDA_BCLK
HDA_RST#
HDA_SDI
HDA_SDO
HDA_SYNC
MCH_HDA_BCLK
MCH_HDA_RST#
MCH_HDA_SDIN
MCH_HDA_SDOUT
MCH_HDA_SYNC
2
56_0402_5%
R80
R82
R79
R85
R81
R147
499_0402_1%
C238
HDMICLK_NB (23)
HDMIDAT_NB (23)
MCH_CLKREQ# (22)
MCH_ICH_SYNC#
(28)
R105
TSATN# (36)
+VCCP
GM_HDMI@
GM_HDMI@
GM_HDMI@
GM_HDMI@
GM_HDMI@
1
1
1
1
1
2
2
2
2
2
33_0402_5%
0_0402_5%
33_0402_5%
0_0402_5%
0_0402_5%
HDA_BITCLK_CODEC
HDA_RST_CODEC#
HDA_SDIN0 (27)
HDA_SDOUT_CODEC
HDA_SYNC_CODEC
(16,27,34)
(16,27,34)
(16,27,34)
(16,27,34)
0113
CANTIGA ES_FCBGA1329
GM45@
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
AR24
AR21
AU24
AV20
M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3
COMPENSATION
SA_CS#_0
SA_CS#_1
SB_CS#_0
SB_CS#_1
M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3
R162
1
10K_0402_5%
2
+DDR_MCH_REF
+DDR_MCH_REF
R185
10K_0402_5%
C273
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C616
1
R482
221_0603_1%
2
1
R484
2
+1.5V
H_SWNG
100_0402_1%
C623
R89
24.9_0402_1%
2
1
1
R493
1K_0402_1%
2
1
R488
2
2K_0402_1%
Layout Note:
V_DDR_MCH_REF
trace width and
spacing is 20/20.
R29
B7
N33
P32
AT40
AT11
T20
R32
BG48
BF48
BD48
BC48
BH47
BG47
BE47
BH46
BF46
BG45
BH44
BH43
BH6
BH5
BG4
BH3
BF3
BH2
BG2
BE2
BG1
BF1
BD1
BC1
F1
A47
+VCCP
CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20
PM_EXTTS#0
PM_EXTTS#1
VGATE
T25
R25
P25
P20
P24
C25
N24
M24
E21
C23
C24
N21
P21
T21
R20
M20
L21
H21
P29
R28
T28
NC
(16,26,30,31)
RSVD22
RSVD23
RSVD24
RSVD25
CLK
MCH_CLKSEL0
MCH_CLKSEL1
MCH_CLKSEL2
(22) MCH_CLKSEL0
(22) MCH_CLKSEL1
(22) MCH_CLKSEL2
(6)
(6)
(6)
(6)
(28,36) ICH_POK
BG23
BF23
BH18
BF18
DMI
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_RCOMP
T87
T88
T34
T35
RSVD20
SA_CKE_0
SA_CKE_1
SB_CKE_0
SB_CKE_1
AP24
AT21
AV24
AU20
2
1
1K_0402_1%
SA_CK#_0
SA_CK#_1
SB_CK#_0
SB_CK#_1
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
layout note:
0.1U_0402_16V4Z
H_VREF
AY21
R500
(5,27) H_THERMTRIP#
(28,49) DPRSLPVR
Layout Note:
H_RCOMP / H_VREF / H_SWNG
trace width and spacing is 10/20
T40
RSVD15
RSVD16
RSVD17
H_ADS#
(5)
H_ADSTB#0 (5)
H_ADSTB#1 (5)
H_BNR#
(5)
H_BPRI# (5)
H_BR0#
(5)
H_DEFER# (5)
H_DBSY# (5)
CLK_MCH_BCLK (22)
CLK_MCH_BCLK# (22)
H_DPWR# (6)
H_DRDY# (5)
H_HIT#
(5)
H_HITM# (5)
H_LOCK# (5)
H_TRDY# (5)
CANTIGA ES_FCBGA1329
B31
B2
M1
T56
T84
T83
1
1
C640
0.01U_0402_16V7K
H_RS#0
H_RS#1
H_RS#2
1
C636
B6
F12
C8
0.01U_0402_16V7K
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
2.2U_0603_6.3V4Z
C641
B15
K13
F13
B13
B14
2.2U_0603_6.3V4Z
C635
L9
M8
AA6
AE5
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
SMRCOMP_VOL
SA_CK_0
SA_CK_1
SB_CK_0
SB_CK_1
H_RS#_0
H_RS#_1
H_RS#_2
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
R501
3.01K_0402_1%
NA lead free
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
H_CPURST#
H_CPUSLP#
L10
M7
AA5
AE6
SMRCOMP_VOH
1K_0402_1%
M36
N36
R33
T33
AH9
AH10
AH12
AH13
K12
AL34
AK34
AN35
AM35
T24
GRAPHICS VID
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
R126
H_SWING
H_RCOMP
J8
L3
Y13
Y1
T69
T70
T58
T66
T23
T25
T27
T30
T26
T62
T61
T67
T68
T44
PM
A11
B11
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
H_ADS#
H_ADSTB#0
H_ADSTB#1
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DBSY#
CLK_MCH_BCLK
CLK_MCH_BCLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
+1.5V
ME
H_VREF
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
H12
B16
G17
A9
F11
G12
E9
B10
AH7
AH6
J11
F9
H9
E12
H11
C9
(5)
MISC
H_RESET#
H_CPUSLP#
C12
E11
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
HDA
H_RESET#
H_CPUSLP#
H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
A14
C15
F16
H13
C18
M16
J13
P16
R16
N17
M13
E17
P17
F17
G20
B19
J16
E20
H16
J20
L17
A17
B17
L16
C21
J17
H20
B18
K17
B20
F21
K21
L20
C5
E3
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35
CFG
H_SWNG
H_RCOMP
H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63
RSVD
F2
G8
F8
E6
G2
H6
H2
F6
D4
H3
M9
M11
J1
J2
N12
J6
P2
L2
R2
N9
L6
M5
J3
N2
R1
N5
N6
P13
N8
L7
N10
M3
Y3
AD14
Y6
Y10
Y12
Y14
Y7
W2
AA8
Y9
AA13
AA9
AA11
AD11
AD10
AD13
AE12
AE9
AA2
AD8
AA3
AD3
AD7
AE14
AF3
AC1
AE3
AC3
AE11
AE8
AG2
AD6
(5)
(6)
H_A#[3..35]
U26A
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_D#[0..63]
HOST
(6)
Security Classification
Issued Date
2009/04/23
Deciphered Date
2010/05
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Cantiga GMCH(1/6)-GTL
Size
C
Date:
Rev
1.0
KIWAX_LA-5081P
Tuesday, April 28, 2009
Sheet
1
of
51
(15) DDR_B_D[0..63]
GM45@
BD21
BG18
AT25
DDR_A_BS#0
DDR_A_BS#1
DDR_A_BS#2
SA_RAS#
SA_CAS#
SA_WE#
BB20
BD20
AY20
DDR_A_RAS#
DDR_A_CAS#
DDR_A_W E#
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
AM37
AT41
AY41
AU39
BB12
AY6
AT7
AJ5
DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
AJ44
AT44
BA43
BC37
AW12
BC8
AU8
AM7
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
AJ43
AT43
BA44
BD37
AY12
BD8
AU9
AM8
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14
BA21
BC24
BG24
BH24
BG25
BA24
BD24
BG27
BF25
AW24
BC21
BG26
BH26
BH17
AY25
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_BS#0 (14)
DDR_A_BS#1 (14)
DDR_A_BS#2 (14)
DDR_A_RAS# (14)
DDR_A_CAS# (14)
DDR_A_W E# (14)
SYSTEM
MEMORY
DDR_A_DM[0..7]
(14)
DDR_A_DQS[0..7]
DDR_A_DQS#[0..7]
DDR_A_MA[0..14]
(14)
(14)
(14)
U26E
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
AK47
AH46
AP47
AP46
AJ46
AJ48
AM48
AP48
AU47
AU46
BA48
AY48
AT47
AR47
BA47
BC47
BC46
BC44
BG43
BF43
BE45
BC41
BF40
BF41
BG38
BF38
BH35
BG35
BH40
BG39
BG34
BH34
BH14
BG12
BH11
BG8
BH12
BF11
BF8
BG7
BC5
BC6
AY3
AY1
BF6
BF5
BA1
BD3
AV2
AU3
AR3
AN2
AY2
AV1
AP3
AR1
AL1
AL2
AJ1
AH1
AM2
AM3
AH3
AJ3
SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63
SB_BS_0
SB_BS_1
SB_BS_2
BC16
BB17
BB33
DDR_B_BS#0
DDR_B_BS#1
DDR_B_BS#2
SB_RAS#
SB_CAS#
SB_WE#
AU17
BG16
BF14
DDR_B_RAS#
DDR_B_CAS#
DDR_B_W E#
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
AM47
AY47
BD40
BF35
BG11
BA3
AP1
AK2
DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
AL47
AV48
BG41
BG37
BH9
BB2
AU1
AN6
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
AL46
AV47
BH41
BH37
BG9
BC2
AT2
AN5
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14
AV17
BA25
BC25
AU25
AW25
BB28
AU28
AW28
AT33
BD33
BB16
AW33
AY33
BH15
AU33
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
SA_BS_0
SA_BS_1
SA_BS_2
MEMORY
SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63
DDR
AJ38
AJ41
AN38
AM38
AJ36
AJ40
AM44
AM42
AN43
AN44
AU40
AT38
AN41
AN39
AU44
AU42
AV39
AY44
BA40
BD43
AV41
AY43
BB41
BC40
AY37
BD38
AV37
AT36
AY38
BB38
AV36
AW36
BD13
AU11
BC11
BA12
AU13
AV13
BD12
BC12
BB9
BA9
AU10
AV9
BA11
BD9
AY8
BA6
AV5
AV7
AT9
AN8
AU5
AU6
AT5
AN10
AM11
AM5
AJ9
AJ8
AN12
AM13
AJ11
AJ12
SYSTEM
U26D
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
DDR
(14) DDR_A_D[0..63]
GM45@
CANTIGA ES_FCBGA1329
DDR_B_BS#0 (15)
DDR_B_BS#1 (15)
DDR_B_BS#2 (15)
DDR_B_RAS# (15)
DDR_B_CAS# (15)
DDR_B_W E# (15)
DDR_B_DM[0..7]
(15)
DDR_B_DQS[0..7]
(15)
DDR_B_DQS#[0..7]
DDR_B_MA[0..14]
(15)
(15)
CANTIGA ES_FCBGA1329
Security Classification
2009/04/23
Issued Date
Deciphered Date
2010/05
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Size
B
Date:
Document Number
Rev
1.0
KIWAX_LA-5081P
Tuesday, April 28, 2009
Sheet
1
of
51
+3VS
1 GM@
1
GM@
2 2.2K_0402_5%
2 2.2K_0402_5%
LVDS_SCL
LVDS_SDA
PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]
PCIE_GTX_C_MRX_N[0..15]
PCIE_MTX_C_GRX_N[0..15]
(16)
PCIE_MTX_C_GRX_P[0..15]
(16)
PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_P[0..15]
(16)
CFG[4:3]
Reserved
0 = DMI x 2
1 = DMI x 4
0 = The iTPM Host Interface is enable
CFG6
U26C
1
R167
(24) LVDS_ACLK#
(24) LVDS_ACLK
(24) LVDS_A0#
(24) LVDS_A1#
(24) LVDS_A2#
R121
R122
PM@
LVDS_ACLK#
LVDS_ACLK
C41
C40
B37
A37
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK
LVDS_A0#
LVDS_A1#
LVDS_A2#
T93
H47
E46
G40
A40
LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
LVDSA_DATA#_3
T94
H48
D45
F40
B40
LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2
LVDSA_DATA_3
T72
A41
H38
G37
J37
LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
LVDSB_DATA#_3
T73
B42
G38
F37
K37
R127
PM@
0_0402_5%
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDS_A0
LVDS_A1
LVDS_A2
(24) LVDS_A0
(24) LVDS_A1
(24) LVDS_A2
C44
B43
E37
E38
2
2.37K_0402_1%
PM@
0_0402_5%
PEG_COMPI
PEG_COMPO
LVDS
L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA
L_VDD_EN
T1
GMCH_ENBKL
2 10K_0402_5%
2 10K_0402_5%
GRAPHICS
(24) LVDS_SCL
(24) LVDS_SDA
(24) GM_ENVDD
For Cantiga:2.37kohm
For Crestline:2.4kohm
For Calero: 1.5Kohm
L32
G32
M32
M33
K33
J33
M29
R213 1
R159 1
LVDS_SCL
LVDS_SDA
GM_ENVDD
LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2
LVDSB_DATA_3
0_0402_5%
GM@
2
75_0402_5%
TVA_DAC
R121
GM@ 1
75_0402_5%
TVB_DAC
R122
75_0402_5%
TVC_DAC
GM@
R132
R123
TVA_DAC
TVB_DAC
TVC_DAC
F25
H25
K25
TVA_DAC
TVB_DAC
TVC_DAC
H24
TV_RTN
C31
E32
TV_DCONSEL_0
TV_DCONSEL_1
GMCH_CRT_B
E28
CRT_BLUE
GMCH_CRT_G
G28
CRT_GREEN
J28
CRT_RED
G29
CRT_IRTN
R124
PM@
0_0402_5%
PM@
PM@
0_0402_5%
0_0402_5%
GMCH_CRT_R
(25) GMCH_CRT_B
150_0402_1%
GMCH_CRT_G
2
(25) GMCH_CRT_G
150_0402_1%
GMCH_CRT_B
2
(25) GMCH_CRT_R
150_0402_1%
2
GMCH_CRT_CLK H32
GMCH_CRT_DATA J32
J29
E29
(25) GMCH_CRT_CLK
(25) GMCH_CRT_DATA
(25) GMCH_CRT_HSYNC
R203
GMCH_CRT_R
GM@ 33_0402_1%
20mil
(25) GMCH_CRT_VSYNC
L29
GM@ 33_0402_1%
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC
T37
T36
PEGCOMP
+VCC_PEG
49.9_0402_1%
R1631
2
PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15
H44
J46
L44
L40
N41
P48
N44
T43
U43
Y43
Y48
Y36
AA43
AD37
AC47
AD39
PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_N15
PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15
H43
J44
L43
L41
N40
P47
N43
T42
U42
Y42
W47
Y37
AA42
AD36
AC48
AD40
PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_P15
PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15
J41
M46
M47
M40
M42
R48
N38
T40
U37
U40
Y40
AA46
AA37
AA40
AD43
AC46
PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_N15
C277
C303
C317
C315
C325
C343
C358
C349
C368
C354
C371
C356
C372
C364
C375
C348
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_N15
PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15
J42
L46
M48
M39
M43
R47
N37
T39
U36
U39
Y39
Y46
AA36
AA39
AD42
AD46
PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_P15
C271
C296
C314
C311
C322
C336
C352
C344
C363
C346
C366
C351
C367
C359
C373
C347
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_P15
CFG8
Reserved
CFG9
0 = Enable
1 = Disable
CFG11
Reserved
CFG[13:12] (XOR/ALLZ)
00
01
10
11
CFG[15:14]
Reserved
0 = Disabled
= Reserved
= XOR Mode Enabled
= All Z Mode Enabled
= Normal Operation (Default)
1 = Enabled
CFG[18:17]
Reserved
0 = Normal Operation
(Lane number in Order)
1 = Reverse Lane
CFG20 (PCIE/SDVO concurrent)
R204
VGA
1 GM@
R132
1 GM@
R124
1 GM@
R123
TV
R127
PCI-EXPRESS
(24) GMCH_ENBKL
+3VS
PCIE_GTX_C_MRX_P[0..15] (16)
R140
0_0402_5%
PM@
R138
2
R139
0_0402_5%
PM@
GM@
For Cantiga:1.02kohm
For Crestline:1.3kohm
For Calero: 255ohm
CANTIGA ES_FCBGA1329
GM45@
1.02K_0402_1%
R138
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_P0
PCIE_MTX_GRX_N0
C670
C674
C669
C673
C662
C663
C658
C661
1
1
1
1
1
1
1
1
PM@
PCIE_GTX_C_MRX_P3
R640 1
GM@
2
2
2
2
2
2
2
2
GM_HDMI@
0.1U_0402_10V7K
GM_HDMI@
0.1U_0402_10V7K
GM_HDMI@
0.1U_0402_10V7K
GM_HDMI@
0.1U_0402_10V7K
GM_HDMI@
0.1U_0402_10V7K
GM_HDMI@
0.1U_0402_10V7K
GM_HDMI@
0.1U_0402_10V7K
GM_HDMI@
0.1U_0402_10V7K
2 0_0402_5%
TMDS_B_CLK (23)
TMDS_B_CLK# (23)
TMDS_B_DATA0 (23)
TMDS_B_DATA0# (23)
TMDS_B_DATA1 (23)
TMDS_B_DATA1# (23)
TMDS_B_DATA2 (23)
TMDS_B_DATA2# (23)
TMDS_B_HPD# (23)
0_0402_5%
Security Classification
2009/04/23
Issued Date
Deciphered Date
2010/05
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Rev
1.0
KIWAX_LA-5081P
Sheet
10
of
51
+3VS_DAC_CRT
AA48
1
M25
VCCD_TVDAC
+1.5VS_QDAC
L28
VCCD_QDAC
+1.05VS_HPLL
AF1
+1.05VS_PEGPLL
AA47
C265
C136
C747
CRT
VTT
A SM
AXF
VCC_TX_LVDS
K47
C608
+3VS_HV
PEG
VCC_HV_1
VCC_HV_2
VCC_HV_3
VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
VCC_PEG_5
C35
B35
A35
V48
U48
V47
U47
U46
+VCC_PEG
AH48
AF48
AH47
AG47
+VCC_DMI
0.1U_0402_16V4Z
DMI
VCC_DMI_1
VCC_DMI_2
VCC_DMI_3
VCC_DMI_4
C603
C299
GM@
2.2U_0603_6.3V4Z
<BOM Structure>
0_0402_5%
GM@
2
1
0_0603_5%
GM@
+1.8VS
+1.8V_TXLVDS: 118.8mA
(22UF*1, 1000PF*1)
GM@
PM@
+1.5VS_PEG_PLL: 50mA
+1.05VS_PEGPLL
VCC_DMI: 456mA
(0.1UF*1)
(0.1UF*1)
L1
BLM18PG121SN1D_0603
2
1
+VCCP
+VCCP
+VCC_PEG
1
1
C355
2.2U_0603_6.3V4Z
<BOM Structure>
0316 add
20mils
+VCCP
VTTLF1
VTTLF2
VTTLF3
+VCC_DMI
A8
L1
AB2
+VCCP_D
CANTIGA ES_FCBGA1329
U26
D1
+VCCP
@
R158 @
1
2
1
10_0402_5%
CH751H-40PT_SOD323-2
R157
2
1
0_0402_5%
+3VS_HV
+3VS
C795
10U_0805_10V4Z
C353
VCCD_QDAC: 48.363mA
(0.1UF*1, 0.01UF*1)
VCCD_TVDAC: 58.696mA
(0.1UF*1, 0.01UF*1)
R208
1000P_0402_50V7K
10U_0805_10V4Z
GL40@
40 mils
+VCCP
C337
GL40
1.05VS_MPLL: 139.2mA
(22UF*1, 0.1UF*1)
1U_0603_10V4Z
GM45@
U26
+1.5VS_QDAC
+1.8V_TXLVDS
C299
+1.8V_TXLVDS
0.47U_0402_6.3V6K
C618
VCCD_LVDS_1
VCCD_LVDS_2
R473
0.47U_0402_6.3V6K
C611
+1.8V_LVDS
VCCD_PEG_PLL
+1.05VS_MPLL
2
1
MBK2012121YZF_0805
0.47U_0402_6.3V6K
C94
M38
L37
VCCD_HPLL
D TV/CRT
PM@
+1.5VS_TVDAC
+1.5V_SM_CK
TV
VCC_HDA
HDA
A32
LVDS
1
2
VCCA_TV_DAC_1
VCCA_TV_DAC_2
BF21
BH20
BG20
BF20
C323
0_0402_5%
10U_0805_10V4Z
B24
A24
VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4
C370
GM_HDMI@
GM@
C339
GM@ 2
PM@
220U_D2_4VM
2.2U_0603_6.3V4Z
C342
R2
0_0402_5%
PMIGM_NOHDMI@
C604
VCCA_SM_CK_1
VCCA_SM_CK_2
VCCA_SM_CK_3
VCCA_SM_CK_4
VCCA_SM_CK_5
VCCA_SM_CK_NCTF_1
VCCA_SM_CK_NCTF_2
VCCA_SM_CK_NCTF_3
VCCA_SM_CK_NCTF_4
VCCA_SM_CK_NCTF_5
VCCA_SM_CK_NCTF_6
VCCA_SM_CK_NCTF_7
VCCA_SM_CK_NCTF_8
C1
VCC_HDA: 50mA
(0.1UF*1)
GM@
0_0402_5%
0.1U_0402_16V4Z
0_0603_5%
+V1.05VS_AXF
C649
+1.5VS
10U_0805_10V4Z
B22
B21
A21
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C210
1U_0603_10V4Z
C171
0.1U_0402_16V4Z
2
GM@
+1.5VS_HDA
GM_HDMI@
R1
1
2
0.1U_0402_16V4Z
2
C181
AP28
AN28
AP25
AN25
AN24
AM28
AM26
AM25
AL25
AM24
AL24
AM23
AL23
+3VS_TVDAC
0_0603_5%
VCC_AXF_1
VCC_AXF_2
VCC_AXF_3
+1.5VS
R136
2
1
0_0603_5%
GM@
+3VS_TVDAC: 40mA
(0.1UF*1, 0.01UF*1 for
each DAC)
+3VS_TVDAC
C214
10U_0805_10V4Z
1
C211
C194
1U_0402_6.3V4Z
GM@
R117
C181
0.022U_0402_16V7K
1U_0603_10V4Z
C102
+1.5VS_TVDAC
C180
C609
R134
+1.05VS_HPLL: 24mA
R474 (4.7UF*1, 0.1UF*1)
2
1
+VCCP
MBK2012121YZF_0805
HV
2
1
0_0603_5%
+1.05VS_HPLL
0.1U_0402_16V4Z
+1.05VS_A_SM_CK
VCCA_SM_CK: 220mA
(22UF*1, 2.2UF*1, 0.1UF*1)
+3VS
4.7U_0805_10V4Z
C96
PM@
VTTLF
10U_0805_10V4Z
GM@
10U_0805_10V4Z
C605
220U_D2_4VY_R15M
@
C87
+1.5V
R496
1
2
0_0805_5%
0_0402_5%
POWER
VCCA_SM_1
VCCA_SM_2
VCCA_SM_3
VCCA_SM_4
VCCA_SM_5
VCCA_SM_6
VCCA_SM_7
VCCA_SM_8
VCCA_SM_9
C180
1
2
0_0805_5%
AR20
AP20
AN20
AR17
AP17
AN17
AT16
AR16
AP16
C312
GM@
C198
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.05VS_A_SM
C301
R108
VCCA_SM:720mA
(22UF*2, 4.7UF*1, 1UF*1)
2
GM@
MCK3225151YZF 1210
C195
0.022U_0402_16V7K
VCCA_PEG_PLL
A PEG A LVDS
20 mils
+1.05VS_PEGPLL
PM@
+VCCP
VCCA_PEG_BG
SM CK
PM@
VSSA_LVDS
+1.5VS_PEG_BG
R166
2
1
0_0603_5%
+1.5VS
0_0402_5%
AD48
A CK
0_0402_5%
+VCCP
C628
+1.5VS_PEG_BG: 0.414mA
(0.1UF*1)
0.1U_0402_16V4Z
C206
R191
C627
C637
J47
R495
0_0603_5%
VCC_SM_CK: 119.85mA
(10UF*1, 0.1UF*1)
C310
1000P_0402_50V7K
@ C300
VCCA_LVDS
+1.5V_SM_CK
+1.05VS_DPLLB
C312
J48
1
10U_0805_10V4Z
VCCA_MPLL
+1.8V_TXLVDS
C278
C631
AE1
GM@
1U_0603_10V4Z
VCCA_HPLL
+1.05VS_MPLL
10U_0805_10V4Z
VCCA_DPLLB
AD1
2
2
GM@ GM@
0_0402_5%
+1.05VS_DPLLA
PM@
+1.05VS_DPLLB: 64.8mA
(470UF*1, 0.1UF*1)
0.1U_0402_16V4Z
L48
+1.05VS_HPLL
+VCCP
C629
VCCA_DPLLA
+1.05VS_DPLLB
+VCCP
+V1.05VS_AXF
MCK3225151YZF 1210
10U_0805_10V4Z
F47
+1.05VS_DPLLA
GM@
R151
C275
VSSA_DAC_BG
4.7U_0805_10V4Z
GM@
C639
B25
10U_0805_10V4Z
1
C637
0.1U_0402_16V4Z
GM@
0.022U_0402_16V7K
C638
10U_0805_10V4Z
+3VS_DAC_BG
1R115
0_0603_5%
GM@
VCCA_DAC_BG
C278
A25
U13
T13
U12
T12
U11
T11
U10
T10
U9
T9
U8
T8
U7
T7
U6
T6
U5
T5
V3
U3
V2
U2
T2
V1
U1
0.1U_0402_16V4Z
+3VS
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25
VCCA_CRT_DAC_1
VCCA_CRT_DAC_2
220U_D2_4VM
B27
A26
+3VS_DAC_CRT
C126
+1.05VS_DPLLA
4.7U_0805_10V4Z
GM@
U26H
0.47U_0402_6.3V6K
10U_0805_10V4Z
VCC_AXF: 321.35mA
(10UF*1, 1UF*1)
+VCCP
C644
0.022U_0402_16V7K
C213
1
C206
GM@
0.1U_0402_16V4Z
R120
1
2
0_0603_5%
GM@
PLL
+3VS
R202
2
1
0_0805_5%
0316 add
PM
PM@
1.8V_LVDS: 60.311111mA
(1UF*1)
+1.8V_LVDS
R142
GM@
C208
R137
GM@
C237
1U_0603_10V4Z
+1.5VS
C226
10U_0805_10V4Z
2
1
0_0603_5%
C221
10U_0805_10V4Z
C207
GM@
0.1U_0402_16V4Z
C208
1U_0402_6.3V4Z
2
1
0_0603_5%
GM@
+1.8VS
2 GM@
C237
0.01U_0402_16V7K
0_0603_5%
PM@
Security Classification
PM@
Issued Date
2009/04/23
Deciphered Date
2010/05
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Rev
1.0
KIWAX_LA-5081P
Sheet
1
11
of
51
U26F
+VCCP
NCTF
VCC
BA36
BB24
BD16
BB21
AW16
AW13
AT13
+AXG_CORE
J4
1
@
2
JUMP_43X118
+AXG_CORE
GM@
C149
1U_0603_10V4Z
GM@
C84
10U_0805_10V4Z
0.1U_0402_16V4Z
GM@ 1
C104
GM@ 1
C157
GM@ 1
C167
220U_D2_4VM_R15
10U_0805_10V4Z
C157
PM@
GFX NCTF
Y26
AE25
AB25
AA25
AE24
AC24
AA24
Y24
AE23
AC23
AB23
AA23
AJ21
AG21
AE21
AC21
AA21
Y21
AH20
AF20
AE20
AC20
AB20
AA20
T17
T16
AM15
AL15
AE15
AJ15
AH15
AG15
AF15
AB15
AA15
Y15
V15
U15
AN14
AM14
U14
T14
VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
VCC_AXG_35
VCC_AXG_36
VCC_AXG_37
VCC_AXG_38
VCC_AXG_39
VCC_AXG_40
VCC_AXG_41
VCC_AXG_42
AJ14
AH14
VCC_AXG_SENSE
VSS_AXG_SENSE
CANTIGA ES_FCBGA1329
C297 1U_0402_6.3V4Z
C243 1U_0402_6.3V4Z
Title
C264 0.47U_0402_6.3V6K
GM@
PM@
C159 0.22U_0402_10V4Z
0_0603_5%
C101 0.22U_0402_10V4Z
2010/05
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
GM@
C99
AV44 VCCSM_LF1
BA37 VCCSM_LF2
AM40 VCCSM_LF3
AV21 VCCSM_LF4
AY5 VCCSM_LF5
AM10 VCCSM_LF6
BB13 VCCSM_LF7
1
1 C99
0.22U_0402_10V4Z
2009/04/23
GM@
C114 0.1U_0402_16V4Z
VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7
CANTIGA ES_FCBGA1329
GM45@
Issued Date
1 C129
Security Classification
4.7U_0603_6.3V6K
1 C197
C121 0.1U_0402_16V4Z
T32
T31
Check : power
0.1U_0402_16V4Z
GFX
0_0805_5%
VCC_SM_36/NC
VCC_SM_37/NC
VCC_SM_38/NC
VCC_SM_39/NC
VCC_SM_40/NC
VCC_SM_41/NC
VCC_SM_42/NC
W28
V28
W26
V26
W25
V25
W24
V24
W23
V23
AM21
AL21
AK21
W21
V21
U21
AM20
AK20
W20
U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
AA19
Y19
W19
V19
U19
AM17
AK17
AH17
AG17
AF17
AE17
AC17
AB17
Y17
W17
V17
AM16
AL16
AK16
AJ16
AH16
AG16
AF16
AE16
AC16
AB16
AA16
Y16
W16
V16
U16
VCC
VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
VCC_NCTF_4
VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8
VCC_NCTF_9
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31
VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_NCTF_43
VCC_NCTF_44
AM32
AL32
AK32
AJ32
AH32
AG32
AE32
AC32
AA32
Y32
W32
U32
AM30
AL30
AK30
AH30
AG30
AF30
AE30
AC30
AB30
AA30
Y30
W30
V30
U30
AL29
AK29
AJ29
AH29
AG29
AE29
AC29
AA29
Y29
W29
V29
AL28
AK28
AL26
AK26
AK25
AK24
AK23
VCC
+VCCP
GM45@
POWER
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
SM
AE33
AC33
AA33
Y33
W33
V33
U33
AH28
AF28
AC28
AA28
AJ26
AG26
AE26
AC26
AH25
AG25
AF25
AG24
AJ23
AH23
AF23
T32
C645
VCC CORE
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
C220
0.1U_0402_16V4Z
C175
0.22U_0402_10V4Z
C193
0.22U_0402_10V4Z
C178
10U_0805_10V4Z
AG34
AC34
AB34
AA34
Y34
V34
U34
AM33
AK33
AJ33
AG33
AF33
0.01U_0402_16V7K
U26G
D
10U_0805_10V4Z
C643
220U_D2_4VM_R15
C177
+VCCP
VCC_AXG_NTCF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8
VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60
VCC SM LF
+1.5V
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC
AP33
AN33
BH32
BG32
BF32
BD32
BC32
BB32
BA32
AY32
AW32
AV32
AU32
AT32
AR32
AP32
AN32
BH31
BG31
BF31
BG30
BH29
BG29
BF29
BD29
BC29
BB29
BA29
AY29
AW29
AV29
AU29
AT29
AR29
AP29
POWER
1782mA
+AXG_CORE
Rev
1.0
KIWAX_LA-5081P
Sheet
12
of
51
GM45@
VSS
AM36
AE36
P36
L36
J36
F36
B36
AH35
AA35
Y35
U35
T35
BF34
AM34
AJ34
AF34
AE34
W34
B34
A34
BG33
BC33
BA33
AV33
AR33
AL33
AH33
AB33
P33
L33
H33
N32
K32
F32
C32
A31
AN29
T29
N29
K29
H29
F29
A29
BG28
BD28
BA28
AV28
AT28
AR28
AJ28
AG28
AE28
AB28
Y28
P28
K28
H28
F28
C28
BF26
AH26
AF26
AB26
AA26
C26
B26
BH25
BD25
BB25
AV25
AR25
AJ25
AC25
Y25
N25
L25
J25
G25
E25
BF24
AD12
AY24
AT24
AJ24
AH24
AF24
AB24
R24
L24
K24
J24
G24
F24
E24
BH23
AG23
Y23
B23
A23
AJ6
BG21
L12
AW21
AU21
AP21
AN21
AH21
AF21
AB21
R21
M21
J21
G21
BC20
BA20
AW20
AT20
AJ20
AG20
Y20
N20
K20
F20
C20
A20
BG19
A18
BG17
BC17
AW17
AT17
R17
M17
H17
C17
BA16
AU16
AN16
N16
K16
G16
E16
BG15
AC15
W15
A15
BG14
AA14
C14
BG13
BC13
BA13
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS
VSS_235
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
AN13
AJ13
AE13
N13
L13
G13
E13
BF12
AV12
AT12
AM12
AA12
J12
A12
BD11
BB11
AY11
AN11
AH11
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273
Y11
N11
G11
C11
BG10
AV10
AT10
AJ10
AE10
AA10
M10
BF9
BC9
AN9
AM9
AD9
G9
B9
BH8
BB8
AV8
AT8
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
AH8
Y8
L8
E8
B8
AY7
AU7
AN7
AJ7
AE7
AA7
N7
J7
BG6
BD6
AV6
AT6
AM6
M6
C6
BA5
AH5
AD5
Y5
L5
J5
H5
F5
BE4
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
BC3
AV3
AL3
R3
P3
F3
BA2
AW2
AU2
AR2
AP2
AJ2
AH2
AF2
AE2
AD2
AC2
Y2
M2
K2
AM1
AA1
P1
H1
VSS_351
VSS_352
VSS_353
VSS_354
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS NCTF
U26J
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_SCB_1
VSS_SCB_2
VSS_SCB_3
VSS_SCB_4
VSS_SCB_5
VSS SCB
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
NC
U26I
AU48
AR48
AL48
BB47
AW47
AN47
AJ47
AF47
AD47
AB47
Y47
T47
N47
L47
G47
BD46
BA46
AY46
AV46
AR46
AM46
V46
R46
P46
H46
F46
BF44
AH44
AD44
AA44
Y44
U44
T44
M44
F44
BC43
AV43
AU43
AM43
J43
C43
BG42
AY42
AT42
AN42
AJ42
AE42
N42
L42
BD41
AU41
AM41
AH41
AD41
AA41
Y41
U41
T41
M41
G41
B41
BG40
BB40
AV40
AN40
H40
E40
AT39
AM39
AJ39
AE39
N39
L39
B39
BH38
BC38
BA38
AU38
AH38
AD38
AA38
Y38
U38
T38
J38
F38
C38
BF37
BB37
AW37
AT37
AN37
AJ37
H37
C37
BG36
BD36
AK15
AU36
CANTIGA ES_FCBGA1329
NC_26
NC_27
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_39
NC_40
NC_41
NC_42
U24
U28
U25
U29
AF32
AB32
V32
AJ30
AM29
AF29
AB29
U26
U23
AL20
V20
AC19
AL17
AJ17
AA17
U17
BH48
BH1
A48
C1
A3
E1
D2
C3
B4
A5
A6
A43
A44
B45
C46
D47
B47
A46
F48
E48
C48
B48
CANTIGA ES_FCBGA1329
GM45@
A
Security Classification
2009/04/23
Issued Date
Deciphered Date
2010/05
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Rev
1.0
KIWAX_LA-5081P
Sheet
1
13
of
51
+1.5V
+V_DDR3_DIMM_REF
(9) DDR_A_DQS#[0..7]
JP17
(9) DDR_A_D[0..63]
+1.5V
(9) DDR_A_DM[0..7]
DDR_A_D0
DDR_A_D1
(9) DDR_A_DQS[0..7]
DDR_A_DM0
R625
100_0402_1%
<BOM Structure>+V_DDR3_DIMM_REF
DDR_A_D2
DDR_A_D3
(9) DDR_A_MA[0..14]
DDR_A_D8
DDR_A_D9
R626
DDR_A_DQS#1
DDR_A_DQS1
100_0402_1%
<BOM
Structure>
2
C755
0.1U_0402_16V4Z
DDR_A_D10
DDR_A_D11
DDR_A_D16
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D18
DDR_A_D19
DDR_A_D24
DDR_A_D25
DDR_A_DM3
DDR_A_D26
DDR_A_D27
Layout Note:
Place near JP4
DDR_CKE0_DIMMA
(8) DDR_CKE0_DIMMA
DDR_A_BS2
(9) DDR_A_BS#2
DDR_A_MA12
DDR_A_MA9
C765
C764
C763
C767
DDR_A_MA3
DDR_A_MA1
1
1
C753
C749
0.1U_0402_16V4Z
C752
0.1U_0402_16V4Z
C750
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
C768
DDR_A_MA8
DDR_A_MA5
10U_0805_6.3V6M
10U_0805_6.3V6M
C766
+1.5V
+
2
C787
470U_D2_2.5VM_R15
@
M_CLK_DDR0
M_CLK_DDR#0
(8) M_CLK_DDR0
(8) M_CLK_DDR#0
DDR_A_MA10
DDR_A_BS0
(9) DDR_A_BS#0
DDR_A_WE#
DDR_A_CAS#
(9) DDR_A_WE#
(9) DDR_A_CAS#
DDR_A_MA13
DDR_CS1_DIMMA#
(8) DDR_CS1_DIMMA#
DDR_A_D32
DDR_A_D33
Layout Note:
Place near JP4.203 & JP4.204
DDR_A_DM5
1
DDR_A_D42
DDR_A_D43
C762
C777
10U_0805_6.3V6M
1U_0603_10V4Z
C776
1U_0603_10V4Z
C779
1U_0603_10V4Z
C778
1U_0603_10V4Z
DDR_A_D48
DDR_A_D49
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51
DDR_A_D56
DDR_A_D57
DDR_A_DM7
DDR_A_D58
DDR_A_D59
1 R627
2
10K_0402_5%
1
C754
Security Classification
R628
10K_0402_5%
2
1
C784
0.1U_0402_16V4Z
2.2U_0603_6.3V4Z
+3VS
205
G1
CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
G2
206
DDR_A_D4
DDR_A_D5
DDR_A_DQS#0
DDR_A_DQS0
DDR_A_D6
DDR_A_D7
D
DDR_A_D12
DDR_A_D13
DDR_A_DM1
SM_DRAMRST#
DDR_A_D20
DDR_A_D21
DDR_A_DM2
DDR_A_D22
DDR_A_D23
DDR_A_D28
DDR_A_D29
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31
DDR_CKE1_DIMMA
DDR_CKE1_DIMMA (8)
C
DDR_A_MA14
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
M_CLK_DDR1
M_CLK_DDR#1
DDR_A_BS1
DDR_A_RAS#
DDR_CS0_DIMMA#
M_ODT0
M_ODT1
M_CLK_DDR1 (8)
M_CLK_DDR#1 (8)
DDR_A_BS#1 (9)
DDR_A_RAS# (9)
DDR_CS0_DIMMA# (8)
M_ODT0 (8)
M_ODT1
DDR_VREF_CA_DIMMA
DDR_A_D36
DDR_A_D37
+V_DDR3_DIMM_REF
(8)
R623
1
0_0402_5%
DDR_A_DM4
DDR_A_D38
DDR_A_D39
DDR_A_D44
DDR_A_D45
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
DDR_A_DM6
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
PM_EXTTS#0
CLK_SMBDATA
CLK_SMBCLK
PM_EXTTS#0 (8,15)
CLK_SMBDATA (15,22)
CLK_SMBCLK (15,22)
+0.75VS
FOX_AS0A626-U2RN-7F
ME@
2010/05
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
SM_DRAMRST# (8,15)
DDR_A_D14
DDR_A_D15
Issued Date
CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
C751
DDR_A_D40
DDR_A_D41
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
VSS1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS#3
DQS3
VSS24
DQ30
DQ31
VSS26
C785
DDR_A_D34
DDR_A_D35
+0.75VS
VREF_DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25
0.1U_0402_16V4Z
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
2.2U_0603_6.3V4Z
DDR_A_DQS#4
DDR_A_DQS4
+1.5V
DDR3 SO-DIMM A
REVERSE
Compal Electronics, Inc.
Title
DDRIII-SODIMM SLOT1
Size Document Number
Custom
Date:
Rev
1.0
KIWAX_LA-5081P
Sheet
1
14
of
51
(9) DDR_B_DQS#[0..7]
+1.5V
+1.5V
(9) DDR_B_D[0..63]
+V_DDR3_DIMM_REF
(9) DDR_B_DM[0..7]
JP16
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
(9) DDR_B_DQS[0..7]
DDR_B_D0
DDR_B_D1
(9) DDR_B_MA[0..14]
DDR_B_DM0
DDR_B_D2
DDR_B_D3
DDR_B_D8
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D10
DDR_B_D11
DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
Layout Note:
Place near JP5
DDR_B_D18
DDR_B_D19
DDR_B_D24
DDR_B_D25
+1.5V
DDR_B_DM3
C773
C774
C769
C772
C775
1
1
C759
C760
0.1U_0402_16V4Z
C757
0.1U_0402_16V4Z
C756
0.1U_0402_16V4Z
10U_0805_6.3V6M
0.1U_0402_16V4Z
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
C771
DDR_B_D26
DDR_B_D27
+
2
C788
470U_D2_2.5VM_R15
@
DDR_CKE2_DIMMB
(8) DDR_CKE2_DIMMB
DDR_B_BS2
(9) DDR_B_BS#2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
Layout Note:
Place near JP5.203 & JP5.204
M_CLK_DDR2
M_CLK_DDR#2
(8) M_CLK_DDR2
(8) M_CLK_DDR#2
+0.75VS
(9) DDR_B_BS#0
DDR_B_WE#
DDR_B_CAS#
(9) DDR_B_WE#
(9) DDR_B_CAS#
1
DDR_B_MA13
DDR_CS3_DIMMB#
(8) DDR_CS3_DIMMB#
C770
10U_0805_6.3V6M
C782
1U_0603_10V4Z
C783
1U_0603_10V4Z
C781
1U_0603_10V4Z
C780
1U_0603_10V4Z
DDR_B_MA10
DDR_B_BS0
DDR_B_D32
DDR_B_D33
DDR_B_DM5
DDR_B_D42
DDR_B_D43
DDR_B_D48
DDR_B_D49
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D50
DDR_B_D51
DDR_B_D56
DDR_B_D57
DDR_B_DM7
DDR_B_D58
DDR_B_D59
1 R630
2
10K_0402_5%
A
0.1U_0402_16V4Z
+3VS
1
R629
10K_0402_5% 205
C761
G1
G2
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D6
DDR_B_D7
DDR_B_D12
DDR_B_D13
DDR_B_DM1
SM_DRAMRST#
SM_DRAMRST# (8,14)
DDR_B_D14
DDR_B_D15
DDR_B_D20
DDR_B_D21
DDR_B_DM2
DDR_B_D22
DDR_B_D23
DDR_B_D28
DDR_B_D29
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D30
DDR_B_D31
DDR_CKE3_DIMMB
DDR_CKE3_DIMMB (8)
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
M_CLK_DDR3
M_CLK_DDR#3
M_CLK_DDR3 (8)
M_CLK_DDR#3 (8)
DDR_B_BS1
DDR_B_RAS#
DDR_B_BS#1 (9)
DDR_B_RAS# (9)
DDR_CS2_DIMMB#
M_ODT2
DDR_CS2_DIMMB# (8)
M_ODT2 (8)
M_ODT3
M_ODT3
DDR_VREF_CA_DIMMB
R624
1
DDR_B_D36
DDR_B_D37
DDR_B_DM4
DDR_B_D38
DDR_B_D39
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53
DDR_B_DM6
DDR_B_D54
DDR_B_D55
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
PM_EXTTS#0
CLK_SMBDATA
CLK_SMBCLK
PM_EXTTS#0 (8,14)
CLK_SMBDATA (14,22)
CLK_SMBCLK (14,22)
+0.75VS
206
2010/05
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
DDR_B_DQS#5
DDR_B_DQS5
Issued Date
+V_DDR3_DIMM_REF
(8)
2 0_0402_5%
FOX_AS0A626-UARN-7F
Security Classification
DDR_B_MA14
C758
DDR_B_D40
DDR_B_D41
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
DDR_B_D4
DDR_B_D5
C786
DDR_B_D34
DDR_B_D35
CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
0.1U_0402_16V4Z
CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1
VSS1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS#3
DQS3
VSS24
DQ30
DQ31
VSS26
2.2U_0603_6.3V4Z
DDR_B_DQS#4
DDR_B_DQS4
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
VREF_DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25
Title
DDR3 SO-DIMM B
REVERSE
Compal Electronics, Inc.
DDRIII-SODIMM SLOT2
Size
Document Number
Rev
1.0
KIWAX_LA-5081P
Date:
Sheet
1
15
of
51
GPU_VID0
0.9V
1
0
1
1
1.20V
1.09V
U59A
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
PCIE_GTX_MRX_P0
PCIE_GTX_MRX_N0
PCIE_GTX_MRX_P1
PCIE_GTX_MRX_N1
PCIE_GTX_MRX_P2
PCIE_GTX_MRX_N2
PCIE_GTX_MRX_P3
PCIE_GTX_MRX_N3
PCIE_GTX_MRX_P4
PCIE_GTX_MRX_N4
PCIE_GTX_MRX_P5
PCIE_GTX_MRX_N5
PCIE_GTX_MRX_P6
PCIE_GTX_MRX_N6
PCIE_GTX_MRX_P7
PCIE_GTX_MRX_N7
PCIE_GTX_MRX_P8
PCIE_GTX_MRX_N8
PCIE_GTX_MRX_P9
PCIE_GTX_MRX_N9
PCIE_GTX_MRX_P10
PCIE_GTX_MRX_N10
PCIE_GTX_MRX_P11
PCIE_GTX_MRX_N11
PCIE_GTX_MRX_P12
PCIE_GTX_MRX_N12
PCIE_GTX_MRX_P13
PCIE_GTX_MRX_N13
PCIE_GTX_MRX_P14
PCIE_GTX_MRX_N14
PCIE_GTX_MRX_P15
PCIE_GTX_MRX_N15
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
CLK_PCIE_VGA
CLK_PCIE_VGA#
(22) CLK_PCIE_VGA
(22) CLK_PCIE_VGA#
1
2
R958 200_0402_5% @
1
2
R959 2.49K_0402_1%
PLT_RST#
(8,26,30,31) PLT_RST#
1
OSC_SPREAD
OSC_OUT
AB10
AC10
AF10
AE10
AG10
PM@
AD9
D11
E9
2
R963
22_0402_5%
XTALOUT
XTALIN
E10
D10
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT_N
PEX_TERMP
PEX_RST_N
XTAL_SSIN
XTAL_OUTBUFF
XTAL_OUT
XTAL_IN
DACA_RED
DACA_BLUE
DACA_GREEN
AE2
AD3
AE3
VGA_CRT_R
VGA_CRT_B
VGA_CRT_G
AF1
AE1
DACA_VREF
DACA_RSET
T158
R945
D6
DACB_VREF
DACB_RSET
G6
F8
DACC_HSYNC
DACC_VSYNC
U6
U4
DACC_RED
DACC_BLUE
DACC_GREEN
T5
R4
T4
DACC_VREF
DACC_RSET
R6
V6
I2CA_SCL
I2CA_SDA
I2CB_SCL
I2CB_SDA
I2CC_SCL
I2CC_SDA
I2CD_SCL
I2CD_SDA
I2CE_SCL
I2CE_SDA
I2CH_SCL
I2CH_SDA
I2CS_SCL
I2CS_SDA
R1
T3
R2
R3
A2
B1
N2
N3
Y6
W6
A3
A4
T1
T2
VGA_DDCCLK_C
VGA_DDCDATA_C
VGA_HDMI_SCL_R
VGA_HDMI_SDA_R
VGA_LVDS_SCL_C
VGA_LVDS_SDA_C
I2CD_SCL
I2CD_SDA
I2CE_SCL
I2CE_SDA
HDCP_SMB_CK1
HDCP_SMB_DAI
EC_SMB_CK2
EC_SMB_DA2
AF3
AG4
AE4
AF4
AG3
AD25
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRST_N
TESTMODE
HDA_RST_N
HDA_SDI
HDA_SDO
HDA_SYNC
HDA_BCLK
C6
A6
B6
B7
A7
55NM_HDMI@
C928
2 0.1U_0402_16V4Z
U60
8
7
6
5
HDCP_SMB_CK1
HDCP_SMB_DAI
CRT OUT
VCC
WP
SCL
SDA
1
2
3
4
A0
A1
A2
GND
AT24C16AN-10SU-2.7_SO8
55NM_HDMI@
R944
2.2K_0402_5%
@
124_0402_1%
PM@ 2.2K_0402_5%
R947 2
1
R948 2
1
PM@ 2.2K_0402_5%
VGA_LVDS_SCL_C
VGA_LVDS_SDA_C
R946
100K_0402_1% 55NM_HDMI@
Device ID
+3VS
SPDIF_IN
VGA_HDMI_SCL_R
R949
40NM@
2.2K_0402_5%
VGA_HDMI_SDA_R
R950
40NM@
2.2K_0402_5%
0_0402_5%
R951
55NM_HDMI@
VGA_HDMI_SCL
1
2
VGA_HDMI_SDA
1
2
+3VS
R952
55NM_HDMI@
0_0402_5%
R953 1
2.2K_0402_5% PM@
2
R955 1
2.2K_0402_5%
PM@
2
R956 1
2.2K_0402_5% PM@
2
R957 1
2.2K_0402_5% PM@
2
0x06E9
N10M-GE1-S
(55nm)
0x6EC
VGA_HDMI_SCL (17,23)
VGA_HDMI_SDA (17,23)
PAD T159
PAD T160
PAD T161
PAD T162
10K_0402_5%
L23
VGA_DDCCLK_C
VGA_DDCDATA_C
VGA_LVDS_SCL_C
VGA_LVDS_SDA_C
PAD T163
+VGASENSE
1
2
R964 55NM@ 0_0402_5%
1
1
1
1
1
PM@
MBK1608121YZF_0603
2
2
MBK1608121YZF_0603
MBK1608121YZF_0603
2
2
MBK1608121YZF_0603
1
1
L24
1
2
1R960 PM@
2
R961 PM@ 10K_0402_5%
VGA_HDA_RST_CODEC# R965
HDA_SDIN1_R
R968
VGA_HDA_SDOUT_CODECR969
VGA_HDA_SYNC_CODEC R970
VGA_HDA_BITCLK_CODECR971
NB9M-GS
EC_SMB_CK2 (5,36)
EC_SMB_DA2 (5,36)
PM@
PM@
L25 1
1
L26
PM@
VGA_DDCCLK (25)
VGA_DDCDATA (25)
VGA_LVDS_SCL (24)
VGA_LVDS_SDA (24)
+VGASENSE (17,48)
55NM_HDMI@
2 0_0402_5%
55NM_HDMI@
2 10_0402_5%
55NM_HDMI@
2 0_0402_5%
55NM_HDMI@
2 0_0402_5%
55NM_HDMI@
2
33_0402_5%
NB9M-GS_BGA533
55NM@
1
R943
10K_0402_5%
@
+3VS
F7
E6
E7
F9
W15
R942
2.2K_0402_5%
PM@
1 PM@
0.1U_0402_16V4Z
PM@
DACB_RED
DACB_BLUE
DACB_GREEN
SPDIF
VDD_SENSE
R941
2.2K_0402_5%
PM@
VGA_HSYNC (25)
VGA_VSYNC (25)
2
C929
40NM
R939
10K_0402_5%
40NM@
R940
10K_0402_5%
40NM@
VGA_CRT_R (25)
VGA_CRT_B (25)
VGA_CRT_G (25)
150_0402_1%
150_0402_1%
150_0402_1%
VGA_HSYNC
VGA_VSYNC
PM@ 2
PM@ 2
PM@ 2
1
1
1
PAD
R933
R934
R935
+3VS
1
VGA_GPIO14
AD2
AD1
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRST_N
TESTMODE
For N10M
VGA_GPIO11
VGA_GPIO14
VGA_GPIO11
VGA_CRT_R
VGA_CRT_G
VGA_CRT_B
GPU_VID1 (48)
GPU_VID0 (48)
GPU_VID0
GPIO
PEX_REFCLK
PEX_REFCLK_N
R967
10K_0402_5%
PM@
R966
10K_0402_5%
PM@
DACA
PEX_TX0
PEX_TX0_N
PEX_TX1
PEX_TX1_N
PEX_TX2
PEX_TX2_N
PEX_TX3
PEX_TX3_N
PEX_TX4
PEX_TX4_N
PEX_TX5
PEX_TX5_N
PEX_TX6
PEX_TX6_N
PEX_TX7
PEX_TX7_N
PEX_TX8
PEX_TX8_N
PEX_TX9
PEX_TX9_N
PEX_TX10
PEX_TX10_N
PEX_TX11
PEX_TX11_N
PEX_TX12
PEX_TX12_N
PEX_TX13
PEX_TX13_N
PEX_TX14
PEX_TX14_N
PEX_TX15
PEX_TX15_N
2 10K_0402_5%
@ R962
1
@
AD10
AD11
AD12
AC12
AB11
AB12
AD13
AD14
AD15
AC15
AB14
AB15
AC16
AD16
AD17
AD18
AC18
AB18
AB19
AB20
AD19
AD20
AD21
AC21
AB21
AB22
AC22
AD22
AD23
AD24
AE25
AE26
NV_INVTPWM
VGA_ENVDD
VGA_ENBKL
1
2
R936
PM@ 2 0_0402_5%
1
R937 PM@
0_0402_5%
10,12
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
HDMI_DETECT_VGA (23)
PAD T157
VGA_ENVDD (24)
VGA_ENBKL (24)
GPU_VID1
DACA_HSYNC
DACA_VSYNC
DACB_CSYNC
DACB
C930
C931
C932
C933
C934
C935
C936
C937
C938
C939
C940
C941
C942
C943
C944
C945
C946
C947
C948
C949
C950
C951
C952
C953
C954
C955
C956
C957
C958
C959
C960
C961
N1
G1
C1
M2
M3
K3
K2
J2
C2
M1
D2
D1
J3
J1
K1
F3
G3
G2
F1
F2
VGA_CORE P-State
HDA_RST_CODEC#
HDA_SDOUT_CODEC
HDA_SYNC_CODEC
HDA_BITCLK_CODEC
1
1
1
C963
C964
C965
PM@
PM@
PM@
12P_0402_50V8J
12P_0402_50V8J
2
2
2
2
12P_0402_50V8J
12P_0402_50V8J
C962
PM@
HDA_RST_CODEC# (8,27,34)
HDA_SDIN1 (27)
HDA_SDOUT_CODEC (8,27,34)
HDA_SYNC_CODEC (8,27,34)
HDA_BITCLK_CODEC (8,27,34)
PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_P15
PCIE_GTX_C_MRX_N15
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
DACA_VREF
DACA_RSET
DACC
PCI EXPRESS
PCIE_GTX_C_MRX_P[0..15]
(10) PCIE_GTX_C_MRX_P[0..15]
I2C
PCIE_GTX_C_MRX_N[0..15]
(10) PCIE_GTX_C_MRX_N[0..15]
CLK
PCIE_MTX_C_GRX_P[0..15]
(10) PCIE_MTX_C_GRX_P[0..15]
PEX_RX0
PEX_RX0_N
PEX_RX1
PEX_RX1_N
PEX_RX2
PEX_RX2_N
PEX_RX3
PEX_RX3_N
PEX_RX4
PEX_RX4_N
PEX_RX5
PEX_RX5_N
PEX_RX6
PEX_RX6_N
PEX_RX7
PEX_RX7_N
PEX_RX8
PEX_RX8_N
PEX_RX9
PEX_RX9_N
PEX_RX10
PEX_RX10_N
PEX_RX11
PEX_RX11_N
PEX_RX12
PEX_RX12_N
PEX_RX13
PEX_RX13_N
PEX_RX14
PEX_RX14_N
PEX_RX15
PEX_RX15_N
HDA
PCIE_MTX_C_GRX_N[0..15]
(10) PCIE_MTX_C_GRX_N[0..15]
AE12
AF12
AG12
AG13
AF13
AE13
AE15
AF15
AG15
AG16
AF16
AE16
AE18
AF18
AG18
AG19
AF19
AE19
AE21
AF21
AG21
AG22
AF22
AE22
AE24
AF24
AG24
AF25
AG25
AG26
AF27
AE27
Part 1 of 5
TEST
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N15
GPU_VID1
R972
33_0402_5%
C966
U61
Y7
3
2
1
A
C967
20P_0402_50V8
PM@
OUT
GND
GND
IN
1
@
22P_0402_50V8J
2
27MHZ_16PF_X7S027000BG1H-U
PM@
OSC_OUT
EMI
XOUT
VSS
MODOUT
XIN/CLKIN
VDD
6
5
@
1
R973
2 OSC_SPREAD
22_0402_5%
+3VS
2
ASM3P2872AF-06OR_TSOT-23-6
C968
20P_0402_50V8
PM@
Security Classification
2009/04/23
Issued Date
2010/05
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
REFOUT
Title
C969
0.1U_0402_16V4Z
@
Size
B
Date:
Document Number
Rev
1.0
KIWA5/6 LA-5081P
Tuesday, April 28, 2009
Sheet
1
16
of
51
FBAD[0..63]
FBAA[0..13]
FBBA[2..5]
FBADQS#[0..7]
FBAD[0..63] (20,21)
FBAA[0..13] (20,21)
FBBA[2..5] (21)
FBADQM#[0..7]
FBADQS[0..7]
FBADQM#[0..7] (20,21)
FBADQS[0..7] (20,21)
FBADQS#[0..7] (20,21)
CKE cs0ODT
For N10M
U59C
+3VS
U59B
FBA_DEBUG
FBA_BA2 (20,21)
FBB_ODT (21)
40NM@
55NM@
R985 1
R986 1
R987 1
2 @ 1K_0402_5%
2 @ 1K_0402_5%
1K_0402_5%
2
PM@
F5
F4
E4
D5
C3
C4
B3
B4
IFPE_L0
IFPE_L0_N
IFPE_L1
IFPE_L1_N
IFPE_L2
IFPE_L2_N
IFPE_L3
IFPE_L3_N
AB6
M6
R5
F10
F11
(19)
(19)
(19)
PAD
T164
THERMDN
D8
PAD
T165
THERMDP
D9
PAD
T167
ROM_CS_N
B10
STRAP0
STRAP1
STRAP2
ROM_SI
R982
40.2K_0402_1%
PM@
ROM_SO
IFPE_AUX_N
IFPE_AUX
IFPC_AUX_N
IFPC_AUX
C9
ROM_SCLK
A10
ROM_SI
C10
ROM_SO
D4
D3
G5
G4
R975
R976
0_0402_5% 0_0402_5%
40NM@ @
STRAP0
STRAP1
STRAP2
C7
B9
A9
N5
BUFRST_N
ROM_SCLK
IFPAB_RSET
IFPE_RSET
IFPC_RSET
FBA_CS0# (20)
FBA_ODT (20)
40NM@
R978 1
0_0402_5%
+1.1VS
R983
40.2K_0402_1%
PM@
2
IFPC_L0
IFPC_L0_N
IFPC_L1
IFPC_L1_N
IFPC_L2
IFPC_L2_N
IFPC_L3
IFPC_L3_N
FBA_CS0#
FBA_ODT
NC
P4
N4
M5
M4
L4
K4
H4
J4
ROM_SCLK (19)
ROM_SI (19)
ROM_SO (19)
IFPC_AUX_N
IFPC_AUX
NB9M-GS_BGA533
55NM@
+1.8VS
R988
1.3K_0402_1%
@
+3VS
B
10mil
R989
4.7K_0402_5%
40NM_HDMI@
1
1
+1.8VS
C970
0.01U_0402_16V7K
@
R991
1.3K_0402_1%
@
1.27V~0.9V
FBACLK1 (21)
FBACLK1# (21)
NB9M-GS_BGA533
55NM@
VGA_HDMI_TX2+
VGA_HDMI_TX2VGA_HDMI_TX1+
VGA_HDMI_TX1VGA_HDMI_TX0+
VGA_HDMI_TX0VGA_HDMI_CLK+
VGA_HDMI_CLK-
+VGASENSE (16,48)
+FB_PLLAVDD
40NM@
FBA_DEBUG 1
R992
M22
VGA_HDMI_TX2
VGA_HDMI_TX2#
VGA_HDMI_TX1
VGA_HDMI_TX1#
VGA_HDMI_TX0
VGA_HDMI_TX0#
VGA_HDMI_CLK
VGA_HDMI_CLK#
FB_ODT
FBB_ODT
FBA_ODT
FBACLK0 (20)
FBACLK0# (20)
N24
N23
(23)
(23)
(23)
(23)
(23)
(23)
(23)
(23)
1
2+VGASENSE
R974 40NM@ 0_0402_5%
FBA_CKE (20,21)
R119
10K_0402_5%
PM@
IFPB_TXC
IFPB_TXC_N
IFPB_TXD4
IFPB_TXD4_N
STRAP0
IFPB_TXD5
STRAP1
IFPB_TXD5_N
STRAP2
IFPB_TXD6
IFPB_TXD6_N
IFPB_TXD7
STARP_REF_MIOB
IFPB_TXD7_N
STARP_REF_3V3
C15
D15
E15
F6
J5
J22
L22
T6
AA6
AC19
AE9
AG9
F24
F23
(20,21)
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
STRAP
FB_ODT
FB_VREF1
A16
AB3
AB2
W1
V1
W3
W2
AA2
AA3
AB1
AA1
GENERAL
FBA_CAS# (20,21)
FBA_WE# (20,21)
FBA_BA0 (20,21)
SERIAL
FBADQS0
FBADQS1
FBADQS2
FBADQS3
FBADQS4
FBADQS5
FBADQS6
FBADQS7
R118
10K_0402_5%
40NM@
LVDS/TMDS
A24
C25
E19
A19
T22
T27
AA24
AA26
FBB_CS0# (20,21)
Part 3 of 5
IFPA_TXC
IFPA_TXC_N
IFPA_TXD0
IFPA_TXD0_N
IFPA_TXD1
IFPA_TXD1_N
IFPA_TXD2
IFPA_TXD2_N
IFPA_TXD3
IFPA_TXD3_N
FBADQS#0
FBADQS#1
FBADQS#2
FBADQS#3
FBADQS#4
FBADQS#5
FBADQS#6
FBADQS#7
FBB_CKE (21)
VGA_LVDS_ACLK AC4
VGA_LVDS_ACLK# AD4
VGA_LVDS_A0
V5
VGA_LVDS_A0#
V4
VGA_LVDS_A1
AA5
VGA_LVDS_A1#
AA4
VGA_LVDS_A2
W4
VGA_LVDS_A2#
Y4
AB4
AB5
B24
D25
E18
A18
R22
R27
Y24
AA27
FBA_BA1 (20,21)
FBADQM#0
FBADQM#1
FBADQM#2
FBADQM#3
FBADQM#4
FBADQM#5
FBADQM#6
FBADQM#7
FBA_RAS# (20,21)
VGA_LVDS_ACLK
VGA_LVDS_ACLK#
VGA_LVDS_A0
VGA_LVDS_A0#
VGA_LVDS_A1
VGA_LVDS_A1#
VGA_LVDS_A2
VGA_LVDS_A2#
D23
C26
D19
B19
T24
T26
AA23
AB27
FBA_BA2
FBB_ODT
(24)
(24)
(24)
(24)
(24)
(24)
(24)
(24)
FBAA4
FBA_RAS#
FBAA5
FBA_BA1
FBBA2
FBBA4
FBBA3
FBB_CKE
FBB_CS0#
FBAA11
FBA_CAS#
FBA_WE#
FBA_BA0
FBBA5
FBAA12
FB_ODT
FBAA7
FBAA10
FBA_CKE
FBAA0
FBAA9
FBAA6
FBAA2
FBAA8
FBAA3
FBAA1
F26
J24
F25
M23
N27
M27
K26
J25
J27
G23
G26
J23
M25
K27
G25
L24
K23
K24
G22
K25
H22
M26
H24
F27
J26
G24
G27
M24
K22
IFPC_AUX
FBA_D0 Part 2 of 5
FBA_CMD0
FBA_D1
FBA_CMD1
FBA_D2
FBA_CMD2
FBA_D3
FBA_CMD3
FBA_D4
FBA_CMD4
FBA_D5
FBA_CMD5
FBA_D6
FBA_CMD6
FBA_D7
FBA_CMD7
FBA_D8
FBA_CMD8
FBA_D9
FBA_CMD9
FBA_D10
FBA_CMD10
FBA_D11
FBA_CMD11
FBA_D12
FBA_CMD12
FBA_D13
FBA_CMD13
FBA_D14
FBA_CMD14
FBA_D15
FBA_CMD15
FBA_D16
FBA_CMD16
FBA_D17
FBA_CMD17
FBA_D18
FBA_CMD18
FBA_D19
FBA_CMD19
FBA_D20
FBA_CMD20
FBA_D21
FBA_CMD21
FBA_D22
FBA_CMD22
FBA_D23
FBA_CMD23
FBA_D24
FBA_CMD24
FBA_D25
FBA_CMD25
FBA_D26
FBA_CMD26
FBA_D27
FBA_CMD27
FBA_D28
FBA_CMD28
FBA_D29
FBA_D30
FBA_DQM0
FBA_D31
FBA_DQM1
FBA_D32
FBA_DQM2
FBA_D33
FBA_DQM3
FBA_D34
FBA_DQM4
FBA_D35
FBA_DQM5
FBA_D36
FBA_DQM6
FBA_D37
FBA_DQM7
FBA_D38
FBA_D39
FBA_DQS_RN0
FBA_D40
FBA_DQS_RN1
FBA_D41
FBA_DQS_RN2
FBA_D42
FBA_DQS_RN3
FBA_D43
FBA_DQS_RN4
FBA_D44
FBA_DQS_RN5
FBA_D45
FBA_DQS_RN6
FBA_D46
FBA_DQS_RN7
FBA_D47
FBA_D48
FBA_DQS_WP0
FBA_D49
FBA_DQS_WP1
FBA_D50
FBA_DQS_WP2
FBA_D51
FBA_DQS_WP3
FBA_D52
FBA_DQS_WP4
FBA_D53
FBA_DQS_WP5
FBA_D54
FBA_DQS_WP6
FBA_D55
FBA_DQS_WP7
FBA_D56
FBA_D57
FB_VREF
FBA_D58
FBA_D59
FBA_CLK0
FBA_D60
FBA_CLK0_N
FBA_D61
FBA_D62
FBA_CLK1
FBA_D63
FBA_CLK1_N
R130 1
2
10K_0402_5%
R129 1
2
10K_0402_5%
R128 1
2
10K_0402_5%
D21
C22
B22
A22
C24
B25
A25
A26
D22
E22
E24
D24
D26
D27
C27
B27
D16
E16
D17
F18
D20
F20
E21
F21
C16
B18
C18
D18
C19
C21
B21
A21
P22
P24
R23
R24
T23
U24
V23
V24
N25
N26
R25
R26
T25
V26
V25
V27
V22
W22
W23
W24
AA22
AB23
AB24
AC24
W25
W26
W27
AA25
AB25
AB26
AD26
AD27
MEMORY INTERFACE
FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBAD32
FBAD33
FBAD34
FBAD35
FBAD36
FBAD37
FBAD38
FBAD39
FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63
Q42A
1
40NM_HDMI@
6
VGA_HDMI_SCL (16,23)
2N7002DW-T/R7_SOT363-6
60.4_0402_1%
PM@
2N7002DW-T/R7_SOT363-6
4
3
IFPC_AUX_N
VGA_HDMI_SDA (16,23)
40NM_HDMI@
5
Q42B
R993
4.7K_0402_5%
40NM_HDMI@
+3VS
Security Classification
2009/04/23
Issued Date
2010/05
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Size
B
Date:
Document Number
Rev
1.0
KIWA5/6 LA-5081P
Sheet
17
of
51
NEAR BALL
0.1U_0402_16V4Z
C977
PM@
220U_D2_4VM
U59D
0.1U_0402_16V4Z
0.1U_0402_16V4Z
J9
J10
J12
J13
L9
M9
M11
M17
N9
N11
N12
N13
N14
N15
N16
N17
N19
P11
P12
P13
P14
P15
P16
P17
R9
R11
R12
R13
R14
R15
R16
R17
T9
T11
T17
U9
U19
W9
W 10
W 12
W 13
W 18
W 19
1
+
C978
PM@
C979
PM@
C980
PM@
C982
PM@
C983
PM@
0.1U_0402_16V4Z
0.47U_0402_6.3V6K
1
C991
PM@
0.1U_0402_16V4Z
0.47U_0402_6.3V6K
C990
PM@
PM@
0.1U_0402_16V4Z
C981
1
C992
PM@
1
C993
PM@
1
C994
PM@
C995
PM@
0.47U_0402_6.3V6K
0.47U_0402_6.3V6K
0.47U_0402_6.3V6K
0.47U_0402_6.3V6K
C1001
PM@
C1002
PM@
NEAR BGA
+3VS
NEAR BGA
80mA
C1011
PM@
0.1U_0402_16V4Z
1
C1012
PM@
NEAR BALL
1
C1013
PM@
A12
B12
C12
D12
E12
F12
2
0.1U_0402_16V4Z
1U_0603_10V4Z
+IFPA_IOVDD
+1.8VS
L28
MBK1608121YZF_0603
2
PM@
1
4700P_0402_25V7K
1
C1019
PM@
2
4.7U 6.3V K X5R 0603
C1020
PM@
+IFPB_IOVDD
+IFPC_IOVDD
10K_0402_5% R994
2
1 PM@
12~16mil
470P_0402_50V7K
+1.8VS
L31
MBK1608121YZF_0603
1
2
PM@
1
4700P_0402_25V7K
1
IFPA_IOVDO
IFPB_IOVDD
IFPC_IOVDD
AG6
AF6
AE6
AD6
AC13
AC7
AB17
AB16
AB13
AB9
AB8
AB7
AG7
AF7
AE7
AD8
AD7
AC9
PEX_PLLVDD
VID_PLLVDD
SP_PLLVDD
PLLVDD
AF9
K6
L6
K5
PM@
PM@
PM@
PM@
2
2
0.1U_0402_16V4Z
4700P_0402_25V7K
1
1
C986
C987
PM@
PM@
2
2
4700P_0402_25V7K
2
4.7U 6.3V K X5R 0603
12~16mil
+FB_PLLAVDD
+FB_DLLAVDD
DACA_VDD
DACB_VDD
DACC_VDD
AG2
D7
W5
+DACA_VDD
+DACB_VDD
+DACC_VDD
FB_CAL_PD_VDDQ
B15
0.47U_0402_6.3V6K
1
C1005
PM@
2
+1.1VS
PEX_IOVDDQ=1.6A
PEX_IOVDD=500mA
PEX_PLLVDD=100mA
C1006
PM@
2
0.47U_0402_6.3V6K
C1015
PM@
1U_0402_6.3V6K
1
C1016
PM@
2
1U_0402_6.3V6K
+PEX_PLLVDD
C1027
PM@
C1028
PM@
2
0.01U_0402_16V7K
C1029
PM@
NEAR BALL
L35
MBK1608121YZF_0603
1
2
55NM_HDMI@
+3VS
2
2 10K_0402_5%
10K_0402_5%
+FB_PLLAVDD
+1.1VS
+1.8VS
L32
10U_0805_10V4Z 1
2
MBK1608121YZF_0603
1
PM@
C1031
PM@
PM@
2
1
C1022
PM@
0.01U_0402_16V7K
+FB_DLLAVDD
1
C1023
PM@
NEAR BGA
C1024
PM@
L34
1
2
MBK1608121YZF_0603
PM@
0.1U_0402_16V4Z
+IFPC_PLLVDD
4700P_0402_25V7K
L37
C1035
PM_HDMI@
260mAL36NEAR BGA
+1.8VS
C1036
PM_HDMI@
C1036
2
2
2
40NM_HDMI@
MBK1608121YZF_0603
+1.1VS
4.7U 6.3V K X5R 0603
L40
MBK1608121YZF_0603
PM_HDMI@
4700P_0402_25V7K
1
2
MBK1608121YZF_0603
55NM@
2
C1042
PM_HDMI@
2
4.7U 6.3V K X5R 0603
+1.1VS
0_0402_5%
PM_NOHDMI@
1
C1032
PM@
1
C1033
PM@
C1034
PM@
37.4_0402_1%
40NM@
4700P_0402_25V7K
1
1
C1037
PM@
2
2
40NM@
4.7U 6.3V K X5R 0603
MBK1608121YZF_0603
L39
L38
MBK1608121YZF_0603
PM@
+IFPAB_PLLVDD
+DACA_VDD
NEAR BALL
C1038
PM@
4700P_0402_25V7K
110mA
C1039
PM@
C1040
PM@
+3VS
C1041
PM@
A
+IFPC_IOVDD
C1043
PM_HDMI@
C1044
PM_HDMI@
Security Classification
2
470P_0402_50V7K
470P_0402_50V7K
C1044
0_0402_5%
Issued Date
PM_NOHDMI@
2009/04/23
2010/05
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NEAR BALL
5
L30
1
2
MBK1608121YZF_0603
PM@
0.1U_0402_16V4Z
R996
NEAR BGA
+1.1VS
C1018
PM@
0.01U_0402_16V7K
+1.8VS
C1009
C1010
PM@
PM@
2
2
10U_0805_10V4Z
C1017
PM@
+1.1VS
0.1U_0402_16V4Z
1
10U_0805_10V4Z
1
MBK1608121YZF_0603
2
1
L27
PM@
1
470P_0402_50V7K
C1026
PM@
+1.8VS
C1008
PM@
2
4.7U 6.3V K X5R 0603
2
2
0.1U_0402_16V4Z
1 PM@
R9951
R996 @
+1.8VS
1U_0603_10V4Z
1
C1000
NEAR BALL
C1014
PM@
2 R998
PM@ 30.1_0402_1%
PM@
PM@
2
2
0.1U_0402_16V4Z
C999
C1004
0.1U_0402_16V4Z
1
1U_0603_10V4Z
1
C989
C1007
PM@
+PEX_PLLVDD
+1.1VS_PLL
PM@
PM@
2
2
0.1U_0402_16V4Z
1U_0402_6.3V4Z
1
T19
C988
PM@
2
0.022U_0402_16V7K
0.1U_0402_16V4Z
1
PM@
2
0.1U_0402_16V4Z
R19
PM@
2
2
4700P_0402_25V7K
C1003
PM@
PM@
FBAVDDQ=2.24A
0.022U_0402_16V7K
1
C998
C975
@
PM@
FB_PLLAVDD
IFPAB_PLLVDD
IFPC_PLLVDD
IFPE_PLLVDD
4700P_0402_25V7K
1
C996
C997
FB_DLLAVDD
IFPE_IOVDD
+1.8VS
0.1U_0402_16V4Z
1
C974
NB9M-GS_BGA533
55NM@
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
C1030
2
4.7U 6.3V K X5R 0603
Part 4 of 5
PM@
PM@
2
2
0.022U_0402_16V7K
A13
B13
C13
D13
D14
E13
F13
F14
F15
F16
F17
F19
F22
H23
H26
J15
J16
J18
J19
L19
L23
L26
M19
N22
U22
Y22
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
1U_0402_6.3V4Z
C1025
PM@
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
0.022U_0402_16V7K
1
C972
C973
+FB_PLLAVDD
NEAR BALL
H6
+IFPAB_PLLVDD
AD5
+IFPC_PLLVDD
P6
2
1 PM@ N6
10K_0402_5% R997
C1021
PM@
110mA
NEAR BGA
V3
V2
J6
C971
POWER
13.56A
Title
Rev
1.0
KIWA5/6 LA-5081P
Sheet
18
of
51
U59E
GND_SENSE
FB_CAL_PU_GND
FB_CAL_TERM_GND
+3VS
15K_0402_1%
40NM@
R999
24.9K_0402_1%
55NM@
R1010
40NM@
10K_0402_1%
4.99K_0402_1%
R1004
55NM@
R1009
X76@
20K_0402_1%
R1008
55NM@
2
2K_0402_5%
1
1
R1003
@
10K_0402_5%
1
2
1
2
1
R1002
@
15K_0402_1%
R1005
R1007
@
10K_0402_5%
R1002
R1006
40NM@
2
R1005
@
R1001
PM@
45.3K_0402_1%
1
R1000
@
35K_0402_1%
2
STRAP2
STRAP1
STRAP0
ROM_SCLK
ROM_SI
ROM_SO
(17) STRAP2
(17) STRAP1
(17) STRAP0
(17) ROM_SCLK
(17) ROM_SI
(17) ROM_SO
R1006
24.9K_0402_1%
40NM@
10K_0402_5%
55NM@
R1012
44.2_0402_1%
X76
40NM@
W16
R1011 1 PM@
2 0_0402_5%
A15
B16
R1013 1
GPU
FB Memory (DDR2)
ROM_SO
ROM_SCLK
ROM_SI
STRAP2
STRAP1
STRAP0
64Mx16
PU 5K
PD 15K
PD 20K
PU 25K
PD 10K
PU 45K
64Mx16
PU 5K
PD 15K
PD 5K
PU 25K
PD 10K
PU 45K
64Mx16
PU 5K
PD 15K
PD 15K
PU 25K
PD 10K
PU 45K
R1013
2 40.2_0402_1%
FBCAL_PU_GND
Samsung
40.2_0402_1%
NB9M-GS_BGA533
55NM@
Memory/PKG
R999
@
10K_0402_1%
10K_0402_5%
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
Part 5 of 5
U2
U5
U11
U12
U13
U14
U15
U16
U17
U23
U26
V9
V19
W11
W14
W17
Y2
Y5
Y23
Y26
AC2
AC5
AC6
AC8
AC11
AC14
AC17
AC20
AC23
AC26
AF2
AF5
AF8
AF11
AF14
AF17
AF20
AF23
AF26
T16
T15
T14
10K_0402_5%
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
B2
B5
B8
B11
B14
B17
B20
B23
B26
E2
E5
E8
E11
E14
E17
E20
E23
E26
H2
H5
J11
J14
J17
K9
K19
L2
L5
L11
L12
L13
L14
L15
L16
L17
M12
M13
M14
M15
M16
P2
P5
P9
P19
P23
P26
T12
T13
40NM@
FBCAL_PD_VDDQ
FBCAL_TERM_GND
DDR2
30.1ohm
30.1ohm
NC
GDDR3
33.2ohm
44.2ohm
40.2ohm
N10M-GE1-S
(0x6EC)
55nm
Hynix
Qimonda
FB Memory (DDR2)
ROM_SO
ROM_SCLK
ROM_SI
STRAP2
STRAP1
STRAP0
64Mx16
PD 10K
PD 15K
PD 10K
PU 10K
PD 35K
PU 45K
Samsung
U59
NB10M-GS-S
N10M-GS
(0x6EC)
40nm
40NM@
Hynix
Qimonda
64Mx16
PD 10K
PD 15K
PD 5K
PU 10K
PD 35K
PU 45K
64Mx16
PD 10K
PD 15K
PD 15K
PU 10K
PD 35K
PU 45K
Security Classification
2009/04/23
Issued Date
2010/05
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Size
B
Date:
Document Number
Rev
1.0
KIWA5/6 LA-5081P
Tuesday, April 28, 2009
Sheet
1
19
of
51
U6
L2
L3
FBAA12
FBAA11
FBAA10
FBAA9
FBAA8
FBAA7
FBAA6
FBAA5
FBAA4
FBAA3
FBAA2
FBAA1
FBAA0
R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
FBACLK0#
FBACLK0
K8
J8
CK
CK
FBA_CKE
K2
CKE
FBACS0#_V
L8
FBA_WE#
K3
FBA_RAS#
K7
FBA_CAS#
L7
FBADQM#1
FBADQM#0
F3
B3
FBAODT_V
K9
FBADQS1
FBADQS#1
F7
E8
BA0
BA1
CS
WE
RAS
CAS
LDM
UDM
R480
1K_0402_1%
PM@
+VRAM_VREFA
FBADQS0
FBADQS#0
B7
A8
1
2
R479
1K_0402_1%
PM@
1 C613
0.047U_0402_16V4Z
FBABA2
PM@
2
Close to U6
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDD1
VDD2
VDD3
VDD4
VDD5
B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8
FBAD7
FBAD3
FBAD4
FBAD0
FBAD1
FBAD6
FBAD2
FBAD5
FBAD10
FBAD15
FBAD8
FBAD13
FBAD12
FBAD9
FBAD14
FBAD11
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
1
C184
A1
E1
J9
M9
R1
J1
J7
UDQS
UDQS
J2
VREF
A2
E2
L1
R3
R7
R8
NC#A2
NC#E2
BA2
NC#R3
NC#R7
NC#R8
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
VSS1
VSS2
VSS3
VSS4
VSS5
A3
E3
J3
N1
P9
PM@
220U_D2_4VM_R15
2
LDQS
LDQS
FBA_BA0
FBA_BA1
L2
L3
BA0
BA1
FBAA12
FBAA11
FBAA10
FBAA9
FBAA8
FBAA7
FBAA6
FBAA5
FBAA4
FBAA3
FBAA2
FBAA1
FBAA0
R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
FBACLK0#
FBACLK0
K8
J8
CK
CK
FBA_CKE
K2
CKE
FBACS0#_V
L8
+1.8VS
ODT
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
VDDL
VSSDL
+1.8VS
FBA_BA0
FBA_BA1
U28
C630
0.1U_0402_16V4Z
PM@
C617
1U_0402_6.3V4Z
PM@
FBA_WE#
K3
FBA_RAS#
K7
FBA_CAS#
L7
FBADQM#2
FBADQM#3
F3
B3
FBAODT_V
K9
FBADQS2
FBADQS#2
F7
E8
FBADQS3
FBADQS#3
+VRAM_VREFA
PM@ 1
C91
0.047U_0402_16V4Z
Close to U28
FBABA2
B7
A8
CS
WE
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
RAS
VDD1
VDD2
VDD3
VDD4
VDD5
CAS
LDM
UDM
VDDL
VSSDL
B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8
FBAD25
FBAD29
FBAD24
FBAD31
FBAD28
FBAD27
FBAD30
FBAD26
FBAD18
FBAD23
FBAD17
FBAD21
FBAD19
FBAD16
FBAD22
FBAD20
UDQS
UDQS
J2
VREF
NC#A2
NC#E2
BA2
NC#R3
NC#R7
NC#R8
VSS1
VSS2
VSS3
VSS4
VSS5
A3
E3
J3
N1
P9
(17,21) FBADQS#[0..7]
C92
0.1U_0402_16V4Z
PM@
C98
1U_0402_6.3V4Z
PM@
FBADQM#[0..7]
(17,21)
FBA_BA0
(17,21)
FBA_BA1
FBA_BA0
FBA_BA1
FBA_CKE
(17,21) FBA_CKE
FBA_RAS#
(17,21) FBA_RAS#
FBA_CAS#
(17,21) FBA_CAS#
FBA_WE#
(17,21) FBA_WE#
(17,21)
(17)
HYB18T1G161C2F-20_PG-TFBGA84
X76@
FBABA2
FBA_BA2
FBA_ODT
FBA_ODT
FB_ODT
(17,21) FB_ODT
(17)
FBADQS#[0..7]
(17,21) FBADQM#[0..7]
J1
J7
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
FBADQS[0..7]
(17,21) FBADQS[0..7]
A1
E1
J9
M9
R1
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
FBAA[0..12]
(17,21) FBAA[0..12]
+1.8VS
FBA_CS0#
FBA_CS0#
FBB_CS0#
(17,21) FBB_CS0#
+1.8VS
+1.8VS
0.01U_0402_16V7K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
1
1
1
1
C621
C622
C624
C626
C625
C619
C620
PM@
PM@
PM@
PM@
PM@
PM@
PM@
2
2
1000P_0402_50V7K
2
2
0.01U_0402_16V7K
2
1U_0402_6.3V4Z
1
1
C615
PM@
2
2
0.1U_0402_16V4Z
0.01U_0402_16V7K
0.01U_0402_16V7K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
1
1
1
1
C113
C130
C137
C143
C103
C100
PM@
PM@
PM@
PM@
PM@
PM@
C110
PM@
2
2
1000P_0402_50V7K
2
2
0.01U_0402_16V7K
2
1U_0402_6.3V4Z
Close to U5
C158
PM@
(17)
1 R196
2
0_0402_5%
40NM@
1 R193
2
0_0402_5%
55NM@
FBAODT_V
1 R194
2
0_0402_5%
40NM@
1 R195
2
0_0402_5%
55NM@
FBACS0#_V
FBACLK0
FBACLK0
2
2
0.1U_0402_16V4Z
0.01U_0402_16V7K
1
FBAD[0..63]
(17,21) FBAD[0..63]
2
LDQS
LDQS
FBBA[2..5]
(17,21) FBBA[2..5]
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
ODT
A2
E2
L1
R3
R7
R8
HYB18T1G161C2F-20_PG-TFBGA84
X76@
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
R104
475_0402_1%
2
R104
220_0402_1%
(17)
40NM@
55NM@
FBACLK0#
FBACLK0#
Security Classification
2009/04/23
Issued Date
2010/05
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Rev
1.0
KIWA5/6 LA-5081P
Sheet
1
20
of
51
U29
FBA_BA0
FBA_BA1
L2
L3
FBAA12
FBAA11
FBAA10
FBAA9
FBAA8
FBAA7
FBAA6
FBBA5
FBBA4
FBBA3
FBBA2
FBAA1
FBAA0
R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
FBACLK1#
FBACLK1
K8
J8
CK
CK
FBB_CKE_V
K2
CKE
FBB_CS0#
L8
FBA_WE#
K3
FBA_RAS#
K7
FBA_CAS#
L7
FBADQM#7
FBADQM#5
F3
B3
U7
BA0
BA1
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8
FBAD40
FBAD45
FBAD41
FBAD46
FBAD47
FBAD43
FBAD44
FBAD42
FBAD61
FBAD62
FBAD58
FBAD56
FBAD59
FBAD57
FBAD63
FBAD60
FBA_BA0
FBA_BA1
L2
L3
BA0
BA1
FBAA12
FBAA11
FBAA10
FBAA9
FBAA8
FBAA7
FBAA6
FBBA5
FBBA4
FBBA3
FBBA2
FBAA1
FBAA0
R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
FBACLK1#
FBACLK1
K8
J8
CK
CK
FBB_CKE_V
K2
CKE
FBB_CS0#
L8
FBA_WE#
K3
FBA_RAS#
K7
FBA_CAS#
L7
FBADQM#6
FBADQM#4
F3
B3
FBBODT_V
K9
FBAD39
FBAD34
FBAD38
FBAD35
FBAD32
FBAD36
FBAD33
FBAD37
FBAD55
FBAD51
FBAD52
FBAD50
FBAD49
FBAD54
FBAD48
FBAD53
B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
FBBODT_V
FBADQS7
FBADQS#7
F7
E8
WE
RAS
LDM
UDM
VDDL
VSSDL
R184
1K_0402_1%
PM@
+VRAM_VREFB
FBADQS5
FBADQS#5
1
2
R190
1K_0402_1%
PM@
1 C319
0.047U_0402_16V4Z
PM@
2
FBA_BA2
Close to U29
A1
E1
J9
M9
R1
J1
J7
2
LDQS
LDQS
B7
A8
UDQS
UDQS
J2
VREF
A2
E2
L1
R3
R7
R8
NC#A2
NC#E2
BA2
NC#R3
NC#R7
NC#R8
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
VSS1
VSS2
VSS3
VSS4
VSS5
A3
E3
J3
N1
P9
C305
0.1U_0402_16V4Z
PM@
C224
1U_0402_6.3V4Z
PM@
FBADQS6
FBADQS#6
FBADQS4
FBADQS#4
+VRAM_VREFB
C672
0.047U_0402_16V4Z
PM@
Close to U7
F7
E8
FBA_BA2
2
HYB18T1G161C2F-20_PG-TFBGA84
X76@
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
+1.8VS
ODT
VDD1
VDD2
VDD3
VDD4
VDD5
CAS
+1.8VS
K9
CS
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
CS
WE
RAS
CAS
LDM
UDM
B7
A8
UDQS
UDQS
J2
VREF
A2
E2
L1
R3
R7
R8
NC#A2
NC#E2
BA2
NC#R3
NC#R7
NC#R8
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
VSS1
VSS2
VSS3
VSS4
VSS5
A3
E3
J3
N1
P9
C654
0.1U_0402_16V4Z
PM@
(17,20)
(17)
2
1U_0402_6.3V4Z
FB_ODT
(17,20) FB_ODT
(17)
2
2
0.1U_0402_16V4Z
0.01U_0402_16V7K
2
2
0.01U_0402_16V7K
2
1U_0402_6.3V4Z
FBA_WE#
FBB_CS0#
FBA_BA2
FBA_CKE
FBB_CKE
FBB_CKE
FBACLK1
C667
PM@
1 R198
2
0_0402_5%
40NM@
1 R197
2
0_0402_5%
55NM@
FBBODT_V
1 R199
2
0_0402_5%
55NM@
1 R200
2
0_0402_5%
40NM@
FBACLK1
FBB_CKE_V
0.01U_0402_16V7K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
1
1
1
1
C668
C666
C665
C659
C656
C647
C642
PM@
PM@
PM@
PM@
PM@
PM@
PM@
2
2
1000P_0402_50V7K
FBA_CAS#
R154
475_0402_1%
55NM@
2
2
0.1U_0402_16V4Z
0.01U_0402_16V7K
2
2
0.01U_0402_16V7K
C233
PM@
FBA_RAS#
FBA_BA2
FBB_ODT
FBB_ODT
(17,20) FBA_CKE
FBA_BA1
FBA_BA0
(17,20) FBB_CS0#
+1.8VS
2
2
1000P_0402_50V7K
FBA_BA1
(17,20) FBA_CAS#
(17)
FBA_BA0
(17,20)
(17,20) FBA_WE#
+1.8VS
0.01U_0402_16V7K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
1
1
1
1
1
C272
C234
C225
C304
C269
C263
C239
PM@
PM@
PM@
PM@
PM@
PM@
PM@
(17,20)
(17,20) FBA_RAS#
C655
1U_0402_6.3V4Z
PM@
HYB18T1G161C2F-20_PG-TFBGA84
X76@
FBADQS#[0..7]
FBADQM#[0..7]
(17,20) FBADQM#[0..7]
2
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
FBADQS[0..7]
(17,20) FBADQS#[0..7]
ODT
LDQS
LDQS
FBBA[2..5]
+1.8VS
J1
J7
VDDL
VSSDL
FBBA[2..5]
(17,20) FBADQS[0..7]
A1
E1
J9
M9
R1
VDD1
VDD2
VDD3
VDD4
VDD5
FBAA[0..12]
(17,20) FBAA[0..12]
(17)
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
FBAD[0..63]
(17,20) FBAD[0..63]
(17)
FBACLK1#
FBACLK1#
Close to U7
R154
220_0402_1%
40NM@
Security Classification
2009/04/23
Issued Date
2010/05
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Rev
1.0
KIWA5/6 LA-5081P
Sheet
1
21
of
51
FSB
FSA
CLKSEL2
CLKSEL1
CLKSEL0
CPU
MHz
SRC
MHz
PCI
MHz
REF
MHz
266
100
33.3
14.318
DOT_96 USB
MHz
MHz
R668 1
+3VS
0_0805_5%
48.0
2
133
100
33.3
14.318
96.0
48.0
200
100
33.3
14.318
96.0
48.0
166
100
33.3
14.318
96.0
333
100
33.3
14.318
96.0
48.0
100
100
33.3
14.318
96.0
48.0
400
100
33.3
14.318
96.0
48.0
R672 1
2 @ 0_0805_5%
+VCCP
R673 1
1
C812
0.1U_0402_16V4Z
1
C813
0.1U_0402_16V4Z
1
C818
10U_0805_10V4Z
1
C819
0.1U_0402_16V4Z
R678 1
12
72
19
27
+VDD_CK505
2 1K_0402_5%
MCH_CLKSEL0
(8)
66
2 0_0402_5%
31
CPU_BSEL0
@
R679
1K_0402_5%
1
C820
0.1U_0402_16V4Z
1
C821
0.1U_0402_16V4Z
62
52
23
CARD@
SDA
SCL
R690 1
MCH_CLKSEL1
(8)
R685 1
(28) CLK_14M_ICH
2 1K_0402_5%
38
12_0402_5%
(38) CLK_14M_SIO
12_0402_5%
R687 1
R689 1
2 @ 33_0402_5%
33_0402_5%
2 0_0402_5%
1
CPU_BSEL1
R688 1
FSA
20
FSB
FSC
7
8
CK_PWRGD
(28) CK_PWRGD
@
R691
0_0402_5%
11
VDD_PCI
CPU_0
VDD_CPU
CPU_0#
VDD_48
CPU_1
VDD_PLL3
CPU_1#
VDD_CPU_IO
SRC_0/DOT_96
VDD_PLL3_IO
SRC_0#/DOT_96#
VDD_SRC_IO
LCDCLK/27M
VDD_SRC_IO
LCDCLK#/27M_SS
VDD_SRC_IO
SRC_2
USB_0/FS_A
SRC_3
FS_B/TEST_MODE
(28)
PM_STP_CPU#
H_STP_PCI#
53
PM_STP_PCI#
54
CLK_XTAL_IN
SRC_3#
REF_1
SRC_4
CLK_XTAL_OUT
SRC_4#
NC
SRC_6
CPU_STOP#
SRC_7
PCI_STOP#
2 10K_0402_5%
R699 1
2 0_0402_5%
R697 1
XTAL_IN
SRC_8/CPU_ITP
XTAL_OUT
SRC_8#/CPU_ITP#
2 1K_0402_5%
13
MCH_CLKSEL2
(8)
R700 1
(38) CLK_PCI_DB
2 @ 33_0402_5%
PCI2_TME 14
15
R696 1
FSC
(36) CLK_PCI_LPC
R705 1
33_0402_5%
PCI4_SEL
16
(26) CLK_PCI_ICH
R706 1
33_0402_5%
ITP_EN
17
PCI_1
SRC_9
PCI_2
SRC_9#
PCI_3
SRC_10
PCI_4/SEL_LCDCL
3
22
CLK_48M_CR
22P_0402_50V8J
34
59
42
30
CLK_14M_SIO
@
22P_0402_50V8J
CLK_XTAL_OUT
@
22P_0402_50V8J
22P_0402_50V8J
@
22P_0402_50V8J
C828
C830
Y4
14.31818MHZ_16PF_DSX840GA
C827
@
R712
10K_0402_5%
22P_0402_50V8J
CLK_XTAL_IN
C825
PCI2_TME
69
CLK_14M_ICH
C829
GM@
R711
10K_0402_5%
26
CLK_48M_ICH
R709
10K_0402_5%
C826
PCI4_SEL
PM@
R708
10K_0402_5%
R710
10K_0402_5%
+3VS
1
ITP_EN
@
R707
10K_0402_5%
(28,30) ICH_SMBCLK
@
3
Q1B
4
R674 1
CLK_SMBCLK
2 0_0402_5%
CLK_SMBDATA
10
CLK_SMBCLK
71
CLK_CPU_BCLK
70
CLK_CPU_BCLK#
68
CLK_MCH_BCLK
67
CLK_MCH_BCLK#
24
R_CLK_DOT
25
R_CLK_DOT#
73
CLK_SMBDATA (14,15)
CLK_SMBCLK (14,15)
CLK_CPU_BCLK
R677
R681
R682
R683
(5)
CLK_CPU_BCLK#
(5)
CLK_MCH_BCLK
(8)
CLK_MCH_BCLK#
1
1
1
1
2
2
2
2
GM@
PM@
GM@
PM@
(8)
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
28
MCH_SSCDREFCLK
29
MCH_SSCDREFCLK#
CLK_MCH_DREFCLK (8)
CLK_PCIE_VGA (16)
CLK_MCH_DREFCLK# (8)
CLK_PCIE_VGA# (16)
C
(8)
(8)
32
CLK_MCH_3GPLL
33
CLK_MCH_3GPLL#
35
CLK_PCIE_EXP
36
CLK_PCIE_EXP#
39
CLK_PCIE_WLAN2
T153
40
CLK_PCIE_WLAN2#
T154
57
CLK_PCIE_WLAN
T155
56
CLK_PCIE_WLAN#
T156
61
CLK_PCIE_WLAN1
60
CLK_PCIE_WLAN1#
CLK_MCH_3GPLL
(8)
CLK_MCH_3GPLL#
(8)
CLK_PCIE_EXP (30)
CLK_PCIE_EXP#
(30)
SRC_10#
CLK_PCIE_WLAN1
(30)
CLK_PCIE_WLAN1#
(30)
VSS_PCI
SRC_11#
CLKREQ_3#
VSS_IO
CLKREQ_4#
VSS_CPU
CLKREQ_6#
VSS_PLL3
CLKREQ_7#
VSS_SRC
CLKREQ_9#
VSS_SRC
SLKREQ_10#
VSS_SRC
VSS
CLKREQ_11#
USB_1/CLKREQ_A#
DEVICE
MCH_DREFCLK
MCH_3GPLL
PCIE_EXP#
PCIE_WLAN
PCIE_WLAN1
PCIE_LAN
PCIE_ICH
PCIE_SATA
+3VS
B
63
44
CLK_PCIE_LAN
45
CLK_PCIE_LAN#
50
CLK_PCIE_ICH
51
CLK_PCIE_ICH#
48
CLK_PCIE_SATA
47
CLK_PCIE_SATA#
37
EXP_CLKREQ#
41
WLAN_CLKREQ2#
58
WLAN_CLKREQ#
65
WLAN_CLKREQ1#
43
CLKREQ_LAN#
CLK_PCIE_LAN
(31)
CLK_PCIE_LAN#
CLK_PCIE_ICH
SATA_CLKREQ#_R
EXP_CLKREQ#
WLAN_CLKREQ1#
MCH_CLKREQ#_R
CLKREQ_LAN#
WLAN_CLKREQ#
WLAN_CLKREQ2#
(31)
(28)
CLK_PCIE_ICH#
(28)
CLK_PCIE_SATA
(27)
CLK_PCIE_SATA#
EXP_CLKREQ# (30)
WLAN_CLKREQ2#
WLAN_CLKREQ#
CLKREQ_LAN#
(30)
(31)
49
46
SATA_CLKREQ#_R
21
MCH_CLKREQ#_R
SATA_CLKREQ#
(28)
MCH_CLKREQ#
(8)
2
2
2
2
2
2
2@
@
PORT
1
1
1
1
1
1
1
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
DEVICE
REQ_3#
REQ_4#
REQ_6#
REQ_7#
REQ_9#
REQ_10#
REQ_11#
REQ_A#
(27)
WLAN_CLKREQ1#
R693
R694
R695
R698
R701
R702
R703
VSS_REF
VSS_48
PORT
SRC0
SRC2
SRC3
SRC4
SRC6
SRC7
SRC8
SRC9
SRC10
SRC11
64
PCIF_5/ITP_EN
SRC_11
18
+3VS
2N7002DW-T/R7_SOT363-6
@
R704
0_0402_5%
+3VS
CKPWRGD/PD#
SRC_7#
@
R692
1K_0402_5%
CPU_BSEL2
CLK_SMBDATA
Q1A
REF_0/FS_C/TEST_
+VCCP
(6)
R671
2.2K_0402_5%
2N7002DW-T/R7_SOT363-6
6
1
+3VS
C824
0.1U_0402_16V4Z
VDD_IO
SRC_6#
(28) H_STP_CPU#
R670
2.2K_0402_5%
1
C823
0.1U_0402_16V4Z
VDD_REF
SRC_2#
(28) CLK_48M_ICH
@
R686
1K_0402_5%
(6)
R684 1
(37) CLK_48M_CR
+VCCP
FSB
1
C822
0.1U_0402_16V4Z
VDD_SRC
2 0_0402_5% @
+3VSM_CK505 U30
@
R675
56_0402_5%
(6)
R669 1
C817
0.1U_0402_16V4Z
+VCCP
R676 1
1 2.2K_0402_5%
1
C816
0.1U_0402_16V4Z
(28,30) ICH_SMBDATA
Reserved
R680 2
1
C815
0.1U_0402_16V4Z
+VDD_CK505
55
FSA
1
C814
0.1U_0402_16V4Z
0_0805_5%
48.0
+1.5VS
1
C811
10U_0805_10V4Z
+3VS
96.0
FSC
+3VSM_CK505
PCIE_EXP#
PCIE_WLAN2
PCIE_WLAN
PCIE_WLAN1
PCIE_LAN
PCIE_SATA
MCH_3GPLL
A
SLG8SP556VTR_QFN72_10X10
Issued Date
Security Classification
2009/04/23
2010/05
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Title
Rev
1.0
KIWA5/6 LA-5081P
Sheet
1
22
of
51
+3VS
U31
1
@
R716
0_0402_5%
HDMI_DETECT
SDA_SINK
30
HPD_SINK
REXT
HPD#
SDA
48
47
(10) TMDS_B_CLK
(10) TMDS_B_CLK#
PIO
HPD#
HPDX
PIN10
RE_EN#
CEXT
PIN11
VCC
APD
PIN12
GND
ASQ1
PIN27
GND
EMI0
PIN33
VCC
EMI1
PIN34
DDCBUF_EN
DDCBUF
PIN35
CFG
PRE
IN_D4+
IN_D4-
16
17
(10) TMDS_B_DATA1
(10) TMDS_B_DATA1#
42
41
IN_D2+
IN_D2-
OUT_D2+
OUT_D2-
19
20
HDMI_TX1+
HDMI_TX1-
(10) TMDS_B_DATA2
(10) TMDS_B_DATA2#
39
38
OUT_D1+
OUT_D1-
22
23
HDMI_TX2+
HDMI_TX2-
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
PAD
EMI0, EMI1
WCM-2012-900T_4P
4
3 3
HDMI_CLK+
HDMI_TX0+
HDMI_TX1HDMI_TX1+
4
1
WCM-2012-900T_4P
3 3
2 2
L3PM_HDMII8101T@
WCM-2012-900T_4P
4
3 3
2 2
L4PM_HDMII8101T@
WCM-2012-900T_4P
4
3 3
HDMI_TX2-
HDMI_TX2+
HDMI_CLK+
HDMI_CLKHDMI_TX0+
HDMI_TX0HDMI_TX1+
HDMI_TX1HDMI_TX2+
HDMI_TX2-
R751
R752
R753
R754
R755
R756
R757
R758
2
L5PM_HDMII8101T@
1
1
1
1
1
1
1
1
5
1442T@ 2
1442T@ 2
1442T@ 2
1442T@ 2
1442T@ 2
1442T@ 2
1442T@ 2
1442T@ 2
1
1
(17) VGA_HDMI_TX1#
(17) VGA_HDMI_TX1
0.1U_0402_16V7K
2 PM_HDMI@
0.1U_0402_16V7K
2 PM_HDMI@
HDMI_TX1HDMI_TX1+
(17) VGA_HDMI_TX2#
(17) VGA_HDMI_TX2
C841 1
C842 1
0.1U_0402_16V7K
2 PM_HDMI@
0.1U_0402_16V7K
2 PM_HDMI@
HDMI_TX2HDMI_TX2+
+3VS
R916 8171@
1
2
4.7K_0402_5%
ASQ1
EMI0
L41 PM_HDMI@MBK1608121YZF_0603
HDMIDAT_R
1
2
HDMICLK_R
1
2
L42 PM_HDMI@MBK1608121YZF_0603
(16,17) VGA_HDMI_SDA
(16,17) VGA_HDMI_SCL
1 R917
2 8171@
4.7K_0402_5%
R918
0_0402_5%
8101TI1442T@
R919
0_0402_5%
8101TI1442T@
for NV request
0515
+5VS
12/30
+5VS
12/30
4.7K_0402_5%
8171@
HDMI_DETECT
(16) HDMI_DETECT_VGA
@
D45
RB751V_SOD323
HDMI_CLK+_CONN
2
PM_HDMI@
R1078
2
1K_0402_1%
PM_HDMI@
R1079
10K_0402_1%
R738
0_0805_5%
1
R922
0_0402_5%
8101TI1442T@
R741
100K_0402_5%
@
2 @
4.7K_0402_5%
GM_HDMI@
2
0_0402_5%
1
R744
L43
2
FBML10160808121LMT_0603
PM_HDMI@
2
@
D20
BAT54S-7-F_SOT23-3
1
R745
HDMI@ +5VS_HDMI
D18
RB491D_SC59-3
+5VS_HDMI 1
HDMI@
R742
2.2K_0402_5%
HDMI@
R743
2.2K_0402_5%
HDMI_CLK-_CONN
C267
PM_HDMI@
330P_0402_50V7K
JHDMI1
HDMIDAT_R
HDMICLK_R
2
0_0402_5%
PM_HDMI@
C845
0.1U_0402_16V4Z
2 HDMI@
R923
4.7K_0402_5%
8171@
+3VS
HDMI_CLK-_CONN
R921
1
ASQ0
1
C1157
PM_HDMI@ PM_HDMI@
2
2
12P_0402_50V8J
12P_0402_50V8J
Q2
2
G
R920 8101TI1442T@
1
2
0_0402_5%
HDMI_CLK+_CONN
HDMI_TX0-_CONN
HDMI_TX0-_CONN
HDMI_TX0+_CONN
HDMI_TX1-_CONN
HDMI_TX0+_CONN
HDMI_TX1+_CONN
HDMI_TX2-_CONN
HDMI_TX2+_CONN
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
+5VS
+5VS
20
21
22
23
3
1
HDMI_TX2-_CONN
HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CKGND
CK_shield GND
CK+
GND
D0GND
D0_shield
D0+
D1D1_shield
D1+
D2D2_shield
D2+
SUYIN_100042MR019S153ZL
ME@
HDMI_TX1-_CONN
HDMI_TX1+_CONN
12/30
PM_HDMI@
2N7002_SOT23-3
L2PM_HDMII8101T@
HDMI_TX0-
HDMI_TX0HDMI_TX0+
C839 1
C840 1
NEAR CONNECTOR
HDMI_CLK-
(17) VGA_HDMI_TX0#
(17) VGA_HDMI_TX0
0.1U_0402_16V7K
2 PM_HDMI@
0.1U_0402_16V7K
2 PM_HDMI@
R736 1
HDMI_CLKHDMI_CLK+
C837 1
C838 1
HDMI_TX2-_CONN
0.1U_0402_16V7K
2 PM_HDMI@
0.1U_0402_16V7K
2 PM_HDMI@
R922
APD
R737 1
1
5
12
18
24
27
31
36
37
43
49
C835 1
C836 1
HDMI_TX2+_CONN
12/30
R734 1
+3VS
For 8171
HDMICLK_NB (8)
(17) VGA_HDMI_CLK#
(17) VGA_HDMI_CLK
For 8171
12/30
ASQ0
PS8101TQFN48G_QFN48_7X7
+3VS
R735 1
HDMI_TX1-_CONN
8101T@
For 8171
HDMI_TX1+_CONN
OUT_D3+
OUT_D3-
R732 1
OUT_D4+
OUT_D4-
IN_D3+
IN_D3-
R733 1
HDMI_TX0-_CONN
8171@
45
44
HDMI_TX0+_CONN
HDMIDAT_NB (8)
2
1
4.7K_0402_5% R1095 1442T@
4.7U_0805_10V4Z
HDMI_CLK+ C925
HDMI_CLK-
R730 1
TMDS_B_HPD# (10)
GM@
R729
2.2K_0402_5%
(10) TMDS_B_DATA0
(10) TMDS_B_DATA0#
IN_D1+
IN_D1-
GM@
R728
2.2K_0402_5%
HDMI_TX0+
HDMI_TX0-
HDMI_CLK-_CONN
TMDS_B_HPD#
13
14
ASQ0, ASQ1
499_0402_1%
2
PM_HDMI@
499_0402_1%
2
PM_HDMI@
499_0402_1%
2
PM_HDMI@
499_0402_1%
2
PM_HDMI@
499_0402_1%
2
PM_HDMI@
499_0402_1%
2
PM_HDMI@
499_0402_1%
2
PM_HDMI@
499_0402_1%
2
PM_HDMI@
1442T@
8101T@
499_0402_1%
2
4/14 update 8101T@
R727 1
10
3.01K_0402_1%
RT_EN#
APD
HDMI_CLK+_CONN
4.7K_0402_5%
@
SCL
PIN7
1
4.7K_0402_5%
8171@
PC1
PEQ
12/30
R913
PC0
EMI1
PIN3
R912
0_0402_5%
8101TI1442T@
GM_NOHDMI@
R715
20K_0402_1%
@
R718
7.5K_0402_1%
R727
APD
PC1
4
PC1
PC0
3
PC0 internal
pull down
CFG0
CFG1
R726
ASQ0
2
11
15
21
26
33
40
46
R725
GND
GM_HDMI@
C834
10U_0805_10V4Z
+3VS
2 8171@ 4.7K_0402_5% 34
4.7K_0402_5% 35
2 @
internal pull down
2
R721 1
R723 1
DDC_EN
8171
PIN1
GM_HDMI@
C833
0.1U_0402_16V4Z
29
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
2
1
8101T
12/30
@
R720
0_0402_5%
R915
4.7K_0402_5%
8171@
4.7K_0402_5%
1442T@
4/14 update 1442T@
PIN4
SCL_SINK
32
R914
4.7K_0402_5%
@
PIN NUM
28
PC0
GM_HDMI@
C832
0.1U_0402_16V4Z
For 8171
12/30
OE#
R717
4.7K_0402_5%
GM_HDMI@
TMDS_B_HPD#
R724
4.7K_0402_5%
@
1
GM_HDMI@
C831
0.1U_0402_16V4Z
+3VS
+3VS
2
1
R722
4.7K_0402_5%
8101T@
12/30
U31
25
12/30
1442T@
For 8171
S IC ASM1442T
+3VS
+3VS
P/N:SA00002D700 (8101T)
P/N:SA00001U920 (CH7318C)
+3VS
HDMIDAT_R
@
D21
BAT54S-7-F_SOT23-3
HDMICLK_R
@
D22
BAT54S-7-F_SOT23-3
KIWB3/B4_LA4551P
HDMI_TX2+_CONN
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
HDMI_CLK+_CONN
HDMI_CLK-_CONN
HDMI_TX0+_CONN
HDMI_TX0-_CONN
HDMI_TX1+_CONN
HDMI_TX1-_CONN
HDMI_TX2+_CONN
HDMI_TX2-_CONN
Security Classification
2009/04/23
Issued Date
Deciphered Date
2010/05
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
Title
Level Shiftter_PS8101T
Size Document Number
Custom
KIWAX_LA-5081P
Date: Tuesday, April 28, 2009
Rev
1.0
Sheet
1
23
of
51
+5VALW
+3VS
1
OUT
IN
2
Q5
DTC124EKAT146_SC59-3
(16) VGA_ENVDD
1
GM@ 0_0402_5%
1
PM@ 0_0402_5%
GND
2
R230
2
R231
(10) GM_ENVDD
SI2301BDS-T1-E3_SOT23-3
Q4
1 2
3
DTC124EK
220K_0402_5%
2
R761
1
2
G
C851 0.1U_0402_16V4Z
Q3
2N7002_SOT23 S
R760
100K_0402_5%
W=60mils
R759
150_0603_1%
+LCDVDD
W=60mils
INVT_PWM
+3VS
1
DAC_BRIG
DISPOFF#
R762
4.7K_0402_5%
BKOFF#
1
470P_0402_50V7K
CH751H-40PT_SOD323-2
2
1
R763
GM@ 0_0402_5%
2
1
R764
PM@ 0_0402_5%
(10) GMCH_ENBKL
(16) VGA_ENBKL
ENBKL
ENBKL
2
2
470P_0402_50V7K
(36)
R765
100K_0402_1%
1
1
C852 C853 C854
DISPOFF#
BKOFF#
D23
(36)
2
470P_0402_50V7K
@
C
For EMI
+LEDVDD
2
1
B+
L7
1
FBMA-L11-201209-221LMA30T_0805C855
400mA
4.7U_0805_25V6-K
+LCDVDD_L
+LCDVDD_L
JLVDS1
FBMA-L11-201209-221LMA30T_0805
L6
1
+LCDVDD 2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
+LCDVDD_L
(60 MIL)
C49
C46
+3VS
4.7U_0805_10V4Z
0.1U_0402_16V4Z
(10) LVDS_ACLK#
2
2
(10) LVDS_ACLK
(10) LVDS_A0#
(10) LVDS_A0
(10) LVDS_A1#
(10) LVDS_A1
(10) LVDS_A2#
(10) LVDS_A2
LVDS_ACLK#
LVDS_ACLK
LVDS_A0#
LVDS_A0
LVDS_A1#
LVDS_A1
LVDS_A2#
LVDS_A2
32
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
GNDGND
JLVDS2
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
+LEDVDD
DAC_BRIG
DISPOFF#
+LCDVDD_L
+3VS
DAC_BRIG (36)
INVT_PWM (36)
LVDS_SDA
LVDS_SCL
+3VS
(17) VGA_LVDS_ACLK#
(17) VGA_LVDS_ACLK
(17) VGA_LVDS_A0#
(17) VGA_LVDS_A0
(17) VGA_LVDS_A1#
(17) VGA_LVDS_A1
(17) VGA_LVDS_A2#
(17) VGA_LVDS_A2
LVDS_SDA (10)
LVDS_SCL (10)
VGA_LVDS_ACLK#
VGA_LVDS_ACLK
VGA_LVDS_A0#
VGA_LVDS_A0
VGA_LVDS_A1#
VGA_LVDS_A1
VGA_LVDS_A2#
VGA_LVDS_A2
31
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
ACES_87142-3041
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
GNDGND
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
+LEDVDD
+3VS
DAC_BRIG (36)
INVT_PWM (36)
DAC_BRIG
DISPOFF#
VGA_LVDS_SDA
VGA_LVDS_SCL
VGA_LVDS_SDA (16)
VGA_LVDS_SCL (16)
31
ACES_87142-3041
ME@
ME@
Security Classification
2009/04/23
Issued Date
2010/05
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Size
B
Date:
Document Number
Rev
1.0
KIWA5/6 LA-5081P
Tuesday, April 28, 2009
Sheet
1
24
of
51
CRT Connector
CLOSE TO CONN
2 FCM1608CF-121T03_2P
(16) VGA_CRT_G
(10) GMCH_CRT_G
L9 1
<BOM Structure>
2 FCM1608CF-121T03_2P
GREEN
(16) VGA_CRT_B
(10) GMCH_CRT_B
R770 1
R771 1
2 PM@ 0_0402_5%
2 GM@ 0_0402_5%
CRT_B_1
L10 1
<BOM Structure>
2 FCM1608CF-121T03_2P
BLUE
R774
150_0402_1%
R773
150_0402_1%
+5VS
@
C856
10P_0402_50V8J
@
C857
10P_0402_50V8J
<BOM Structure>
@
C858
10P_0402_50V8J
1
C859
10P_0402_50V8J
1
RB491D_SC59-3
1
C860
10P_0402_50V8J
+CRT_VCC
D24
1
R772
150_0402_1%
RED
C861
10P_0402_50V8J
W=40mils
RED
+5VS
+CRT_VCC
1
2
@
D25
BAT54S-7-F_SOT23-3
GREEN
@
D26
BAT54S-7-F_SOT23-3
+5VS
+5VS
1
2
F1
JCRT1
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
JVGA_HS
BLUE
BLUE
CRT_DDC_DAT
GREEN
+5VS
L8 1
CRT_G_1
CRT_R_1
2 PM@ 0_0402_5%
2 GM@ 0_0402_5%
1.1A_6V_SMD1812P110TF
2 PM@ 0_0402_5%
2 GM@ 0_0402_5%
R768 1
R769 1
R766 1
R767 1
(16) VGA_CRT_R
(10) GMCH_CRT_R
RED
JVGA_VS
@
D27
BAT54S-7-F_SOT23-3
CRT_DDC_CLK
JVGA_HS
1
1
@
D28
BAT54S-7-F_SOT23-3
JVGA_VS
OE#
P
R776 1
(10) GMCH_CRT_HSYNC
R777 1
2 GM@ 0_0402_5%
A
G
(16) VGA_HSYNC
CRT_HSYNC_1
U32
SN74AHCT1G125DCKR_SC70-5
L11
L12
<BOM Structure>
1
2 FCM1608CF-121T03_2P
2 FCM1608CF-121T03_2P
JVGA_HS
JVGA_VS
1
+CRT_VCC
@
C864
10P_0402_50V8J
PIN ASSIGMENT
@ C865
10P_0402_50V8J
D-SUB
9
1
6
2
7, 5
3
8
14
10
13
11
12
15
4
CLOSE TO CONN
OE#
C866
0.1U_0402_16V4Z
<BOM Structure>
R778 1
(10) GMCH_CRT_VSYNC
R779 1
2 GM@ 0_0402_5%
A
G
(16) VGA_VSYNC
CRT_VSYNC_1
U33
SN74AHCT1G125DCKR_SC70-5
<BOM Structure>
2.2K
+3VS
+3VS
(10) GMCH_CRT_CLK
(16) VGA_DDCCLK
R787 1
2 PM@ 0_0402_5%
2
1
R784
2.2K_0402_5%
R783
2.2K_0402_5%
5
4
2
2 GM@ 0_0402_5%
R785 1
2.2K_0402_5%
2.2K_0402_5%
R502 2 PM@ 0_0402_5%
2.2K
R87
R86
+CRT_VCC
CLOSE TO CONN
(10) GMCH_CRT_DATA
CRT_DDC_DAT
3
Q6B
2N7002DW -T/R7_SOT363-6
<BOM Structure>
<BOM Structure>
CRT_DDC_CLK
6
1
Q6A
2N7002DW -T/R7_SOT363-6
@
C867
100P_0402_50V8J
@
C868
68P_0402_50V8J
Security Classification
2009/04/23
Issued Date
Deciphered Date
2010/05
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
@
D29
BAT54S-7-F_SOT23-3
<BOM Structure>
(16) VGA_DDCDATA
C862
0.1U_0402_16V4Z
R775
1K_0402_5%
<BOM Structure>
C863
0.1U_0402_16V4Z
CLOSE TO CONN
16
17
ALLTO_C10534-91507-L
ME@
1
2
G
G
Title
FUNCTION
+CRT_VCC
RED
GND
GREEN
GND
BLUE
GND
VSYNC
GND
HSYNC
SENSE
SM_DAT
SM_CLK
PIN4
Size
Document Number
Custom
Date:
Rev
1.0
KIWA5/6 LA-5081P
Sheet
E
25
of
51
+3VS
1
R788
1
R789
1
R790
1
R791
1
R792
1
R793
1
R794
1
R795
2
8.2K_0402_5%
2
8.2K_0402_5%
2
8.2K_0402_5%
2
8.2K_0402_5%
2
8.2K_0402_5%
2
8.2K_0402_5%
2
8.2K_0402_5%
2
8.2K_0402_5%
PCI_DEVSEL#
PCI_STOP#
PCI_TRDY#
U34B
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_FRAME#
PCI_PLOCK#
PCI_IRDY#
PCI_SERR#
PCI_PERR#
+3VS
1
R796
1
R797
1
R798
1
R799
1
R800
1
R801
1
R802
1
R803
1
R805
1
R806
1
R807
1
R808
2
8.2K_0402_5%
2
8.2K_0402_5%
2
8.2K_0402_5%
2
8.2K_0402_5%
2
8.2K_0402_5%
2
8.2K_0402_5%
2
8.2K_0402_5%
2
8.2K_0402_5%
2
8.2K_0402_5%
2
8.2K_0402_5%
2
8.2K_0402_5%
2
8.2K_0402_5%
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
D11
C8
D9
E12
E9
C9
E10
B7
C7
C5
G11
F8
F11
E7
A3
D2
F10
D5
D10
B3
F7
C3
F3
F4
C1
G7
H7
D1
G5
H6
G1
H3
PCI_REQ0#
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
PCI_REQ1#
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_REQ2#
PCI_REQ3#
J5
E1
J6
C4
PCI
REQ0#
GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55
C/BE0#
C/BE1#
C/BE2#
C/BE3#
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
PLTRST#
PCICLK
PME#
F1
G4
B6
A7
F13
F12
E6
F6
PCI_REQ0#
PCI_GNT0#
PCI_REQ1#
PCI_GNT1#
PCI_REQ2#
PCI_GNT2#
PCI_REQ3#
PCI_GNT3#
D8
B4
D6
A5
PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3
D3
E3
R1
C6
E4
C2
J4
A4
F5
D7
PCI_IRDY#
PCI_PAR
PCI_RST#
PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#
C14
D4
R2
PLT_RST#
CLK_PCI_ICH
PCI_PME#
1
R804
Interrupt I/F
PIRQA#
PIRQB#
PIRQC#
PIRQD#
ICH9-M ES_FCBGA676
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5
H4
K6
F2
G2
PCI_CBE#3 (31)
CLK_PCI_ICH (22)
PCI_PME# (36)
2
@ 10K_0402_5%
+3VALW
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
@
R810
1K_0402_5%
R811
0_0402_5%
1
@
R809
1K_0402_5%
PCI_GNT3#
2
@ 1K_0402_5%
1
R812
CLK_PCI_ICH
Pull high?
(28) SB_SPI_CS#1
PCI_GNT0#
PCI_RST#
1
PCI_RST# (36,38)
SPI
PCI
LPC*
R813
100K_0402_5%
PLT_RST#
PLT_RST# (8,16,30,31)
1
PCI_GNT#3
SPI_CS#1
PCI_GNT#0
C869
18P_0402_50V8J
R814
100K_0402_5%
Security Classification
2009/04/23
Issued Date
2010/05
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Size
Document Number
Rev
1.0
KIWA5/6 LA-5081P
Date:
Sheet
1
26
of
51
+3VS
R815
GATEA20
+RTCVCC
1
C871
1
R822
+VCCP
CLRP1
1
ICH_RTCX2
C23
C24
RTCX1
RTCX2
ICH_RTCRST#
ICH_SRTCRST#
SM_INTRUDER#
A25
F20
C22
RTCRST#
SRTCRST#
INTRUDER#
ICH_INTVRMEN
LAN100_SLP
B22
A22
2
E25
2MM
100_0603_1%
C872
1
C873
2
1U_0603_10V4Z
C13
0.1U_0402_16V4Z
+1.5VS
(8,16,34) HDA_BITCLK_CODEC
(8,16,34) HDA_SYNC_CODEC
C
(8,16,34) HDA_RST_CODEC#
1
R828
1
R829
1
R831
1
R832
2
24.9_0402_1%
2
0_0402_5%
2
33_0402_5%
2
33_0402_5%
GLAN_COMP
HDA_RST_R#
AF4
AG4
AH3
AE5
(8) HDA_SDIN0
(16) HDA_SDIN1
(34) HDA_SDIN2
(8,16,34) HDA_SDOUT_CODEC
+3VS
HDD
ODD
DRIVE_LED#
(33) SATA_DTX_C_IRX_N0
(33) SATA_DTX_C_IRX_P0
(33) SATA_ITX_DRX_N0
(33) SATA_ITX_DRX_P0
2
RB751V_SOD323
SATA_DTX_C_IRX_N0
SATA_DTX_C_IRX_P0
SATA_ITX_DRX_N0
C874 1
SATA_ITX_DRX_P0
C875 1
(33) SATA_DTX_C_IRX_N1
(33) SATA_DTX_C_IRX_P1
(33) SATA_ITX_DRX_N1
(33) SATA_ITX_DRX_P1
SATA_DTX_C_IRX_N1
SATA_DTX_C_IRX_P1
SATA_ITX_DRX_N1
SATA_ITX_DRX_P1
(39) DRIVE_LED#
C876 1
C877 1
LAN_TXD_0
LAN_TXD_1
LAN_TXD_2
AE7
1
R834
1
R835
1
D30
2
33_0402_5%
HDA_SDOUT_R AG5
2
10K_0402_5%
SATA_LED#
2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
GPIO56
GLAN_COMPI
GLAN_COMPO
LPC_DRQ0#
FERR#
CPUPWRGD
IGNNE#
INIT#
INTR
RCIN#
HDA_BIT_CLK
HDA_SYNC
STPCLK#
HDA_RST#
THRMTRIP#
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3
HDA_SDOUT
SATALED#
SATA_ITX_C_DRX_N1
SATA_ITX_C_DRX_P1
LPC_FRAME#
J3
J1
NMI
SMI#
HDA_DOCK_EN#/GPIO33
HDA_DOCK_RST#/GPIO34
AH13
AJ13
AG14
AF14
K3
LDRQ0#
LDRQ1#/GPIO23
DPRSTP#
DPSLP#
AG8
SATA_ITX_C_DRX_N0
SATA_ITX_C_DRX_P0
FWH4/LFRAME#
A20GATE
A20M#
AG7
AE8
AJ16
AH16
AF17
AG17
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LAN_RSTSYNC
D13
D12
E13
AF6
AH4
HDA_SYNC_R
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
K5
K4
L6
K2
GLAN_CLK
LAN_RXD0
LAN_RXD1
LAN_RXD2
B28
B27
HDA_BITCLK_R
INTVRMEN
LAN100_SLP
F14
G13
D14
B10
R821
LPC_AD[0..3] (36,38)
U34A
2
15P_0402_50V8J
2
20K_0402_5%
@
2
+RTCBATT
R823
R819
10M_0402_5%
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
AD22
H_PWRGOOD
AF25
H_IGNNE#
AE22
AG25
L3
H_INIT#
H_INTR
KB_RST#
AF23
AF24
H_NMI
H_SMI#
AH27
H_STPCLK#
AG26
THRMTRIP_ICH#
AH11
AJ11
AG12
AF12
SATA_CLKN
SATA_CLKP
SATARBIAS#
SATARBIAS
AH18
AJ18
AJ7
AH7
56_0402_5%
R824
@
1
H_DPRSTP#
R826
56_0402_5%
H_DPRSTP# (6,49)
H_DPSLP# (6)
2 56_0402_5%
H_FERR# (5)
H_PWRGOOD (6)
H_IGNNE# (5)
H_INIT# (5)
H_INTR (5)
KB_RST# (36)
+VCCP
H_NMI (5)
H_SMI# (5)
R833 1
H_STPCLK# (5)
2 54.9_0402_1%
H_THERMTRIP#
H_THERMTRIP# (5,8)
2 @ 1K_0402_5%
2 @ 1K_0402_5%
CLK_PCIE_SATA#
CLK_PCIE_SATA
SATARBIAS
1 0_0402_5%
R827 1
R836 1
R837 1
AH9
AJ9
AE10
AF10
+VCCP
GATEA20 (36)
H_A20M# (5)
R825 2
H_FERR#_S
AG27
H_DPSLP#
56_0402_5%
LPC_DRQ0# (38)
AJ26
TP12
LPC_FRAME# (36,38)
GATEA20
H_A20M#
AJ25 H_DPRSTP_R#
H_DPSLP#
AE23
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
N7
AJ27
H_DPRSTP#
OUT
NC
IN
LPC
NC
CPU
10K_0402_5%
2
+RTCVCC
+RTCVCC
R817
KB_RST#
RTC
330K_0402_1%
2 ICH_INTVRMEN
ICH_RTCX1
2
15P_0402_50V8J
Y5
LAN / GLAN
R820
1
1
C870
15P
IHDA
1M_0402_5%
2 SM_INTRUDER#
SATA
330K_0402_1%
2 LAN100_SLP
R818
1
R816
1
32.768KHZ_12.5P_1TJS125BJ2A251
D
10K_0402_5%
CLK_PCIE_SATA# (22)
CLK_PCIE_SATA (22)
R838 1
2 24.9_0402_1%
ICH9-M ES_FCBGA676
Need check
+3VS
2
HDA_SDOUT_R
R839
1K_0402_5%
@
HDA_SDOUT
Description
RSVD
Normal Operation
DEVICE
0
1
4
5
HDD
ODD
E-SATA
Security Classification
2009/04/23
Issued Date
2010/05
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Rev
1.0
KIWA5/6 LA-5081P
Sheet
1
27
of
51
+3VS
R840 1
2 10K_0402_5%
SERIRQ
R841 1
2 8.2K_0402_5%
PCI_CLKRUN#
R842 1
2 @ 10K_0402_5%
GPIO38
R843 1
2 @ 8.2K_0402_5%
EC_THERM#
+3VALW
+3VS
2
XDP_DBRESET#
R866 1
2 10K_0402_5%
ICH_RI#
R867 1
2 1K_0402_5%
ICH_PCIE_WAKE#
R868 1
2 8.2K_0402_5%
ICH_LOW_BAT#
R870 1
2 10K_0402_5%
LID_OUT#
R872 1
2 10K_0402_5%
WOL_EN
PCI_CLKRUN#
(8,49)
R869 1
VGATE
2 0_0402_5%
(36)
(36)
+3VS
2 10K_0402_5%
GPIO7
R878 1
2 10K_0402_5%
GPIO13
R879 1
2 @ 10K_0402_5%
GPIO17
R880 1
2 @ 10K_0402_5%
GPIO18
R882 1
2 10K_0402_5%
GPIO20
R883 1
2 10K_0402_5%
GPIO22
EC_SMI#
EC_SCI#
(22) SATA_CLKREQ#
R884 1
2 @ 1K_0402_5%
2 @ 10K_0402_5%
SB_SPKR
R889 1
2 @ 100K_0402_5%
GPIO57
R890 1
2 @ 100K_0402_5%
DPRSLPVR
R891 1
2 @ 1K_0402_5%
ICH_RSVD
GPIO7
EC_SMI#
EC_SCI#
GPIO13
GPIO17
GPIO18
GPIO20
GPIO22
GPIO27
T98
SATA_CLKREQ#
GPIO38
GPIO39
GPIO48
GPIO49
GPIO57
SB_SPKR
MCH_ICH_SYNC#
ICH_RSVD
T99
T100
T101
(34) SB_SPKR
(8) MCH_ICH_SYNC#
+3VS
SST_CTL
OCP#
R888 1
VRMPWRGD
T96
OCP#
CPUSB#
(30,36)
R876 1
ICH_PCIE_WAKE#
SERIRQ
EC_THERM#
(30,31) ICH_PCIE_WAKE#
(36,38) SERIRQ
(36) EC_THERM#
A14
E19
L4
E20
M5
AJ23
D21
A20
AG19
AH21
AG21
A21
C12
C21
AE18
K1
AF8
AJ22
A9
D19
L1
AE19
AG22
AF21
AH24
A8
M7
AJ24
B21
AH20
AJ20
AJ21
PMSYNC#/GPIO0
SMBALERT#/GPIO11
STP_PCI#
STP_CPU#
CLKRUN#
WAKE#
SERIRQ
THRM#
VRMPWRGD
TP11
GPIO1
GPIO6
GPIO7
GPIO8
GPIO12
GPIO13
GPIO17
GPIO18
GPIO20
SCLOCK/GPIO22
GPIO27
GPIO28
SATACLKREQ#/GPIO35
SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48
GPIO49
GPIO57/CLGPIO5
SPKR
MCH_SYNC#
TP3
TP8
TP9
TP10
S4_STATE#/GPIO26
PWROK
DPRSLPVR/GPIO16
BATLOW#
PWRBTN#
LAN_RST#
RSMRST#
CK_PWRGD
CLPWROK
SLP_M#
CL_CLK0
CL_CLK1
CL_DATA0
CL_DATA1
CL_VREF0
CL_VREF1
CL_RST0#
CL_RST1#
MEM_LED/GPIO24
GPIO10/SUS_PWR_ACK
GPIO14/AC_PRESENT
WOL_EN/GPIO9
CLK_14M_ICH
CLK_48M_ICH
ICH_SUSCLK
C16
E16
G17
SLP_S3#
SLP_S4#
SLP_S5#
C10
S4_STATE#
(22)
(22)
+3VALW
T95
SLP_S3#
SLP_S4#
SLP_S5#
@
R854
10K_0402_5%
(36)
(36)
(36)
R860 1
G20
ICH_POK
M2
R865 1
1
C879
10P_0402_50V8J
B13
ICH_LOW_BAT#
R3
PBTN_OUT#
PBTN_OUT#
DPRSLPVR
2 R863
@ 10K_0402_5%
(8,49)
(36)
D22
EC_RSMRST#R
R5
CK_PWRGD_R
R6
M_PWROK
EC_RSMRST#R
B16
2 0_0402_5%
CK_PWRGD
R874 1
T97
2 0_0402_5%
M_PWROK (8)
VGATE
(8,49)
F24
B19
CL_CLK0
CL_CLK1
F22
C19
CL_DATA0
CL_DATA1
C25
A19
F21
D18
A16
C18
C11
C20
R871 1
R873 1
(22)
R875 1
C881
0.1U_0402_16V4Z
(8)
R881 1
1
CL_RST# (8)
SB_INT_FLASH_SEL
@
D31 RB751V_SOD323
2
1 ACIN
(39)
GPIO14
2
1
2
R886
R887
@ 10K_0402_5%
+3VALW
WOL_EN
2
ACIN
C882
0.1U_0402_16V4Z
(36,43,45)
5/8
RSMRST circuit
NEW CARD
RP3
5
6
7
8
4
3
2
1
USB_OC#8
USB_OC#3
USB_OC#10
USB_OC#11
(30)
(30)
(30)
(30)
PCIE_RXN3
PCIE_RXP3
PCIE_TXN3
PCIE_TXP3
PCIE_RXN4
PCIE_RXP4
PCIE_TXN4
PCIE_TXP4
C884
C885
C887
C888
0.1U_0402_10V7K
0.1U_0402_10V7K
PCIE_RXN4
PCIE_RXP4
PCIE_C_TXN4
PCIE_C_TXP4
G29
G28
H27
H26
E29
E28
F27
F26
(31)
(31)
(31)
(31)
PCIE_IRX_PTX_N6
PCIE_IRX_PTX_P6
PCIE_ITX_C_PRX_N6
PCIE_ITX_C_PRX_P6
C891
C892
0.1U_0402_10V7K
0.1U_0402_10V7K
PCIE_IRX_PTX_N6
PCIE_IRX_PTX_P6
PCIE_ITX_PRX_N6
PCIE_ITX_PRX_P6
C29
C28
D27
D26
SB_SPI_CS#1
D23
D24
F23
+3VS
2
(26) SB_SPI_CS#1
@
R898
330_0402_5%
R899 1
2 @ 0_0402_5%
VRMPWRGD
(40)
(40)
USB_OC#0
USB_OC#1
(40)
USB_OC#4
D
@
Q9
RHU002N06_SOT323
2
G
3
(49) CLK_ENABLE#
D25
E23
R900 1
2 22.6_0402_1%
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
USB_OC#8
USB_OC#9
USB_OC#10
USB_OC#11
USBRBIAS
N4
N5
N6
P6
M1
N2
M4
M3
N3
N1
P5
P3
AG2
AG1
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4
PERN5
PERP5
PETN5
PETP5
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP
DMI_CLKN
DMI_CLKP
SPI_CLK
SPI_CS0#
SPI_CS1#GPIO58/CLGPIO6
SPI
OC0#/GPIO59
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO29
OC6#/GPIO30
OC7#/GPIO31
OC8#/GPIO44
OC9#/GPIO45
OC10#/GPIO46
OC11#/GPIO47
USB
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
(36) EC_RSMRST#
(8)
(8)
(8)
(8)
Y27
Y26
W29
W28
DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1
DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1
(8)
(8)
(8)
(8)
AB27
AB26
AA29
AA28
DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2
DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2
(8)
(8)
(8)
(8)
AD27
AD26
AC29
AC28
DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3
DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3
(8)
(8)
(8)
(8)
T26
T25
CLK_PCIE_ICH#
CLK_PCIE_ICH
AF29
AF28
AC5
AC4
AD3
AD2
AC1
AC2
AA5
AA4
AB2
AB3
AA1
AA2
W5
W4
Y3
Y2
W1
W2
V2
V3
U5
U4
U1
U2
DMI_IRCOMP
BAV99DW-7_SOT363
@
D32B
R895
2.2K_0402_5%
R897 1
(40)
(40)
(40)
(40)
(40)
(40)
(40)
(40)
(40)
(40)
(37)
(37)
(30)
(30)
(30)
(30)
LEFT USB1
LEFT USB2
CMOS
3G Card
RIGHT USB
1
2
3
4
5
6
DEVICE
0
1
2
3
4
5
6
7
8
9
10
11
WLAN
NEW CARD
LAN
BT
Card Reader
WLAN
TV Tuner
New Card
DEVICE
LEFT SIDE1
LEFT SIDE2
CMOS
3G
RIGHT SIDE
BT
CARD READER
WIRELESS
NEW CARD
USBRBIAS
USBRBIAS#
Issued Date
Deciphered Date
2010/05
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size
C
Date:
(46)
ICH9-M ES_FCBGA676
Security Classification
POK
EC_RSMRST#R
1
Q8
MMBT3906_SOT23-3
1
2
+3VALW
R894
4.7K_0402_5%
2.2K_0402_5%
2 24.9_0402_1%
USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7
USB20_N8
USB20_P8
USB20_N9
USB20_P9
USB20_N10
USB20_P10
USB20_N11
USB20_P11
@ R893
0_0402_5%
2
D32A
BAV99DW-7_SOT363
R896
1
CLK_PCIE_ICH# (22)
CLK_PCIE_ICH (22)
USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7
USB20_N8
USB20_P8
USB20_N9
USB20_P9
USB20_N10
USB20_P10
USB20_N11
USB20_P11
DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0
DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0
V27
V26
U29
U28
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
DMI_ZCOMP
DMI_IRCOMP
PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/GLAN_TXP
SPI_MOSI
SPI_MISO
DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
J29
J28
K27
K26
10K_1206_8P4R_5%
LAN
@ R892
0_0402_5%
2
3
0.1U_0402_10V7K
0.1U_0402_10V7K
PCIE_RXN3
PCIE_RXP3
PCIE_C_TXN3
PCIE_C_TXP3
PERN2
PERP2
PETN2
PETP2
WLAN
10K_1206_8P4R_5%
(30)
(30)
(30)
(30)
PERN1
PERP1
PETN1
PETP1
PCI - Express
USB_OC#5
USB_OC#7
USB_OC#9
USB_OC#0
4
3
2
1
+3VALW
1
@ 0_0402_5%
RP2
5
6
7
8
2 3.24K_0402_1%
R885
453_0402_1%
L29
L28
M27
M26
10K_1206_8P4R_5%
+3VS
CL_VREF0_ICH
CL_VREF1_ICH
CL_RST#
2 3.24K_0402_1%
R877
453_0402_1%
USB_OC#6
USB_OC#1
USB_OC#2
USB_OC#4
4
3
2
1
C880
@
1000P_0402_50V7K
2 10K_0402_5%
CK_PWRGD
(8)
U34D
N29
N28
P27
P26
RP1
5
6
7
8
D20
+3VALW
C878
10P_0402_50V8J
@
M_PWROK
(8,36)
1
low-->default
M_PWROK
2 @ 100_0402_5%
ICH_POK
DPRSLPVR
2 499_0402_1%
ICH9-M ES_FCBGA676
CLK_14M_ICH
CLK_48M_ICH
P1
2 10K_0402_5%
2 0_0402_5%
M6
A17
SLP_S3#
SLP_S4#
SLP_S5#
H1
AF3
R864 1
R862
2 LID_OUT#
0_0402_5%
H_STP_PCI#
R_STP_CPU#
CLK14
CLK48
SUSCLK
1 2
CL_RST#
1
R855
clocks
SUS_STAT#/LPCPD#
SYS_RESET#
2 @ 10K_0402_5%
(8) PM_BMBUSY#
(36) EC_LID_OUT#
RI#
(22) H_STP_PCI#
(22) H_STP_CPU#
R861 1
XDP_DBRESET#
R4
G19
PM_BMBUSY#
LINKALERT#
2 10K_0402_5%
@
R859
10K_0402_5%
F19
R857
10_0402_5%
@
2
@
R853
10K_0402_5%
+3VALW
(5) XDP_DBRESET#
ICH_RI#
+3VS
CLK_14M_ICH
R850
22_0402_5%
<BOM Structure>
GPIO48
AH23
AF19
AE21
AD20
GPIO39
2 10K_0402_5%
SMB
SATA0GP/GPIO21
SATA1GP/GPIO19
SATA4GP/GPIO36
SATA5GP/GPIO37
2 @ 10K_0402_5%
R852 1
SATA
GPIO
R858 1
LINKALERT#
ME__EC_CLK1
ME__EC_DATA1
SMBCLK
SMBDATA
LINKALERT#/GPIO60/CLGPIO4
SMLINK0
SMLINK1
SYS / GPIO
PM_BMBUSY#
CLK_48M_ICH
R846
8.2K_0402_5%
U34C
G16
A13
E17
C17
B18
Power MGT
2 @ 8.2K_0402_5%
(22,30) ICH_SMBCLK
(22,30) ICH_SMBDATA
MISC
GPIO
Controller Link
R851 1
R847
10K_0402_5%
R849
10K_0402_5%
R845
2.2K_0402_5%
2
OCP#
2 10K_0402_5%
R844
2.2K_0402_5%
1
R848 1
R856 1
+3VALW
Document Number
Rev
1.0
KIWA5/6 LA-5081P
Tuesday, April 28, 2009
Sheet
1
28
of
51
U34F
D33
CH751H-40PT_SOD323-2
ICH_V5REF_RUN
1
1U_0603_10V4Z
+5VALW +3VALW
1U_0603_10V4Z
40 mils
R904
1
+1.5VS
10U_0805_10V4Z
0_0805_5%
C908
220U_D2_4VM
C910
C911
C912
10U_0805_10V4Z
2
2.2U_0603_6.3V4Z
V_CPU_IO[1]
V_CPU_IO[2]
VCC3_3[01]
VCC3_3[02]
VCC3_3[07]
C917
1U_0603_10V4Z
+1.5VS
C921
VCC1_5_A[01]
VCC1_5_A[02]
VCC1_5_A[03]
VCC1_5_A[04]
VCC1_5_A[05]
VCC1_5_A[06]
VCC1_5_A[07]
VCC1_5_A[08]
AC11
AD11
AE11
AF11
AG10
AG11
AH10
AJ10
VCC1_5_A[09]
VCC1_5_A[10]
VCC1_5_A[11]
VCC1_5_A[12]
VCC1_5_A[13]
VCC1_5_A[14]
VCC1_5_A[15]
VCC1_5_A[16]
AC9
+1.5VS
C924
1U_0603_10V4Z
AC18
AC19
AC21
G10
G9
AC12
AC13
AC14
AJ5
+1.5VS
C800
0.1U_0402_16V4Z
C801
0.1U_0402_16V4Z
2
T104
T105
+3VS
VCC_LAN1_05_INT_ICH_1
VCC_LAN1_05_INT_ICH_2
close to AC7
VCC3_3[08]
VCC3_3[09]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
VCC3_3[14]
C802
0.1U_0402_16V4Z
1
CHB1608U301_0603 2.2U_0603_6.3V4Z
1
2
R910
1
1
+1.5VS
C804
(10UF*1, 2.2UF*1)
+1.5VS
R911
1
2
CHB1608U301_0603
C805
2
2
10U_0805_10V4Z
4.7U_0805_10V4Z
C906
0.1U_0402_16V4Z
VCCUSBPLL
VCCSUS3_3[01]
VCCSUS3_3[02]
VCCSUS3_3[03]
VCCSUS3_3[04]
VCCGLAN1_5[1]
VCCGLAN1_5[2]
VCCGLAN1_5[3]
VCCGLAN1_5[4]
VCCGLAN3_3
ICH9-M ES_FCBGA676
+3VS
1
C909
0.1U_0402_16V4Z
+3VS
1
C913
0.1U_0402_16V4Z
C914
0.1U_0402_16V4Z
AJ3
1
T102
T103
AC8
F17
0.1U_0402_16V4Z
C916
+1.5VS
R906
R905
0_0402_5%
PMIGM_NOHDMI@
GM_HDMI@
AJ4
0_0402_5%
0.1U_0402_16V4Z
C915
AD8 VCCSUS1_5_ICH_1
F18
VCCSUS1_5_ICH_2
2
1
R908
0_0402_5%
GM_HDMI@
A18
D16
D17
E22
1
+3VALW
VCCSUS3_3[05]
AF1
VCCSUS3_3[06]
VCCSUS3_3[07]
VCCSUS3_3[08]
VCCSUS3_3[09]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]
T1
T2
T3
T4
T5
T6
U6
U7
V6
V7
W6
W7
Y6
Y7
T7
VCCCL1_05
VCCCL1_5
VCCLAN3_3[1]
VCCLAN3_3[2]
VCCGLANPLL
(DMI)
C901
0.1U_0402_16V4Z
C907
0.1U_0402_16V4Z
1
VCCCL3_3[1]
VCCCL3_3[2]
C920
4.7U_0603_6.3V6M
C923
0.1U_0402_16V4Z
+3VALW
C799
4.7U_0603_6.3V6K
G22 VCCCL1_05_ICH
G23
T106
1
A24
B24
2
+3VALW
R909
0_0402_5%
PMIGM_NOHDMI@
C922
VCC1_5_A[23]
VCC1_5_A[24]
VCC1_5_A[25]
C806
+3VS
C803
@ 1U_0603_10V4Z
Security Classification
2009/04/23
Issued Date
VSS[001]
VSS[002]
VSS[003]
VSS[004]
VSS[005]
VSS[006]
VSS[007]
VSS[008]
VSS[009]
VSS[010]
VSS[011]
VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]
VSS[052]
VSS[053]
VSS[054]
VSS[055]
VSS[056]
VSS[057]
VSS[058]
VSS[059]
VSS[060]
VSS[061]
VSS[062]
VSS[063]
VSS[064]
VSS[065]
VSS[066]
VSS[067]
VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]
VSS[073]
VSS[074]
VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS_NCTF[01]
VSS_NCTF[02]
VSS_NCTF[03]
VSS_NCTF[04]
VSS_NCTF[05]
VSS_NCTF[06]
VSS_NCTF[07]
VSS_NCTF[08]
VSS_NCTF[09]
VSS_NCTF[10]
VSS_NCTF[11]
VSS_NCTF[12]
H5
J23
J26
J27
AC22
K28
K29
L13
L15
L2
L26
L27
L5
L7
M12
M13
M14
M15
M16
M17
M23
M28
M29
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
P12
P13
P14
P15
P16
P17
P2
P23
P28
P29
P4
P7
R11
R12
R13
R14
R15
R16
R17
R18
R28
T12
T13
T14
T15
T16
T17
T23
B26
U12
U13
U14
U15
U16
U17
AD23
U26
U27
U3
V1
V13
V15
V23
V28
V29
V4
V5
W26
W27
W3
Y1
Y28
Y29
Y4
Y5
AG28
AH6
AF2
B25
A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29
A
ICH9-M ES_FCBGA676
2010/05
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
VCC1_5_A[21]
VCC1_5_A[22]
VCCLAN1_05[1]
VCCLAN1_05[2]
A26
+3VS
0.1U_0402_16V4Z
1
VCC1_5_A[20]
A10
A11
A27
VCCSUS1_5[2]
VCC1_5_A[18]
VCC1_5_A[19]
VCC1_5_A[26]
VCC1_5_A[27]
VCC1_5_A[28]
VCC1_5_A[29]
VCC1_5_A[30]
D28
D29
E26
E27
(SATA)
VCCSUS1_5[1]
GLAN POWER
+3VS
1
+3VS
+3VS
VCC1_5_A[17]
AA7
AB6
AB7
AC6
AC7
A12
B12
AG29
AJ6
AC10
USB CORE
+1.5VS
1
+VCCP
AB23
AC23
B9
F9
G3
G6
J2
J7
K7
VCCSUS1_05[1]
VCCSUS1_05[2]
ATX
1U_0603_10V4Z
AC16
AD15
AD16
AE15
AF15
AG15
AH15
AJ15
VCCPSUS
+1.5VS
10U_0805_10V4Z
VCCSATAPLL
VCCPUSB
AD19
AF20
AG24
AC20
VCCSUSHDA
ARX
C919
10U_0805_10V4Z
C918
CHB1608U301_0603
+VCCP
VCC3_3[03]
VCC3_3[04]
VCC3_3[05]
VCC3_3[06]
VCCHDA
AJ19
1U_0603_10V4Z
10U_0805_6.3V6M
C900
R907
1
+1.5VS
C904
C905
C897
C903
R902
1
2
+1.5VS
CHB1608U301_0603
0.01U_0402_16V7K
C896
0.1U_0402_16V4Z
20 mils
W23
Y23
0.1U_0402_16V4Z
C902
ICH_V5REF_SUS
VCC_DMI[1]
VCC_DMI[2]
C899
0.1U_0402_16V4Z
2
2
0.1U_0402_16V4Z
D34
CH751H-40PT_SOD323-2
VCCDMIPLL
R29
1
C895
4.7U_0603_6.3V6M
R903
100_0402_5%
VCC1_5_B[01]
VCC1_5_B[02]
VCC1_5_B[03]
VCC1_5_B[04]
VCC1_5_B[05]
VCC1_5_B[06]
VCC1_5_B[07]
VCC1_5_B[08]
VCC1_5_B[09]
VCC1_5_B[10]
VCC1_5_B[11]
VCC1_5_B[12]
VCC1_5_B[13]
VCC1_5_B[14]
VCC1_5_B[15]
VCC1_5_B[16]
VCC1_5_B[17]
VCC1_5_B[18]
VCC1_5_B[19]
VCC1_5_B[20]
VCC1_5_B[21]
VCC1_5_B[22]
VCC1_5_B[23]
VCC1_5_B[24]
VCC1_5_B[25]
VCC1_5_B[26]
VCC1_5_B[27]
VCC1_5_B[28]
VCC1_5_B[29]
VCC1_5_B[30]
VCC1_5_B[31]
VCC1_5_B[32]
VCC1_5_B[33]
VCC1_5_B[34]
VCC1_5_B[35]
VCC1_5_B[36]
VCC1_5_B[37]
VCC1_5_B[38]
VCC1_5_B[39]
VCC1_5_B[40]
VCC1_5_B[41]
VCC1_5_B[42]
VCC1_5_B[43]
VCC1_5_B[44]
VCC1_5_B[45]
VCC1_5_B[46]
VCC1_5_B[47]
VCC1_5_B[48]
VCC1_5_B[49]
VCCA3GP
20 mils
C893
V5REF_SUS
AA26
AA27
AA3
AA6
AB1
AA23
AB28
AB29
AB4
AB5
AC17
AC26
AC27
AC3
AD1
AD10
AD12
AD13
AD14
AD17
AD18
AD21
AD28
AD29
AD4
AD5
AD6
AD7
AD9
AE12
AE13
AE14
AE16
AE17
AE2
AE20
AE24
AE3
AE4
AE6
AE9
AF13
AF16
AF18
AF22
AH26
AF26
AF27
AF5
AF7
AF9
AG13
AG16
AG18
AG20
AG23
AG3
AG6
AG9
AH12
AH14
AH17
AH19
AH2
AH22
AH25
AH28
AH5
AH8
AJ12
AJ14
AJ17
AJ8
B11
B14
B17
B2
B20
B23
B5
B8
C26
C27
E11
E14
E18
E2
E21
E24
E5
E8
F16
F28
F29
G12
G14
G18
G21
G24
G26
G27
G8
H2
H23
H28
H29
+3VS
R901
100_0402_5%
AE1
AA24
AA25
AB24
AB25
AC24
AC25
AD24
AD25
AE25
AE26
AE27
AE28
AE29
F25
G25
H24
H25
J24
J25
K24
K25
L23
L24
L25
M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27
T24
T27
T28
T29
U24
U25
V24
V25
U23
W24
W25
K23
Y24
Y25
U34E
+5VS
ICH_V5REF_SUS
CORE
V5REF
VCCP_CORE
C898
0.1U_0402_16V4Z
A15
B15
C15
D15
E15
F15
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
C1169
VCC1_05[01]
VCC1_05[02]
VCC1_05[03]
VCC1_05[04]
VCC1_05[05]
VCC1_05[06]
VCC1_05[07]
VCC1_05[08]
VCC1_05[09]
VCC1_05[10]
VCC1_05[11]
VCC1_05[12]
VCC1_05[13]
VCC1_05[14]
VCC1_05[15]
VCC1_05[16]
VCC1_05[17]
VCC1_05[18]
VCC1_05[19]
VCC1_05[20]
VCC1_05[21]
VCC1_05[22]
VCC1_05[23]
VCC1_05[24]
VCC1_05[25]
VCC1_05[26]
0.1U_0402_16V4Z
C1168
VCCRTC
0.1U_0402_16V4Z
C894
0.1U_0402_16V4Z
A6
PCI
A23
ICH_V5REF_RUN
20 mils
+RTCVCC
+VCCP
Title
Rev
1.0
KIWA5/6 LA-5081P
Sheet
1
29
of
51
5.2mm high
1218 change
+3VS
+1.5VS
+3VS
JP18
ICH_PCIE_WAKE#
BT_ACTIVE
R364 1
WLAN_ACTIVE R363 1
WLAN_CLKREQ1#
1
3
5
7
9
11
(22) CLK_PCIE_WLAN1#
13
(22) CLK_PCIE_WLAN1
15
17
19
21
23
(28) PCIE_RXN3
25
(28) PCIE_RXP3
27
29
31
(28) PCIE_TXN3
33
(28) PCIE_TXP3
35
37
39
+3VS
41
43
45
P80 port Debug
@ 100_0402_5%
47
EC_TX_P80_DATA R380 1
EC_TX_P80_DATA_R2 49
2
(36,38) EC_TX_P80_DATA
EC_RX_P80_CLK
EC_RX_P80_CLK_R2 51
1
2
(36,38) EC_RX_P80_CLK
R383
@ 100_0402_5%
53
(28,31) ICH_PCIE_WAKE#
(40) BT_ACTIVE
(40) WLAN_ACTIVE
(22) WLAN_CLKREQ1#
GND
GND
+1.5VS
2Watt
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
R369 1
0_0402_5%
WLAN@
C680
0.1U_0402_16V4Z
WL_OFF# (36)
PLT_RST# (8,16,26,31)
WLAN@
R371 1
R373 1
2 @ 0_0402_5%
2 @ 0_0402_5%
R375 1
R377 1
2 @ 0_0402_5%
2 @ 0_0402_5%
WLAN@
R378
1
2300_0402_5%
1
2
R379
300_0402_5%
WLAN@
54
TAITW_PFPET0-AFGLBG1ZZ4N0
ME@
R1094
100K_0402_5%
@
C678
WLAN@
0.1U_0402_16V4Z
WAKE#
3.3V
NC
GND
NC
1.5V
CLKREQ#
NC
GND
NC
REFCLKNC
REFCLK+
NC
GND
NC
NC
GND
NC
NC
GND
PERST#
PERn0
+3.3Vaux
PERp0
GND
GND
+1.5V
GND
SMB_CLK
PETn0 SMB_DATA
PETp0
GND
GND
USB_DNC
USB_D+
NC
GND
NC
LED_WWAN#
NC
LED_WLAN#
NC
LED_WPAN#
NC
+1.5V
NC
GND
NC
+3.3V
2 @ 0_0402_5%
2 @ 0_0402_5%
+3VALW
+3VS
ICH_SMBCLK (22,28)
ICH_SMBDATA (22,28)
USB20_N8 (28)
USB20_P8 (28)
WLAN_LED#
WLAN_LED# (39)
2005/09/27 modified.
Base on OPTION GTM351E Datasheet Rev0.1
Vcc 3.3V +/- 8%
Peak Icc 2750mA
with max supply droop 50mA
Average Icc 1000mA
JEXP1
(28)
(28)
+3VS
2
U38
+1.5VS
12
14
0_1206_5%
1
R394
+1.5VS
C688
0.1U_0402_16V4Z
2 NEWCARD@
+3VALW
(8,16,26,31) PLT_RST#
+3VS
1
C691
0.1U_0402_16V4Z
2 NEWCARD@
2
4
PLT_RST#
(36,42,47) SYSON
SYSON
20
(34,36,42,47,48) SUSP#
SUSP#
+3VALW
R395 1
(28,36)
CPUSB#
2 @ 100K_0402_5% 10
CPUSB#
9
18
+3VALW
3.3Vin
3.3Vin
3.3Vout
3.3Vout
AUX_IN
AUX_OUT
SYSRST#
SHDN#
OC#
PERST#
STBY#
NC
CPPE#
GND
CPUSB#
11
13
PAD
3
5
(22,28) ICH_SMBCLK
(22,28) ICH_SMBDATA
+1.5VS_CARD1
+1.5VS_CARD1
Imax = 0.75A
1
+3VALW_CARD1
15
40mil
NEWCARD@
C689
10U_0805_10V4Z
(28,31) ICH_PCIE_WAKE#
+3VALW_CARD1
C690
0.1U_0402_16V4Z
2 NEWCARD@
8
16
7
21
PERST#
PERST#
+3VS_CARD1
19
(22) EXP_CLKREQ#
60mil
40mil
Imax = 1.35A
1
NEWCARD@
C692
10U_0805_10V4Z
CPUSB#
(22) CLK_PCIE_EXP#
(22) CLK_PCIE_EXP
+3VS_CARD1
RCLKEN
(28) PCIE_RXN4
(28) PCIE_RXP4
C693
0.1U_0402_16V4Z
2 NEWCARD@
(28) PCIE_TXN4
(28) PCIE_TXP4
+3VALW_CARD1
Imax = 0.275A
C694
0.1U_0402_16V4Z
2 NEWCARD@
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
P2231NL_QFN20
NEWCARD@
1
3
1.5Vout
1.5Vout
+3VS_CARD1
17
USB20_N10
USB20_P10
+1.5VS_CARD1
1.5Vin
1.5Vin
NEWCARD@
USB20_N10_R
USB20_P10_R
CPUSB#
@
C695
10U_0805_10V4Z
GND
USB_DUSB_D+
CPUSB#
RSV
RSV
SMB_CLK
SMB_DATA
+1.5V
+1.5V
WAKE#
+3.3VAUX
PERST#
+3.3V
+3.3V
CLKREQ#
CPPE#
REFCLKREFCLK+
GND
PERn0
PERp0
GND
PETn0
PETp0
GND
GND
GND
SANTA_130801-5_RT
ME@
1
C696
0.1U_0402_16V4Z
2 NEWCARD@
(NEW)
Security Classification
2009/04/23
Issued Date
2010/05
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
Size
Document Number
Rev
1.0
KIWAX_LA-5081P
Date:
Sheet
E
30
of
51
L13
@
FBM-L11-321611-260-LMT_1206
1
2
+3V_LAN
+2.5V_LAN
+3VALW
L16
2
1
MBK1608601YZF_2P
C711
0.01U_0402_16V7K
(36)
EN_WOL 2
Q13 G
2N7002_SOT23
EN_WOL
C714
1U_0603_10V4Z
+AVDDL
U40
0.1U_0402_16V4Z
0.1U_0402_16V4Z
(22) CLK_PCIE_LAN#
28
(22) CLK_PCIE_LAN
29
(22) CLKREQ_LAN#
11
C716
0.1U_0402_16V4Z
+3VS
PCIE_REFCLK_P
CLKREQ
2
@ 0_0402_5%
2
1K_0402_5%
2
1K_0402_5%
53
VMAIN_PRSNT
54
VAUX_PRSNT
2
@ 0_0402_5%
59
ENERGY_DET
+GPHY_PLLVDD
35
R403
1
+3VS
R404
1
+3V_LAN
R402
41
40
42
43
48
47
49
50
TRD0_N
TRD0_P
TRD1_N
TRD1_P
TRD2_N
TRD2_P
TRD3_N
TRD3_P
PCIE_REFCLK_N
+1.2V_LAN
2
1
L17 MBK1608601YZF_2P 1
C701
1U_0603_10V4Z
C708
0.1U_0402_16V4Z
C707
0.1U_0402_16V4Z
C712
+LAN_BIASVDD
1
C713
2
C706
0.1U_0402_16V4Z
LAN_TX0LAN_TX0+
LAN_RX1LAN_RX1+
LAN_TX0- (32)
LAN_TX0+ (32)
LAN_RX1- (32)
LAN_RX1+ (32)
T109
T110
T107
T108
+3V_LAN
LOW PWR
2 R405 1
1 R406 1
67 R407 1
66
LINKLED
SPD100LED
SPD1000LED
TRAFFICLED
0_0402_5%
2
0_0402_5%
2
2 @ 0_0402_5%
C715 1
LINKLED# (32)
ACTIVITY# (32)
2 0.1U_0402_16V4Z
C709
C710
0.047U_0402_16V4Z
1
1
0.047U_0402_16V4Z
+LAN_AVDD
2
C705
0.1U_0402_16V4Z
2
1
MBK1608601YZF_2P
C702
4.7U_0805_10V4Z
R401
33K_0402_5%
C700
0.1U_0402_16V4Z
2
G
1
21.5
L15
AO3414_SOT23-3
1
C697
0.1U_0402_16V4Z
C699
0.1U_0402_16V4Z
+5VALW
+1.2V_LAN
3 Q12
+XTALVDD
2
C698
10U_0805_10V4Z
L14
2
1
MBK1608601YZF_2P
C704
0.1U_0402_16V4Z
C703
0.1U_0402_16V4Z
MMJT9435T1G_SOT223
C722
4.7U_0805_10V4Z
2
1
L20 MBK1608601YZF_2P 1
C724
1U_0603_10V4Z
31
(28) PCIE_ITX_C_PRX_P6
(28) PCIE_IRX_PTX_N6
0.1U_0402_16V7K
(28) PCIE_IRX_PTX_P6
0.1U_0402_16V7K
+PCIE_PLLVDD
PCIE_MRX_C_LTX_N6
PCIE_RXD_P
25
PCIE_TXD_N
C720
PCIE_MRX_C_LTX_P6
26
C723
0.1U_0402_16V4Z
10
(8,16,26,30) PLT_RST#
@ 1
R410
+PCIE_VDD
2
0_0402_5%
PERST
12
WAKE
C725
0.1U_0402_16V4Z
+3V_LAN
+3V_LAN
1
R414
1
R415
2
@ 4.7K_0402_5%
2
@ 4.7K_0402_5%
+3V_LAN
1
R411
1
R412
2
@ 47K_0402_5%
2
@ 47K_0402_5%
1
R413
LAN_WP
2
0_0402_5%
SMB_CLK
57
GPIO_0(SERIAL_DO)
GPIO_1(SERIAL_DI)
8
2
@ 0_0402_5%
GPIO_2
UART_MODE
XTALO
XTALI
Y6
1
2
25MHZ_20P
2
4
23
6
15
19
56
61
+XTALVDD
VDDP
VDDP
17
68
+2.5V_LAN
5
13
20
34
55
60
+1.2V_LAN
XTALI
21
XTALI
XTALO
22
XTALO
16
REG_GND
24
PCIE_GND
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
36
30
27
33
AVDD
AVDD
AVDD
AVDDL
AVDDL
AVDDL
AVDDL
1
R409
R1098
10K_0402_5%
@
R1099
10K_0402_5%
@
C719
10U_0805_10V4Z
+3V_LAN
+3V_LAN
Q15
MBT35200MT1G_TSOP6
CTL25
+LAN_BIASVDD
+PCIE_PLLVDD
+PCIE_VDD
38
45
52
+LAN_AVDD
39
44
46
51
+AVDDL
+2.5V_LAN
69
200_0402_1%
1
C730
27P_0402_50V8J
C729
27P_0402_50V8J
C728
0.1U_0402_16V4Z
C726
0.1U_0402_16V4Z
C727
10U_0805_10V4Z
R417
XTALVDD
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
BIASVDD
PCIE_PLLVDD
PCIE_VDD
PCIE_VDD
+2.5V_LAN
14
18
37
SMB_DATA
GPIO2
1
R416
58
CTL12
CTL25
2
1K_0402_5%
REGCTL12
REGCTL25
RDAC
PCIE_TXD_P
C721
(28,30) ICH_PCIE_WAKE#
(36) LAN_WAKE#
Q14
2
1
L19 MBK1608601YZF_2P 2
+1.2V_LAN
LAN_DATA
PCIE_RXD_N
1
2
5
6
GPHY_PLLVDD
32
(28) PCIE_ITX_C_PRX_N6
C718
0.1U_0402_16V4Z
CTL12
C717
4.7U_0805_10V4Z
+GPHY_PLLVDD
2
1
L18 MBK1608601YZF_2P 2
LAN_CLK
65
63
64
62
SCLK(EECLK)
SI
SO(EEDATA)
CS
GND
R408 1
(26) PCI_CBE#3
+3V_LAN
R419
4.7K_0402_5%
2
R418
4.7K_0402_5%
C731
0.1U_0402_16V4Z
U41
8
7
6
5
LAN_WP
LAN_CLK
LAN_DATA
VCC
WP
SCL
SDA
A0
A1
NC
GND
1
2
3
4
AT24C02_SO8
A
LAN_CLK
2
4.7K_0402_5%
Security Classification
Issued Date
1
R420
2009/04/23
2010/05
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Rev
1.0
KIWA5/6 LA-5081P
Sheet
1
31
of
51
+2.5V_LAN
RJ45 CONN
EMI request
R421
2 0.1U_0402_16V4Z
(31)
C732 1
R422
0_0402_5%
2
C733 1
2 0.1U_0402_16V4Z
C735 1
LAN_RX1+
LAN_RX1-
TCT
TCT
2 0.1U_0402_16V4Z
(31)
(31)
LAN_RX1+
LAN_RX1-
LAN_TX0+
LAN_TX0-
LAN_TX0+
LAN_TX0-
1
2
3
4
5
6
7
8
RD+
RDCT
NC
NC
CT
TD+
TD-
330_0402_5%
1
RX+
RXCT
NC
NC
CT
TX+
TX-
16
15
14
13
12
11
10
9
MDO1+
MDO1MCT0
MCT1
MDO0+
MDO0-
220P_0402_50V7K
C734
R423
R424
2
2
1
1
JRJ45
12
11
+3V_LAN
U42
(31)
(31)
ACTIVITY#
75_0402_5%
RJ45_PR
MDO1-
Amber LED+
SHLD4
PR4-
SHLD3
PR4+
75_0402_5%
(31)
PR3+
PR2+
MDO0-
PR1-
MDO0+
330_0402_5%
1
1
C736
220P_0402_50V7K
Green LED-
Green LED+
FOX_JM36113-P2221-7F
ME@
C737
1
2 0.1U_0402_16V4Z
RJ45_PR
1
2
C738
1000P_1206_2KV7K
R428
0_0402_5%
C739
1
2 0.1U_0402_16V4Z
1
49.9_0402_1%
1
49.9_0402_1%
13
SHLD1
LAN_TX0- 2
R429
LAN_TX0+ 2
R430
14
SHLD2
PR1+
10
1
49.9_0402_1%
1
49.9_0402_1%
15
PR3-
MDO1+
+3V_LAN
LAN_RX1- 2
R426
LAN_RX1+ 2
R427
LINKLED#
16
PR2-
350uH_NS0013LF
R425
Amber LED-
Security Classification
2009/04/23
Issued Date
2010/05
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Rev
1.0
KIWA5/6 LA-5081P
Sheet
1
32
of
51
+5VS
+3VS
1
1
1
C740
1000P_0402_50V7K
1
C741
0.1U_0402_16V4Z
1
C742
1U_0603_10V4Z
1
C743
10U_0805_10V4Z
1
C744
10U_0805_10V4Z
@
C745
0.1U_0402_16V4Z
JP22
JP21
(27) SATA_ITX_DRX_P0
(27) SATA_ITX_DRX_N0
2
(27) SATA_DTX_C_IRX_N0
(27) SATA_DTX_C_IRX_P0
SATA_DTX_C_IRX_N0
SATA_DTX_C_IRX_P0
C796 1
C797 1
2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
SATA_ITX_DRX_P0
SATA_ITX_DRX_N0
SATA_DTX_IRX_N0
SATA_DTX_IRX_P0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
+3VS
+5VS
23
24
GND
A+
AGND
BB+
GND
SATA_ITX_DRX_P1
SATA_ITX_DRX_N1
(27) SATA_ITX_DRX_P1
(27) SATA_ITX_DRX_N1
SATA_DTX_C_IRX_N1
SATA_DTX_C_IRX_P1
(27) SATA_DTX_C_IRX_N1
(27) SATA_DTX_C_IRX_P1
C746 1
C798 1
1
2
3
4
5
6
7
2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
VCC3.3
VCC3.3
VCC3.3
GND
GND
GND
VCC5
VCC5
VCC5
GND
RESERVED
GND
VCC12
VCC12
VCC12
SATA_DTX_IRX_N1
SATA_DTX_IRX_P1
8
9
10
11
12
13
+5VS
GND
A+
AGND
BB+
GND
GND
GND
14
15
2
DP
+5V
+5V
MD
GND
GND
OCTEK_SLS-13SD1G_NR
ME@
G1
G2
OCTEK_SAT-22SB1G_RV
ME@
Issued Date
2009/04/23
2010/05
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Security Classification
Title
Document Number
Rev
1.0
KIWA5/6 LA-5081P
Date:
Sheet
33
H
of
51
AUDIO CODEC
CODEC POWER
0308_Change R294 and R295 from 0 ohm to bead, C363 from 10uF to 680pF, C365 and C368 from 0.1uF to 680p
For Layout:
Place decoupling caps near the power pins of
SmartAMC device.
33_0402_5% 6
33_0402_5%10
33_0402_5% 8
33_0402_5% 5
R3
CX20548
AMOM DAA
2 0_0402_5% DIBP_C
2 0_0402_5% DIBN_C
43
42
PC_BEEP
12
100K_0402_5%
48
1
R1052 1
R1053
2
2 10K_0402_5%
10K_0402_5%
BIT_CLK
SYNC
SDATA_IN
SDATA_OUT
EAPD
MIC_L
MIC_R
20
21
MONO
STEREO_L
STEREO_R
29
30
31
S/PDIF
GPIO2
GPIO1
EAPD/GPIO0
C1082
1
1
C2
2.2U_0603_6.3V6K
2
2
2.2U_0603_6.3V6K
1
C1084
2
2.2U_0603_6.3V6K
2
R1041
C1081
R1048 2
2
R17
1100_0402_5%
1
100_0402_5%
SHDN#
BP
C1066
0.1U_0402_16V4Z
C1067
1
4.7U_0805_10V4Z
<BOM Structure>
R1034
MIC_EXTL
MIC_EXTR
GND
EXT_MIC_L (35)
EXT_MIC_R (35)
external MIC
2
27
28
PORTD_L
PORTD_R
PC_BEEP
MIC_C_BIAS
18
16
17
MICBIASC
PORTC_L
PORTC_R
DIB_P
DIB_N
HP_OUTL (35)
HP_OUTR (35)
2
R1038
R19
1K_0402_5%
MIC_C_BIAS
10U_0805_10V4Z
C1075
1U_0603_10V4Z
C1080
0.1U_0402_16V4Z
+3VAMP_CODEC
2
OUT
1
APE8805A-33Y5P_SOT23-5
@
@
C1076
0.1U_0402_16V4Z
2
19
14
15
MICBIASB
PORTB_L
PORTB_R
1
(36)
45
46
47
(3.33V)
250mW
+VDDA_CODEC
U64
VIN
(30,36,42,47,48) SUSP#
34
35
PORTA_L
PORTA_R
11/20 update
PC_BEEP dB control
RESET#
@
1
1
@
R1032
2
1
+VDDA_CODEC
MBV2012301YZF_0805
1
4.7K_0402_5%
HDA_BITCLK_CODEC
HDA_SYNC_CODEC
HDA_SDIN2
HDA_SDOUT_CODEC
2
2
2
2
+5VALW
@
1
2
1
C1065 0.1U_0402_16V4Z
2
W=40Mil
1
2.2K_0402_5%
2 33_0402_5%11
R1044 1
R1045 1
R1046 1
R1047 1
C1160
2
R1042 1
R1049
R1051
C1074
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
HDA_RST_CODEC#
DIBP_HS
DIBN_HS
C1079
26
40
36
C1073
680P_0402_50V7K
@ C1072
0.1U_0402_16V4Z
C1071
0.1U_0402_16V4Z
C1070
680P_0402_50V7K
AVDD_26
AVDD_40
AVEE
1
2
1
2
C1159
2
0.01U_0402_16V7K
1
<BOM Structure>
U65
R1037
0_0402_5%
1 GM_HDMI@
2
<BOM Structure>
+1.5VS
(8,16,27)
R1043
3.9K_0603_1%
(8,16,27)
@
(8,16,27)
(27)
(8,16,27)
9
4
3
44
R1036
4.7K_0603_5% 0_0603_5%
PMIGM_NOHDMI@
@
+3VAMP_CODEC
VDD_IO
DVDD_1-8
DVDD_3-3
DVDD_44
C1077
C1078
R1036
+3VDD_CODEC
10U_0805_10V4Z
C1068
680P_0402_50V7K
+3VALW
R1031
1
2
MBV2012301YZF_0805
R1033
1
2
MBV2012301YZF_0805
@
0.1U_0402_16V4Z
+3VS
C1069
1U_0603_10V4Z
+3VDD_CODEC
+3VS
R1030
2
1
MBV2012301YZF_0805
1
2
C1064 4.7U_0805_10V4Z
1
2.2K_0402_5%
10U_0805_10V4Z
MIC_INL
MIC_INR
INT_MICL
11/20 update
Internal WOOFER
LINE_OUTL (35)
LINE_OUTR (35)
Internal SPKR.
+3VAMP_CODEC
VC_REFA
22
23
32
33
VREF_LO
VREF_HI
RESERVED_32
RESERVED_33
CX20561-12Z_LQFP48_7X7
C1089
1
R1054
2
5.1K_0402_1%
1
R1055
2
5.1K_0402_1%
1
R1057
2
20K_0402_5%
Port A
PLUG_IN (35)
Port C
MIC_JD (35)
port
port
port
port
A
B
C
D
:
:
:
:
5.11K
10.0K
20.0K
39.2K
ohm
ohm
ohm
ohm
0216_Change value.
33P_0402_50V8K
PM@
R1058
10K_0402_1%
2
C1092
1
2
0.1U_0402_16V4Z
1U_0603_10V4Z
R1059
10K_0402_1%
R1064
1
4
R1065
1
PC_BEEP
MIC1
1
2
560_0402_5%
1U_0603_10V4Z
GNDA
WM-64PCY_2P
45@
R1062
20K_0402_5%
2
0_0603_5%
1
INT_MICL
1
R1077
C1158
47P_0402_50V8J
2
GNDA
@
C1102
(28)
SB_SPKR
1 1
R1066
560_0402_5%
GNDA
D44 @
RB751V_SOD323
R1067
2
10K_0402_5%
Security Classification
2009/04/23
Issued Date
R25
0_0402_5%
@ C
Q46
2
B
2SC2411KT146_SOT23-3
E
2
0_0402_5%
2
0_0402_5%
C1096 1U_0603_10V4Z
2
1
2 PC_BEEP1
R1060 20K_0402_5%
@ 0.1U_0402_16V4Z
1U_0603_10V4Z
GND
2
BEEP#
C1101
2
0_0402_5%
1 1
R1061
(36)
C1098
2
R1063
1
C1095
1
2
0.1U_0402_16V4Z
C1097
1
2
0.1U_0402_16V4Z
1C1093
C1094
1
2
0.1U_0402_16V4Z
ANALOG
DIGITAL
+3VS
2
1U_0603_10V4Z
C1088
VREF_HI
VREF_LO
1
C1086
C1087
For Vista
10U_0805_10V4Z
PM@
SENSE
24
0.1U_0402_16V4Z
47_0402_1%
7
41
C1089
10P_0402_50V8J
AVSS_25
AVSS_38
DVSS_7
DVSS_41
2
GM@
2
13
39
37
FLY_P
FLY_N
R1056
33_0402_5%
GM@
1
VREF
C1090
1U_0603_10V4Z
R1056
DMIC_CLOCK
DMIC_1/2
25
38
1
2
C1091
1U_0603_10V4Z
SENSEA
HDA_BITCLK_CODEC
2010/05
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
Title
Rev
1.0
KIWA5/6 LA-5081P
Sheet
E
34
of
51
Speaker Connector
+3VALW
+5VAMP
VDD
PVDD
PVDD
NC
SHUTDOWN
GAIN0
GAIN1
LINE_OUTR
0.033U_0402_16V7K
LIN-
RIN
17
RIN-
LIN+
RIN+
C571
R38
10K_0402_5%
10K_0402_5%
R37
1
C572
0.1U_0402_16V4Z
20MIL
SPK_R12
SPK_R2+ 0_0603_5%2
SPK_L1- 0_0603_5%2
SPK_L2+ 0_0603_5%2
0_0603_5%
C574
0.1U_0402_16V4Z
1
2
3
4
5
6
Near JP14
R34
LOUT-
SPK_L1-
ROUT-
14
SPK_R1-
LOUT+
SPK_L2+
ROUT+
18
SPK_R2+
GND
GND
GND
GND
GND
1
11
13
20
21
BYPASS
10
2 EC_MUTE#
0_0402_5%
EC_MUTE# (36)
+5VAMP
20mil
6dB
10dB
15.6dB
21.6dB
+5VAMP
R35
100K_0402_1%
R36
100K_0402_1%
GAIN0
R39
100K_0402_1%
APA2031RI-TRL_TSSOP20
C573
4.7U_0805_10V4Z
GAIN1
R40
100K_0402_1%
@
JP23
R_SPK_R11
1 R41 R_SPK_R2+
1 R42 R_SPK_L11 R48 R_SPK_L2+
R49
AMP_OFF#
GAIN1
0
1
0
1
LINE_OUTR
LIN
19
8
GAIN1
C570
2
(34)
0.033U_0402_16V7K
LINE_OUTL
1
LINE_OUTL
(34)
GAIN0
GAIN0
0
0
1
1
12
16
6
15
2 1
U45
C569
4.7U_0805_10V4Z
C568
0.1U_0402_16V4Z
2 1
1
D
R33
10K_0402_5%
@
R32
W=40mil
2
0_0603_5%
+5VS
D8
1
2
3
4
G5
G6
R_SPK_R1-
R_SPK_R2+
1
@ PJDLC05_SOT23-3
D9
ACES_85205-04001
ME@
R_SPK_L1-
R_SPK_L2+
1
@ PJDLC05_SOT23-3
Audio Jack
220P_0402_50V7K
(34) EXT_MIC_L
Headphone
GNDA
SM010018110
EXT_MIC_L-2
1
2
S SUPPRE_ KC FBMA-L10-160808-800LMT 0603
EXT_MIC_L
R50
@ R51
1K_0402_5%
@ R52
1K_0402_5%
C575
C576
220P_0402_50V7K
GNDA
1
C577
47P_0402_50V8J
@ C578
10P_0402_50V8J
Audio Jack
GNDA
GNDA
(34) HP_OUTL
(34) HP_OUTR
(34) PLUG_IN
HP_OUTL
HP_OUTR
GNDA
SM010018110
EXT_MIC_R-2
1
2
R53
S SUPPRE_ KC FBMA-L10-160808-800LMT 0603
JHP1
PL-OUT
R1096
56_0402_1%
1SM010018110
2
R55
S SUPPRE_ KC FBMA-L10-160808-800LMT 0603
PR-OUT
R1097
56_0402_1%
1SM010018110
2
R54
S SUPPRE_ KC FBMA-L10-160808-800LMT 0603
PLUG_IN
1
2
6
3
(34) EXT_MIC_R
EXT_MIC_R
4
2
5
FOX_JA6333L-B3S0-7F
ME@
1
C579
47P_0402_50V8J
GNDA
(34) MIC_JD
MIC IN
@ C580
10P_0402_50V8J
JMIC1
1
2
6
3
GNDA
MIC_JD
4
GNDA 5
1
10P_0402_50V8J
FOX_JA6333L-B3S0-7F
ME@
C581
@
2
GNDA
Security Classification
2009/04/23
Issued Date
Deciphered Date
2010/05
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Rev
1.0
KIWA5/6 LA-5081P
Sheet
1
35
of
51
+3VALW
+EC_AVCC
(28)
EC_SCI#
KSO[0..15]
KSO[0..15]
(38)
KSI[0..7]
KSI[0..7]
R931
R932
47K_0402_5%
47K_0402_5%
<BOM Structure>
<BOM Structure>
2
EC_RST#
EC_SCI#
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
+3VALW
(38)
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
KSO1
KSO2
1
2
3
4
5
7
8
10
12
13
37
20
38
55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82
AVCC
67
9
22
33
96
111
125
VCC
VCC
VCC
VCC
VCC
VCC
GA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1
LAD0 LPC & MISC
INVT_PWM/PWM1/GPIO0F
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
ACOFF/FANPWM2/GPIO13
PWM Output
AD
PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D
BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
Input
AD3/GPIO3B
AD4/GPIO42
SELIO2#/AD5/GPIO43
DA Output
KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25 Int. K/B
KSO6/GPIO26 Matrix
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
77
78
79
80
SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47
63
64
65
66
75
76
BATT_TEMP
BATT_OVP
68
70
71
72
DAC_BRIG
EN_FAN1
IREF
PS2 Interface
SDICS#/GPXOA00
SDICLK/GPXOA01
SDIDO/GPXOA02
SDIDI/GPXID0
GPIO
SM Bus
SPIDI/RD#
SPIDO/WR#
SPICLK/GPIO58
SPICS#
CIR_RX/GPIO40
CIR_RLC_TX/GPIO41
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
BATT_LOW_LED#/GPIO54
SUSP_LED#/GPIO55
SYSON/GPIO56
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59
PCI_PME#
+3VALW
(41)
KILL_SW#
(5) FAN_SPEED1
3G_OFF#
(30,38) EC_TX_P80_DATA
(30,38) EC_RX_P80_CLK
(41)
ON/OFF#
(39) PWR_LED_SC#
@ Q17
2N7002_SOT23
FAN_SPEED1
EC_TX_P80_DATA
EC_RX_P80_CLK
NUM_LED#
XCLKI
XCLKO
1
R74
FRD#SPI_SO
2
@ 100K_0402_1%
1
R75
FSEL#SPICS#
2
@ 100K_0402_1%
1
R77
KSO17
2
@ 10K_0402_5%
122
123
+3VALW
+5VALW
KB926QFA1_LQFP128
PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPXID3
GPXID4
GPXID5
GPXID6
GPXID7
GPI
V18R
ECAGND
2 LID_SW#
100K_0402_1%
1
R76 @
EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
GPO
BKOFF#/GPXO08
WL_OFF#/GPXO09
GPXO10
GPXO11
XCLK1
XCLK0
GND
GND
GND
GND
GND
+3VALW
2 @ 0_0603_5%
TSATN#
(8)
TP_CLK
TP_DATA
+5VS
TP_CLK
1
R219
EC_SMB_DA1
2
4.7K_0402_5%
ENE@
ESB_DA_R
1
2
R220
2.2K_0402_5%
TP_DATA R62
2 4.7K_0402_5%
R65
2 @ 10K_0402_5%
1
USB_ON
R66
1 @
BATT_TEMP
2 10K_0402_5%
ACIN
1
C526
1
C527
1
C528
2 4.7K_0402_5%
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
TP_CLK (38)
TP_DATA (38)
R67
97
98
99
109
2 @ 4.7K_0402_5%
EN_WOL (31)
BATT_SEL_EC (45)
CMOS_OFF# (40)
FRD#SPI_SO
FWR#SPI_SI
SPI_CLK
FSEL#SPICS#
119
120
126
128
73
74
89
90
91
92
93
95
121
127
100
101
102
103
104
105
106
107
108
FRD#SPI_SO
FWR#SPI_SI
SPI_CLK
FSEL#SPICS#
+3VS
(39)
(39)
(39)
(39)
R68
10K_0402_5%
I2C_INT
+3VALW
I2C_INT
CHARGE_LED0#
CAPS_LED#
CHARGE_LED1#
SYSON
ACIN
EC_RSMRST#
EC_LID_OUT#
EC_ON
110
112
114
115
116
117
118
ICH_POK_EC
BKOFF#
EC_THERM#
SUSP#
PBTN_OUT#
I2C_INT (41)
FSTCHG (45)
CHARGE_LED0# (39)
R21
10K_0402_5%
CHARGE_LED1# (39)
SYSON
VR_ON
ACIN
(30,42,47)
(49)
(28,43,45)
EC_RSMRST# (28)
EC_LID_OUT# (28)
EC_ON
(41)
D39
1
EC_RSMRST#
RB751V_SOD323
ICH_POK
2
BKOFF# (24)
1
WL_OFF# (30)
R72
DDR3_SM_PWROK
2
1
0_0402_5% R73
@
ICH_POK (8,28)
2
+3VS
4.7K_0402_5%
SLP_S4# (28)
ENBKL
(24)
EAPD
(34)
EC_THERM# (28)
SUSP# (30,34,42,47,48)
PBTN_OUT# (28)
BT_OFF# (40)
ESB_CK_R
124
1
1
C529
1U_0603_10V4Z
CAPS_LED#
C927
1U_0603_10V4Z
@
D2 version
SA00001J570
ESB_DA_R
NUM_LED#
ESB_CK_R
2
2.2K_0402_5%
1
1
1
R218
BATT_OVP
SUSP#
EC_SMB_CK1
2
4.7K_0402_5%
R61
+3VALW
EC_MUTE# (35)
USB_ON (40)
USB_ON
+3VS
1
R78
R221
0_0402_5%
ESB_CK
1
2
R1090 0_0402_5%
ENE@
1
2
R1091 0_0402_5%
NOSB@
ESB_CK
(41)
ESB_DA
1
2
R1092 0_0402_5%
ENE@
1
2
R1093 0_0402_5%
NOSB@
ESB_DA
(41)
@
C530
1000P_0402_50V7K
ENE@
+3VS
2
C532
R59
DAC_BRIG (24)
EN_FAN1 (5)
IREF
(45)
CHGVADJ (45)
SPI_CLK
1
15P_0402_50V8J
C531
10P_0402_50V8J
XCLKO
@
C533
100P_0402_50V8J
EC_SMB_CK2
EC_SMB_DA2
X1
3
NC
OUT
NC
IN
@
32.768KHZ_12.5PF_1TJS125BJ4A421P
C534
100P_0402_50V8J<BOM Structure>
2
1
C535
15P_0402_50V8J
@
R224
20M_0603_5%
2
R223
2.7K_0402_5%
2
R222
2.7K_0402_5%
2
(26)
EC_PME#
2
@ 0_0402_5%
TSATN#_EC
AGND
1
R71
EC_SMI#
LID_SW#
ESB_CK_R
ESB_DA_R
PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
GPIO
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A
69
2
0_0402_5%
R70
6
14
15
16
17
18
19
25
28
29
30
31
32
34
36
BATT_TEMPA (44)
BATT_OVP (45)
ADP_I
(45)
CPUSB# (28,30)
CPUSB#
11
24
35
94
113
(31) LAN_WAKE#
(28) SLP_S3#
(28) SLP_S5#
(28) EC_SMI#
(41) LID_SW#
INVT_PWM (24)
BEEP#
(34)
NOVO#
(41)
ACOFF
(45)
ACOFF
83
84
85
86
87
88
R69
10K_0402_5%
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
INVT_PWM
BEEP#
EC_MUTE#
PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C
PSDAT2/GPIO4D
TP_CLK/PSCLK3/GPIO4E
TP_DATA/PSDAT3/GPIO4F
+3VALW
(44)
(44)
(5,16)
(5,16)
DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3E
DA3/GPIO3F
21
23
26
27
(22) CLK_PCI_LPC
(26,38) PCI_RST#
KB_RST#_EC
1
@
10_0402_5%
R58
2
47K_0402_5%
C524
0.1U_0402_16V4Z
GATEA20
(28,38)
SERIRQ
(27,38) LPC_FRAME#
(27,38) LPC_AD3
(27,38) LPC_AD2
(27,38) LPC_AD1
(27,38) LPC_AD0
1
R57
(27)
2
U46
+3VALW
2
0_0402_5%
D38
2
RB751V_SOD323
@
2
1
2
@ C525 22P_0402_50V8J
C523
1000P_0402_50V7K
KB_RST#
C520
1000P_0402_50V7K
(27)
C519
0.1U_0402_16V4Z
1
R56
C518
0.1U_0402_16V4Z
+3VALW
C517
0.1U_0402_16V4Z
C516
0.1U_0402_16V4Z
L21 1
2
+EC_AVCC
FBM-11-160808-601-T_0603
2
1
C521
C522
0.1U_0402_16V4Z
1000P_0402_50V7K
1
2 1 ECAGND 2
L22
FBM-11-160808-601-T_0603
XCLKI
Security Classification
Issued Date
2009/04/23
Deciphered Date
2010/05
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Rev
1.0
KIWA5/6 LA-5081P
Sheet
36
of
51
+VCC_3IN1
CARD@
C506
+3VALW
0.1U_0402_16V4Z
+3VALW
0.1U_0402_16V4Z
+3VALW
Trace width:20mil
1
0.1U_0402_16V4Z
Trace width:20mil
C507
CARD@
C508
1
T3
C509
CARD@
1
C512
C511
CARD@
10U_0805_6.3V6M
2
CARD@
CARD@
R252
0_0402_5%
(22) CLK_48M_CR
(28)
(28)
USB20_N7
USB20_P7
CLK_48M_CR
USB20_N7
USB20_P7
1
3
7
9
11
33
AV_PLL
NC
NC
CARD_3V3
D3V3
D3V3
8
44
45
47
48
3V3_IN
RST#
MODE_SEL
XTLO
XTLI
4
5
14
DM
DP
GPIO0
1
C600
47P_0402_50V8J
2 @
2
R229
6.19K_0402_1%
CARD@
10U_0805_6.3V6M
100K_0402_1%
JP34
RREF
12
32
DGND
DGND
6
46
AGND
AGND
C510
VREG
MS_D4
NC
10
22
30
XD_CLE_SP19
XD_CE#_SP18
XD_ALE_SP17
SD_DAT2/XD_RE#_SP16
SD_DAT3/XD_WE#_SP15
XD_RDY_SP14
SD_DAT4/XD_WP#/MS_D7_SP13
SD_DAT5/XD_D0/MS_D6_SP12
SD_CLK/XD_D1/MS_CLK_SP11
SD_DAT6/XD_D7/MS_D3_SP10
MS_INS#_SP9
SD_DAT7/XD_D2/MS_D2_SP8
SD_DAT0/XD_D6/MS_D0_SP7
SD_DAT1/XD_D3/MS_D1_SP6
XD_D5_SP5
XD_D4/SD_DAT1_SP4
SD_CD#_SP3
SD_WP_SP2
XD_CD#_SP1
EEDI
43
42
41
40
39
38
37
35
34
31
29
28
27
26
25
23
21
20
19
18
XTAL_CTR
MS_D5
13
24
EEDO
EECS
EESK
SD_CMD
15
16
17
36
2
1U_0603_10V4Z
SD_DATA5_XD_DATA0_MS_DATA6
SD_CLK_XD_DATA1_MS_CLK
SD_DATA7_XD_DATA2_MS_DATA2
XD_DATA3_MS_DATA1
XD_DATA4_SD_DATA1
XD_DATA5_MS_BS
SD_DATA0_XD_DATA6_MS_DATA0
SD_DATA6_XD_DATA7_MS_DATA3
32
10
9
8
7
6
5
4
XD-D0
XD-D1
XD-D2
XD-D3
XD-D4
XD-D5
XD-D6
XD-D7
SD_DATA3_XD_WE#
SD_DATA4_XD_WP#_MS_DATA7
XD_ALE
XD_CD#
XD_RDY
SD_DATA2_XD_RE#
XD_CE#
XD_CLE
34
33
35
40
39
38
37
36
XD-WE
XD-WP
XD-ALE
XD-CD
XD-R/B
XD-RE
XD-CE
XD-CLE
11
31
7IN1 GND
7IN1 GND
CARD@
XD_CLE
XD_CE#
XD_ALE
SD_DATA2_XD_RE#
SD_DATA3_XD_WE#
XD_RDY
SD_DATA4_XD_WP#_MS_DATA7
SD_DATA5_XD_DATA0_MS_DATA6
SD_CLK_XD_DATA1_MS_CLK
SD_DATA6_XD_DATA7_MS_DATA3
MS_INS#
SD_DATA7_XD_DATA2_MS_DATA2
SD_DATA0_XD_DATA6_MS_DATA0
XD_DATA3_MS_DATA1
XD_DATA5_MS_BS
XD_DATA4_SD_DATA1
SD_CD#
SD_WP
XD_CD#
R96
2
0_0402_5%
CARD@
20mil
MS_CLK
SD_CLK
CARD@
@
C606
10P_0402_50V8J
XD-VCC
41
42
2
2
1
1
@
C607
10P_0402_50V8J
7 IN 1 CONN
SD-VCC
MS-VCC
21
28
SD_CLK
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3
SD-DAT4
SD-DAT5
SD-DAT6
SD-DAT7
SD-CMD
SD-CD-SW
20
14
12
30
29
27
23
18
16
25
1
SD-WP-SW
MS-SCLK
MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3
MS-INS
MS-BS
26
17
15
19
24
22
13
SD_CLK
SD_DATA0_XD_DATA6_MS_DATA0
XD_DATA4_SD_DATA1
SD_DATA2_XD_RE#
SD_DATA3_XD_WE#
SD_DATA4_XD_WP#_MS_DATA7
SD_DATA5_XD_DATA0_MS_DATA6
SD_DATA6_XD_DATA7_MS_DATA3
SD_DATA7_XD_DATA2_MS_DATA2
SD_CMD
SD_CD#
SD_WP
MS_CLK
SD_DATA0_XD_DATA6_MS_DATA0
XD_DATA3_MS_DATA1
SD_DATA7_XD_DATA2_MS_DATA2
SD_DATA6_XD_DATA7_MS_DATA3
MS_INS#
XD_DATA5_MS_BS
7IN1 GND
7IN1 GND
TAITW_R015-B10-LM_NR
ME@
+3VALW
C514
CARD@
C515
CARD@
SD_CMD
CLK_48M_CR
R929
@
2
0.1U_0402_16V4Z
close to U47
Trace width:20mil
0.1U_0402_16V4Z
RST#
MODE SEL
0.1U_0402_16V4Z
@
1
Trace width:20mil
C
7 in 1 Card Reader
+VCC_3IN1
C926
0.1U_0402_16V4Z
2
CARD@
U47
T2
Trace width:20mil
RTS5159-GR_LQFP48_7X7
CARD@
R928
22.1_0402_1%
CARD@
B
+3VALW
B
2
C601
10P_0402_50V8J
1
CARD@
R226
CARD@
100K_0402_5%
1
RST#
R252
NC
Yes
NC
47pF
Yes
NC
NC
NC
680pF
10K
180pF
10K
680pF
MS Formatter(*2)
C513
CARD@
1U_0603_10V4Z~D
R930
510K_0402_1%
@
Description
Recommended
Yes
Compatible with
RTS5158E
Yes
LED ON (*3)
LED ON (*3)
Yes
Security Classification
Issued Date
2009/04/23
Deciphered Date
2010/05
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Rev
1.0
KIWAX_LA-5081P
Sheet
1
37
of
51
Source:SP01000IE00
2nd source:SP01000IF00
30 pin
INT_KBD Conn.
KSI[0..7]
D
KSI[0..7]
KSO[0..15]
EC DEBUG PORT
JP26
KSI1
KSI7
KSI6
KSO9
KSI4
KSI5
KSO0
KSI2
KSI3
KSO5
KSO1
KSI0
KSO2
KSO4
KSO7
KSO8
KSO6
KSO3
KSO12
KSO13
KSO14
KSO11
KSO10
KSO15
(36)
KSO[0..15] (36)
KSO2
C478 1
2 @ 100P_0402_50V8J
KSO1
C479 1
2 @ 100P_0402_50V8J
KSO15
C480 1
2 @ 100P_0402_50V8J
KSO7
C477 1
2 @ 100P_0402_50V8J
KSO6
C481 1
2 @ 100P_0402_50V8J
KSI2
C482 1
2 @ 100P_0402_50V8J
KSO8
C483 1
2 @ 100P_0402_50V8J
KSO5
C484 1
2 @ 100P_0402_50V8J
KSO13
C485 1
2 @ 100P_0402_50V8J
KSI3
C486 1
2 @ 100P_0402_50V8J
KSO12
C487 1
2 @ 100P_0402_50V8J
KSO14
C488 1
2 @ 100P_0402_50V8J
KSO11
C489 1
2 @ 100P_0402_50V8J
KSI7
C490 1
2 @ 100P_0402_50V8J
KSO10
C491 1
2 @ 100P_0402_50V8J
KSI6
C492 1
2 @ 100P_0402_50V8J
KSO3
C493 1
2 @ 100P_0402_50V8J
KSI5
C494 1
2 @ 100P_0402_50V8J
KSO4
C495 1
2 @ 100P_0402_50V8J
KSI4
C496 1
2 @ 100P_0402_50V8J
KSI0
C497 1
2 @ 100P_0402_50V8J
KSO9
C498 1
2 @ 100P_0402_50V8J
KSO0
C499 1
2 @ 100P_0402_50V8J
KSI1
C500 1
2 @ 100P_0402_50V8J
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
JP25
+3VALW
(30,36) EC_TX_P80_DATA
(30,36) EC_RX_P80_CLK
26
25
+5VS
E-T_6905-E24N-01R
ME@
JP27
1
2
3
4
5
6
7
8
TP_CLK
TP_DATA
SW /L
SW /R
TP_CLK
TP_DATA
6
5
(36)
(36)
ACES_85201-06051
ME@
SW 1
EVQPLHA15_4P
+5VS
JP28
+5VS
+3VS
CLK_PCI_DB
SERIRQ
CLK_14M_SIO (22)
LPC_AD0 (27,36)
LPC_AD1 (27,36)
LPC_AD2 (27,36)
LPC_AD3 (27,36)
LPC_FRAME# (27,36)
LPC_DRQ0# (27)
PCI_RST# (26,36)
CLK_PCI_DB (22)
SERIRQ
(28,36)
2 @ 100P_0402_50V8J
3
SW 2
EVQPLHA15_4P
2
R232
C502 1
0.1U_0402_16V4Z
TP_CLK
TP_DATA
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_DRQ0#
PCI_RST#
SW /R
2 @ 100P_0402_50V8J
TP_CLK
C503
6
5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
TP_DATA C501 1
D40
PJDLC05_SOT23-3
@
1
10K_0402_5%
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
GND
GND
SW /L
1
2
3
4
ACES_85205-0400
ME@
GND2
GND1
EC_TX_P80_DATA
EC_RX_P80_CLK
1
2
3
4
ACES_85201-2005
ME@
Security Classification
2009/04/23
Issued Date
Deciphered Date
2010/05
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Size
B
Date:
Document Number
Rev
1.0
KIWA5/6 LA-5081P
Tuesday, April 28, 2009
Sheet
1
38
of
51
+3VALW
20mils
C504
0.1U_0402_16V4Z
R233
10K_0402_5%
INT_SPI_CS#
SPI_SO
2 15_0402_5%
R234 1
1
2
3
4
U48
CS#
SO
WP#
GND
8
7
6
5
VCC
HOLD#
SCLK
SI
SPI_CLK_R
SPI_SI
R235 1
R236 1
2 15_0402_5%
2 15_0402_5%
SPI_CLK
FWR#SPI_SI
SPI_CLK (36)
FWR#SPI_SI (36)
MX25L1605AM2C-12G_SO8
<BOM Structure>
R237
33_0402_5%
+3VALW
R238
U49
INT_SPI_CS#
R239 1
2 15_0402_5%
INB
1
@
2
R240
+3VALW
JP29
FSEL#SPICS# 1
SPI_SO
3
5
7
(28) SB_INT_FLASH_SEL
1
3
5
7
22_0402_5%
2
4
6
8
2
4
6
8
INT_FLASH_EN#
SPI_CLK_R
SPI_SI
FD1
1
FD2
1
FD3
1
FD4
1
ME@ E&T_2941-G08N-00E~D
H1
HOLEA
LED2
1
R6
BT@
2
0_0402_5%
1
R244
2
432_0402_1%
H20
HOLEA
1
2
432_0402_1%
H10
HOLEA
H9
HOLEA
H14
HOLEA
H21
HOLEA
H15
HOLEA
H16
HOLEA
H17
HOLEA
H18
HOLEA
H13
HOLEA
H12
HOLEA
H11
HOLEA
WLAN_LED# (30)
H22
HOLEA
DRIVE_LED# (27)
19-213A-T1D-CP2Q2HY-3T_WHITE
LED4
1
R243
H8
HOLEA
BT_LED# (40)
LED3
2
432_0402_1%
H7
HOLEA
1
2
19-213A-T1D-CP2Q2HY-3T_WHITE
R7
WLAN@
0_0402_5%
1
R242
H6
HOLEA
2
2
300_0402_5%
H4
HOLEA
Green
H5
HOLEA
1
R241
H3
HOLEA
LED
+5VALW +5VS
H2
HOLEA
MC74VHC1G32DFT2G_SC70-5
FSEL#SPICS# (36)
FSEL#SPICS#
INA
1 INT_FLASH_EN# 100K_0402_5% 1
OR Gate
OUTPUT
Y
1
<BOM Structure>
C505
22P_0402_50V8J
2
INPUT
A
SPI_CLK_R
FRD#SPI_SO
(36) FRD#SPI_SO
PWR_LED_SC# (36)
LED5
19-213A-T1D-CP2Q2HY-3T_WHITE
Blue CHARGE_LED0#
2
1
CHARGE_LED0# (36)
19-213A-T1D-CP2Q2HY-3T_WHITE
7.3mA
+3VALW
R245
1
2
499_0402_1%
LED6
2
Amber CHARGE_LED1#
CHARGE_LED1# (36)
6mA
Security Classification
Issued Date
2009/04/23
Deciphered Date
2010/05
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size
B
Date:
Document Number
Rev
1.0
KIWA5/6 LA-5081P
Tuesday, April 28, 2009
Sheet
39
of
51
+5VALW
+USB_VCCA
U50
C440 0.1U_0402_16V4Z
2
1
(36)
USB_ON
1
2
3
4
USB_ON
GND
IN
IN
EN
OUT
OUT
OUT
OC#
8
7
6
5
USB_OC#0 (28)
G545A1P1U_SO8
<BOM Structure>
USB_OC#1 (28)
1
1
+USB_VCCA
C444
@ 1000P_0402_50V7K
+USB_VCCA
W=60mils
1 +USB_VCCA
W=60mils
C443
150U_B2_6.3VM_R35M
C441
470P_0402_50V7K
2
C442
470P_0402_50V7K
JUSB1
D6
USB20_N0
D7
USB20_P1
USB20_N1
VCC
DD+
GND
5
6
7
8
GND1
GND2
GND3
GND4
PJDLC05_SOT23-3
@
PJDLC05_SOT23-3
@
Source:DC233001X00
2nd source:DC233002C00
JUSB2
(39)
Source:DC233001X00
2nd source:DC233002C00
BT_LED#
GND
C445
0.1U_0402_16V4Z
2 CMOS@
R247
0_0603_5%
CMOS@
SUYIN_020173MR004G579ZR
ME@
1
OUT
CMOS@
C447
10U_0805_10V4Z
MOLEX_53780-0870
ME@
1
1
Q20
BT@
SI2301BDS-T1-E3_SOT23-3
1
2
3
4
5
6
7
8
GND1
GND2
C446
0.1U_0402_16V4Z
BT@
1
OUT
ACES_88266-05001
(36)
ME@
BT_OFF#
IN
BT@
Q22
DTC124EKAT146_SC59-3
GND
Q21
DTC124EKAT146_SC59-3
R248
10K_0402_1%
1
2
3
4
5
GND1
GND2
30mils
1
2
3
4
5
6
7
USB20_N2
USB20_P2
USB20_N2
USB20_P2
BT@
(28)
(28)
+3VS_BT
S
CMOS@
(30) WLAN_ACTIVE
(30) BT_ACTIVE
(28)
USB20_P6
(28)
USB20_N6
BT@
1
2
3
4
5
6
7
8
9
10
BTON_LED
WLAN_ACTIVE
BT_ACTIVE
USB20_P6
USB20_N6
+3VS
JP31
GND
GND1
GND2
GND3
GND4
+5VS
Q19
SI2301BDS-T1-E3_SOT23-3
CMOS1
5
6
7
8
JP30
IN
CMOS@
R246
10K_0402_5%
CMOS@
IN
VCC
DD+
GND
BT MODULE CONN
Q18
DTC124EKAT146_SC59-3
1
S
1
2
3
4
OUT
+5VS
(36) CMOS_OFF#
USB20_N1
USB20_P1
(28) USB20_N1
(28) USB20_P1
SUYIN_020173MR004G579ZR
ME@
1
2
3
4
USB20_P0
USB20_N0
USB20_P0
(28) USB20_N0
(28) USB20_P0
W=60mils
1 +USB_VCCC
1218 change
+USB_VCCC
U53
JUSB3
(28) USB20_N4
(28) USB20_P4
USB20_N4
USB20_P4
Source:DC233001X00
2nd source:DC233002C00
1
2
3
4
5
6
7
8
1
2
3
4
GND
GND
GND
GND
1
2
3
4
C450 0.1U_0402_16V4Z
2
1
(36)
USB_ON
C449
150U_B2_6.3VM_R35M
C448
470P_0402_50V7K
2
GND
IN
IN
EN
8
7
6
5
OUT
OUT
OUT
OC#
R20
100K_0402_5%
@
ALLTO_C10784-104A3-L
ME@
USB_OC#4 (28)
G545A1P1U_SO8
<BOM Structure>
C451
@ 1000P_0402_50V7K
D5
USB20_P4
USB20_N4
Issued Date
PJDLC05_SOT23-3
@
Security Classification
2009/04/23
Deciphered Date
2010/05
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
Rev
1.0
KIWA5/6 LA-5081P
Sheet
E
40
of
51
+5VS
D10
NOVO_BTN#
R250
1
2
51_ON#
ON/OFFBTN#
NOVO_BTN#
No switch board:
CAPS_LED# =>ESB_CK (36)
(36)
NUM_LED# =>ESB_DA
(36)
NOVO_BTN#
1 ENE@
R256 1 ENE@
R258 1 ENE@
R259
ESB_CK
ESB_DA
I2C_INT
R256
R258
DAN202UT106_SC70-3
C455
18P_0402_50V8J
@
NOSB@
ON/OFF switchSW 3
0_0402_5%
NOSB@
51_ON#
DAN202UT106_SC70-3
ON/OFF# (36)
51_ON#
(43)
W LAN@
1
1
@
C457
1000P_0402_50V7K
+3VALW
(36)
D43
@ RLZTE1120A LL34
KILL_SW #
2
G
2
R18
SW 4
1
100K_0402_5%
KILL_SW#
EC_ON
NOVO_BTN#
0.1U_0402_25V6
1
2
R261
4.7K_0402_5%
ON/OFFBTN#
I2C_INT_C
ON/OFF#
+3VALW
Kill Switch
R260
100K_0402_5%
D42
ON/OFFBTN#
EC_ON
ACES_87151-0807G
ME@
done
0_0402_5%
@ JOPEN
1
@ JOPEN
02/26
+3VALW
TOP
Side
2
1
Bottom Side
(36)
C456
18P_0402_50V8J
1 ENE@
SMT1-05_4P
6
5
J6
J5
C452
Power Button
ESB_CK_C
ESB_DA_C
I2C_INT_C
2
2 FBMA-11-100505-601T
2 FBMA-11-100505-601T
0_0402_5%
GND
GND
8
7
6
5
4
3
2
1
0.1U_0402_25V6
C454
51_ON#
NOVO#
10
9
8
7
6
5
4
3
2
1
0.1U_0402_16V4Z
C453
(43)
D41
JP33
ENE@
PJSOT24C_SOT23-3
100K_0402_5%
NOVO#
R249
0_0603_5%
ON/OFFBTN#
(36)
R13
0_0603_5%
+3VALW
+3VS
1BS003-1211L_3P
W LAN@
Q23
S 2N7002_SOT23
R251
10K_0402_5%
Lid Switch
+VCC_LID
2
0_0402_5%
R284 1
A3212ELHLT-T_SOT23W -3
OUTPUT
2
LID_SW # (36)
GND
C475
0.1U_0402_16V4Z
2 100K_0402_5%
VDD
1
R283
+3VALW
U58
C476
10P_0402_50V8J
Issued Date
Security Classification
2009/04/23
Deciphered Date
2010/05
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Rev
1.0
KIWA5/6 LA-5081P
Sheet
41
of
51
+5VALW TO +5VS
+3VALW
1 2
R263
470_0603_5%
B+
B+
C3
C4
C5
C6
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2 @
2 @
2 @
2 @
2 SUSP
G
Q26
2N7002_SOT23
R267
47K_0402_5%
C467
0.1U_0603_25V7K
SUSP
D
Q29
2N7002_SOT23
2
G
S
R269
0_0402_5%
Q28
2N7002_SOT23
3
5VS_GATE
D
2
G
1
R264
470_0603_5%
D
2 SUSP
G
Q25
2N7002_SOT23
S
R266
20K_0402_5%
+5VS
1 2
+3VS
U55
8 D
1
S
7 D
1
1
1
S 2
6 D
S 3
C461
C462
C463
5
G 4
10U_0805_10V4Z D
10U_0805_10V4Z
1U_0603_10V4Z
2
2
2
SI4800BDY-T1-E3_SO8
+5VS
U54
8 D
1
S
7 D
1
1
1
S 2
6 D
S 3
C458
C459
C460
5
G 4
10U_0805_10V4Z D
10U_0805_10V4Z
1U_0603_10V4Z
2
2
2
SI4800BDY-T1-E3_SO8
SUSP
+3VALW TO +3VS
+5VALW
R270
0_0402_5%
C468
0.1U_0603_25V7K
+1.5V to +1.5VS
+1.5V
+0.75VS
1
R272
470_0603_5%
+VCCP
1
+1.5V
+1.5VS
U57
8 D
S 1
7
2
1
1
1
D
S
6 D
S 3
C470
C471
C472
5 D
4
G
10U_0805_10V4Z
10U_0805_10V4Z
1U_0603_10V4Z
2
2
2
SI4800BDY-T1-E3_SO8
1 2
D
2 SYSON#
G
Q33
2N7002_SOT23
D
2 SUSP
G
Q34
2N7002_SOT23
2 SUSP
G
Q35
2N7002_SOT23
1.5VS_GATE
1
1
@
C473
C474
0.1U_0603_25V7K
2
2
0.1U_0603_25V7K
2
1
Q36
R276
470_0603_5%
1 2
1 2
R277
150K_0402_5%
R275
470_0603_5%
2 SUSP
G
Q31
2N7002_SOT23
R274
470_0603_5%
B+
R278
0_0402_5%
SUSP
2
G
2N7002_SOT23S
RTCVREF
+5VALW
2
1
Q38
DTC124EKAT146_SC59-3
OUT
SYSON#
SYSON#
(30,36,47) SYSON
SYSON
IN
GND
C1166
OUT
IN
GND
C1167
@
R281
100K_0402_5%
(30,34,36,47,48) SUSP#
0.01U_0402_16V7K
Q37
DTC124EKAT146_SC59-3
SUSP
SUSP
0.01U_0402_16V7K
@
R280
100K_0402_5%
R279
10K_0402_5%
(47,48)
+5VALW
2009/04/23
Issued Date
Security Classification
Deciphered Date
2010/05
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
DC Interface
Size Document Number
Custom
Date:
Rev
1.0
KIWA5/6 LA-5081P
Sheet
E
42
of
51
PJ101
1
JUMP_43X118
PF101
PC104
1000P_0402_50V7K
VINDE-2
17.706
16.027
17.470
15.808
PR102
1M_0402_1%
1
2
VIN
VS
1
PR104
10K_0805_5%
PU102A
LM393DG_SO8
PR109
10K_0402_1%
2
1
RTCVREF
(29,37,46)
PACIN
1
PR108
10K_0402_1%
PACIN
ACIN
PD102
RLZ4.3B_LL34
PR105
10K_0402_1%
1
2
1
3
1
2
PC107
0.1U_0402_16V7K
1
2
VINDE-3
PR107
22K_0402_1%
PC106
1000P_0603_50V7K
2
1
PR106
90.9K_0402_1%
1
2
VINDE-1
PR103
84.5K_0402_1%
PC105
0.01U_0402_25V7K
VIN
JDCIN
@ 4602-Q04C-09R 4P P2.5
PC103
100P_0402_50V8J
2
1
@ 7A_24VDC_429007.W RML
High 17.944
Low 16.242
PL101
SMB3025500YA_2P
1
2
APDIN1
PC113
@ 0.018U_0603_50V7J
2
1
PC101
1000P_0402_50V7K
2
1
APDIN
PC112
@ 0.018U_0603_50V7J
2
1
Vin Detector
VIN
PC102
100P_0402_50V8J
DC030006J00
3.3V
VIN
PD103
LL4148_LL34-2
PC109
0.1U_0603_25V7K
RTC Battery
RTCVREF
+RTCBATT
PR114
200_0603_5%
+CHGRTC
PR115
PR116
560_0603_5%
560_0603_5%
1
2RTCVREF-1
1
2
PD104
@ MAXEL_ML1220T10
3.3V
3
OUT
RB751V-40TE17_SOD323-2
PU101
G920AT24U_SOT89-3
IN
2CHGRTCIN
GND
PC110
10U_0805_6.3V6M
VS
51ON-3
JRTC
PC111
1U_0805_25V4Z
PR113
22K_0402_1%
1
2
51ON-2
PR112
100K_0402_1%
(42) 51_ON#
PR111
68_1206_5%
PR101
200_0603_5%
1
2
PC108
0.22U_0603_25V7K
CHGRTCP
PR110
68_1206_5%
2
PQ101
TP0610K-T1-E3_SOT23-3
51ON-1
PD101
LL4148_LL34-2
2
1
BATT+
Issued Date
Security Classification
2007/09/20
Deciphered Date
2008/09/20
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
Rev
0.1
Sheet
D
44
of
53
PJ201
1
@
JUMP_43X118
VMB
PL201
SMB3025500YA_2P
1
2
PF201
1
VL
PR203
47K_0402_1%
TM-2 1
BATT_TEMPA
BATT_SEL_HW
O
-
1
+
2
1
8
6
4
2
A/D
(37)
(31,37)
PR207
15.4K_0402_1%
EC_SMB_DA1
+3VALW P
(47)
TM-3
PU102B
LM393DG_SO8
PQ201
2N7002KW _SOT323-3
2
G
VL
PR208
100K_0402_1%
PR210
100K_0402_1%
1
2
PR211
10K_0402_1%
(31,37)
PC203
0.22U_0603_25V7K
2
1
1
2
PR209
6.49K_0402_1%
EC_SMB_CK1
TM_REF1
PR205
13.7K_0402_1%
1
2
TM-1
MAINPW ON
2
PH201
100K_0603_1%_TH11-4H104FT
PR206
100_0402_5%
PC202
0.01U_0402_25V7K
PC201
1000P_0402_50V7K
PR202
47K_0402_1%
PC204
1000P_0402_50V7K
2
2
PR204
100_0402_5%
@ TYCO_1775789-1
VL
BATT+
@ 12A_65V_451012MRL
EC_SMCA
EC_SMDA
TS
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
GND
GND
VMB2
JBATT
(37,46)
Issued Date
Security Classification
2007/6/22
Deciphered Date
2008/6/22
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
Document Number
Rev
0.1
Sheet
D
45
of
53
24751_PVCC
PQ302
FDS6675BZ_SO8
B+
PR302
0.015_1206_1%
8
7
6
5B+_IN
PJ301
CELLS
PQ312
D
2N7002KW _SOT323-3
24751_SRN
17
TP
29
SRSET
16
IADAPT
15
3
2
1
5
6
7
8
24751_ACGOOD#
ADP_I
Current
2.842V
3.3A
(29,37,44)
PQ311
@ 2N7002KW _SOT323-3
2
G
Pre Cell
3.3V
4.35V
0V
4V
24751_VREF
2
PC328
1000P_0402_50V7K
CHGVADJ
PR325
100K_0402_1%
1
1
3
PQ309
2N7002KW _SOT323-3
8
P
0
4
2
G
(37) FSTCHG
LI-3S :13.5V----BATT-OVP=1.5V
BATT-OVP=0.1112*BATT+
PC330
0.01U_0402_25V7K
CHGEN#
PU302A
LM358DR_SO8
ACIN
D
VADJ
PR328
499K_0402_1%
2
1
IREF
(37)
OVP-2
1
PR331
105K_0402_1%
PC314
10U_1206_25V6M
PR335
100K_0402_1%
2
1
PC325
@0.01U_0402_25V7K
(37)
PR322
180K_0402_1%
PR321
10_0603_5%
PC327
100P_0402_50V8J
1
2
1
CHGVADJ
1
2
1
IREF
1
IADAPT
1
24751_VREF
RTCVREF
PR319
2
1
54.9K_0402_1%
BATDRV
PR324
@ 0_0402_5%
(37)
PC313
10U_1206_25V6M
1
14
ICHG setting
SRSET
REGN
PR326
210K_0402_1%
1
2
PC321
@0.1U_0603_25V7K
BATT_SEL_EC
PR317
100K_0402_1%
2
1
1
2
1
PR329
PR327
499K_0402_1% 340K_0402_1%
PC329
0.01U_0402_25V7K
1
2
G
8
P
PC320
0.1U_0603_25V7K
(37,45)
PC323
0.1U_0603_25V7K
ACGOOD
BQ24751ARHDR_QFN28_5X5
2
OVP-3
18
BAT
2
13
OVP-1
BATT_SEL_HW
VS
A/D
PQ310
2N7002KW _SOT323-3
2BAT_SEL2
1
PR332
G
@ 0_0402_5%
2
1
PR333
0_0402_5%
D
2
G
2
SRN
VADJ
PQ307
2N7002KW _SOT323-3
PQ308
2N7002KW _SOT323-3
3
24751_SRP
/BATDRV
2
G
2
G
SRP
19
(37)
PR334
@ 0_0402_5%
VREF
PC319
0.1U_0402_16V7K
1
2
1
20
CELLS
ACOFF
BATT+
21
PC318
680P_0402_50V7K
PR315
100K_0402_1%
1
LEARN
ACOFF
AGND
PR338
100K_0402_1%
2
1
24751_OCP-2
10
12
24751_ACGOOD#
2
PC324
VMB2
24751_VREF
OVPSET
0.1U_0603_25V7K
1
1
2
1
24751_OCP-1
24751_VREF
22
2
PGND
24751_LODRV
PR312
4.7_1206_5%
3
2
1
23
PR308
0.02_1206_1%
PL202
10U_LF919AS-100M-P3_4.5A_20%
1
224751_SW -1
PC331
10U_1206_25V6M
PC316
1U_0603_10V6K
24
LODRV
/BATDRV
PC312
LL4148_LL34-2 0.1U_0603_25V7K
124751_BTST
1
PD301
PR318
200K_0402_1%
PR320
100K_0402_1%
PU302B
LM358DR_SO8
Issued Date
Security Classification
2008/05/21
Deciphered Date
2009/05/21
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
OVP-4
A
24751_PH
PQ304
FDS6675BZ_SO8
24751_OCP-3
24751_VREF
PR330
10K_0402_1%
2
1
25
224751_VDAC
11 VDAC
PR336
0_0402_5%
1
PR337
@ 0_0402_5%
+EC_AVCC
VADJ
ACSET
24751_VREF
(37) BATT_OVP
PH
PC322
1U_0603_6.3V6M
2
1
Fsw : 300KHz
24751_HIDRV
1
PR313
127K_0402_1%
PQ306
SI2301BDS-T1-E3_SOT23-3
PC326
0.1U_0402_16V7K
PR323
340K_0402_1%
26
24751_VREF
PR316
100K_0402_1%
1
2
HIDRV
ACSET
224751_ACOP
7 ACOP
PC317
0.47U_0603_16V7K
ACOFF
PR307
0_0402_5%
24751_BTST-1
1
2
24751_OVPSET
65W adapter
Vacset=3.3*(115K/(165K+115K))=1.355V
CP Point=(Vacset/Vvdac)*(0.1/PR302)=2.74A
27
REGN
CP Point Setting
CP point=Iadapter*85%
90W adapter
Vacset=3.3*(127K/(84.5K+127K))=1.885V
CP Point=(Vacset/Vvdac)*(0.1/PR302)=4A
BTST
PR303
100K_0402_1%
ACDRV
ACDET
28
PQ305
SI7716DN-T1-E3_PAK1212-8
24751_ACDRV# 4
ACDET 5
0.1U_0603_25V7K
1
2
PVCC
REGN
1
2
1
2
CHGEN
ACN
ACP
ACSET
CP setting
PR314
54.9K_0402_1%
PU301
1
PC302
0.01U_0402_25V7K
24751_SNB
PC315
@ 0.01U_0402_25V7K
PC310
24751_ACN
2
24751_ACP 3
PR311
84.5K_0402_1%
24751_VREF 1
2
PR310
54.9K_0402_1%
PR309
340K_0402_1%
CHG_B+
3
2
1
PC308
0.1U_0603_25V7K
2
1
PR306
340K_0402_1%
PC309
@ 0.1U_0603_25V7K
4
2
1
PR304
100K_0402_1%
2
1
2
PC307
0.1U_0402_16V7K
1
2
PC311
2.2U_0805_25V6K
PC306
0.01U_0402_25V7K
4
2
BK-2
1 1
2 1
BK-1
PR305
3.3_1210_5%
PC301
0.01U_0402_25V7K
PC305
4.7U_1206_25V6K
@ JUMP_43X118
CHGEN#
PR301
3.3_1210_5%
PC304
4.7U_1206_25V6K
PC303
4.7U_1206_25V6K
PQ303
SIS412DN-T1-GE3_POWERPAK8-5
1
2
1
2
3
VIN
1
2
3
PQ301
FDS6675BZ_SO8
8
7
6
5
Title
CHARGER
Size
Date:
Document Number
Rev
0.1
Sheet
D
46
of
53
ISL6237_B+
BST5A2
PR405
0_0603_5%
SW 3
25
PHASE2
PHASE1
16
SW 5
LG3
23
LGATE2
LGATE1
18
LG5
PGND
22
30
OUT2
OUT1
10
FB1
11
BYP
SKIP
29
NC
POK2
28
EN_LDO
POK1
13
EN1
ILIM1
12
ILM1
ILIM2
31
ILIM2
FB3
32
VL
REF
LDOREFIN
14
3/5V_EN2
27
EN2
GND
3/5V_EN1
PC412
0.1U_0603_25V7K
PC406
2200P_0402_50V7K
2
1
PC404
4.7U_1206_25V6K
2
1
PC405
4.7U_1206_25V6K
2
1
PC415
680P_0402_50V7K
21
+
PC413
2 220U_6.3V_M
5V_SKIP
2
1
PR410
@ 0_0402_5%
1
2
PR411
0_0402_5%
VL
POK
PU401
ISL6237IRZ-T_QFN32_5X5
(29)
2
1
PR414
301K_0402_1%
2
1
PR415
301K_0402_1%
B
13/5V_TON
PR416
0_0402_5%
FB5
PR420
0_0402_5%
PJ402
+3VALWP
PC418
1U_0603_6.3V6M
2
13/5V_NC
+3VALW
@ JUMP_43X118
2VREF_ISL6237
1
2
2
PC420
@ 0.047U_0402_16V7K
2
1
0_0402_5%
(45)
2VREF_ISL6237
PR419
@ 47K_0402_5%
PC419
0.047U_0402_16V7K
806K_0603_1%
2
MAINPW ON
2
1
PR418
VL
PR417
PD403
RB751V-40TE17_SOD323-2
1
2
TON
PC417
0.22U_0603_25V7K
EN_LDO
NC
20
PR412
100K_0402_1%
2
PR413
200K_0402_5%
1
2
EN_LDO-1
PR404
4.7_1206_5%
REFIN2
PC416
0.22U_0603_25V7K
PD401
RB751V-40TE17_SOD323-2
1
2
1BST5A-1
PC411
0.1U_0603_25V7K
PD402
RLZ5.1B_LL34
1
2
3
2
1
HG5
17
2VREF_ISL6237
VS
4.7U_0603_6.3V6M
<BOM Structure>
PC409
2
1
15
BOOT1
PQ402
SIS412DN-T1-GE3_POWERPAK8-5
1U_0603_10V6K
7
UGATE1
+5VALWP
PL402
4.7UH_PCMC063T-4R7MN_5.5A_20%
2
1
PR407
@ 61.9K_0402_1%
1
2
BOOT2
UGATE2
24
19
26
LDO
PC408
3/5V_VCC
1
2
VIN
VCC
3/5V_VIN
2
1
2
1
UG3
BST3A
PC410
1U_0603_10V6K
1
2
PVCC
PR409
0_0402_5%
1
2
PR408
10K_0402_1%
2
PR403
0_0603_5%
TP
PQ404
SI7716DN-T1-E3_PAK1212-8
2
15V_SNB
2
1
PC414
680P_0402_50V7K
220U_6.3V_M 2
BST3A-1
33
VL
3
2
1
13V_SNB
2
PR402
4.7_1206_5%
PR406
0_0402_5%
+3VALWP
PC407
0.1U_0603_25V7K
4
PQ403
SI7716DN-T1-E3_PAK1212-8
1
2
3
5
PL401
4.7UH_PCMC063T-4R7MN_5.5A_20%
1
2
PQ401
SIS412DN-T1-GE3_POWERPAK8-5
1
2
3
5
PC403
2200P_0402_50V7K
2
1
PC402
4.7U_1206_25V6K
2
1
PR401
0_0402_5%
1
2
PC401
4.7U_1206_25V6K
2
1
PJ401
@ JUMP_43X118
2 2
1 1
ISL6237_B+
B+
PC421
PJ403
+5VALWP
+5VALW
@ JUMP_43X118
2007/06/22
Issued Date
Security Classification
2008/06/22
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
3VALW/5VALW
Rev
0.1
Sheet
1
47
of
53
PJ501
1.5V_IN
PGOOD
15
3
2
1
10
9
LG_1.5V
DRVL
+5VALW
4
PGND
8
GND
PC509
@ 47P_0402_50V8J
1
2
PC508
1U_0603_10V6K
V5DRV
1.5V_TRIP
1
2
PR505
17.8K_0402_1%
PU501
TPS51117RGYR_QFN14_3.5x3.5
PC511
4.7U_0805_10V6K
+
2
PJ504
2
+VCCPP
+VCCP
PR507
21K_0402_1%
1
2
VFB
SW _1.5V
11
12
PC507
1000P_0402_50V7K
1.5V_FB
LL
TRIP
+1.5VP
V5FILT
UG_1.5V
PQ502
SI7716DN-T1-E3_PAK1212-8
VOUT
13
PL501
1.5UH_PCMC063T-1R5MN_9A_20%
1
2
3
2
1
3
1.5V_V5FILT
DRVH
TON
TP
PR504
422_0603_1%
1
2
EN_PSV
PC504
0.1U_0402_16V7K
14
0.1U_0603_25V7K
+5VALW
B+
PR503
PC503
2.2_0603_5%
BST_1.5V 1
2BST_1.5V-1
1
2
1.5V_EN
PC506
10U_0805_6.3V6M
PR502
0_0402_5%
1
2
1
SYSON
VBST
1,37,43,49)
PD501
@ 1SS355_SOD323-2
1
2
+5VALW
@ JUMP_43X79
PL503
@ HCB4532KF-800T90_1812
1
2
PC505
220U_D2_4VY_R15M
1.5V_TON
PQ501
SIS412DN-T1-GE3_POWERPAK8-5
2
1
PC532
@ 1000P_0402_50V7K
2
1
PC531
2
11.5V_SNB
2
1
@ 10U_1206_25V6M
PC510
PR506
2
1
PC502
680P_0402_50V7K
4.7_1206_5%
4.7U_1206_25V6K
2
1
PC501
4.7U_1206_25V6K
PR501
240K_0402_5%
1
2
JUMP_43X118
1.5V_PGOOD
PU502
TPS51117RGYR_QFN14_3.5x3.5
PC521
4.7U_0805_10V6K
+0.75VS
+VCCPP
1
+
2
PR515
13.3K_0402_1%
1
2
@ JUMP_43X79
+5VS
LG_VCCP
DRVL
PJ506
2
+0.75VSP
PC518
1000P_0402_50V7K
VCCP_TRIP
1
2
PR514
12K_0402_1%
V5DRV
10
@ JUMP_43X79
TRIP
PGND
8
PGOOD
GND
6
PC520
@ 47P_0402_50V8J
1
2
PC519
1U_0603_10V6K
SW _VCCP
11
5
6
7
8
12
1VCCP_SNB2
VFB
LL
PR512
4.7_1206_5%
14
15
V5FILT
UG_VCCP
13
+1.5V
B+
PL502
1.5UH_PCMC063T-1R5MN_9A_20%
1
2
PQ504
SI4634DY-T1-E3_SO8
VCCP_FB
DRVH
VOUT
VBST
3
VCCP_V5FILT
TP
1
TON
EN_PSV
2
PR513
422_0603_1%
1
2
3
2
1
0.1U_0603_25V7K
PC515
0.1U_0402_16V7K
+5VS
PC522
680P_0402_50V7K
PR511
PC514
2.2_0603_5%
BST_VCCP1
2BST_VCCP-1
1
2
VCCP_EN
3
2
1
PR510
75K_0402_1%
1
2
1
SUSP#
JUMP_43X118
PL504
1
2
@ HCB4532KF-800T90_1812
5
6
7
8
PD502
1SS355_SOD323-2
2
+5VS
PQ503
SI4686DY-T1-E3_SO8
2
1
PC534
@ 1000P_0402_50V7K
2
1
PC533
@ 10U_1206_25V6M
2
1
PC512
4.7U_1206_25V6K
2
1
PC513
4.7U_1206_25V6K
PR509
240K_0402_5%
1
2
VCCP_TON
PJ502
VCCP_IN
43,49)
+1.5VP
PC517
10U_0805_6.3V6M
PJ505
PC528
@0.1U_0402_16V7K
PR521
100K_0402_1%
PC516
220U_D2_4VY_R15M
+1.5VP
PR508
21K_0402_1%
PR516
30.1K_0402_1%
PJ503
JUMP_43X79
+1.5V
VCNTL
GND
NC
VREF
NC
VOUT
NC
TP
+3VALW
PC524
1U_0603_6.3V6M
A
VIN
PR517
1K_0402_1%
PC523
4.7U_0603_6.3V6M
PU503
0.75V_IN
0.75V_REF
APL5331KAC-TRL_SO8
1
2
1
PC525
0.1U_0402_16V7K
2
+0.75VSP
PR520
1K_0402_1%
2
1
2
PC527
0.1U_0402_16V7K
(20,31,43,49) SUSP
2
G
PQ505
2N7002KW_SOT323-3
PR518
0_0402_5%
1
2
PC526
10U_0805_6.3V6M
2007/11/12
Issued Date
Security Classification
2008/11/12
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Document Number
Rev
0.1
Sheet
1
48
of
53
PJ601
1.8V_IN
PU601
TPS51117RGYR_QFN14_3.5x3.5
PC610
4.7U_0805_10V6K
1
2
PJ602
2
+VGA_COREP
PJ603
2
1
PC601
4.7U_1206_25V6K
2
1
PC602
4.7U_1206_25V6K
VGA_CORE
PC612
10U_1206_25V6M
GPU_VID0
GPU_VID1
GPU_VID0
0.95V
VGA_CORE
0.85V
0
1
1
1
1.0V
0
1
1
1
0.9V
1
2
PC634
10U_0805_6.3V6M
PC633
10U_0805_6.3V6M
PC616
10U_0805_6.3V6M
+VGASENSE
+3VS
PJ608
JUMP_43X79
NC
TP
PR623
@ 1K_0402_1%
LDO_1.8V_REF
PC631
@ 0.1U_0402_16V7K
1
3
PC628
10U_0805_6.3V6M
2
G
S
PR628
@ 1.24K_0402_1%
2
1
PR632
@ 31.6K_0402_1%
1
2
SUSP
PQ609
@ 2N7002KW_SOT323-3
(20,31,43,48)
+1.1VSP
VREF
NC
VOUT
NC
TP
2007/11/12
+5VS
PC624
@1U_0603_6.3V6M
@ APL5331KAC-TRL_SO8
+1.8VSP
PC627
@ 0.1U_0402_16V7K
PC629
@10U_0805_6.3V6M
Security Classification
NC
PC622
1U_0603_6.3V6M
VCNTL
GND
NC
VOUT
VIN
VREF
PC623
@ 4.7U_0603_6.3V6M
NC
GND
PU604
LDO_1.8V_IN
+5VS
2008/11/12
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
PR617
0_0402_5%
2
1
Issued Date
1.0V
+1.8VS
2
PR615
10_0402_5%
+
2
PC615
330U_D2_2.5VY_R15M
PR612
4.7_1206_5%
VCNTL
VIN
GPU_VID1
PC626
0.1U_0402_16V7K
PC630
0.1U_0402_16V7K
+VGA_COREP
APL5331KAC-TRL_SO8
PR627
3.16K_0402_1%
PQ608
2N7002KW_SOT323-3
For N10M-GS
GPIO15 GPIO20
2
G
For N10M-GE1
GPIO15 GPIO20
PR625
30.1K_0402_1%
1
21.1V_EN
SUSP
(20,31,43,48)
@ JUMP_43X79
1
1
PR622
1.91K_0402_1%
1.1V_REF
+1.1VS
@ JUMP_43X79
2
2
S PQ607
2N7002KW _SOT323-3
+1.8VSP
B+
PU603
1.1V_IN
PC621
4.7U_0603_6.3V6M
3
PC620
4.7U_0805_10V6K
PR616=>9.09K
PR622=>2.21K
PR629,PR630,PC625,PQ606,PR620=>un-pop
PR621,PR624,PC632,PQ607,PR618=>un-pop
PJ607
JUMP_43X79
PC632
0.022U_0402_16V7K
1.2V
PU602
TPS51117RGYR_QFN14_3.5x3.5
2
G
1
4
+1.8VSP
PR618
113K_0402_1%
PC611
10U_1206_25V6M
1
2
LG_VGA
1
3
2
1
GND
PGND
DRVL
PGOOD
PC618
680P_0402_50V7K
10
+5VS
1VGA_SNB
2
V5DRV
VGA_TRIP
1
2
PR614
9.1K_0402_1%
SW _VGA
11
PQ605
SI4634DY-T1-E3_SO8
12
3
2
1
LL
PL602
1UH_PCMB103E-1R0MS_20A_20%
1
2
5
6
7
8
UG_VGA
5
6
7
8
VBST
3
2
1
14
15
TP
EN_PSV
VFB
13
TRIP
2
1GVID0-1
PR624
10K_0402_1%
PC625
0.022U_0402_16V7K
PR621
10K_0402_1%
DRVH
1GVID1-2
3
2
1GVID1-1
2
PR630
G
10K_0402_1%
2
1
GPU_VID0
V5FILT
PC619
@ 47P_0402_50V8J
PR620
1
2
91K_0402_1%
VGA_FB1
1
2
1
2
PR616
13.3K_0402_1%
1
2
D
PR619
39.2K_0402_1%
1GVID0-2 1
PQ606
2N7002KW_SOT323-3
PC529
@ 0.1U_0402_16V7K
PR629
10K_0402_1%
VOUT
2
1
PR634
@ 0_0402_5%
VGA_PW ROK
GPU_VID1
PR522
100K_0402_1%
TON
VGA_FB
PC617
1U_0603_10V6K
VGA_V5FILT
PQ603
SI4686DY-T1-E3_SO8
PQ604
SI4634DY-T1-E3_SO8
1
3
PQ610
2N7002KW _SOT323-3
(17)
5
6
7
8
2
1
+3VS
(17)
0.1U_0603_25V7K
PR633
0_0402_5%
+VGA_COREP 2
1VGA_VOUT
PR613
422_0603_1%
1
2
+5VS
PR611
PC614
0_0603_5%
BST_VGA 1
2BST_VGA-1
1
2
2
G
PC636
@ 0.1U_0402_16V7K
2
1
PJ604
+1.1VSP
PJ605
PD601
1SS355_SOD323-2
1
2
+5VS
PC613
@ 0.1U_0402_16V7K
SUSP
(20,31,43,48)
@ JUMP_43X118
VGA_IN
VGA_EN
PC637
@ 0.1U_0402_16V7K
PR626
0_0402_5%
1
2
+VGA_CORE
PJ606
PR609
205K_0402_1%
1
2
VGA_TON
PR610
@ 0_0402_5%
1
2
SUSP#
(31,37,43,48)
@ JUMP_43X79
PR608
21K_0402_1%
@ JUMP_43X118
PR607
30.1K_0402_1%
1
2
PC635
1000P_0402_50V7K
+
2
3
2
1
LG_1.8V
1
PC609
@ 47P_0402_50V8J
1
2
DRVL
10
+5VS
PC606
10U_0805_6.3V6M
V5DRV
1.8V_TRIP
1
2
PR606
16.5K_0402_1%
PGND
PGOOD
GND
6
2
PC607
1U_0603_10V6K
15
14
SW _1.8V
11
B+
+1.8VSP
PC605
220U_D2_4VY_R15M
VFB
12
PR604
4.7_1206_5%
LL
TRIP
@ JUMP_43X79
PC608
680P_0402_50V7K
1.8V_FB
UG_1.8V
PL601
2.2UH_PCMC063T-2R2MN_8A_20%
1
2
V5FILT
13
VOUT
DRVH
3
1.8V_V5FILT
VBST
TON
TP
1
2
EN_PSV
PC604
0.1U_0402_16V7K
PR605
422_0603_1%
1
2
+5VS
0.1U_0603_25V7K
(31,37,43,48)
PR603
PC603
0_0603_5%
BST_1.8V 1
2BST_1.8V-1
1
2
1.8V_EN
PQ602
SI7716DN-T1-E3_PAK1212-8
2
1 1.8V_SNB 2
PR631
40.2K_0402_1%
1
2
SUSP#
PQ601
SIS412DN-T1-GE3_POWERPAK8-5
PD602
@ 1SS355_SOD323-2
1
2
+5VALW
3
2
1
1.8V_TON
PR601
240K_0402_5%
1
2
Title
VGA_CORE/1.8V/1.1VS
Size
Date:
Document Number
Rev
0.1
Sheet
1
49
of
53
2
1
PR830
1.91K_0402_1%
VGATE
DRVH2
21
PR801
17.8K_0402_1%
2
1
CPU_CSP1
PR848
17.8K_0402_1%
2
1
1CPU2_SNB
2
PQ806
SI4634DY-T1-E3_SO8
PR840
69.8K_0402_1%
2
1
2CPU_SN-1
1
2
PR842
28.7K_0402_1%
1
2
PC829
0.033U_0402_16V7K
CPU_CSP2-1
2
5
6
7
8
4
+CPU_CORE
PH801
100K_0603_1%_TH11-4H104FT
PL803
0.36UH_PCMC104T-R36MN1R17_30A_20%
1
4
PR829
4.7_1206_5%
PC823
680P_0402_50V7K
CPU_CSP2
3
2
1
PR850
69.8K_0402_1%
2
1
2CPU_SN-2
1
2
PR851
28.7K_0402_1%
1
2
PC835
0.033U_0402_16V7K
PH803
100K_0603_1%_TH11-4H104FT
(6) CPU_VID0
(6) CPU_VID1
(6) CPU_VID2
(6) CPU_VID3
(6) CPU_VID4
(6) CPU_VID5
PC805
220U_25V_M
PC838
1000P_0402_50V7K
2
1
PC809
2200P_0402_50V7K
2
1
PC804
10U_1206_25V6M
2
1
1
1CPU1_SNB
2
PQ803
SI4634DY-T1-E3_SO8
3
2
1
PQ805
SI4634DY-T1-E3_SO8
VID1
VID0
20
19
VID2
18
VID4
VID3
17
16
VID5
15
PSI#
VID6
14
13
(6) H_PSI#
(6) CPU_VID6
VR_TT#
11
PQ804
SI7686DP-T1-E3_SO8
1
2
+5VS
PD802
1SS355_SOD323-2
(6,8,28)
PC840
@ 68P_0402_50V8K
1
2
PR847
100_0402_5%
PC839
1000P_0402_50V7K
VBST2
BOOT_CPU2
1 PR846 2BOOT_CPU2-1
1
2
0_0603_5%
PC834
UGATE_CPU2
0.22U_0603_10V7K
PC818
10U_1206_25V6M
2
1
PHASE_CPU2
22
PC817
10U_1206_25V6M
2
1
LL2
VSNS
PR849
20K_0402_5%
LGATE_CPU2
23
24
GNDSNS
DPRSTP#
H_DPRSTP#
PGND
DRVL2
3
2
1
CSP2
+5VS
2
10U_0805_6.3V6M
25
5
6
7
8
CSN2
1
PC831
5
6
7
8
3
2
1
26
PU801
TPS51620RHAR_QFN40_6X6
PC815
680P_0402_50V7K
+CPU_B+
5
27
V5IN
CPU_CSP1-1
2
PR819
4.7_1206_5%
3
2
1
DRVL1
CSN1
3
2
1
LGATE_CPU1
BOOT_CPU1
1 PR841 2BOOT_CPU1-1
1
2
PC827
0_0603_5%
PHASE_CPU1
0.22U_0603_10V7K
PQ802
SI4634DY-T1-E3_SO8
2
PGOOD
DPRSLPVR
CLK_EN#
VR_ON
PWRMON
LL1
28
CSP1
PC808
10U_1206_25V6M
2
1
2
0_0402_5%
1
PR838
31
32
33
34
35
37
38
36
TRIPSEL
TONSEL
OSRSEL
ISLEW
GND
V5FILT
29
1
+CPU_CORE
(6)VCCSENSE
1
2
(6) VSSSENSE
PR843
100_0402_5%
VBST
UGATE_CPU1
GND
CPU_THERM
10 THERM
PR845
0_0402_5%
1
1
2
PR844
0_0402_5%
2
1
CPU_VSNS
30
VREF
12
2 CPU_CSP1-2
33P_0402_50V8K
2 CPU_CSN1-1
33P_0402_50V8K
2 CPU_CSN2-1
33P_0402_50V8K
2 CPU_CSP2-2
33P_0402_50V8K
CPU_GNDSNS
PD801
1SS355_SOD323-2
DRVH1
1CPU_DPRSTP#
0_0402_5%
PSI#
1
0_0402_5%
VID6
2
0_0402_5%
VID5
2
0_0402_5%
VID4
2
0_0402_5%
VID3
2
0_0402_5%
VID2
2
0_0402_5%
VID1
2
0_0402_5%
VID0
2
0_0402_5%
CPU_CSP2 2
PR864
PC837
100P_0402_50V8J
1
470_0402_1%
1
PC828
1
PC830
1
PC832
1
PC833
CPU_CSN1 2
PR862
CPU_CSN2 2
PR863
PC836
100P_0402_50V8J
1
470_0402_1%
1
470_0402_1%
DROOP
B+
1
PL802
0.36UH_PCMC104T-R36MN1R17_30A_20%
1
4
2
PR852
2
<BOM Structure>
PR853
1
PR854
1
PR855
1
PR856
1
PR857
1
PR858
1
PR859
1
PR860
1
470_0402_1%
CPU_CSP1 2
PR861
CPU_VREF
1
2
PR839
5.76K_0402_1%
CPU_DROOP
1
2
1
PC825 68P_0402_50V8J
1
2CPU_VREF
2
PC826 0.22U_0603_10V7K
3
39
41
40
+5VS
PL801
HCB4532KF-800T90_1812
1
2
PQ801
SI7686DP-T1-E3_SO8
5
6
7
8
CPU_VR_ON
CPU_DPRSLPVR
2
PR837
1CPU_VREF
0_0402_5%
1
0_0402_5%
1
0_0402_5%
+CPU_B+
CPU_TONSEL
2
PR835
CPU_TRIPSEL
2
PR836
1
124K_0402_1%
2
PR833
CPU_OSRSEL
CPU_V5FILT
CPU_ISLEW
PC824
1U_0603_10V6K
CPU_CSN1
+5VS
CPU_CSN2
+3VS
DPRSLPVR
(8,29)
PR834
@ 0_0402_5%
2
1
PR865
0_0402_5%
2
1
VR_ON
(37)
1
PR832
@ 0_0402_5%
CLK_ENABLE#
CPU_CLK_EN#
(8,29)
(29)
2
1
PR831
@ 10K_0402_5%
+3VS
2008/05/21
Issued Date
Security Classification
2009/05/21
Deciphered Date
+CPU_CORE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Rev
0.1
Sheet
1
50
of
53
Fixed Issue
Page 1 of 2
for PWR
Reason for change
Rev.
PG#
Modify List
Date
Phase
2009.01.14
2009.01.14
3
4
5
6
8
9
10
11
B
12
13
14
15
16
17
18
19
A
20
21
2007/09/20
Issued Date
Security Classification
Deciphered Date
2008/09/20
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
PIR (PWR)
Size Document Number
Custom
Rev
0.1
KIWAX_LA-5081P
Date:
Sheet
1
51
of
53
NO DATE
PAGE
MODIFICATION LIST
PURPOSE
----------------------------------------------------------------------------------------------------------------------------------------------1
12/10
39
12/10
36
1/15
3/16
39
42
35
34
06
and H_DPRSTP#_R
19
23
35
36
41
42
4
4/20
27
08
34
Security Classification
Issued Date
2009/04/23
Deciphered Date
2010/05
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Size
B
Date:
Document Number
Rev
1.0
KIWAX_LA-5081P
Tuesday, April 28, 2009
Sheet
1
51
of
51