PhD Preliminary Written Exam April 10, 2010

Problem 11 Digital Design

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Design sequential code converter (Mealy-style) that receives decimal digits encoded as Excess-3 inputs, and generates corresponding BCD outputs. Excess-3 inputs are received sequentially, least significant bit first, as indicated in the table below. The network should reset after receiving 4 binary inputs. Show the transition diagram, reduce the number of states if necessary, and then implement this network using D flip-flops and external gates.

Input X Excess-3

Output Z BCD

t3 t2 t1 t0 t3 t2 t1 t0 0 0 1 1 0 0 0 0 0 1 0 0 0 0 0 1 0 1 0 1 0 0 1 0 0 1 1 0 0 0 1 1 0 1 1 1 0 1 0 0 1 0 0 0 0 1 0 1 1 0 0 1 0 1 1 0 1 0 1 0 0 1 1 1 1 0 1 1 1 0 0 0 1 1 0 0 1 0 0 1