HP g42 g56 g62 Compaq Cq56 Cq62 Quanta Ax2 Ax7 Rev 1a SCH Unlocked

1
AX2/7 SYSTEM DIAGRAM

DDR3 channel A
DDR3-SODIMM1
CPU THERMAL
SENSOR
AMD Champlain
PAGE 6
35mm X 35mm
S1G4 Processor
DDR3 channel B
DDR3-SODIMM2
HT3
3&,([SUHVV;
;
NORTH BRIDGE
;
/$1
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&DUG
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RS880M A12
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RTL8103E
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(10/100)
PAGE 30
la
PCI-E
PP;PPSLQ%*$
6LGHSRUW
PAGE 33
te
PAGE 8,9,10,11
5-
SYSTEM CHARGER(ISL6251)
VCCP +1.1V AND +1.2V(RT8204)
PAGE 35
0,5,8
PAGE 38
95$0
PAGE 22
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PAGE 29
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; PAGE 23
10
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PAGE 33
PAGE 26
4.5W(Ext)
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4.3W(Int)
PAGE 12,13,14,15,16
PAGE 28
PAGE 27
5-
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PAGE 36
5HDOWHN
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CPU CORE ISL6265HRTZ-T
PAGE 17,18,19
20,21
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PAGE 29
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VGACORE(1.1V~1.2V)Oz8118
23mm X 23mm
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PAGE 29
PAGE 37
Es
DDR II SMDDR_VTERM
1.8V/1.8VSUS(RT8207)
/9'6
PAGE 23
SB820 A12
6$7$0%
6$7$&'520
$7,
3$5./3
&57
PAGE 24
86%
SOUTH BRIDGE
PAGE 34
+'0,
PAGE 25
PAGE 8
6$7$0%
PAGE 29
SYSTEM POWER ISL6237
''55$0
IRU80$RQO\
ALINK X4
PAGE 30
6$7$+''
PAGE 5
638P (PGA)35W/25W
PAGE 3,4,5
PAGE 7
PAGE 40
01
$QJ0,&
PAGE 27
PAGE 32
$8',2&211
3KRQH0,&
PAGE 28
SMBUS TABLE
SB--SCL0/SD0
Clock gen/Robson/TV tuner

/DDR2/DDR2 thermal/Accelerometer
+3V
.H\ERDUG
7RXFK3DG
epress card
PAGE 31
PAGE 31
)$1
PAGE 28
Wlan Card
+3VS5
EC --SCL/SD
Battery charge/discharge
+3VPCU
EC--SCL2/SD2
VGA thermal/system thermal
+3V
63,
PAGE 31
352-(&7$;
4XDQWD&RPSXWHU,QF
http://laptop-motherboard-schematic.blogspot.com/
Size
Custom
1%5'
Document Number
Date: Thursday, December 24, 2009

7
Rev
1A
Block Diagram
Sheet
1
8
of
42
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BLM21PG221SN1D(220,100M,2A)_8
+1.1V
R83
*0_6/S
CPU CLK
LS0805-100M-N
C418
4.7U/6.3V_6
C392
4.7U/6.3V_6
C302
C304
0.22U/25V_6 3300P/50V_4
12
12
Keep trace from resisor to CPU within 0.6"

keep trace from caps to CPU within 1.2"
+1.1V_VLDT_R
HT_NB_CPU_CAD_H[15..0]
8 HT_NB_CPU_CAD_H[15..0]
HT_NB_CPU_CAD_L[15..0]
8 HT_NB_CPU_CAD_L[15..0]
HT_NB_CPU_CLK_H[1..0]
8 HT_NB_CPU_CLK_H[1..0]
HT_NB_CPU_CLK_L[1..0]
8 HT_NB_CPU_CLK_L[1..0]
HT_NB_CPU_CTL_H[1..0]
8 HT_NB_CPU_CTL_H[1..0]
HT_NB_CPU_CTL_L[1..0]
8 HT_NB_CPU_CTL_L[1..0]
HT_CPU_NB_CAD_H[15..0]
8 HT_CPU_NB_CAD_H[15..0]
HT_CPU_NB_CAD_L[15..0]
8 HT_CPU_NB_CAD_L[15..0]
HT_CPU_NB_CLK_H[1..0]
8 HT_CPU_NB_CLK_H[1..0]
HT_CPU_NB_CLK_L[1..0]
8 HT_CPU_NB_CLK_L[1..0]
HT_CPU_NB_CTL_H[1..0]
8 HT_CPU_NB_CTL_H[1..0]
HT_CPU_NB_CTL_L[1..0]
8 HT_CPU_NB_CTL_L[1..0]
+1.1V_VLDT
+1.1V_VLDT
+1.1V_VLDT
+1.1V_VLDT
D1
D2
D3
D4
VLDT_A0
VLDT_A1
VLDT_A2
VLDT_A3
HT LINK
VLDT_B0
VLDT_B1
VLDT_B2
VLDT_B3
HT_NB_CPU_CAD_H0
HT_NB_CPU_CAD_L0
HT_NB_CPU_CAD_H1
HT_NB_CPU_CAD_L1
HT_NB_CPU_CAD_H2
HT_NB_CPU_CAD_L2
HT_NB_CPU_CAD_H3
HT_NB_CPU_CAD_L3
HT_NB_CPU_CAD_H4
HT_NB_CPU_CAD_L4
HT_NB_CPU_CAD_H5
HT_NB_CPU_CAD_L5
HT_NB_CPU_CAD_H6
HT_NB_CPU_CAD_L6
HT_NB_CPU_CAD_H7
HT_NB_CPU_CAD_L7
HT_NB_CPU_CAD_H8
HT_NB_CPU_CAD_L8
HT_NB_CPU_CAD_H9
HT_NB_CPU_CAD_L9
HT_NB_CPU_CAD_H10
HT_NB_CPU_CAD_L10
HT_NB_CPU_CAD_H11
HT_NB_CPU_CAD_L11
HT_NB_CPU_CAD_H12
HT_NB_CPU_CAD_L12
HT_NB_CPU_CAD_H13
HT_NB_CPU_CAD_L13
HT_NB_CPU_CAD_H14
HT_NB_CPU_CAD_L14
HT_NB_CPU_CAD_H15
HT_NB_CPU_CAD_L15
E3
E2
E1
F1
G3
G2
G1
H1
J1
K1
L3
L2
L1
M1
N3
N2
E5
F5
F3
F4
G5
H5
H3
H4
K3
K4
L5
M5
M3
M4
N5
P5
L0_CADIN_H0
L0_CADIN_L0
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H15
L0_CADIN_L15
HT_NB_CPU_CLK_H0
HT_NB_CPU_CLK_L0
HT_NB_CPU_CLK_H1
HT_NB_CPU_CLK_L1
J3
J2
J5
K5
L0_CLKIN_H0
L0_CLKIN_L0
L0_CLKIN_H1
L0_CLKIN_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
HT_NB_CPU_CTL_H0
HT_NB_CPU_CTL_L0
HT_NB_CPU_CTL_H1
HT_NB_CPU_CTL_L1
N1
P1
P3
P4
L0_CTLIN_H0
L0_CTLIN_L0
L0_CTLIN_H1
L0_CTLIN_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
FOX PZ63826-284R-41F
DG0^8000004 IC SOCKET SMD 638P S1(P1.27,H3.2)
MLX 47296-4131
TYC 4-1903401-2
L0_CADOUT_H0
L0_CADOUT_L0
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15
AE2
AE3
AE4
AE5
+1.1V_VLDT_R
+1.1V_VLDT_R
+1.1V_VLDT_R
+1.1V_VLDT_R
AD1
AC1
AC2
AC3
AB1
AA1
AA2
AA3
W2
W3
V1
U1
U2
U3
T1
R1
AD4
AD3
AD5
AC5
AB4
AB3
AB5
AA5
Y5
W5
V4
V3
V5
U5
T4
T3
HT_CPU_NB_CAD_H0
HT_CPU_NB_CAD_L0
HT_CPU_NB_CAD_H1
HT_CPU_NB_CAD_L1
HT_CPU_NB_CAD_H2
HT_CPU_NB_CAD_L2
HT_CPU_NB_CAD_H3
HT_CPU_NB_CAD_L3
HT_CPU_NB_CAD_H4
HT_CPU_NB_CAD_L4
HT_CPU_NB_CAD_H5
HT_CPU_NB_CAD_L5
HT_CPU_NB_CAD_H6
HT_CPU_NB_CAD_L6
HT_CPU_NB_CAD_H7
HT_CPU_NB_CAD_L7
HT_CPU_NB_CAD_H8
HT_CPU_NB_CAD_L8
HT_CPU_NB_CAD_H9
HT_CPU_NB_CAD_L9
HT_CPU_NB_CAD_H10
HT_CPU_NB_CAD_L10
HT_CPU_NB_CAD_H11
HT_CPU_NB_CAD_L11
HT_CPU_NB_CAD_H12
HT_CPU_NB_CAD_L12
HT_CPU_NB_CAD_H13
HT_CPU_NB_CAD_L13
HT_CPU_NB_CAD_H14
HT_CPU_NB_CAD_L14
HT_CPU_NB_CAD_H15
HT_CPU_NB_CAD_L15
10U/6.3V_8
0.22U/6.3V_4
180P/50V_4
10U/6.3V_8
SOCKET_638_PIN
CPU_LDT_RST#
+1.5VSUS
Y1
W1
Y4
Y3
HT_CPU_NB_CLK_H0
HT_CPU_NB_CLK_L0
HT_CPU_NB_CLK_H1
HT_CPU_NB_CLK_L1
R2
R3
T5
R5
HT_CPU_NB_CTL_H0
HT_CPU_NB_CTL_L0
HT_CPU_NB_CTL_H1
HT_CPU_NB_CTL_L1
R224
10K/F_4
+1.5VSUS
R225
300_4
R219
+1.5VSUS
R181
+1.5VSUS
R180
5 CPU_THERMTRIP_L#
2
0_4
0_4
CPUCLKIN
CPUCLKIN#
A9
A8
CLKIN_H
CLKIN_L
5
5
5
CPU_SIC
CPU_SID
CPU_ALERT
R114
R115
CPUTEST25H
CPUTEST25L
T7
+1.5VSUS
R172
300/F_4
CPU_DBREQ#
R338
1K/F_4
CPUTEST27
R339
T26
T30
VDDNB_FB_H
VDDNB_FB_L
H6
G6
CPUTEST23
AD7
TEST23
CPUTEST18
CPUTEST19
H10
G9
TEST18
TEST19
C2
AA6
A3
A5
B3
B5
C1
TEST25_H
TEST25_L
TEST21
TEST20
TEST24
TEST22
TEST12
TEST27
TEST9
TEST6
E10
CPU_DBREQ#
TDO
AE9
CPU_TDO
J7
H8
TEST17
TEST16
TEST15
TEST14
D7
E7
F7
C7
TEST7
TEST10
C3
K8
TEST8
C4
TEST29_H
TEST29_L
C9
C8
VDDIO_FB_H 37
VDDIO_FB_L 37
CPU_VDDNB_RUN_FB_H
CPU_VDDNB_RUN_FB_L
DBREQ_L
TEST28_H
TEST28_L
T15
CPUTEST17
CPUTEST16
CPUTEST15
CPUTEST14
R156
RSVD10
RSVD9
RSVD8
RSVD7
RSVD6
36
36
T37
T38
T29
T49
+1.1V_VLDT
*300/F_4
CPUTEST29H
T46
R130
80.6/F_4
CPUTEST29L
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
H18
H19
AA7
D5
C5
T45
Route as 80ohm, diff
SOCKET_638_PIN
VFIX MODE
+1.5V
R189
R190
R171
*1K/F_4
R176
R175
R177
R184
R183
R185
1K/F_4
1K/F_4
+1.5VSUS
+1.5V
CPU_SVC
CPU_SVD
CPU_PWRGD_SVID_REG
0_4
0_4
0_4
CPU_SVC 36
CPU_SVD 36
CPU_PWRGD_SVID_REG
SVC
SVD
0
0
1
1
0
1
0
1
VID Override table (VDD)

B
Output Voltage
1.1V
1.0V
0.9V
0.8V
36
*220_4
*220_4
*220_4
CPUTEST20
CPUTEST21
CPUTEST22
CPUTEST24
R340
R81
R80
R69
1K/F_4
1K/F_4
1K/F_4
1K/F_4
CPUTEST12
CPUTEST19
CPUTEST18
R70
R124
R125
1K/F_4
1K/F_4
1K/F_4
HDT Connector
10K/F_4
1K/F_4
CPU_THERMTRIP_L#
Q18
MMBT3904
3
CPU_THERMTRIP# 13
CPU_DBREQ#
CPU_DBRDY
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST#
CPU_TDO
Q22
CPU_PROCHOT_R#
3
MMBT3904
CPU_PROCHOT_R#
12
C74
*0.1U/10V_4
1
3
5
7
9
11
13
15
17
19
21
23
KEY
2
4
6
8
10
12
14
16
18
20
22
24
25
352-(&7$;
4XDQWD&RPSXWHU,QF
CPU_LDT_RST_HTPA#
1%5'
CN6 *HDT CONN
W9
Y9
+1.5VSUS
CPU_SVC_R
CPU_SVD_R
CPU_PWRGD
VDDIO_FB_H
VDDIO_FB_L
VDDIO_FB_H
VDDIO_FB_L
THERMTRIP_L
PROCHOT_L
MEMHOT_L
Serial VID
R170
*1K/F_4
H_THRMDC
H_THRMDA
VDD0_FB_H
VDD0_FB_L
DBRDY
TMS
TCK
TRST_L
TDI
*300/F_4
THERMDC
THERMDA
W7
W8
F6
E6
VDD1_FB_H
VDD1_FB_L
*0_4/S
CPU_THERMTRIP_L#
CPU_PROCHOT_L#
CPU_MEMHOT_L#
HT_REF0
HT_REF1
CPUTEST25H
E9
CPUTEST25L
E8
place them to CPU within 1.5"
CPUTEST21
AB8
CPUTEST20
AF7
T127
CPUTEST24
AE7
CPUTEST22
AE8
T8
CPUTEST12
AC8
T6
CPUTEST27
AF8
R157
AF6
AC7
AA8
R6
P6
R162
510/F_4
CPU_SVC_R
CPU_SVD_R
SIC
SID
ALERT_L
Y6
AB6
A6
A4
SVC
SVD
AF4
AF5
AE6
G10
AA9
AC9
AD9
AF9
CPU_DBRDY
CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI
M11
W18
RESET_L
PWROK
LDTSTOP_L
LDTREQ_L
44.2/F_4
CPU_HTREF0
CPU_HTREF1
44.2/F_4
place them to CPU within 1.5"
36 CPU_VDD1_RUN_FB_H
36 CPU_VDD1_RUN_FB_L
510/F_4
VSS
RSVD11
B7
A7
F10
C6
36 CPU_VDD0_RUN_FB_H
36 CPU_VDD0_RUN_FB_L
SI , add R205 for P-state implement
EC new option
VDDA1
VDDA2
CPU_SIC
CPU_SID
CPU_ALERT
03
+1.5V
+1.5VSUS
R205
F8
F9
CPU_LDT_RST#
CPU_PWRGD
CPU_LDT_STOP#
CPU_LDT_REQ#_CPU
R146
R148
R166
R144
U21D
W/S= 15 mil/20mil
+CPUVDDA
+CPUVDDA
3900P/25V_4
3900P/25V_4
+1.1V_VLDT
R163
R186
1K/F_4
Q19
MMBT3904
CPU_LDT_RST_HTPA#
3
+1.5VSUS
C402
C401
250mA
300_4
300_4
300_4
*300/F_4
+3V
CNTR_VREF
10K/F_4
CPUCLKP
CPUCLKN
CPUCLKIN#
169/F_4
SideBand Temp sense I2C
Es
R207
+1.5VSUS
R149
12 CPU_LDT_RST#
12 CPU_PWRGD
10,12 CPU_LDT_STOP#
MV can remove reserve for debug

B
CPUCLKIN
C99
C113
C120
C594
la
10U/6.3V_8
0.22U/6.3V_4
180P/50V_4
te
32 CPU_PROCHOT#
+CPUVDDA
U21A
C396
C390
C389
CPU_PROCHOT_L#
CPUCLKP
CPUCLKN
CPUCLKP
CPUCLKN
H_THRMDC 5
H_THRMDA 5
CPU_PWRGD
CPU_LDT_RST#
CPU_LDT_STOP#
CPU_LDT_REQ#_CPU
*0_6/S
H_THRMDC
H_THRMDA
L34
+1.1V_VLDT
R164
+1.1V
+CPUVDDA
+2.5V
VLDT use 1.5A Max current
W/S= 15 mil/20mil
Size
Custom
Document Number
Rev
1A
S1G4 HT,CTL I/F 1/3

1
Sheet
of
42


05
U21F
VDD0_1
VDD0_2
VDD0_3
VDD0_4
VDD0_5
VDD0_6
VDD0_7
VDD0_8
VDD0_9
VDD0_10
VDD0_11
VDD0_12
VDD0_13
VDD0_14
VDD0_15
VDD0_16
VDD0_17
VDD0_18
VDD0_19
VDD0_20
VDD0_21
VDD0_22
VDD0_23
K16
M16
P16
T16
V16
VDDNB_1
VDDNB_2
VDDNB_3
VDDNB_4
VDDNB_5
H25
J17
K18
K21
K23
K25
L17
M18
M21
M23
M25
N17
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
4A
+1.5VSUS
2A
VDD1_1
VDD1_2
VDD1_3
VDD1_4
VDD1_5
VDD1_6
VDD1_7
VDD1_8
VDD1_9
VDD1_10
VDD1_11
VDD1_12
VDD1_13
VDD1_14
VDD1_15
VDD1_16
VDD1_17
VDD1_18
VDD1_19
VDD1_20
VDD1_21
VDD1_22
VDD1_23
VDD1_24
VDD1_25
VDD1_26
P8
P10
R4
R7
R9
R11
T2
T6
T8
T10
T12
T14
U7
U9
U11
U13
U15
V6
V8
V10
V12
V14
W4
Y2
AC4
AD2
VDDIO27
VDDIO26
VDDIO25
VDDIO24
VDDIO23
VDDIO22
VDDIO21
VDDIO20
VDDIO19
VDDIO18
VDDIO17
VDDIO16
VDDIO15
VDDIO14
VDDIO13
Y25
V25
V23
V21
V18
U17
T25
T23
T21
T18
R17
P25
P23
P21
P18
+1.5VSUS
SOCKET_638_PIN
+1.5VSUS
R228
2K/F_4
R178
1K/F_4
Q21
MMBT3904
1
1
RB501V-40
SMBALERT#
BOTTOM SIDE DECOUPLING
C180
22U/6.3V_8
C216
22U/6.3V_8
D16
Q17 *MMBT3904
CPU_ALERT
1
C242
22U/6.3V_8
C250
22U/6.3V_8
+CPUVDDNB
C177
0.22U/6.3V_4
C178
C176
0.01U/16V_4 180P/50V_4
+1.5VSUS
C223
22U/6.3V_8
C212
22U/6.3V_8
C235
22U/6.3V_8
C214
22U/6.3V_8
C227
22U/6.3V_8
C238
C257
0.22U/6.3V_4 0.22U/6.3V_4
C258
180P/50V_4
DECOUPLING BETWEEN PROCESSOR AND DIMMs

PLACE CLOSE TO PROCESSOR AS POSSIBLE
+1.5VSUS
C115
4.7U/6.3V_6
C126
4.7U/6.3V_6
C291
4.7U/6.3V_6
C288
4.7U/6.3V_6
C119
0.22U/6.3V_4
C123
0.22U/6.3V_4
+1.5VSUS
C135
C133
C188
C172
0.22U/6.3V_4 0.22U/6.3V_4 0.01U/16V_4 0.1U/10V_4
+1.5V_VGA
*0_4
SYS_SHDN#
SYS_SHDN#
MBCLK2
MBDATA2
SCLK
VCC
SDA
DXP
ALERT#
DXN
OVERT#
GND
H_THRMDA 3
C695
1000P/50V_4
C287
180P/50V_4
C284
180P/50V_4
H_THRMDC
G786P8
EC10
0.01U/16V_4
+3V
EC12
0.01U/16V_4
C189
0.1U/10V_4
EC8
0.01U/16V_4
+VIN
EC7
0.01U/16V_4
+5V
EC1
*0.01U/16V_4
+VGA_CORE
+3V
EC15
EC6
0.1U/10V_4
*0.1U/10V_4
+3V
+VGA_CORE
+3V
*CH500H
2
*0_4/S
3920_RST#
+3V
+1.5V_VGA
+3V
3920_RST# 32
Q20
MSOP
PV ,Change from +1.5VSUS to +1.5V

for leakage current issue
R203
D17
C693
0.1U/10V_4
10K/F_4
34
+1.8V_VGA
reserve for
power shutdown
( if can )
R416
13 PM_THERM#
+1.5VSUS
EC9
0.01U/16V_4
+3V
EC11
0.01U/16V_4
+1.1V
D18
MMBT3904
2
ECPWROK
ECPWROK 16,32
+VGA_CORE
EC2
*0.01U/16V_4
SMBALERT#
R218
+1.8V_VGA
For fix HyperTransport nets

across plane splits
CH501H-40PT
10K/F_4
+3V
+VIN
R428
+1.5V
10K/F_4
R174
SI , add Q33,R428
2
CPU_THERMTRIP_L#
3 CPU_THERMTRIP_L#
PQ18
Q33
MMBT3904
3
*10K/F_4
*2N7002E-G
ADD VGA TEMP_ FAIL function

M92 is active Hi
SMBALERT#
352-(&7$;
4XDQWD&RPSXWHU,QF
EC13
PV,add for
EMI suggest
TEMP_FAIL 18
0.1U/10V_4
1
C215
22U/6.3V_8
18,32
C228
22U/6.3V_8
+3V
U25
18,32
C254
180P/50V_4
+VCORE
200/F_6
10K/F_4
C255
0.01U/16V_4
PROCESSOR POWER AND GROUND
CPU_ALERT 3
R212
10K/F_4
C256
0.22U/6.3V_4
R405
R423
C247
22U/6.3V_8
CPU_SID 3
+3V
R424
C230
22U/6.3V_8
SOCKET_638_PIN
CPU_SID
SI , add Q21,Q23,D16,D19
CPU_SIC 3
Es
D19
R187
1K/F_4
CPU_SIC
MBDATA
MBDATA
R214
1K/F_4
+VCORE
32,40
R173
2K/F_4
1
RB501V-40
Q23
MMBT3904
MBCLK
3
MBCLK
R198
2K/F_4
SI , change SMB
connection
32,40
+1.5VSUS
J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
AC6
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6
+CPUVDDNB
G4
H2
J9
J11
J13
J15
K6
K10
K12
K14
L4
L7
L9
L11
L13
L15
M2
M6
M8
M10
N7
N9
N11
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
te
+VCORE
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
la
U21E
+VCORE
AA4
AA11
AA13
AA15
AA17
AA19
AB2
AB7
AB9
AB23
AB25
AC11
AC13
AC15
AC17
AC19
AC21
AD6
AD8
AD25
AE11
AE13
AE15
AE17
AE19
AE21
AE23
B4
B6
B8
B9
B11
B13
B15
B17
B19
B21
B23
B25
D6
D8
D9
D11
D13
D15
D17
D19
D21
D23
D25
E4
F2
F11
F13
F15
F17
F19
F21
F23
F25
H7
H9
H21
H23
J4
1%5'
Size
Custom
Document Number
Rev
1A
S1G4 PWR & GND 3/3

1
Sheet
of
42


07
MEM_MB_DATA[0..63] 4
DIM2_SA0
6,13,33 PCLK_SMB
6,13,33 PDAT_SMB
4 MEM_MB0_ODT0
4 MEM_MB0_ODT1
4 MEM_MB_DM[0..7]
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
MEM_MB_DQS0_P
MEM_MB_DQS1_P
MEM_MB_DQS2_P
MEM_MB_DQS3_P
MEM_MB_DQS4_P
MEM_MB_DQS5_P
MEM_MB_DQS6_P
MEM_MB_DQS7_P
MEM_MB_DQS0_N
MEM_MB_DQS1_N
MEM_MB_DQS2_N
MEM_MB_DQS3_N
MEM_MB_DQS4_N
MEM_MB_DQS5_N
MEM_MB_DQS6_N
MEM_MB_DQS7_N
BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA
116
120
ODT0
ODT1
11
28
46
63
136
153
170
187
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DIM2_SA0
PCLK_SMB
PDAT_SMB
MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7
12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
MEM_MB_DATA0
MEM_MB_DATA1
MEM_MB_DATA2
MEM_MB_DATA3
MEM_MB_DATA4
MEM_MB_DATA5
MEM_MB_DATA6
MEM_MB_DATA7
MEM_MB_DATA8
MEM_MB_DATA9
MEM_MB_DATA10
MEM_MB_DATA11
MEM_MB_DATA12
MEM_MB_DATA13
MEM_MB_DATA14
MEM_MB_DATA15
MEM_MB_DATA16
MEM_MB_DATA17
MEM_MB_DATA18
MEM_MB_DATA19
MEM_MB_DATA20
MEM_MB_DATA21
MEM_MB_DATA22
MEM_MB_DATA23
MEM_MB_DATA24
MEM_MB_DATA25
MEM_MB_DATA26
MEM_MB_DATA27
MEM_MB_DATA28
MEM_MB_DATA29
MEM_MB_DATA30
MEM_MB_DATA31
MEM_MB_DATA32
MEM_MB_DATA33
MEM_MB_DATA34
MEM_MB_DATA35
MEM_MB_DATA36
MEM_MB_DATA37
MEM_MB_DATA38
MEM_MB_DATA39
MEM_MB_DATA40
MEM_MB_DATA41
MEM_MB_DATA42
MEM_MB_DATA43
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
MEM_MB_DATA47
MEM_MB_DATA48
MEM_MB_DATA49
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA52
MEM_MB_DATA53
MEM_MB_DATA54
MEM_MB_DATA55
MEM_MB_DATA56
MEM_MB_DATA57
MEM_MB_DATA58
MEM_MB_DATA59
MEM_MB_DATA60
MEM_MB_DATA61
MEM_MB_DATA62
MEM_MB_DATA63
CN24B
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
199
VDDSPD
MEM_MB_TEST
77
122
125
NC1
NC2
NCTEST
MEM_MB_RESET#
198
30
EVENT#
RESET#
1
126
VREF_DQ
VREF_CA
+3V
T11
14 MEM_MB_EVENT#
4 MEM_MB_RESET#
+VREF_DQ
+VREF_DQ
+VREF_CA_B
C395
1000P/50V_4
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
C112
1000P/50V_4
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
PC2100 DDR3 SDRAM SO-DIMM

(204P)
R335
4.7K_4
109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
+3V
MEM_MB0_CS#0
MEM_MB0_CS#1
MEM_MB_CLK5_P
MEM_MB_CLK5_N
MEM_MB_CLK4_P
MEM_MB_CLK4_N
4 MEM_MB_CKE0
4 MEM_MB_CKE1
4 MEM_MB_CAS#
4 MEM_MB_RAS#
4 MEM_MB_WE#
MEM_MB_BANK0
MEM_MB_BANK1
MEM_MB_BANK2
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
la
4
4
4
4
4
4
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
te
4 MEM_MB_BANK[0..2]
98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VTT1
VTT2
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
203
204
+0.75V_DDR_VTT
DDR3-DIMM2
Es
MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15
PC2100 DDR3 SDRAM SO-DIMM

(204P)
CN24A
4 MEM_MB_ADD[0..15]
+1.5VSUS
DDR3-DIMM2
H=9.2 footprint: "ddr-c-2013310-204p-1"
SO-DIMM BYPASS PLACEMENT :

3ODFHWKHVH&DSVQHDU6R'LPP
1R9LDV%HWZHHQWKH7UDFHRI3,1WR&$3
+1.5VSUS
C197
.1U/10V_4
DE-COUPLING FOR DIMM2(ONE CAP PER POWER PIN)
C151
.1U/10V_4
C127
.1U/10V_4
C198
.1U/10V_4
C152
.1U/10V_4
C128
.1U/10V_4
C229
*.1U/10V_4
C166
*.1U/10V_4
C140
*.1U/10V_4
C225
*.1U/10V_4
C167
*.1U/10V_4
C141
*.1U/10V_4
+1.5VSUS
SI , remove C165 , C236

add C845 , C846 ,C844
Reserve C902
+VREF_CA_B
DE-COUPLING FOR DIMM2
R99
*2K/F_4
+3V
+0.75V_DDR_VTT
+0.75V_DDR_VTT
+1.5VSUS
R88
*0_4/S
+VREF_CA_B
4,6,37 DDR_VTTREF
C36
1U/6.3V_4
C37
*.1U/10V_4
C32
4.7U/6.3V_6
*.1U/10V_4
C43
*22U/6.3V_8
+ C902
+1.5VSUS
C38
.1U/10V_4
C845
10U/6.3V_8
C846
C844
10U/6.3V_8 10U/6.3V_8
C30
*150u_6.3V_3528
352-(&7$;
4XDQWD&RPSXWHU,QF
R96
*2K/F_4
PV,change
to short pad
Size
Custom
1%5'
4
Document Number
Rev
1A
DDR3 SODIMMS TERMINATIONS

1
Sheet
of
42


SI , for routing smooth

GFX_RX can remove
at next stage for MUXLESS
UMA can remove all GFX_TX CAP
09
GFX_TX 0/1/3/9/10/11
SI remove C711,C713,C710,
C712,C708,C709,C703,C704
for MUXLESS
U22B
33 PCIE_RXP1
33 PCIE_RXN1
30 PCIE_RXP2_LAN
30 PCIE_RXN2_LAN
12
12
12
12
12
12
12
12
AA8
Y8
AA7
Y7
AA5
AA6
W5
Y5
PCIE_SB_NB_RX0P
PCIE_SB_NB_RX0N
PCIE_SB_NB_RX1P
PCIE_SB_NB_RX1N
PCIE_SB_NB_RX2P
PCIE_SB_NB_RX2N
PCIE_SB_NB_RX3P
PCIE_SB_NB_RX3N
GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
GPP_RX4P
GPP_RX4N
GPP_RX5P
GPP_RX5N
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N
PCIE I/F GPP
PCIE I/F SB
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
A5
B5
A4
B4
C3
B2
D1
D2
E2
E1
F4
F3
F1
F2
H4
H3
H1
H2
J2
J1
K4
K3
K1
K2
M4
M3
M1
M2
N2
N1
P1
P2
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX4P
GPP_TX4N
GPP_TX5P
GPP_TX5N
AC1
AC2
AB4
AB3
AA2
AA1
Y1
Y2
Y4
Y3
V1
V2
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
PCE_CALRP(PCE_BCALRP)
PCE_CALRN(PCE_BCALRN)
C708
C709
C698
C696
C691
C694
C690
C688
C686
C687
C685
C682
C670
C674
C669
C667
C662
C666
C656
C658
C_PEG_TX15
C711
C_PEG_TX#15
C713
C_PEG_TX14
C710
C_PEG_TX#14
C712
PEG_TX13
*0.1U/10V_4
PEG_TX#13
*0.1U/10V_4
C_PEG_TX#12
C703
C_PEG_TX12
C704
PEG_TX11
*0.1U/10V_4
PEG_TX#11
*0.1U/10V_4
PEG_TX10
*0.1U/10V_4
PEG_TX#10
*0.1U/10V_4
*0.1U/10V_4
PEG_TX9
PEG_TX#9
*0.1U/10V_4
PEG_TX8
*0.1U/10V_4
PEG_TX#8
*0.1U/10V_4
PEG_TX7
0.1U/10V_4
0.1U/10V_4
PEG_TX#7
C_PEG_TX#6
C679
C_PEG_TX6
C681
C_PEG_TX#5
C675
C_PEG_TX5
C676
C_PEG_TX#4
C677
C_PEG_TX4
C678
PEG_TX3
0.1U/10V_4
PEG_TX#3
0.1U/10V_4
PEG_TX2
0.1U/10V_4
0.1U/10V_4
PEG_TX#2
PEG_TX1
0.1U/10V_4
PEG_TX#1
0.1U/10V_4
PEG_TX0
0.1U/10V_4
PEG_TX#0
0.1U/10V_4
*0.1U/10V_4
*0.1U/10V_4
*0.1U/10V_4
*0.1U/10V_4
PEG_TX15
PEG_TX#15
PEG_TX14
PEG_TX#14
*0.1U/10V_4
*0.1U/10V_4
PEG_TX12
PEG_TX#12
Close to North Bridge
C_PEG_TX15
C_PEG_TX#15
PV,change to reserve
for MUXLESS
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
PEG_TX6
PEG_TX#6
PEG_TX5
PEG_TX#5
PEG_TX4
PEG_TX#4
C155
C156
C618
C631
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
C_PEG_TX13 25
C_PEG_TX#13 25
C_PEG_TX12
C_PEG_TX#12
C_PEG_TX12 25
C_PEG_TX#12 25
To HDMI CONN
17 PEG_RX[15:0]
PCIE_TXP1 33
PCIE_TXN1 33
PCIE_TXP2_LAN 30
PCIE_TXN2_LAN 30
C_PEG_TX14 25
C_PEG_TX#14 25
C_PEG_TX13
C_PEG_TX#13
17 PEG_RX#[15:0]
PCIE_TXP1_C
PCIE_TXN1_C
PCIE_TXP2_C
PCIE_TXN2_C
C_PEG_TX15 25
C_PEG_TX#15 25
C_PEG_TX14
C_PEG_TX#14
PEG_RX#[15:0]
PEG_TX#[15:0]
PEG_RX[15:0]
PEG_TX[15:0]
PEG_TX#[15:0] 17
PEG_TX[15:0] 17
TO WLAN
TO PCIE-LAN
AD7
AE7
AE6
AD6
AB6
AC6
AD5
AE5
A_TX0P_C
A_TX0N_C
A_TX1P_C
A_TX1N_C
A_TX2P_C
A_TX2N_C
A_TX3P_C
A_TX3N_C
AC8
AB8
NB_PCIECALRP
NB_PCIECALRN
C622
C621
C623
C624
C157
C158
C626
C625
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
R104
R107
1.27K/F_4
2K/F_4
PCIE_NB_SB_TX0P
PCIE_NB_SB_TX0N
PCIE_NB_SB_TX1P
PCIE_NB_SB_TX1N
PCIE_NB_SB_TX2P
PCIE_NB_SB_TX2N
PCIE_NB_SB_TX3P
PCIE_NB_SB_TX3N
12
12
12
12
12
12
12
12
+1.1V
Es
RS880
C_PEG_TX#15
C_PEG_TX15
C_PEG_TX#14
C_PEG_TX14
C_PEG_TX13
C_PEG_TX#13
C_PEG_TX12
C_PEG_TX#12
C_PEG_TX11
C_PEG_TX#11
C_PEG_TX10
C_PEG_TX#10
C_PEG_TX9
C_PEG_TX#9
C_PEG_TX8
C_PEG_TX#8
C_PEG_TX7
C_PEG_TX#7
C_PEG_TX6
C_PEG_TX#6
C_PEG_TX5
C_PEG_TX#5
C_PEG_TX4
C_PEG_TX#4
C_PEG_TX3
C_PEG_TX#3
C_PEG_TX2
C_PEG_TX#2
C_PEG_TX1
C_PEG_TX#1
C_PEG_TX0
C_PEG_TX#0
PART 2 OF 6
la
AE3
AD4
PCIE_RXP1
AE2
PCIE_RXN1
AD3
PCIE_RXP2_LAN AD1
PCIE_RXN2_LAN AD2
V5
W6
U5
U6
U8
U7
GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N
te
D4
C4
A3
B3
C2
C1
E5
F5
G5
G6
H5
H6
J6
J5
J7
J8
L5
L6
M8
L8
P7
M7
P5
M5
R8
P8
R6
R5
P4
P3
T4
T3
PCIE I/F GFX
PEG_RX15
PEG_RX#15
PEG_RX#14
PEG_RX14
PEG_RX13
PEG_RX#13
PEG_RX12
PEG_RX#12
PEG_RX11
PEG_RX#11
PEG_RX10
PEG_RX#10
PEG_RX9
PEG_RX#9
PEG_RX8
PEG_RX#8
PEG_RX7
PEG_RX#7
PEG_RX6
PEG_RX#6
PEG_RX5
PEG_RX#5
PEG_RX4
PEG_RX#4
PEG_RX3
PEG_RX#3
PEG_RX2
PEG_RX#2
PEG_RX1
PEG_RX#1
PEG_RX0
PEG_RX#0
RS880 Display Port Support (muxed on GFX)
GFX_TX0,TX1,TX2 and TX3
DP0
AUX0 and HPD0
GFX_TX4,TX5,TX6 and TX7
DP1
AUX1 and HPD1
352-(&7$;
4XDQWD&RPSXWHU,QF
Size
Custom
1%5'
Document Number
Rev
1A
RS880-PCIE I/F 2/5
Sheet
1
of
42


PART 6/6
VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
U22E
+1.1V_VDDHT
0.7A
L67
*0_8/S
C707
10U/6.3V_8
RS880
0.5A
L12
*0_8/S
C211
0.1U/10V_4
C334
0.1U/10V_4
C701
0.1U/10V_4
+1.1V_VDDHTTX
C222
0.1U/10V_4
C241
0.1U/10V_4
C203
0.1U/10V_4
+1.8V 1A for RS780M+SB700

+1.8V
700mA
L19
PBY201209T-221Y-N(220,2A)
C196
4.7U/6.3V_6
VDDA18PCIE PCIE TX stage

I/O for
RX780/RS780
VDD18 - RS780 I/O

transform
H18
G19
F20
E21
D22
B23
A23
VDDHTRX_1
VDDHTRX_2
VDDHTRX_3
VDDHTRX_4
VDDHTRX_5
VDDHTRX_6
VDDHTRX_7
AE25
AD24
AC23
AB22
AA21
Y20
W 19
V18
U17
T17
R17
P17
M17
+1.8V
+1.8V_VDDA18PCIE
C182
4.7U/6.3V_6
R138
C248
0.1U/10V_4
*0_6/S
C219
0.1U/10V_4
+1.8V
R353
*0_6/S
VDD18_MEM For UMA RS780 only

Not applicable to RX780
memory I/O transform
C262
0.1U/10V_4
C234
0.1U/10V_4
25mA
C310
1U/10V_4
25mA
C616
1U/10V_4
PART 5/6
VDDHTTX_1
VDDHTTX_2
VDDHTTX_3
VDDHTTX_4
VDDHTTX_5
VDDHTTX_6
VDDHTTX_7
VDDHTTX_8
VDDHTTX_9
VDDHTTX_10
VDDHTTX_11
VDDHTTX_12
VDDHTTX_13
Es
C340
0.1U/10V_4
+1.1V 2A for RS880M

C179
4.7U/6.3V_6
C277
0.1U/10V_4
+1.1V_VDDHTRX
VDDHTTX - HT
LINK TX I/O for
RS880
+1.1V
C311
0.1U/10V_4
VDDHT_1
VDDHT_2
VDDHT_3
VDDHT_4
VDDHT_5
VDDHT_6
VDDHT_7
+1.8V_VDDG18_NB
+1.8V_VDD18_MEM
J10
P10
K10
M10
L10
W9
H9
T10
R10
Y9
AA9
AB9
AD9
AE9
U10
F9
G9
AE11
AD11
POWER
VDDHTRX - HT
LINK RX I/O for
RX780/RS780
C259
0.1U/10V_4
J17
K16
L16
M16
P16
R16
T16
VDDPCIE_1
VDDPCIE_2
VDDPCIE_3
VDDPCIE_4
VDDPCIE_5
VDDPCIE_6
VDDPCIE_7
VDDPCIE_8
VDDPCIE_9
VDDPCIE_10
VDDPCIE_11
VDDPCIE_12
VDDPCIE_13
VDDPCIE_14
VDDPCIE_15
VDDPCIE_16
VDDPCIE_17
A6
B6
C6
D6
E6
F6
G7
H8
J9
K9
M9
L9
P9
R9
T9
V9
U9
te
C607
4.7U/6.3V_6
11
PIN NAME
RS880M
VDDHT
+1.1V
IOPLLVDD
+1.1V
VDDHTRX
+1.1V
AVDD
+3.3V
VDDHTTX
+1.2V
AVDDDI
+1.8V
VDDA18PCIE
+1.8V
AVDDQ
+1.8V
VDDG18
+1.8V
PLLVDD
+1.1V
VDD18_MEM
+1.8V
PLLVDD18
+1.8V
VDDPCIE
+1.1V
VDDA18PCIEPLL
+1.8V
VDDC
+1.1V
VDDA18HTPLL
+1.8V
VDDLTP18
+1.8V
+1.8V/1.5V
+1.1V 2A for RS880M

L51
*0_8/S
RS880M
VDDG33
+3.3V
VDDLT18
+1.8V
IOPLLVDD18
+1.8V
VDDLT33
NC
la
+1.1V
0.6A
PIN NAME
VDD_MEM
L12
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11
VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT20
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
A25
D23
E22
G22
G24
G25
H19
J22
L17
L22
L24
L25
M20
N22
P20
R19
R22
R24
R25
H20
U22
V19
W22
W24
W25
Y21
AD25
VDDHT - HT
LINK digital
I/O for
RX780/RS780
RS880M POWER TABLE
GROUND
AE14
D11
G8
E14
E15
J15
J12
K14
M11
L15
U22F
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
A2
B1
D3
D5
E4
G1
G2
G4
H7
J4
R7
L1
L2
L4
L7
M6
N4
P6
R1
R2
R4
V7
U4
V8
V6
W1
W2
W4
W7
W8
Y6
AA4
AB5
AB1
AB7
AC3
AC4
AE1
AE4
AB2
VDDA18PCIE_1
VDDA18PCIE_2
VDDA18PCIE_3
VDDA18PCIE_4
VDDA18PCIE_5
VDDA18PCIE_6
VDDA18PCIE_7
VDDA18PCIE_8
VDDA18PCIE_9
VDDA18PCIE_10
VDDA18PCIE_11
VDDA18PCIE_12
VDDA18PCIE_13
VDDA18PCIE_14
VDDA18PCIE_15
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDD_MEM1(NC)
VDD_MEM2(NC)
VDD_MEM3(NC)
VDD_MEM4(NC)
VDD_MEM5(NC)
VDD_MEM6(NC)
VDDG18_1(VDD18_1)
VDDG18_2(VDD18_2)
VDD18_MEM1(NC)
VDD18_MEM2(NC)
VDDG33_1(NC)
VDDG33_2(NC)
RS880
K12
J14
U16
J11
K15
M12
L14
L11
M13
M15
N12
N14
P11
P13
P14
R12
R15
T11
T15
U12
T14
J16
VDDPCIE - PCIE-E Main power
2.5A
+1.1V_VDD_PCIE
C297
0.1U/10V_4
C372
0.1U/10V_4
C320
1U/10V_4
C352
1U/10V_4
R143
*0_8/S
+1.1V
C382
4.7U/6.3V_6
7A
VDDC - Core Logic power

+1.1V_DYN
C246
0.1U/10V_4
C286
0.1U/10V_4
C296
0.1U/10V_4
C299
0.1U/10V_4
C29
10U/6.3V_8
C280
0.1U/10V_4
C270
0.1U/10V_4
C245
0.1U/10V_4
C41
10U/6.3V_8
VDD_MEM For UMA RS780 only

memory I/O transform
SI , change footprint to 0603
AE10
AA11
Y11
AD10
AB10
AC10
+1.5V_VDD_MEM
H11
H12
+3V_VDDG33
C207
*0.1U/10V_4
C364
0.1U/10V_4
L55
C186
*0.1U/10V_4
C185
*0.1U/10V_4
RS780
*0_6/S
R139
C353
0.1U/10V_4
C205
0_4
*0_8
+1.5V
C204
*4.7U/6.3V_6
3.3V(0.06A)
+3V
VDD33 - 3.3V I/O

This is side port power

DIS remove L55 ,
change C205 to 0 ohm
and short to GND
352-(&7$;
4XDQWD&RPSXWHU,QF
1%5'
Size
Custom
Document Number
Rev
1A
RS880-POWER5/5
Date: Tuesday, December 22, 2009

1
Sheet
11
of
42


NC,no install by default
R459
R460
32
32
2.2K_4 SB_SMBCLK1
2.2K_4 SB_SMBDATA1
GATEA20
RCIN#
32
32
KBSMI#
SCI#
SCI#
SYS_RST#
30,33 PCIE_WAKE#
3 CPU_THERMTRIP#
R312
2.2K_4 PCLK_SMB
R311
2.2K_4
PDAT_SMB
C500
100P/50V_4
+3V
10K/F_4
RB501V-40 D38
1
VGA_REQ
SI , add R561,D38 for VGA_CLK_REQ
2.2K_4
2.2K_4
*10K_4
SB_SCLK2
SB_SDATA2
SYS_RST#
PV,Reserve for system stable

5
+3VS5
R458
R243
R244
PM_THERM#
+3VS5
DNBSWON#
2.2K_4
+3V
SI , add from HP request

R457
4.7K_4
SUS_STAT#
R332
R334
8.2K_4
8.2K_4
WLAN_CLKREQ#
LAN_CLKREQ#
R255
16
13
33_4
ACZ_SDOUT_AUDIO
C478
*10P/50V_4
ACZ_SYNC
R251
33_4
ACZ_SYNC_AUDIO
C484
*10P/50V_4
C479
27P/50V_4
PV, change to 27P

from EMI suggest
ACZ_BCLK
ACZ_RST#
R254
BIT_CLK_AUDIO
33_4
R242
33_4
ACZ_SDIN0
ACZ_SDOUT
R246
33_4
ACZ_SYNC
R248
33_4
ACZ_BCLK
R256
33_4
ACZ_RST#
R249
ACZ_SDIN1
EMI suggestion
R509
10K/F_4
R511
10K/F_4
R545
10K/F_4
28
T167
28
*10P/50V_4
RSMRST#
CLK_REQ4#/SATA_IS0#/GPIO64
SMARTVOLT1/SATA_IS2#/GPIO50
SATA_IS4#/FANOUT3/GPIO55
SATA_IS5#/FANIN3/GPIO59
SPKR/GPIO66
SCL0/GPIO43
SDA0/GPIO47
SCL1/GPIO227
SDA1/GPIO228
CLK_REQ2#/FANIN4/GPIO62
CLK_REQ1#/FANOUT4/GPIO61
IR_LED#/LLB#/GPIO184
SMARTVOLT2/SHUTDOW N#/GPIO51
DDR3_RST#/GEVENT7#
GBE_LED0/GPIO183
GBE_LED1/GEVENT9#
GBE_LED2/GEVENT10#
GBE_STAT0/GEVENT11#
CLK_REQG#/GPIO65/OSCIN
H3
D1
E4
D4
E8
F7
E7
F8
BLINK/USB_OC7#/GEVENT18#
USB_OC6#/IR_TX1/GEVENT6#
USB_OC5#/IR_TX0/GEVENT17#
USB_OC4#/IR_RX0/GEVENT16#
USB_OC3#/AC_PRES/TDO/GEVENT15#
USB_OC2#/TCK/GEVENT14#
USB_OC1#/TDI/GEVENT13#
USB_OC0#/TRST#/GEVENT12#
M3
N1
L2
M2
M1
M4
N2
P2
AZ_BITCLK
AZ_SDOUT
AZ_SDIN0/GPIO167
AZ_SDIN1/GPIO168
AZ_SDIN2/GPIO169
AZ_SDIN3/GPIO170
AZ_SYNC
AZ_RST#
T1
T4
L6
L5
T9
U1
U3
T2
U2
T5
V5
P5
M5
P9
T7
P7
M7
P4
M9
V7
GBE_COL
GBE_CRS
GBE_MDCK
GBE_MDIO
GBE_RXCLK
GBE_RXD3
GBE_RXD2
GBE_RXD1
GBE_RXD0
GBE_RXCTL/RXDV
GBE_RXERR
GBE_TXCLK
GBE_TXD3
GBE_TXD2
GBE_TXD1
GBE_TXD0
GBE_TXCTL/TXEN
GBE_PHY_PD
GBE_PHY_RST#
GBE_PHY_INTR
E23
E24
F21
G29
PS2_DAT/SDA4/GPIO187
PS2_CLK/SCL4/GPIO188
SPI_CS2#/GBE_STAT2/GPIO166
FC_RST#/GPO160
D27
F28
F29
E27
PS2KB_DAT/GPIO189
PS2KB_CLK/GPIO190
PS2M_DAT/GPIO191
PS2M_CLK/GPIO192
+3VSUS
C833
10P/50V_4
CN32
28
27P/50V_4
ACZ_RST#_AUDIO_MDC
ACZ_SDIN1
10K/F_4
10K/F_4
T118
T166
*10P/50V_4
Remove short pad

5
+3VS5
R483
R505
27
BIT_CLK_AUDIO_MDC
C486
33_4
ACZ_BCLK
ACZ_SDOUT
ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2_R
ACZ_SDIN3_R
ACZ_SYNC
ACZ_RST#
27
PV, change to 27P

from EMI suggest
*10K/F_4
*10K/F_4
*10K/F_4
*10K/F_4
SI , add pull up resistor

from AMD recommend
ACZ_SYNC_AUDIO_MDC
C473
R455
R453
R454
R452
PV,change from pull

high to pull low from
AMD update
ACZ_SDOUT_AUDIO_MDC
C477
*0_4
SMBALERT#_1
10K/F_4
SB_JTAG_TDO
SB_JTAG_TCK
SB_JTAG_TDI
SB_JTAG_RST#
27
Remove short pad
To Modem Board
J10
H11
USB_FSD0P/GPIO185
USB_FSD0N
H9
J8
T83
T82
USB_HSD13P
USB_HSD13N
B12
A12
T99
T88
USB_HSD12P
USB_HSD12N
F11
E11
T90
T100
USB_HSD11P
USB_HSD11N
E14
E12
28
SB JTAG
11.8K/F_6
SI,add R272 for PARK LP 14M CLK source

CLK_48M_USB
USBP15+
USBP15-
29
29
BLUETOOTH
for EMI
26
26
USB
USBP10+
USBP10-
33
33
WLAN Min-Card
USBP6+
USBP6-
29
29
USB Connector
USBP5+
USBP5-
29
29
USB Connector
J12
J14
USB_HSD9P
USB_HSD9N
A13
B13
T103
T87
USB_HSD8P
USB_HSD8N
D13
C13
T105
T94
USB_HSD7P
USB_HSD7N
G12
G14
T101
T96
USB_HSD6P
USB_HSD6N
G16
G18
USB_HSD5P
USB_HSD5N
D16
C16
USB_HSD4P
USB_HSD4N
B14
A14
T148
T150
USB_HSD3P
USB_HSD3N
E18
E16
T109
T112
USB_HSD2P
USB_HSD2N
J16
J18
USB_HSD1P
USB_HSD1N
B17
A17
USB_HSD0P
USB_HSD0N
A16
B16
SCL2/GPIO193
SDA2/GPIO194
SCL3_LV/GPIO195
SDA3_LV/GPIO196
EC_PW M0/EC_TIMER0/GPIO197
D25
F23
B26
E26
F25
E22
F22
E21
KSI_0/GPIO201
KSI_1/GPIO202
KSI_2/GPIO203
KSI_3/GPIO204
KSI_4/GPIO205
KSI_5/GPIO206
KSI_6/GPIO207
KSI_7/GPIO208
G24
G25
E28
E29
D29
D28
C29
C28
KSO_0/GPIO209
KSO_1/GPIO210
KSO_2/GPIO211
KSO_3/GPIO212
KSO_4/GPIO213
KSO_5/GPIO214
KSO_6/GPIO215
KSO_7/GPIO216
KSO_8/GPIO217
KSO_9/GPIO218
KSO_10/GPIO219
KSO_11/GPIO220
KSO_12/GPIO221
KSO_13/GPIO222
KSO_14/GPIO223
KSO_15/GPIO224
KSO_16/GPIO225
KSO_17/GPIO226
B28
A27
B27
D26
A26
C26
A24
B25
A25
D24
B24
C24
B23
A23
D22
C22
A22
B22
USBP2+
USBP2-
card reader
23
23
Carama USB
29
29
USB Connector
T107
T149
USBP0+
USBP0-
1
2
3
4
5
6
7
8
SB_SCLK2
SB_SDATA2
SB_SCLK3
5159_RST_R#
T168
5159_RST_R# 26
SB_GPIO199
SB_GPIO200
SB_GPIO199 16
SB_GPIO200 16
SPI/LPC define
SB820M A12
SB_JTAG_TCK
SB_JTAG_TDO
SB_JTAG_TDI
SB_TEST1
352-(&7$;
4XDQWD&RPSXWHU,QF
SB_JTAG_RST#
28
1%5'
*S/W JTAG DEBUG
C509
*2.2P/50V_4
USBP11+
USBP11-
USB_HSD10P
USB_HSD10N
27
27
ACZ_RST#_AUDIO
ACZ_SDIN0
AD19
AA16
*0_4 LAN_DISABLE#_SB AB21
AC18
AF20
AE19
ACZ_SPKR
AF19
PCLK_SMB
AD22
PDAT_SMB
AE22
SB_SMBCLK1
F5
SB_SMBDATA1
F4
AH21
VGA_REQ_R
AB18
E1
AJ21
H4
D5
D7
G5
K3
EXT_SB_OSC
AA20
Es
R247
G1
USB_FSD1P/GPIO186
USB_FSD1N
PV,delete R272
R291
*10K/F_4
ACZ_SDOUT
HD audio
interface is
3.3S5 voltage
To Azalia
ACZ_SDOUT
R444
T69
T152
8 SP_DDR3_RST#
T67
T78
T77
T74
T121
SCL2/SDATA2 is 3V/S5 tolerance

AMD datasheet define it
RSMRST#
RSMRST#
33 WLAN_CLKREQ#
R296
R292
R576
32
T119
30 LAN_CLKREQ#
30,32 LAN_DISABLE#
12 SB_GPIO_RST#
T123
T114
27 ACZ_SPKR
6,7,33 PCLK_SMB
6,7,33 PDAT_SMB
R561
37
WD_PWRGD
16 WD_PWRGD
Clock gen/Robson/TV
tuner
/DDR2/DDR2
thermal/Accelerometer
USB_RCOMP_SB
la
is 3V tolerance
te
+3V SCL0/SDATA0
CLK_48M_USB
G19
SI , Add SB_GPIO_RST#
form AMD recommand
SB800
A10
USB_RCOMP
USB 1.1 USB MISC
SB_TEST2
USBCLK/14M_25M_48M_OSC
USB 2.0
*2.2K_4
ACPI / WAKE UP EVENTS
R245
PCI_PME#/GEVENT4#
RI#/GEVENT22#
SPI_CS3#/GBE_STAT1/GEVENT21#
SLP_S3#
SLP_S5#
PW R_BTN#
PW R_GOOD
SUS_STAT#
Part 4 of 5
TEST0
TEST1/TMS
TEST2
GA20IN/GEVENT0#
KBRST#/GEVENT1#
LPC_PME#/GEVENT3#
LPC_SMI#/GEVENT23#
GEVENT5#
SYS_RESET#/GEVENT19#
W AKE#/GEVENT8#
IR_RX1/GEVENT20#
THRMTRIP#/SMBALERT#/GEVENT2#
NB_PW RGD
GPIO
SB_TEST1
J2
K1
D3
F1
H1
F2
H5
G6
B3
C4
F6
AD21
AE21
K2
J29
H2
J1
H6
F3
J6
AC19
USB OC
*2.2K_4
RI#
SPI_CS3#
SUSB#
SUSC#
DNBSWON#
SB_PWRGD_IN
SUS_STAT#
SB_TEST0
SB_TEST1
SB_TEST2
GATEA20
RCIN#
EMBEDDED CTRL
R470
14 MEM_GEVEN#
T144
T73
32
SUSB#
32
SUSC#
32 DNBSWON#
16 SB_PWRGD_IN
10 SUS_STAT#
remove pull hi
( chip internal
have pull hi )
SCL1/SDATA1 is 3V/S5 tolerance

+3VS5
U29D
SB_TEST0
EMBEDDED CTRL
*2.2K_4
HD AUDIO
+3VS5
PV,remove workaround
R253
GBE LAN
+3VS5
Size
Custom
Document Number
Rev
1A
SB820-ACPI/GPIO/USB 2/4

1
Sheet
13
of
42


PLACE ALL THE DECOUPLING CAPS ON

THIS SHEET CLOSE TO SB AS POSSIBLE.
VDD-- S/B CORE power

+1.1V_VCC_SB_R
U29C
C526
0.1U/10V_4
1.8V : FLASH MEMORY MODE(DEFAULT)

VDD33_18--3.3V IDE I/O power
3.3V: IDE MODE
R310
1.8V flash memory I/O power
*0_8/S
VDDIO_18_FC
71mA
Delete Cap and change +1.8V to pull low from

AMD command , due to no IDE & flash mode
AF22
AE25
AF24
AC22
PV,change
to short pad
L75
L42
C788
10U/6.3V_8
C547
0.1U/10V_4
C542
0.1U/10V_4
93mA
VDDPL_3.3V_SATA
PBY160808T-221Y-N(220,2A)
C513
2.2U/6.3V_4
C508
*0.1U/10V_4
+1.1V_AVDD_SATA
AVDD_SATA--SATA phy power

+1.1V
567mA
L49
For support USB

wakeup-->3V_S5
AD14
AJ20
AF18
AH20
AG19
AE18
AD18
AE16
C538
0.1U/10V_4
C521
1U/10V_4
658mA
L73
PBY160808T-221Y-N(220,2A)
C766
10U/6.3V_8
B
+1.1VS5
L43
C767
10U/6.3V_8
C769
1U/10V_4
C505
2.2U/6.3V_4
+VDDIO_AZ
A18
A19
A20
B18
B19
B20
C18
C20
D18
D19
D20
E19
C11
D11
C506
0.1U/10V_4
VDDAN_11_USB_S_1
VDDAN_11_USB_S_2
M6
P8
VDDIO_33_S_1
VDDIO_33_S_2
VDDIO_33_S_3
VDDIO_33_S_4
VDDIO_33_S_5
VDDIO_33_S_6
VDDIO_33_S_7
VDDIO_33_S_8
A21
D21
B21
K10
L10
J9
T6
T8
VDDCR_11_S_1
VDDCR_11_S_2
F26
G26
VDDIO_AZ_S
VDDCR_11_USB_S_1
VDDCR_11_USB_S_2
M8
C539
1U/10V_4
+3VS5
BLM18PG181SN1D(180,1.5A)_6
C543
0.1U/10V_4
C770
*0.1U/10V_4
C771
2.2U/6.3V_6
C791
22U/6.3V_8
R487
*0_6/S
C773
2.2U/6.3V_6
113mA
TBDmA
+3VS5
PV,change
to short pad
R303
C545
1U/10V_4
+VDDIO_AZ
*0_6/S
SB800
Y14
Y16
AB16
AC14
AE12
AE14
AF9
AF11
AF13
AF16
AG8
AH7
AH11
AH13
AH16
AJ7
AJ11
AJ13
AJ16
VSSIO_SATA_1
VSSIO_SATA_2
VSSIO_SATA_3
VSSIO_SATA_4
VSSIO_SATA_5
VSSIO_SATA_6
VSSIO_SATA_7
VSSIO_SATA_8
VSSIO_SATA_9
VSSIO_SATA_10
VSSIO_SATA_11
VSSIO_SATA_12
VSSIO_SATA_13
VSSIO_SATA_14
VSSIO_SATA_15
VSSIO_SATA_16
VSSIO_SATA_17
VSSIO_SATA_18
VSSIO_SATA_19
A9
B10
K11
B9
D10
D12
D14
D17
E9
F9
F12
F14
F16
C9
G11
F18
D9
H12
H14
H16
H18
J11
J19
K12
K14
K16
K18
H19
S5_1.1V--1.1V standby power
VDDCR_1.1V
VSSIO_USB_1
VSSIO_USB_2
VSSIO_USB_3
VSSIO_USB_4
VSSIO_USB_5
VSSIO_USB_6
VSSIO_USB_7
VSSIO_USB_8
VSSIO_USB_9
VSSIO_USB_10
VSSIO_USB_11
VSSIO_USB_12
VSSIO_USB_13
VSSIO_USB_14
VSSIO_USB_15
VSSIO_USB_16
VSSIO_USB_17
VSSIO_USB_18
VSSIO_USB_19
VSSIO_USB_20
VSSIO_USB_21
VSSIO_USB_22
VSSIO_USB_23
VSSIO_USB_24
VSSIO_USB_25
VSSIO_USB_26
VSSIO_USB_27
VSSIO_USB_28
+1.1VS5
C549
1U/10V_4
Y4
EFUSE
D8
VSSAN_HW M
VDDCR_1.1V_USB
A11
B11
PBY160808T-221Y-N(220,2A)
L71
+1.1VS5
197mA
VDDPL_33_SYS
+VDDPL_3.3V
47mA
VDDPL_11_SYS_S
L22
+VDDPL_1.1V
62mA
VDDPL_33_USB_S
F19
+VDDPL_3.3V_USB
17mA
D6
+VDDAN_3.3VHWM
5mA
L20
VDDXL_3.3V
VDDXL_33_S
+1.1V
C528
0.1U/10V_4
U29E
+1.1V
S5_3.3--3.3v standby power
M21
VDDAN_33_HW M_S
*0_8/S
C510
10U/6.3V_8
+1.1V_CKVDD
32mA
C760
10U/6.3V_8
C759
0.1U/10V_4
C758
0.1U/10V_4
32mA
PBY160808T-221Y-N(220,2A)
L45
+3V
C529
*0.1U/10V_4
C527
2.2U/6.3V_6
M19
VSSXL
P21
P20
M22
M24
M26
P22
P24
P26
T20
T22
T24
V20
J23
VSSIO_PCIECLK_1
VSSIO_PCIECLK_2
VSSIO_PCIECLK_3
VSSIO_PCIECLK_4
VSSIO_PCIECLK_5
VSSIO_PCIECLK_6
VSSIO_PCIECLK_7
VSSIO_PCIECLK_8
VSSIO_PCIECLK_9
VSSIO_PCIECLK_10
VSSIO_PCIECLK_11
VSSIO_PCIECLK_12
VSSIO_PCIECLK_13
VSSPL_SYS
VSSIO_PCIECLK_14
VSSIO_PCIECLK_15
VSSIO_PCIECLK_16
VSSIO_PCIECLK_17
VSSIO_PCIECLK_18
VSSIO_PCIECLK_19
VSSIO_PCIECLK_20
VSSIO_PCIECLK_21
VSSIO_PCIECLK_22
VSSIO_PCIECLK_23
VSSIO_PCIECLK_24
VSSIO_PCIECLK_25
VSSIO_PCIECLK_26
VSSIO_PCIECLK_27
AJ2
A28
A2
E5
D23
E25
E6
F24
N15
R13
R17
T10
P10
V11
U15
M18
V19
M11
L12
L18
J7
P3
V4
AD6
AD4
AB7
AC9
V8
W9
W 10
AJ28
B29
U4
Y18
Y10
Y12
Y11
AA11
AA12
G4
J4
G8
G9
M12
AF25
H7
AH29
V10
P6
N4
L4
L8
M20
H23
H26
AA21
AA23
AB23
AD23
AA26
AC26
Y20
W 21
W 20
AE26
L21
K20
Part 5 of 5
+VDDPL_1.1V
L81
PBY160808T-221Y-N(220,2A)
C534
*0.1U/10V_4
C799
2.2U/6.3V_6
C546
*0.1U/10V_4
+VDDAN_3.3VHWM
+3VS5
L41
*0_6/S
C499
*2.2U/6.3V_6
C501
0.1U/10V_4
+VDDPL_3.3V_USB
To meet SB800 SCL1.02:

Separate ferrite bead is not
required for VDDPL_33_USB_S,
Del B603/600ohm bead.
C533
2.2U/6.3V_6
352-(&7$;
4XDQWD&RPSXWHU,QF
C536
0.1U/10V_4
SI , remove L48
1%5'
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
SB820M A12
+1.1V
L76
PBY160808T-221Y-N(220,2A)
C790
2.2U/6.3V_6
C496
2.2U/6.3V_6
VDDAN_33_USB_S_1
VDDAN_33_USB_S_2
VDDAN_33_USB_S_3
VDDAN_33_USB_S_4
VDDAN_33_USB_S_5
VDDAN_33_USB_S_6
VDDAN_33_USB_S_7
VDDAN_33_USB_S_8
VDDAN_33_USB_S_9
VDDAN_33_USB_S_10
VDDAN_33_USB_S_11
VDDAN_33_USB_S_12
+VDDPL_3.3V
+3VS5
C537
1U/10V_4
SB820M A12
+3V
SI , remove R272
from AMD recommand
C765
1U/10V_4
TBDmA
VDDAN_1.1V_USB
PBY160808T-221Y-N(220,2A)
C520
1U/10V_4
+3V_AVDD_USB
AVDDTX--USB Phy
Analog I/O power
VDDIO_GBE_S_1
VDDIO_GBE_S_2
C507
1U/10V_4
L77
V1
L7
L9
VDDPL_33_SATA
VDDAN_11_SATA_1
VDDAN_11_SATA_4
VDDAN_11_SATA_2
VDDAN_11_SATA_3
VDDAN_11_SATA_5
VDDAN_11_SATA_6
VDDAN_11_SATA_7
C511
1U/10V_4
CKVDD_1.1V-Internal clock
Generator I/O
power
TBDmA
M10
VDDCR_11_GBE_S_1
VDDCR_11_GBE_S_2
Es
+3VS5
C531
0.1U/10V_4
C515
0.1U/10V_4
+3VALW_R
BLM18PG181SN1D(180,1.5A)_6
C544
22U/6.3V_8
R276
C516
0.1U/10V_4
la
C550
1U/10V_4
K28
K29
J28
K26
J21
J20
K21
J22
510mA
te
C797
10U/6.3V_8
VDDAN_11_PCIE_1
VDDAN_11_PCIE_2
VDDAN_11_PCIE_3
VDDAN_11_PCIE_4
VDDAN_11_PCIE_5
VDDAN_11_PCIE_6
VDDAN_11_PCIE_7
VDDAN_11_PCIE_8
3.3V_S5 I/O
L82
BLM18PG181SN1D(180,1.5A)_6
U26
V22
V26
V27
V28
V29
W 22
W 26
CORE S5
600mA
VDDPL_33_PCIE
GBE LAN
+1.1V_PCIE_VDDR
PCIE_VDDR--PCIE I/O power
AE28
PCI EXPRESS
43mA
VDDPL_3.3V_PCIE
SERIAL ATA
C785
*0.1U/10V_4
VDDIO_33_GBE_S
USB I/O
C787
2.2U/6.3V_4
+3V
VDDRF_GBE_S
POWER
PBY160808T-221Y-N(220,2A)
+1.1V
VDDIO_18_FC_1
VDDIO_18_FC_2
VDDIO_18_FC_3
VDDIO_18_FC_4
PLL
+3V
VDDAN_11_CLK_1
VDDAN_11_CLK_2
VDDAN_11_CLK_3
VDDAN_11_CLK_4
VDDAN_11_CLK_5
VDDAN_11_CLK_6
VDDAN_11_CLK_7
VDDAN_11_CLK_8
N13
R15
N17
U13
U17
V12
V18
W 12
W 18
C494
0.1U/10V_4
VDDCR_11_1
VDDCR_11_2
VDDCR_11_3
VDDCR_11_4
VDDCR_11_5
VDDCR_11_6
VDDCR_11_7
VDDCR_11_8
VDDCR_11_9
CORE S0
PV,change
to short pad
C492
0.1U/10V_4
Part 3 of 5
SB800
VDDIO_33_PCIGP_1
VDDIO_33_PCIGP_2
VDDIO_33_PCIGP_3
VDDIO_33_PCIGP_4
VDDIO_33_PCIGP_5
VDDIO_33_PCIGP_6
VDDIO_33_PCIGP_7
VDDIO_33_PCIGP_8
VDDIO_33_PCIGP_9
VDDIO_33_PCIGP_10
VDDIO_33_PCIGP_11
VDDIO_33_PCIGP_12
CLKGEN I/O
C474
22U/6.3V_8
AH1
V6
Y19
AE5
AC21
AA2
AB4
AC8
AA7
AA9
AF7
AA19
PCI/GPIO I/O
131mA
*0_8/S
FLASH I/O
VDDQ--3.3V I/O power

R241
+3V
15
PV,change
to short pad
+3.3V_SB_R
GROUND
Size
Custom
Document Number
Rev
1A
SB820-PWR/DECOUPLING 4/4
Date: Tuesday, December 22, 2009

1
Sheet
15
of
42


17
U24G
DP E/F POWER
U24A
+1.8V_DPE_VDD18
DP A/B POWER
AG15
AG16
DPE_VDD18#1
DPE_VDD18#2
DPA_VDD18#1
DPA_VDD18#2
AE11
AF11
AG20
AG21
DPE_VDD10#1
DPE_VDD10#2
DPA_VDD10#1
DPA_VDD10#2
AF6
AF7
AG14
AH14
AM14
AM16
AM18
DPE_VSSR#1
DPE_VSSR#2
DPE_VSSR#3
DPE_VSSR#4
DPE_VSSR#5
DPA_VSSR#1
DPA_VSSR#2
DPA_VSSR#3
DPA_VSSR#4
DPA_VSSR#5
AE1
AE3
AG1
AG6
AH5
AF16
AG17
DPF_VDD18#1
DPF_VDD18#2
DPB_VDD18#1
DPB_VDD18#2
AE13
AF13
+1.8V_DPA_VDD18
2.5GT/s bit rate

9
9
PEG_TX0
PEG_TX#0
9
9
PEG_TX1
PEG_TX#1
9
9
PEG_TX#2
PEG_TX2
9
9
PEG_TX3
PEG_TX#3
9
9
PEG_TX4
PEG_TX#4
9
9
PEG_TX5
PEG_TX#5
9
9
PEG_TX6
PEG_TX#6
9
9
PEG_TX#7
PEG_TX7
9
9
PEG_TX8
PEG_TX#8
PEG_TX0
PEG_TX#0
AF30
AE31
PCIE_RX0P
PCIE_RX0N
PCIE_TX0P
PCIE_TX0N
AH30
AG31
C_PEG_RXN0
C_PEG_RXP0
C239
C233
0.1U/10V_4
0.1U/10V_4
PEG_TX1
PEG_TX#1
AE29
AD28
PCIE_RX1P
PCIE_RX1N
PCIE_TX1P
PCIE_TX1N
AG29
AF28
C_PEG_RXP1
C_PEG_RXN1
C240
C249
0.1U/10V_4
0.1U/10V_4
PEG_TX#2
PEG_TX2
AD30
AC31
PCIE_RX2P
PCIE_RX2N
PCIE_TX2P
PCIE_TX2N
AF27
AF26
C_PEG_RXP2
C_PEG_RXN2
C251
C263
0.1U/10V_4
0.1U/10V_4
PEG_TX3
PEG_TX#3
AC29
AB28
PCIE_RX3P
PCIE_RX3N
PCIE_TX3P
PCIE_TX3N
AD27
AD26
C_PEG_RXP3
C_PEG_RXN3
C231
C220
0.1U/10V_4
0.1U/10V_4
PEG_TX4
PEG_TX#4
AB30
AA31
PCIE_RX4P
PCIE_RX4N
PCIE_TX4P
PCIE_TX4N
AC25
AB25
C_PEG_RXP4
C_PEG_RXN4
C282
C289
0.1U/10V_4
0.1U/10V_4
PEG_TX5
PEG_TX#5
AA29
Y28
PCIE_RX5P
PCIE_RX5N
PCIE_TX5P
PCIE_TX5N
Y23
Y24
C_PEG_RXP5
C_PEG_RXN5
C267
C279
0.1U/10V_4
0.1U/10V_4
PEG_TX6
PEG_TX#6
Y30
W 31
PCIE_RX6P
PCIE_RX6N
PCIE_TX6P
PCIE_TX6N
AB27
AB26
C_PEG_RXP6
C_PEG_RXN6
C292
C303
0.1U/10V_4
0.1U/10V_4
PEG_TX#7
PEG_TX7
W 29
V28
PCIE_RX7P
PCIE_RX7N
PCIE_TX7P
PCIE_TX7N
Y27
Y26
C_PEG_RXP7
C_PEG_RXN7
C308
C317
0.1U/10V_4
0.1U/10V_4
PEG_TX8
PEG_TX#8
V30
U31
PCIE_RX8P
PCIE_RX8N
PCIE_TX8P
PCIE_TX8N
W 24
W 23
C_PEG_RXP8
C_PEG_RXN8
C328
C337
*0.1U/10V_4
*0.1U/10V_4
PEG_RX0 9
PEG_RX#0 9
+1.0V_DPE_VDD10
+1.0V_DPB_VDD10
PEG_RX1 9
PEG_RX#1 9
PEG_RX2 9
PEG_RX#2 9
+1.0V_VGA
PEG_TX10
PEG_TX#10
9
9
PEG_TX#11
PEG_TX11
9
9
PEG_TX12
PEG_TX#12
9
9
PEG_TX13
PEG_TX#13
9
9
9
9
PEG_TX14
PEG_TX#14
U29
T28
PCIE_RX9P
PCIE_RX9N
PCIE_TX9P
PCIE_TX9N
V27
U26
PEG_TX10
PEG_TX#10
T30
R31
PCIE_RX10P
PCIE_RX10N
PCIE_TX10P
PCIE_TX10N
U24
U23
PEG_TX#11
PEG_TX11
R29
P28
PCIE_RX11P
PCIE_RX11N
PCIE_TX11P
PCIE_TX11N
T26
T27
PEG_TX12
PEG_TX#12
P30
N31
PCIE_RX12P
PCIE_RX12N
PCIE_TX12P
PCIE_TX12N
T24
T23
PEG_TX13
PEG_TX#13
N29
M28
PCIE_RX13P
PCIE_RX13N
PCIE_TX13P
PCIE_TX13N
PEG_TX14
PEG_TX#14
M30
L31
PCIE_TX14P
PCIE_TX14N
PEG_TX15
PEG_TX#15
PEG_TX15
PEG_TX#15
L29
K30
PCIE_RX14P
PCIE_RX14N
PCIE_RX15P
PCIE_RX15N
PCIE_TX15P
PCIE_TX15N
C_PEG_RXP9
C_PEG_RXN9
C324
C318
*0.1U/10V_4
*0.1U/10V_4
C_PEG_RXP10
C_PEG_RXN10
C338
C343
*0.1U/10V_4
*0.1U/10V_4
C_PEG_RXP11
C_PEG_RXN11
C345
C354
*0.1U/10V_4
*0.1U/10V_4
C_PEG_RXP12
C_PEG_RXN12
C358
C368
*0.1U/10V_4
*0.1U/10V_4
P27
P26
C_PEG_RXP13
C_PEG_RXN13
C380
C370
*0.1U/10V_4
*0.1U/10V_4
P24
P23
C_PEG_RXP14
C_PEG_RXN14
C385
C387
*0.1U/10V_4
*0.1U/10V_4
M27
N26
C_PEG_RXP15
C_PEG_RXN15
C383
C386
+1.8V_DPE_VDD18
+1.0V_DPE_VDD10
PEG_RX5 9
PEG_RX#5 9
la
9
9
PEG_TX#9
PEG_TX9
PEG_RX4 9
PEG_RX#4 9
PEG_RX6 9
PEG_RX#6 9
PEG_RX7 9
PEG_RX#7 9
R368
PEG_RX8 9
PEG_RX#8 9
150/F_4
+1.8V_DPA_VDD18
+1.0V_DPB_VDD10
AF22
AG22
DPF_VDD10#1
DPF_VDD10#2
DPB_VDD10#1
DPB_VDD10#2
AF8
AF9
AF23
AG23
AM20
AM22
AM24
DPF_VSSR#1
DPF_VSSR#2
DPF_VSSR#3
DPF_VSSR#4
DPF_VSSR#5
DPB_VSSR#1
DPB_VSSR#2
DPB_VSSR#3
DPB_VSSR#4
DPB_VSSR#5
AF10
AG9
AH8
AM6
AM8
AF17
DPEF_CALR
DPAB_CALR
AE10
DPA_PVDD
DPA_PVSS
AG8
AG7
+1.8V_DPA_PVDD
DPB_PVDD
DPB_PVSS
AG10
AG11
+1.8V_DPA_PVDD
+1.8V_DPE_PVDD
+1.8V_DPE_PVDD AG18
AF19
+1.8V_DPF_PVDD
+1.8V_DPF_PVDD AG19
R510
0_4
AF20
(Park-S3:110mA@1.0V)
(M9X-S2/S3:200mA@1.1V)
C653
0.1U/10V_4
R121
C650
10U/6.3V_8
M93-S3--NC
PARK-S3--install
10K/F_4
12
R425
AK30
AK32
PEG_RX10 9
PEG_RX#10 9
DPE_PVDD
DPE_PVSS
DP PLL POWER
+1.8V_DPA_PVDD
DPF_PVDD
DPF_PVSS
+1.8V_DPA_PVDD
PV , reserve for M93

PARK-S3
PEG_RX11 9
PEG_RX#11 9
M93-S3--NC
PARK-S3--install
PEG_RX12 9
PEG_RX#12 9
PEG_RX13 9
PEG_RX#13 9
M93-S3--NC
PARK-S3--install
*0.1U/10V_4
*0.1U/10V_4
(Park-S3:110mA@1.0V)
(M9X-S2/S3:200mA@1.1V)
+1.0V_DPE_VDD10
+1.0V_DPE_VDD10
PEG_RX14 9
PEG_RX#14 9
C209
C173
0.1U/10V_4 1U/10V_4
PEG_RX15 9
PEG_RX#15 9
L21
+1.0V_VGA
BLM18PG181SN1D(180,1.5A)_6
C192
10U/6.3V_6
+1.8V_DPA_VDD18
+1.8V_DPA_VDD18
C190
0.1U/10V_4
L23
C260
1U/10V_4
N10
AL27
PCIE_RST#
PW RGOOD
PCIE_CALRN
Y22
M72_PCIE_CALRP
R118
1.27K/F_4
AA22
M72_PCIE_CALRN
R386
2K/F_4
+1.8V_DPE_VDD18
0.1U/10V_4
1.8V(130mA)
+1.8V_DPA_PVDD
L18
C162
C266
1U/10V_4
10U/6.3V_8
+1.8V_VGA
C647
0.1U/10V_4
L58
C268
1U/10V_4
BLM18PG181SN1D(180,1.5A)_6
1.8V(20mA)
+1.8V_VGA
BLM18PG181SN1D(180,1.5A)_6
C639
10U/6.3V_8
+1.0V_VGA
+1.8V_DPF_PVDD
PERSTB
+1.8V_DPF_PVDD
+1.8V_DPE_PVDD
L53
1.8V(20mA)
C611
C612
0.1U/10V_4 1U/10V_4
+1.8V_DPE_PVDD
+1.8V_VGA
PARK-S3
100MHz (+/-300ppm) input frequency,

0-0.7V single-ended swing
+1.8V_VGA
C171
CALIBRATION
PCIE_CALRP
1.8V(130mA)
BLM18PG181SN1D(180,1.5A)_6
C183
10U/6.3V_8
+1.8V_DPA_PVDD
PV,change to reserve
for MUXLESS
PCIE_REFCLKP
PCIE_REFCLKN
C654
1U/10V_4
150/F_4
CLOCK
EXT_GFX_CLKP
EXT_GFX_CLKN
12 EXT_GFX_CLKP
12 EXT_GFX_CLKN
BLM18PG181SN1D(180,1.5A)_6
L59
PEG_RX9 9
PEG_RX#9 9
te
PEG_TX#9
PEG_TX9
Es
9
9
PCI EXPRESS INTERFACE
PEG_RX3 9
PEG_RX#3 9
BLM18PG181SN1D(180,1.5A)_6
C608
10U/6.3V_8
C150
C145
0.1U/10V_4 1U/10V_4
L15
1.8V(20mA)
+1.8V_VGA
BLM18PG181SN1D(180,1.5A)_6
C137
10U/6.3V_8
M93-S3--NC
PARK-S3--install
352-(&7$;
4XDQWD&RPSXWHU,QF
Size
Custom
1%5'
Document Number
Rev
1A
PARK_PCIE_Interface

1
Sheet
17
of
42


U24F
R378
GND
LVDS CONTROL
VSS_MECH#1
VSS_MECH#2
VSS_MECH#3
PARK-S3
VARY_BL
DIGON
AB11
AB12
*0_4
*0_4
R381
R119
DPST_PWM 10,23
DISP_ON 10,23
TXCLK_UP_DPF3P
TXCLK_UN_DPF3N
AH20
AJ19
EXT_TXUCLKOUT+ 23
EXT_TXUCLKOUT- 23
TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N
AL21
AK20
EXT_TXUOUT0+ 23
EXT_TXUOUT0- 23
TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N
AH22
AJ21
EXT_TXUOUT1+ 23
EXT_TXUOUT1- 23
TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N
AL23
AK22
TXOUT_U3P
TXOUT_U3N
AK24
AJ23
TXCLK_LP_DPE3P
TXCLK_LN_DPE3N
AL15
AK14
TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N
AH16
AJ15
TXOUT_L1P_DPE1P
TXOUT_L1N_DPE1N
AL17
AK16
TXOUT_L2P_DPE0P
TXOUT_L2N_DPE0N
AH18
AJ17
TXOUT_L3P
TXOUT_L3N
AL19
AK18
VDDCI
+1.5V_VGA
18
GPIO9
18
GPIO13
18
GPIO12
+1.8V_VGA
VDDR4
+1.8V_VGA
VDD_CT
18
GPIO11
*10K/F_4
R400
*10K/F_4
GPIO12
R420
*10K/F_4
GPIO11
R421
10K/F_4
0
0
0
0
0
0
0
0
r
RSVD
BIF_VGA_DIS
RSVD
GPIO8
GPIO9
GPIO21
VIP_DEVICE_STRAP_ENA
V2SYNC
GENERICC
HSYNC
VSYNC
0
0
0
0
0
ENABLE EXTERNAL BIOS ROM

SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT
GPIO[13:11]
RSVD
AUD[1]
AUD[0]
Enable CLKREQ# Power Management

0 - CLKREQ# power management capability is disabled
1 - CLKREQ# power management capability is enabled
VGA ENABLED
GPIO_22_ROMCSB
ROMIDCFG(2:0)
0: Tx de-emphasis disabled for mobile mode

1: Tx de-emphasis enabled (Default setting for Desktop)
0
0
0
11
AUD[1] AUD[0]
0 0 No audio function
0 1 Audio for DisplayPort and HDMI if dongle is detected
1 0 Audio for DisplayPort only
1 1 Audio for both DisplayPort and HDMI
AMD RESERVED CONFIGURATION STRAPS

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET
H2SYNC
GENERICC
PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED,
GPIO21_BB_EN
B
+3V_DELAY
Memory Aperture size

GPIO13 GPIO12 GPIO11
ROMIDCFG2 ROMIDCFG1 ROMIDCFG0
18
GPIO0
GPIO0
R397
*10K/F_4
18
GPIO1
GPIO1
R388
*10K/F_4
GPIO2
R389
*10K/F_4
GPIO8
R394
*10K/F_4
R122
*10K/F_4
R366
10K/F_4
R375
10K/F_4
GPIO22
R153
*10K/F_4
GPIO5
R415
10K/F_4
18
0
0
0
0
1
1
1
1
128M
256M
64M
32M
512M
1G
2G
4G
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
GPIO2
18
GPIO8
18 GENERICC
18
DAC2_VSY
18
DAC2_HSY
18
GPIO22
18
GPIO5
352-(&7$;
4XDQWD&RPSXWHU,QF
Size
Custom
20ms
4
0 0 1
IGNORE VIP DEVICE STRAPS
It is a shared pin strap with CONFIG[2:0] if BIOS_ROM_EN is set to 0.

20ms
GPIO2
BIOS_ROM_EN
EXT_TXLOUT2+ 23
EXT_TXLOUT2- 23
R399
0: 50% Tx output swing for mobile mode

1: full Tx output swing (Default setting for Desktop)
GPIO1
BIF_GEN2_EN_A
A32
AM1
AM32
VDDR3
TX_DEEMPH_EN
EXT_TXLOUT1+ 23
EXT_TXLOUT1- 23
GPIO13
Transmitter Power Savings Enable
PCI Express Transmitter De-emphasis Enable
EXT_TXLOUT0+ 23
EXT_TXLOUT0- 23
GPIO9
DESCRIPTION OF DEFAULT SETTINGS
GPIO0
+3V_DELAY
VDDR1
+3.3V_Delay
PIN
TX_PWRS_ENB
EXT_TXLCLKOUT+ 23
EXT_TXLCLKOUT- 23
BIOSROM
+VGA_CORE
STRAPS
EXT_TXUOUT2+ 23
EXT_TXUOUT2- 23
GPIO9
VDDC
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
LVTMDP
PARK-S3
RECOMMENDED SETTINGS
0= DO NOT INSTALL RESISTOR
1 = INSTALL 10K RESISTOR
X = DESIGN DEPENDANT
NA = NOT APPLICABLE
CONFIGURATION STRAPS
Close CONN
Power Up/Down Sequence
+VGA_CORE
19
10K/F_4
la
GND#56
GND#57
GND#58
GND#59
GND#60
GND#61
GND#62
GND#63
GND#64
GND#65
GND#66
GND#67
GND#68
GND#69
GND#70
GND#71
GND#72
GND#73
GND#74
GND#75
GND#76
GND#77
GND#78
GND#79
GND#80
GND#81
GND#82
GND#83
GND#84
A3
A30
AA13
AA16
AB10
AB15
AB6
AC9
AD6
AD8
AE7
AG12
AH10
AH28
B10
B12
B14
B16
B18
B20
B22
B24
B26
B6
B8
C1
C32
E28
F10
F12
F14
F16
F18
F2
F20
F22
F24
F26
F6
F8
G10
G27
G31
G8
H14
H17
H2
H20
H6
J27
J31
K11
K2
K22
K6
T11
R11
te
M6
N11
N12
N13
N16
N18
N21
P6
P9
R12
R15
R17
R20
T13
T16
T18
T21
T6
U15
U17
U20
U9
V13
V16
V18
Y10
Y15
Y17
Y20
GND#1
GND#2
GND#3 / EVDDQ#2
GND#4
GND#5
GND#6 / EVDDQ#3
GND#7
GND#8
GND#9
GND#10
GND#11
GND#12
GND#13
GND#14
GND#15
GND#16
GND#17
GND#18
GND#19
GND#20
GND#21
GND#22
GND#23
GND#24
GND#25
GND#26
GND#27
GND#28
GND#29
GND#30
GND#31
GND#32
GND#33
GND#34
GND#35
GND#36
GND#37
GND#38
GND#39
GND#40
GND#41
GND#42
GND#43
GND#44
GND#45
GND#46
GND#47
GND#48
GND#49
GND#50
GND#51
GND#52
GND#53
GND#54
GND#55
GND#85
GND#86
Es
PCIE_VSS#1
PCIE_VSS#2
PCIE_VSS#3
PCIE_VSS#4
PCIE_VSS#5
PCIE_VSS#6
PCIE_VSS#7
PCIE_VSS#8
PCIE_VSS#9
PCIE_VSS#10
PCIE_VSS#11
PCIE_VSS#12
PCIE_VSS#13
PCIE_VSS#14
PCIE_VSS#15
PCIE_VSS#16
PCIE_VSS#17
PCIE_VSS#18
PCIE_VSS#19
PCIE_VSS#20
PCIE_VSS#21
PCIE_VSS#22
PCIE_VSS#23
PCIE_VSS#24
PCIE_VSS#25
PCIE_VSS#26
PCIE_VSS#27
PCIE_VSS#28
PCIE_VSS#29
PCIE_VSS#30
PCIE_VSS#31
SI, R119,R381 change to

reserve only for MUXLESS
U24E
AA27
AB24
AB32
AC24
AC26
AC27
AD25
AD32
AE27
AF32
AG27
AH32
K28
K32
L27
M32
N25
N27
P25
P32
R27
T25
T32
U25
U27
V32
W 25
W 26
W 27
Y25
Y32
1%5'
Document Number
Rev
1A
PARK_GND / LVDS/ Straps

1
Sheet
19
of
42


21
U24C
VMA_RAS0#
VMA_RAS1#
VMA_RAS0#
VMA_RAS1#
22
22
VMA_CAS0#
VMA_CAS1#
VMA_CAS0#
VMA_CAS1#
22
22
VMA_WE0#
VMA_WE1#
VMA_WE0#
VMA_WE1#
22
VMA_CS0#
VMA_CS0#
22
VMA_CS1#
VMA_CS1#
22
22
VMA_CKE0
VMA_CKE1
VMA_CKE0
VMA_CKE1
22
22
VMA_CLK0
VMA_CLK0#
VMA_CLK0
VMA_CLK0#
22
22
VMA_CLK1
VMA_CLK1#
VMA_CLK1
VMA_CLK1#
VMA_WDQS[7..0]
22 VMA_WDQS[7..0]
VMA_RDQS[7..0]
22 VMA_RDQS[7..0]
VMA_DM[7..0]
22 VMA_DM[7..0]
VMA_DQ[63..0]
22 VMA_DQ[63..0]
VMA_MA[13..0]
22 VMA_MA[13..0]
22
22
22
VMA_DQ0
VMA_DQ1
VMA_DQ2
VMA_DQ3
VMA_DQ4
VMA_DQ5
VMA_DQ6
VMA_DQ7
VMA_DQ8
VMA_DQ9
VMA_DQ10
VMA_DQ11
VMA_DQ12
VMA_DQ13
VMA_DQ14
VMA_DQ15
VMA_DQ16
VMA_DQ17
VMA_DQ18
VMA_DQ19
VMA_DQ20
VMA_DQ21
VMA_DQ22
VMA_DQ23
VMA_DQ24
VMA_DQ25
VMA_DQ26
VMA_DQ27
VMA_DQ28
VMA_DQ29
VMA_DQ30
VMA_DQ31
VMA_DQ32
VMA_DQ33
VMA_DQ34
VMA_DQ35
VMA_DQ36
VMA_DQ37
VMA_DQ38
VMA_DQ39
VMA_DQ40
VMA_DQ41
VMA_DQ42
VMA_DQ43
VMA_DQ44
VMA_DQ45
VMA_DQ46
VMA_DQ47
VMA_DQ48
VMA_DQ49
VMA_DQ50
VMA_DQ51
VMA_DQ52
VMA_DQ53
VMA_DQ54
VMA_DQ55
VMA_DQ56
VMA_DQ57
VMA_DQ58
VMA_DQ59
VMA_DQ60
VMA_DQ61
VMA_DQ62
VMA_DQ63
VMA_BA0
VMA_BA1
VMA_BA2
VMA_BA0
VMA_BA1
VMA_BA2
DIVIDER RESISTORS
M93
MVREF TO 1.8V (Rd)
PARK
100R
MVREF TO GND (Re)
40.2R
100R
100R
+1.5V_VGA
Rd
PLACE MVREFD DIVIDERS

AND CAPS CLOSE TO ASIC
MVREFD
+1.5V_VGA
C432
0.1U/10V_4
100/F_4
18
R226
40.2/F_4
J25
+1.5V_VGA
R201
Re
K26
J26
Rd
R430
R550
TESTEN
TESTEN
243/F_4
0_4 Note
3 K7
R132
150/F_4
R431
243/F_4
DRAM_RST L10
Note 2 J8
Note 1 K25
MVREFS
CLKTESTA
CLKTESTB
C442
0.1U/10V_4
R215
100/F_4
Re
VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_BA2
VMA_BA0
VMA_BA1
MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8
MAA_9
MAA_10
MAA_11
MAA_12
MAA_13/BA2
MAA_14/BA0
MAA_15/BA1
K17
J20
H23
G23
G24
H24
J19
K19
J14
K14
J11
J13
H11
G11
J16
L15
DQMA_0
DQMA_1
DQMA_2
DQMA_3
DQMA_4
DQMA_5
DQMA_6
DQMA_7
E32
E30
A21
C21
E13
D12
E3
F4
VMA_DM0
VMA_DM1
VMA_DM2
VMA_DM3
VMA_DM4
VMA_DM5
VMA_DM6
VMA_DM7
RDQSA_0
RDQSA_1
RDQSA_2
RDQSA_3
RDQSA_4
RDQSA_5
RDQSA_6
RDQSA_7
H28
C27
A23
E19
E15
D10
D6
G5
VMA_RDQS0
VMA_RDQS1
VMA_RDQS2
VMA_RDQS3
VMA_RDQS4
VMA_RDQS5
VMA_RDQS6
VMA_RDQS7
W DQSA_0
W DQSA_1
W DQSA_2
W DQSA_3
W DQSA_4
W DQSA_5
W DQSA_6
W DQSA_7
H27
A27
C23
C19
C15
E9
C5
H4
VMA_WDQS0
VMA_WDQS1
VMA_WDQS2
VMA_WDQS3
VMA_WDQS4
VMA_WDQS5
VMA_WDQS6
VMA_WDQS7
ODTA0
ODTA1
L18
K16
VMA_ODT0
VMA_ODT1
CLKA0
CLKA0B
H26
H25
VMA_CLK0
VMA_CLK0#
CLKA1
CLKA1B
G9
H9
VMA_CLK1
VMA_CLK1#
RASA0B
RASA1B
G22
G17
VMA_RAS0#
VMA_RAS1#
CASA0B
CASA1B
G19
G16
VMA_CAS0#
VMA_CAS1#
CSA0B_0
CSA0B_1
H22
J22
VMA_CS0#
CSA1B_0
CSA1B_1
G13
K13
VMA_CS1#
MVREFDA
MVREFSA
CKEA0
CKEA1
K20
J17
VMA_CKE0
VMA_CKE1
MEM_CALRN0
NC/TESTEN#2
W EA0B
W EA1B
G25
H10
VMA_WE0#
VMA_WE1#
PX_EN
RSVD#2
RSVD#3
AB16
G14
G20
Es
R209
40.2/F_4
DQA_0
DQA_1
DQA_2
DQA_3
DQA_4
DQA_5
DQA_6
DQA_7
DQA_8
DQA_9
DQA_10
DQA_11
DQA_12
DQA_13
DQA_14
DQA_15
DQA_16
DQA_17
DQA_18
DQA_19
DQA_20
DQA_21
DQA_22
DQA_23
DQA_24
DQA_25
DQA_26
DQA_27
DQA_28
DQA_29
DQA_30
DQA_31
DQA_32
DQA_33
DQA_34
DQA_35
DQA_36
DQA_37
DQA_38
DQA_39
DQA_40
DQA_41
DQA_42
DQA_43
DQA_44
DQA_45
DQA_46
DQA_47
DQA_48
DQA_49
DQA_50
DQA_51
DQA_52
DQA_53
DQA_54
DQA_55
DQA_56
DQA_57
DQA_58
DQA_59
DQA_60
DQA_61
DQA_62
DQA_63
Designator
te
support 1Gbit
VRAM ( 64M X 16 )
K27
J29
H30
H32
G29
F28
F32
F30
C30
F27
A28
C28
E27
G26
D26
F25
A25
C25
E25
D24
E23
F23
D22
F21
E21
D20
F19
A19
D18
F17
A17
C17
E17
D16
F15
A15
D14
F13
A13
C13
E11
A11
C11
F11
A9
C9
F9
D8
E7
A7
C7
F7
A5
E5
C3
E1
G7
G6
G1
G3
J6
J1
J3
J5
K8
L7
MEM_CALRP1/DPC_CALR
MEM_CALRP0
M9X-S2 and M93-S3
Ra
R551
0_4 VMA_MA13
PV,reserve for M93
CLKTESTA
CLKTESTB
0R/Short
51R
Rc
2.2K
DNI
Ca
2.2nF
68pF
+1.5V_VGA
R202
51/F_4
DRAM_RST
R221
*2.2K_4
Rc
DRAM_RST_M
DRAM_RST_M 22
Rb
Ca
R194
68P/50V_4
Ra
10K/F_4
PV , update from AMD

ref136-rev10
For PARK-S3 only

For M9X-S2/S3 with
DDR3: this pin is
not in use.
PARK-S3
C692
0.1U/10V_4
R547
*4.7K_4
R548
*4.7K_4

A
For M93-S3 only
R402
51.1/F_4
C689
0.1U/10V_4
R401
51.1/F_4
route 50ohms
single-ended/100ohms diff
and keep short
For PARK-S3 only
Note 1 :Do not Install for M9X-S2/S3, Install 240 Ohms 0.5% Resistor for PARK-S3.
Note 2 :For M9X-S2/S3,J8 Pin Connect to VSS through 240 Ohms(0.5%) resistor.
For Park-S3,J8 Pin Connect to VSS through 150 Ohms(1%) resistor for DPC_CALR
Note 3 :For M9X-92/93, K7 Pin (NC_MEM_CALRP1) is Not connected.
For PARK-S3, K7 Pin (TESTEN#2) connect to TEST_EN Signal At AF24
352-(&7$;
4XDQWD&RPSXWHU,QF
1%5'
10K
Rb
C437
DRAM_RST
Park-S3
DNI
22
22
la
VMA_ODT0
VMA_ODT1
MEMORY INTERFACE
VMA_ODT0
VMA_ODT1
22
22
Size
Custom
Document Number
Rev
1A
PARK/MEM_Interface

1
Sheet
21
of
42


,I/&'FRQQHFWRUQHDU*38WKHQSODFHWKHVHVHULHV5HVLVWRUVQHDU*38
,I/&'FRQQHFWRUQHDU1%WKHQSODFHWKHVHVHULHV5HVLVWRUVQHDU1%
+15VALW
OPTION SIGNAL FROM NB to LVDS for UMA
R31
EXT_TXLCLKOUTEXT_TXLCLKOUT+
EXT_TXLOUT0EXT_TXLOUT0+
EXT_TXLOUT1EXT_TXLOUT1+
EXT_TXLOUT2+
EXT_TXLOUT2-
RP27 3
1
RP28 3
1
RP29 3
1
RP33 1
3
4
2
4
2
4
2
2
4
*0_4P2R_4 TXLCLKOUTTXLCLKOUT+
*0_4P2R_4 TXLOUT0TXLOUT0+
*0_4P2R_4 TXLOUT1TXLOUT1+
*0_4P2R_4 TXLOUT2+
TXLOUT2-
19 EXT_TXUCLKOUT19 EXT_TXUCLKOUT+
19 EXT_TXUOUT0+
19 EXT_TXUOUT019 EXT_TXUOUT119 EXT_TXUOUT1+
19 EXT_TXUOUT219 EXT_TXUOUT2+
EXT_TXUCLKOUTEXT_TXUCLKOUT+
EXT_TXUOUT0+
EXT_TXUOUT0EXT_TXUOUT1EXT_TXUOUT1+
EXT_TXUOUT2EXT_TXUOUT2+
RP32 3
1
RP35 1
3
RP34 3
1
RP31 3
1
4
2
2
4
4
2
4
2
*0_4P2R_4 TXUCLKOUTTXUCLKOUT+
*0_4P2R_4 TXUOUT0+
TXUOUT0*0_4P2R_4 TXUOUT1TXUOUT1+
*0_4P2R_4 TXUOUT2TXUOUT2+
32
R38
EMU_LID
+3VPCU
LVDS_BLON R56
10,18 LVDS_BLON
+3V_DELAY
LID_EC#
R34
22P/50V_4
R39
100K/F_4
Q5
PDTC144EU
C15 1
2 0.01U/16V_4
4.7K_4
EDIDCLK
4.7K_4
EDIDDATA
*4.7K_4
EDIDCLK
*4.7K_4
EDIDDATA
LID_EC#
3
1
Q7
2N7002E
LCDDISCHG
C27
0.1U/10V_4
10,19
DISP_ON
LCDON#
SI, R34,R35 change to

reserve only and add
R33,R37 for MUXLESS
Q6
2N7002E
+3VLCD_CON
+3V
EDIDCLK
10,18 EDIDCLK
10,18 EDIDDATA
C24
1000P/50V_4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
TXLOUT0TXLOUT0+
TXLOUT1TXLOUT1+
+3V
TXLOUT2TXLOUT2+
C14
31,32
TXLCLKOUTTXLCLKOUT+
0.047U/10V
32,34,35,37,39
32
Es
C44
HWPG
Q9
PDTC144EU
2 0.1U/10V_4
10,19 DPST_PWM
1
D11
BAT54A
R33
R35
3
LCD_BK
2 10U/6.3V_8
C21 1
22_8
PWM_VADJ
U3
TXUOUT0TXUOUT0+
DPST_PWM 2
R29
1K_4
VADJ1
PWM_VADJ 1
TXUOUT1TXUOUT1+
C20
TC7SH08FU
*4.7U/6.3V_6
C19
22P/50V_4
TXUOUT2TXUOUT2+
14
LCD_BK
C22 1
SI , add C21 from EMI suggest
R37
33K_6
1K/F_4
PN_BLON
+3V
CH501H-40PT
BLONCON
1
R49
R25
2.2K_4
*0_4
D10
2
PN_BLON
+3VLCD_CON
PBY201209T-4A_8
SI, new option

for MUXLESS
OPTION SIGNAL FROM PARK to LVDS for discrete

19 EXT_TXLCLKOUT19 EXT_TXLCLKOUT+
19 EXT_TXLOUT019 EXT_TXLOUT0+
19 EXT_TXLOUT119 EXT_TXLOUT1+
19 EXT_TXLOUT2+
19 EXT_TXLOUT2-
R32
100K/F_4
L4
+3VLCD
+3VLCD
0_4P2R_4
LCDONG
N-MOS,5.8A
Q8
AO3404
0_4P2R_4
AO3404 ID
current
5.8A
330K_6
C72
0.1U/50V_6
TXUCLKOUT+
TXUCLKOUTTXUOUT0+
TXUOUT0TXUOUT1+
TXUOUT1TXUOUT2TXUOUT2+
C82
*10U/25V_12
RP4
0_4P2R_4
0_4P2R_4
23
+3V
C28
0.1U/10V_4
RP8
4
2
4
2
4
2
2
4
C75
0.1U/50V_6
RP7
3
1
3
1
3
1
1
3
R36
+5V
C73
0.01U/50V_4
RP6
UPB201209T-330Y-N(5A)
C65
0.1U/50V_6
LB_CLK
LB_CLK#
LB_DATAP0
LB_DATAN0
LB_DATAP1
LB_DATAN1
LB_DATAN2
LB_DATAP2
RP5
L11
+VIN
la
LB_CLK
LB_CLK#
LB_DATAP0
LB_DATAN0
LB_DATAP1
LB_DATAN1
LB_DATAN2
LB_DATAP2
RP3
TXLCLKOUT+
TXLCLKOUTTXLOUT0+
TXLOUT0TXLOUT1+
TXLOUT1TXLOUT2+
TXLOUT2-
10
10
10
10
10
10
10
10
RP2
3
1
3
1
3
1
3
1
4 0_4P2R_4
2
4 0_4P2R_4
2
4 0_4P2R_4
2
4 0_4P2R_4
2
LA_CLK
LA_CLK#
LA_DATAP0
LA_DATAN0
LA_DATAP1
LA_DATAN1
LA_DATAP2
LA_DATAN2
RP1
+VIN_BLIGHT
te
10
10
10
10
10
10
10
10
LA_CLK
LA_CLK#
LA_DATAP0
LA_DATAN0
LA_DATAP1
LA_DATAN1
LA_DATAP2
LA_DATAN2
TXUCLKOUTTXUCLKOUT+
Vari bright function

R27
*0_4
Do not use it
PV, add Q9 for BIOS check
CAMERA
+VIN_BLIGHT
VADJ1
BLONCON
G_0
G_1
G_2
G_3
G_4
C
G_5
CN2
GS12401-1011-9F
+3.9V-CAMARA
SI , update foortprint
to 88266-05001-06-5P-L-SMT
+5V
U4
VIN
VOUT
EDIDCLK
4
*DLW21HN900SQ2L(330mA)
CN1
C16
C17
R1
SHDN
R30
*215K/F_4
1U/10V_4
2
D
GND
SET
4.7U/6.3V_6
13
USBP2+
13
USBP2+3.9V-CAMARA
L5 4
1
USBP2+
USBP2-
3
2
1
2
3
4
5
C25
*10P/50V_4
Reserve for EMI
C23
.01U/16V_4
AT5231H-3.9KER
R28
*100K/F_4
R2
C18
*4.7U/6.3V_6
CAM
352-(&7$;
4XDQWD&RPSXWHU,QF
Size
Custom
1%5'
Document Number

7
Rev
1A
LCD CONN
Sheet
23
8
of
42


0.1U/10V_4 TX1_HDMI-L
0.1U/10V_4 TX1_HDMI+L
C_PEG_TX#13 C399
C_PEG_TX13 C398
C_PEG_TX#12 C394
C_PEG_TX12 C391
0.1U/10V_4 TXC_HDMI-L
0.1U/10V_4 TXC_HDMI+L
TXC_HDMI-L
TXC_HDMI+L
4 0_4P2R_4
2
TX2_HDMITX2_HDMI+
4 0_4P2R_4
2
TX1_HDMITX1_HDMI+
4 0_4P2R_4
2
TX0_HDMITX0_HDMI+
+3V
10 INT_TMDS_HPD
18 TX0_HDMI_L18 TX0_HDMI_L+
18 TXC_HDMI_L18 TXC_HDMI_L+
C657
C652
*0.1U/10V_4
*0.1U/10V_4
TX2_HDMITX2_HDMI+
TX1_HDMI_LTX1_HDMI_L+
C648
C645
*0.1U/10V_4
*0.1U/10V_4
TX1_HDMITX1_HDMI+
C636
C637
*0.1U/10V_4
*0.1U/10V_4
TX0_HDMITX0_HDMI+
TXC_HDMI_LTXC_HDMI_L+
C617
C632
*0.1U/10V_4
*0.1U/10V_4
for Layout
concern
,placement close
HDMI conn
3
2
WCM2012-90
Q10
2N7002E
2
715/F_4
TX2_HDMI+
R382
715/F_4
TX2_HDMI-
R376
715/F_4
TX1_HDMI+
R377
715/F_4
TX1_HDMI-
R367
715/F_4
TX0_HDMI+
R364
715/F_4
TX0_HDMI-
R362
715/F_4
TXC_HDMI+
R354
715/F_4
TXC_HDMI-
100K/F_4
UMA / MUXLESS : Add R64 , R59 , Q11
TXC_HDMITXC_HDMI+
R92
2K_4
Close to HDMI Connector
TX2_HDMI+
TX2_HDMITX1_HDMI+
TX1_HDMITX0_HDMI+
TX0_HDMI-
R102
2K_4
HDMI_SCLK
0_4P2R_4
RP30 3
1
10 HDMI_DDC_DATA
10 HDMI_DDC_CLK
1
3
4
6
7
9
20
21
D2 Shield
D1 Shield
D0 Shield
CK Shield
GND
2
5
8
11
17
13
14
10
12
CK+
CK-
HDMI_SCLK
HDMI_SDATA
15
16
DDC CLK CE Remote

DDC DATA
NC
+5V
SHELL1
SHELL2
TXC_HDMI+
TXC_HDMI-
HDMI_SDATA
PV , change footprint
to F3_2X1_65-2_8
D2+
D2D1+
D1D0+
D0-
FUSE1A6V_POLY
2
1
F2
C602 *0.1U/10V_4
4
2
HDMI_SDATA
HDMI_SCLK
SI , change power source

to +5V_HDMVCC
UMA
UMA DDC4 is 5V
tolerance , the MOSFET
level shifter no need
Discrete DDC is 3V
tolerance,the MOSFET
level shifter is need
Es
CH501H-40PT
D15
CH501H-40PT
D14
UMA AND DISCRETE HDMI I2C SELECT

Close to HDMI Connector
+3V_DELAY
+5V_HDMVCC
R94
*4.7K_4
18
3HDMI_SCLK
HDMI_SCL
+3V_DELAY
Q14
*2N7002E
DIS
+5V_HDMVCC
R351
*4.7K_4
18
HDMI_SDA
CN22
+5V_HDMVCC
Q11
2N7002E
2
DIS M92-S
499 ohm CS14992FB24
+'0,3257
+5V_HDMVCC
R86
200K/F_4
SI , add R64,R59,Q11
for MUXLESS
UMA RS780M
715 ohm CS17152FB17
SI,change to 715 ohm for MUXLESS
*0_4/S
te
+5V
R380
200K/F_4
10K/F_4
R64
Pure DIS : Add R85 , Q12
PV,add for EMI
HDMI_DET
SI , change to reserve only

for MUXLESS
4
1
L47
R87
Q13
2N7002E
2 HDMI_DET_R
R59
PV, change
to short pad
la
Q12
*2N7002E
2
PV,add for EMI
From PARK
R53
18 EXT_TMDS_HPD
TXC_HDMI3
TXC_HDMI+
2
WCM2012-90
4
1
L46
UMA use +3V for the detect pin

Dis use +3V_DELAY for the detect pin
R77
10K/F_4
9 C_PEG_TX#12
9 C_PEG_TX12
C_PEG_TX14 C408
C_PEG_TX#14 C403
RP12
TX2_HDMI-L
3
TX2_HDMI+L 1
RP11
TX1_HDMI-L 3
TX1_HDMI+L 1
RP10
TX0_HDMI-L
3
TX0_HDMI+L 1
9 C_PEG_TX#13
9 C_PEG_TX13
+3V
R85
*10K/F_4
9 C_PEG_TX14
9 C_PEG_TX#14
C_PEG_TX15 C410
C_PEG_TX#15 C406
SI, remove R72 and change

R85 , Q12 to reserve for MUXLESS
9 C_PEG_TX15
9 C_PEG_TX#15
for Layout
concern
,placement close
HDMI conn
+3V_DELAY
for Layout
concern
,placement close
north bridge
SI , all add
for MUXLESS
25
HDMI HPD SENSE
UMA/DISCRETE select for HDMI

From RS880M
HDMI_SDATA
Q15
*2N7002E
SI, remove R93 , R350 . Add RP30

R94,R351,Q14,Q15 change to
reserve only for MUXLESS
1A
+5V_HDMVCC
18
HDMI_DET 19
+5V
352-(&7$;
4XDQWD&RPSXWHU,QF
HP DET
HDMI CONN
1%5'
Size
Custom
Document Number
Rev
1A
HDMI

1
Sheet
25
of
42


27
PV , change to short pad

+3V
+3V_DVDD
R519
+5VAVDD
+5V
PV, change to
reserve only
*0_6/S
C782
C830
1U/6.3V_4
C819
.1U/10V_4
C821
10U/6.3V_8
C816
C817
10U/6.3V_8 .1U/10V_4
C812
10U/6.3V_8
C810
.1U/10V_4
C822
10U/6.3V_8
C809
.1U/10V_4
C780
10U/6.3V_6 .1U/10V_4
C784
C786
10U/6.3V_8 .1U/10V_4
ACZ_SDIN0_R
Close to Pin9
Close to Pin1
Close to Pin46
AGND
Close to Pin39
+5VAVDD
PV,delete C824
AGND
AGND
C772
C774
C775
C783
AGND
10U/6.3V_6
4.7U/6.3V_6
1U/6.3V_4
.1U/10V_4
FOR EMI
Close to Pin38
Close to Pin25
L74
*PBY201209T-221Y-N
+5V
C815 *27P/50V_4
AGND
PV , change from
220 to 47
SI , remove L79,L80,L83,L84
PV, change footprint and value

MIC1-VERFR
R497
R491
4.7K_4
4.7K_4
MIC1-R
22
EXT_MIC1-R_C C789
4.7U/6.3V_6
EXT_MIC1-R_R R495
1K/F_4
EXT_MIC_R 28
MIC1-L
21
EXT_MIC1-L_C C795
4.7U/6.3V_6
EXT_MIC1-L_R R496
1K/F_4
EXT_MIC_L 28
MONO-OUT
20
te
23
R498
19
JDREF
20K/F_4
18
MIC2-R
17
INT_MIC_R
C801
4.7U/6.3V_6
16
INT_MIC_L
C803
4.7U/6.3V_6
15
LINE2-L
14
Sense A
13
SENSEA
R502
R501
+5VAVDD
SA_A#
SA_B#
39.2K/F_4
20K/F_4
Es
SI, remove R511
C814
*27P/50V_4
+INTMIC_BIAS
33_4
ACZ_SDIN0
C794
*180p/50V_4
SPKL+
SA_A#
SA_B#
28
28
*10K/F_4
U31
*TLV2461IDBVRG4
INT_MIC
*10K/F_4
C768
*1U/6.3V_4
C762
AGND
*100P/50V_4
R481
*10K/F_4
PV, change to
reserve only
R480
*10K/F_4
C763
*270P/25V_4
R473
R313
Place Under
CODEC
R482
R506
BLM15AG601SS1D
R301
*3K_4
PV,add for EMI
13
R427
0_6
R300
*3K_4
AGND
1
2
88266-020L
AGND AGND
+5VAVDD
PV , add R427
72,QWHUQDO0LF
+3V_DVDD
C835 close to C820 and C820 close to chip
SI,remove U35,C681 , add D40

for audio function not stable
R516
*10K_4
R566
10K/F_4
PV , remove U33,C825,C811
C820,R523,R524
R510,R514
D40
EAPD#
ACZ_RST#_AUDIO
C811 .1U/10V_4
R546
PCBBEP_R2
Add this circuit same

as AX1/3
EAPD#_R
C820 .1U/10V_4
1
BAT54A
R549
C835
.1U/10V_4
R549 close to R546
*0_6/S
short0603
AGND
352-(&7$;
4XDQWD&RPSXWHU,QF
AGND
1%5'
PD#
PCBEEP
32 VOLMUTE#
Q36
2N7002E
2
3
PCBBEP_L
ACZ_SPKR
0_4
*0_4
47K_4
4.7K_4
13
R522
R518
AGND
L79
AGND
1
2
C825 *0.047U/10V
R261
*.22U/25V_6
C761
*100P/50V_4
R315
INT_MIC_IN
C541
*1U/6.3V_4
PV,add for test

0_6
RC0603
*0_6/S
short0603
*0_6/S
short0603
*0_6/S
short0603
*0_6/S
short0603
*0_6/S
short0603
CN10
C540
INT_MIC_IN_C
+5VAVDD
PC-BEEP
R328
R302
3K_4
INT_MIC_IN_C_R
AGND
13
SI , update foortprint
to 88266-020L-2P-R-SMT
MIC2-VERFO
SI , change to reserve only
AGND
INT SPEAKER CONN

C796
*1U/16V_6
Place near CODEC
R484
13
ACZ_SYNC_AUDIO
R512
C798
*180p/50V_4
R485
6$B%!(;70,&
ALC270A-GR
1
2
3
4
SI , add C42,C45,C46,C47
from EMI suggestion
Place near CODEC
6$B$!(;7(DU3KRQH
ACZ_SDIN0_R
13 BIT_CLK_AUDIO
SPKR+
SPKL-
CN3
BLM15AG601SS1D
BLM15AG601SS1D
BLM15AG601SS1D
BLM15AG601SS1D
INT_MIC
+3V_DVDD
13 ACZ_SDOUT_AUDIO
L9
L7
L6
L8
Place near CODEC
AGND
Sense-B
ACZ_RST#_AUDIO
PD#
Place near SPEAKER CONN
C808
*180p/50V_4
C47
10K/F_4
C45
25
26
AVSS1
R571
LINE1-L
12
11
0.047U/25V_4
PCBEEP
T169
T170
C806
*1U/16V_6
220P/50V_6
MIC1-VERFL
MIC1-VERFR
PCBEEP
RESET#
SYNC
DVDD-IO
DVSS2
BIT-CLK
SDATA-OUT
EN
LINE1-R
LINE2-R
+3V_DVDD
SPEAKER
C847
AGND
AVDD1
28
27
VREF
LDO-CAP
30
29
31
33
32
HP-OUT-L
HP-OUT-R
35
34
GND
C802
*180p/50V_4
C46
Vin
G9191-475T1U
U32
MIC2-L
EAPD
SPDIFO
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
BYP
24
PVDD2
PD#
47
48
49
50
51
52
53
54
55
56
57
58
EAPD#
46
+5V
SPK-R+
GPIO1
45
SPK-R-
10
PVSS2
44
SPKR+
43
GPIO0
SPKR-
MIC2-VREFO
PVSS1
SDATA-IN
SPK-L-
42
SPK-L+
41
MIC1-VREFO-L
40
SPKL-
MIC1-VREFO-R
SPKL+
CPVEE
36
PVDD1
CBP
39
CBN
AVSS2
AVDD2
DVDD1
+5V
37
38
Vout
+5VAVDD
AGND
+5VAVDD
C842
1U/6.3V_4
AGND
269CBP
2.2U/6.3V_6
220P/50V_6
AGND
269CBN
C776
U33
AGND
Close to Pin27
C165
*.1U/10V_4
.1U/10V_4
*220P/50V_6
10U/6.3V_6
C781
C779
C42
C778
AGND
R489
47/F_4
HP-R
R488
47/F_4
2.2U/6.3V_6 CPVEE
C777
la
EARP_R
SPKR-
28
SI , change L6,L7,L8,L9
to CX5AG601001 from
EMI suggest
Place near CODEC

+5V
HP-L
EARP_L
220P/50V_6
+5VAVDD
MIC2-VERFO
28
PV , add LDO
220P/50V_6
MIC1-VERFL
Size
Custom
Document Number
Rev
1A
Azalia 92HD75B2X5

E
Sheet
27
of
42


+3VSUS
T126
BLUELED 32,33
USBP15- 13
USBP15+ 13
+5VPCU
32 USBPW_ON#
13
13
CN8
SBK160808T-680Y-N(0.3A,68)
SBK160808T-680Y-N(0.3A,68)
C409
1
2
3
4
5
6
TPDATA-1
TPCLK-1
10P/50V_4
TP_R
TP_L
1
2
3
4
TP_R
close conn
4.7K_4
4.7K_4
SATA HDD CONNECTOR
TPCLK
TPDATA
Es
R155
R168
L38
1
2
3
4
8
7
6
5
GND
GND
GND
GND
USB CONN
C422
*Clamp-Diode_6
C427
*Clamp-Diode_6
For layout routing
88513-044N
TOUCH PAD CONN
+3VSUS
USBP0+
4
3
USBP01
2
13
13
USBP5+
USBP5-
USBP5+
4
3
USBP51
2
L39
CN27
USB0PWR
USBP5USBP5+
C455
*47P/50V_4
1
2
3
4
C462
*47P/50V_4
1
2
3
4
8
7
6
5
GND
GND
GND
GND
USB CONN
L37
L36
1
2
3
4
C426
*47P/50V_4
TPDATA
TPCLK
TPDATA
TPCLK
C423
*47P/50V_4
CN9
TP_L
te
32
32
10P/50V_4
USBP0+
USBP0-
CN26
0.1U/10V_4
C417
USB0PWR
USBP0USBP0+
la
To TOUCH
PAD SW board
C416
C731
C580
0.1U/10V_4
TOUCH PAD CONN

+3VSUS
C732
0.1U/10V_4
AL000547000
IC(8P) G547 (MSOP-8) - 2A
AL000545000
IC OTHER(8P) G545A2P8U(MSOP-8) - 2A
C579
10U/6.3V_8
SI , add C409,C417
from EMI suggest
C733
*470P/50V_4
G547
(TPS2061D)
24mil
BTV
25 mils
USB0PWR
8
7
6
5
Q27
PDTC144EU
BT_OFF#
OUT3
OUT2
OUT1
OC
3
14
C754
1U/10V_4
VIN1
VIN2
EN
GND
100UF_6.3V
C576
0.1U/10V_4
80 mils (Iout=2A)
U28
2
3
4
1
BTV
Q30
ME2303T1
BTCON_P1
BLUELED
USBP15USBP15+
6
5
4
3
2
1
29
LEFT SIDE USBX2
CN16
BLUE TOOTH CONN
87213-0600-6P-L
R329
4.7K_4
+3VPCU
BLUETOOTH
C453
*Clamp-Diode_6
C463
*Clamp-Diode_6
B
SI , update P/N : DFHS13FS019
CN31
Main HDD
SI , delete CN30 change to ANT CONN
19
A
+3V_HDD1
+3V
SI , add +3V support

R542
+5V_HDD1
+5V_HDD1
Right SIDE USBX1

SATA_TXP0 14
SATA_TXN0 14
SATA_RXN0 14
SATA_RXP0 14
+5VPCU
C49
+3V_HDD1
.1U/10V_4
CN4
PV , change USBPW_ON# from PIN2 to PIN3

and let PIN2 pull high to +5VPCU
+5V
32 USBPW_ON#
13
USBP613
USBP6+
1
2
3
4
5
6
4 USBP61 USBP6+
3
2
L10
USB board
SI , add +3V support

and new define
SATA HDD
*0_8
+5V: 2 A(4 Pin)
+5V
C805
10U/6.3V_8
R503
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
C804
4.7U/6.3V_6
C807
0.1U/10V_4
C800
10U/6.3V_8
Gnd : (5 Pin)
*0_8/S
352-(&7$;
4XDQWD&RPSXWHU,QF
ANT CONN
1%5'
Size
Custom
Document Number
Rev
1A
BT/USBX3/TP/HDD

1
Sheet
29
of
42


POWER BUTTON CONNECTOR
KEYBOARD CONN
31
PV,update footprint to bl135h-32rla-tand-32p-l-smt
CN7
+PWLEDVCC
C59
0.1U/10V_4
+3VPCU
R62
+5VPCU
1
1
39_6
2
R58
+3VPCU
23,32
LID_EC#
32
NBSWON1#
32
PWR_LED#
0.1U/10V_4
*39_6
2
CN5
PWR BTN CONN
1. +3VPCU(LIDSWITCH PWR)
2. LEDVCC(+3VPCU)
1
2
3
4
5
6
+PWLEDVCC
PWR_LED#
3. LIDSWITCH
4.POWERON#
5. PWRLED#
C60
1000P/50V_4
MY1
MY2
MY4
MY0
C237
C252
C265
C213
220P/50V_4
220P/50V_4
220P/50V_4
220P/50V_4
MX4
MX6
MX3
MX2
C184
C169
C224
C218
220P/50V_4
220P/50V_4
220P/50V_4
220P/50V_4
MX7
MX0
MX5
MX1
C163
C244
C195
C154
220P/50V_4
220P/50V_4
220P/50V_4
220P/50V_4
MY12
MY13
MY14
MY15
MY16
MY17
C319
C323
C335
C357
C367
C379
220P/50V_4
220P/50V_4
220P/50V_4
220P/50V_4
220P/50V_4
220P/50V_4
6. GND
te
220P/50V_4
220P/50V_4
220P/50V_4
220P/50V_4
la
C61
C283
C174
C347
C341
SATA CD-ROM
SI , delete CN13 change to ANT CONN
Es
+5V
SATA_TXP1 14
SATA_TXN1 14
1 1K/F_4
.(<%2$5'38//83
RP37
+3VPCU
10
9
8
7
6
MY13
MY12
MY3
MY6
MY14
MY11
MY10
MY15
1
2
3
4
5
10P8R-8.2K
+3VPCU
RP36
10
9
8
7
6
MY1
MY5
MY0
MY9
MY2
MY4
MY7
MY8
1
2
3
4
5
10P8R-8.2K
+3VPCU
R406
R408
8.2K_4 MY16
8.2K_4 MY17
+5V
SI , reserve Q34,Q35,R499,R500
for dual_LED on keyboard
R500
*1K/F_4
1 200/F_6
R150 2
1 200/F_6
WIRELESS_ON_R
WIRELESS_OFF_R
32 WIRELESS_OFF
Q34
*PDTC144EU
MX[0..7]
MX[0..7]
R499
*1K/F_4
R145 2
MY[0..17]
MY[0..17]
Q35
*PDTC144EU
*10K/F_4
+5V_ODD
ODD_EJECT#
32
32
R322
SATA_RXN1 14
SATA_RXP1 14
R330 2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
KB CONN
SI , update P/N
+5V
32
R323
EJECT#
*0_4
ODD_EJECT#
SI , remove R328
C572
R327
AO3404 ID
current
5.8A
*330K_6
Q29
*AO3404
ANT CONN
PV, change
to reserve only
*.1U/10V_4
19
SATA ODD
+5V
+15VALW
1
B
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
R140 2
1 200/F_6
R142 2
1 200/F_6
WIRELESS_ON_R
WIRELESS_OFF_R
+3V
32 WIRELESS_ON
SI , update P/N : DFHS13FS019
CN15
32
32
+3V
CAPSLED#
NUMLED#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
0.1U/10V_4
MY8
MY9
MY10
MY11
0.1U/10V_4
G1
*SHORT_ PAD1
MX1
MX7
MX6
MY9
MX4
MX5
MY0
MX2
MX3
MY5
MY1
MX0
MY2
MY4
MY7
MY8
MY6
MY3
MY12
MY13
MY14
MY11
MY10
MY15
MY16
MY17
C58
220P/50V_4
220P/50V_4
220P/50V_4
220P/50V_4
C63
C232
C298
C309
C276
MY5
MY6
MY3
MY7
NBSWON1#
+5V_ODD
2
3
High : ODD power down

Low : ODD power on
R326
*22_8
C578
*.027U/25V_6
Q28
*2N7002E
ODD_PD
32
120 mils
+5V_ODD
+5V_ODD
C573
0.1U/10V_4
C574
0.1U/10V_4
C571
0.1U/10V_4
C570
0.1U/10V_4
R324
+5V
352-(&7$;
4XDQWD&RPSXWHU,QF
Q26
*2N7002E
0_8
C575
10U/6.3V_8
1%5'
Size
Custom
Document Number
Rev
1A
KEYBOARD/SW_BOARD/ODD

1
Sheet
31
of
42


33
Mini PCI-E Card 1 WLAN

+3VSUS
+1.5V
R110
*10K/F_4
+3V
SI , udpate footprint to
MIPCI-C-1759513-52P-LDV-SMT
C583
0.01U/16V_4
C139
0.1U/10V_4
C132
10U/6.3V_8
+1.5V
EC_DEBUG1
PCIE_TXP1
PCIE_TXN1
PCIE_TXP1
PCIE_TXN1
9
9
PCIE_RXP1
PCIE_RXN1
PCIE_RXP1
PCIE_RXN1
PCLK_LPC_DEBUG
MINI_PLTRST#
12 PCLK_LPC_DEBUG
SI , add from HP request

15
13
11
9
7
5
3
1
PCIE_MINI1_CLKP
PCIE_MINI1_CLKN
12 PCIE_MINI1_CLKP
12 PCIE_MINI1_CLKN
WLAN_CLKREQ#
13 WLAN_CLKREQ#
14 BT_COMBO_EN#
T131
MINICAR_PME#
BT_DATA,BT_CHCLK,CLKREQ#
internal pull-DOWN 100k
ohm
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
Reserved
Reserved
+3.3V
GND
+1.5V
LED_W PAN#
LED_W LAN#
LED_W W AN#
GND
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
W _DISABLE#
GND
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
Reserved
Reserved
Reserved
Reserved
Reserved
+1.5V
GND
+3.3V
16
14
12
10
8
6
4
2
GND
REFCLK+
REFCLKGND
CLKREQ#
BT_CHCLK
BT_DATA
W AKE#
MINI_BLED
RF_LINK#
PCLK_LPC_DEBUG
*0_4
R54
10K/F_4
R63
R67
*0_4/S
*0_4/S
MINICAR_PME#
+3V
BLUELED 29,32
RF_LINK# 32
+3V
USBP10+
USBP10-
DAT_SMB
CLK_SMB
MINI_PLTRST#
MINI PCIE H=9.0

DFHD52MS154
MIPCI-C-1759513-52P-LDV-SMT
R106
*10K/F_4
R47
1
Q16
*PDTC144EU
13
13
C170
10U/6.3V_8
PDAT_SMB 6,7,13
PCLK_SMB 6,7,13
MINI_PLTRST# 12
RF_OFF# 14
LAD0
LAD1
LAD2
LAD3
LFRAME#
C148
0.1U/10V_4
51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
la
9
9
*0_6
LAD0
LAD1
LAD2
LAD3
LFRAME#
12,32
12,32
12,32
12,32
12,32
INTEL WLAN
CARD PIN 20
W_DISABLE#
have
internal
pull-up 110k
ohm
+3V
C81
0.1U/10V_4
C582
1U/10V_4
C
te
32
R43
13,30 PCIE_WAKE#
CN20
+5V
R82
*0_4
C106 *27PF/50V_4
14
SATA_LED#
LED1
1
Es
for EMI request
3P WHITE LED
2
+3V_SATA_LED
R531
1
390_6
2
+5V
SI , change footprint to ledl-s110kgct-3p-nb5
352-(&7$;
4XDQWD&RPSXWHU,QF
1%5'
Size
Custom
Document Number
Rev
1A
Mini CARD/LED

E
Sheet
33
of
42


+5VPCU
8208RTVDD1.1V
D0
FB
2200P/50V_4
0.1U/25V_4
4.7U/25V_8
la
*1500P/50V_4
3
2
1
PR79
10U/6.3V_8
GND1
R1
PC170
PC171
EN
VDD
PGOOD
GND
GND1
PC157
PR137
1.2VADJ
R1
PC158
PC159
PC160
*0.1U/10V_4
+5VPCU
PC152
VOUT
Peak current:0.5A
*10U/6.3V_8
PR140
PR145
*51.1K/F_4
*0_4
PR141
*100K/F_4
R2
1
PC173
+1.2V
PU11
*RT9025
*10_4
*0.33U/6.3V_4
VO=(0.8(R1+R2)/R2)
R2<120Kohm
PV modify 12/11
PR165
1.1VADJ
*0_4/S
1
38.3K/F_4
PR162
100K/F_4
352-(&7$;
4XDQWD&RPSXWHU,QF
VO=(0.8(R1+R2)/R2)
R2<120Kohm
R2
PV modify 12/17
GND
0.1U/10V_4
1U/6.3V_4
2
HW PG
PR163
2
VRON
HW PG
PGOOD
PC167
VOUT
+1.1VS5
10U/6.3V_8
VDD
*0.33U/6.3V_4
EN
ADJ
+5VPCU
10U/6.3V_8
0.1U/10V_4
PU13
RT9025
10K/F_4
PC166
NC
S5_ON
PC169
VIN
32,39
PR164
PC168
10U/6.3V_8
1.1 Volt +/- 5%

Countinue current:0.2A
Peak current:0.5A
NC
*10U/6.3V_8
+3VPCU
PC156
ADJ
Vo=0.75(R1+R2)/R2
PC155
VIN
4.7U/25V_8
RDSon=20m ohm
*100P/50V_4
+/- 5%
3
0.1U/25V_4
EC_SI
PC172
PV modify 12/16
1.2 Volt
+1.5VSUS
*0.1U/10V_4
10K/F_4
PC238
1500P/50V_4
PC242
PQ64
AO4712
PC240
4.87K/F_4
PR169
PC239
*1U/6.3V_4
PR168
PV modify 12/14
+
0.1U/10V_4
RTFB
FB
600 mils
PR226
2.2_8
GND
14
NC
PAD
PR174
*1M/F_4
17
2200P/50V_4
5
6
7
8
PR173
232K/F_4
*10U/6.3V_8
RTDL
+1.1V
+1.1V_S2
RTTON
PL14
2.5uH/7.5A
16
PQ65
AO4496
3
2
1
RTLX
DL
11
5
6
7
8
TON
RTDH
Es
EN/DEM
12
3
2
1
PHASE
RT8209A
VOUT
15
te
1U/6.3V_4
13
PGOOD
PGND
RTEN
BST
NC
VDDP
CS
VDD
*0_4/S 15K/F_4
HW PG_S2A 4
1
PC177
DH
PC179
1U/6.3V_4
10
RTBST
PC180
+1.1V Volt +/- 5%

Countinue current:5A
Peak current: 7A
OCP minimum: 9A
390U/2.5V_6X5.8ESR10
RTVDD
PU14
RTILIM
PC182
RTBST_1 PR175
2_6
+VIN
PC178
PC174
PC204
PC197
10K/F_4
*100P/50V_4
PQ8
DMN601K-7
PR171
10_6
10_4
PC218
RDSon=14m ohm
+5VPCU
Reserve for AMD tunning
VRON
Vo=0.75(R1+R2)/R2
PC103
*2.2U/6.3V_6
PR176
EC_SI
PR177
600 mils
PR194
*2.2_8
2.67K/F_4
PC85
PR95
PR170
2
PR72
PQ51
AON7702
PR80
8208RTD10.1V
13.3K/F_4
8208RTFB1.1V
PR88
+1.1V_DYN_S1
PL9
2.5uH/7.5A
G1
+1.1V_DYN
D1
PAD
14
PC195
DL
232K/F_4
8208RTDL1
PC192
3
2
1
PR64
8208TON1.1V
PC193
4
PQ50
AON7410
16
10K/F_4
0_4
0.1U/25V_4
TON
17
10 DYN_PW R_EN
23,32,34,37,39 HW PG
BST
VDDP
PHASE
EN/DEM
+3VPCU
PV modify 12/17
13
PGOOD
RT8208A
1.1
8208RTLX2.1V
0.1U/25V_4
0.95
8208RTDH1.1V
8208RTEN1.1V
15
+1.1V_DYN
12
11
*0.22U/10V_4
Low
High
DH
8208RTPG1.1V
4
PC76
DYN_PWR_EN
CS
10K/F_4
VDD
PR61
8208CS1.1V10
12.1K/F_4
32,36,37,39 VRON
2
PC78
23,32,34,37,39 HW PG
*0_4/S
1
PR65
2_6
PU3
PR71
PR74
2
8208BST1.1V_1
G0
PV modify 12/17
PC87
1U/6.3V_4
VOUT
10_6
1U/6.3V_4
PC83
35
+1.1V Volt +/- 5%

Peak current: 7A
OCP minimum: 9A
+VIN
PR66
0.1U/10V_4
390U/2.5V_6X5.8ESR10
4
Size
Custom
1%5'
Document Number
Rev
1A
VGA Core/+1.8VGFX/1.0VGFX

1
Sheet
35
of
42


+VIN
15
HW PG
0_4
10_6
RT8207AGQW
PC46
23,32,34,35,39
PR147
1M_4
PR148
*22_8
PQ19
AON6426L
PR153
1M_4
1
2
3
(6A )
PQ21
DMN601K-7
+1.0V +/- 5%
Peak current:3A
+1.5V_VGA
+1.5VSUS
0.01U/25V_4
PQ20
DTC144EUA
PC241
0.47U/6.3V_4
PC153
PR146
1M_4
33K_4
PC146
0.1U/10V_4
PR229
20,32,38 VGACOREON
VDDIO_FB_L 3
G
4
1.5V_ONG
VGA_REQ
PQ22
*DMN601K-7
13
PR26
*10K/F_4
1.5V_OND
EC_SI
VDDIO_FB_H 3
+1.5VSUS
+10VALW
+1.5V_VGA
Es
+VIN
PR24
10K/F_4
PC145
+1.0V_VGA
3
PC150
PC149
EC_SI
PR151
32,35,36,39 VRON
*10K/F_4
PC154
+5VPCU
PR150
0.47U/6.3V_4
20,32,38 VGACOREON
110K/F_4
1U/6.3V_4
12,32,38 VGA_PW ROK
PU12
RT9025
2
EN
VDD
PGOOD
PC148
EC_SI
EC_SI
VIN
NC
VOUT
GND
GND1
PV modify 12/17
PR152
*0_4/S
PC139
PR149
100K/F_4
VO=(0.8(R1+R2)/R2)
R2<120Kohm
PV modify 12/17
PC144
PR144
1.2VADJ1.0V
R1 25.5K/F_4
R2
PC147
0.1U/10V_4
13
2
*10K/F_4
ADJ
PGOOD
PR23
1
te
NC
12
PR33
PC15
PR47
V5FILT
14
PR25
10K/F_4
1U/6.3V_4
V5FILT
PC50
S5
EC_SI
+5VPCU
7.5K/F_4
0.1U/10V_4
11
1
*0_4/S
PR40
1116TONSET
619K/F_4
V5IN
1116CS
16
S3
PR44
PC63
10
*0_4
PR35
CS
PC210
1500P/50V_4
la
VDDQSET
17
1U/6.3V_4
0.1U/10V_4
PR32
EC_SI
+VIN
G
1
2
3
VDDQSNS CS_GND
0_4
SUSON
18
8
PR227
PV modify 12/17
PGND
1116VDDQSET
*0_4
32,39
NC
PC214
D
7
PR197
2.2_8
PQ56
RJK03D3DPA
1116DRVL
19
10U/6.3V_8
PC12
0.033U/10V_4
*100P/50V_4
DRVL
PL6
CV-10L0MZ01/DC-10F0M102
10U/6.3V_8
1116LL
LL
20
PQ48
RJK03B9DPA
+1.5VSUS
1116DRVH
+1.5VSUS_1
21
0.1U/25V_4
10U/6.3V_8
COMP
DRVH
VTTREF
2_6
G
2
MODE
D
22
4,6,7 DDR_VTTREF
VBST
0.1U/10V_4
1 4
*0_4/S
( 3mA )
32,34,39,40 MAINON
37
PR16
GND
PC70
390U/2.5V_6X5.8ESR10
modify for SI 1102

PC37
PR31
1116VBST
PC71
2200P/50V_4
23
PC72
4.7U/25V_8
VLDOIN
PC69
4.7U/25V_8
VTTSNS
PD5
*RB501V-40
PC20
*10U/6.3V_8
0.1U/25V_4
24
VTT
1
2
3
2
*0_4
+1.5VSUS_1
VTTGND
PR17
PU2
1
GND
4 CPU_VTT_SENSE
PR18
0_4
25
1
2
PC14
10U/6.3V_8
PC9
V5FILT
+1.5V +/- 5%
Peak current:12A
OCP minimum 15A
+1.5VSUS
10U/6.3V_8
+5VPCU
PR28
( VTT/2A )
+0.75V_DDR_VTT
352-(&7$;
4XDQWD&RPSXWHU,QF
SANTOS INTEL
Size
3
Document Number
Rev
1A
DDR3 (RT8207)
1%5'

7
Sheet
37
8
of
42


+VIN
+15VALW
+10VALW
+3VPCU
AON6426L
PQ7
VOUT
3
1
0.1U/10V_4
PV modify 12/17
EN
VDD
PGOOD
8
9
PC234
GND
GND1
PC235
PC237
1.2VADJ1.8VPR221
PR218
2
1
*0_4/S
HWPG
R1
127K/F_4
VO=(0.8(R1+R2)/R2)
R2<120Kohm
PR220
100K/F_4
R2
PV modify 12/17
2.35A
+1.5V
+0.9V +/- 5%
Peak current:2A
2
PC230
23,32,34,35,37
VDD
PGOOD
GND
8
9
PC75
PC61
PC54
R1
12.7K/F_4
1
PR77
100K/F_4
R2
*0_4/S
VO=(0.8(R1+R2)/R2)
R2<120Kohm
+
PR222
110K/F_4
PC231
RT9043GB
R2
GND
GND1
2
2
HWPG
PR230
68.1K_4
R1
FB
PV modify 12/17
PR67
1.2VADJ1.05V
PR84
41.2VSET
PC77
VOUT
0.1U/10V_4
0.1U/10V_4
EN
PV modify 12/17
PC228
1U/6.3V_4
PR225
100K/F_4
PQ66
DMN601K-7
12,16 VDDR_1.05_EN
VDDR_1.05_EN
PR231
VIN
+5VPCU
1U/6.3V_4
0.1U/10V_4
10K/F_4
NC
352-(&7$;
4XDQWD&RPSXWHU,QF
33_4
Vout=1.2(1+R1/R2)
PV modify 12/16
VDDR_1.05_EN:
1 : VDDR =1.05V
0 : VDDR = 0.9V (Default)
PC244
220P/50V_4
PU4
RT9025
32,35,36,37 VRON
PC89
VIN
+2.5V
VOUT
+3VPCU
EN
*0.1U/10V_4
PC236
1U/6.3V_4
10U/6.3V_8
PR76
*100P/50V_4
PR223
10K/F_4
PC82
PC175
PU16
VR2.5_ON
PC81
10U/6.3V_8
+2.5 Volt +/- 5%

Countinue current: 200mA
Peak current: 600mA
32
+0.9V
+3VS5
0.1U/10V_4
S5_ONG
PQ31
DTC144EUA
0.1U/10V_4
Es
2
S5_ON
3
32,35
PR166
1M_4
PQ32
ME3424D
+1.5VSUS
0.5A
PC181
2200P/50V_4
PQ34
DMN601K-7
PQ33
*DMN601K-7
S5_OND10V 3
PC176
PR172
*22_8
ADJ
1
2
5
6
PR167
1M_4
0.1U/10V_4
PC203
PR178
1M_4
Size
Custom
1%5'
Document Number
DISCHARGE/3VS5/5VS5/LAN

1
PC229
10U/6.3V_8
+3VS5
PC227
PC64
23,32,34,35,37
+5VPCU
LAN_POWER_G
+VIN
3
2
1
PC132
0.1U/10V_4
PR128
1M_4
2200P/50V_4
3
1
PQ17
DTC144EUA
PC187
0.1U/10V_4
+1.5VSUS
+3VLANVCC
PC134
32 LAN_POWER
0.67A
PR219
10K/F_4
NC
VIN
PU15
RT9025
32,35,36,37 VRON
te
PC232
+3V
PQ38
AO4496
0.1U/10V_4
PQ15
ME3424D
PQ16
DMN601K-7
PC131
PQ62
*DMN601K-7
LAN_ON
0.1U/10V_4
1
2
3
PR127
1M_4
1
2
5
6
PR125
*22_8
2200P/50V_4
PC183
PR129
1M_4
3
PC233
5.65A
0.1U/10V_4
+1.8V
PQ35
DMN601K-7
+3VPCU
+3VPCU
+10VALW
+3VLANVCC
la
MAIND10V
+VIN
0.1U/10V_4
PC184
PC163
0.1U/10V_4
10U/6.3V_8
PR179
1M_4
PQ28
ME3424D
+1.8V +/- 5%
Peak current:1A
0.1U/10V_4
5
6
7
8
MAINON_G 38
PV modify 12/17
+3VSUS
SUSON_G
+3VPCU
PQ42
DTC144EUA
2
PQ30
DTC144EUA
+10VALW
MAINON_G
SUSON
PC186
0.1U/10V_4
1
PR181
1M_4
32,34,37,40 MAINON
32,37
PR161
1M_4
10U/6.3V_8
PC165
+5V
1U/6.3V_4
PQ39
AO4496
3
2
1
5A
2
PC188
PQ29
DMN601K-7
2.2A
10U/6.3V_8
PQ40
DMN601K-7
PQ14
*DMN601K-7
2200P/50V_4
PQ36
*DMN601K-7
PQ41
DMN601K-7
PQ37
DMN601K-7
PQ27
*DMN601K-7
MAIND
PC164
PR97
*22_8
PR159
1M_4
SUSD10V
0.1U/10V_4
PR180
*22_8
PR158
*22_8
PC185
0.1U/10V_4
PR185
22_8
5
6
7
8
PR183
1M_4
PR184
22_8
39
+3VPCU
1
2
5
6
PR160
1M_4
PR182
1M_4
+10VALW
+3VSUS
+5VPCU
+1.5V
2200P/50V_4
+1.8V_VGA
+3V
+5V
+VIN
ADJ
For VDDR 1.05 control
Sheet
39of
8
Rev
?
42


CPU Power 1
CPU Power 2
EC Pin98
SUSON
HWPG
VRM_PWRGD
+VCORE0
+1.8VSUS
D
EC Pin99
EC Pin34
MAINON
+VCORE1
VDDA_EN
+0.9VSMVTT
+CPUVDDNB
la
+2.5V
+1.2V
EC Pin101
S5_ON
S5_OND
+1.1V
Delay
+3VS5
te
EC Pin101
S5_ON
+1.2VS5
+5VSUS
SUSON
Es
EC Pin98
SUSD
Delay
+3VSUS
HWPG
HWPG
VCORE_PG
+VGACORE
HWPG
EC Pin99
MAINON
Option
Delay
1.8V_OND
+1.8V
VCORE_PG
B
+5V
EC Pin99
MAINON
MAIND
Delay
+5V
+1.5V
+3V
EC Pin76
S5_ON
SUSON
MAINON
HWPG
ECPWROK
SB_PWRGD_IN
NB_PWRGD_IN
SUSD
MAIND
VCORE_PG
Delay 600ms
3.3V
1.8V
S5_OND
RSMRST#
VRM_PWRGD
352-(&7$;
4XDQWD&RPSXWHU,QF
4
Size
Custom
1%5'
Document Number
Rev
3A
Power control

1
Sheet
41
of
42



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1

AX2/7 SYSTEM DIAGRAM

VCCP +1.1V AND +1.2V(RT8204)

CPU CORE ISL6265HRTZ-T

SYSTEM POWER ISL6237

Clock gen/Robson/TV tuner

VGA thermal/system thermal

Date: Thursday, December 24, 2009

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Keep trace from resisor to CPU within 0.6"

Route as 80ohm, diff

VID Override table (VDD)

CN6 *HDT CONN

SI , add R205 for P-state implement

SideBand Temp sense I2C

MV can remove reserve for debug

VLDT use 1.5A Max current

S1G4 HT,CTL I/F 1/3

Date: Thursday, December 24, 2009

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BOTTOM SIDE DECOUPLING

DECOUPLING BETWEEN PROCESSOR AND DIMMs

PV ,Change from +1.5VSUS to +1.5V

For fix HyperTransport nets

ADD VGA TEMP_ FAIL function

PROCESSOR POWER AND GROUND

S1G4 PWR & GND 3/3

Date: Thursday, December 24, 2009

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PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

H=9.2 footprint: "ddr-c-2013310-204p-1"

SO-DIMM BYPASS PLACEMENT :

DE-COUPLING FOR DIMM2(ONE CAP PER POWER PIN)

SI , remove C165 , C236

DE-COUPLING FOR DIMM2

DDR3 SODIMMS TERMINATIONS

Date: Thursday, December 24, 2009

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SI , for routing smooth

UMA can remove all GFX_TX CAP

PCIE I/F GPP

Close to North Bridge

PCIE I/F GFX

RS880 Display Port Support (muxed on GFX)

GFX_TX0,TX1,TX2 and TX3

AUX0 and HPD0

GFX_TX4,TX5,TX6 and TX7

AUX1 and HPD1

RS880-PCIE I/F 2/5

Date: Thursday, December 24, 2009

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+1.8V 1A for RS780M+SB700

VDDA18PCIE PCIE TX stage

VDD18 - RS780 I/O

VDD18_MEM For UMA RS780 only

+1.1V 2A for RS880M