Clevo m720t m730t m728t m729t PDF

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Notebook Computer
M720T/ M728T/ M729T/ M730T
Service Manual
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Notice
The company reserves the right to revise this publication or to change its contents without notice. Information contained
herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent ven-
dor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are
they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication.
This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or
reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publica-
tion, except for copies kept by the user for backup purposes.
Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of
their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement
of that product or its manufacturer.
Version 1.0
July 2008
Trademarks
Intel, Celeron and Intel Core are trademarks of Advanced Micro Devices, Inc.
Windows
is a registered trademark of Microsoft Corporation.

Other brand and product names are trademarks and./or registered trademarks of their respective companies.
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About this Manual
This manual is intended for service personnel who have completed sufficient training to undertake the maintenance and
inspection of personal computers.
It is organized to allow you to look up basic information for servicing and/or upgrading components of the M720T/
M728T/M729T/M730T series notebook PC.
The following information is included:
Chapter 1, Introduction, provides general information about the location of system elements and their specifications.
Chapter 2, Disassembly, provides step-by-step instructions for disassembling parts and subsystems and how to upgrade
elements of the system.
Appendix A, Part Lists
Appendix B, Schematic Diagrams
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FCC Statement
(Federal Communications Commission)
You are cautioned that changes or modifications not expressly approved by the party responsible for compliance could
void the user's authority to operate the equipment.
This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in ac-
cordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee
that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or
television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct
the interference by one or more of the following measures:
Re orient or relocate the receiving antenna.
Increase the separation between the equipment and receiver.
Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
Consult the service representative or an experienced radio/TV technician for help.
Operation is subject to the following two conditions:
1. This device may not cause interference.
And
2. This device must accept any interference, including interference that may cause undesired operation of the device.
FCC RF Radiation Exposure Statement:
1. This Transmitter must not be co-located or operating in conjunction with any other antenna or transmitter.
2. This equipment complies with FCC RF radiation exposure limits set forth for an uncontrolled environment. This equipment
should be installed and operated with a minimum distance of 20 centimeters between the radiator and you body.
Warning
Use only shielded ca-
bles to connect I/O de-
vices to this
equipment. You are
cautioned that chang-
es or modifications not
expressly approved by
the manufacturer for
compliance with the
above standards could
void your authority to
operate the equip-
ment.
If your purchase option
includes both Wire-
less LAN and 3.5G
modules, then the ap-
propriate antennas will
be installed. Note that
In order to comply with
FCC RF exposure
compliance require-
ments, the antenna
must not be co-located
or operate in conjunc-
tion with any other an-
tenna or transmitter.
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IMPORTANT SAFETY INSTRUCTIONS
Follow basic safety precautions, including those listed below, to reduce the risk of fire, electric shock and injury to per-
sons when using any electrical equipment:
1. Do not use this product near water, for example near a bath tub, wash bowl, kitchen sink or laundry tub, in a wet
basement or near a swimming pool.
2. Avoid using a telephone (other than a cordless type) during an electrical storm. There may be a remote risk of elec-
trical shock from lightning.
3. Do not use the telephone to report a gas leak in the vicinity of the leak.
4. Use only the power cord and batteries indicated in this manual. Do not dispose of batteries in a fire. They may
explode. Check with local codes for possible special disposal instructions.
5. This product is intended to be supplied by a Listed Power Unit (DC Output 19V, 3.42A OR 18.5V, 3.5A (65W) mini-
mum AC/DC Adapter).
CAUTION
Always disconnect all telephone lines from the wall outlet before servicing or disassembling this equipment.
TO REDUCE THE RISK OF FIRE, USE ONLY NO. 26 AWG OR LARGER,
TELECOMMUNICATION LINE CORD
This Computers Optical Device is a Laser Class 1 Product
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Instructions for Care and Operation
The notebook computer is quite rugged, but it can be damaged. To prevent this, follow these suggestions:
1. Dont drop it, or expose it to shock. If the computer falls, the case and the components could be damaged.
2. Keep it dry, and dont overheat it. Keep the computer and power supply away from any kind of heating element. This
is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged.
3. Follow the proper working procedures for the computer. Shut the computer down properly and dont forget to save
your work. Remember to periodically save your data as data may be lost if the battery is depleted.
Do not expose the computer
to any shock or vibration.
Do not place it on an unstable
surface.
Do not place anything heavy
on the computer.
Do not expose it to excessive
heat or direct sunlight.
Do not leave it in a place
where foreign matter or mois-
ture may affect the system.
Dont use or store the com-
puter in a humid environment.
Do not place the computer on
any surface which will block
the vents.
Do not turn off the power
until you properly shut down
all programs.
Do not turn off any peripheral
devices when the computer is
on.
Do not disassemble the com-
puter by yourself.
Perform routine maintenance
on your computer.
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4. Avoid interference. Keep the computer away from high capacity transformers, electric motors, and other strong mag-
netic fields. These can hinder proper performance and damage your data.
5. Take care when using peripheral devices.
Power Safety
The computer has specific power requirements:
Only use a power adapter approved for use with this computer.
Your AC adapter may be designed for international travel but it still requires a steady, uninterrupted power supply. If you are
unsure of your local power specifications, consult your service representative or local power company.
The power adapter may have either a 2-prong or a 3-prong grounded plug. The third prong is an important safety feature; do
not defeat its purpose. If you do not have access to a compatible outlet, have a qualified electrician install one.
When you want to unplug the power cord, be sure to disconnect it by the plug head, not by its wire.
Make sure the socket and any extension cord(s) you use can support the total current load of all the connected devices.
Before cleaning the computer, make sure it is disconnected from any external power supplies.
Use only approved brands of
peripherals.
Unplug the power cord before
attaching peripheral devices.
Do not plug in the power
cord if you are wet.
Do not use the power cord if
it is broken.
Do not place heavy objects
on the power cord.
Power Safety
Warning
Before you undertake
any upgrade proce-
dures, make sure that
you have turned off the
power, and discon-
nected all peripherals
and cables (including
telephone lines). It is
advisable to also re-
move your battery in
order to prevent acci-
dentally turning the
machine on.
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Battery Precautions
Only use batteries designed for this computer. The wrong battery type may explode, leak or damage the computer.
Do not remove any batteries from the computer while it is powered on.
Do not continue to use a battery that has been dropped, or that appears damaged (e.g. bent or twisted) in any way. Even if the
computer continues to work with a damaged battery in place, it may cause circuit damage, which may possibly result in fire.
Recharge the batteries using the notebooks system. Incorrect recharging may make the battery explode.
Do not try to repair a battery pack. Refer any battery pack repair or replacement to your service representative or qualified service
personnel.
Keep children away from, and promptly dispose of a damaged battery. Always dispose of batteries carefully. Batteries may explode
or leak if exposed to fire, or improperly handled or discarded.
Keep the battery away from metal appliances.
Affix tape to the battery contacts before disposing of the battery.
Do not touch the battery contacts with your hands or metal objects.
Related Documents
You may also need to consult the following manual for additional information:
Users Manual on CD
This describes the notebook PCs features and the procedures for operating the computer and its ROM-based setup pro-
gram. It also describes the installation and operation of the utility programs provided with the notebook PC.
Battery Disposal
The product that you have purchased contains a rechargeable battery. The battery is recyclable. At the end of
its useful life, under various state and local laws, it may be illegal to dispose of this battery into the municipal
waste stream. Check with your local solid waste officials for details in your area for recycling options or proper
disposal.
Caution
Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommend-
ed by the manufacturer. Discard used battery according to the manufacturers instructions.
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Contents
Introduction ..............................................1-1
Overview ......................................................................................... 1-1
System Specifications ................................. 1-2
................................................... 1-4
External Locator - Top View with LCD Panel Open ...................... 1-5
External Locator - Front & Right side Views ................................. 1-6
External Locator - Left Side & Rear View ..................................... 1-7
External Locator - Bottom View ..................................................... 1-8
Mainboard Overview - Top (Key Parts) ......................................... 1-9
Mainboard Overview - Bottom (Key Parts) .................................. 1-10
Mainboard Overview - Top (Connectors) ..................................... 1-11
Mainboard Overview - Bottom (Connectors) ............................... 1-12
Disassembly ...............................................2-1
Overview ......................................................................................... 2-1
Maintenance Tools .......................................................................... 2-2
Connections ..................................................................................... 2-2
Maintenance Precautions ................................................................. 2-3
Disassembly Steps ........................................................................... 2-4
Removing the Battery ...................................................................... 2-5
Removing the Hard Disk Drive ....................................................... 2-6
Removing the Optical (CD/DVD) Device ...................................... 2-8
Removing the System Memory (RAM) ........................................ 2-10
Removing the Inverter Board ........................................................ 2-12
Removing the Processor ................................................................ 2-13
Removing the Wireless LAN Module ........................................... 2-15
Removing the Bluetooth Module .................................................. 2-16
Removing the Keyboard ................................................................ 2-17
Removing the Modem ................................................................... 2-18
Part Lists ..................................................A-1
Part List Illustration Location ........................................................ A-2
Top with Fingerprint (M720T) ...................................................... A-3
Top without Fingerprint (M720T) ................................................. A-4
Bottom (M720T) ............................................................................ A-5
LCD (M720T) ................................................................................ A-6
HDD (M720T) ............................................................................... A-7
COMBO (M720T) ......................................................................... A-8
DVD-Dual Drive (M720T) ............................................................ A-9
Top with Fingerprint (M728T) .................................................... A-10
Top without Fingerprint (M728T) ............................................... A-11
Bottom (M728T) .......................................................................... A-12
LCD (M728T) .............................................................................. A-13
HDD (M728T) ............................................................................. A-14
COMBO (M728T) ....................................................................... A-15
DVD-Dual Drive (M728T) .......................................................... A-16
Bottom (M729T) .......................................................................... A-19
LCD (M729T) .............................................................................. A-20
HDD (M729T) ............................................................................. A-21
COMBO (M729T) ....................................................................... A-22
Bottom (M730T) .......................................................................... A-26
LCD (M730T) .............................................................................. A-27
HDD (M730T) ............................................................................. A-28
COMBO (M730T) ....................................................................... A-29
Schematic Diagrams................................. B-1
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System Block Diagram ................................................................... B-2
Intel Penryn (Socket-P) 1/2 ............................................................ B-3
Intel Penryn (Socket-P) 2/2 ............................................................ B-4
Cantiga 1/6 - Host .......................................................................... B-5
Cantiga 2/6 - VGA, CRT ................................................................ B-6
Cantiga 3/6 - DDR .......................................................................... B-7
Cantiga 4/6 - Power ........................................................................ B-8
Cantiga 5/6 - Power ........................................................................ B-9
Cantiga 6/6 - GND ....................................................................... B-10
DDRII CHANNEL A ................................................................... B-11
DDRII CHANNEL B ................................................................... B-12
Panel, Inverter, CRT ..................................................................... B-13
ICH9-M 1/5 - SATA .................................................................... B-14
ICH9-M 2/5 - PCIE, PCI, USB .................................................... B-15
ICH9-M 3/5 - GPIO, PWR Management .................................... B-16
ICH9-M 4/5 - Power .................................................................... B-17
ICH9-M 5/5 - GND ...................................................................... B-18
Clock Generator ........................................................................... B-19
Multi I/O, ODD, CCD, BT, TPM ................................................ B-20
New Card, Mini PCIE .................................................................. B-21
LED, FAN, TP, FP, USB ............................................................. B-22
JMB385 Card Reader ................................................................... B-23
PCI-E LAN RTL8111C ............................................................... B-24
Audio Codec ALC662 .................................................................. B-25
Audio AMP2056 .......................................................................... B-26
KBC-ITE IT8512E ....................................................................... B-27
System Power, LED BKLT .......................................................... B-28
Power VDD3, VDD5 ................................................................... B-29
Power 1.5VS, 1.05VS, 3.3V, 5V .................................................. B-30
Power 1.8V, 0.9VSM ................................................................... B-31
Power VCORE ............................................................................. B-32
Power AC-IN, Charger ................................................................. B-33
Multi I/O Board 1/2 ......................................................................B-34
Multi I/O Board 2/2 ......................................................................B-35
Finger Printer Board .....................................................................B-36
Click Board ...................................................................................B-37
M730T ODD Bridge Board ..........................................................B-38
M730T Audio Board .....................................................................B-39
Power Sequence Diagram .............................................................B-40
Power Sequence v3.0 ....................................................................B-41
Introduction
Overview 1 - 1
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Chapter 1: Introduction
Overview
This manual covers the information you need to service or upgrade the M720T/M728T/M729T/M730T series notebook
computer. Information about operating the computer (e.g. getting started, and the Setup utility) is in the Users Manual.
Information about drivers (e.g. VGA & audio) is also found in Users Manual. That manual is shipped with the computer.
Operating systems (e.g. Windows XP, Windows Vista, etc.) have their own manuals as do application software (e.g. word
processing and database programs). If you have questions about those programs, you should consult those manuals.
The M720T/M728T/M729T/M730T series notebook is designed to be upgradeable. See Disassembly on page 2 - 1
for a detailed description of the upgrade procedures for each specific component. Please note the warning and safety in-
formation indicated by the symbol.
The balance of this chapter reviews the computers technical specifications and features.
Introduction
1 - 2 System Specifications
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System Specifications
Feature Specification
Processor Intel Core2 Duo Processor
35W - (478-pin) Micro-FC-PGA Package - Socket-P
T9400/ T9600
45nm (45 Nanometer) Process Technology
6MB On-die L2 Cache & 1006MHz FSB
2.53/ 2.8 GHz
Intel Core2 Duo Processor
25W - (478-pin) Micro-FC-PGA Package - Socket-P
P8400/ P8600
45nm (45 Nanometer) Process Technology
3MB On-die L2 Cache & 1006MHz FSB
2.4/ 2.53 GHz
Core Logic Intel GM45 + ICH9M Chipset
LCD M720T/M728T/M729T:
12.1" WXGA (1280 * 800) TFT LCD
M730T:
13.3" WXGA (1280 * 800) TFT LCD
Memory 64-bit Wide DDRII (DDR2) Data Channel
Supports Dual Channel DDRII (DDR2) SDRAM
Two 200 Pin SO-DIMM Sockets Supporting DDRII (DDR2) 667MHz/800MHz RAM Modules
Memory Expandable up to 4GB (1024/2048 MB DDR2 Modules)
Video Adapter Intel GM45 Integrated Video
High Preference 3D/2D Graphic Accelerator
Supports Dynamic Video Memory Technology DVMT (up to 256MB dynamically allocated from system memory where
needed)
Supports DirectX10 3D Graphics Engine Accelerator
Security Security (Kensington Type) Lock Slot
Fingerprint ID Reader Module (Factory Option)
BIOS Password
Trusted Platform Module
BIOS One 32Mb SPI Flash ROM Phoenix BIOS
Storage One Changeable 12.7mm(h) SATA (Serial) Optical Device (CD/DVD) Type Drive (see Optional on page 1 - 4)
Easy Changeable 2.5" 9.5 mm (h) SATA (Serial) HDD
Audio High Definition Audio (HDA)
Compliant with Microsoft UAA (Universal Audio
Architecture)
Direct Sound 3D Compatible
2 * Built-In Speakers
Built-In Microphone
Keyboard &
Pointing Device
Winkey Keyboard Built-In TouchPad with Scrolling Function
Introduction
System Specifications 1 - 3
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Interface Three USB 2.0 Ports
One Headphone-Out Jack
One Microphone-In Jack
One S/PDIF Out Jack
One Internal Microphone
One RJ-11 Modem Jack
One RJ-45 LAN Jack
One DC-In Jack
One External Monitor Port
Card Reader Embedded 7-in-1 Card Reader (MS/ MS Pro/ SD/ Mini SD/ MMC/ RS MMC/ MS Duo) Note: MS Duo/ Mini SD/ RS
MMC Cards require a PC adapter
ExpressCard Slot One ExpressCard/34(54) Slot
Communication
*Note: The 3.5G
and Intel Turbo
Memory Modules
cannot coexist. There
is only one slot avail-
able for either of
these factory option
modules.
10M/ 100/ 1000Mb Base-TX Ethernet LAN
Azalia 56K Modem V.90 & V.92 Compliant
Intel WiFi Link 5300 Series (3*3 - 802.11a/g/n) Wireless LAN Mini-Card Module (Option)
Intel WiFi Link 5100 Series (1*2 - 802.11a/g/n) Wireless LAN Mini-Card Module (Option)
3rd Party 802.11b/g Wireless LAN Mini-Card Module with USB interface (Option)
Bluetooth 2.0 + EDR (Enhanced Data Rate) Module (Factory Option)
1.3M or 2.0M Pixel PC Camera Module with USB interface (Factory Option)
3.5G Module (see sidebar):
*UMTS/HSPDA-based 3.5G Mini-Card Module with USB Interface (Factory Option)
Quad-band GSM/GPRS (850 MHz, 900 MHz, 1800 MHz, 1900 MHz)
UMTS WCDMA FDD (2100 MHz)
Power
Management
Supports ACPI 3.0 Supports Wake on LAN
Supports Resume from Modem Ring
Power Full Range AC/DC Adapter AC Input 100 - 240V, DC Output 50 - 60Hz, 19V, 3.42A or 18.5V, 3.5A (65 Watts)
Battery 4 Cell Smart Lithium-Ion Battery Pack, 14.8V/2.4AH
8 Cell Smart Lithium-Ion Battery Pack, 14.8V/4.4AH (Option)
UMTS Modes
Note that UMTS modes CAN NOT be used in North America.
Introduction
1 - 4
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Environmental
Spec
Temperature
Operating: 5C - 35C
Non-Operating: -20C - 60C
Relative Humidity
Operating: 20% - 80%
Non-Operating: 10% - 90%
Dimensions
& Weight
M720T/M728T/M729T:
299mm (w) * 219mm (d) * 26.5-35.7mm (h)
1.88 kg With 4 Cell Battery and ODD
M730T:
310mm (w) * 233mm (d) * 30-36mm (h)
2.0 kg With 4 Cell Battery and ODD
Optional
*Note: The 3.5G
and Intel Turbo
Memory Modules
cannot coexist. There
is only one slot avail-
able for either of
these factory option
modules.
Optical Drive Module Options:
SATA DVD/CD-RW Combo Drive Module
SATA DVD Dual (Super Multi) Drive Module
Intel WiFi Link 5300 Series (3*3 - 802.11a/g/n) Wireless
LAN Mini-Card Module
Intel WiFi Link 5100 Series (1*2 - 802.11a/g/n) Wireless
LAN Mini-Card Module
3rd Party 802.11b/g Wireless LAN Mini-Card Module with
USB interface
8 Cell Smart Lithium-Ion Battery Pack
1.3M or 2.0M Pixel USB PC Camera Module (Factory
Option)
Bluetooth 2.0 + EDR (Enhanced Data Rate) Module
(Factory Option)
Fingerprint ID Reader Module (Factory Option)
*Intel Turbo Memory (Robson) NAND Flash Memory
Card Module (Factory Option)
OR
*UMTS/HSPDA-based 3.5G Module with Mini Card
Interface (Factory Option)
Quad-band GSM/GPRS (850 MHz, 900 MHz, 1800
MHz, 1900 MHz)
UMTS WCDMA FDD (2100 MHz)
UMTS Modes
Note that UMTS modes CAN NOT be used in
North America.
Introduction
External Locator - Top View with LCD Panel Open 1 - 5
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External Locator - Top View with LCD Panel Open
Figure 1
Top View
1. Optional Built-In
PC Camera
2. LCD
3. Speakers
4. Power Button
5. Hot Key Buttons
6. LED Status
Indicators
7. Keyboard
8. Touchpad &
Buttons
9. LED Power &
Communication
Indicators
10. Fingerprint
(Optional)
11. Built-In
Microphone
*Note: This model may have
either a fingerprint module or
card reader module, depend-
ing on your purchase configu-
ration.
M720T/M728T/M729T M730T
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5
1
7
8
4
6
9
3 3
11
10
6
5
4
2
5
1
7
8
4
6
9
10
6
5 4
11
Introduction
1 - 6 External Locator - Front & Right side Views
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External Locator - Front & Right side Views
Figure 2
Front Views
1. LED Power &
Communication
Indicators
2. 7-in-1 Card
Reader
3. S/PDIF-Out Jack
4. Microphone-In
Jack
5. Headphone-Out
Jack
Figure 3
Right Side Views
1. Optical Device
Drive Bay
2. USB 2.0 Port
3. RJ-11 Phone
Jack
4. Security Lock
Slot
1
4 3 5 2
M720T/M728T/M729T
1
4 3 5 2
M730T
1
3
2
4
1
2 3
4
M720T/M728T/M729T
M730T
Introduction
External Locator - Left Side & Rear View 1 - 7
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External Locator - Left Side & Rear View
Figure 4
Left Side View
1. DC-In Jack
2. RJ-45 LAN Jack
3. External Monitor
Port
4. Vent/Fan Intake/
Outlet
5. 2 * USB 2.0 Ports
6. ExpressCard Slot
1
4
2
3
5 5
6
M720T/M728T/M729T
M730T
4
1
2
3
5 5
6
Figure 5
Rear View
1. Battery
M720T/M728T/M729T
M730T
1
1
Introduction
1 - 8 External Locator - Bottom View
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External Locator - Bottom View
Figure 6
Bottom View
1. Battery (M730T 8
Cell Battery
Pictured)
2. Hard Disk Bay
Cover
(3.5G Module
Location)
3. RAM & CPU Bay
Cover
4. Vent/Fan Intake/
Outlet
(M730T Only)
5. Speakers
(M730T Only)
Overheating
To prevent your com-
puter from overheating
make sure nothing
blocks the vent/fan in-
takes while the com-
puter is in use.
M720T/M728T/M729T M730T
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3
1
2
3
1
4
5 4 5
Introduction
Mainboard Overview - Top (Key Parts) 1 - 9
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Mainboard Overview - Top (Key Parts)
Figure 7
Mainboard Top
Key Parts
1. Transformer
2. VT6103L
3. ExpressCard
Connector
4. ENE MR510
5. KBC ITE IT8512E
1
2
3
4
5
Introduction
1 - 10 Mainboard Overview - Bottom (Key Parts)
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Mainboard Overview - Bottom (Key Parts)
1
2
3
4
5
6
7
8
Figure 8
Mainboard Bottom
Key Parts
1. CPU Socket (no
CPU installed)
2. Northbridge
3. Memory Slots
DDR2 SO-DIMM
4. ICS
5. Card Reader
Socket
6. Southbridge
7. Audio Codec
8. Mini-Card
Connector (WLAN
Module)
Introduction
Mainboard Overview - Top (Connectors) 1 - 11
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Mainboard Overview - Top (Connectors)
Figure 9
Mainboard Top
Connectors
1. Hot-key
Connector
2. LCD Cable
Connector
3. Keyboard Cable
Connector
4. Audio Board
Connector
5. Microphone
Cable Connector
6. TouchPad Cable
Connector
6
5
1
4
2
3
Introduction
1 - 12 Mainboard Overview - Bottom (Connectors)
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Mainboard Overview - Bottom (Connectors)
Figure 10
Mainboard Bottom
Connectors
1. BT Cable
Connector
2. Multi Board
Connector
3. CD-ROM
Connector
4. HDD Connector
5. CMOS Bat.
Connector
6. CPU Fan Cable
Connector
7. DC-In Jack
8. USB Port
1
2
3
4
5
6 8
8
7
Disassembly
Overview 2 - 1
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Chapter 2: Disassembly
Overview
This chapter provides step-by-step instructions for disassembling the M720T/M728T/M729T/M730T series notebooks
parts and subsystems. When it comes to reassembly, reverse the procedures (unless otherwise indicated).
We suggest you completely review any procedure before you take the computer apart.
Procedures such as upgrading/replacing the RAM, optical device and hard disk are included in the Users Manual but are
repeated here for your convenience.
To make the disassembly process easier each section may have a box in the page margin. Information contained under
the figure # will give a synopsis of the sequence of procedures involved in the disassembly procedure. A box with a
lists the relevant parts you will have after the disassembly process is complete. Note: The parts listed will be for the dis-
assembly procedure listed ONLY, and not any previous disassembly step(s) required. Refer to the part list for the previ-
ous disassembly procedure. The amount of screws you should be left with will be listed here also.
A box with a will also provide any possible helpful information. A box with a contains warnings.
An example of these types of boxes are shown in the sidebar.
Information
Warning
Disassembly
2 - 2 Overview
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NOTE: All disassembly procedures assume that the system is turned OFF, and disconnected from any power supply (the
battery is removed too).
Maintenance Tools
The following tools are recommended when working on the notebook PC:
M3 Philips-head screwdriver
M2.5 Philips-head screwdriver (magnetized)
M2 Philips-head screwdriver
Small flat-head screwdriver
Pair of needle-nose pliers
Anti-static wrist-strap
Connections
Connections within the computer are one of four types:
Locking collar sockets for ribbon connectors To release these connectors, use a small flat-head screwdriver to
gently pry the locking collar away from its base. When replac-
ing the connection, make sure the connector is oriented in the
same way. The pin1 side is usually not indicated.
Pressure sockets for multi-wire connectors To release this connector type, grasp it at its head and gently
rock it from side to side as you pull it out. Do not pull on the
wires themselves. When replacing the connection, do not try to
force it. The socket only fits one way.
Pressure sockets for ribbon connectors To release these connectors, use a small pair of needle-nose pli-
ers to gently lift the connector away from its socket. When re-
placing the connection, make sure the connector is oriented in
the same way. The pin1 side is usually not indicated.
Board-to-board or multi-pin sockets To separate the boards, gently rock them from side to side as
you pull them apart. If the connection is very tight, use a small
flat-head screwdriver - use just enough force to start.
Disassembly
Overview 2 - 3
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Maintenance Precautions
The following precautions are a reminder. To avoid personal injury or damage to the computer while performing a re-
moval and/or replacement job, take the following precautions:
1. Don't drop it. Perform your repairs and/or upgrades on a stable surface. If the computer falls, the case and other
components could be damaged.
2. Don't overheat it. Note the proximity of any heating elements. Keep the computer out of direct sunlight.
3. Avoid interference. Note the proximity of any high capacity transformers, electric motors, and other strong mag-
netic fields. These can hinder proper performance and damage components and/or data. You should also monitor
the position of magnetized tools (i.e. screwdrivers).
4. Keep it dry. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly
damaged.
5. Be careful with power. Avoid accidental shocks, discharges or explosions.
Before removing or servicing any part from the computer, turn the computer off and detach any power supplies.
When you want to unplug the power cord or any cable/wire, be sure to disconnect it by the plug head. Do not pull on the wire.
6. Peripherals Turn off and detach any peripherals.
7. Beware of static discharge. ICs, such as the CPU and main support chips, are vulnerable to static electricity.
Before handling any part in the computer, discharge any static electricity inside the computer. When handling a
printed circuit board, do not use gloves or other materials which allow static electricity buildup. We suggest that
you use an anti-static wrist strap instead.
8. Beware of corrosion. As you perform your job, avoid touching any connector leads. Even the cleanest hands pro-
duce oils which can attract corrosive elements.
9. Keep your work environment clean. Tobacco smoke, dust or other air-born particulate matter is often attracted
to charged surfaces, reducing performance.
10. Keep track of the components. When removing or replacing any part, be careful not to leave small parts, such as
screws, loose inside the computer.
Cleaning
Do not apply cleaner directly to the computer, use a soft clean cloth.
Do not use volatile (petroleum distillates) or abrasive cleaners on any part of the computer.
Power Safety
Warning
Before you undertake
any upgrade proce-
dures, make sure that
you have turned off the
power, and discon-
nected all peripherals
and cables (including
telephone lines). It is
advisable to also re-
move your battery in
order to prevent acci-
dentally turning the
machine on.
Disassembly
2 - 4 Disassembly Steps
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Disassembly Steps
The following table lists the disassembly steps, and on which page to find the related information. PLEASE PERFORM
THE DISASSEMBLY STEPS IN THE ORDER INDICATED.
To remove the Battery:
1. Remove the battery page 2 - 5
To remove the HDD:
2. Remove the HDD page 2 - 6
To remove the Optical Device:
2. Remove the Optical device page 2 - 8
To remove the System Memory:
2. Remove the system memory page 2 - 10
To remove the Inverter Board:
2. Remove the inverter board page 2 - 12
To remove and install a Processor:
2. Remove the processor page 2 - 13
To remove the Wireless LAN Module:
2. Remove the wireless LAN page 2 - 15
To remove the Bluetooth Module:
2. Remove the Bluetooth page 2 - 16
To remove the Keyboard:
2. Remove the keyboard page 2 - 17
To remove the Modem:
2. Remove the HDD page 2 - 6
3. Remove the system memory page 2 - 10
4. Remove the Optical device page 2 - 8
5. Remove the processor page 2 - 13
6. Remove the keyboard page 2 - 17
7. Remove the modem page 2 - 18
Disassembly
Removing the Battery 2 - 5
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Removing the Battery
1. Turn the computer off, and turn it over.
2. Slide the latch in the direction of the arrow.
3. Slide the latch in the direction of the arrow, and hold it in place.
4. Slide the battery in the direction of the arrow .
3. Battery
1
2
63 4
a.
3
b.
2
4
1
Figure 1
Battery Removal
a. Slide the latch and hold
in place.
b. Slide the battery in the di-
rection of the arrow.
Disassembly
2 - 6 Removing the Hard Disk Drive
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Removing the Hard Disk Drive
The hard disk drive can be taken out to accommodate other 2.5" serial (SATA) hard disk drives with a height of 9.5mm
(h). Follow your operating systems installation instructions, and install all necessary drivers and utilities (as outlined in
Chapter 4 of the Users Manual) when setting up a new hard disk.
Hard Disk Upgrade Process
1. Turn off the computer, and remove the battery (page 2 - 5).
2. Locate the hard disk bay cover and remove screw & .
Figure 2
HDD Assembly
Removal
a. Locate the HDD bay
cover and remove the
screw(s).
2 Screws
1 2
a.
HDD System Warning

New HDDs are blank. Before you begin make sure:
You have backed up any data you want to keep from your old HDD.
You have all the CD-ROMs and FDDs required to install your operating system and programs.
If you have access to the internet, download the latest application and hardware driver updates for the operating system you plan
to install. Copy these to a removable medium.
2
1
Note:
Only one model is pictured
here, however the compo-
nent locations are the same
for both models.
Disassembly
Removing the Hard Disk Drive 2 - 7
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3. Remove the hard disk bay cover .
4. Grip the tab and slide the hard disk in the direction of arrow .
5. Lift the hard disk out of the bay .
6. Remove the screw & and the adhesive cover from the hard disk .
7. Reverse the process to install a new hard disk (do not forget to replace all the screws and covers).
63
4
5
6 7 68 69
4
b.
c.
e.
5
6
d.
3
8
9
7
3. HDD Bay Cover

7. Adhesive Cover
8. HDD
2 Screws
Figure 3
HDD Assembly
Removal (contd.)
b. Remove the HDD bay
cover.
c. Grip the tab and slide the
HDD in the direction of
the arrow.
d. Lift the HDD assembly
out of the bay.
e. Remove the screw and
adhesive cover.
Disassembly
2 - 8 Removing the Optical (CD/DVD) Device
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Removing the Optical (CD/DVD) Device
2. M720T/M728T/M729T: (see over for M730T) Locate the component bay cover and remove screws - .
3. Carefully (a fan and cable are attached to the under side of the cover) lift up the bay cover.
4. Carefully disconnect the fan cable , and remove the cover .
5. Remove the screw at point , and use a screwdriver to carefully push out the optical device at point .
6. Insert the new device and carefully slide it into the computer (the device only fits one way. DO NOT FORCE IT; The
screw holes should line up).
7. Restart the computer to allow it to automatically detect the new device.
Figure 4
Optical Device
Removal
a. Remove the screws.
b. Disconnect the fan cable
and remove the cover.
c. Remove the screw.
d. Push the optical device
out off the computer at
point 8.
1 2 5
6 1
7 9 8
1. Component Bay Cover

9. Optical Device
5 Screws 6
2
4
3
c.
d.
M720T/M728T/M729T
9
1
1
7
8
a.
b.
5
Disassembly
Removing the Optical (CD/DVD) Device 2 - 9
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8. M730T: Locate the component bay cover and remove screws & .
10. Carefully disconnect the fan cable and remove the bay cover .
11. Remove the screw at point , and use a screwdriver to carefully push out the optical device at point .
12. Insert the new device and carefully slide it into the computer (the device only fits one way. DO NOT FORCE IT; The
screw holes should line up).
13. Restart the computer to allow it to automatically detect the new device.
1 2 5
6 1
7 9 8
1. HDD Bay Cover

8. Optical Device
4 Screws
3
4
2
6
7
g.
h.
M730T
9
1
e.
f.
5
1
8
Figure 5
Optical Device
Removal (contd.)
e. Remove the screws.
f. Disconnect the fan cable
and remove the cover.
g. Remove the screw.
h. Push the optical device
out off the computer at
point 8.
Disassembly
2 - 10 Removing the System Memory (RAM)
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Removing the System Memory (RAM)
The computer has two memory sockets for 200 pin Small Outline Dual In-line Memory Modules (SO-DIMM) supporting
DDR2 667/800MHz. The main memory can be expanded up to 4GB. The SO-DIMM modules supported are 1024MB,
and 2048MB and DDRII Modules. The total memory size is automatically detected by the POST routine once you turn
on your computer.
Memory Upgrade Process
1. Turn off the computer, remove the battery (page 2 - 5).
2. Locate the component bay cover , and remove screws - .
4. Carefully disconnect the fan cable , and remove the cover .
Figure 6
RAM Module
Removal
a. Remove the screws.
b. Remove the cover.
Contact Warning
Be careful not to touch
the metal pins on the
modules connecting
edge. Even the clean-
est hands have oils
which can attract parti-
cles, and degrade the
modules perfor-
mance.
1 2 5
6 1
1. Component Bay
Cover
3 Screws
2 5
3
a.
M720T/M728T/M729T
b.
1
M730T
6
1
Note:
for both models.
4
3
4
2
1
5
Disassembly
Removing the System Memory (RAM) 2 - 11
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5. Gently pull the two release latches ( & ) on the sides of the memory socket in the direction indicated by the
arrows (Figure 7c).
6. The RAM module(s) will pop-up (Figure 7d), and you can then remove it.
7. Pull the latches to release the second module if necessary.
8. Insert a new module holding it at about a 30 angle and fit the connectors firmly into the memory slot.
9. The modules pin alignment will allow it to only fit one way. Make sure the module is seated as far into the slot as it
will go. DO NOT FORCE the module; it should fit without much pressure.
10. Press the module in and down towards the mainboard until the slot levers click into place to secure the module.
11. Replace the bay cover and screws (make sure you reconnect the fan cable before screwing down the bay
cover).
12. Restart the computer to allow the BIOS to register the new memory configuration as it starts up.
7 8
d.
9
7
8
c.
Figure 7
RAM Module
Removal (contd.)
c. Pull the release
latch(es).
d. Remove the module(s).
9. RAM Module(s)
9
e.
Note:
for both models.
Disassembly
2 - 12 Removing the Inverter Board
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Removing the Inverter Board
2. Remove any rubber covers, screws - (Figure 8a), then run your finger around the middle of the frame to
carefully unsnap the LCD front panel module from the back.
3. Discharge the remaining system power (see Inverter Power Warning below).
4. Remove screws - (Figure 8b) from the inverter, and carefully lift the inverter board up slightly.
5. Disconnect cables & (Figure 8c) from the inverter, then remove the inverter (Figure 8d) from the top
case assembly.
Figure 8
Inverter Board
Removal
a. Remove the 6 screws
and unsnap the LCD
front panel module from
the back.
b. Remove the screw and
discharge the remaining
power from the inverter
board and lift the board
up slightly.
c. Disconnect the cables
from the inverter.
d. Remove the inverter.
1 6
7
8 9
10 11 12
7. LCD Front Panel

12. Inverter Board
8 Screws
a. b.
Inverter Power Warning

In order to prevent a short circuit when removing
the inverter it is necessary to discharge any re-
maining system power. To do so, press the com-
puters power button for a few seconds before
disconnecting the inverter cable.
1
2 5
3
4
6
c.
d.
8
7
9
12
10 11
Disassembly
Removing the Processor 2 - 13
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Removing the Processor
1. Turn off the computer, and remove the battery (page 2 - 5) and the CPU/RAM bay cover (page 2 - 10).
2. The CPU heat sink will be visible at point on the mainboard.
3. Loosen screws - from the heat sink in the order indicated.
4. Carefully lift up the heat sink (Figure c) off the computer.
1
2 4
5
Figure 9
Processor Removal
a. Remove the cover and
Iocate the heat sink.
b. Remove the 3 screws in
the order indicated.
c. Remove the heat sink.
5. Heat Sink
b.
5
1
4
a.
c.
3
2
Note:
for both models.
Disassembly
2 - 14 Removing the Processor
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5. Turn the release latch towards the unlock symbol , to release the CPU (Figure d).
6. Carefully (it may be hot) lift the CPU up out of the socket (Figure e).
7. Reverse the process to install a new CPU.
8. When re-inserting the CPU, pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE IT!).
6
7
Figure 10
Processor Removal
Sequence
d. Turn the release latch to
unlock the CPU.
e. Lift the CPU out of the
socket.
d.
7
e.
Caution
The heat sink, and CPU area in
general, contains parts which are
subject to high temperatures. Allow
the area time to cool before remov-
ing these parts.
Unlock Lock
6
6
7. CPU
Disassembly
Removing the Wireless LAN Module 2 - 15
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Removing the Wireless LAN Module
1. Turn off the computer, remove the battery (page 2 - 5) and the component bay cover (page 2 - 10).
2. The Wireless LAN module will be visible at point on the mainboard.
3. Carefully disconnect cables - , then remove screw from the module socket.
4. The Wireless LAN module will pop-up.
5. Lift the Wireless LAN module (Figure 11d) up and off the computer.
Figure 11
Wireless LAN
Module Removal
a. Remove the cover.
b. Disconnect the cables
and remove the screw.
c. The WLAN module will
pop up.
d. Lift the WLAN module
out.
Note: Make sure you
reconnect the antenna
cable to 1 + 2
socket (Figure b).
1
2 3 4
5
5
b.
c.
a.
d.
2
3
1
Note:
Only one model is pic-
tured here, however
the component loca-
tions are the same for
both models.
4
5. WLAN Module.
1 Screw
Disassembly
2 - 16 Removing the Bluetooth Module
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Removing the Bluetooth Module
1. Turn off the computer, remove the battery (page 2 - 5).
2. The Bluetooth module will be visible at point on the mainboard.
3. Remove screw and carefully disconnect the cable and separate the module from the connector .
4. Lift the Bluetooth module up and off the computer.
1
2 3 4
5
Figure 12
Bluetooth Removal
a. Remove the cover and
locate the Bluetooth
module.
b. Remove the screw and
disconnect the cable and
seperate the connector.
c. Lift the Bluetooth module
out.
a.
b.
3
4
1
2
c.
5 Note:
Only one model is pic-
tured here, however
the component loca-
tions are the same for
both models.
5. Bluetooth Module
1 Screw
Disassembly
Removing the Keyboard 2 - 17
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Removing the Keyboard
2. Press the three keyboard latches at the top of the keyboard to elevate the keyboard from its normal position (you
may need to use a small screwdriver to do this).
3. Carefully lift the keyboard up, being careful not to bend the keyboard ribbon cable (Figure 13b).
4. Disconnect the keyboard ribbon cable from the locking collar socket .
5. Carefully lift up the keyboard (Figure 13c) off the computer.
4 5
Figure 13
Keyboard Removal
a. Press the three latches
to release the keyboard.
b. Lift the keyboard up and
disconnect the cable
from the locking collar.
c. Remove the keyboard.
Re-Inserting the Key-

board
When re-inserting the
keyboard firstly align
the three keyboard
tabs at the bottom of
the keyboard with the
slots in the case.
6. Keyboard Module.
6
a.
b.
5
4
6
Keyboard Tabs
c.
1
3 2
6
Disassembly
2 - 18 Removing the Modem
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Removing the Modem
1. Turn off the computer, remove the battery (page 2 - 5), HDD (page 2 - 6), component bay cover (page 2 - 10),
optical device (page 2 - 8), CPU (page 2 - 13), bluetooth (page 2 - 16) and keyboard (page 2 - 17).
2. Disconnect the connectors - from under the keyboard and turn it over.
3. Remove screws - from the rear of the computer.
4. Remove the screws - from the bottom case and disconnect the connectors - on the mainboard.
5. Carefully lift up the top case off the computer.
1 3
4 5
a.
b.
1
3
2
5
4
Figure 14
Modem Removal
a. Disconnect the connec-
tors from under the key-
board.
b. Remove the screws.
c. Remove the screws and
disconnect the connec-
tors from the main-
board.
d. Remove the top case.
24. Top Case

18 Screws
6 21 22 23
24
c.
9
7 6
8
10 11
13
12
14
15
16
23
17
20
18
19
21
22
d.
24
Disassembly
Removing the Modem 2 - 19
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6. Remove screws - and disconnect the connectors - from the mainboard.
7. Separate the bottom case from the mainboard and turn it over.
8. Remove the screws - and disconnect the connector from the modem.
9. Lift the modem up off the socket .
25 27 28 30
Figure 15
Modem Removal
Sequence
e. Remove the screws and
and disconnect the con-
nectors.
f. Separate the bottom
case from the main-
board.
g. Remove the screws and
and disconnect the con-
nector.
h. Lift the modem up off
the socket.
31. Bottom Case

32. Main Board
37. Modem
5 Screws
31 32
33 34 35
37 36
e.
h.
g.
32
31
28
29
25
30
26
27
33
34
35
37
36
f.
Disassembly
2 - 20
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Part Lists
A - 1
A
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Appendix A: Part Lists
This appendix breaks down the M720T/M728T/M729T/M730T series notebooks construction into a series of illustra-
tions. The component part numbers are indicated in the tables opposite the drawings.
Note: This section indicates the manufacturers part numbers. Your organization may use a different system, so be sure
to cross-check any relevant documentation.
Note: Some assemblies may have parts in common (especially screws). However, the part lists DO NOT indicate the
total number of duplicated parts used.
Note: Be sure to check any update notices. The parts shown in these illustrations are appropriate for the system at the
time of publication. Over the product life, some parts may be improved or re-configured, resulting in new part numbers.
Part Lists
A - 2 Part List Illustration Location
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Part List Illustration Location
The following table indicates where to find the appropriate part list illustration.
Table A- 1
Part List Illustration
Location
Parts M720T M728T M729T M730T
Top with Fingerprint page A - 3 page A - 10 page A - 17 page A - 24
Top without Fingerprint page A - 4 page A - 11 page A - 18 page A - 25
Bottom page A - 5 page A - 12 page A - 19 page A - 26
LCD page A - 6 page A - 13 page A - 20 page A - 27
HDD page A - 7 page A - 14 page A - 21 page A - 28
COMBO page A - 8 page A - 15 page A - 22 page A - 29
DVD-Dual Drive page A - 9 page A - 16 page A - 23 page A - 30
Part Lists
Top with Fingerprint (M720T) A - 3
A
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Top with Fingerprint (M720T)

Figure A - 1
Top with
Fingerprint
(M720T)
Part Lists
A - 4 Top without Fingerprint (M720T)
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Top without Fingerprint (M720T)

Figure A - 2
Top without
Fingerprint
(M720T)
Part Lists
Bottom (M720T) A - 5
A
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Bottom (M720T)
Figure A - 3
Bottom
(M720T)
Part Lists
A - 6 LCD (M720T)
A
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LCD (M720T)

Figure A - 4
LCD
(M720T)
Part Lists
HDD (M720T) A - 7
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HDD (M720T)
()()
Figure A - 5
HDD
(M720T)
Part Lists
A - 8 COMBO (M720T)
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COMBO (M720T)
()
Figure A - 6
COMBO
(M720T)
Part Lists
DVD-Dual Drive (M720T) A - 9
A
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DVD-Dual Drive (M720T)
()
Figure A - 7
DVD-Dual Drive
(M720T)
Part Lists
A - 10 Top with Fingerprint (M728T)
A
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P
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Figure A - 8
Top with
Fingerprint
(M728T)
Part Lists
Top without Fingerprint (M728T) A - 11
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Figure A - 9
Top without
Fingerprint
(M728T)
Part Lists
A - 12 Bottom (M728T)
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Bottom (M728T)
Figure A - 10
Bottom
(M728T)
Part Lists
LCD (M728T) A - 13
A
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t
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LCD (M728T)

Figure A - 11
LCD
(M728T)
Part Lists
A - 14 HDD (M728T)
A
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P
a
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t

L
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t
s
HDD (M728T)
()()
Figure A - 12
HDD
(M728T)
Part Lists
COMBO (M728T) A - 15
A
.
P
a
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t

L
i
s
t
s
COMBO (M728T)
()
Figure A - 13
COMBO
(M728T)
Part Lists
A - 16 DVD-Dual Drive (M728T)
A
.
P
a
r
t

L
i
s
t
s
()
Figure A - 14
DVD-Dual Drive
(M728T)
Part Lists
Top with Fingerprint (M729T) A - 17
A
.
P
a
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t

L
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t
s

Figure A - 15
Top with
Fingerprint
(M729T)
Part Lists
A - 18 Top without Fingerprint (M729T)
A
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P
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L
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Figure A - 16
Top without
Fingerprint
(M729T)
Part Lists
Bottom (M729T) A - 19
A
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P
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L
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t
s
Bottom (M729T)
Figure A - 17
Bottom
(M729T)
Part Lists
A - 20 LCD (M729T)
A
.
P
a
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t

L
i
s
t
s
LCD (M729T)

(
Figure A - 18
LCD
(M729T)
Part Lists
HDD (M729T) A - 21
A
.
P
a
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t

L
i
s
t
s
HDD (M729T)
()()
Figure A - 19
HDD
(M729T)
Part Lists
A - 22 COMBO (M729T)
A
.
P
a
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t

L
i
s
t
s
COMBO (M729T)
()
Figure A - 20
COMBO
(M729T)
Part Lists
DVD-Dual Drive (M729T) A - 23
A
.
P
a
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t

L
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s
t
s
()
Figure A - 21
DVD-Dual Drive
(M729T)
Part Lists
A - 24 Top with Fingerprint (M730T)
A
.
P
a
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t

L
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s
t
s

Figure A - 22
Top with
Fingerprint
(M730T)
Part Lists
Top without Fingerprint (M730T) A - 25
A
.
P
a
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t

L
i
s
t
s

Figure A - 23
Top without
Fingerprint
(M730T)
Part Lists
A - 26 Bottom (M730T)
A
.
P
a
r
t

L
i
s
t
s
Bottom (M730T)
Figure A - 24
Bottom
(M730T)
Part Lists
LCD (M730T) A - 27
A
.
P
a
r
t

L
i
s
t
s
LCD (M730T)

Figure A - 25
LCD
(M730T)
Part Lists
A - 28 HDD (M730T)
A
.
P
a
r
t

L
i
s
t
s
HDD (M730T)
()()
Figure A - 26
HDD
(M730T)
Part Lists
COMBO (M730T) A - 29
A
.
P
a
r
t

L
i
s
t
s
COMBO (M730T)
Figure A - 27
COMBO
(M730T)
Part Lists
A - 30 DVD-Dual Drive (M730T)
A
.
P
a
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t

L
i
s
t
s
Figure A - 28
DVD-Dual Drive
(M730T)
Schematic Diagrams
B - 1
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Appendix B: Schematic Diagrams
This appendix has circuit diagrams of the M720T/M728T/M729T/M730T notebooks PCBs. The following table indi-
cates where to find the appropriate schematic diagram.
Diagram - Page Diagram - Page Diagram - Page
System Block Diagram - Page B - 2 ICH9-M 3/5 - GPIO, PWR Management - Page B - 16 Power 1.5VS, 1.05VS, 3.3V, 5V - Page B - 30
Intel Penryn (Socket-P) 1/2 - Page B - 3 ICH9-M 4/5 - Power - Page B - 17 Power 1.8V, 0.9VSM - Page B - 31
Intel Penryn (Socket-P) 2/2 - Page B - 4 ICH9-M 5/5 - GND - Page B - 18 Power VCORE - Page B - 32
Cantiga 1/6 - Host - Page B - 5 Clock Generator - Page B - 19 Power AC-IN, Charger - Page B - 33
Cantiga 2/6 - VGA, CRT - Page B - 6 Multi I/O, ODD, CCD, BT, TPM - Page B - 20 Multi I/O Board 1/2 - Page B - 34
Cantiga 3/6 - DDR - Page B - 7 New Card, Mini PCIE - Page B - 21 Multi I/O Board 2/2 - Page B - 35
Cantiga 4/6 - Power - Page B - 8 LED, FAN, TP, FP, USB - Page B - 22 Finger Printer Board - Page B - 36
Cantiga 5/6 - Power - Page B - 9 JMB385 Card Reader - Page B - 23 Click Board - Page B - 37
Cantiga 6/6 - GND - Page B - 10 PCI-E LAN RTL8111C - Page B - 24 M730T ODD Bridge Board - Page B - 38
DDRII CHANNEL A - Page B - 11 Audio Codec ALC662 - Page B - 25 M730T Audio Board - Page B - 39
DDRII CHANNEL B - Page B - 12 Audio AMP2056 - Page B - 26 Power Sequence Diagram - Page B - 40
Panel, Inverter, CRT - Page B - 13 KBC-ITE IT8512E - Page B - 27 Power Sequence v3.0 - Page B - 41
ICH9-M 1/5 - SATA - Page B - 14 System Power, LED BKLT - Page B - 28
ICH9-M 2/5 - PCIE, PCI, USB - Page B - 15 Power VDD3, VDD5 - Page B - 29
Table B - 1
Schematic
Diagrams
Version Note
The schematic dia-
grams in this chapter
are based upon ver-
sion 6-7P-M72T6-005.
If your mainboard (or
other boards) are a lat-
er version, please
check with the Service
Center for updated di-
agrams (if required).
Schematic Diagrams
B - 2 System Block Diagram
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System Block Diagram
Sheet 1 of 40
System Block
Diagram

24 MHz
100 MHz
33 MHz
S PK _R, R J- 11, L ED
PCI
128pins LQFP
IT 85 12E /E X
0. 1" ~1 3
M730T ODD Board
Aza li a C od ec
LPC
Multi I/O
Board
128pins LQFP
14*14*1. 6mm
0 .5 "~ 11"
( USB 5)
M720T
1.05VM,1.5VS
533/667/800 MHz
MD C
Co nn ec tor
(U SB 11)
9*9*1. 6mm
1 "~ 16 "
51 2K b
INT SPK L
667/800/1066 MHz
TP M1 .2
AL C66 2
Azalia
SATA I/II 3.0Gb/s
12 MHz
<1 2"
< 8"
M730T
C ol ck Ge ne rat or
480 Mbps
L ID , H OT K EY, U SB , 3 G
INT MIC
EC S PI RO M
1" ~16 "
CR T Con ne ct or
M720T/M730T Click
Board
North Bridge
USB2.0
A PA2 05 6A
Sm ar t
Ba tt ery
S ma rt
F AN
478pins uFCPGA
1329 FCBGA
Multi I/O
Board
3G Ca rd /
Ra bos on
<1 2"
U SB0
SPDIF
OUT
AC-IN,Charger
<1 2"
PCIe
SO-DIMM1
LAN
32.768 KHz
To uc h Pad
Co nn ec tor Cantiga GMCH
Re alt ek
Multi I/O Board
16 Mb
VCORE
SATA I/II 3.0Gb/s
14*14*1. 4mm
DMI
AMP.
Th erm al
Se nso r
INT SPK R
I TE
Min i ca rd
Intel Penryn
S oc ket
9. 8*6.4*1.2mm
14.318 MHz
VDD3,VDD5
SO-DIMM0
2 5
M Hz
(U SB 7)
FSB
M73 0T
LED B AC KLI GH T
DRI VE R
Ca rd Re ad er
EC
SA TA
HD D
DDR2
810602-1703
S oc ke t
HP
OUT
System Power
Ne w Car d
32.768KHz
X4
RJ-11
INT K /B
REALTEK
M730T Audio Board
South Bridge
( US B9)
7 IN1
33 MHz
S PI RO M
RJ-45
ANP AC
CLEVO M720T System Block Diagram
IC S9 LPR 36 3EG LF
Memory Termination
EC SMBUS
64pins TSSOP
31*31*2.5mm
( US B2 )
Bl ue too th
SO CKE T
SA TA
OD D
C CD
Soket P
RTL8111C
28pins TSSOP
DDR2
17. 1*8. 1*1. 2mm
25*21*2.05mm
676 mBGA
US B3
MIC
IN
ICH9-M
INT SPK R < =8 "
64pins QFN
Sy na pt ic
Min i PC Ie
US B1
ID T
System Memory
< 15 "
FINGER PRINTER BOARD
JMB385
Azalia
MDC
Module
M720T
Processor
0 .5" ~5 .5 "
9*9*1.0mm
1.8V,0.9V
Multi I/O
Board
Fin ge rP rin t
LC D Con ne ct or,
In ve rte r
JMicron
48pins LQFP
( US B4)
WiF i/ Wi Max
Ech o Pe ak
aS C75 25
INT SPK L
Schematic Diagrams
Intel Penryn (Socket-P) 1/2 B - 3
B
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Intel Penryn (Socket-P) 1/2
Sheet 2 of 40
Intel Penryn
(Socket-P) 1/2

H_ B NR # [ 4 ]
R5 1 K _ 1 %_ 0 4
H _A # 4
H _D # 63
V _ TH RM
T R 1
*T S M 1A 1 0 3 H3 4D 3R
CL K _ CP U_ B C LK # [ 18 ]
H _ DS T B N# 0 [ 4 ]
H _N MI [ 1 3 ]
C P U_ B S E L 1 [ 4, 1 8 ]
H_ D# 2 7
H_ DE F E R # [ 4 ]
H _A # 2 6
R4
2 K _1 % _0 4
H _D S T B N# 2 [ 4 ]
T HE R M_ RS T # [ 2 6 ]
H_ D# 2 5
H _A # 9
H _A # 1 8
H _ A #[ 3 5 : 3 ] [ 4 ]
H_ DB S Y # [ 4 ]
H_ HI T M# [ 4]
H _A # 7
H _A # 3 4
H _P RE Q#
H_ D# 2 8
C3 3 7
*0 . 0 1U _ 16 V _ X 7R _0 4
1. 0 5 V S
C 3 36
1 U _6 . 3 V _ 04
H_ TH E RM DA
H_ D# 2 1
H_ D# 6
H_ D# 1
H _D # 41
H _D # 44
H_ RS # 2 [ 4 ]
H _D # 59
H_ D# 1 9
H _A # 1 0
C OM P 2
H_ D# 2 3
R8
5 4. 9 _ 1 %_ 0 4
R2 0 0
*1 0 0K _ 0 4
H_ D# 2 6
P M _T HR M# [ 1 5 ]
C OM P 2
H _D # 33
S M C_ CP U _T HE RM [ 26 ]
H_ D# 3 1
H_ D# 2 9
C7
*1 U_ 6 . 3V _ X 5 R_ 06
? ADT7421 Colay
P S I # [ 31 ]
H _D # 57
R2 1 1
* 33 0 K _ 04
H_ RS # 1 [ 4 ]
H _A # 2 5
H _R E Q# 2
R 7 54 . 9 _ 1% _ 04
H_ DI N V # 1 [ 4]
R 19 7 56 _ 0 4
H_ A DS # [ 4]
H _D I NV # 3 [ 4 ]
H _A # 1 2
H_ D# 3 0
H _R E Q# 4
H _D # 53
H _A # 1 4
R 17 3 54 . 9 _ 1% _ 04
R2 09
*1 00 K _ 0 4
A
D
D
R
G
R
O
U
P
_
0
A
D
D
R
G
R
O
U
P
_
1
C
O
N
T
R
O
L
X
D
P
/IT
P
S
IG
N
A
L
S
HCLK
THERMAL
R
E
S
E
R
V
E
D
I
C
H
U9 A
MOL E X _ 47 4 30 - 6 2 15
N3
P 5
P 2
L2
P 4
P 1
R1
Y 2
U5
R3
W 6
U4
Y 5
U1
R4
T5
T3
W 2
W 5
Y 4
J4
U2
V 4
M4
N5
T2
V 3
B 2
D2
D 22
L5
L4
K 5
M3
N2
J1
A 6
H1
M1
V 1
D3
A 2 2
A 2 1
E 2
A D 4
A D 3
A D 1
A C 4
G5
F 1
C2 0
E 1
H5
F 2 1
A 5
G6
E 4
D2 0
C4
B 3
C6
B 4
H4
A C 2
A C 1
D2 1
K 3
H2
K 2
J3
L1
C1
F 3
F 4
G3
A 3
D5
A C 5
A A 6
A B 3
C7
A 2 4
B 2 5
A B 5
G2
A B 6
W 3
A A 4
A B 2
A A 3
F 6
A [ 1 0 ] #
A [ 1 1 ] #
A [ 1 2 ] #
A [ 1 3 ] #
A [ 1 4 ] #
A [ 1 5 ] #
A [ 1 6 ] #
A [ 1 7 ] #
A [ 1 8 ] #
A [ 1 9 ] #
A [ 2 0 ] #
A [ 2 1 ] #
A [ 2 2 ] #
A [ 2 3 ] #
A [ 2 4 ] #
A [ 2 5 ] #
A [ 2 6 ] #
A [ 2 7 ] #
A [ 2 8 ] #
A [ 2 9 ] #
A [ 3 ] #
A [ 3 0 ] #
A [ 3 1 ] #
R S V D[ 0 1 ]
R S V D[ 0 2 ]
R S V D[ 0 3 ]
R S V D[ 0 4 ]
R S V D[ 0 5 ]
R S V D[ 0 6 ]
R S V D[ 0 7 ]
A [ 4 ] #
A [ 5 ] #
A [ 6 ] #
A [ 7 ] #
A [ 8 ] #
A [ 9 ] #
A 2 0 M#
A DS #
A D S TB [ 0] #
A D S TB [ 1] #
R S V D[ 0 8 ]
B CL K [ 0 ]
B CL K [ 1 ]
B N R#
B P M[ 0 ] #
B P M[ 1 ] #
B P M[ 2 ] #
B P M[ 3 ] #
B P RI #
B R 0#
D B R#
D B S Y #
D E F E R#
DRD Y #
F E R R#
HI T#
HI T M#
I E R R#
I G NNE #
I NI T#
L I NT 0
L I NT 1
LO CK #
P RD Y #
P R E Q#
P ROC HO T#
R E Q[ 0 ] #
R E Q[ 1 ] #
R E Q[ 2 ] #
R E Q[ 3 ] #
R E Q[ 4 ] #
RE S E T#
RS [ 0 ] #
RS [ 1 ] #
RS [ 2 ] #
S M I #
S T P CL K #
TC K
T DI
T D O
T HE R MT RI P #
TH E RMD A
T HE R MD C
TM S
T RD Y #
T RS T#
A [ 3 2 ] #
A [ 3 3 ] #
A [ 3 4 ] #
A [ 3 5 ] #
R S V D[ 0 9 ]
H _A # 3 1
H_ RS # 0 [ 4 ]
H _D # 34
R1 95 *1 0 mi l _s h o r t
V _T H RM
S M D_ CP U _T HE RM [ 26 ]
P M_ T HRM T RI P # [ 5 , 1 3, 2 8 ]
COMP0, COMP2: 0.5" Max, Zo=27.4 Ohms
COMP1, COMP3: 0.5" Max, Zo=55 Ohms
Best estimate is 18 mils wide trace for outer
layers and 14 mils wide trace if on internal
layers.
Put it at central of
CPU socket
H_ HI T # [ 4 ]
H _ DP RS T P # [ 5 , 1 3 , 31 ]
CPU ONLY SUPPORT TO 35W
CL K _ CP U_ B C LK [ 1 8]
H _D S TB N# 1 [ 4 ]
H _D # 50
H _A # 5
H _D # 47
H _D # 42
R1 9 3 * 0_ 0 4
3 . 3 V
3. 3 V [ 1 2. . 1 7 , 1 9, 2 0 , 23 , 2 9 , 30 ]
H _R E Q# 3
C OM P 3
H_ I NI T # [ 1 3 ]
H_ D# [ 6 3: 0 ] [ 4 ]
H _D # 38
H _A # 1 3
H_ D# 2 2
R 17 1 64 9 _ 1% _ 06
Q 18 *A O 3 40 9
G
D S
Layout Note:
H _P R E Q#
H_ D# 1 0
U1 3
aS C 75 2 5
1
2
3
4
5
6
7
8
V D D
D +
D -
T HE R M
G ND
A L E R T
S DA TA
S C LK
H _A # 1 6
H _A # 2 8
H_ D# 4
H_ D# 1 1
H _D # 55
H_ T RDY # [ 4 ]
H_ DS T B P # 1 [ 4]
H _D # 52
H _P R OC HOT #
H _D # 51
R6
2 7. 4 _ 1 %_ 0 4
1 . 0 5V S [ 3 . . 5 , 7 , 8, 1 3 , 16 , 2 9 ]
CP U_ B S E L 0
C 3 35
1 0 0 0P _ 5 0 V _X 7 R_ 0 4
H_ D# 1 7
H_ T HE RM DC
H_ B P RI # [ 4]
H _T DI
H _D # 61
10mils
H _T M S
CP U_ B S E L 1
H _C P UR S T#
Route H_THERMDA and
H_THERMDC on same layer.
10 mil trace on 10 mil spacing.
1. 0 5 V S
H _A # 6
H _A # 1 7
H _A # 3 2
H _T CK
C OM P 0
H _A # 2 9
H _I E RR#
T HE R M_ A L E RT # [ 2 6]
H_ A D S TB # 1 [ 4 ]
R2 1 0 *1 0 m i l _ sh o rt
H _D # 45
R1 8 2
5 4. 9 _ 1 %_ 0 4
12mils
H _I N TR [ 1 3 ]
Layout Note:
H_ D# 3
H _A # 1 1
H_ D# 1 2
C OM P 1
H_ CP U RS T # [ 4 ]
C OM P 0
H _D # 46
H_ D# 1 6
H _T D I
H_ D# 2 0
H_ P R OCH OT #
H _D # 48
H_ D# 2 4
0.5" max, Zo= 55 Ohms
H _A # 2 3
H _D # 54
Near to Thermal
IC
H _D # 62
H _ DP S L P # [ 1 3]
R1 8 3
2 7. 4 _ 1 %_ 0 4
C OM P 3
H _D # 58
H _D # 32
H_ T HE R MDC _ R
H _D I NV # 2 [ 4 ]
H _D S T B P #3 [ 4]
R1 96 *1 0 mi l _s h o r t
H_ S T P CL K # [ 1 3 ]
C OM P 1
CP U_ B S E L 2
H _R E Q# 1
H _A # 2 1
H _A # 3 0
H _T RS T#
R1 9 4
1 0K _ 0 4
H _D # 60
H _D # 56
D 15
A S D7 5 1V
A C
CP U TE M P [ 2 6 ]
H_ D# 8
H _ I GNN E # [ 13 ]
H _A # 1 5
H_ D# 1 8
H _D S T B P #2 [ 4]
H _A # 8
H _T R S T#
H_ D# 2
H_ RE Q #[ 4 : 0 ] [ 4]
H _I E R R#
H_ D# 5
H _D # 39
R 19 *5 1 _1 % _0 4
H_ DR DY # [ 4]
H _A # 2 4
H _D # 49
H _ A #[ 3 5 : 3 ] [ 4 ]
H _R E Q# 0
H_ D# 1 5
R 19 8 54 . 9 _ 1% _ 04
Q1 9
*2 N7 0 02 W
G
D
S
Layout note:
H_ TH E RM DC
H _A # 1 9
H_ D# 7
H _A # 2 2
Layout Note:
H _A 2 0 M# [ 1 3 ]
D
A
T
A
G
R
P
0
D
A
T
A
G
R
P
1
D
A
T
A
G
R
P
2
D
A
T
A
G
R
P
3
MISC
U9 B
MOL E X _ 47 4 30 -6 2 15
R2 6
U2 6
A A 1
Y 1
E 2 2
F 2 4
J 2 4
J 2 3
H 2 2
F 2 6
K 2 2
H 2 3
N 2 2
K 2 5
P 2 6
R 2 3
E 2 6
L 2 3
M 2 4
L 2 2
M 2 3
P 2 5
P 2 3
P 2 2
T 2 4
R 2 4
L 2 5
G 2 2
T 2 5
N 2 5
Y 2 2
A B 2 4
V 2 4
V 2 6
V 2 3
T 22
U2 5
U2 3
F 2 3
Y 2 5
W 2 2
Y 2 3
W 2 4
W 2 5
A A 2 3
A A 2 4
A B 2 5
A E 2 4
A D2 4
G 2 5
A A 2 1
A B 2 2
A B 2 1
A C2 6
A D2 0
A E 2 2
A F 2 3
A C2 5
A E 2 1
A D2 1
E 2 5
A C2 2
A D2 3
A F 2 2
A C2 3
E 2 3
K 2 4
G 2 4
A F 1
H 2 5
N 2 4
U2 2
A C2 0
E 5
B 5
D2 4
J 2 6
L 2 6
Y 2 6
A E 2 5
H 2 6
M 2 6
A A 2 6
A F 2 4
A D 2 6
A E 6
D6
D7
C 2 4
B 2 2
B 2 3
C 2 1
D 2 5
A F 2 6
A 2 6
C 2 3
C 3
CO MP [ 0 ]
CO MP [ 1 ]
CO MP [ 2 ]
CO MP [ 3 ]
D [ 0 ] #
D [ 1 ] #
D [ 1 0] #
D [ 1 1] #
D [ 1 2] #
D [ 1 3] #
D [ 1 4] #
D [ 1 5] #
D [ 1 6] #
D [ 1 7] #
D [ 1 8] #
D [ 1 9] #
D [ 2 ] #
D [ 2 0] #
D [ 2 1] #
D [ 2 2] #
D [ 2 3] #
D [ 2 4] #
D [ 2 5] #
D [ 2 6] #
D [ 2 7] #
D [ 2 8] #
D [ 2 9] #
D [ 3 ] #
D [ 3 0] #
D [ 3 1] #
D [ 32 ] #
D [ 33 ] #
D [ 34 ] #
D [ 35 ] #
D [ 36 ] #
D [ 37 ] #
D [ 38 ] #
D [ 39 ] #
D [ 4 ] #
D [ 40 ] #
D [ 41 ] #
D [ 42 ] #
D [ 43 ] #
D [ 44 ] #
D [ 45 ] #
D [ 46 ] #
D [ 47 ] #
D [ 48 ] #
D [ 49 ] #
D [ 5 ] #
D [ 50 ] #
D [ 51 ] #
D [ 52 ] #
D [ 53 ] #
D [ 54 ] #
D [ 55 ] #
D [ 56 ] #
D [ 57 ] #
D [ 58 ] #
D [ 59 ] #
D [ 6 ] #
D [ 60 ] #
D [ 61 ] #
D [ 62 ] #
D [ 63 ] #
D [ 7 ] #
D [ 8 ] #
D [ 9 ] #
T E S T 5
D I NV [ 0 ] #
D I NV [ 1 ] #
DI NV [ 2 ] #
DI NV [ 3 ] #
DP RS T P #
DP S L P #
D P W R#
D S T B N[ 0 ] #
D S T B N[ 1 ] #
DS T B N[ 2 ] #
DS T B N[ 3 ] #
D S T B P [ 0] #
D S T B P [ 1] #
D S TB P [ 2 ] #
D S TB P [ 3 ] #
G TL R E F
P S I #
P W RG OO D
S L P #
T E S T 3
B S E L[ 0 ]
B S E L[ 1 ]
B S E L[ 2 ]
T E S T 2
T E S T 4
T E S T 6
T E S T 1
T E S T 7
H_ D# [ 6 3: 0 ] [ 4 ]
H_ T HE RM DA
R1 9 2 *1 0 mi l _s h o rt
H _D # [ 63 : 0 ] [ 4 ]
H _ P W RGD [ 1 3 ]
H_ A D S TB # 0 [ 4 ]
H_ L OCK # [ 4]
Layout Note:
H _A # 3 3
H _A # 2 7
H _T MS
C P U_ B S E L 2 [ 4, 1 8 ]
H _A # 3 5
H _D # 36
H_ B RE Q # [ 4 ]
H _D S T B N# 3 [ 4 ]
H _A # 3
R 18 1 54 . 9 _ 1% _ 04
H _ CP US L P # [ 4 ]
H _D # 40
C P U_ GT L RE F
H_ F E RR # [ 1 3]
H _D I NV # 0 [ 4 ]
H_ D# 9
H _D # 43
R 17 4 54 . 9 _ 1% _ 04
H _D S TB P #0 [ 4 ]
H_ D# 1 4
H _S M I # [ 1 3 ]
H _D # [ 63 : 0 ] [ 4 ]
H_ D# 0
C P U_ B S E L 0 [ 4, 1 8 ]
H _ DP W R# [ 4]
H _D # 35
H _D # 37
H_ D# 1 3
CPU_GRFE=0.7V
H _A # 2 0
H _T C K
H_ T HE R MDA _ R
H _C P UR S T#
C8
0. 0 1 U_ 1 6V _ X 7R _ 04
Schematic Diagrams
B - 4 Intel Penryn (Socket-P) 2/2
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Intel Penryn (Socket-P) 2/2

C 3 11
0 . 1 U_ 1 0 V _ X 7 R_ 0 4
C 3 01
1 U _6 . 3 V _ 0 4
C 3 0 9
0 . 1 U _ 10 V _X 7 R _0 4
C 28 3
1 0 U_ 6 . 3 V _ X 5 R_ 0 8
H _V I D4 [ 3 1 ]
C3 3 0
22 U _ 6 . 3V _ X5 R _ 08
C2 9 6
1U _ 6 . 3 V _ 0 4
1 . 5 V S [ 8 , 13 , 1 4 , 1 6 , 1 9 , 2 0, 29 ]
V CO R E
C3 3 2
1 U_ 6 . 3 V _ 0 4
1 . 05 V S
C 31
0 . 1 U_ 1 0 V _ X 7 R_ 0 4
C 3 8
2 2 U_ 6 . 3 V _ X 5 R_ 0 8
C2 9 9
0. 01 U _ 16 V _X 7 R _0 4
1 . 0 5 V S
H _V I D3 [ 3 1 ]
C P U_ V S S S E N S E [ 3 1 ]
C 3 0 8
* 0 . 1 U_ 1 0 V _ X 7 R_ 0 4
C 3 22
2 2 U_ 6 . 3 V _ X 5 R_ 0 8
C2 9 1
0 . 0 1U _ 1 6 V _ X7 R _ 0 4
C 32 7
1 0 U_ 6 . 3 V _ X 5 R_ 0 8
V C OR E [ 31 ]
C 3 2 1
1 0 U _ 6. 3 V _X 5 R _0 8
C3 2 3
10 U _ 6 . 3V _ X5 R _ 08
C 2 7 9
0 . 1 U _1 0 V _ X 7 R_ 0 4
C 3 0 5
1 U _ 6 . 3V _ 04
C 3 34
1 U _6 . 3 V _ 0 4
C 3 1 6
0 . 1 U _1 0 V _ X 7 R_ 0 4
U9 C
MO L E X _4 7 4 3 0 - 6 21 5
.
A 7
A 9
A 1 0
A 1 2
A 1 3
A 1 5
A 1 7
A 1 8
A 2 0
B 7
B 9
B 1 0
B 1 2
B 1 4
B 1 5
B 1 7
B 1 8
B 2 0
C9
C1 0
C1 2
C1 3
C1 5
C1 7
C1 8
D9
D1 0
D1 2
D1 4
D1 5
D1 7
D1 8
E 7
E 9
E 1 0
E 1 2
E 1 3
E 1 5
E 1 7
E 1 8
E 2 0
F 7
F 9
F 1 0
F 1 2
F 1 4
F 1 5
F 1 7
F 1 8
F 2 0
A A 7
A A 9
A A 1 0
A A 1 2
A A 1 3
A A 1 5
A A 1 7
A A 1 8
A A 2 0
A B 9
A C1 0
A B 1 0
A B 1 2
A B 1 4
A B 1 5
A B 1 7
A B 1 8
A B 2 0
A B 7
A C7
A C9
A C1 2
A C1 3
A C1 5
A C1 7
A C1 8
A D7
A D9
A D1 0
A D1 2
A D1 4
A D1 5
A D1 7
A D1 8
A E 9
A E 1 0
A E 1 2
A E 1 3
A E 1 5
A E 1 7
A E 1 8
A E 2 0
A F 9
A F 1 0
A F 1 2
A F 1 4
A F 1 5
A F 1 7
A F 1 8
A F 2 0
B 2 6
J6
K 6
M6
J2 1
K 2 1
M2 1
N2 1
N6
R2 1
R6
T2 1
T6
V 2 1
W 2 1
A F 7
A D6
A F 5
A E 5
A F 4
A E 3
A F 3
A E 2
A E 7
C2 6
G2 1
V 6
V CC [ 0 0 1]
V CC [ 0 0 2]
V CC [ 0 0 3]
V CC [ 0 0 4]
V CC [ 0 0 5]
V CC [ 0 0 6]
V CC [ 0 0 7]
V CC [ 0 0 8]
V CC [ 0 0 9]
V CC [ 0 1 0]
V CC [ 0 1 1]
V CC [ 0 1 2]
V CC [ 0 1 3]
V CC [ 0 1 4]
V CC [ 0 1 5]
V CC [ 0 1 6]
V CC [ 0 1 7]
V CC [ 0 1 8]
V CC [ 0 1 9]
V CC [ 0 2 0]
V CC [ 0 2 1]
V CC [ 0 2 2]
V CC [ 0 2 3]
V CC [ 0 2 4]
V CC [ 0 2 5]
V CC [ 0 2 6]
V CC [ 0 2 7]
V CC [ 0 2 8]
V CC [ 0 2 9]
V CC [ 0 3 0]
V CC [ 0 3 1]
V CC [ 0 3 2]
V CC [ 0 3 3]
V CC [ 0 3 4]
V CC [ 0 3 5]
V CC [ 0 3 6]
V CC [ 0 3 7]
V CC [ 0 3 8]
V CC [ 0 3 9]
V CC [ 0 4 0]
V CC [ 0 4 1]
V CC [ 0 4 2]
V CC [ 0 4 3]
V CC [ 0 4 4]
V CC [ 0 4 5]
V CC [ 0 4 6]
V CC [ 0 4 7]
V CC [ 0 4 8]
V CC [ 0 4 9]
V CC [ 0 5 0]
V CC [ 0 5 1]
V CC [ 0 5 2]
V CC [ 0 5 3]
V CC [ 0 5 4]
V CC [ 0 5 5]
V CC [ 0 5 6]
V CC [ 0 5 7]
V CC [ 0 5 8]
V CC [ 0 5 9]
V CC [ 0 6 0]
V CC [ 0 6 1]
V CC [ 0 6 2]
V CC [ 0 6 3]
V CC [ 0 6 4]
V CC [ 0 6 5]
V CC [ 0 6 6]
V CC [ 0 6 7]
V C C[ 06 8 ]
V C C[ 06 9 ]
V C C[ 07 0 ]
V C C[ 07 1 ]
V C C[ 07 2 ]
V C C[ 07 3 ]
V C C[ 07 4 ]
V C C[ 07 5 ]
V C C[ 07 6 ]
V C C[ 07 7 ]
V C C[ 07 8 ]
V C C[ 07 9 ]
V C C[ 08 0 ]
V C C[ 08 1 ]
V C C[ 08 2 ]
V C C[ 08 3 ]
V C C[ 08 4 ]
V C C[ 08 5 ]
V C C[ 08 6 ]
V C C[ 08 7 ]
V C C[ 08 8 ]
V C C[ 08 9 ]
V C C[ 09 0 ]
V C C[ 09 1 ]
V C C[ 09 2 ]
V C C[ 09 3 ]
V C C[ 09 4 ]
V C C[ 09 5 ]
V C C[ 09 6 ]
V C C[ 09 7 ]
V C C[ 09 8 ]
V C C[ 09 9 ]
V C C[ 10 0 ]
V C CA [ 0 1 ]
V C CP [ 0 3 ]
V C CP [ 0 4 ]
V C CP [ 0 5 ]
V C CP [ 0 6 ]
V C CP [ 0 7 ]
V C CP [ 0 8 ]
V C CP [ 0 9 ]
V C CP [ 1 0 ]
V C CP [ 1 1 ]
V C CP [ 1 2 ]
V C CP [ 1 3 ]
V C CP [ 1 4 ]
V C CP [ 1 5 ]
V C CP [ 1 6 ]
V CC S E N S E
V I D[ 0 ]
V I D[ 1 ]
V I D[ 2 ]
V I D[ 3 ]
V I D[ 4 ]
V I D[ 5 ]
V I D[ 6 ]
V S S S E N S E
V C CA [ 0 2 ]
V C CP [ 0 1 ]
V C CP [ 0 2 ]
C 3 2 0
2 2 U _ 6. 3 V _X 5 R _0 8
C 3 9
1 U _ 6. 3 V _0 4
C 3 1 5
* 0 . 1 U_ 1 0 V _ X 7R _ 0 4
V CO R E
V C OR E
H _V I D1 [ 3 1 ]
H _V I D2 [ 3 1 ]
C 3 1 9
1 0 U _6 . 3 V _ X 5 R_ 0 8
1. 05 V S [ 2 , 4 , 5 , 7, 8, 13 , 1 6 , 2 9 ]
C 2 8 1
2 2 U _6 . 3 V _ X 5 R_ 0 8
C 3 5
* 0. 1U _ 1 0V _ X7 R _ 04
C 32 4
1 U_ 6 . 3 V _ 0 4
C3 1 3
15 0 U _ 4V _B 2
C 2 9 5
1 U _ 6. 3 V _0 4
C 30 4
0 . 1 U_ 1 0 V _ X 7 R_ 0 4
H _V I D0 [ 3 1 ]
V CO R E
V CO R E
C 3 0 2
1 U _ 6 . 3V _ 04
1 . 0 5 V S
C2 8 0
22 U _ 6 . 3V _ X5 R _ 08
Layout Note:
C 36
2 2 U_ 6 . 3 V _ X 5 R_ 0 8
C 2 82
1 0 U_ 6 . 3 V _ X 5 R_ 0 8
C 33 3
2 2 U_ 6 . 3 V _ X 5 R_ 0 8
0.5A
C 36 2
0 . 1 U_ 1 0 V _ X 7 R_ 0 4
C 27 8
1 U_ 6 . 3 V _ 0 4
H _V I D6 [ 3 1 ]
47A
C1 7
0 . 1 U_ 1 0 V _ X 7R _ 0 4
C 3 31
0 . 1 U_ 1 0 V _ X 7 R_ 0 4
H _V I D5 [ 3 1 ]
C 3 28
0 . 0 1 U_ 1 6 V _ X 7 R_ 0 4
V CO R E
C 2 9 8
0 . 1 U _ 10 V _X 7 R _0 4
C3 2 9
1U _ 6 . 3 V _ 0 4
2.5A
U 9 D
M O LE X_ 4 7 4 3 0- 62 1 5
.
P 6
A E 1 1
A 8
A 1 1
A 1 4
A 1 6
A 1 9
A 2 3
A F 2
B 6
B 8
B 1 1
B 1 3
B 1 6
B 1 9
B 2 1
B 2 4
C 5
C 8
C1 1
C1 4
C1 6
C1 9
C 2
C2 2
C2 5
D 1
D 4
D 8
D1 1
D1 3
D1 6
D1 9
D2 3
D2 6
E 3
E 6
E 8
E 1 1
E 1 4
E 1 6
E 1 9
E 2 1
E 2 4
F 5
F 8
F 1 1
F 1 3
F 1 6
F 1 9
F 2
F 2 2
F 2 5
G 4
G 1
G2 3
G2 6
H 3
H 6
H2 1
H2 4
J 2
J 5
J 2 2
J 2 5
K 1
K 4
K 2 3
K 2 6
L 3
L 6
L 2 1
L 2 4
M 2
M 5
M2 2
M2 5
N 1
N 4
N2 3
N2 6
P 3 A 2 5
A F 2 1
A F 1 9
A F 1 6
A F 1 3
A F 1 1
A F 8
A F 6
A 2
A E 2 6
A E 2 3
A E 1 9
P 2 1
P 2 4
R2
R5
R2 2
R2 5
T 1
T 4
T 23
T 26
U3
U6
U2 1
U2 4
V 2
V 5
V 2 2
V 2 5
W 1
W 4
W 2 3
W 2 6
Y 3
Y 2 1
Y 2 4
A A 2
A A 5
A A 8
A A 1 1
A A 1 4
A A 1 6
A A 1 9
A A 2 2
A A 2 5
A B 1
A B 4
A B 8
A B 1 1
A B 1 3
A B 1 6
A B 1 9
A B 2 3
A B 2 6
A C 3
A C 6
A C 8
A C 11
A C 14
A C 16
A C 19
A C 21
A C 24
A D 2
A D 5
A D 8
A D 11
A D 13
A D 16
A D 19
A D 22
A D 25
A E 1
A E 4
Y 6
A 4
A E 1 4
A E 1 6
A E 8
A F 2 5
V S S [ 0 82 ]
V S S [ 1 48 ]
V S S [ 0 0 2]
V S S [ 0 0 3]
V S S [ 0 0 4]
V S S [ 0 0 5]
V S S [ 0 0 6]
V S S [ 0 0 7]
V S S [ 0 0 8]
V S S [ 0 0 9]
V S S [ 0 1 0]
V S S [ 0 1 1]
V S S [ 0 1 2]
V S S [ 0 1 3]
V S S [ 0 1 4]
V S S [ 0 1 5]
V S S [ 0 1 6]
V S S [ 0 1 7]
V S S [ 0 1 8]
V S S [ 0 1 9]
V S S [ 0 2 0]
V S S [ 0 2 1]
V S S [ 0 2 2]
V S S [ 0 2 3]
V S S [ 0 2 4]
V S S [ 0 2 5]
V S S [ 0 2 6]
V S S [ 0 2 7]
V S S [ 0 2 8]
V S S [ 0 2 9]
V S S [ 0 3 0]
V S S [ 0 3 1]
V S S [ 0 3 2]
V S S [ 0 3 3]
V S S [ 0 3 4]
V S S [ 0 3 5]
V S S [ 0 3 6]
V S S [ 0 3 7]
V S S [ 0 3 8]
V S S [ 0 3 9]
V S S [ 0 4 0]
V S S [ 0 4 1]
V S S [ 0 4 2]
V S S [ 0 4 3]
V S S [ 0 4 4]
V S S [ 0 4 5]
V S S [ 0 4 6]
V S S [ 0 4 7]
V S S [ 0 4 8]
V S S [ 0 4 9]
V S S [ 0 5 0]
V S S [ 0 5 1]
V S S [ 0 5 2]
V S S [ 0 5 3]
V S S [ 0 5 4]
V S S [ 0 5 5]
V S S [ 0 5 6]
V S S [ 0 5 7]
V S S [ 0 5 8]
V S S [ 0 5 9]
V S S [ 0 6 0]
V S S [ 0 6 1]
V S S [ 0 6 2]
V S S [ 0 6 3]
V S S [ 0 6 4]
V S S [ 0 6 5]
V S S [ 0 6 6]
V S S [ 0 6 7]
V S S [ 0 6 8]
V S S [ 0 6 9]
V S S [ 0 7 0]
V S S [ 0 7 1]
V S S [ 0 7 2]
V S S [ 0 7 3]
V S S [ 0 7 4]
V S S [ 0 7 5]
V S S [ 0 7 6]
V S S [ 0 7 7]
V S S [ 0 7 8]
V S S [ 0 7 9]
V S S [ 0 8 0]
V S S [ 0 8 1] V S S [ 1 62 ]
V S S [ 1 61 ]
V S S [ 1 60 ]
V S S [ 1 59 ]
V S S [ 1 58 ]
V S S [ 1 57 ]
V S S [ 1 56 ]
V S S [ 1 55 ]
V S S [ 1 54 ]
V S S [ 1 53 ]
V S S [ 1 52 ]
V S S [ 1 51 ]
V S S [ 0 83 ]
V S S [ 0 84 ]
V S S [ 0 85 ]
V S S [ 0 86 ]
V S S [ 0 87 ]
V S S [ 0 88 ]
V S S [ 0 89 ]
V S S [ 0 90 ]
V S S [ 0 91 ]
V S S [ 0 92 ]
V S S [ 0 93 ]
V S S [ 0 94 ]
V S S [ 0 95 ]
V S S [ 0 96 ]
V S S [ 0 97 ]
V S S [ 0 98 ]
V S S [ 0 99 ]
V S S [ 1 00 ]
V S S [ 1 01 ]
V S S [ 1 02 ]
V S S [ 1 03 ]
V S S [ 1 04 ]
V S S [ 1 05 ]
V S S [ 1 07 ]
V S S [ 1 08 ]
V S S [ 1 09 ]
V S S [ 1 10 ]
V S S [ 1 11 ]
V S S [ 1 12 ]
V S S [ 1 13 ]
V S S [ 1 14 ]
V S S [ 1 15 ]
V S S [ 1 16 ]
V S S [ 1 17 ]
V S S [ 1 18 ]
V S S [ 1 19 ]
V S S [ 1 20 ]
V S S [ 1 21 ]
V S S [ 1 22 ]
V S S [ 1 23 ]
V S S [ 1 24 ]
V S S [ 1 25 ]
V S S [ 1 26 ]
V S S [ 1 27 ]
V S S [ 1 28 ]
V S S [ 1 29 ]
V S S [ 1 30 ]
V S S [ 1 31 ]
V S S [ 1 32 ]
V S S [ 1 33 ]
V S S [ 1 34 ]
V S S [ 1 35 ]
V S S [ 1 36 ]
V S S [ 1 37 ]
V S S [ 1 38 ]
V S S [ 1 39 ]
V S S [ 1 40 ]
V S S [ 1 41 ]
V S S [ 1 42 ]
V S S [ 1 43 ]
V S S [ 1 44 ]
V S S [ 1 45 ]
V S S [ 1 46 ]
V S S [ 1 06 ]
V S S [ 0 0 1]
V S S [ 1 49 ]
V S S [ 1 50 ]
V S S [ 1 47 ]
V S S [ 1 63 ]
C 3 1 8
2 2 U _6 . 3 V _ X 5 R_ 0 8
1. 5 V S
V C OR E
C P U_ V C C S E N S E [ 3 1]
C 3 7
2 2 U _ 6. 3 V _X 5 R _0 8
C3 1 2
*0 . 1 U_ 1 0 V _ X 7 R_ 0 4
Place near pin B26, C26
C3 0 3
1 U_ 6 . 3 V _ 0 4
V CO R E
Sheet 3 of 40
Intel Penryn
(Socket-P) 2/2
Schematic Diagrams
Cantiga 1/6 - Host B - 5
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Cantiga 1/6 - Host

MCH_BSEL2 [ 5]
H_D#52
R29
H_ADSTB#0 [2]
H_D#3
H_D#42
C353
0.1U_10V_X7R_04
1.05VS
H_DI NV#2 [2]
H_D#20
24.9_1%_04
H_BREQ# [2]
1.05VS
MCH_BSEL0 [ 5]
H_A#32
H_D#14
H_D#50
H_D#54
H_A#3
H_A#8
H_D#37
R218
2K_1%_04
H_DI NV#3 [2]
H_D#51
H_A#24
H_D#27
H_A#19
266
16.9_1%_04
CPU_BSEL0 [2,18]
H_D#19
R204
1K_04
R202
1K_04
R212 221_1%_04
H_DSTBP#1 [2]
H_A#23
H_A#34
H_D#33
H_A#6
R208
*56_04
H_D#39
H_A#29 H_D#25
H_D#18
H_DSTBN#3 [2]
H_D#43
H_D#36
H_DEFER# [2]
R206
1K_04
H_DPWR# [ 2]
H_REQ#4 [2]
L
1.05VS
H
H_HI T# [2]
1.05VS
H_DRDY# [2]
H_DSTBP#2 [2]
H_REQ#1 [2]
H_A#27
H_CPURST# [2]
H_D#13
CPU_BSEL1
L
H
CLK_BSEL2 [2,18]
H_D#17
H_D#47
H_D#30
H_D#56
H_D#45
H_DSTBP#3 [2]
H_DI NV#1 [2]
1.05VS [2,3,5,7,8,13,16, 29]
H_D#46
H_D#61
H_A#20
H_D#32
H_A#21
CPU_BSEL0
CLK_MCH_BCLK# [ 18]
H_D#63
H_A#13
H_A#33
H
H_A#9
H_A#18
L
H_DI NV#0 [2]
H_REQ#2 [2]
H_D#59
H_ADSTB#1 [2]
H_CPUSLP# [2]
H_D#55
R 213
H_REQ#3 [2]
H_HI TM# [2]
H_DSTBN#2 [2]
H_D#38
CPU_BSEL2
H_VREF
H_ADS# [2]
H_D#12
L
H_DSTBN#1 [2]
H_A#16
H_D#6
H_D#53
H_A#14
C363
0.1U_10V_X7R_04
H_TRDY# [2]
H_D#22
H_D#8
H_A#15
H_D#29
166
C PU
H_D#16
H_D#49
H_D#60
H_D#23
H_D#31
CLK_BSEL1 [2,18]
H_RS#2 [2]
H_D#41
H_A#10
CLK_BSEL0 [2,18]
H_REQ#0 [2]
H_D#35
R29 24.9_1%_04
200
100_1%_04
H_D#1
H_BPRI# [2]
R203
1K_04
1.05VS
H_A#28
H_A#11
H_D#58
H_A#22
H_LOCK# [2]
H_D#0
H_A#30
C366
0.1U_10V_X7R_04
H_A#26
R219 1K_1%_04
12mils
H_BNR# [2]
H_D#62
H_D#7
H_A#35
H
O
S
T
U15A
CANTIGA-EB88CTGM
P16
R16
N17
M13
E17
P17
F17
G20
B19
J16
E20
H16
J20
L17
A17
B17
L16
C21
J17
H20
A14
B18
K17
C15
F16
H13
C18
M16
J13
H12
B16
G17
A9
F11
G12
AH6
C12
AH7
F2
F13
B13
G8
M9
L6
N10
AA8
AA2
AE11
D4
H3
B10
M11
J1
J2
N12
J6
P2
L2
R2
N9
F8
M5
J3
N2
R1
N5
N6
P13
N8
L7
E6
M3
Y3
AD14
Y6
Y10
Y12
Y14
Y7
W2
G2
Y9
AA13
AA9
AA11
AD11
AD10
AD13
AE12
AE9
H6
AD8
AA3
AD3
AD7
AE14
AF3
AC1
AE3
AC3
H2
AE8
AG2
AD6
F6
E9
J8
L3
Y13
Y1
J11
F9
L10
M7
AA5
AE6
L9
M8
AA6
AE5
A11
B11
C9
H9
E12
H11
B15
K13
B14
B20
F21
K21
L20
C5
E11
E3
B6
F12
C8
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_3
H_A#_30
H_A#_31
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_BNR#
H_BPRI #
H_BREQ#
HPLL_CLK#
H_CPURST#
HPLL_CLK
H_D#_0
H_REQ#_2
H_REQ#_3
H_D#_1
H_D#_10
H_D#_20
H_D#_30
H_D#_40
H_D#_50
H_D#_60
H_D#_8
H_D#_9
H_DBSY#
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_2
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_3
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_4
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_5
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_6
H_D#_61
H_D#_62
H_D#_63
H_D#_7
H_DEFER#
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
H_DPWR#
H_DRDY#
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
H_AVREF
H_DVREF
H_TRDY#
H_HIT#
H_HITM#
H_LOCK#
H_REQ#_0
H_REQ#_1
H_REQ#_4
H_A#_32
H_A#_33
H_A#_34
H_A#_35
H_SWING
H_CPUSLP#
H_RCOMP
H_RS#_0
H_RS#_1
H_RS#_2
H_A#31
H_D#40
Dual Core
CPU_BSEL2 [2,18]
H_DSTBP#0 [2]
H_D#57
H_SWING
H_D#21
H_D#24
12mils
H_D#10
H_D#28
L
CLK_MCH_BCLK [18]
H_D#9
H_A#4
H_D#34
H_A#12
L
CPU_BSEL[2:0] (FSB) D AEFULT SETTING
Quad Core
H_A#17
H_DBSY# [2]
H_DSTBN#0 [2]
H_D#26
H_D#[63:0] [2]
H_A#5
H_D#44
MCH_BSEL1 [ 5]
H_RS#0 [2]
H_A#25
R213
100_1%_04
75_1%_04
CPU_BSEL1 [2,18]
H_D#4
H_A#[ 35: 3] [2]
H_A#7
H_D#11
H_D#2
R205
1K_04
H_RS#1 [2]
H_D#15
H_D#48
H_D#5
R207
1K_04
Sheet 4 of 40
Cantiga 1/6 - Host
Schematic Diagrams
B - 6 Cantiga 2/6 - VGA, CRT
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Cantiga 2/6 - VGA, CRT

D A C_ RE D [ 1 2 ]
MC H_ CF G 9 [ 9]
GF X _V I D1
C3 9 5
0 . 01 U _1 6 V _X 7 R_ 0 4
Zdiff= 100O? 5%
M _C LK _D DR #3 [ 1 1 ]
D MI _ RX N1 [ 14 ]
M _C K E 0 [ 1 0 ]
M _C K E 3 [ 1 1 ]
D MI _ T XN 1 [ 1 4]
D MI _ RX N2 [ 14 ]
M _C K E 1 [ 1 0 ]
C L_ P W R OK [ 12 , 1 5 , 17 , 2 6]
LV D S _ L3 P
LV D S - L 2N [ 1 2 , 27 ]
M CH_ C LK R E Q# [ 1 8 ]
M _C LK _D DR 0 [ 10 ]
S M_ P W RO K
R2 2 1 49 9 _1 % _ 04
S M _V R E F
D MI _ T XP 3 [ 14 ]
D A C_ RE D
R 6 8
1 0 K _ 1% _ 0 4
1 . 8 V
M _C LK _D DR #0 [ 1 0 ]
R4 9 15 0 _1 % _ 04
3. 3V S
S M_ R E XT
R6 5 10 K _ 04
1 . 05 V S
P M_ DP R S LP V R [ 1 5 , 31 ]
LV D S - L 1N [ 1 2 , 27 ]
M CH_ I C H_ S Y N C# [ 1 5 ]
GF X _V I D2
M CH_ C F G1 1
R 3 2 *1 0m i l _s h or t D MI _ RX P 2 [ 1 4 ]
M CH _C F G1 3 [ 9 ]
R2 2 2 8 0 . 6 _1 % _0 4
M CH_ C F G1 4
D MI _ RX P 1 [ 1 4 ]
M CH _C F G1 6 [ 9 ]
M _O DT 2 [ 1 1 ]
R 6 4
49 . 9 _1 % _ 04
CL _ V RE F
M _C S # 0 [ 10 ]
L V DS - L C LK P [ 12 , 2 7 ]
D MI _ T XP 0 [ 14 ]
R5 8 10 K _ 04
GF X _V I D4
GF X _V I D0
DA C_ D DCA C L K [ 12 ]
M CH_ C F G1 8
C L K _P C I E _ 3G P L L# [ 18 ]
D MI _ T XN 2 [ 1 4]
D MI _ RX N3 [ 14 ]
P M_ E X T TS _ E C #
M CH_ C F G1 5
1. 0 5 V M_ P E G
D MI _ T XP 2 [ 14 ]
MC H_ CF G 7 [ 9]
DA C _ GRE E N
R 6 0 *1 0m i l _s h or t
R 4 3 7 5 _0 4
DA C _ HS Y N C [ 1 2 ]
S M_ RC OM P _V OL
P
M
M
I
S
C
N
C
D
D
R

C
L
K
/

C
O
N
T
R
O
L
/
C
O
M
P
E
N
S
A
T
I
O
N
C
L
K
D
M
I
C
F
G
R
S
V
D
G
R
A
P
H
I
C
S

V
I
D
M
E
H
D
A
U 15 B
C A NT I GA - E B 8 8 CT GM
A P 2 4
A T 2 1
A V 2 4
A R 24
A R 21
A U 24
B C 28
A Y 28
A Y 36
B B 3 6
B A 1 7
A Y 16
A V 1 6
A R 13
B C 36
B D 17
A Y 17
B F 1 5
A Y 13
B G 22
B H 21
P 2 9
R2 8
P 2 5
T2 5
R2 5
T2 8
P 2 0
P 2 4
C2 5
N2 4
M2 4
E 2 1
C2 3
C2 4
N2 1
P 2 1
T2 1
R2 0
M2 0
L2 1
H2 1
R2 9
N3 3
P 3 2
A T4 0
A T1 1
B 3 8
A 3 8
E 4 1
F 4 1
A E 4 1
A E 3 7
A E 4 7
A H 39
A E 4 0
A E 3 8
A E 4 8
A H 40
A E 3 5
A E 4 3
A E 4 6
A H 42
A D 35
A E 4 4
A F 4 6
A H 43
A L3 4
A N3 5
A K 3 4
A M3 5
B G2 3
B F 2 3
B H1 8
B F 1 8
B 7
A U 20
A V 2 0
A Y 2 1
A H9
A H1 0
A H1 2
A H1 3
M3 6
N3 6
R3 3
T3 3
B 3 3
B 3 2
G 33
F 3 3
C 34
B F 2 8
B H 28
T2 0
R3 2
K 1 2
A H 37
A H 36
A N 36
A J 3 5
A H 34
A 4 7
B G4 8
B F 4 8
B D4 8
B C4 8
B H4 7
B G4 7
B E 4 7
B H4 6
B F 4 6
B G4 5
B H4 4
B H4 3
B H6
B H5
B G4
G 36
E 3 6
K 3 6
T2 4
H 36
B 1 2
E 4 3
F 4 3
B H3
E 3 3
B 3 1
N 28
B F 3
B H2
B G2
B E 2
B G1
B F 1
B D1
B C1
F 1
A V 4 2
A R 36
B F 1 7
M1
B 2 8
B 3 0
B 2 9
C2 9
A 2 8
M 28
B 2
S A _ C K _0
S A _ C K _1
S B _ C K _0
S A _C K # _0
S A _C K # _1
S B _C K # _0
S A _ C K E _0
S A _ C K E _1
S B _ C K E _0
S B _ C K E _1
S A _C S # _0
S A _C S # _1
S B _C S # _0
S B _C S # _1
S M_ DR A MR S T#
S A _ O DT _0
S A _ O DT _1
S B _ O DT _0
S B _ O DT _1
S M _R CO MP
S M_ RCO MP #
CF G _ 18
CF G _ 19
CF G _ 2
CF G _ 0
CF G _ 1
CF G _ 20
CF G _ 3
CF G _ 4
CF G _ 5
CF G _ 6
CF G _ 7
CF G _ 8
CF G _ 9
CF G _ 10
CF G _ 11
CF G _ 12
CF G _ 13
CF G _ 14
CF G _ 15
CF G _ 16
CF G _ 17
P M_ S Y NC#
P M_ E X T _T S # _ 0
P M_ E X T _T S # _ 1
P W RO K
RS T I N #
DP L L _ RE F _ CL K
D P LL _ RE F _ C LK #
DP L L _R E F _ S S CL K
D P LL _ RE F _ S S C LK #
DMI _ R XN _0
DMI _ R XN _1
DMI _ R XN _2
DMI _ R XN _3
DM I _R X P _0
DM I _R X P _1
DM I _R X P _2
DM I _R X P _3
D MI _ T XN _0
D MI _ T XN _1
D MI _ T XN _2
D MI _ T XN _3
DMI _ T X P _0
DMI _ T X P _1
DMI _ T X P _2
DMI _ T X P _3
RS V D 1 0
RS V D 1 2
RS V D 1 1
RS V D 1 3
RS V D 2 2
RS V D 2 3
RS V D 2 4
RS V D 2 5
P M_ D P RS T P #
S B _ C K _1
S B _C K # _1
RS V D 2 0
RS V D 5
RS V D 6
RS V D 7
RS V D 8
RS V D 1
RS V D 2
RS V D 3
RS V D 4
G F X_ V I D _0
G F X_ V I D _1
G F X_ V I D _2
G F X_ V I D _3
G F X _V R _ E N
S M_ RC OMP _ V O H
S M _R CO MP _ V OL
T HE R MT RI P #
DP R S L P V R
RS V D 9
CL _ CL K
CL _ DA T A
C L_ P W R OK
C L_ R S T#
CL _V RE F
NC _2 6
NC _1
NC _2
NC _3
NC _4
NC _5
NC _6
NC _7
NC _8
NC _9
NC _1 0
NC _1 1
NC _1 2
NC _1 3
NC _1 4
NC _1 5
S DV O _ CT RL CL K
S DV O _ CT RL DA T A
C LK R E Q#
RS V D 1 4
I CH_ S Y NC#
T S A T N#
P E G_ C LK #
P E G_ CL K
NC _1 6
G F X_ V I D _4
RS V D 1 5
DDP C _ CT RL CL K
NC _1 7
NC _1 8
NC _1 9
NC _2 0
NC _2 1
NC _2 2
NC _2 3
NC _2 4
NC _2 5
S M _V RE F
S M_ P W R OK
S M_ R E XT
RS V D 1 7
HD A _ B CL K
HD A _ RS T #
HD A _ S DI
HD A _ S DO
HD A _ S Y NC
DDP C _ CT RL DA T A
RS V D 1 6
M CH _C F G1 0 [ 9 ]
M CH_ B S E L 0 [ 4 ]
96MHz
LV D S - L 2P [ 1 2 , 27 ]
C L K _D RE F [ 1 8]
MC H_ CF G 6 [ 9]
D MI _ T XN 0 [ 1 4]
R 23 2
1 K _ 1 %_ 0 4
R2 3 6
2 . 3 7 K _1 % _0 4
C1 3 1
0 . 1 U_ 10 V _ X 7R _0 4
L V D S - LC L K N [ 1 2 , 27 ]
S M_ RC OMP #
R 63
1 K _ 1% _ 0 4
M _O DT 0 [ 1 0 ]
100MHz
LV D S - L 1P [ 1 2 , 27 ]
LV D S - L 0P [ 1 2 , 27 ]
M _C LK _D DR 2 [ 11 ]
C 3 92
2 . 2 U_ 6 . 3V _0 6
DA C _B L U E [ 1 2]
H _D P RS T P # [ 2 , 1 3, 3 1 ]
M CH_ C F G1 7
R 4 4 7 5 _0 4
3 . 3 V S [ 8 . . 1 6, 1 8 . . 2 7, 3 1 ]
S M_ RC OMP
R 6 9
1 0 K _ 1% _ 0 4
E NA V D D [ 12 ]
M CH _C F G1 2 [ 9 ]
100MHz
G M_ B L ON [ 1 2 ]
LV D S - L 0N [ 1 2 , 27 ]
MC H_ CL K RE Q#
M CH_ C F G3
LV D S _ L3 N
M _C LK _D DR 3 [ 11 ]
1. 8 V
R4 7 15 0 _1 % _ 04
S M_ RC OMP _ V O H
S M _ RCO MP _ V OL
P M_ E X T TS _ E C #
P M_ E X T TS _ D DR#
M CH_ CL K R E Q#
R5 9 10 K _ 04
M CH_ B S E L 2 [ 4 ]
C L K _P C I E _ 3G P L L [ 1 8]
R6 1 *1 0 m i l _ sh o r t
D MI _ T XN 3 [ 1 4]
M CH _C F G1 9 [ 9 ]
C L_ DA TA 0 [ 15 ]
MC H_ CF G 5 [ 9]
R 23 0
3 . 0 1 K _1 % _ 04
C L K _D RE F S S # [ 18 ]
P L T_ RS T# [ 1 4 , 1 9]
M CH_ C F G8
D MI _ T XP 1 [ 14 ]
M _C LK _D DR #2 [ 1 1 ]
GF X _V RE N
R 3 0 1 0 0_ 0 4
M _C S # 2 [ 11 ]
M _C S # 1 [ 10 ]
M _C K E 2 [ 1 1 ]
P M_ T HR MT RI P # [ 2, 13 , 2 8]
1 . 05 V M _P E G [ 8 ]
GF X _V I D3
M _O DT 1 [ 1 0 ]
M _C LK _D DR #1 [ 1 0 ]
M CH_ C F G4
1 . 05 V S [ 2 . . 4 , 7, 8 , 1 3 , 16 , 2 9]
D MI _ RX N0 [ 14 ]
D A C_ GR E E N
P _ DD C_ CL K [ 12 , 2 7 ]
C 3 99
2 . 2 U_ 6 . 3V _0 6
C1 1 8
0 . 1U _1 0 V _ X7 R _0 4
D MI _ RX P 3 [ 1 4 ]
M _C LK _D DR 1 [ 10 ]
P M_ E X T TS _ D DR#
P _ DD C_ DA T A [ 12 , 2 7 ]
P M_ S Y N C# [ 1 5]
R5 2 1 K _ 1% _ 0 4
R 3 61 5 6 _0 4
C L K _D RE F # [ 18 ]
DA C _ B LU E
D A C_ B L UE
C3 9 8
0 . 01 U _1 6 V _X 7 R_ 0 4
12mils
R4 8 15 0 _1 % _ 04
C L K _D RE F S S [ 1 8]
R5 3 3 0 . 1_ 1 % _0 4
R2 2 6 8 0 . 6 _1 % _0 4
D A C_ D DCA D A T A [ 12 ]
1. 8 V
1 . 8 V [ 7 , 8, 10 , 1 1, 3 0 ]
R 62
5 1 1_ 1 % _0 4
C L_ CL K 0 [ 1 5 ]
D MI _ RX P 0 [ 1 4 ]
R 5 5 *1 0m i l _s h or t
12mils
DA C _ GRE E N [ 1 2 ]
R 2 16 *1 0m i l _s h or t
C L _V R E F
S M _ RCO MP _ V OH
P M_ E X T TS _ DD R# [ 1 0 , 1 1]
R 4 2 7 5 _0 4
DA C _ RE D
S M_ P W R OK
1. 0 5 V S
R5 4 3 0 . 1_ 1 % _0 4
L
V
D
S
P
C
I
-
E
X
P
R
E
S
S

G
R
A
P
H
I
C
S
T
V
V
G
A
U1 5C
CA NT I G A - E B 8 8C TG M
T3 7
T3 6
H4 4
J4 6
L4 4
L4 0
N4 1
P 48
N4 4
T4 3
U4 3
Y 4 3
Y 4 8
Y 3 6
A A 43
A D3 7
A C4 7
A D3 9
H4 3
J4 4
L4 3
L4 1
N4 0
P 47
N4 3
T4 2
U4 2
Y 4 2
W 47
Y 3 7
A A 42
A D3 6
A C4 8
A D4 0
J4 1
Y 4 0
M4 0
M4 2
R4 8
N3 8
T4 0
U3 7
U4 0
M4 6
A A 46
A A 37
A A 40
A D4 3
A C4 6
M4 7
J4 2
L4 6
M4 8
M3 9
M4 3
R4 7
N3 7
T3 9
U3 6
U3 9
Y 3 9
Y 4 6
A A 36
A A 39
A D4 2
A D4 6
M 32
M 33
K 33
J 33
M 29
C 44
B 43
E 37
E 38
C 41
C 40
H 47
E 46
G 40
D 45
F 40
B 37
A 37
A 41
H 38
G 37
G 38
F 37
G 32
F 25
H 25
K 25
H 24
E 28
H 32
J 32
G 28
J 29
E 29
J 28
G 29
L 29
H 48
B 42
L 32
C 31
E 32
A 40
B 40
J 37
K 37
P E G_ CO MP I
P E G_ COM P O
P E G_ RX # _ 0
P E G_ RX # _ 1
P E G_ RX # _ 2
P E G_ RX # _ 3
P E G_ RX # _ 4
P E G_ RX # _ 5
P E G_ RX # _ 6
P E G_ RX # _ 7
P E G_ RX # _ 8
P E G_ RX # _ 9
P E G _R X# _ 1 0
P E G _R X# _ 1 1
P E G _R X# _ 1 2
P E G _R X# _ 1 3
P E G _R X# _ 1 4
P E G _R X# _ 1 5
P E G_ RX _ 0
P E G_ RX _ 1
P E G_ RX _ 2
P E G_ RX _ 3
P E G_ RX _ 4
P E G_ RX _ 5
P E G_ RX _ 6
P E G_ RX _ 7
P E G_ RX _ 8
P E G_ RX _ 9
P E G_ RX _ 1 0
P E G_ RX _ 1 1
P E G_ RX _ 1 2
P E G_ RX _ 1 3
P E G_ RX _ 1 4
P E G_ RX _ 1 5
P E G_ TX # _ 0
P E G_ T X# _ 1 0
P E G_ TX # _ 3
P E G_ TX # _ 4
P E G_ TX # _ 5
P E G_ TX # _ 6
P E G_ TX # _ 7
P E G_ TX # _ 8
P E G_ TX # _ 9
P E G_ TX # _ 1
P E G_ T X# _ 1 1
P E G_ T X# _ 1 2
P E G_ T X# _ 1 3
P E G_ T X# _ 1 4
P E G_ T X# _ 1 5
P E G_ TX # _ 2
P E G _T X _ 0
P E G _T X _ 1
P E G _T X _ 2
P E G _T X _ 3
P E G _T X _ 4
P E G _T X _ 5
P E G _T X _ 6
P E G _T X _ 7
P E G _T X _ 8
P E G _T X _ 9
P E G_ TX _ 1 0
P E G_ TX _ 1 1
P E G_ TX _ 1 2
P E G_ TX _ 1 3
P E G_ TX _ 1 4
P E G_ TX _ 1 5
L _ CT RL _ CL K
L _ CT RL _ DA T A
L _ DD C_ CL K
L _ DD C_ DA T A
L _ V DD _E N
L V D S _I B G
L V D S _V B G
L V D S _V R E F H
L V D S _V R E F L
L V D S A _C L K #
L V D S A _C L K
L V D S A _D A T A #_ 0
L V D S A _D A T A #_ 1
L V D S A _D A T A #_ 2
L V D S A _D A T A _1
L V D S B _C L K #
L V D S B _C L K
L V D S B _D A T A #_ 0
L V D S B _D A T A #_ 1
L V D S B _D A T A #_ 2
L V D S B _D A T A _1
L _ B K L T_ E N
T V A _ DA C
T V B _ DA C
T V C _D A C
T V _ RT N
C RT _ B LU E
C RT _ DDC _ CL K
C RT _ DDC _ DA T A
C RT _ GRE E N
C RT _ HS Y N C
C RT _ TV O _ I RE F
C RT _ RE D
C RT _ I RT N
C RT _ V S Y N C
L _ B K L T_ CT R L
T V _ DC ONS E L_ 0
T V _ DC ONS E L_ 1
L V D S A _D A T A #_ 3
L V D S B _D A T A #_ 3
M CH _C F G2 0 [ 9 ]
M _C S # 3 [ 11 ]
R 22 9
1 K _ 1 %_ 0 4
D E LA Y _ P W RG D [ 1 7, 3 1 ]
M CH_ B S E L 1 [ 4 ]
M _O DT 3 [ 1 1 ]
DA C _V S Y NC [ 12 ]
C L_ RS T# 0 [ 1 5 ]
S M_ RE X T
Sheet 5 of 40
Cantiga 2/6 -
VGA, CRT
Schematic Diagrams
Cantiga 3/6 - DDR B - 7
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Cantiga 3/6 - DDR

M_ B _ DQ [ 63 : 0 ] [ 1 1]
M_ A _ DQ 6 0
M_ B _ DQ 4
M_ A _ A 10
H29
M_ B _ A 3
M_ A _ DM7
M_ A _ DQ 2 1
M_ A _ DQ 5 0
M_ B _ DM1
M_ B _ DQ 14
M1 0
M- M A RK 1
M_ B B S 1
D
D
R

S
Y
S
T
E
M

M
E
M
O
R
Y

A
U1 5 D
CA NT I GA - E B 8 8 CT GM
A J 3 8
A J 4 1
A U4 0
A T 3 8
A N4 1
A N3 9
A U4 4
A U4 2
A V 3 9
A Y 4 4
B A 4 0
B D4 3
A N3 8
A V 4 1
A Y 4 3
B B 4 1
B C4 0
A Y 3 7
B D3 8
A V 3 7
A T 3 6
A Y 3 8
B B 3 8
A M3 8
A V 3 6
A W 3 6
B D1 3
A U1 1
B C1 1
B A 1 2
A U1 3
A V 1 3
B D1 2
B C1 2
A J 3 6
B B 9
B A 9
A U1 0
A V 9
B A 1 1
B D9
A Y 8
B A 6
A V 5
A V 7
A J 4 0
A T 9
A N8
A U5
A U6
A T 5
A N1 0
A M1 1
A M5
A J 9
A J 8
A M4 4
A N1 2
A M1 3
A J 1 1
A J 1 2
A M4 2
A N4 3
A N4 4
B D2 1
B G1 8
A T 25
B D2 0
A M3 7
A T 41
A Y 4 1
A U3 9
B B 1 2
A Y 6
A T 7
A J 44
A T 44
B A 4 3
B C3 7
A W 1 2
B C8
A U8
A M7
A J 5
A J 43
A T 43
B A 4 4
B D3 7
A Y 1 2
B D8
A U9
A M8
B A 2 1
B C2 4
B C2 1
B G2 6
B H2 6
B H1 7
B G2 4
B H2 4
B G2 5
B A 2 4
B D2 4
B G2 7
B F 2 5
A W 2 4
B B 2 0
A Y 2 0
A Y 2 5
S A _ DQ_ 0
S A _ DQ_ 1
S A _ DQ_ 1 0
S A _ DQ_ 1 1
S A _ DQ_ 1 2
S A _ DQ_ 1 3
S A _ DQ_ 1 4
S A _ DQ_ 1 5
S A _ DQ_ 1 6
S A _ DQ_ 1 7
S A _ DQ_ 1 8
S A _ DQ_ 1 9
S A _ DQ_ 2
S A _ DQ_ 2 0
S A _ DQ_ 2 1
S A _ DQ_ 2 2
S A _ DQ_ 2 3
S A _ DQ_ 2 4
S A _ DQ_ 2 5
S A _ DQ_ 2 6
S A _ DQ_ 2 7
S A _ DQ_ 2 8
S A _ DQ_ 2 9
S A _ DQ_ 3
S A _ DQ_ 3 0
S A _ DQ_ 3 1
S A _ DQ_ 3 2
S A _ DQ_ 3 3
S A _ DQ_ 3 4
S A _ DQ_ 3 5
S A _ DQ_ 3 6
S A _ DQ_ 3 7
S A _ DQ_ 3 8
S A _ DQ_ 3 9
S A _ DQ_ 4
S A _ DQ_ 4 0
S A _ DQ_ 4 1
S A _ DQ_ 4 2
S A _ DQ_ 4 3
S A _ DQ_ 4 4
S A _ DQ_ 4 5
S A _ DQ_ 4 6
S A _ DQ_ 4 7
S A _ DQ_ 4 8
S A _ DQ_ 4 9
S A _ DQ_ 5
S A _ DQ_ 5 0
S A _ DQ_ 5 1
S A _ DQ_ 5 2
S A _ DQ_ 5 3
S A _ DQ_ 5 4
S A _ DQ_ 5 5
S A _ DQ_ 5 6
S A _ DQ_ 5 7
S A _ DQ_ 5 8
S A _ DQ_ 5 9
S A _ DQ_ 6
S A _ DQ_ 6 0
S A _ DQ_ 6 1
S A _ DQ_ 6 2
S A _ DQ_ 6 3
S A _ DQ_ 7
S A _ DQ_ 8
S A _ DQ_ 9
S A _ B S _ 0
S A _ B S _ 1
S A _ B S _ 2
S A _C A S #
S A _D M_ 0
S A _D M_ 1
S A _D M_ 2
S A _D M_ 3
S A _D M_ 4
S A _D M_ 5
S A _D M_ 6
S A _D QS _ 0
S A _D QS _ 1
S A _D QS _ 2
S A _D QS _ 3
S A _D QS _ 4
S A _D QS _ 5
S A _D QS _ 6
S A _D QS _ 7
S A _D M_ 7
S A _ DQ S #_ 0
S A _ DQ S #_ 1
S A _ DQ S #_ 2
S A _ DQ S #_ 3
S A _ DQ S #_ 4
S A _ DQ S #_ 5
S A _ DQ S #_ 6
S A _ DQ S #_ 7
S A _ MA _ 0
S A _ MA _ 1
S A _ M A _1 0
S A _ M A _1 1
S A _ M A _1 2
S A _ M A _1 3
S A _ MA _ 2
S A _ MA _ 3
S A _ MA _ 4
S A _ MA _ 5
S A _ MA _ 6
S A _ MA _ 7
S A _ MA _ 8
S A _ MA _ 9
S A _R A S #
S A _ W E #
S A _ M A _1 4
M_ A _ DQ 1 3
M_ B _ DQ 27
M_ B _ DQ 53
M _B _W E # [ 11 ]
M _A _A [ 1 4 : 0 ] [ 1 0 ]
M_ B B S 0
M_ B _ DQ 45
M_ B _ DQS #4
M_ A _ DQ 5 6
M_ B _ A 9
M 12
M - MA R K 1
For M720T
M _ A _R A S # [ 1 0 ] M_ A _ CA S #
M_ A _ DQ 2 7
M_ A _ DQ 4 7
M_ A _ DQ 5 4
M_ B _ DQ 34
M_ A _ A 3
M_ A _ A 4
M_ B _ A 4
H2 8
C2 3 7D 9 1
M_ A _ DQ 3 2
M_ A _ DQ 4 2
M_ B _ DQ 18
M_ B _ DQ 46
M_ B _ DQ 5
M_ A _ DQ 1 7
M_ A _ DQ 4 9
M_ B _ DQ 1
M_ B _ DQ 60
M_ B _ A 0
M1
M- M A RK 1
M _A _D QS [ 7 : 0 ] [ 1 0 ]
M_ A _ RA S #
M_ B _ DQ 41
M 7
M - MA R K 1
M_ B _ A 13
M _B _C A S # [ 1 1]
M_ A _ DM3
H1 6
C2 1 7D 8 7
MH 3
H4 _ 0
H 26
C 23 7 D8 7
M_ A _ DQ 1 8
M6
M- M A RK 1
M_ A _ A 0
M _ A B S 2 [ 1 0]
M_ A _ DQ 3 9
M_ B _ A 7
1
H 22
MT H3 1 5D 11 1 A
2
3
4
5 6
9
M_ A _ DQ 5 3
M_ A _ DQ 5 9
M_ A _ A 12
M1 4
M- MA R K 1
M_ B _ DQS 5
M_ B _ DQS 7
M_ A _ DQ 6
M_ B _ DQ 39
H2 0
O4 0 X 10 2 D4 0 X1 0 2
M_ B _ DQS 6
M_ B _ DQ 58
M_ A _ DQS 6
M_ A _ DQS 3
M_ A _ A 1
H2 3
C2 37 D 91
1
H 13
MT H3 1 5D 11 1 B
2
3 5
4
M_ A _ DM4
M_ B _ DQ 19
M_ A _ A 11
M_ B _ A 6
H16,H26,H18
M _A _D QS # [ 7 : 0] [ 1 0]
M_ B _ DQ 30
M_ B _ DQS #3
M _B _A [ 1 4 : 0 ] [ 1 1 ]
M_ A _ DQ 1 6
M_ B _ DQ 3
M_ B _ DQ 7
M_ B _ DQ 11
M_ A _ DQ 1 2
M_ B _ DQ 59
M_ A _ DQ 9
M_ B _ DQ 12
M_ B _ DQ 36
H 24
C 35 5 B 2 64 D1 8 6
M _A _D M[ 7 : 0 ] [ 1 0 ]
M_ A B S 2
M_ B _ DM6
1
H 17
MT H 31 5 D1 1 1- 3 _ 4
2
3
4
5 6
7
8
9
M_ B _ DQ 51
M_ A _ DQS #0
M_ B _ A 1
M_ B _ A 2
? ?
6-36-12181-20E
M _B B S 2 [ 1 1]
M_ B _ DQ 29
M9
M- MA R K 1
M_ A _ DQ 5 5
M_ B _ W E #
M_ B _ DQ 26
M_ B _ DQS #0
H 2 9
C 2 37 D1 4 6
M_ A _ DQ 2 0
M_ A _ DQ 4 6
M_ B _ DQ 42
H7
C4 4 D4 4
M2
M- MA R K 1
M_ A _ DQ 1 1
M_ A _ DQ 4 5
M_ A _ DQ 2 3
M8
M- M A RK 1
M_ A _ DQ 6 2
M_ A _ DQS #4
M_ B _ A 12
H14
M_ A _ DQ 5
M_ A _ DQ 3 5
M_ B _ DQS 3
M_ B _ DQS #2
M_ A _ DQ [ 63 : 0 ] [ 1 0]
M_ B _ DM5
M_ B _ DQ 50
M_ B _ DQ 24
H 2 7
C 3 55 B 2 6 4D 18 6
M_ A _ DQ 3 0
M_ B _ DM0
M_ B _ DQS #6
M_ B _ A 10
1
H 21
M T H3 15 D 11 1
2
3
4
5 6
7
8
9
M_ A _ DM2
M_ B _ DQ 48
M3
M- M A RK 1
M_ A _ DQ 4 3 M_ A _ A 5
M_ B _ DQS #5
H 6
C 44 D4 4
1
H1
M TH 31 5 D1 1 1
2
3
4
5 6
7
8
9
H5
C4 4 D4 4
M_ A _ DQS 4
M_ B _ DQS 2
M_ A _ A 13
? ?
6-34-M52NS-020
M_ A _ DQ 2
M_ A _ DQ 2 9
M_ B _ DQ 21
M_ A _ A 8
M_ A _ DM5
M_ A _ DQ 1 5
M_ B _ DQ 9
M_ B _ DQ 15
M_ B _ DM4
M_ B _ DQ 43
M_ B _ DQ 56
M5
M- MA R K 1
M _B _D M[ 7 : 0 ] [ 1 1 ]
M_ A _ DM6
M_ B _ DQ 54
M_ A _ DQ 3 6
M_ A _ DQ 4 0
M_ A _ DQS #7
H 3
C 44 D4 4
M_ B _ DQS #7
S 1
S MD8 0 X 80
1
1
M_ B _ DQ 0
M H1
H 4_ 0
? ? 6-34-M52GS-020
M_ B _ DQ 33
M 11
M - MA R K 1
M_ A _ DQ 1 0
H 1 8
C 2 17 D8 7
M_ A _ DQ 1 4
M_ A _ DQ 3 8
M_ B _ DQ 44
M_ A B S 0
M_ A _ DQ 2 4
M_ A _ DQS #5
M_ B _ CA S #
H24,H25,H27
M_ A _ DQ 5 8
M_ B _ A 11
M_ A _ DM0
M_ B _ DQ 62
1
H 9
M T H3 15 D 11 1
2
3
4
5 6
7
8
9
1
H1 0
M TH 3 15 D1 1 1
2
3
4
5 6
7
8
9
M_ A _ DQ 4 8
M_ B _ DQ 25
M_ B _ DQS #1
M 4
M - MA R K 1
MH2
H4 _0
M_ B _ RA S #
M _ A B S 0 [ 1 0]
M_ B _ DQ 16
M_ A _ A 14
M_ A _ A 9
M_ A B S 1
M_ A _ DQ 4
M_ A _ DQ 2 2
M_ B _ DQ 49
1
H 15
MT H3 1 5D 11 1 B
2
3 5
4
H1 4
C2 1 7D 11 1
M_ A _ DQ 1
M_ B _ DQ 31
M _ A B S 1 [ 1 0]
M_ B _ DQS 0
M_ B _ DQ 47
M_ B _ DQ 40
M _B B S 1 [ 1 1]
M_ B _ DQ 35
M_ A _ DQS 1
M_ A _ DQ 2 6
M_ B _ DQ 52
M_ A _ DQS #6
M_ A _ DQS 0
M_ B _ A 14
M_ B _ DQ 28
M_ B _ DQ 2
M_ A _ DQS #3
M_ A _ DQ 7
M_ A _ DQ 3 7
M_ B _ DQ 57
M_ B _ DQ 6
1
H1 2
M TH 3 15 D1 1 1 B
2
3 5
4
M _B B S 0 [ 1 1]
M_ A _ DQ 1 9
M_ A _ DQS #1
M_ A _ DQS 7
H 1 9
O 4 0X 1 0 2D 40 X 1 02
1
H1 1
M TH 5 _5 D2 _ 8
2
3
4
5 6
M_ B _ DQS 1
M_ B _ DM2
M_ A _ DQ 5 7
M_ A _ DQ 6 3
M_ A _ DQ 5 1
M_ B _ DQ 10
M_ A _ A 7
02/26
M_ B _ A 5
1
H2
MT H3 1 5 D1 11
2
3
4
5 6
7
8
9
M_ B _ DQS 4
M_ B _ DQ 32
M_ A _ A 2
M1 3
M- M A RK 1
H 25
C 35 5 B 2 64 D 18 6
M_ A _ W E #
M_ B _ DM3
M_ B _ DQ 17
M_ A _ DQ 0
M_ B _ DQ 37
M_ A _ DQ 6 1
M_ B _ DM7
M_ B _ DQ 61
H 8
C 44 D4 4
M _ A _W E # [ 10 ]
M_ A _ DQS 5
M_ A _ DQ 8
M_ A _ DQ 2 5
M_ A _ DQ 4 1
M_ B _ DQ 23
M_ B _ A 8
M_ B _ DQ 13
M_ B _ DQ 22
M_ B _ DQ 8
M_ A _ DM1
M_ A _ DQ 3 3
M_ A _ A 6
M_ A _ DQ 3 1
M_ B _ DQ 55
M_ A _ DQ 3 4
M_ B _ DQ 63
M_ B _ DQ 38
D
D
R

S
Y
S
T
E
M

M
E
M
O
R
Y

B
U1 5 E
CA NT I GA - E B 8 8 CT GM
A K 4 7
A H4 6
B A 4 8
A Y 4 8
A T 4 7
A R4 7
B A 4 7
B C4 7
B C4 6
B C4 4
B G4 3
B F 4 3
A P 4 7
B E 4 5
B C4 1
B F 4 0
B F 4 1
B G3 8
B F 3 8
B H3 5
B G3 5
B H4 0
B G3 9
A P 4 6
B G3 4
B H3 4
B H1 4
B G1 2
B H1 1
B G 8
B H1 2
B F 1 1
B F 8
B G 7
A J 4 6
B C 5
B C 6
A Y 3
A Y 1
B F 6
B F 5
B A 1
B D 3
A V 2
A U 3
A J 4 8
A R 3
A N 2
A Y 2
A V 1
A P 3
A R 1
A L 1
A L 2
A J 1
A H 1
A M4 8
A M 2
A M 3
A H 3
A J 3
A P 4 8
A U4 7
A U4 6
B C1 6
B B 1 7
B B 3 3
B G1 6
A M4 7
A Y 4 7
B D4 0
B F 3 5
B G1 1
B A 3
A P 1
A K 2
A L 47
A V 4 8
B G4 1
B G3 7
B H9
B B 2
A U1
A N6
A L 46
A V 4 7
B H4 1
B H3 7
B G9
B C2
A T 2
A N5
A V 1 7
B A 2 5
B B 1 6
A W 3 3
A Y 3 3
B H1 5
B C2 5
A U2 5
A W 2 5
B B 2 8
A U2 8
A W 2 8
A T 33
B D3 3
A U3 3
A U1 7
B F 1 4
S B _ DQ_ 0
S B _ DQ_ 1
S B _ DQ_ 1 0
S B _ DQ_ 1 1
S B _ DQ_ 1 2
S B _ DQ_ 1 3
S B _ DQ_ 1 4
S B _ DQ_ 1 5
S B _ DQ_ 1 6
S B _ DQ_ 1 7
S B _ DQ_ 1 8
S B _ DQ_ 1 9
S B _ DQ_ 2
S B _ DQ_ 2 0
S B _ DQ_ 2 1
S B _ DQ_ 2 2
S B _ DQ_ 2 3
S B _ DQ_ 2 4
S B _ DQ_ 2 5
S B _ DQ_ 2 6
S B _ DQ_ 2 7
S B _ DQ_ 2 8
S B _ DQ_ 2 9
S B _ DQ_ 3
S B _ DQ_ 3 0
S B _ DQ_ 3 1
S B _ DQ_ 3 2
S B _ DQ_ 3 3
S B _ DQ_ 3 4
S B _ DQ_ 3 5
S B _ DQ_ 3 6
S B _ DQ_ 3 7
S B _ DQ_ 3 8
S B _ DQ_ 3 9
S B _ DQ_ 4
S B _ DQ_ 4 0
S B _ DQ_ 4 1
S B _ DQ_ 4 2
S B _ DQ_ 4 3
S B _ DQ_ 4 4
S B _ DQ_ 4 5
S B _ DQ_ 4 6
S B _ DQ_ 4 7
S B _ DQ_ 4 8
S B _ DQ_ 4 9
S B _ DQ_ 5
S B _ DQ_ 5 0
S B _ DQ_ 5 1
S B _ DQ_ 5 2
S B _ DQ_ 5 3
S B _ DQ_ 5 4
S B _ DQ_ 5 5
S B _ DQ_ 5 6
S B _ DQ_ 5 7
S B _ DQ_ 5 8
S B _ DQ_ 5 9
S B _ DQ_ 6
S B _ DQ_ 6 0
S B _ DQ_ 6 1
S B _ DQ_ 6 2
S B _ DQ_ 6 3
S B _ DQ_ 7
S B _ DQ_ 8
S B _ DQ_ 9
S B _ B S _ 0
S B _ B S _ 1
S B _ B S _ 2
S B _C A S #
S B _D M_ 0
S B _D M_ 1
S B _D M_ 2
S B _D M_ 3
S B _D M_ 4
S B _D M_ 5
S B _D M_ 6
S B _D M_ 7
S B _D QS _ 0
S B _D QS _ 1
S B _D QS _ 2
S B _D QS _ 3
S B _D QS _ 4
S B _D QS _ 5
S B _D QS _ 6
S B _D QS _ 7
S B _ DQS #_ 0
S B _ DQS #_ 1
S B _ DQS #_ 2
S B _ DQS #_ 3
S B _ DQS #_ 4
S B _ DQS #_ 5
S B _ DQS #_ 6
S B _ DQS #_ 7
S B _ MA _ 0
S B _ MA _ 1
S B _ MA _1 0
S B _ MA _1 1
S B _ MA _1 2
S B _ MA _1 3
S B _ MA _ 2
S B _ MA _ 3
S B _ MA _ 4
S B _ MA _ 5
S B _ MA _ 6
S B _ MA _ 7
S B _ MA _ 8
S B _ MA _ 9
S B _ MA _1 4
S B _R A S #
S B _ W E #
? ?
6-34-D90C0-021
M_ A _ DQ 3
M_ A _ DQ 4 4
M_ B _ DQ 20
H 4
C 4 4D 44
M _ A _C A S # [ 1 0 ]
M_ A _ DQ 2 8
M_ A _ DQS #2
M _B _D QS # [ 7 : 0] [ 1 1]
M_ A _ DQS 2
M_ A _ DQ 5 2
M _B _D QS [ 7 : 0 ] [ 1 1 ]
M_ B B S 2
M _B _R A S # [ 1 1]
MH 4
H4 _ 0
Sheet 6 of 40
Cantiga 3/6 -DDR
Schematic Diagrams
B - 8 Cantiga 4/6 - Power
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Cantiga 4/6 - Power

C127 0.47U_10V_04
8.7A
1.05VS
C62
0.1U_10V_X7R_04
1.05VS
VCC_SM_38
C56 0.1U_10V_X7R_04
1. 05VS
SM_LF1
3A
1.05VS [2..5,8,13,16,29]
C63 *0.1U_10V_X7R_04
C52 0.22U_10V_04
1.05VS
C406
10U_6.3V_X5R_08
VCC_SM_38
All trace width are 10mils
All trace width are 10mils
3A
1.05VS
VCC_SM_40
VCC_SM_37
SM_LF4
CLOSE TO GMCH
C405
10U_6.3V_X5R_08
P
O
W
E
R
V
C
C

N
C
T
F
V
C
C

C
O
R
E
U15F
CANTIGA-EB88CTGM
AM32
AC30
AJ29
AK25
AA32
Y32
W32
U32
AM30
AL30
AK30
AG30
AF30
AE30
AL32
W30
V30
AK32
AH29
AG29
AE29
AL28
AK28
AL26
AK26
AJ32
AK24
AH32
AG32
AE32
AC32
AC29
AA29
Y29
W29
V29
U30
AL29
AK29
AH30
AB30
AA30
Y30
AG34
AC34
AB34
AA34
Y34
V34
U34
AM33
AK33
AJ33
AG33
AF33
AE33
AC33
AA33
Y33
W33
V33
U33
AH28
AF28
AC28
AA28
AJ26
AG26
AE26
AC26
AH25
AG25
AF25
AG24
AJ23
AH23
AF23
T32
AK23
VCC_NCTF_1
VCC_NCTF_20
VCC_NCTF_29
VCC_NCTF_42
VCC_NCTF_9
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_2
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_3
VCC_NCTF_30
VCC_NCTF_31
VCC_NCTF_32
VCC_NCTF_38
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_4
VCC_NCTF_43
VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_16
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_NCTF_44
C78
1U_6.3V_04
C94
0. 1U_10V_X7R_04
C69
1U_6.3V_X5R_06
C59
10U_6.3V_X5R_08
C77
10U_6.3V_X5R_08
C420
*220U_4V_D
VCC_SM_36
C58 0.1U_10V_X7R_04
SM_LF2
C407
0.01U_16V_X7R_04
VSS_AXG_SENSE
C117
0.1U_10V_X7R_04
1.8V
C85
0.1U_10V_X7R_04
1.05VS
C65 *0.1U_10V_X7R_04
C76
0.47U_10V_04
VCC_SM_37
C114 1U_6.3V_X5R_06
VCC_SM_42
SM_LF3
1.05VS
C409
150U_4V_B2
C113 *0.1U_10V_X7R_04
SM_LF7
C64 *0.1U_10V_X7R_04
VCC_AXG_SENSE
VCC_SM_42
C73 *0.1U_10V_X7R_04
C68
*330U_2.5V_D3
1. 8V
P
O
W
E
R
V
C
C

S
M
V
C
C

G
F
X
V
C
C

G
F
X

N
C
T
F
V
C
C

S
M

L
F
U15G
CANTIGA-EB88CTGM
AY32
BF31
AW29
BD32
BC32
BB32
BA32
AW32
AV32
AU32
AT32
AR32
AP32
AN32
BH31
BG31
AN33
BG30
BH29
BG29
BF29
BD29
BC29
BB29
BA29
AY29
BH32
AV29
AU29
AT29
AR29
V23
AM21
AL21
AK21
W21
V21
U21
AM20
AK20
W20
V28
U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
W26
AA19
Y19
W19
V19
U19
AM17
AK17
AH17
AG17
AF17
V26
AE17
AC17
AB17
Y17
W17
V17
AM16
AL16
AK16
AJ16
W25
AH16
AG16
AF16
AE16
AC16
AB16
AA16
V25
W24
V24
W23
AP29
BG32
BF32
W28 AP33
Y26
AE25
AB25
AA25
AE24
AC24
AA24
Y24
AE23
AC23
AB23
AA23
AJ21
AG21
AE21
AC21
AA21
Y21
AH20
AF20
AE20
AC20
AB20
AA20
T17
AM15
AL15
AJ15
AH15
AF15
AB15
AV44
BA37
AM40
AV21
AY5
AM10
BB13
T16
AG15
AA15
Y15
V15
U15
AN14
AM14
U14
T14
AJ14
AH14
Y16
W16
V16
U16
BA36
BB24
BD16
BB21
AW16
AW13
AT13
AE15
VCC_SM_10
VCC_SM_20
VCC_SM_30
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_2
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_3
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_2
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_3
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_4
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_5
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55
VCC_AXG_NCTF_56
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8
VCC_AXG_NCTF_9
VCC_SM_35
VCC_SM_4
VCC_SM_5
VCC_AXG_NCTF_1 VCC_SM_1
VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_27
VCC_AXG_28
VCC_AXG_30
VCC_AXG_31
VCC_AXG_33
VCC_AXG_34
VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7
VCC_AXG_26
VCC_AXG_32
VCC_AXG_35
VCC_AXG_36
VCC_AXG_37
VCC_AXG_38
VCC_AXG_39
VCC_AXG_40
VCC_AXG_41
VCC_AXG_42
VCC_AXG_SENSE
VSS_AXG_SENSE
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60
VCC_SM_36/NC
VCC_SM_37/NC
VCC_SM_38/NC
VCC_SM_39/NC
VCC_SM_40/NC
VCC_SM_41/NC
VCC_SM_42/NC
VCC_AXG_29
C60
0. 1U_10V_X7R_04
C112
10U_6.3V_X5R_08
C140 1U_6.3V_X5R_06
VCC_SM_40
C72 0.22U_10V_04
SM_LF6
1.8V [5,8,10,11,30]
SM_LF5
VCC_SM_36
Sheet 7 of 40
Cantiga 4/6 - Power
Schematic Diagrams
Cantiga 5/6 - Power B - 9
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Cantiga 5/6 - Power

1. 0 5 V S [ 2 . . 5 , 7 , 13 , 1 6 , 29 ]
1 . 8 V [ 5, 7 , 1 0 , 11 , 3 0 ]
C3 8 0
0. 01 U_ 1 6 V _X 7 R_ 0 4
C 3 40
1 0 U_ 6 . 3V _X 5 R_ 0 8
C 82
0 . 0 1U _1 6 V _ X7 R _0 4
C5 7
0 . 1U _ 10 V _ X 7R _0 4
C6 35
0. 1 U_ 1 0 V _X 7 R_ 0 4
C 61 7
4 . 7 U_ 6 . 3V _ X 5 R_ 0 6
1 . 0 5V M_ MP L L
1 . 0 5V S
1 . 5V S
L 7 2
0 _0 4 02
L 26
HC B 1 00 5 K F - 1 21 T 2 0 12mils
C 3 41
* 10 U _6 . 3 V _ X5 R_ 0 8
C4 32
10 U_ 6 . 3 V _X 5 R_ 0 8
D03BCN? ? 0 OHM 1. 0 5 V S
C3 9 6
0. 01 U_ 1 6 V _X 7 R_ 0 4
10mils
10mils
1 . 5V S _ Q DA C
3. 3 V S
1. 0 5 V S
10mils
C 34 6
0 . 1 U_ 10 V _ X 7R _ 04
V C C_ HD A
C4 8 0. 47 U_ 1 0 V _0 4
C3 8 4
1 0U _ 6. 3 V _ X 5R _0 8
C6 6
1U _ 6. 3 V _ X 5R _0 6
C5 5
0 . 1U _ 10 V _ X 7R _0 4
10mils
30mils
C1 38
10 0 0P _ 5 0 V _X 7 R_ 0 4
10mils
1 . 0 5V S
1. 0 5 V S
1 . 0 5V M _D P L LB
C4 1 5
10 U _6 . 3 V _ X5 R_ 0 8
C3 5 2
*0 . 1 U_ 1 0V _ X 7 R_ 04
12mils
50mils
C3 8 1
0. 1U _1 0 V _ X7 R_ 0 4
10mils
R2 2 0
0 _0 4
C 34 7
0 . 1 U_ 10 V _ X 7R _ 04
C3 5 0
1 U_ 6 . 3V _ 0 4
1 . 0 5V M_ HP L L
L2 4
HCB 10 0 5K F - 12 1 T 20
C3 61 0. 47 U_ 1 0 V _0 4
C 39 0
0 . 0 1U _ 16 V _ X7 R _0 4
C3 9 4
0. 1U _1 0 V _ X7 R_ 0 4
C 41 7
0 . 1 U_ 10 V _ X 7R _ 04
C3 48 0. 47 U_ 1 0 V _0 4
10mils
12mils
C3 3 9
10 U _6 . 3 V _ X5 R_ 0 8
1 . 8 V _ LV D S
C3 8 9
0. 1U _1 0 V _ X7 R_ 0 4
C3 4 3
2 . 2U _ 6. 3 V _ 0 6
C4 2 3
0 . 1U _ 10 V _ X 7R _0 4
1. 0 5 V M_ P E G P LL
R 2 35 1 0 _0 6
Within 10mils
1 . 0 5 V S
L7
HCB 10 0 5K F - 12 1 T 20
12mils
1. 0 5 V S
C 5 4
0 . 1 U_ 1 0V _X 7 R_ 0 4
0.5A
10mils
1 . 5 V S
1 . 05 V M_ D MI
C6 0 7
1U _ 6. 3 V _ 0 4
C1 0 9
1U _ 6. 3 V _ 0 4
10mils
C4 2 6 0 . 1U _ 10 V _ X 7R _0 4
L2 3
HCB 10 0 5K F - 12 1 T 20
C3 83
0. 1 U_ 1 0 V _X 7 R_ 0 4
C4 2 8
0 . 1U _ 10 V _ X 7R _0 4
3 . 3V S _A T V D A C
C8 1
0. 1U _1 0 V _ X7 R_ 0 4
1.8A
C 4 22
0 . 1 U_ 1 0V _X 7 R_ 0 4
1. 8 V _ T XL V D S
L 2 8
HC B 16 0 8 K F - 1 21 T 25
C3 3 8
10 U _6 . 3 V _ X5 R_ 0 8
02/12
D 17
RB 5 5 1V -3 0
A C
20mils
C6 0 8
1U _ 6. 3 V _ 0 4
C3 4 5
0. 1U _1 0 V _ X7 R_ 0 4
C4 2 4
0. 1U _1 0 V _ X7 R_ 0 4
1 . 8 V
C 61 6
4 . 7 U_ 6 . 3V _ X 5 R_ 0 6
3 . 3V S
02/12
C4 2 5 0 . 1U _ 10 V _ X 7R _0 4
10mils
R3 6 3 *1 0 m i l _ sh o r t
C3 76
1U _6 . 3 V _ X5 R _0 6
1 . 0 5V S
1 . 0 5V M _ A XF
C8 3
0. 1 U _1 0 V _ X7 R_ 0 4
L 9
HC B 1 00 5 K F - 1 21 T 2 0
C3 9 7
0. 1U _1 0 V _ X7 R_ 0 4
C1 3 3
1 0U _ 6. 3 V _ X 5R _0 8
Remove R360
1A
10mils
C4 27
0. 1 U_ 1 0 V _X 7 R_ 0 4
C3 51
*0 . 1U _ 10 V _ X7 R _0 4 1 . 0 5V M _ HP L L
1. 0 5 V S
02/12
10mils
10mils
3 . 3V S [ 5 , 9 . . 16 , 1 8 . . 27 , 3 1 ]
1 . 0 5V M_ DP L L A
1. 5V S
1. 0 5 V M_ P E G P LL
1 . 5 V S _ QDA C
C 39 3
0 . 0 1U _ 16 V _ X7 R _0 4
1 . 0 5V M _ MP L L
C3 44
*1 U_ 6. 3V _ X 5R _ 06
1 . 0 5 V M_ DP L L A
1 . 8V
02/12
C1 4 3
10 0 0 P _5 0 V _ X7 R _0 4
L3 0
HCB 10 0 5K F - 12 1 T 20
C3 4 2
1 U_ 6 . 3V _ X 5 R_ 06
10mils
1 . 0 5V S
C4 3 1 1 0U _ 6. 3 V _ X 5R _0 8
C3 72
*1 0U _6 . 3 V _ X5 R _0 8
1. 0 5 V M_ P E G [ 5 ]
1 . 0 5V M_ DP L L B
C6 0 6
1U _ 6. 3 V _ 0 4
1 . 0 5V S
L2 9 H CB 1 0 0 5K F - 1 2 1 T2 0
C 42 9
0 . 1 U_ 10 V _ X 7R _ 04
Close to U15
10mils
3. 3 V S _ A T V DA C
L2 7
HCB 10 0 5K F - 12 1 T 20
C4 3 0
10 U _6 . 3 V _ X5 R_ 0 8
1 . 8 V _ S MC K
1 . 8 V _T X L V DS
1 . 5V S [ 3 , 13 , 1 4 , 16 , 1 9 , 20 , 2 9 ]
C 3 49
0 . 1 U_ 1 0V _X 7 R_ 0 4
C 4 33
1 0 U_ 6 . 3V _X 5 R_ 0 8
L 7 1
HC B 10 0 5 K F - 12 1 T 20
R3 6 2 * 0 _0 4
R 3 93 0 _ 04
POWER
C
R
T
P
L
L
A

P
E
G
A

S
M
D
T
V
/
C
R
T
L
V
D
S
V
T
T
L
F
V
T
T
A

L
V
D
S
H
D
A
A
X
F
D
M
I
P
E
G
A

C
K
T
V
S
M

C
K
H
V
U 1 5H
C A NT I GA - E B 88 C TG M
V 3
U 3
V 2
U 2
A D 48
A A 48
B 27
A 26
F 47
L 48
A D1
J 48
A E 1
B 24
A 24
A A 47
U 6
T 6
U 5
T 5
T 8
U 7
T 7
A F 1
U 1 3
T 1 3
T 1 2
U 1 1
T 1 1
U 1 0
T 1 0
U 9
T 9
U 8
U 1 2
A P 28
A N 28
A 25
M 25
A 8
L 1
A B 2
A H 4 8
A F 48
B F 21
B H 2 0
B G 2 0
B F 20
M 38
L 28
B 2 2
B 2 1
A 2 1
A R 20
A P 20
A N 20
A R 17
A P 17
A T 16
A R 16
A P 16
K 4 7
J 47
C 3 5
B 3 5
V 4 8
L 37
U 4 8
V 4 7
U 4 7
U 4 6
A N 17
A P 25
A N 25
A N 24
A M 28
A M 26
A M 25
A L 25
A M 24
A L 24
A M 23
T 2
V 1
U 1
A 3 5
A H 4 7
A G 4 7
B 25
A L 23
A 32
V TT _ 1 9
V TT _ 2 0
V TT _ 2 1
V TT _ 2 2
V C CA _ P E G_ B G
V C CA _ P E G_ P L L
V C CA _ CR T_ D A C_ 1
V C CA _ CR T_ D A C_ 2
V C CA _ DP L L A
V C CA _ DP L L B
V C CA _ HP L L
V C CA _ L V DS
V C CA _ MP L L
V C CA _ T V _D A C_ 1
V C CA _ T V _D A C_ 2
V C CD_ P E G _P LL
V TT _ 1 5
V TT _ 1 6
V TT _ 1 7
V TT _ 1 8
V TT _ 1 2
V TT _ 1 3
V TT _ 1 4
V C CD_ H P LL
V T T _ 1
V T T _ 2
V T T _ 4
V T T _ 5
V T T _ 6
V T T _ 7
V T T _ 8
V T T _ 9
V TT _ 1 0
V TT _ 1 1
V T T _ 3
V C CA _ S M_ CK _1
V C CA _ S M_ CK _2
V C CA _ DA C _B G
V C CD_ T V DA C
V T T LF 1
V T T LF 2
V T T LF 3
V C C_ DM I _ 1
V C C_ DM I _ 2
V CC_ S M _C K _ 1
V CC_ S M _C K _ 2
V CC_ S M _C K _ 3
V CC_ S M _C K _ 4
V C CD_ L V DS _ 1
V C CD_ Q DA C
V C C_ A X F _ 1
V C C_ A X F _ 2
V C C_ A X F _ 3
V C CA _ S M_ 1
V C CA _ S M_ 2
V C CA _ S M_ 3
V C CA _ S M_ 4
V C CA _ S M_ 5
V C CA _ S M_ 7
V C CA _ S M_ 8
V C CA _ S M_ 9
V C C_ T X_ L V DS
V S S A _ L V DS
V CC _H V _ 1
V CC _H V _ 2
V CC _P E G _ 1
V C CD_ L V DS _ 2
V CC _P E G _ 2
V CC _P E G _ 3
V CC _P E G _ 4
V CC _P E G _ 5
V C CA _ S M_ 6
V C CA _ S M_ CK _3
V C CA _ S M_ CK _4
V C CA _ S M_ CK _5
V C CA _ S M_ CK _N CT F _ 1
V TT _ 2 3
V TT _ 2 4
V TT _ 2 5
V CC _H V _ 3
V C C_ DM I _ 3
V C C_ DM I _ 4
V S S A _ D A C_ B G
V C C_ HD A
1 . 05 V M_ P E G
1 . 8 V
1 . 0 5 V S
Sheet 8 of 40
Cantiga 5/6 - Power
Schematic Diagrams
B - 10 Cantiga 6/6 - GND
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Cantiga 6/6 - GND

XOR Mode Enabl e
Di sabl e
LOW
R4 0 * 2. 2 K _ 1 %_ 0 4
Lanes Rever sed
R3 8 * 1 0m i l _ s h or t
DMI Lane Reversal
LOW
MCH_CFG13
Reser ved
LOW
MC H_ CF G 1 3 [ 5]
R3 7 * 2. 2 K _ 1 %_ 0 4
LOW :
HIGH:
Enable HIGH:
MC H_ CF G 1 9 [ 5]
Nomal Operation
R3 9 2 . 2 K _ 1% _ 0 4
HIGH
Enable
Nor mal oper at i on
PCIE Loopback Enable
MC H_ CF G 1 0 [ 5]
HI GH
R3 4 * 2. 2 K _ 1 %_ 0 4
LOW :
DMI=4
iTPM Host Interface
R2 2 8 * 2. 2 K _ 1 %_ 0 4
ATMFi r mwar e use TLS ci pher
sui te wi t h no
confi dent i al i t y
Disable
Default
LOW :
HIGH:
3 . 3 V S
HIGH:
R3 1 * 2. 2 K _ 1 %_ 0 4
MCH_CFG12
ATM Firmware use TLS cipher
suite with confidentiality
MC H_ CF G 7 [ 5 ]
Reverse Lane
Default
Digital Display Port
Al l - Z Mode Enabl e
R3 3 * 2. 2 K _ 1 %_ 0 4
HIGH
MC H_ CF G 1 6 [ 5]
R4 6 * 1 0m i l _ s h or t
VSS
U 1 5I
C A NT I G A - E B 8 8C TG M
A U 48
A 2 3
A R 48
A L 48
B B 47
A W 47
A N 47
A J 47
A F 47
A D 47
A B 47
Y 47
T 47
N 47
L 47
G 47
B D 46
B A 46
A V 46
A R 46
A M 46
V 46
R 46
P 46
H 46
F 46
B F 44
A H 44
A D 44
A A 44
Y 44
U 44
T 44
M 44
F 44
B C 43
A V 43
A U 43
A M 43
J 43
C 43
B G 42
A Y 42
A T 42
A N 42
A J 42
A E 42
N 42
L 42
B D 41
A U 41
A M 41
A H 41
A D 41
A A 41
Y 41
U 41
T 41
M 41
G 41
B 41
B G 40
B B 40
A V 40
A N 40
H 40
E 40
A T 39
A M 39
A J 39
A E 39
N 39
L 39
B 39
B H 38
B C 38
B A 38
A U 38
A H 38
A D 38
A A 38
Y 38
U 38
T 38
J 38
F 38
C 38
B D 36
A M3 6
A E 3 6
P 3 6
L 36
J 36
F 3 6
B 3 6
A H3 5
A A 3 5
Y 3 5
U3 5
T 35
B F 3 4
A M3 4
A J 34
A F 3 4
A E 3 4
W 3 4
B 3 4
A 3 4
B G3 3
B C3 3
B A 3 3
A V 3 3
A R3 3
A L 33
A H3 3
A B 3 3
P 3 3
L 33
H3 3
N3 2
K 3 2
F 3 2
C3 2
A 3 1
A N2 9
T 29
N2 9
K 2 9
H2 9
F 2 9
A 2 9
B G2 8
B D2 8
B A 2 8
A V 2 8
A T 28
A R2 8
A J 28
A G2 8
A E 2 8
A B 2 8
Y 2 8
P 2 8
K 2 8
H2 8
F 2 8
C2 8
B F 2 6
A H2 6
A F 2 6
A B 2 6
A A 2 6
C2 6
B 2 6
B H2 5
B D2 5
B B 2 5
A V 2 5
A R2 5
A J 25
A C2 5
Y 2 5
N2 5
L 25
J 25
G2 5
E 2 5
B F 2 4
B F 37
B B 37
A W 37
A T 37
A N 37
A J 37
H 37
C 37
B G 36
A U 36
A T 24
A H2 4
A B 2 4
L 24
A Y 46
G2 4
E 2 4
A G2 3
B 2 3
A Y 2 4
A J 24
A F 2 4
R2 4
K 2 4
J 24
F 2 4
B H2 3
Y 2 3
A K 15
A D1 2
A J 6
V S S _ 1
V S S _ 19 8
V S S _ 2
V S S _ 3
V S S _ 4
V S S _ 5
V S S _ 6
V S S _ 7
V S S _ 8
V S S _ 9
V S S _ 1 0
V S S _ 1 1
V S S _ 1 2
V S S _ 1 3
V S S _ 1 4
V S S _ 1 5
V S S _ 1 6
V S S _ 1 7
V S S _ 1 9
V S S _ 2 0
V S S _ 2 1
V S S _ 2 2
V S S _ 2 3
V S S _ 2 4
V S S _ 2 5
V S S _ 2 6
V S S _ 2 7
V S S _ 2 8
V S S _ 2 9
V S S _ 3 0
V S S _ 3 1
V S S _ 3 2
V S S _ 3 3
V S S _ 3 4
V S S _ 3 5
V S S _ 3 6
V S S _ 3 7
V S S _ 3 8
V S S _ 3 9
V S S _ 4 0
V S S _ 4 1
V S S _ 4 2
V S S _ 4 3
V S S _ 4 4
V S S _ 4 5
V S S _ 4 6
V S S _ 4 7
V S S _ 4 8
V S S _ 4 9
V S S _ 5 0
V S S _ 5 1
V S S _ 5 2
V S S _ 5 3
V S S _ 5 4
V S S _ 5 5
V S S _ 5 6
V S S _ 5 7
V S S _ 5 8
V S S _ 5 9
V S S _ 6 0
V S S _ 6 1
V S S _ 6 2
V S S _ 6 3
V S S _ 6 4
V S S _ 6 5
V S S _ 6 6
V S S _ 6 7
V S S _ 6 8
V S S _ 6 9
V S S _ 7 0
V S S _ 7 1
V S S _ 7 2
V S S _ 7 3
V S S _ 7 4
V S S _ 7 5
V S S _ 7 6
V S S _ 7 7
V S S _ 7 8
V S S _ 7 9
V S S _ 8 0
V S S _ 8 1
V S S _ 8 2
V S S _ 8 3
V S S _ 8 4
V S S _ 8 5
V S S _ 8 6
V S S _ 8 7
V S S _ 9 7
V S S _ 10 0
V S S _ 10 1
V S S _ 10 2
V S S _ 10 3
V S S _ 10 4
V S S _ 10 5
V S S _ 10 6
V S S _ 10 7
V S S _ 10 8
V S S _ 10 9
V S S _ 11 0
V S S _ 11 1
V S S _ 11 2
V S S _ 11 3
V S S _ 11 4
V S S _ 11 5
V S S _ 11 6
V S S _ 11 7
V S S _ 11 8
V S S _ 11 9
V S S _ 12 0
V S S _ 12 1
V S S _ 12 2
V S S _ 12 3
V S S _ 12 4
V S S _ 12 5
V S S _ 12 6
V S S _ 12 7
V S S _ 12 8
V S S _ 12 9
V S S _ 13 0
V S S _ 13 1
V S S _ 13 2
V S S _ 13 3
V S S _ 13 4
V S S _ 13 5
V S S _ 13 6
V S S _ 13 7
V S S _ 13 8
V S S _ 13 9
V S S _ 14 0
V S S _ 14 1
V S S _ 14 2
V S S _ 14 3
V S S _ 14 4
V S S _ 14 5
V S S _ 14 6
V S S _ 14 7
V S S _ 14 8
V S S _ 14 9
V S S _ 15 0
V S S _ 15 1
V S S _ 15 2
V S S _ 15 3
V S S _ 15 4
V S S _ 15 5
V S S _ 15 6
V S S _ 15 7
V S S _ 15 8
V S S _ 15 9
V S S _ 16 0
V S S _ 16 1
V S S _ 16 2
V S S _ 16 3
V S S _ 16 4
V S S _ 16 5
V S S _ 16 6
V S S _ 16 7
V S S _ 16 8
V S S _ 16 9
V S S _ 17 0
V S S _ 17 1
V S S _ 17 2
V S S _ 17 3
V S S _ 17 4
V S S _ 17 5
V S S _ 17 6
V S S _ 17 7
V S S _ 17 8
V S S _ 17 9
V S S _ 8 8
V S S _ 8 9
V S S _ 9 0
V S S _ 9 1
V S S _ 9 2
V S S _ 9 3
V S S _ 9 4
V S S _ 9 5
V S S _ 9 6
V S S _ 9 9
V S S _ 18 2
V S S _ 18 4
V S S _ 18 6
V S S _ 18 8
V S S _ 1 8
V S S _ 19 1
V S S _ 19 3
V S S _ 19 5
V S S _ 19 7
V S S _ 18 1
V S S _ 18 3
V S S _ 18 5
V S S _ 18 7
V S S _ 18 9
V S S _ 19 0
V S S _ 19 2
V S S _ 19 4
V S S _ 19 6
V S S _ 9 8
V S S _ 18 0
V S S _ 19 9
Default
Intel Management Engine Crypto Strap
PCIE Graphics Lane
MC H_ CF G 6 [ 5 ]
MC H_ CF G 9 [ 5 ]
Default
HIGH:
MC H_ CF G 5 [ 5 ]
Default
Default
R5 6 * 1 0m i l _ s h or t
MC H_ CF G 1 2 [ 5]
Normal
LOW :
LOW :
R4 1 * 1 0m i l _ s h or t
Di gi t al Di spl ay Por t
( SDVO/ DP/ i HDMI ) and PCI E
ar e operat i onal si mul t aneousl y
vi a PEGpor t
Default
Di sabl e
R3 6 * 2. 2 K _ 1 %_ 0 4
R5 1 * 4. 0 2 K _ 1% _ 0 4
DMI X2 Select
LOW :
HIGH:
Enabl e
Default
FSB Dynamic ODT
HI GH
Only Digital Display Port
(SDVO/DP/iHDMI) or PCIE
is operational
Default
VSS
V
S
S

N
C
T
F
V
S
S

S
C
B
N
C
U1 5 J
CA N TI G A - E B 8 8C T GM
B G 2 1
A W 2 1
A U 2 1
A P 2 1
A N 2 1
A H 2 1
A F 2 1
A B 2 1
R 2 1
M 2 1
J 2 1
G 2 1
B C 2 0
B A 2 0
A W 2 0
A T 2 0
A J 2 0
A G 2 0
Y 2 0
N 2 0
K 2 0
F 2 0
C 2 0
A 2 0
B G 1 9
A 1 8
B G 1 7
B C 1 7
A W 1 7
A T 1 7
R 1 7
M 1 7
H 1 7
C 1 7
B A 1 6
A U 1 6
A N 1 6
N 1 6
K 1 6
G 1 6
E 1 6
B G 1 5
W 1 5
A 1 5
B G 1 4
A A 1 4
C 1 4
B G 1 3
B C 1 3
B A 1 3
A N 1 3
A J 1 3
A E 1 3
N 1 3
L 1 3
G 1 3
E 1 3
B F 1 2
A V 1 2
A T 1 2
A M 1 2
A A 1 2
J 1 2
A 1 2
B D 1 1
B B 1 1
A Y 1 1
A N 1 1
A H 1 1
Y 1 1
N 1 1
G 1 1
C 1 1
B G 1 0
A V 1 0
A T 1 0
A J 1 0
A E 1 0
A A 1 0
B H 8
B 9
G 9
A D 9
A M 9
A N 9
B C 9
M 1 0
B F 9
A H8
Y 8
L8
E 8
B 8
A Y 7
A U7
A N7
A J7
A E 7
A A 7
N7
J7
B G6
B D6
A V 6
A T6
A C 1 5
A M6
M6
C6
B A 5
A H5
A D5
Y 5
L5
J5
H5
F 5
B E 4
B C3
A V 3
A L3
A F 32
A B 32
V 32
A J3 0
A M2 9
A F 29
A B 29
U2 6
U2 3
A L2 0
V 20
A C1 9
A L1 7
A J1 7
A A 17
U1 7
B H4 8
B H1
A 48
C1
A 3
E 1
D2
C3
B 4
A 5
A 6
A 43
A 44
B 45
C4 6
D4 7
B 47
A 46
F 48
E 48
C4 8
B 48
R3
P 3
B A 2
A R2
A U2
A P 2
F 3
A W 2
A E 2
A F 2
A H2
A J2
A D2
A C2
Y 2
M2
K 2
A M1
A A 1
P 1
H1
B B 8
A V 8
A T 8
U2 4
U2 8
U2 5
U2 9
L 1 2
V S S _1 9 9
V S S _2 0 1
V S S _2 0 2
V S S _2 0 3
V S S _2 0 4
V S S _2 0 5
V S S _2 0 6
V S S _2 0 7
V S S _2 0 8
V S S _2 0 9
V S S _2 1 0
V S S _2 1 1
V S S _2 1 2
V S S _2 1 3
V S S _2 1 4
V S S _2 1 5
V S S _2 1 6
V S S _2 1 7
V S S _2 1 8
V S S _2 1 9
V S S _2 2 0
V S S _2 2 1
V S S _2 2 2
V S S _2 2 3
V S S _2 2 4
V S S _2 2 5
V S S _2 2 6
V S S _2 2 7
V S S _2 2 8
V S S _2 2 9
V S S _2 3 0
V S S _2 3 1
V S S _2 3 2
V S S _2 3 3
V S S _2 3 5
V S S _2 3 7
V S S _2 3 8
V S S _2 3 9
V S S _2 4 0
V S S _2 4 1
V S S _2 4 2
V S S _2 4 3
V S S _2 4 5
V S S _2 4 6
V S S _2 4 7
V S S _2 4 8
V S S _2 4 9
V S S _2 5 0
V S S _2 5 1
V S S _2 5 2
V S S _2 5 5
V S S _2 5 6
V S S _2 5 7
V S S _2 5 8
V S S _2 5 9
V S S _2 6 0
V S S _2 6 1
V S S _2 6 2
V S S _2 6 3
V S S _2 6 4
V S S _2 6 5
V S S _2 6 6
V S S _2 6 7
V S S _2 6 8
V S S _2 6 9
V S S _2 7 0
V S S _2 7 1
V S S _2 7 2
V S S _2 7 3
V S S _2 7 5
V S S _2 7 6
V S S _2 7 7
V S S _2 7 8
V S S _2 7 9
V S S _2 8 0
V S S _2 8 1
V S S _2 8 2
V S S _2 8 3
V S S _2 8 4
V S S _2 9 3
V S S _2 9 2
V S S _2 9 1
V S S _2 9 0
V S S _2 8 9
V S S _2 8 8
V S S _2 8 7
V S S _2 8 5
V S S _2 8 6
V S S _2 9 7
V S S _2 9 8
V S S _2 9 9
V S S _3 0 0
V S S _3 0 1
V S S _3 0 2
V S S _3 0 3
V S S _3 0 4
V S S _3 0 5
V S S _3 0 6
V S S _3 0 7
V S S _3 0 8
V S S _3 0 9
V S S _3 1 0
V S S _3 1 1
V S S _3 1 2
V S S _3 1 3
V S S _2 4 4
V S S _3 1 4
V S S _3 1 5
V S S _3 1 6
V S S _3 1 7
V S S _3 1 8
V S S _3 1 9
V S S _3 2 0
V S S _3 2 1
V S S _3 2 2
V S S _3 2 3
V S S _3 2 4
V S S _3 2 5
V S S _3 2 7
V S S _3 2 8
V S S _3 2 9
V S S _N CT F _ 1
V S S _N CT F _ 2
V S S _N CT F _ 3
V S S _N CT F _ 4
V S S _N CT F _ 5
V S S _N CT F _ 6
V S S _N CT F _ 7
V S S _N CT F _ 8
V S S _N CT F _ 9
V S S _ NC TF _ 1 0
V S S _ NC TF _ 1 1
V S S _ NC TF _ 1 2
V S S _ NC TF _ 1 3
V S S _ NC TF _ 1 4
V S S _ NC TF _ 1 5
V S S _ NC TF _ 1 6
V S S _S CB _ 1
V S S _S CB _ 2
V S S _S CB _ 3
V S S _S CB _ 4
V S S _S CB _ 5
N C_ 2 6
N C_ 2 7
N C_ 2 8
N C_ 2 9
N C_ 3 0
N C_ 3 1
N C_ 3 2
N C_ 3 3
N C_ 3 4
N C_ 3 5
N C_ 3 6
N C_ 3 7
N C_ 3 8
N C_ 3 9
N C_ 4 0
N C_ 4 1
N C_ 4 2
V S S _3 3 0
V S S _3 3 1
V S S _3 3 3
V S S _3 3 6
V S S _3 3 5
V S S _3 3 7
V S S _3 3 2
V S S _3 3 4
V S S _3 4 1
V S S _3 4 0
V S S _3 3 9
V S S _3 3 8
V S S _3 4 2
V S S _3 4 3
V S S _3 4 4
V S S _3 4 5
V S S _3 4 6
V S S _3 4 7
V S S _3 4 8
V S S _3 4 9
V S S _3 5 0
V S S _2 9 4
V S S _2 9 5
V S S _2 9 6
V S S _3 5 1
V S S _3 5 2
V S S _3 5 3
V S S _3 5 4
V S S _2 0 0
MC H_ CF G 2 0 [ 5]
HIGH:
LOW
3 . 3V S [ 5, 8 , 1 0 . . 16 , 1 8. . 27 , 3 1]
LOW :
HIGH:
DMI =2
Configuration
R5 0 * 4. 0 2 K _ 1% _ 0 4
LOW :
Sheet 9 of 40
Cantiga 6/6 - GND
Schematic Diagrams
DDRII CHANNEL A B - 11
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
DDRII CHANNEL A
Sheet 10 of 40
DDRII CHANNEL A

V DD S P D
C1 1 1
1 U_ 6. 3 V _ 0 4
JDIMM_1 Terminator
M_ A _ A 6
M _ A _A 1 1
M _ CS # 1
M_ A _D Q2 9
M_ A _D Q6 1
M_ A _D Q5 6
C 47
0 . 1 U_ 16 V _ 0 4
M _ A _D QS # 3
C1 6 3
*1 50 U _4 V _ B 2
RN 1
8 P 4R X5 6 _0 4
1
2
3
4 5
6
7
8
C8 9 0 . 1 U_ 10 V _ X7 R _0 4
M_ A _D Q2 8
M _ A _D QS 0
RN 20
8 P 4R X5 6 _0 4
1
2
3
4 5
6
7
8
R2 7
10 K _ 04
M _ A _A 4
M _ A _D M3
M _ A _A 0
M _ A B S 2
M_ A _D Q4 1
R 2 8
1 0 K _ 04
D8
RB 5 5 1 V - 30
A C
C1 0 3 0 . 1 U_ 10 V _ X7 R _0 4
M_ A _ A 2
M_ A _D Q2
M _ A _A 1
C1 5 2 1 U_ 6 . 3V _ 0 4
S A 0_ DI M 0
C1 4 7 0 . 1 U_ 10 V _ X7 R _0 4
SO-DIMM 1
M_ A _ DQS [ 7 : 0 ] [ 6]
R8 1
1 K _1 % _0 4
C1 0 6 0 . 1 U_ 10 V _ X7 R _0 4
M_ CS # 1
M_ A _ DQS # [ 7 : 0 ] [ 6]
M_ A _ A 1
M_ A _D Q9
C1 2 9 0 . 1 U_ 10 V _ X7 R _0 4
M_ A _D Q4 2
M _ A _A 7
M _ A _D QS # 6
M_ A _ A 4
M_ A _D Q4 6
M_ A _D Q4 3
M_ C K E 1 [ 5 ]
M _A _ DM [ 7 : 0] [ 6 ]
M_ A B S 0
1 . 8V
I CH_ S MB C L K 0 [ 1 1, 1 5 , 18 ]
M_ A _ A 8
M_ A _D Q2 5
M_ A _D Q3 8
M _C LK _ D DR0 [ 5 ]
M _ A _D QS 4
M _ A _D QS 5
C1 3 0
1 0U _6 . 3 V _ X5 R_ 0 8
C1 2 1 0 . 1 U_ 10 V _ X7 R _0 4
M_ A _D Q2 4
C8 6
1 0U _6 . 3 V _ X5 R_ 0 8
M_ A B S 1 [ 6 ]
M_ OD T 1
C1 2 5 0 . 1 U_ 10 V _ X7 R _0 4
M _ ODT 0
M_ A _D Q1 7
M_ A _D Q2 0
M_ A _D Q5
M _ A _D QS 2
M_ A _D Q6 2
C1 76
1U _6 . 3 V _ 04
V D DS P D [ 1 1 ]
M_ A _D Q4 8
M_ A _D Q3 4
M_ A _ CA S # [ 6 ]
M_ A _D Q4 5
0 . 9V S M
M_ A _D Q1 6
M_ A _D Q5 3
C 17 4
0 . 1 U_ 10 V _ X 7R _0 4
M_ A B S 2 [ 6 ]
M _ A _D M0
RN 17
8 P 4R X5 6 _0 4
1
2
3
4 5
6
7
8
C1 3 5
1 U_ 6. 3 V _ 0 4
M_ A _D Q1 9
C1 6 7
2 . 2U _6 . 3 V _ 06
RN 5
8 P 4R X5 6 _0 4
1
2
3
4 5
6
7
8
M_ C K E 0 [ 5 ]
M_ A _ A 9
M_ A _D Q2 2
M_ CL K _ DD R# 1 [ 5]
M _ A _A 1 2
M_ A _D Q1 0
M_ C S #1 [ 5 ]
C9 0
0 . 1U _ 10 V _ X7 R_ 0 4
RN 3
8 P 4R X5 6 _0 4
1
2
3
4 5
6
7
8
C 1 49
* 0 . 22 U_ 1 6V _ X 7 R_ 06
M_ CK E 0
M_ A _D Q3 7
M_ C S #0 [ 5 ]
M_ A _ A 7
MV R E F _D I M0
M _A _ W E # [ 6 ]
M_ A _D Q5 9
M _ A _A 2
M_ CK E 1
M_ A _ A 1 1
S A 1_ DI M 0
C8 7 1 0 U_ 6. 3 V _ X5 R _0 8
M _ CK E 1
M_ A _D Q3 1
M _ A _D M4
C3 9 1
0 . 1U _1 0 V _ X7 R_ 0 4
M_ A _ A [ 1 4: 0 ] [ 6 ]
M _ A _D M2
20mils
M _ A _A 1 0
M _ A B S 0
M_ A _D Q3 3
M_ A _D Q5 7
C1 3 9
*0 . 2 2 U_ 16 V _ X7 R _0 6
C 38 2
22 0 U_ 4 V _D
M_ OD T 0
M _ A _D M6
M_ A _D Q5 1
M_ A _D Q1 4
M_ A _D Q8
M _A _ DQ [ 63 : 0 ] [ 6 ]
3 . 3V S
M_ A _ RA S #
C9 8 0 . 1 U_ 10 V _ X7 R _0 4
20mils
CLOSE TO JDIMM_1
M _ A _A 6
1 . 8 V
M _ A _A 9
0 . 9 V S M
P M_ E X TT S _ DD R# [ 5 , 1 1]
M_ A _ A 1 3
M_ A _D Q3 6
RN 7
8 P 4R X5 6 _0 4
1
2
3
4 5
6
7
8
C1 4 2 0 . 1 U_ 10 V _ X7 R _0 4
Layout note:
M _ A _D QS 1
C1 73
0. 1 U_ 1 0V _ X 7 R_ 04
M _ A _A 5
M _ A _D M7
M_ A _D Q6 3
C 1 54
1 0 U_ 1 0V _ 0 8
M_ A _D Q5 0
M_ A _D Q5 5
C1 0 1 0 . 1 U_ 10 V _ X7 R _0 4
M _ A _D QS # 4
3 . 3V S [ 5 , 8 , 9, 1 1 . . 1 6, 1 8 . . 27 , 3 1 ]
C1 3 6
0. 1U _1 0 V _X 7 R_ 0 4
C1 4 5
1 U_ 6. 3 V _ 0 4
C 14 4
0 . 1 U_ 10 V _ X7 R _0 4
M _ CS # 0
M_ A _D Q3 9
M_ A _D Q3 5
J D I MM_ 1 B
A S 0A 4 2 1- N 2R N- 4 F
1 12
1 11
1 17
96
95
1 18
81
82
87
1 03
88
1 04
1 99
83
1 20
50
69
1 63
1
2 01
2 02
47
1 33
1 83
77
12
48
1 84
78
71
72
1 21
1 22
1 96
1 93
8
1 8
2 4
4 1
5 3
4 2
5 4
5 9
6 5
6 0
6 6
1 2 7
1 3 9
1 2 8
1 4 5
1 6 5
1 7 1
1 7 2
1 7 7
1 8 7
1 7 8
1 9 0
9
2 1
3 3
1 5 5
3 4
1 3 2
1 4 4
1 5 6
1 6 8
2
3
1 5
2 7
3 9
1 4 9
1 6 1
2 8
4 0
1 3 8
1 5 0
1 6 2
V D D1
V D D2
V D D3
V D D4
V D D5
V D D6
V D D7
V D D8
V D D9
V D D1 0
V D D1 1
V D D1 2
V D DS P D
N C1
N C2
N C3
N C4
N CT E S T
V R E F
G ND0
G ND1
V S S 1
V S S 2
V S S 3
V S S 4
V S S 5
V S S 6
V S S 7
V S S 8
V S S 9
V S S 1 0
V S S 1 1
V S S 1 2
V S S 1 3
V S S 1 4
V S S 1 5
V S S 16
V S S 17
V S S 18
V S S 19
V S S 20
V S S 21
V S S 22
V S S 23
V S S 24
V S S 25
V S S 26
V S S 27
V S S 28
V S S 29
V S S 30
V S S 31
V S S 32
V S S 33
V S S 34
V S S 35
V S S 36
V S S 37
V S S 38
V S S 39
V S S 40
V S S 41
V S S 42
V S S 43
V S S 44
V S S 45
V S S 46
V S S 47
V S S 48
V S S 49
V S S 50
V S S 51
V S S 52
V S S 53
V S S 54
V S S 55
V S S 56
V S S 57
M_ A _D Q1
M_ A _D Q3 0
M_ A _D Q5 4
M_ A B S 2
M_ A _ A 3
M _ A _D QS # 7
C1 6 1
*1 50 U _4 V _ B 2
M_ A _D Q3
M_ CL K _ DD R# 0 [ 5]
M_ A _D Q1 8
1 . 8 V
1 . 8 V
CLOSE TO JDIMM_1
M_ O DT 1 [ 5 ]
0 . 9V S M [ 11 , 3 0 ]
M_ A _ A 0
C1 1 9
4 . 7U _ 6. 3 V _ X5 R_ 0 6
C1 4 8
10 U _1 0 V _0 8
M_ A _D Q0
C1 1 5 0 . 1 U_ 10 V _ X7 R _0 4
C1 2 4
0. 1 U _1 0 V _X 7 R_ 0 4
M_ A B S 0 [ 6 ]
M_ A _D Q2 3
M_ A _ CA S #
M_ A _D Q2 6
M_ A _D Q4 0
M_ A _D Q1 2
M _ A _D M1
M _ A _D QS # 0
M_ A _D Q4
M_ A _ A 5
1 . 8V [ 5, 7 , 8 , 11 , 3 0 ]
M_ A _D Q4 7
M _ A _A 1 4
M _ A _C A S #
M_ A _D Q5 8
M_ A _D Q1 1
M_ O DT 0 [ 5 ]
M _ A _D QS # 2
M_ A _D Q5 2
C1 1 0
0 . 1U _ 10 V _ X7 R _0 4
C9 1
0 . 1U _1 0 V _ X7 R_ 0 4
1 . 8 V
MV R E F _D I M0
I CH_ S MB D A T 0 [ 1 1, 1 5 , 18 ]
R8 0 1 K _ 1% _ 04
M_ A _ A 1 4
M_ A _ A 1 2
M _ A _A 3
M _ A _D QS 3
M _ A _D QS 6
M_ A _D Q4 4
M _ A B S 1
M_ A _D Q1 5
M _ A _D QS # 5
C1 3 2 0 . 1 U_ 10 V _ X7 R _0 4
V D DS P D
M_ A _ A 1 0
M_ A _D Q1 3
C1 3 7 0 . 1 U_ 10 V _ X7 R _0 4
M_ A _D Q2 7
M _ ODT 1
RN 16
8 P 4R X5 6 _0 4
1
2
3
4 5
6
7
8
M_ A _ RA S # [ 6 ]
C9 3 0 . 1 U_ 10 V _ X7 R _0 4
Pl ace one cap close to every 2 pull -up resi stors
t erminated to +VTT_MEM
M _C LK _ D DR1 [ 5 ]
M_ CS # 0
M _ A _A 1 3
M_ A _D Q7
M _ A _W E #
M_ A _ W E #
M _ A _D M5
M_ A _D Q6
M_ A _D Q2 1
C1 5 3
10 U _6 . 3 V _X 5 R_ 0 8
M_ A B S 1
C1 0 0
4 . 7U _6 . 3 V _ X5 R_ 0 6
C4 6
*2 . 2 U_ 6. 3 V _ 0 6
M _ A _A 8
M_ A _D Q4 9
M_ A _D Q3 2
C9 7 0 . 1 U_ 10 V _ X7 R _0 4
M _ CK E 0
C1 2 3
0 . 1U _1 0 V _ X7 R_ 0 4
M _ A _D QS # 1
M _ A _R A S #
J D I MM_ 1 A
A S 0A 4 2 1- N 2 RN- 4 F
1 02
1 01
1 00
99
98
97
94
92
93
91
1 05
90
89
1 16
86
84
85
5
7
1 7
1 9
4
6
1 4
1 6
2 3
2 5
3 5
3 7
2 0
2 2
3 6
3 8
4 3
4 5
5 5
5 7
4 4
4 6
5 6
5 8
6 1
6 3
7 3
7 5
6 2
6 4
7 4
7 6
1 2 3
1 2 5
1 3 5
1 3 7
1 2 4
1 2 6
1 3 4
1 3 6
1 4 1
1 4 3
1 5 1
1 5 3
1 4 0
1 4 2
1 5 2
1 5 4
1 5 7
1 5 9
1 7 3
1 7 5
1 5 8
1 6 0
1 7 4
1 7 6
1 7 9
1 8 1
1 8 9
1 9 1
1 8 0
1 8 2
1 9 2
1 9 4
1 07
1 06
1 08
1 09
1 13
1 10
1 15
79
80
30
32
1 64
1 66
1 95
1 97
2 00
1 98
10
26
52
67
1 30
1 47
1 70
1 85
13
31
51
70
1 31
1 48
1 69
1 88
11
29
49
68
1 29
1 46
1 67
1 86
1 14
1 19
A 0
A 1
A 2
A 3
A 4
A 5
A 6
A 7
A 8
A 9
A 1 0 / A P
A 1 1
A 1 2
A 1 3
A 1 4
A 1 5
A 1 6 _B A 2
DQ 0
DQ 1
DQ 2
DQ 3
DQ 4
DQ 5
DQ 6
DQ 7
DQ 8
DQ 9
DQ 1 0
DQ 1 1
DQ 1 2
DQ 1 3
DQ 1 4
DQ 1 5
DQ 1 6
DQ 1 7
DQ 1 8
DQ 1 9
DQ 2 0
DQ 2 1
DQ 2 2
DQ 2 3
DQ 2 4
DQ 2 5
DQ 2 6
DQ 2 7
DQ 2 8
DQ 2 9
DQ 3 0
DQ 3 1
DQ 3 2
DQ 3 3
DQ 3 4
DQ 3 5
DQ 3 6
DQ 3 7
DQ 3 8
DQ 3 9
DQ 4 0
DQ 4 1
DQ 4 2
DQ 4 3
DQ 4 4
DQ 4 5
DQ 4 6
DQ 4 7
DQ 4 8
DQ 4 9
DQ 5 0
DQ 5 1
DQ 5 2
DQ 5 3
DQ 5 4
DQ 5 5
DQ 5 6
DQ 5 7
DQ 5 8
DQ 5 9
DQ 6 0
DQ 6 1
DQ 6 2
DQ 6 3
B A 0
B A 1
R A S #
W E #
C A S #
S 0 #
S 1 #
C K E 0
C K E 1
C K 0
C K 0#
C K 1
C K 1#
S D A
S C L
S A 1
S A 0
D M0
D M1
D M2
D M3
D M4
D M5
D M6
D M7
D QS 0
D QS 1
D QS 2
D QS 3
D QS 4
D QS 5
D QS 6
D QS 7
D QS 0 #
D QS 1 #
D QS 2 #
D QS 3 #
D QS 4 #
D QS 5 #
D QS 6 #
D QS 7 #
O DT 0
O DT 1
M_ A _D Q6 0
M _ A _D QS 7
Schematic Diagrams
B - 12 DDRII CHANNEL B
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
DDRII CHANNEL B
Sheet 11 of 40
DDRII CHANNEL B

V DD S P D
M_ B B S 0 [ 6 ]
M _B _ DQ 10
C1 6 0
*0 . 2 2U _ 16 V _ X7 R _0 6
C1 3 4
0 . 1U _1 0 V _X 7 R_ 0 4
0 . 9V S M [ 10 , 3 0 ]
M_ B _D M2
C1 08
0. 1 U _1 0 V _X 7 R_ 0 4
R 26
1 0 K _0 4
M_ B _ RA S # [ 6 ]
M _B _ DQ 9
M _B _ DQ 22
M_ B _ DQ S #4 [ 6 ]
C1 1 6
4 . 7U _6 . 3 V _ X5 R_ 0 6
M _B _ DQ 33
M_ B _ A 5
R 78
1 K _ 1% _ 0 4
Layout note:
M_ ODT 2
C1 2 6
4 . 7U _ 6. 3 V _ X5 R_ 0 6
C 1 70
2 . 2 U_ 6 . 3V _ 0 6
M_ B B S 2
C4 1 2 0 . 1 U_ 10 V _ X7 R _0 4
M_ B _ DQ S 3 [ 6 ]
1 . 8V [ 5, 7 , 8 , 10 , 3 0 ]
M _B _ DQ 44
M _ B _A 3
M _B _ DQ 48
C1 2 8
0 . 1U _1 0 V _X 7 R_ 0 4
M _B _ DQ 34
M_ CK E 3
RN 4
8 P 4R X5 6 _0 4
1
2
3
4 5
6
7
8
M_ B _C A S #
M _B _ DQ 49
JDIMM_2 is placed farther
from the GMCH than JDIMM_1
M _B _ DQ 27
M _B _ DQ 50
M _B _ W E # [ 6 ]
M_ B _ DM 3 [ 6 ]
M_ CK E 2
M _B _ DQ 0
M_ B _ DQ S #6 [ 6 ]
RN 18
8 P 4R X5 6 _0 4
1
2
3
4 5
6
7
8
M _B _ DQ 46
M _B _ DQ 31
M _B _ DQ 1
C1 4 1
0. 1 U _1 0 V _X 7 R_ 0 4
M_ B _ DM 4 [ 6 ]
M_ B _ A 4
M_ OD T 3
RN 15
8 P 4R X5 6 _0 4
1
2
3
4 5
6
7
8
M _B _ DQ 53
C1 0 4
0. 1 U _1 0 V _X 7 R_ 0 4
M_ C S #2 [ 5 ]
M _ B _A 4
M_ B _D M1
C1 7 1
1 U_ 6 . 3V _ 0 4
M_ O DT 2 [ 5 ]
C4 1 8 0 . 1 U_ 10 V _ X7 R _0 4
M_ B B S 2 [ 6 ]
M_ B _ DQ S 5 [ 6 ]
M _ B _A 6
M _B _ DQ 20
C9 5
0 . 1U _1 0 V _ X7 R_ 0 4
M_ B _ DQ S 2 [ 6 ]
1 . 8 V
M _B _ DQ 8
M_ B _D M3
M_ B _ CA S #
M_ B _ A 1
JD I MM _2 A
A S 0A 42 1 - N2 A N- 4 F
1 0 2
1 0 1
1 0 0
9 9
9 8
9 7
9 4
9 2
9 3
9 1
1 0 5
9 0
8 9
1 1 6
8 6
8 4
8 5
5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
12 3
12 5
13 5
13 7
12 4
12 6
13 4
13 6
14 1
14 3
15 1
15 3
14 0
14 2
15 2
15 4
15 7
15 9
17 3
17 5
15 8
16 0
17 4
17 6
17 9
18 1
18 9
19 1
18 0
18 2
19 2
19 4
1 0 7
1 0 6
1 0 8
1 0 9
1 1 3
1 1 0
1 1 5
7 9
8 0
3 0
3 2
1 6 4
1 6 6
1 9 5
1 9 7
2 0 0
1 9 8
1 0
2 6
5 2
6 7
1 3 0
1 4 7
1 7 0
1 8 5
1 3
3 1
5 1
7 0
1 3 1
1 4 8
1 6 9
1 8 8
1 1
2 9
4 9
6 8
1 2 9
1 4 6
1 6 7
1 8 6
1 1 4
1 1 9
A 0
A 1
A 2
A 3
A 4
A 5
A 6
A 7
A 8
A 9
A 1 0 / A P
A 1 1
A 1 2
A 1 3
A 1 4
A 1 5
A 1 6 _ B A 2
DQ 0
DQ 1
DQ 2
DQ 3
DQ 4
DQ 5
DQ 6
DQ 7
DQ 8
DQ 9
D Q1 0
D Q1 1
D Q1 2
D Q1 3
D Q1 4
D Q1 5
D Q1 6
D Q1 7
D Q1 8
D Q1 9
D Q2 0
D Q2 1
D Q2 2
D Q2 3
D Q2 4
D Q2 5
D Q2 6
D Q2 7
D Q2 8
D Q2 9
D Q3 0
D Q3 1
D Q3 2
D Q3 3
D Q3 4
D Q3 5
D Q3 6
D Q3 7
D Q3 8
D Q3 9
D Q4 0
D Q4 1
D Q4 2
D Q4 3
D Q4 4
D Q4 5
D Q4 6
D Q4 7
D Q4 8
D Q4 9
D Q5 0
D Q5 1
D Q5 2
D Q5 3
D Q5 4
D Q5 5
D Q5 6
D Q5 7
D Q5 8
D Q5 9
D Q6 0
D Q6 1
D Q6 2
D Q6 3
B A 0
B A 1
R A S #
W E #
C A S #
S 0 #
S 1 #
C K E 0
C K E 1
C K 0
C K 0 #
C K 1
C K 1 #
S D A
S C L
S A 1
S A 0
D M0
D M1
D M2
D M3
D M4
D M5
D M6
D M7
D QS 0
D QS 1
D QS 2
D QS 3
D QS 4
D QS 5
D QS 6
D QS 7
D QS 0 #
D QS 1 #
D QS 2 #
D QS 3 #
D QS 4 #
D QS 5 #
D QS 6 #
D QS 7 #
O DT 0
O DT 1
1 . 8 V
M _C LK _ D DR2 [ 5 ]
M _B _ DQ 15
C4 21
1U _6 . 3 V _ 04
M_ O DT 3 [ 5 ]
M_ B _ A 1 2
M_ CL K _ DD R# 2 [ 5]
M _B _ DQ 59
M_ B B S 0
0 . 9 V S M
C9 9
1U _6 . 3 V _ 04
RN 8
8 P 4R X5 6 _0 4
1
2
3
4 5
6
7
8
M_ B _ DM 6 [ 6 ]
M _ B _A 1
C1 5 0
*0 . 2 2U _ 16 V _ X7 R_ 0 6
20mils
M V RE F _ DI M 1
M _B _ DQ 62
M _B _ DQ 6
M_ B B S 0
M _ B _A 7
M _B _ DQ 11
M _B _ DQ 38
M _B _ DQ 55
M _B _ DQ 52
J DI M M_ 2B
A S 0 A 4 21 - N2 A N- 4F
11 2
11 1
11 7
9 6
9 5
11 8
8 1
8 2
8 7
10 3
8 8
10 4
19 9
8 3
12 0
5 0
6 9
16 3
1
20 1
20 2
4 7
13 3
18 3
7 7
1 2
4 8
18 4
7 8
7 1
7 2
12 1
12 2
19 6
19 3
8
1 8
2 4
4 1
5 3
4 2
5 4
5 9
6 5
6 0
6 6
1 27
1 39
1 28
1 45
1 65
1 71
1 72
1 77
1 87
1 78
1 90
9
2 1
3 3
1 55
3 4
1 32
1 44
1 56
1 68
2
3
1 5
2 7
3 9
1 49
1 61
2 8
4 0
1 38
1 50
1 62
V DD 1
V DD 2
V DD 3
V DD 4
V DD 5
V DD 6
V DD 7
V DD 8
V DD 9
V DD 10
V DD 11
V DD 12
V DD S P D
NC1
NC2
NC3
NC4
NCT E S T
V RE F
GND 0
GND 1
V S S 1
V S S 2
V S S 3
V S S 4
V S S 5
V S S 6
V S S 7
V S S 8
V S S 9
V S S 1 0
V S S 1 1
V S S 1 2
V S S 1 3
V S S 1 4
V S S 1 5
V S S 1 6
V S S 1 7
V S S 1 8
V S S 1 9
V S S 2 0
V S S 2 1
V S S 2 2
V S S 2 3
V S S 2 4
V S S 2 5
V S S 2 6
V S S 2 7
V S S 2 8
V S S 2 9
V S S 3 0
V S S 3 1
V S S 3 2
V S S 3 3
V S S 3 4
V S S 3 5
V S S 3 6
V S S 3 7
V S S 3 8
V S S 3 9
V S S 4 0
V S S 4 1
V S S 4 2
V S S 4 3
V S S 4 4
V S S 4 5
V S S 4 6
V S S 4 7
V S S 4 8
V S S 4 9
V S S 5 0
V S S 5 1
V S S 5 2
V S S 5 3
V S S 5 4
V S S 5 5
V S S 5 6
V S S 5 7
M _B _ DQ 45
M _B _ DQ 51
M_ B _ A [ 1 4: 0 ] [ 6 ]
M_ B _ DQ S 1 [ 6 ]
RN 19
8 P 4R X5 6 _0 4
1
2
3
4 5
6
7
8
C1 02
1U _6 . 3 V _ 04
3 . 3 V S
M_ B B S 1 [ 6 ]
M_ B _ A 3
C 75
*1 5 0U _4 V _ B 2
S A 0_ D I M1
M _B _ DQ 23
M_ B _ A 0
M_ B _ DM 7 [ 6 ]
M_ B _W E #
M _B _ DQ 60
R2 3 7 5 6 _ 04
M_ B _D M5
C3 6 9 *1 0 U_ 6 . 3V _ X 5 R_ 08
C4 1 3 0 . 1 U_ 10 V _ X7 R _0 4
C4 1 1 0 . 1 U_ 10 V _ X7 R _0 4
Layout not e:
1. 8 V
M_ B _ DM 1 [ 6 ]
M_ B _ DQ S 0 [ 6 ]
M _ B _A 2
M _B _ DQ 42
M _B _ DQ 7
M_ B _ DQ S #7 [ 6 ]
M _B _ DQ 21
M_ B _ A 8
C1 2 0
0 . 1U _1 0 V _ X7 R_ 0 4
M_ CL K _ DD R# 3 [ 5]
M _C LK _ D DR3 [ 5 ]
M _B _ DQ 16
M _B _ D Q[ 6 3: 0 ] [ 6]
M _B _ DQ 43
M_ B _ A 2
M_ B _ DQ S #0 [ 6 ]
Place one cap cl ose to every2 pull- up resist ors
terminat ed to +VTT_MEM
M _B _ DQ 3
C1 0 7 0 . 1 U_ 10 V _ X7 R _0 4
M_ B _ DQ S #3 [ 6 ]
M_ B B S 1
M _B _ DQ 12 M _ B _A 1 2
M_ CS # 3
R 25
1 0 K _0 4
M _B _ DQ 35
M _ B _A 5
CLOSE TO JDIMM_2
M_ C K E 2 [ 5 ]
M _B _ DQ 14
M_ CS # 2
M_ B _ A 6
C1 62
10 U_ 6 . 3 V _X 5 R_ 08
M_ C K E 3 [ 5 ]
M_ B _ DM 0 [ 6 ]
M_ B _ A 9
M V RE F _ DI M 1
M_ B _ DQ S #2 [ 6 ]
3 . 3V S [ 5, 8 . . 1 0, 1 2 . . 1 6, 1 8 . . 27 , 3 1 ]
M_ C S #3 [ 5 ]
M _B _ DQ 54
M_ B _ RA S #
I CH_ S MB D A T 0 [ 1 0, 1 5 , 18 ]
M _B _ DQ 37
M_ B _D M4
M _B _ DQ 58
R7 9 1 K _ 1% _ 04
RN 2
8 P 4R X5 6 _0 4
1
2
3
4 5
6
7
8
M_ B _D M0
M _ B _A 1 1
M _B _ DQ 18
M _B _ DQ 39
M_ B B S 2
C4 1 9 0 . 1 U_ 10 V _ X7 R _0 4
C1 5 6
*1 50 U_ 4 V _ B 2
V D DS P D [ 1 0 ]
M _ B _A 1 0
M_ B _ A 1 1
C1 22
10 U_ 6 . 3V _X 5 R_ 08
JDIMM_2 Terminator
M _B _ DQ 4
C4 0 3 0 . 1 U_ 10 V _ X7 R _0 4
M_ CK E 3
1 . 8 V
M _B _ DQ 24
M _B _ DQ 63
I CH_ S MB C L K 0 [ 1 0, 1 5 , 18 ]
C4 1 4 0 . 1 U_ 10 V _ X7 R _0 4
C4 1 0 1 U_ 6 . 3V _ 0 4
16 -5 603 4-4 5A
M_ B _ DQ S 6 [ 6 ]
M_ B B S 1
M_ B _ A 1 0
M _ B _A 1 3
C4 0 2 0 . 1 U_ 10 V _ X7 R _0 4
C1 0 5 0 . 1 U_ 10 V _ X7 R _0 4
M_ B _ DQ S 4 [ 6 ]
M _B _ DQ 28
M _B _ DQ 56
M _B _ DQ 40
M _B _ DQ 29
M_ CS # 3
P M _ E XT T S _D DR # [ 5 , 10 ]
M _B _ DQ 41
M _B _ DQ 5
M _B _ DQ 47
M _B _ DQ 19
M_ B _D M7
M_ CS # 2
M_ CK E 2
C4 0 4 0 . 1 U_ 10 V _ X7 R _0 4
M_ ODT 3
M_ B _ DQ S #1 [ 6 ]
M_ B _ DQ S #5 [ 6 ]
M _B _ DQ 32
SO-DIMM 2
M _B _ DQ 61
M_ B _ A 7
C4 0 8 0 . 1 U_ 10 V _ X7 R _0 4
M _ B _A 8
C1 5 1 0 . 1 U_ 10 V _ X7 R _0 4
M_ B _ DM 2 [ 6 ]
M_ OD T 2
M _B _ DQ 17
M _B _ DQ 36
M_ B _D M6
M _ B _A 0
C4 1 6 0 . 1 U_ 10 V _ X7 R _0 4
M _B _ DQ 26
M_ B _ W E #
M_ B _ A 1 4
M_ B _R A S #
M _ B _A 1 4
M_ B _ DM 5 [ 6 ]
M_ B _ DQ S 7 [ 6 ]
C1 7 7
0 . 1U _1 0 V _ X7 R_ 0 4
C1 7 9
0. 1 U _1 0 V _X 7 R_ 0 4
C 92
*2 2 0U _4 V _ D
M_ B _ CA S # [ 6 ]
M _B _ DQ 57
S A 1_ D I M1
RN 6
8 P 4R X5 6 _0 4
1
2
3
4 5
6
7
8
M _B _ DQ 13
M_ B _ A 1 3
C9 6
0. 1 U_ 1 0 V _X 7 R_ 0 4
C4 0 0 0 . 1 U_ 10 V _ X7 R _0 4
M _ B _A 9
M _B _ DQ 30
M _B _ DQ 2
M _B _ DQ 25
20mils
Schematic Diagrams
Panel, Inverter, CRT B - 13
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Panel, Inverter, CRT

3. 3V
Z 1 10 9
D A C_ GR E E N_ R
S Y S 1 5V [ 2 7 . . 29 ]
C RT _ DDC A CL K _R
Q2 7
2N 70 0 2W
G
D S
11
C2 97
*0 . 1U _ 16 V _ 04
R1 7
1 50 _ 1% _ 0 4
1
CRT _ DD CA CL K _ R
C6 2 2
*1 0 P _ 50 V _ 04
CRT
LV D S - LC LK P [ 5 , 27 ]
8
L V D S - L2 N
L V DS - L CL K P
5
D1 3
*A S D7 5 1V
A C
L V DS - L 1N
CR T_ DD CA C LK
D 7
B A V 9 9
AC
A
C
V I N
C RT _ DDC A DA T _R
3 . 3V [ 2 , 13 . . 1 7, 1 9 , 2 0, 2 3 , 29 , 3 0]
CR T_ H S Y NC
CR T_ DD CA D A T
D1 4 A S D7 5 1 V
A C
R 3 80
* 2 00 _ 06
C3 0 6
*0 . 1 U_ 1 6V _ 0 4
3 . 3 V
R3 9 9 1 K _ 04
R5 7 1 00 K _ 0 4
LV D S - LC LK N [ 5 , 2 7]
LV D S - L2 P [ 5, 2 7 ] C2 7 3
*0 . 1 U_ 16 V _ 0 4
14
GM _ B LO N [ 5 ]
5V S [ 1 3 , 16 , 1 9, 21 , 2 4, 2 5 , 27 ]
DA C_ D DCA D A TA [ 5 ]
3 . 3V S [ 5 , 8 . . 1 1, 1 3 . . 16 , 1 8 . . 27 , 3 1]
C 62 9
* 10 P _ 50 V _ 0 4
D A C_ HS Y NC [ 5 ]
P _ DDC _ CL K [ 5 , 27 ]
R3 7 8
1 M_ 0 4
R1 5
15 0 _1 % _ 04
P _ DD C_ CL K
D6
B A V 99
AC
A
C
C2 93
0. 1 U_ 5 0V _ 0 6
C6 2 3
*1 0 P _5 0 V _0 4
C3 0
47 P _ 50 V _ 0 4
3 . 3 V S
L V DS - L 2P
Q2 6
2N 70 0 2W
G
D S
D1
*B A V 9 9
AC
A
C
6
For CCFL Panel only
LV D S - L2 N [ 5 , 27 ]
U1 0C
74 L V C0 8 P W
9
10
8
14
7
LV D S - L0 P [ 5, 2 7 ]
CRT _ DD CA DA T _ R
R 38 2
* 10 0 K _0 4
L 2 1
H CB 1 60 8 K F - 1 21 T 25
40 mil
CRT _ HS Y NC_ R
C 61 8
*0 . 1 U_ 1 6V _ 0 4
C6 28
*1 0P _ 5 0V _ 0 4
V I N [ 2 7. . 3 2 ]
J_INV1
3 . 3V S
C3 1 4
2 2P _ 5 0V _0 4
5V S
PANEL
P L V DD
LV D S - L0 N [ 5 , 27 ]
C 28
1 0 00 P _ 5 0V _ X 7R _0 4
C6 1 9
0 . 02 2 U_ 25 V _ X 7R _0 6
R 1 4
1 5 0 _1 % _0 4
R1 8 4
*1 M_ 0 4
R1 6 4 2 . 2 K _ 04
15
D A C_ V S Y N C [ 5]
L I D _S W # [ 1 9 , 26 ]
CRT _ V S Y N C
Q1 7
2 N7 00 2 W
G
D S
1
DA C_ R E D [ 5]
C L_ P W R OK [ 5 , 15 , 1 7 , 26 ]
P _ DD C_ DA T A U1 0A
74 L V C0 8 P W
1
2
3
1
4
7
B R I GHT N E S S [ 2 6, 2 7 ]
L 6 2 F CM1 0 05 K F - 1 2 1T 0 3
D5
B A V 9 9
AC
A
C
J _ LC D1
8 8 10 7 - 20 0 0 1
1 2
3 4
5 6
7 8
9 10
1 1 12
1 3 14
1 5 16
1 7 18
1 9 20
C2 5
22 0 P _ 50 V _ 04
D2
*B A V 9 9
AC
A
C
CR T_ D DCA D A T
L V DS - L 0N
Q 23
DT C1 1 4E U A
C
E
B
2
C1
0. 1 U _1 6 V _0 4
Zo=55 Ohm
2A
L V D S - L0 P
L V DS - L CL K N
CRT _ V S Y N C_ R
L 6 3 F CM1 0 05 K F - 1 2 1T 0 3
3. 3V
P LV D D
LV D S - L1 P [ 5, 2 7 ]
R3 79
20 0 _0 6
Q2 5
2 N7 0 02 W G
D
S
R1 6 3 2 . 2 K _ 04
E N A V DD [ 5 ]
R1 8 7 *1 0 0 K _0 4
L V D S - L0 N
9
L 6 0 F CM1 0 05 K F - 1 2 1T 0 3
C1 9
2 20 P _ 5 0V _ 0 4
R1 9 1 2 . 2 K _0 4
L V D S - L1 N
C RT _ V S Y NC _R
R3 9 8 1 K _ 04
D A C_ B L UE _ R
2A
3
U1 0 B
7 4L V C0 8 P W
4
5
6
14
7
INVERTER CONNECTOR
3. 3 V S
12
5V S
L V DS - LC LK P
CR T_ D DCA C LK
C3 07
0. 1 U_ 1 6V _0 4
6- 2 0- 4 1A 10- 106
J_CRT1 Solder side
P L V DD [ 2 7]
C RT _ HS Y N C_ R
L 6 1 F CM1 0 05 K F - 1 2 1T 0 3
D A C_ B L UE [ 5 ]
S Y S 1 5V
Q2 2
S I 34 5 6B DV - T 1- E 3
3
2
1
4
5
6
G
D
D
S
D
D
Q2 4
2 N7 0 02 W
G
D
S
U1 0 D
7 4L V C0 8 P W
1 2
1 3
1 1
14
7
Zo=55 Ohm
5V S
L V D S - L1 P
D 3
* B A V 9 9
AC
A
C
C6 2 7
*1 0 P _5 0 V _0 4
D A C_ RE D _R
R3 8 1
*1 0 0K _ 0 4
DA C_ GR E E N [ 5 ]
C3 10
22 P _ 5 0V _ 0 4
Q1 6
2 N7 00 2 W
G
D S
L V DS - L 1P
P _ DD C_ DA T A
R3 7 7
1 M_ 04
L V DS - L 2N
R1 9 0 2 . 2 K _0 4
R3 92 4 7K _ 0 4
3. 3 V
10
4
3 . 3 V S
D3 1 A S D 75 1 V
A C
C 27
4 7 P _5 0 V _ 04
7
2A
5 V S
I N V _ B LO N [ 27 ]
S B _ B LO N [ 1 5]
P _ DD C_ CL K
L 6 4 F CM1 0 05 K F - 1 2 1T 0 3
3 . 3V S
L V DS - L 0P
C 30 0
* 0. 1 U _5 0 V _0 6
J _ I NV 1
87 2 1 2- 0 6 G0
1
2
3
4
5
6
R1 8 8 2 . 2 K _0 4
13
V I N_ I NV
CRT _ HS Y N C
LV D S - L1 N [ 5 , 27 ]
L 6 5 F CM1 0 05 K F - 1 2 1T 0 3
C3 4
47 P _ 5 0V _ 0 4
S Y S 1 5V
C6 2 6
*1 0 P _ 50 V _ 04
6
L V D S - L2 P
Zo=50 Ohm
DA C_ D DCA C LK [ 5 ]
R1 8 9 2 . 2 K _0 4
D 4
* B A V 99
AC
A
C
B K L _E N [ 2 6]
J_ CR T1
C1 0 50 9 - 91 5 0 5- L
8
7
6
5
4
3
2
1
9
1 0
1 1
1 2
1 3
1 4
1 5
G
N
D
2
G
N
D
1
P _ DDC _ DA T A [ 5 , 2 7]
CR T_ V S Y NC
C 62 5
* 10 P _ 50 V _ 0 4
L 6 6 F CM1 0 05 K F - 1 2 1T 0 3
C6 24
*1 0P _ 5 0V _ 0 4
L V DS - LC LK N
C 31 7
2 2 P _5 0 V _0 4
C 18
1 0 00 P _ 5 0V _ X 7R _0 4
Sheet 12 of 40
Panel, Inverter,
CRT
Schematic Diagrams
B - 14 ICH9-M 1/5 - SATA
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
ICH9-M 1/5 - SATA

A Z _ B I TC L K
R2 5 7 54 . 9 _ 1% _ 0 4
Zo= 55O? 5%
R 1 20 1 0 K _ 04
R 94 1M _0 4
R2 6 2 56 _ 0 4
35mi l
R 24 5 1 K _ 04
C 45 3
0 . 1 U_ 1 6V _0 4
MD C_ A Z _ S Y N C [ 1 9]
X4
3 2 . 7 68 K Hz
1
4 3
2
1 . 0 5 V S
H _I N I T # [ 2 ]
C lea r CM OS
1. 0 5 V S [ 2 . . 5, 7 , 8 , 1 6 , 29 ]
3. 3 V [ 2 , 1 2, 1 4 . . 1 7, 19 , 2 0, 23 , 2 9 , 30 ]
I C H_ DP S L P #
G P I O5 6
H_ D P RS T P #
R 12 3 3 3 _0 4
R3 1 8 *1 0 K _0 4
P I N G ND 1 ~ 2 = G ND
S A T A _ RX N0
R 96 33 2 K _ 1% _ 06
K B C _R S T #
GL A N_ C LK
C4 9 6 1 5 P _ 50 V _ 0 4
A Z _S D OU T
RT CR S T #
S RT CR S T #
C1 7 2
1 U_ 6 . 3V _ 0 4
P M _ TH RM TR I P # [ 2 , 5 , 28 ]
C 6
0 . 1 U_ 1 6V _ 0 4
R 1 35 * 1K _ 0 4
I C H_ DP R S TP #
S A T A _ T XP 0
SATA HDD
Z diff= 10 0O? 0%
RT C V CC
C 1 2
0 . 1 U_ 1 6 V _0 4
1.0A
S B _ MU T E # [ 2 5 ]
H DA _ S DI N 3
I NT RU DE R #
R 9 5
2 0 K _ 1% _ 0 4
L P C _F R A ME # [ 19 , 2 6 ]
3. 3 V S [ 5 , 8 . . 1 2, 1 4 . . 1 6, 1 8 . . 2 7 , 31 ]
S A T A _ T XP 0
R3 2 4 *1 0 K _0 4
C1 69
1U _6 . 3 V _ 04
C 2 31 0 . 01 U_ 1 6 V _X 7 R_ 0 4
LP C_ A D0 [ 1 9 , 2 6]
A Z _ S D OU T
S A T A _ RX N1 [ 1 9]
GP I O 56
H _ S TP C L K # [ 2 ]
LP C_ A D3 [ 1 9 , 2 6]
J _ HD D1
C1 6 6 23 - 1 22 A 4
S 1
S 2
S 3
S 4
S 5
S 6
S 7
P 1
P 2
P 3
P 4
P 5
P 6
P 7
P 8
P 9
P 1 0
P 1 1
P 1 2
P 1 3
P 1 4
P 1 5
3 . 3V
L P C _A D 1 [ 1 9 , 26 ]
R2 5 8
2 4 . 9_ 1 % _0 4
C 5 13 0 . 01 U_ 1 6 V _X 7 R_ 0 4
A Z _ S DI N 1 [ 1 9]
H _ A 20 M# [ 2]
R3 1 9 *1 0 K _0 4
H _ S MI # [ 2 ]
R3 2 6 24 . 9 _ 1% _ 0 4
C1 1
0 . 1U _1 6 V _ 0 4
3 . 3 V S
A Z _S Y NC
D 9
A S D7 5 1 V
A C
M DC _A Z _R S T # [ 1 9 ]
R 1 24 1 0 K _ 04
C L K _S A T A [ 1 8]
3. 3 V S
C1 3
1U _ 10 V _ 0 6
R 2 56 * 56 _ 0 4 C4 8 3 1 5 P _ 50 V _ 0 4
5 V S [ 1 2, 1 6 , 1 9, 2 1 , 2 4, 25 , 2 7]
A Z _ S D OU T
25mi l
V DD 3 [ 2 1 , 26 . . 3 0 , 32 ]
G A 2 0 [ 2 6]
I CH _I NT V RM E N
C2 9 4
*1 0 0U _6 . 3 V _ B 2
MDC _ A Z _ S DOU T [ 19 ]
Within 500mil
MDC _ A Z _ B I TC L K [ 19 ]
C 2 32 0 . 01 U_ 1 6 V _X 7 R_ 0 4
C 5 21 0 . 01 U_ 1 6 V _X 7 R_ 0 4
5mil
C 5 10 0 . 01 U_ 1 6 V _X 7 R_ 0 4
A UD _A Z _ B I T CL K [ 24 ]
P M_ TH RM TR I P #
RT C_ X 2
A Z _ RS T #
C 5 31 0 . 01 U_ 1 6 V _X 7 R_ 0 4
R 13 9 3 3 _0 4
H _F E RR#
R 2 91
1 0 M_ 0 4
C 2 33 0 . 01 U_ 1 6 V _X 7 R_ 0 4
S A T A _ RX P 1 [ 1 9]
H _F E RR# [ 2]
K B C _ RS T #
VERY CLOSE TO ICH9M
S B _ T HR MT RI P #
LA N_ TX D 1
R 2 55 5 6 _0 4
J CB A T 1
8 52 0 5 - 02 0 0 1
2
1
2
S B _ M UT E #
20mils
H _D P S L P # [ 2 ]
LA N_ TX D 0
S A T A _ T XN 0
A Z _ S DI N 0 [ 2 4]
I C H_ F E RR #
R 13 3 3 3 _0 4
R 12 5 3 3 _0 4
RT C_ X 1
R 2 50 5 6 _0 4
S A T A _T X N1 [ 19 ]
RT C V CC [ 1 6 ]
C1 4
0 . 1U _1 6 V _ 0 4
H _ I NT R [ 2]
I NT RU DE R #
1
L P C _A D 2 [ 1 9 , 26 ]
GA 20
R 13 8 3 3 _0 4
H _D P RS T P # [ 2, 5 , 3 1 ]
C 2 13
1 U _6 . 3 V _ 04
C L K _S A T A # [ 18 ]
S RT CR S T #
R 3 48 1 0 K _ 04
H _ I GNN E # [ 2 ]
L P C _D RQ 0#
R
T
C
L
A
N

/

G
L
A
N
I
H
D
A
S
A
T
A
L
P
C
C
P
U
U2 3 A
I C H9 M- NH8 2 8 01 I B M
C 23
C 24
B 22
C 22
E 25
C 13
F 14
G 13
D 14
D 13
D 12
E 13
A F 6
A H4
A E 7
A F 4
A G4
A H3
A G5
A G8
A J 16
A H 16
A F 17
A G 17
A H 13
A J 13
A G 14
A F 14
A H1 8
A J1 8
A J7
A H7
K 5
K 4
L6
K 2
J3
J1
K 3
N7
A J2 7
A J2 5
A E 23
A J2 6
A D2 2
A F 25
A E 22
A G2 5
L3
A F 24
A F 23
A H2 7
A G2 6
A 25
B 10
B 27
B 28
A E 5
A G1 2
A H1 1
A F 12
A J1 1
A G2 7
A G7
A E 8
A 22
A H9
A J9
A E 10
A F 10
F 20
R TC X1
R TC X2
I N TV R ME N
I N TR UD E R#
G LA N _ CL K
L A N_ R S TS Y NC
L A N_ R XD 0
L A N_ R XD 1
L A N_ R XD 2
L A N_ T X D0
L A N_ T X D1
L A N_ T X D2
H DA _ B I T _C L K
H DA _ S Y N C
H DA _ RS T #
H DA _ S DI N 0
H DA _ S DI N 1
H DA _ S DI N 2
H DA _ S DO UT
S A T A L E D#
S A T A 0 RX N
S A T A 0 RX P
S A T A 0 T XN
S A T A 0 T XP
S A T A 1 RX N
S A T A 1 RX P
S A T A 1 T XN
S A T A 1 T XP
S A T A _ CL K N
S A TA _ C LK P
S A T A RB I A S #
S A T A RB I A S
F W H 0/ L A D 0
F W H 1/ L A D 1
F W H 2/ L A D 2
F W H 3/ L A D 3
L DR Q0 #
L D RQ1 # / GP I O2 3
F W H4 / L F RA M E #
A 20 G A TE
A 2 0M #
DP R S T P #
D P S L P #
F E RR #
CP UP W R GD
I G NN E #
I NI T #
I NT R
R CI N #
S M I #
NMI
S TP C L K #
T H RMT R I P #
R TC RS T #
G P I O5 6
G LA N _ COM P O
G LA N _ COM P I
H DA _ S DI N 3
S A T A 4 TX N
S A T A 4 RX N
S A T A 4 T XP
S A TA 4 R XP
T P 1 2
H DA _ DO CK _ E N# / G P I O3 3
H DA _ DO CK _ RS T # / GP I O 3 4
L A N1 0 0 _S L P
S A T A 5 RX N
S A TA 5 R XP
S A T A 5 TX N
S A T A 5 T XP
S R TC RS T #
Layout Note:
LA N_ RX D1
S A T A _ RX N0
H _D P RS T P #
K B C_ RS T # [ 2 6 ]
S A T A _ T XN 0
LA N_ TX D 2
H DA _ S DI N 2
H_ F E R R#
D 10
A S D7 5 1 V
A C
R 13 0 3 3 _0 4
1 . 5 V S
C 2 34 0 . 01 U_ 1 6 V _X 7 R_ 0 4
H _ P W RG D [ 2]
S B _ M UT E #
S A T A _ RX P 0
H_ D P S LP #
RT CV C C
A U D_ A Z _ S Y NC [ 2 4]
5 V S
A U D_ A Z _ RS T # [ 2 4, 2 5 ]
C 2 2
1 0 U_ 1 0 V _0 8
A Z _ S Y N C
R 1 29 1 0 K _ 04
JCBAT
S A T A _L E D # [ 19 ]
R T C_ X 2
P M _ TH RM TR I P #
LA N_ RS T S Y N C
R2 6 3 * 10 m i l _ s ho r t
V DD 3
A Z _R S T #
R2 6 1 * 10 m i l _ s ho r t
RT CR S T #
R T C_ X 1
R3 2 5 *1 0 K _0 4
JO P E N1
*O P E N_ 3 5m i l
R9 3 * 10 m i l _ s ho r t
R 12 6 3 3 _0 4
1.5A
L DR Q1 #
R 2 54 * 56 _ 0 4
G A 2 0
C2 1
10 U_ 1 0 V _0 8
A UD _A Z _ S D OU T [ 24 ]
H DA _ DO CK _ E N #
S A T A _ RX P 0
I C H_ I NT V R ME N
R 13 1 3 3 _0 4
LA N_ RX D0
R TC V CC
H _D P S L P #
A Z _B I T C LK
LA N_ RX D2
S A T A _T X P 1 [ 19 ]
H _ NMI [ 2 ]
R7 6
2 0K _1 % _0 4
1. 5 V S [ 3 , 8, 14 , 1 6, 19 , 2 0 , 29 ]
Sheet 13 of 40
ICH9-M 1/5 - SATA
Schematic Diagrams
ICH9-M 2/5 - PCIE, PCI, USB B - 15
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
ICH9-M 2/5 - PCIE, PCI, USB

Within 500 mils
LPC(default)
1 . 5V S
P CI _ I N T# F
RN 3 5
8 P 4R X 8. 2 K _ 0 4
1
2
3
4 5
6
7
8
Remove C164
PCI_GNT#0
P CI _ C / B E #0
P CI _ A D2
P CI _ A D2 3
P CI _ A D2 6
CLGPIO5
P CI E _ R XP 1 _ W LA N [ 2 0]
P CI _ P E RR #
C 1 75 *3 3P _ 5 0 V _0 4
R4 07 *3 3 _0 4
US B _ P N4 _ NE W [ 20 ]
US B _ P P 4 _N E W [ 2 0 ]
P CI E _ T X P 3_ C
DMI _ R XP 3 [ 5]
US B _ P N0 [ 2 1 ]
P CI _ A D1 4
US B _O C# 9
US B _ OC #7
S P I _ CS 1 #_ R
R3 76
0_ 0 4
P ME # [ 26 ]
P CI _ A D1
No stuf f
CL GP I O 5 [ 15 ]
U3
MX 2 5L 1 6 05 A 1 6M
1
2
3
4
5
6
7
8
CE #
S O
W P #
V S S
S I
S CK
HOL D#
V DD
R3 7 5 * 0 _0 4
Stuff
R1 1 5 *8 . 2 K _ 04
P CI _ I NT # D
P CI _ DE V S E L #
P CI _ A D2 8
P CI _ F RA M E #
SPI_SI
Enabl e
DMI _ T X P 0 [ 5 ]
RN 3 4
8 P 4R X 8. 2 K _ 0 4
1
2
3
4 5
6
7
8
iTPM Enable
P CI E _ RX P 3 _3 G [ 19 ]
P CI E _ T X P 2_ C
S P I _ S CL K
P CI _ G NT #1
S P I _ S I _R
C4 5 4 0 . 1 U_ 10 V _ X 7R _0 4
PC I_G NT# 3
3 . 3V S
US B _ OC #1 1
3 . 3V S [ 5 , 8 . . 13 , 1 5 , 16 , 1 8 . . 27 , 3 1]
P CI _ G NT #0
P CI _ LO CK #
P CI _ S TO P #
DMI _ T X P 1 [ 5 ]
P CI _ A D1 0
2
R1 2 8 * 10 0 K _ 04
Strap
P CI E _ T XN 1_ W L A N [ 20 ]
S P I 1 _S C LK _ R
P CI _ A D2 2
P CI _ G NT 2#
P CI _ R E Q# 0
No stuff
No stuff
DMI _ T X N3 [ 5 ]
P CI _ G NT #3
P CI _ R E Q# 2
DMI _ R XN 3 [ 5 ]
P CI _ I NT # C
RN 1 2
8 P 4R X 8. 2 K _ 0 4
1
2
3
4 5
6
7
8
Z diff= 90O? 5 %
1 . 5V S [ 3, 8 , 1 3 , 16 , 1 9 , 20 , 2 9]
P CI _ P A R
P CI E _ T X N3 _C
US B _ OC #2
3 . 3V [ 2, 1 2 , 1 3, 1 5 . . 1 7, 1 9 , 20 , 2 3 , 29 , 3 0]
R7 7 33 _ 0 4
C4 6 1 0 . 2 2U _1 6 V _ X7 R_ 0 6
US B _ P N7 _ CC D [ 1 9 ]
10
P CI E _T X N4 _L A N [ 2 3 ]
DMI _ R XN 0 [ 5 ]
P CI _ R S T#
P L T _ RS T #
S P I _ C S 0# _ R
R8 9 33 _ 0 4
US B _ P P 7 _C CD [ 1 9]
P CI _ A D6
R 75
3 . 3K _ 1 % _0 4
US B _ P N3 [ 1 9 ]
US B _ P N5 _ 3G [ 1 9 ]
P CI _ A D2 9
R1 4 8 1 K _ 0 4
J_SBSPI1
P CI E _ R XN 2_ N E W _C A RD [ 2 0 ]
S B S P I _ HO L D#
P CI _ L OC K #
P CI _ I RD Y #
C4 5 7 0 . 1 U_ 10 V _ X 7R _0 4
C4 5 9 0 . 1 U_ 10 V _ X 7R _0 4
R 40 8
*3 . 3 K _ 1% _ 04
S P I _ S I
US B _ OC #0 1 [ 21 ]
US B _ P P 2 _M I NI [ 20 ]
P CI _ P E R R#
US B _O C# 11
S P I _ CS 0 #_ R
R1 4 5 * 10 _ 0 4
C4 6 0 0 . 2 2U _1 6 V _ X7 R_ 0 6
Z diff= 100O? 5%
No stuf f
P CI _ I NT # E
S B S P I _ W P # _ R
CL K _ P CI E _ I CH # [ 18 ]
US B _ P P 3 [ 1 9 ]
S B S P I _ W P # _ R
P CI _ A D1 5
S P I _ S I
P CI _ I NT # D
C4 5 8 0 . 1 U_ 10 V _ X 7R _0 4
RN 1 3
8 P 4R X 8. 2 K _ 0 4
1
2
3
4 5
6
7
8
RN 1 4
8 P 4R X 10 K _ 04
1
2
3
4 5
6
7
8
3. 3 V M _S B S P I 1
P C I E _ TX P 3 _3 G [ 1 9 ]
iTPM Enable
P CI E _ T X N5 _C
P CI E _ T XN 5_ CA R D [ 22 ]
R3 5 1 1 0K _ 0 4
C4 5 5 0 . 1 U_ 10 V _ X 7R _0 4
C4 5 6 0 . 1 U_ 10 V _ X 7R _0 4
PCI
I nt er r upt I / F
U2 3 B
I CH 9M - NH 82 8 0 1I B M
D1 1
C 8
D 9
E 1 2
E 9
C 9
E 1 0
B 7
C 7
C 5
G1 1
F 8
F 1 1
E 7
A 3
D 2
F 1 0
D 5
D1 0
B 3
F 7
C 3
F 3
F 4
C 1
G 7
H 7
D 1
G 5
H 6
G 1
H 3
F 1
G4
B 6
A 7
F 13
F 12
E 6
F 6
D8
B 4
D6
A 5
D3
E 3
R1
C6
E 4
C2
J4
A 4
F 5
D7
C1 4
D4
R2
J 5
E 1
J 6
C 4 G2
F 2
K 6
H4
A D0
A D1
A D2
A D3
A D4
A D5
A D6
A D7
A D8
A D9
A D1 0
A D1 1
A D1 2
A D1 3
A D1 4
A D1 5
A D1 6
A D1 7
A D1 8
A D1 9
A D2 0
A D2 1
A D2 2
A D2 3
A D2 4
A D2 5
A D2 6
A D2 7
A D2 8
A D2 9
A D3 0
A D3 1
R E Q0 #
GNT 0 #
RE Q 1 #/ G P I O5 0
G NT 1 #/ G P I O5 1
RE Q 2 #/ G P I O5 2
G NT 2 #/ G P I O5 3
RE Q 3 #/ G P I O5 4
G NT 3 #/ G P I O5 5
C/ B E 0 #
C/ B E 1 #
C/ B E 2 #
C/ B E 3 #
I RDY #
P A R
P C I RS T #
DE V S E L #
P E RR #
P L OC K #
S E RR #
S TO P #
T RDY #
F RA M E #
P L T RS T #
P CI C L K
P M E #
P I RQ A #
P I RQ B #
P I RQ C#
P I RQ D# P I RQ H# / GP I O 5
P I RQ G# / GP I O 4
P I R QF # / GP I O 3
P I R QE # / GP I O 2
P CI _ I N T# E
Di sabl e
01
P CI _ S T OP #
P CI _ I NT # C
DMI _ T X P 2 [ 5 ]
P CI _ TR DY #
S P I 1 _S I _ R
Default
Within 500 mils
P CI E _ R XN 1_ W L A N [ 2 0]
P CI _ A D1 6
P CI E _ T X P 5_ C
3 . 3V S
CL K _ P CI E _ I CH [ 1 8]
P CI _ A D1 1
S P I _S I
P C I E _ RX P 4_ L A N [ 2 3 ]
US B _ O C# 3 [ 1 9 ]
Stuff
A16 swap override Strap
P CI _ A D1 9
P CI _ A D3 1
C 1 66 *3 3P _ 5 0 V _0 4
US B _ P N1 [ 2 1 ]
P C I E _ RX N4 _L A N [ 2 3 ]
US B _ P N9 _ B T [ 1 9]
S P I _ S O_ R
P CI _ A D1 2
S B S P I _ HO L D#
R8 6 * 1K _0 4
1
3 . 3V M_ S B S P I 1
DMI _ R XP 1 [ 5]
P C I E _ TX N3 _ 3 G [ 1 9 ]
R 41 1
*3 . 3 K _ 1% _ 04
P CI _ A D2 1
P CI E _ T X N2 _C
P CI _ RE Q #0
US B _ OC #4
C4 6 2 0 . 1 U_ 10 V _ X 7R _0 4
P CI _ A D1 7
P CI _ RE Q #1
R3 4 6 2 2 . 6 _1 % _ 04
R4 09 *3 3 _0 4
C4 6 3 0 . 1 U_ 10 V _ X 7R _0 4
P CI _ A D2 5
P CI _ A D1 8 C2 6 4 *1 0 P _ 50 V _ 04
3 . 3V
P CI _ A D7
C1 65
0. 1 U_ 1 6 V _0 4
U2 9
*M X2 5 L1 6 0 5A 1 6 M
1
2
3
4
5
6
7
8
CE #
S O
W P #
V S S
S I
S CK
HOL D#
V DD
DMI _ T X N0 [ 5 ]
US B _ P P 1 1_ F P [ 21 ]
US B _ P P 0 [ 2 1 ]
R2 6 0 2 4. 9 _ 1% _ 0 4
S B S P I _W P # [ 15 ]
P CI _ A D4
P CI E _ T X N4 _C
US B _ P N1 1 _F P [ 2 1]
P CI _ S E R R#
P CI _ C / B E #3
HIGH
P CI E _ RX P 5 _C A RD [ 22 ]
P CI _ T RD Y #
P CI _ I NT # A
P CI E _ T X N1 _C
P CI _ G NT #3
S P I _ CS 0 #
R1 1 3
*1 0 0 K _0 4
US B _O C# 6
PCI
3. 3 V S
P CI E _ T XN 2_ N E W _C A RD [ 20 ]
S P I _ S CL K _R
J_ S B S P I 1
*S P N Z - 0 8S 3 - B - C- 0- P
1 2
3 4
5 6
7 8
SPI
P CL K _ I CH 33 [ 18 ]
US B _O C# 7
R7 3 33 _ 0 4
P C I E _T X P 5 _C A RD [ 2 2 ]
P CI _ I NT # A
S B S P I _ W P # _ R
P CI E _ T X P 1_ C
S P I _S O
S P I _ C S 1# _ R
P CI _ I N T# G
P CI _ I N T# H
US B _O C# 4
P CI _ R E Q# 1
S P I 1 _S O _R
S P I _ CS 1 #
Stuff
DMI _ T X P 3 [ 5 ]
P CI E _ T XP 1 _ W LA N [ 20 ]
P CI _ D E V S E L#
P CI _ RE Q #2
US B _ OC #6
R4 06 *3 3 _0 4
P CI _ C / B E #2
P CI _ S E RR #
P CI _ I NT # F
S P I _C S 0 #
C6 43
*0 . 1U _ 16 V _ 04
R1 3 2 * 1K _0 4
Enable
P CI E _ R XP 2 _ NE W _ CA R D [ 2 0 ]
R1 3 6 1 0 K _ 04
RN 3 3
8 P 4R X 10 K _ 04
1
2
3
4 5
6
7
8
US B _ P P 5 _3 G [ 1 9]
P CI _ I R DY #
P CI _ A D8
P CI _ A D3 0
S P I _C S 1 #
P CI _ I NT # B
SPI_CS1#
P CI E _ T XP 2 _ NE W _ CA R D [ 20 ]
US B _O C# 8
S P I _ S CL K
No stuf f
P CI _ A D2 4
RN 1 1
8 P 4R X 8. 2 K _ 0 4
1
2
3
4 5
6
7
8
P CI _ A D9
P C I _ GNT # 0
S P I _ S O
No stuff
8
DMI _ R XN 1 [ 5 ]
US B _ P N2 _ MI N I [ 2 0]
P L T_ R S T#
US B _ OC #9
J S P I 1
*O P E N_ 3 5m i l
C 1 68 *3 3P _ 5 0 V _0 4
LOW
7
US B _ P P 1 [ 2 1 ]
P CI _ F R A ME #
P CI _ A D2 0
US B _O C# 2
R 4 05
* 3 . 3K _ 1 %_ 0 4
Default
D03 BCN
3. 3 V M _S B S P I 1
P CI E _T X P 4_ L A N [ 2 3 ]
P CI _ A D0
S P I _ S O_ R
US B _O C# 10
Disable
DMI _ R XN 2 [ 5 ]
US B _ O C# 4 [ 2 0 ]
S P I _ CS # _ CON
P CI E _ T X P 4_ C
P CI _ GNT 2 #
R4 10 *3 3 _0 4
U6
7 4A H C1 G0 8 GW
1
2
5
4
3
DMI _ T X N1 [ 5 ]
DMI _ R XP 2 [ 5]
St uf f
P CI _ I NT # B
US B _ OC #1 0
US B _ P P 9 _B T [ 19 ]
P CL K _ I CH 33
S P I _S CL K
S P I _ S O
P CI _ I NT # G
US B _ OC #8
De fau lt
B UF _ P L T _R S T# [ 19 , 2 0, 22 , 2 3, 2 6 ]
P CI E _ R XN 5_ CA R D [ 2 2]
P CI _ A D3
P CI _ I NT # H
R8 2 33 _ 0 4
P
C
I
-
E
x
p
r
e
s
s
D
i
r
e
c
t

M
e
d
i
a

I
n
t
e
r
f
a
c
e
USB
SPI
U 23 D
I C H9 M- NH 8 28 0 1I B M
N2 9
N2 8
P 2 7
P 2 6
L2 9
L2 8
M2 7
M2 6
J2 9
J2 8
K 2 7
K 2 6
G2 9
G2 8
H2 7
H2 6
E 2 9
E 2 8
F 2 7
F 2 6
C2 9
C2 8
D2 7
D2 6
V 27
V 26
U2 9
U2 8
Y 2 7
Y 2 6
W 2 9
W 2 8
A B 2 7
A B 2 6
A A 2 9
A A 2 8
A D2 7
A D2 6
A C2 9
A C2 8
T2 6
T2 5
A F 2 9
A F 2 8
N4
N5
N6
P 6
M1
N2
M4
M3
A C5
A C4
A D3
A D2
A C1
A C2
A A 5
A A 4
A B 2
A B 3
A A 1
A A 2
W 5
W 4
Y 3
Y 2
A G1
A G2
D2 3
D2 4
F 2 3
D2 5
E 2 3
N3
N1
W 2
W 1
V 2
V 3
U5
U1
U4
U2
P 5
P 3
P E RN 1
P E RP 1
P E T N1
P E T P 1
P E RN 2
P E RP 2
P E T N2
P E T P 2
P E RN 3
P E RP 3
P E T N3
P E T P 3
P E RN 4
P E RP 4
P E T N4
P E T P 4
P E RN 5
P E RP 5
P E T N5
P E T P 5
P E RN 6/ G L A N_ RX N
P E RP 6 / G LA N _R X P
P E T N6 / GL A N_ T XN
P E T P 6/ G L A N_ TX P
DMI 0 R XN
DM I 0R X P
D MI 0 T XN
DMI 0 T X P
DMI 1 R XN
DM I 1R X P
D MI 1 T XN
DMI 1 T X P
DMI 2 R XN
DM I 2R X P
D MI 2 T XN
DMI 2 T X P
DMI 3 R XN
DM I 3R X P
D MI 3 T XN
DMI 3 T X P
DMI _ CL K N
DM I _C L K P
DM I _Z C OM P
D MI _ I RC OM P
OC 0# / GP I O5 9
OC 1# / GP I O4 0
OC 2# / GP I O4 1
OC 3# / GP I O4 2
OC 4# / GP I O4 3
OC 5# / GP I O2 9
OC 6# / GP I O3 0
OC 7# / GP I O3 1
US B P 0N
U S B P 0 P
US B P 1N
U S B P 1 P
US B P 2N
U S B P 2 P
US B P 3N
U S B P 3 P
US B P 4N
U S B P 4 P
US B P 5N
U S B P 5 P
US B P 6N
U S B P 6 P
US B P 7N
U S B P 7 P
US B R B I A S #
US B R B I A S
S P I _ CL K
S P I _ CS 0 #
S P I _ CS 1 # / GP I O5 8 / CL GP I O6
S P I _ MOS I
S P I _ MI S O
OC 8# / GP I O4 4
OC 9# / GP I O4 5
U S B P 8 P
US B P 8N
US B P 9N
U S B P 9 P
U S B P 1 0N
U S B P 1 1N
US B P 1 0 P
US B P 1 1 P
OC 10 # / GP I O 46
OC 11 # / GP I O 47
S P I _S I _R
02/20
DMI _ R XP 0 [ 5]
P CI _ A D2 7
P CI _ RE Q #3
11
P CI _ A D5
R 74
3 . 3K _ 1 % _0 4
Zo= 55O? 5%
Enable
3 . 3V
DMI _ T X N2 [ 5 ]
P CI E _ RX N3 _ 3 G [ 19 ]
P CI _ A D1 3
P CI _ R E Q# 3
US B _O C# 5
P CI _ C / B E #1
S P I _ S I
S P I _S CL K _R
US B _ OC #5
C 2 35
*0 . 1U _ 16 V _ 04
Di sabl e
3. 3 V
P L T_ RS T# [ 5 , 1 9 ]
P CL K _ I CH 33
Boot BIOS Strap
US B _O C# 3
J S P I 2
*O P E N_ 3 5m i l
Sheet 14 of 40
ICH9-M 2/5 - PCIE,
PCI, USB
Schematic Diagrams
B - 16 ICH9-M 3/5 - GPIO, PWR Management
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
ICH9-M 3/5 - GPIO, PWR Management

S B _ B L ON
I C H_ S M B DA T 0
R 12 1 *1 0 mi l _s h o r t
P M_ S T P P CI #
P M _S Y NC # [ 5 ]
P M_ S T P CP U #
S E RI RQ
S W I #
P M_ T HR M#
I C H_ S M B CL K 0
S A TA _ C LK R E Q#
S US _ P W R_ A C K
CL _ DA T A 1 [ 2 0 ]
R2 9 8
45 3 _ 1% _ 0 6
I C H_ S MB D A T 1 [ 2 0 ]
Zo= 55 O? 5%
P M _ S TP CP U#
C 2 18
* 0 . 1U _1 6 V _ 04
CL _ RS T # 0 [ 5 ]
I C H_ S M B CL K 1
S A T A 4 GP
CL _ CL K 0 [ 5 ]
S A TA 1 G P
CL K E N# [ 31 ]
S U S _ P W R_ A CK [ 2 6]
S W I #
R N9
8 P 4 RX 1 0 K _0 4
1
2
3
4 5
6
7
8
R 1 06 1 0 0K _ 0 4
R 9 9 1 0 K _0 4
P M _T HR M# [ 2 ]
L A N _P W R [ 2 3 ]
P M _ TH RM #
R 9 7 1 0 0K _ 0 4
S L P _ S 3# [ 17 ]
R 2 77 * 10 K _ 0 4
CL _ DA T A 0 [ 5 ]
3. 3 V S
CL K _ I CH 14 [ 18 ]
M CH _I C H_ S Y NC#
R1 0 4
1 0K _ 0 4
CL K _ I CH 48 [ 18 ]
3 . 3 V [ 2 , 1 2 . . 14 , 1 6 , 17 , 1 9 , 20 , 2 3 , 29 , 3 0 ]
R S MR S T #
C 50 4
0 . 1 U_ 1 0V _ X 7 R_ 04
S B _ B LO N [ 1 2]
U 5
* G6 90 L 2 93 T 7 3
1
2
3
G ND
RS T #
V CC
3 . 3 V S
P W R _B T N# [ 26 ]
P M_ C LK R UN #
S CI #
I C H_ S P K R [ 2 4 ]
R 1 12 1 0 K _0 4
I C H_ S M B DA T 1
I CH _S MB DA T1
R 1 11 2 . 2 K _0 4
R 9 2 1 0 K _0 4
A C_ P RE S E N T
P M_ C LK R UN # [ 1 9]
P C I E _ W A K E #
MC H_ I CH _S Y NC #
R3 5 0 * 10 m i l _ s h or t
R 3 03 1 0 K _0 4
CL _ P W RO K [ 5 , 1 2 , 17 , 2 6 ]
OD D_ DE T E C T#
S L P _ M#
CL _ CL K 1 [ 2 0 ]
S L P _ S 4# [ 17 ]
R9 1 1 0 0_ 0 4
R 2 97 1 0 0K _ 0 4
C L _V R E F 0
3 . 3 V S
S MI #
L A N_ P W R
R 3 04 1 0 K _0 4
C 2 04 1 0 0P _ 5 0 V _0 4
RS M RS T # [ 1 7 , 2 6]
GP I O 1 7
P M_ D P RS L P V R [ 5 , 31 ]
A C _ P RE S E N T _R
R 1 02 1 0 0K _ 0 4
P M _ CL K RU N#
S C I #
O DD _D E T E CT #
R3 0 2
3. 24 K _ 1 %_ 0 4
GP I O 1 8
R 1 01 1 M_ 0 4
S A T A 0 GP
R 3 13 2 . 2 K _0 4
S
A
TA
S
M
B
S
Y
S
G
P
I
O
GP
I
O
G
P
I
O
Cl
o
c
ks
P
o
w
e
r

M
G
T
C
o
n
t
r
o
l
l
e
r

L
i
n
k
M
I
S
C
U 2 3C
I CH 9M - NH 8 28 0 1I B M
A H2 3
A F 1 9
A E 2 1
A D2 0
G1 6
A 1 3
E 1 7
C1 7
B 1 8
R 4
G1 9
M 6
A G1 9
A H2 1
A G2 1
A 2 1
C1 2
A 1 7
A E 1 8
K 1
A J 2 2
L 1
A 1 4
E 1 9
A E 1 9
A G2 2
L 4
A F 2 1
E 2 0
M 5
A J 2 3
D2 1
H1
A F 3
P 1
C1 6
E 1 6
G1 7
G2 0
M2
B 1 3
R3
D2 0
D2 2
F 1 9
C1 0
A 9
D1 9
A 2 0
R5
R6
B 1 6
A F 8
F 2 4
B 1 9
F 2 2
C1 9
C2 5
A 1 9
F 2 1
C1 8
C2 0
C1 1
A 1 6
M 7
B 2 1
D1 8 A H2 4
C2 1
A 8
A J 2 1
A H2 0
A J 2 4
A J 2 0
S A T A 0 GP / G P I O2 1
S MB C LK
S MB D A TA
LI N K A L E RT # / GP I O 60 / C LG P I O4
S ML I NK 0
S ML I NK 1
S US _ S T A T #/ L P C P D#
S Y S _ RE S E T#
P MS Y NC# / G P I O0
GP I O 1
GP I O 6
GP I O 7
GP I O 8
GP I O 12
S MB A L E RT # / GP I O1 1
GP I O 17
GP I O 18
S CL OC K / GP I O 22
S A TA CL K RE Q #/ G P I O3 5
S TP _ P C I #
S TP _ C P U#
S LO A D/ G P I O3 8
S DA T A OU T 0/ G P I O3 9
CL K RU N#
S DA T A OU T 1/ G P I O4 8
W A K E #
S E RI R Q
TH RM #
V RM P W RG D
CL K 1 4
CL K 4 8
S US C LK
S L P _ S 3 #
S L P _ S 4 #
S L P _ S 5 #
P W ROK
DP R S L P V R/ G P I O1 6
B A T LO W #
P W R B TN #
LA N _ RS T #
RS M RS T #
RI #
S 4 _ S TA TE # / G P I O2 6
GP I O 27
GP I O 28
TP 1 1
CK _ P W R GD
C LP W ROK
S L P _M #
GP I O 20
CL _ CL K 0
CL _ CL K 1
CL _ DA T A 0
CL _ DA T A 1
C L_ V R E F 0
C L_ V R E F 1
CL _ RS T 0 #
GP I O 1 0/ S U S _ P W R_ A CK
W O L _E N / GP I O 9
GP I O1 4/ A C_ P RE S E N T
M E M_ L E D/ G P I O2 4
S P K R
TP 3
CL _ RS T 1 # GP I O 49
GP I O 13
GP I O 57 / CL G P I O5
TP 1 0
TP 8
MCH _ S Y N C#
TP 9
S B _ P W RO K [ 1 7 ]
GP I O 1 3
G P I O1 7
3. 3 V
P M_ S T P CP U # [ 18 ]
S A T A _ CL K RE Q #_ R
S B _B L O N
R 1 80 * 10 0 K _ 04
R N3 6
8 P 4 RX 1 0 K _0 4
1
2
3
4 5
6
7
8
I CH _S MB CL K 0
3 . 3 V S
V R M_ P W R GD
P W R_ B T N#
I CH _S MB CL K 1
I CH _S MB DA T0
P CI E _ W A K E # [ 19 , 2 0 , 23 ]
S 4 _ S TA TE #
A C _P R E S E N T_ R
C2 1 5
0 . 03 3 U_ 1 6 V _X 7 R_ 0 4
R 1 10 1 0 K _0 4
R N3 7
8 P 4 RX 1 0 K _0 4
1
2
3
4 5
6
7
8
3 . 3 V
I C H_ S MB C L K 1 [ 2 0 ]
S A TA 5 G P
C L_VRET0/1 =0.405V
Zo= 55 O? 5%
M CH_ I C H_ S Y N C# [ 5 ]
V RM _ P W RG D
S E RI R Q
G P I O1 3
S A TA 0 G P
CL _ V RE F 1
NEW CARD, MINI CARD
S W I # [ 2 6 ]
CL G P I O5 [ 1 4 ]
S B _B A T L OW #
V R M_ P W R GD
R 1 07 * 10 K _ 0 4
C LK _ I C H1 4
S B _ L A NR S T#
P M_ S Y S RS T #
GP I O 2 0
S M I #
R S MRS T#
R 3 45 * 10 K _ 0 4
C LK _ I C H4 8
( IMP 80 9)
GP I O 6 0
S B _ B A T L OW #
R 3 11 * 10 K _ 0 4
CL _ RS T # 1 [ 2 0]
S E RI R Q [ 1 9 , 2 6]
P CI E _ W A K E #
R8 8
3. 24 K _ 1 %_ 0 4
S A T A _ CL K RE Q # [ 1 8]
S A TA _ C LK R E Q#
P M _P W ROK
S L P _ S 5 #
R 3 01 1 0 0K _ 0 4
CL K _ P W RG D [ 1 8]
P M _ DP R S LP V R
G P I O2 4
Q4
2 N 70 0 2W
G
D
S
R 11 4
* 10 0 K _ 04
R 3 09 * 10 0 K _ 04
VCORE PWRGD
G P I O9
S A T A 1 GP
P M _D P RS L P V R
G P I O6 0
R 2 78 8 . 2 K _0 4
R 10 8 *1 0 mi l _s h o r t
L P CP D # [ 1 9]
A C _ P RE S E N T [ 2 6]
P M _ S Y S R S T#
S U S _P W R_ A CK _ R
S A TA 4 G P
12mils
P M _ S TP P CI #
S U S _ P W R_ A C K _R
R3 4 4
*1 0m i l _s h or t
CL _ V RE F 0
OD D_ DE T E C T# [ 1 9]
C L _V R E F 1
P W R _B TN #
G P I O9
I C H_ S MB C L K 0 [ 1 0 , 1 1, 1 8 ]
P M_ S T P P C I # [ 1 8]
S CI # [ 26 ]
I C H_ S MB D A T 0 [ 1 0 , 1 1, 1 8 ]
S B S P I _W P # [ 1 4 ]
S A T A 5 GP
C 19 7
0 . 1 U_ 1 0V _ X 7 R_ 04
R 3 49 8 . 2 K _0 4
12mils
S MI # [ 26 ]
R8 7
45 3 _ 1% _ 0 6
POWER OK
S U S CL K
S B _L A N RS T #
G P I O2 4
L A N _P W R
R 1 46 8 . 2 K _0 4
DDR2, CLK GEN
3. 3V S [ 5 , 8 . . 14 , 1 6 , 18 . . 2 7 , 3 1]
R 3 08 1 0 K _0 4
Sheet 15 of 40
ICH9-M 3/5 - GPIO,
PWR Mangement
Schematic Diagrams
ICH9-M 4/5 - Power B - 17
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
ICH9-M 4/5 - Power

1.5VS
C464
0. 1U_10V_X7R_04
10m il s
C540 0.1U_10V_X7R_04
10m il s
1.5VS
C206
100U_6. 3V_B2
C546
0.1U_10V_X7R_04
3.3VS
3.3V
V5REF
2 0m ils
C564 0.1U_10V_X7R_04
C202
0.1U_10V_X7R_04
RTCVCC
5VS [12,13,19,21,24, 25,27]
1.05VS
R259
*10mil_short
C547
1U_16V_X5R_06
C241
0.1U_10V_X7R_04
1. 7A
10m il s
C214 0. 1U_10V_X7R_04
1 0m ils
5VS
3.3VS
3.3V
L12
HCB1005KF-121T20
VCCGLANPLL
1.5VS
C223
0.1U_10V_X7R_04
1.5VS
C586 D03 BCN? ?
3.3VS
1.05VS
C598
1U_6.3V_04
L33
HCB1005KF-121T20
C225
*4. 7U_6.3V_X5R_06
40m il s
C239 0. 1U_10V_X7R_04
3.3VS [ 5,8. .15,18..27, 31]
C183
0. 1U_10V_X7R_04
C211
10U_10V_08
C601
1U_6.3V_04
V5REF
10m il s
C547 D03 BCN? ?
C242
0.1U_10V_X7R_04
C190
0. 1U_10V_X7R_04
C208
*0.1U_10V_X7R_04
C217
0. 1U_10V_X7R_04
TP_VCCSUS15_ICH1
C248
0.022U_16V_X7R_04
TP_VCCCL_105
10m il s
10m il s
30m il s
VCC1_5_B
C599 0.1U_10V_X7R_04
5V
1.5VS
C554 0. 1U_10V_X7R_04
10 mi ls
CLOSE TO ICH9M
C201
0.1U_10V_X7R_04
TP_VCCSUS105_ICH2
VCCDMI
C448
*10U_10V_08
C585
0.1U_10V_X7R_04
D29
ASD751V
A
C
1 0m ils
VCCDMIPLL
RTCVCC [ 13]
1.5VS
1 0m ils
C249
0. 1U_10V_X7R_04
V5REF_SUS
1.05VS [ 2..5, 7,8,13,29]
1 A
1.5VS
3. 3VS
C195
0.1U_10V_X7R_04
C212 4. 7U_6.3V_X5R_06
3. 3VS
R270
*10mil_short
C247
0.1U_10V_X7R_04
3. 3V
10m il s
TP_VCCSUS105_ICH1
1 0m ils
R347
10_04
D30
ASD751V
A
C
10m il s
TP_VCCSUS15_ICH2
1.5VS
C207
*1U_6. 3V_04
VCCGLAN3_3
C230
1U_6.3V_04
C189
0.1U_10V_X7R_04
C210
10U_10V_08
C465 0. 1U_10V_X7R_04
VCCGLAN3_3
C250
0.1U_10V_X7R_04
1.05VS
C200
0. 1U_10V_X7R_04
C469
0.1U_10V_X7R_04
C
O
R
E
V
C
C
A
3
G
P
A
T
X
A
R
X
U
S
B

C
O
R
E
P
C
I
G
L
A
N

P
O
W
E
R
V
C
C
P
_
C
O
R
E
V
C
C
P
S
U
S
V
C
C
P
U
S
B
U23F
I CH9M-NH82801I BM
A6
AE1
AA24
AA25
AB24
AB25
AC24
AC25
AD24
AD25
AE25
AE26
AE27
AE28
AE29
F25
G25
H24
H25
J24
J25
K24
K25
L23
L24
L25
M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27
T24
T27
T28
T29
U24
AG29
R29
AC16
AD15
AD16
AE15
AF15
AJ19
AJ6
AC11
AD11
AJ5
A10
A11
A15
B15
C15
D15
E15
F15
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
A12
B12
AJ4
AJ3
AB23
AC23
F9
G3
G6
J2
J7
K7
A23
A18
D16
D17
E22
T1
T2
T3
T4
T5
T6
U6
U7
V6
V7
W6
W7
AG10
AC8
F17
G9
AC12
AC13
AC14
AA7
AF1
B9
AB6
V12
V17
V14
V11
V18
V16
E27
D29
E26
D28
A26
A27
AD19
Y6
AD8
F18
Y23
W23
G22
B24
A24
G23
W24
V25
U25
W25
U23
V24
K23
Y24
Y25
AG15
AH15
AJ15
AE11
AF11
Y7
AF20
AG24
AC20
AC10
AC21
G10
AC19
AC18
AC9
AJ10
AH10
AG11
AB7
AC6
AC7
T7
V5REF
V5REF_SUS
VCC1_5_B[1]
VCC1_5_B[2]
VCC1_5_B[3]
VCC1_5_B[4]
VCC1_5_B[5]
VCC1_5_B[6]
VCC1_5_B[7]
VCC1_5_B[8]
VCC1_5_B[9]
VCC1_5_B[10]
VCC1_5_B[11]
VCC1_5_B[12]
VCC1_5_B[13]
VCC1_5_B[14]
VCC1_5_B[15]
VCC1_5_B[16]
VCC1_5_B[17]
VCC1_5_B[18]
VCC1_5_B[19]
VCC1_5_B[20]
VCC1_5_B[21]
VCC1_5_B[22]
VCC1_5_B[23]
VCC1_5_B[24]
VCC1_5_B[25]
VCC1_5_B[26]
VCC1_5_B[27]
VCC1_5_B[28]
VCC1_5_B[29]
VCC1_5_B[30]
VCC1_5_B[31]
VCC1_5_B[32]
VCC1_5_B[33]
VCC1_5_B[34]
VCC1_5_B[35]
VCC1_5_B[36]
VCC1_5_B[37]
VCC1_5_B[38]
VCC1_5_B[39]
VCC1_5_B[40]
VCC3_3[ 1]
VCCDMIPLL
VCC1_5_A[1]
VCC1_5_A[2]
VCC1_5_A[3]
VCC1_5_A[4]
VCC1_5_A[5]
VCCSATAPLL
VCC3_3[ 2]
VCC1_5_A[9]
VCC1_5_A[10]
VCCUSBPLL
VCCLAN1_05[1]
VCCLAN1_05[2]
VCC1_05[ 1]
VCC1_05[ 2]
VCC1_05[ 3]
VCC1_05[ 4]
VCC1_05[ 5]
VCC1_05[ 6]
VCC1_05[ 7]
VCC1_05[ 8]
VCC1_05[ 9]
VCC1_05[10]
VCC1_05[11]
VCC1_05[12]
VCC1_05[13]
VCC1_05[14]
VCC1_05[15]
VCC1_05[16]
VCC1_05[17]
VCC1_05[18]
VCC1_05[19]
VCC1_05[20]
VCCLAN3_3[1]
VCCLAN3_3[2]
VCCHDA
VCCSUSHDA
V_CPU_IO[ 1]
V_CPU_IO[ 2]
VCC3_3[ 9]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
VCC3_3[14]
VCCRTC
VCCSUS3_3[ 1]
VCCSUS3_3[ 2]
VCCSUS3_3[ 3]
VCCSUS3_3[ 4]
VCCSUS3_3[ 6]
VCCSUS3_3[ 7]
VCCSUS3_3[ 8]
VCCSUS3_3[ 9]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCC1_5_A[13]
VCCSUS1_05[ 1]
VCCSUS1_05[ 2]
VCC1_5_A[22]
VCC1_5_A[23]
VCC1_5_A[24]
VCC1_5_A[25]
VCC1_5_A[26]
VCCSUS3_3[ 5]
VCC3_3[ 8]
VCC1_5_A[27]
VCC1_05[22]
VCC1_05[25]
VCC1_05[23]
VCC1_05[21]
VCC1_05[26]
VCC1_05[24]
VCCGLAN1_5[4]
VCCGLAN1_5[2]
VCCGLAN1_5[3]
VCCGLAN1_5[1]
VCCGLAN3_3
VCCGLANPLL
VCC3_3[ 3]
VCCSUS3_3[18]
VCCSUS1_5[ 1]
VCCSUS1_5[ 2]
VCC_DMI[ 2]
VCC_DMI[ 1]
VCCCL1_05
VCCCL3_3[ 2]
VCCCL3_3[ 1]
VCCCL1_5
VCC1_5_B[45]
VCC1_5_B[43]
VCC1_5_B[41]
VCC1_5_B[46]
VCC1_5_B[44]
VCC1_5_B[42]
VCC1_5_B[47]
VCC1_5_B[48]
VCC1_5_B[49]
VCC1_5_A[6]
VCC1_5_A[7]
VCC1_5_A[8]
VCC1_5_A[11]
VCC1_5_A[12]
VCCSUS3_3[19]
VCC3_3[ 4]
VCC3_3[ 5]
VCC3_3[ 6]
VCC3_3[ 7]
VCC1_5_A[20]
VCC1_5_A[21]
VCC1_5_A[19]
VCC1_5_A[18]
VCC1_5_A[17]
VCC1_5_A[16]
VCC1_5_A[15]
VCC1_5_A[14]
VCC1_5_A[28]
VCC1_5_A[29]
VCC1_5_A[30]
VCCSUS3_3[20]
C246
0.1U_10V_X7R_04
VCCGLANPLL
L11
HCB1005KF- 121T20
C224
100U_6.3V_B2
C226
1U_6.3V_04
C597
10U_10V_08
R328
10_04
3.3V [2,12..15, 17,19, 20,23, 29,30]
1 0m ils
TP_VCCLAN105_ICH1
C603
0.1U_10V_X7R_04
C559 0.1U_10V_X7R_04
L52
HCB1608KF- 121T25
C184
0.1U_10V_X7R_04
C229
0.1U_10V_X7R_04
C602
0.1U_10V_X7R_04
10 mi ls
3.3VS
C473
0.1U_10V_X7R_04
1.5VS
C240
1U_6.3V_04
TP_VCCCL_15
C545
0.01U_16V_X7R_04
C584
0.022U_16V_X7R_04
V5REF_SUS
C586
1U_16V_X5R_06
VCCSATAPLL
1.5VS [ 3,8, 13,14, 19,20, 29]
C209
10U_10V_08
1.7 A
VCC1_5_B
5V [ 19,21,28.. 31]
C244
0.1U_10V_X7R_04
C600
0.1U_10V_X7R_04
TP_VCCLAN105_ICH2
C243
0.1U_10V_X7R_04
10m il s
Sheet 16 of 40
ICH9-M 4/5 - Power
Schematic Diagrams
B - 18 ICH9-M 5/5 - GND
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
ICH9-M 5/5 - GND

3. 3V
R156
*10K_04
C272
*0.1U_16V_04
SLP_S4# [15]
RSMRST# [15,26]
3.3V [2, 12. .16,19,20, 23, 29, 30]
SLP_S3# [ 15]
U8B
74LVC08PW
4
5
6
1
4
7
1.8V_PWRGD [30]
1.5VS_PWRGD [29]
R109 *10mil_short
U8C
74LVC08PW
9
10
8
1
4
7
SYS_PWROK
U8D
74LVC08PW
12
13
11
1
4
7
3. 3V
1.05VM_PWRGD [29]
U23E
I CH9M-NH82801IBM
AA26
AA27
AA3
AA6
AB1
AA23
AB28
AB29
AB4
AB5
AC17
AC26
AC27
AC3
AD1
AD10
AD12
AD13
AD14
AD17
AD18
AD21
AD28
AD29
AD4
AD5
AD6
AD7
AD9
AE12
AE13
AE14
AE16
AE17
AE2
AE20
AE24
AE3
AE4
AE6
AE9
AF13
AF16
AF18
AF22
AH26
AF26
AF27
AF5
AF7
AF9
AG13
AG16
AG18
AG20
AG23
AG3
AG6
AG9
AH12
AH14
AH17
AH19
AH2
AH22
AH25
AH28
AH5
AH8
AJ12
AJ14
AJ17
AJ 8
B11
B14
B17
B2
B20
B23
B5
B8
C26
C27
E11
E14
E18
E2
E21
E24
E5
E8
F16
F28
F29
G12
G14
G18
G24
G26
G27
G8
H2
H23
H28
H29
H5
J23
J26
J27
AC22
K28
K29
L13
L15
L2
L26
L27
L5
L7
M12
M13
M14
M15
M16
M17
M23
M28
M29
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
P12
P13
P14
P15
P16
P17
P2
P23
P28
P29
P4
P7
R11
R12
R13
R14
R15
R16
R17
R18
R28
T12
T13
T14
T15
T16
T17
T23
U12
U13
U14
U15
U16
U17
AD23
U26
U27
U3
A1
A2
A28
A29
AH1
AH29
AJ 1
AJ 2
AJ 28
AJ 29
B1
B29
V1
V13
V15
V23
V28
G21
V29
V4
V5
W26
W27
W3
Y1
Y28
Y29
Y4
Y5
AG28
AH6
AF2
B26
B25
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[ 107]
VSS[ 108]
VSS[ 109]
VSS[ 110]
VSS[ 111]
VSS[ 112]
VSS[ 113]
VSS[ 114]
VSS[ 115]
VSS[ 116]
VSS[ 117]
VSS[ 118]
VSS[ 119]
VSS[ 120]
VSS[ 121]
VSS[ 122]
VSS[ 123]
VSS[ 124]
VSS[ 125]
VSS[ 126]
VSS[ 127]
VSS[ 128]
VSS[ 129]
VSS[ 130]
VSS[ 131]
VSS[ 132]
VSS[ 133]
VSS[ 134]
VSS[ 135]
VSS[ 136]
VSS[ 137]
VSS[ 138]
VSS[ 139]
VSS[ 140]
VSS[ 141]
VSS[ 142]
VSS[ 143]
VSS[ 144]
VSS[ 145]
VSS[ 146]
VSS[ 147]
VSS[ 148]
VSS[ 149]
VSS[ 150]
VSS[ 151]
VSS[ 152]
VSS[ 153]
VSS[ 154]
VSS[ 155]
VSS[ 156]
VSS[ 157]
VSS[ 158]
VSS[ 159]
VSS[ 160]
VSS[ 161]
VSS[ 162]
VSS[ 163]
VSS[ 164]
VSS[ 165]
VSS[ 166]
VSS[ 167]
VSS[ 169]
VSS[ 170]
VSS[ 171]
VSS[ 172]
VSS[ 173]
VSS[ 174]
VSS[ 175]
VSS[ 176]
VSS[ 177]
VSS[ 178]
VSS_NCTF[1]
VSS_NCTF[2]
VSS_NCTF[3]
VSS_NCTF[4]
VSS_NCTF[5]
VSS_NCTF[6]
VSS_NCTF[7]
VSS_NCTF[8]
VSS_NCTF[9]
VSS_NCTF[10]
VSS_NCTF[11]
VSS_NCTF[12]
VSS[ 179]
VSS[ 180]
VSS[ 181]
VSS[ 182]
VSS[ 183]
VSS[98]
VSS[ 184]
VSS[ 185]
VSS[ 186]
VSS[ 187]
VSS[ 188]
VSS[ 189]
VSS[ 190]
VSS[ 191]
VSS[ 192]
VSS[ 193]
VSS[ 194]
VSS[ 195]
VSS[ 196]
VSS[ 197]
VSS[ 168]
VSS[ 198]
1. 8V_PWRGD
SY S_PWROK
3. 3V
U8A
74LVC08PW
1
2
3
1
4
7
R154
*10K_04
CL_PWROK [ 5,12,15,26]
1. 8V_PWRGD
C267
*0.1U_16V_04
DELAY_PWRGD [5,31]
SUSB# [ 20, 23, 26, 27,29]
SB_PWROK [ 15]
3. 3V
SUSC# [ 26]
Sheet 17 of 40
ICH9-M 5/5 - GND
Schematic Diagrams
Clock Generator B - 19
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Clock Generator

CL K _ P CI E _ M I NI _ 3G
Z 17 4 0
C 48 8 *1 0P _ 5 0 V _0 4
C5 3 4
1 0 U_ 10 V _ 0 8
Z 17 2 6
R2 7 9 33 _ 0 4
B SE L0 SELLCD_27#=0
Z 17 1 2
R2 6 8 10 K _ 0 4
C 5 02
0 . 1 U_ 1 0V _X 7 R_ 0 4
1
MCH_CLKREQ#
(PEREQ2#)
CL K _ B S E L 1 [ 2 , 4 ]
RE F _ 1 4 . 31 8 M
C LK _ P C I E _N E W _ CA R D#
R2 8 4 2. 2 K _ 0 4
DOT96
3 . 3V M _ CL K
C 49 9 *1 0P _ 5 0 V _0 4
3 . 3 V M_ CL K
X 3
1 4 . 3 18 M Hz
1 2
C LK _ DR E F
C LK _ CP U_ B CL K
C LK _ P C I E _3 G P LL #
C 50 7 *1 0P _ 5 0 V _0 4
PCIEX9
CL K _ P CI E _ 3 GP L L
R2 9 3 *1 0 m i l _ sh o r t
CL K _ I CH 48
Red words must becontrolled by BIOS
CL K _ P W RG D [ 1 5]
Z 17 3 3
C LK _ P C I E _M I NI #
C 46 6 *1 0P _ 5 0 V _0 4
R2 7 2 33 _ 0 4
27FIX/SS
C LK _ DR E F #
R N2 4
4 P 2 RX 3 3 _0 4
1 4
2 3
C 46 8
0 . 1 U_ 1 0V _ X 7 R_ 04
Z 17 3 5
Z 1 70 4
R N2 1
4 P 2 RX 3 3 _0 4
1 4
2 3
1
S E L L CD_ 2 7 #
P C LK _ I C H3 3 [ 1 4 ]
MCH _ CL K RE Q # [ 5 ]
667 M Hz 16 6 MHz
CL K _ DRE F # [ 5]
L 3 9
HC B 1 60 8 K F - 1 21 T 2 5
WLAN_C LKREQ#
(PEREQ3#)
P M _S T P P C I # [ 1 5 ]
CL K _ I CH 14
CL K _ S A T A
F S L A
Z 17 3 6
R2 95 3 0 0_ 1 % _0 4
PCIEX9
CL K _ P CI E _ M I NI _ 3G #
R2 7 1 33 _ 0 4
U2 2
I CS 9 L P R3 63 E G LF
5
11
56
62
49
51
35
48
52
26
8
55 16
61
12
4
2
34
58
57
45
36
33
60
3
4
2850
54
9
64
1
3
2
1
3
7
5
3
32
30
31
27
26
24
25
23
22
19
20
18
17
14
15
10
4
7
7 1
294
6
39
38
41
40
44
43
5
9
63
P C I CL K 3 / *S E L P CI E X 0 _ LC D#
V D D4 8
V
D
D
R
E
F
C P U_ S T OP #
CP UT _ L 1F
CP U C_ L 0
P CI e C_ L 5
CP U C_ L 1F
CP U T_ L 0
G
N
D
G
N
D
P C I CL K _ F 4/ I T P _ E N
S D A TA F S L B / T E S T_ M ODE
R E F 1/ F S LC / TE S T_ S E L
F S L A / U S B _4 8 MH z
V
D
D
P
C
IE
X
* P W RS A V E #
X 1
X 2
V D DA
P C I e T_ L 5
*P E R E Q4 #
R E F 0_ 1 4 . 31 8 M
P C I CL K 1
P C I CL K 2
V
D
D
P
C
IE
X
V
D
D
C
P
U
S C LK
* S E LL C D_ 27 # / P CI C L K _F 5
* *P CI C L K 0/ R E Q_ S E L
G
N
D
V
D
D
P
C
IE
X
G
N
D
G
N
D
*P E R E Q3 #
P C I e T_ L 4
P CI e C_ L 4
S A TA C L K C_ L
S A T A CL K T _ L
P C I e T_ L 3
P CI e C_ L 3
P CI e C_ L 2
P C I e T_ L 2
P C I e T_ L 1
P CI e C_ L 1
2 7 S S / L CD_ S S C GC / P CI e C_ L 0
2 7F I X/ L CD _ S S CG T/ P C I e T_ L 0
P CI e T _ L9 / DO T T_ 9 6 MHz L
P CI e C_ L 9/ D OT C_ 9 6 MHz L
V T T _P W R_ GD / P D#
V
R
E
F
V
D
D
P
C
I
V
D
D
P
C
I
G
N
D
G
N
D
A
P C I e T_ L 6
P CI e C_ L 6
P CI e T _L 7 / P E R E Q1 #
P C I eC _L 7 / P E R E Q2 #
P CI e T _L 8 / CP U I TP T_ L 2
P C I e C_ L8 / C P UI T P C_ L 2
G
N
D
P C I / P CI E X _ S T OP #
CL K _ P CI E _ MI N I [ 2 0 ]
C 49 2 *1 0P _ 5 0 V _0 4
R N2 8
4 P 2 RX 3 3 _0 4
1 4
2 3
R N3 1
4 P 2 RX 3 3 _0 4
1 4
2 3
C4 71
27 P _ 5 0V _ 0 4
C K5 05
106 6 MHz
PCI ECLK 4 (JM385)
LCD(96MHz)
C 5 32
0 . 1 U_ 10 V _ X 7R _0 4
C 49 8 *1 0P _ 5 0 V _0 4
C LK _ P C I E _I C H
C LK _ DR E F S S
C 47 4 *1 0P _ 5 0 V _0 4
BS EL2
CL K _ MC H_ B CL K
P CL K _ T P M
Z 17 2 3
P CL K _ I CH 33
C 50 9 *1 0P _ 5 0 V _0 4
CL K _ I CH 48
C 44 9 *1 0P _ 5 0 V _0 4
C LK _ S A T A
P CL K _ T P M
Z 17 2 8
Layout note:
LAN_CLKREQ#
(PEREQ4#)
FS LC
I C H_ S MB D A T 0 [ 1 0 , 1 1, 1 5 ]
C LK _ P C I E _M I NI _ 3 G
X TA L _ I N
PCI ECLK 2 (MINI )
3 . 3 V S
CL K _ P CI E _ MI N I _3 G # [ 1 9]
CL K _ CP U _B CL K
CL K _ CP U_ B C LK # [ 2]
CL K _ DR E F S S #
R N2 6
4 P 2 RX 3 3 _0 4 1 4
2 3
C 48 4 *1 0P _ 5 0 V _0 4
C 49 4 *1 0P _ 5 0 V _0 4
PCIEX0
P CL K _ I CH 33
C 50 1 *1 0P _ 5 0 V _0 4
C LK _ B S E L 2 [ 2 , 4 ]
C 49 1
0 . 1 U_ 1 0V _ X 7 R_ 0 4
PCIECLK 8 ( ICH)
BS EL1
DOT96
3 . 3 V M_ CL K
P CL K _ TP M [ 1 9]
SATACLK
CL K _ DRE F S S [ 5 ]
CL K _ P CI E _ GL A N [ 2 3]
CL K _ P CI E _ M I NI
C LK _ P C I E _M I NI _ 3 G#
R N3 0
4 P 2 RX 3 3 _0 4
1 4
2 3
C 53 6 *1 0P _ 5 0 V _0 4
C 54 2 *1 0P _ 5 0 V _0 4
Z 17 1 3
C 49 0 *1 0P _ 5 0 V _0 4
SELPCIEX0_LCD#/
CL K _ P CI E _ G LA N #
R2 6 7 33 _ 0 4
C LK _ I C H4 8 [ 1 5 ]
30mils
CL K _ P CI E _ MI N I _3 G [ 1 9 ]
Z 17 2 5
0
Pin14/15
PCIECLK 3 ( MI NI_3G)
C 52 8 *1 0P _ 5 0 V _0 4
C 49 7 *1 0P _ 5 0 V _0 4
0
CL K _ S A T A #
R 29 6
1 K _ 1% _ 0 4
SELLCD_27#=1
LA N _ CL K RE Q # [ 2 3]
CL K _ DR E F S S
C LK _ S A T A #
Z 17 3 1
CLOCK GENERATOR
Z 17 3 0
R2 6 9 10 K _ 0 4
SELLCD_27#=1
R 30 7 4 75 _ 1 %_ 0 4
PCIECLK 1 ( 3GP LL)
CL K _ CP U_ B C LK [ 2 ]
CL K _ MC H_ B CL K #
CL K _ P CI E _ GL A N# [ 23 ]
CL K _ P CI E _ I CH [ 1 4 ]
Z 17 4 1
SELPCIEX0_LCD#/
CL K _ P CI E _ J M3 80 # [ 2 2 ]
C 48 1 *1 0P _ 5 0 V _0 4
Insatlled: Differential clock
level is higher
PCI ECLK 6 (NEW CARD)
CL K _ P CI E _ N E W _C A RD
P CL K _ K B C
C 54 1 *1 0P _ 5 0 V _0 4
C 51 2 *1 0P _ 5 0 V _0 4
C LK _ DR E F S S #
Z 17 3 2
Z 17 2 9
C 53 7 *1 0P _ 5 0 V _0 4
R2 5 3 *1 0 K _0 4
C 47 5 *1 0P _ 5 0 V _0 4
CL K _ P CI E _ N E W _C A RD #
Fr eq uen cy
PCIEX0
CL K _ P CI E _ M I NI #
Layout note:
CL K _ P CI E _ 3 GP L L [ 5 ]
CL K _ P CI E _ J M3 8 0
Z 17 4 2
3 . 3 V S
P CL K _ K B C
C LK _ MC H_ B C LK
R N3 2
4 P 2 RX 3 3 _0 4 1 4
2 3
0
Z 17 2 4
P CL K _ K B C [ 2 6]
C 45 0 *1 0P _ 5 0 V _0 4
Z 17 1 0
C LK _ P C I E _M I NI
PCI3 = 1 (high)
Z 17 1 1
C LK _ P C I E _3 G P LL
PLACE CRYSTAL WITHIN
500 MILS OF
ICS9LPR363EGLF
20 0 MHz
CL K _ CP U _B CL K #
C 51 1
1 U_ 6 . 3 V _0 4
SATA_CLKREQ#
(PEREQ1#)
800 M Hz
Z 17 1 8
C LK _ P C I E _G L A N
C 53 3 *1 0P _ 5 0 V _0 4
F SL A
P M_ S T P CP U # [ 15 ]
CL K _ P CI E _ I CH # [ 1 4]
CL K _ DRE F S S # [ 5 ]
C LK _ MC H_ B C LK #
S E L P CI E X 0 _ LC D#
PCI3 = 0 (low)
CL K _ P CI E _ I C H
Z 17 1 9
CL K _ P CI E _ J M3 80 [ 22 ]
CL K _ P CI E _ 3 GP L L #
CL K _ P CI E _ G LA N
Z 17 1 5
Z 17 3 8
Z 1 70 3
C LK _ CP U_ B CL K #
H os t Clo ck
Z 17 2 2
PCIECLK 5 ( GLAN)
3 . 3 V S
CL K _ MCH _ B CL K # [ 4 ] C4 72
27 P _ 5 0V _ 0 4
0
W LA N_ CL K RE Q # [ 1 9, 2 0 ]
Z 17 1 4
C 47 8
* 10 U _1 0 V _0 8
R N2 2
4 P 2 RX 3 3 _0 4
1 4
2 3
Default
Place termination close
to ICS9LPR363DGLF
CL K _ DR E F #
C 51 9 *1 0P _ 5 0 V _0 4
Z 17 2 7
C4 6 7
1U _ 6. 3 V _ 0 4
C 48 7 *1 0P _ 5 0 V _0 4
1
CL K _ MCH _ B CL K [ 4 ]
C LK _ P C I E _I C H#
CL K _P CI E _ NE W _ CA RD# [ 20 ]
C4 82
0. 1 U _1 0 V _X 7 R_ 0 4
0
CL K _ I CH 14
F S L C
C 54 3 *1 0P _ 5 0 V _0 4
R2 8 2 *1 0 0K _ 0 4
Pin5
RE Q _ S E L
C 50 5 *1 0P _ 5 0 V _0 4
Layout note:
3 . 3V S [ 5 , 8 . . 16 , 1 9. . 27 , 3 1]
CL K _ P CI E _ J M3 8 0#
C LK _ P C I E _N E W _ CA R D
C LK _ I C H1 4 [ 1 5 ]
26 6 MHz
S A TA _C LK R E Q# [ 15 ]
I C H_ S MB C L K 0 [ 1 0 , 1 1, 1 5 ]
X TA L _ OU T
C4 8 0
0 . 1 U_ 10 V _ X 7R _0 4
R N2 9
4 P 2 RX 3 3 _0 4
1 4
2 3
20mils
Pin17/18
C LK _ B S E L 0 [ 2 , 4 ]
CL K _ DRE F [ 5 ]
C 54 4 *1 0P _ 5 0 V _0 4
FS LB
CL K _ S A TA # [ 13 ]
C LK _ P C I E _J M 38 0
Pin9
CL K _ S A TA [ 1 3]
CL K _P CI E _ NE W _ CA RD [ 2 0]
R N2 3
4 P 2 RX 3 3 _0 4
1 4
2 3
C 5 35
1 0 U_ 1 0V _0 8
C 5 00
1 U _6 . 3 V _ 04
R 30 6 4 75 _ 1 %_ 0 4
CL K _ P CI E _ I C H#
C LK _ P C I E _J M 38 0 #
I T P _E N
0
CL K _ P CI E _ 3 GP L L # [ 5]
40mils
CL K _ P CI E _ MI N I # [ 2 0]
F S LB
R2 6 5 10 K _ 0 4
R2 6 6 *3 3 _0 4
R N2 5
4 P 2 RX 3 3 _0 4
1 4
2 3
SELLCD_27#=0
CL K _ DR E F
C LK _ P C I E _G L A N#
R N2 7
4 P 2 RX 3 3 _0 4
1 4
2 3
Sheet 18 of 40
Clock Generator
Schematic Diagrams
B - 20 Multi I/O, ODD, CCD, BT, TPM
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Multi I/O, ODD, CCD, BT, TPM

A Z _S D I N1 [ 13 ]
C 5
0 . 1 U_ 16 V _ 0 4
C2 7 5
1 0U _1 0 V _ 08
3 . 3V S
M DC_ A Z _ S Y N C [ 1 3 ]
TPM
U7
*S L B 9 6 35 T T
1 7
2 6
2 3
2 0
1 0
1 3
2 4
1 9
2 2
2 1
1 6
2 7
1 5
4
1 1
1 8
2 5
6
2
1 4
8
9
7
1
3
1 2
2 8
5
LA D 3
LA D 0
LA D 1
LA D 2
V DD1
X TA L I
V DD3
V DD2
LF R A ME #
LC LK
LR E S E T #
S E RI R Q
CL K RU N#
GND _1
GND _2
GND _3
GND _4
G P I O
GP I O2
XT A L O
TE S T I
TE S T B I / B A D D
P P
NC_ 1
NC_ 2
NC_ 3
LP C P D#
V S B
L2 0
HCB 1 0 05 K F - 1 2 1T 2 0
L P C _F R A ME # [ 1 3 , 26 ]
O DD_ DE T E C T#
L P CP D# [ 1 5]
5V S [ 1 2 , 13 , 1 6, 21 , 2 4, 2 5 , 27 ]
S A T A _ RX P 1
J _O DD_ 7 3
*8 5 20 5 - 1 2
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
C5 8 7
*0 . 1 U_ 1 6V _ 0 4
50m il
R1 6 8
1 00 K _ 0 4
B T _ E N [ 2 1, 2 6 ]
LP C _A D 0 [ 1 3 , 26 ]
T P M_ B A DD
US B _ P N5 _ 3G [ 14 ]
C 27 0
* 15 P _ 50 V _ 0 4
Layout Note
B T_ D E T# [ 2 6]
3 . 3V [ 2 , 1 2. . 1 7 , 2 0, 2 3 , 29 , 3 0]
S A T A _ TX N1 [ 13 ]
Z 1 9 08
MULTI I/O CONN
1
S A T A _ TX N1
C2 68 *1 0P _ 5 0V _ 0 4
6
5V [ 16 , 2 1, 2 8 . . 31 ]
P CL K _ TP M
S A T A _ TX P 1
C3 2
1U _ 10 V _ 06
Z 1 9 09
TPM _P P
X 2
* 3 2. 7 6 8K H z
1 4
3 2
P CI E _ RX N3 _ 3 G [ 1 4]
48 mil
CCD _ DE T # [ 2 6]
P CI E _ TX N3 _ 3 G [ 14 ]
R 1 52 *1 0 K _0 4
US B _O C# 3 [ 1 4 ]
S A T A _ RX N1 [ 1 3 ]
B T _ E N#
M DC_ A Z _ B I T CL K [ 1 3 ]
( De fau lt )
S A T A _ RX N1
TPM _B ADD
S A T A _ RX N1
LPCPD# inactive to LRST# inactive 32~96us
3 . 3 V S
CCD
5 V _C CD
3 . 3V
P CI E _ TX P 3 _ 3G [ 14 ]
J _ MF B 2
5 F 1 - 23 3 A 1 - A 20 0 0- 2 1 4
1 2
3 4
5 6
7 8
9 1 0
1 1 1 2
1 3 1 4
1 5 1 6
1 7 1 8
1 9 2 0
2 1 2 2
2 3 2 4
2 5 2 6
2 7 2 8
C 16
0 . 1 U_ 1 6V _ 0 4
L OW : 2E / 2F h
LP C _A D 1 [ 1 3 , 26 ]
5
TPM 1.2
S A T A _ RX P 1
Asserted before entering S3
U S B V CC 2
FOR M720T FOR M730T
3 G_ E N [ 2 1, 2 6 ]
W E B _ W W W # [ 2 6 ]
TP M _B A DD
C2 1 6
*1 0 0U _6 . 3 V _B 2
L OW : NOR MA L
C5 8 1
*0 . 1 U_ 1 6V _ 0 4
R 1 51 *1 0 K _0 4
J _C CD 1
8 52 0 4 - 05 0 01
1
2
3
4
5
LPC reset timing:
3 .3 VS= 1. 5A
Q1 4
2 N7 0 02 W G
D
S
J _B T 1
87 2 12 - 0 6 G0
1
2
3
4
5
6
P CI E _ W A K E # [ 1 5, 2 0 , 23 ]
O DD_ DE T E C T# [ 1 5 ]
C2 8 8
0 . 1U _1 6 V _0 4
W L A N_ CL K R E Q# [ 1 8 , 20 ]
3 G _D E T# [ 26 ]
TP M _P P
R 11 1 0 0K _ 1 %_ 0 4
R 1 47 *1 0 K _0 4
H I : ACC ES S
LE D _ CA P # [ 2 6]
US B _ P N9 _ B T [ 14 ]
L 1 8 H CB 1 00 5 K F - 1 21 T 20
Bluetooth
5V S
L I D_ S W # [ 1 2 , 26 ]
3. 3V S
M_ B T N# [ 3 0]
1 . 5V S [ 3 , 8, 1 3 , 14 , 1 6 , 20 , 2 9]
C 4
1 0 U_ 10 V _ 08
H I : 4E / 4F h
P CL K _ TP M [ 1 8]
J_ MF B 1
5 F 1 - 2 33 A 1 - A 2 00 0 - 21 4
1 2
3 4
5 6
7 8
9 10
1 1 12
1 3 14
1 5 16
1 7 18
1 9 20
2 1 22
2 3 24
2 5 26
2 7 28
S E RI R Q [ 15 , 2 6 ]
C2 65
*1 U_ 10 V _ 06
R 13 2 0 0K _ 1 %_ 0 4
LP C _A D 2 [ 1 3 , 26 ]
S A T A _ TX P 1
C 15
0 . 1 U_ 16 V _ 04
3 . 3 V S
C LK _ P C I E _M I NI _ 3G # [ 18 ]
L E D_ T HR OT TL E # [ 2 6 ]
( De fau lt )
5 V
Q1 3
A O3 40 9
G
D S
P CI E _ RX P 3_ 3 G [ 14 ]
C2 9 0
1 0U _1 0 V _0 8
J_BT1
W L A N_ CL K RE Q# [ 1 8, 2 0 ]
1.6A
US B _ P P 7 _C CD [ 14 ]
C CD _E N [ 26 ]
3 . 3V
Z 1 9 07
C1 9 8
1 0U _ 10 V _ 08
US B _ P N3 [ 1 4]
S A T A _ LE D # [ 1 3 ]
MDC _A Z _R S T# [ 1 3]
US B _ P P 3 [ 1 4]
US B _ P P 9 _B T [ 14 ]
SATA ODD
S A T A _ RX P 1 [ 1 3]
U S B _P P 5 _ 3 G [ 1 4 ]
J_CCD1
U1
RT 9 70 1 - CP L
1
2
3
4
5
V OUT
GN D
V I N
V I N
V OUT
C2 0
*1 0 U_ 10 V _ 0 8
S A T A _ TX P 1 [ 1 3 ]
SATA SINGAL FROM SB TO JODDB1
END OF JODD1
C2 7 6
0. 1 U _1 6 V _0 4
3 . 3 V S
L E D_ NU M# [ 2 6 ]
1 . 5 V S
J _O DD_ 7 2
C1 8 53 5 - 11 3 0 5- L
S 1
S 2
S 3
S 4
S 5
S 6
S 7
P 1
P 2
P 3
P 4
P 5
P 6
60 mil
TO SB GPIO
B UF _ P L T_ RS T# [ 1 4 , 20 , 2 2 , 23 , 2 6]
S P K O UT R+ [ 2 5 ]
P M_ CL K RU N# [ 1 5]
3 V S _ B T
3 . 3 V
5V
S P K OU TR - [ 2 5]
T P M_ P P
OD D_ DE T E CT #
R1 6 9 33 0 K _ 04
C2 7 1
*1 5 P _ 50 V _ 04
C 26 6
* 0. 1 U_ 1 6V _0 4
60 mil
R 1 53 *3 3 _0 4
R1 7 7 1 0 0K _ 0 4
1
C LK _ P C I E _M I NI _ 3 G [ 18 ]
W E B _ E MA I L# [ 2 6 ]
C2 77
0 . 1 U_ 16 V _ 04
C 26 9
* 0. 1 U _1 6 V _0 4
L E D_ S CR OL L # [ 26 ]
C1 9 9
0 . 1U _1 6 V _ 04
R 1 65
1 0 0 K _0 4
LP C _A D 3 [ 1 3 , 26 ]
P LT _ RS T # [ 5 , 14 ]
3 . 3V S [ 5 , 8. . 1 6 , 18 , 2 0 . . 27 , 3 1]
5 V S
1 . 5 V S
C2 19
1U _1 0 V _ 06
C2 8 9
0 . 1 U_ 16 V _ 04
US B _ P N7 _ CCD [ 14 ]
A P K E Y # [ 3 0]
C 27 4
0 . 1 U_ 16 V _ 0 4
US B V C C2
S A T A _ TX N1
C 20 5
0 . 1 U_ 16 V _ 04
M DC_ A Z _ S DO UT [ 1 3 ]
Q 15
2 N7 0 02 W
G
D
S
From H8 default HI
3. 3 V
Sheet 19 of 40
Multi I/O, ODD,
CCD, BT, TPM
Schematic Diagrams
New Card, Mini PCIE B - 21
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
New Card, Mini PCIE
Sheet 20 of 40
New Card,
Mini PCIE

CL _ RS T #1 [ 1 5]
NC _P E RS T #
W LA N _C L K RE Q#
1 . 5V S
1 . 5 V S
I C H_ S MB C LK 1 [ 1 5 ]
R 1 6
* 10 0 K _ 04
S US B # [ 1 7 , 23 , 2 6, 2 7 , 2 9]
U S B _ P N4 _N E W [ 14 ]
W L A N_ E N [ 2 1, 2 6 ]
B U F _P L T _R S T#
W L A N1 . 5 V S
R 21 *0 _0 4
3 . 3 V S
R 3 83 0 _0 4
20mil
P CI E _ RX N2 _ NE W _ CA R D [ 14 ]
C4 4 0 0 . 1U _1 6 V _ 04
C2 9
*1 0 U_ 10 V _ 0 8
3 . 3 V S
3. 3 V
R2 3 *1 0m i l _s h or t
3 . 3 V
NC_ 3 . 3 V S
20mil
P CI E _ R XP 1 _ W LA N [ 1 4 ]
Q 3 * A O3 4 09
G
D S
NC_ 3 . 3 V
U S B _P N 2_ M I NI [ 1 4 ]
U S B _P P 4 _ NE W [ 1 4 ]
GN D1 ~ 4 = G ND
W L A N3 . 3 V
C 40
0 . 1 U_ 16 V _ 0 4
C4 1
0. 1 U_ 1 6V _ 0 4
P CI E _ T XN 2 _N E W _C A RD [ 1 4]
R 20 *0 _0 4
R2 4 9 * 10 0 K _0 4
W L A N3 . 3 V
C 19 3 0 . 1 U_ 16 V _ 0 4
W L A N1 . 5 V S
C4 4 2 0 . 1U _1 6 V _ 04
C 19 6 0 . 1 U_ 16 V _ 0 4
P C I E _W A K E #
W L A N3 . 3 V
R1 8
0 _0 4
Q2
*2 N7 0 02 W G
D
S
B UF _ P L T_ RS T #
R2 4 *1 0m i l _s h or t
U S B _P P 2 _ MI N I [ 1 4]
B UF _ P L T_ RS T #
C 19 1 0 . 1 U_ 16 V _ 0 4
R9 *1 0 K _ 04
C4 5
0. 1 U _1 6 V _0 4
C2 4
10 U_ 1 0V _ 0 8
C 43
0 . 1 U_ 16 V _ 0 4
C4 4
1 0U _1 0 V _ 08
6- 01- 74 108 -Q6 1
R2 4 2 * 10 K _ 04
B U F _P L T _R S T# [ 14 , 1 9, 2 2 , 2 3, 2 6 ]
I C H_ S MB D A T1 [ 1 5 ]
CL K _ P CI E _ MI N I # [ 1 8 ]
NC _C P P E #
W L A N_ CL K RE Q #
R2 4 7 * 10 0 K _0 4
CL K _ P CI E _ NE W _ CA R D# [ 1 8]
40 mil
W L A N1 . 5V S
P C I E _R X N1 _W L A N [ 14 ]
US B _ OC# 4 [ 14 ]
C 4 46
*0 . 1 U_ 1 6V _ 0 4
P CI E _ W A K E # [ 1 5 , 19 , 2 3]
3 . 3V [ 2 , 1 2. . 1 7 , 1 9, 2 3 , 29 , 3 0]
U1 8
74 A HC 1 G0 8G W
1
2
5
4
3
CL K _ P CI E _ MI N I [ 1 8 ]
W L A N_ DE T # [ 2 6]
ENE P 223 1 p in 3,4 ,14 ,1 5,2 2
has i nte rna ll y p ull ed hi gh
( 1 70 K o hmS )
W L A N 3. 3 V
C 23
0 . 1 U_ 16 V _ 0 4
3 . 3 V S
NC_ RS T #
C4 4 1 0 . 1U _1 6 V _ 04
C 18 1 0 . 1 U_ 16 V _ 0 4
40 mil
20 mil
W L A N_ CL K RE Q # [ 1 8, 1 9 ]
P CI E _ W A K E #
J_ NE W 1
13 0 80 1 -1
17
1
10
2 6
2 0
2 3
4
19
18
22
21
25
24
14
15
12
9
13
11
8
7
16
5
6
3
2
2 7
2 8
2 9
3 0
C P P E #
GND
+ 1 . 5V
GND
GND
GND
C P US B #
R E F CL K +
R E F CL K -
P E R p0
P E R n0
P E T p 0
P E T n 0
+ 3 . 3V
+ 3 . 3V
+ 3 . 3V A U X
+ 1 . 5V
P E R S T#
W A K E #
S M B _D A TA
S M B _C LK
C LK R E Q#
R E S E RV E D
R E S E RV E D
U S B _D +
U S B _D -
GND
GND
GND
GND
P CI E _ T XP 2 _ NE W _ CA R D [ 1 4]
CL K _ P CI E _ NE W _ CA R D [ 1 8]
C 33
*0 . 1U _1 6 V _0 4
U1 9
P 22 3 1T H LF C 1
2
3
4
6
5 8
7
9
1
1 1
1 4
1 5
1 6
1 7
1 8
1 9
2 0
2 1
2 2
2 3
1 0
1 2
1 3
2 4 2 5
S Y S RS T #
S HD N#
S T B Y #
3 . 3 V I N
3 . 3 V I N 3 . 3V O UT
3 . 3V O UT
P E RS T#
N C
GN D
C P US B #
CP P E #
1 . 5V O UT
1 . 5V O UT
1 . 5 V I N
1 . 5 V I N
A U XO UT
A U XI N
RC LK E N
O C#
N C
N C
N C
N C GN D
KEY
J_ MI N I 1
88 9 08 - 5 2 04
3
5
7
9
1 1
1 3
1
1 5
2 3
2 5
2 1
2 7
3 1
3 3
2 9
1 7
1 9 2 0
3 7
3 9
4 1
4 3
4 5
4 7
4 9
5 1
4 4
4 2
1 8
1 6
1 4
2
1 2
1 0
8
6
4
2 2
2 4
2 6
2 8
3 0
3 2
3 4
3 6
3 8
4 0
4 6
4 8
5 0
5 2
3 5
B T _ DA T A
B T _ CHC L K
C LK R E Q#
G ND0
R E F CL K -
R E F CL K +
W A K E #
G ND1
P E T n 0
P E T p 0
G ND2
G ND3
P E R n0
P E R p0
G ND4
N C3
N C4 W _D I S A B L E #
N C6
3 . 3 V _3
3 . 3 V _4
N C9
N C1 0
N C1 1
N C1 2
N C1 3
LE D _ W LA N #
NC( L E D_ W W A N #)
GND 6
UI M _V P P
UI M _R E S E T
3. 3 V _ 0
UI M _C LK
UI M _D A TA
U I M_ P W R
1. 5 V _ 0
GND 5
P E RS E T #
3. 3 V _ 2
GND 7
1. 5 V _ 1
N C( S M B _C LK )
N C( S M B _D A TA )
GND 8
NC ( US B _ D- )
N C( U S B _D +)
GND 9
NC( L E D _W P A N #)
1. 5 V _ 2
GN D1 0
3. 3 V _ 1
G ND1 1
P CI E _ T XP 1 _ W LA N [ 1 4]
C4 4 5 0 . 1U _1 6 V _ 04
I CH_ S MB D A T 1 [ 15 ]
1 . 5V S [ 3 , 8, 1 3 , 14 , 1 6 , 19 , 2 9]
20 mil
20 mil
R 10
* 10 0 K _ 04
C 26
*0 . 1 U_ 1 6V _ 0 4
NC_ 1 . 5 V S
3 . 3 V
R1 2
*3 3 0K _ 0 4
CL _ DA T A 1 [ 1 5]
3 . 3V S [ 5 , 8 . . 1 6, 1 8 , 19 , 2 1 . . 27 , 3 1]
C4 4 3 0 . 1U _1 6 V _ 04
MINI CARD
20 mil
W L A N3 . 3 V
C 18 7 0 . 1 U_ 16 V _ 0 4
R2 2 *1 0m i l _s h or t
C4 2
0. 1 U _1 6 V _0 4
P CI E _ RX P 2 _N E W _C A RD [ 14 ]
NC _C P US B #
W L A N3 . 3V
P CI E _ T X N1 _W L A N [ 1 4 ]
CL _ CL K 1 [ 1 5]
W LA N 1. 5 V S
NEW CARD
For Kedron WLAN Device
W L A N _P W R [ 26 ]
I CH_ S MB C LK 1 [ 15 ]
Schematic Diagrams
B - 22 LED, FAN, TP, FP, USB
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
LED, FAN, TP, FP, USB

C4 4 7
0 . 1U _ 16 V _ 04
W LA N _E N [ 2 0 , 26 ]
3G LED
LE D _B A T _ CH G# [ 26 ]
R 71
1 0 K _ 04
Q 20
A O3 4 09
G
D
S
V D D3
U S B V CC0 1
J_TP1
30mils
60mil
L E D_ B A T _ F UL L# [ 26 ]
1
3 . 3 V S
US B V C C0 1
Z 21 0 1
1
3 . 3V S [ 5 , 8 . . 1 6, 1 8 . . 20 , 2 2 . . 27 , 3 1]
1
5 V S
C4 3 9
1 00 U_ 6 . 3V _ B 2
C5 2 9
0 . 1U _ 16 V _ 04
L E D_ P W R # [ 26 ]
J _ US B 2
C1 07 7 7- 1 0 4 A 3- L
1
5
2
3
4
6
V +
G
N
D
1
DA TA _ L
DA TA _ H
GN D
G
N
D
2
Z 21 0 9
WLAN/BT LED
R 15 8
2 20 _ 04
R2 9 9
1 00 K _ 1 %_ 0 4
US B _ P P 1 [ 1 4]
V DD3
US B _ P P 0 _R
Z 21 1 5
2
5V [ 16 , 1 9, 2 8 . . 31 ]
US B _ P N1 1 _F P [ 14 ]
C1 58
47 P _ 50 V _ 0 4
3
BAT LED
5 V S _ F A N
Z 2 1 12
Z 21 0 5
US B _ V CC0 1 _ 0
C4 37
*0 . 1U _1 6 V _ 04
60 mil
R2 44
1 0 K _1 % _0 4
L3 6 HCB 16 0 8K F - 1 2 1T 2 5
L3 5 HCB 16 0 8K F - 1 2 1T 2 5
L ay out n ote :
T P _D A T A [ 2 6]
3 . 3V S
C4 9 5
*1 0 U_ 1 0V _ 0 8
J_ F A N1
8 5 20 5 - 03 0 01
1
2
3
US B _ P N0 [ 1 4]
J _ F P 1
85 2 01 - 0 40 5 1
1
2
3
4
R3 0 0
2 00 K _ 1 %_ 0 4
R1 61
22 0 _0 4
U2 1
RT 9 70 1 - CP L
1
2
3
4
5
V OUT
GN D
V I N
V I N
V OUT
C 50 3
0 . 1 U_ 16 V _ 0 4
4
USB PORT
US B _ P N1 [ 1 4]
F A N_ DC _ V OL _R
Place under the common
bead body and same as
USB trace requirment
US B _ P P 11 _ F P [ 1 4 ]
C1 4 6
1 U_ 10 V _ 06
60mil
U S B _O C# 0 1 [ 1 4 ]
L3 1
H CB 1 0 05 K F - 1 2 1T 2 0
C 15 9
4 7 P _ 50 V _ 04
R1 62
22 0 _0 4
V D D3
C 49 3
1 U_ 1 0V _ 0 6
5V S
C4 3 8
10 U _1 0 V _0 8
F A N_ DC _ V OL
60 mil
US B _ P P 1 _R
3 . 3 V S
3
Z 21 1 1
30mils
3 . 3 V S
3. 3 V S _ F P
R1 57
22 0 _0 4
1
4
3. 3 V S
5V S [ 1 2 , 13 , 1 6, 19 , 2 4, 2 5 , 27 ]
R 15 9
2 20 _ 04
C4 4 4
1 00 U_ 6 . 3V _B 2
4
US B _ P P 0 [ 1 4]
C 15 7
* 10 U_ 1 0V _ 0 8
S
G
Y
D1 8
RY - S P 15 5 HY Y G4
13
24
J_FAN1
FAN CONTROL
US B _ P N1 _ R
POWER ON LED
US B V C C0 1
5 V
C 88
0 . 1 U_ 16 V _ 0 4
2
V DD3
L8
HCB 1 0 05 K F - 1 2 1T 2 0
C5 0 8
1 00 U_ 6 . 3V _B 2
C4 86
0. 1 U_ 1 6V _ 0 4
F A N _D C_ V OL
US B _ V CC0 1 _ 1
V DD 3 [ 13 , 2 6 . . 30 , 3 2]
+
-
U1 6 B
L M3 58 L
5
6
7
LED
Z 2 1 13
B T _ E N [ 1 9, 2 6 ]
L3 4
*W CM 20 1 2F 2S - 1 6 1T 0 3
1
4
2
3
3
J_FP1
R7 0
10 K _ 04
CP U _F A N S E N [ 2 6]
Z 2 1 02
Q 7
DT C1 1 4 E UA
C
E
B
4
J _ TP 1
8 5 20 1 - 0 40 5 1
1
2
3
4
1
1
Z 2 1 14
Q8
DT C1 1 4E U A
C
E
B
R2 4 6 4 . 7 K _ 04
L E D_ A C I N# [ 26 ]
Q 9
DT C1 1 4 E UA
C
E
B
S
G
Y
D2 2
RY - S P 15 5 HY Y G4
13
24
US B _ P N0 _ R
S
G
Y
D1 9
RY - S P 1 55 HY Y G4
13
24
R1 55
22 0 _0 4
CLICK CONN
J _ US B 1
C1 07 7 7- 1 0 4 A 3- L
1
5
2
3
4
6
V +
G
N
D
1
DA TA _ L
DA TA _ H
GN D
G
N
D
2
D2 0
RB 5 5 1V - 30
A
C
+
-
U1 6A
LM 35 8 L
3
2
1
8
4
T P _C L K [ 2 6]
D 2 1 R B 5 51 V - 3 0
A C
R2 43
4 . 9 9K _ 1 %_ 0 4
4
Z 2 1 10
L4 1
*W CM 20 1 2F 2S - 1 6 1T 0 3
1
4
2
3
FP CONN
5 V S
Z 2 1 06
3
2
CP U_ F A N [ 26 ]
R 1 60
2 20 _ 0 4
3 G _E N [ 1 9, 2 6 ]
D2 3
RY - S P 1 72 Y G 34
A
C
Sheet 21 of 40
LED, FAN, TP, FP,
USB
Schematic Diagrams
JMB385 Card Reader B - 23
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
JMB385 Card Reader

S D/ M S _ D3
LOW
M
D
IO
12
M720T Card Reader
Connector
P CI E _R X P 5_ C A RD [ 1 4 ]
S DC MD / MS B S
C 54 9 0 . 1U _ 10 V _ X 7R _ 04
M DI O 14
M S _ I NS #
HIGH
C 59 1
0 . 1 U_ 1 6 V _0 4
V CC _ CA R D
S D/ M S _ D3
Layout note:
3. 3V S
P C I E _ TX N 5_ C A RD [ 1 4 ]
S D/ M S _ D2
M DI O 7
V CC _ CA R D
3 . 3 V S _ CA R D
S D/ M S _ D3
R4 0 3 0 _0 6
Ve ry c los ed b et wee n
p in 1 0
M DI O 13
S D _ CD#
B U F _ P L T_ RS T# [ 1 4 , 19 , 2 0 , 23 , 2 6 ]
MS _ I N S #
S D/ M S _ D2
S D/ M S CL K
S D W P #
DV 1 . 8 V
S D/ M S CL K
V er y clo se d to pi n 5( Tr ac e w id th /l eng th :
2 0m il / < 12 0m il )
DV 1 . 8 V
CL K _ P CI E _J M3 8 0 [ 18 ]
MS _ I N S #
3. 3 V S _ C A RD V C C_ CA R D
S D/ M S _ D0
S DW P #
P C I E _ TX P 5 _ CA R D [ 1 4]
R 38 4 2 2 _ 04
C6 0 4
0 . 1U _ 16 V _ 0 4
Layout note:
S D/ M S _ D1
C L K _P CI E _ J M3 8 0# [ 1 8 ]
JMB385 CARD READER
C5 2 2
1 0P _ 5 0 V _0 4
R3 3 5 1 0K _ 0 4
S D/ M S _ D1
D V 1 . 8 V
MDIO1 4
CR1_LEDN
High
Active
02/12
S D W P #
S D CM D/ M S B S
C5 5 7
0 . 1U _ 16 V _ 0 4
C5 5 2
1 00 0 P _ 50 V _ X 7R _ 04
S D/ M S _ D1
S DC MD / MS B S
M DI O 13
MDIO1 2
CR1_LEDN
Low
Active
Layout note:
M S _ I NS # S D / MS _ D 2
M DI O 14
C5 5 1
0 . 1U _ 16 V _ 0 4
3 . 3 V S _C A RD
C 59 2
0 . 1 U_ 1 6 V _0 4
MDIO7
R3 3 1 1 0K _ 0 4
S D/ M S _ D3
S D / MS _ D 3
P CI E _R X N5 _C A RD [ 1 4 ]
R3 3 9 2 00 K _ 0 4
Layout Note:
S D/ M S CL K
S D_ C D#
C6 0 5
0 . 1U _ 16 V _ 0 4
C5 7 3
0 . 1U _ 16 V _ 0 4
V CC _ CA R D
R3 5 3 2 00 K _ 0 4
S D/ M S _ D0
S D / MS C L K
R3 1 0 4 . 7K _ 0 4
C5 2 4
0 . 1U _ 16 V _ 0 4
Add-in Card
M DI O 12
C5 8 3
0 . 1U _ 16 V _ 0 4
C5 1 7
0 . 1U _ 16 V _ 0 4
JMB385
U 27
J MB 38 5 - L GE Z 0 B
1234567891
0
1
1
1
2
1 4
1 5
1 6
1 7
1 8
1 9
2 0
2 1
2 2
2 3
2 4
1 3
3 7
3 8
3 9
4 0
4 1
4 2
4 3
4 4
4 5
4 6
4 7
4 8
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
X
R
S
T
N
X
T
E
S
T
A
P
C
LK
N
A
P
C
L
K
P
A
P
V
D
D
A
P
G
N
D
A
P
R
E
X
T
A
P
R
X
P
A
P
R
X
N
A
P
V
18
A
P
T
X
N
A
P
T
X
P
S E E CL K
CR1 _ CD 1 N
CR1 _ CD 0 N
C R1 _ P CT L N
DV 18
RE G _ CT RL
DV 33
CR _L E D N
M DI O 14
M DI O 13
GN D
S E E DA T
DV 18
P C I E S _ E N
P C I E S
MD I O7
MD I O6
MD I O5
MD I O4
DV 33
MD I O3
MD I O2
MD I O1
MD I O0
N
C
N
C
N
C
G
N
D
G
N
D
G
N
D
T
A
V
3
3
M
D
IO
8
M
D
IO
9
M
D
IO
1
0
M
D
IO
11
M
D
IO
1
2
3 . 3 V S _ CA R D
S D / MS _ D 0
C5 6 1
0 . 1U _ 16 V _ 0 4
R3 3 2 4 . 7K _ 0 4
3 . 3 V S _ CA R D
3 . 3 V S _ CA R D
On Borad
Must > 30mil
3 . 3 V S _ CA R D
S D/ M S _ D2
S D/ M S _ D0
J _ CA R D- R _7 2
M DR 01 9 - C0 - 0 0 10 ( R ev er s e )
P 2
P 2 1
P 3
P 4
P 5
P 6
P 7
P 8
P 9
P 1 0
P 1 1
P 1 2
P 1 3
P 1 4
P 1 5
P 1 6
P 1 7
P 1 8
P 1 9
P 2 0
P 1
P 2 3
P 2 2
DA T2 _ S D
V S S _ M S
CD / DA T3 _ S D
CM D_ S D
V S S _ S D
V D D_ S D
CL K _ S D
V S S _ S D
DA T0 _ S D
DA T1 _ S D
W P _ S D
V S S _ M S
V C C_ MS
S C LK _ M S
DA T3 _ MS
I N S _M S
DA T2 _ MS
S D I O/ D A T0 _ MS
DA T1 _ MS
B S _ MS
CD _ S D
GN D
GN D
3 . 3 V S [ 5 , 8. . 16 , 1 8 . . 21 , 2 3 . . 2 7, 3 1 ]
3 . 3 V S _ CA R D
40mil
S D/ M S CL K
C 55 0 0 . 1U _ 10 V _ X 7R _ 04
V C C_ CA R D
D V 1 . 8 V
S D / MS C L K
V C C_ CA R D
R3 4 3 1 0K _ 0 4
S D _ CD#
CR1_PCTLN
Low
Active
40mil
V CC _ CA R D
M DI O 7
S DC MD / MS B S
S DW P #
C5 5 3
1 0U _1 0 V _ 0 8
Near Cardreader CONN
J _ CA R D- R _7 3
* MD R0 1 9- C 0 - 00 1 0 ( Re v e rse )
P 2
P 2 1
P 3
P 4
P 5
P 6
P 7
P 8
P 9
P 1 0
P 1 1
P 1 2
P 1 3
P 1 4
P 1 5
P 1 6
P 1 7
P 1 8
P 1 9
P 2 0
P 1
P 2 3
P 2 2
DA T2 _ S D
V S S _ M S
CD / DA T3 _ S D
CM D_ S D
V S S _ S D
V D D_ S D
CL K _ S D
V S S _ S D
DA T0 _ S D
DA T1 _ S D
W P _ S D
V S S _ M S
V C C_ MS
S C LK _ M S
DA T3 _ MS
I N S _M S
DA T2 _ MS
S D I O/ D A T0 _ MS
DA T1 _ MS
B S _ MS
CD _ S D
GN D
GN D
S D_ C D#
3 . 3 V S _ CA R D
S D / MS C L K _R
Ve ry cl os ed b et wee n
pi n 19 an d pi n 20
DV 1 . 8 V
R 32 7 8 . 2K _ 1 % _0 4
CR1_PCTLN
High
Active
S D/ M S _ D1
M730T Card Reader
Connector
S D/ M S _ D2
C 59 0
1 0 U_ 1 0V _0 8
S DC MD / MS B S
S D / MS _ D 1
S D/ M S _ D0
Sheet 22 of 40
JMB385 Card Reader
Schematic Diagrams
B - 24 PCI-E LAN RTL8111C
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
PCI-E LAN RTL8111C
Sheet 23 of 40
PCI-E LAN
RTL8111C

L MX 1+
MX 1 +
C 3 65
2 2 P _ 50 V _ 0 4
MDI O 0 -
RT L81 11 C
MA 0 / E E D O
M X4 +
20mils
C 50
* 10 U _1 0 V _ 08
U ns tu ff
C4 9
P C I E _ RX P 4 _L A N [ 1 4 ]
MX 2 -
R 40 4 *0 _ 0 4
V _D A C
R 4 13
* 10 0 K _ 0 4
1. 2V _ L A N
C5 1
0. 1 U _1 6 V _ 04
R2 2 5 * 15 K _ 0 4
C2 8 6 0 . 0 1 U_ 16 V _ X 7R _ 04
C3 8 8
0. 1 U _1 6 V _ 04
M CT 2
P CI E _ RX P 4 _ LA N _ C
M DI O 2-
L MX 4 +
R2 2 4 * 1 0m i l _ s h or t
La yo ut n ot e:
L A N_ E V D D1 2
M X3 +
S tu ff
RT L8 11 1C
V _D A C
15mils
P CI E _ W A K E # [ 15 , 1 9 , 20 ]
Un stu ff
L A N_ E V DD 1 2
V _D A C
C3 7 9
0 . 1U _ 16 V _ 0 4
C3 67
X 1
2 5 MHz
1
2
MCT 4
M DI O 1-
L 6 9
*W C M2 0 12 F 2 S - 1 61 T 0 3
1
4
2
3
R 2 15
2 . 4 9 K _ 1% _ 0 4
1 . 2V _ L A N
1 . 2 V _ LA N
B UF _ P L T_ R S T# [ 1 4 , 1 9, 2 0 , 2 2, 26 ]
MA 1 / E E D I
MDI O 1 -
M X2 -
R4 1 2
*3 3 0K _0 4
C3 6 0
0. 1 U _1 6 V _ 04
G ST 50 09L F / LG -24 13 S- 1
C3 7 4 0 . 1 U_ 1 0V _ X 7 R_ 0 4
3 . 3 V [ 2, 1 2 . . 1 7, 1 9 , 2 0, 29 , 3 0 ]
M A 1 / E E DI
L 5
H CB 1 0 0 5K F - 12 1 T2 0
C3 7 7 0 . 1 U_ 1 0V _ X 7 R_ 0 4
R 21 7
MX 2 +
C3 6 7
0 . 1 U_ 16 V _ 0 4
L4
S W F 2 52 0 CF - 4 R 7M - M
L MX 2 +
C 8 4
0 . 1 U_ 1 6 V _0 4
L 5
Layout note:
L MX 4-
C6 4 1
*0 . 1 U_ 1 6 V _0 4
C3 5 8
0 . 1U _ 16 V _ 0 4
C 4 9
2 2 U_ 6 . 3 V _X 5 R_ 0 8
LA N_ V DD 3
M A 2/ E E S K
C3 8 6
0 . 1U _ 16 V _ 0 4
C 2 92
10 0 0P _2 K V _ 1 2
6 0mi ls a nd le ng th < 20 0m il
RT L81 02 E
L A N_ A V D D3
MDI O 3 -
MCT 1
R TL8 11 1C
R4 1 4
* 10 0 K _ 04
P CI E _ RX N4 _ L A N_ C
MX 1 -
R2 2 3 * 1K _0 4
0_ 04 02
RT L81 11 C
RT L81 02 E
V _D A C
L 5 3
0 _ 04
C3 5 4
0. 1 U _1 6 V _ 04
E N _ LA N 1 2
M X1 +
M X2 +
L3
0_ 0 4
V _D A C
E N_ LA N1 2
R 40 2, C6 41
60mil
R TL 81 11C
M X4 -
S tu ff
MDI O 2 -
R TL8 10 2E
3 . 3V S [ 5, 8 . . 1 6 , 1 8. . 2 2 , 2 4. . 2 7 , 3 1]
L MX 3+
M DI O 3+
MDI O 3 +
C2 8 5 0 . 0 1 U_ 16 V _ X 7R _ 04
M CT 1
C3 5 5
0. 1U _1 6 V _ 04
L 7 0
*W C M2 0 12 F 2 S - 1 61 T 0 3
1
4
2
3
Stu ff
L MX 4+
C2 86 ,C 28 7
MA 2 / E E S K
C 61
M A 1/ E E DI
C3 7 3
0 . 1U _ 16 V _ 0 4
V _D A C
RT L81 11 C
RTL 81 11 C
60 mi ls a nd le ng th < 20 0mi l
RT L8 10 2E
R TL 81 02E
R 17 6 7 5_ 0 4
V _D A C
C5 3
*1 0 U_ 1 0 V _0 8
RTL 81 11 C
20mils
C3 7 8
0. 1U _1 6 V _ 04
LAN trace requirment
R17 8, R1 79
L A N _P W R [ 1 5 ]
M CT 3
L MX 4 -
C2 8 7 0 . 0 1 U_ 16 V _ X 7R _ 04
3 . 3 V S
L A N_ C LK R E Q# [ 1 8 ]
M DI O 1+
M X3 -
R 17 8 7 5_ 0 4
U 2
H T9 3 L C4 6 - A 18 P B
1
2
3
4
7
6
5
8
CS
S K
DI
DO
NC
ORG
GND
V CC
L 4
MCT 2
L MX 3 -
RT L8 111 C/
RT L8 102 E
P CI -E LA N
GND
U1 4
R T L8 1 11 C - V B - GR
1
8
19
2 0
2
1
2 2
2 3
2 4
2
5
2 6
2 7
2 8
2 9
3 0
3
1
3
2
1
2
3
4
5
6
7
8
9
10
1 1
12
13
1 4
1
5
16
48
47
46
45
44
4
3
4
2
414
0
39
3
8
3
7
36
3
5
34
3 3
6 4
6 3
6 2
61
60
59
5 8
5
3
5
2
51
50
4
9
17
54
55
56
57
N
C
L A NW A K E #
P E R S T#
D
V
D
D
1
2
E V D D1 2
HS I P
HS I N
E
G
N
D
RE F CL K _ P
RE F CL K _ N
E V D D1 2
HS O P
HS O N
E
G
N
D
D
V
D
D
1
2
/N
C
S RO UT 1 2 / V CT RL 1 2 A
A
V
D
D
3
3
MD I P 0
M DI N 0
F B 1 2 / A V DD 12
MD I P 1
M DI N 1
A V D D1 2
MD I P 2 / NC
MDI N 2 / NC
A V D D1 2/ NC
MD I P 3 / NC
MDI N 3 / NC
A V D D1 2/ NC
N
C
/D
V
D
D
1
2
V
D
D
33
E E S K
E E DI / A U X
V
D
D
33
E E DO
E E CS
D
V
D
D
1
2
N
C
N
C
N
C
N
C
D
V
D
D
1
2/N
C
V
D
D
3
3
I S OL A T E #
N
C
N
C
CL K R E Q#
RS E T
V DD S R/ V CT RL 1 2D
E NS R/ NC
CK T A L 2
CK T A L 1
A
V
D
D
3
3/N
C
A V D D1 2/ DV DD 1 2
V
D
D
3
3
D
V
D
D
1
2
/N
C
GP O
GP I
D
V
D
D
1
2
N
C
LE D 3
LE D 2
LE D 1
LE D 0
U ns tu ff
SW F2 520 CF -4 R7 M-M
P CI E _ RX N 4_ L A N [ 14 ]
L MX 1-
R 4 02 * 0_ 0 4
R 17 5 7 5_ 0 4
3. 3V
MX 3 -
St uf f
E E C S
R4 04
60mil
R 17 9 7 5_ 0 4
C6 7
2 2U _ 6. 3 V _ X 5R _ 08
RTL 81 02 E
L MX 2+
M A 0/ E E DO
P C I E _T X P 4 _L A N [ 1 4 ]
R 40 1 0 _0 4
P C I E _ TX N 4_ L A N [ 1 4 ]
MX 4 -
L 6 8
*W C M2 0 12 F 2 S - 1 61 T 0 3
1
4
2
3
C3 5 9
0 . 1U _ 16 V _ 0 4
L MX 1 -
C3 8 5
0 . 1 U_ 16 V _ 0 4
RT L81 02 E
R4 0 0 0_ 0 4
02/22
MX 3 + C3 7 0
0 . 1 U_ 16 V _ 0 4
LA N_ V DD 3
Un st uf f
1 . 2 V _ LA N
C 6 45
0 . 1 U_ 1 6 V _0 4
S tu ff
U ns tu ff
M CT 4
I S OL A T E #
1. 2V _ L A N
C358 must close
to U14 pin5
CL K _ P CI E _ G LA N [ 18 ]
E E C S
MCT 3
M DI O 2+
C L K _P C I E _ GL A N# [ 1 8 ]
L MX 2-
L 1 9
G S T 50 0 9 LF
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2 1 3
1 4
1 5
1 6
1 7
1 8
1 9
2 0
2 1
2 2
2 3
2 4
T CT 1
T D1 +
T D1 -
T CT 2
T D2 +
T D2 -
T CT 3
T D3 +
T D3 -
T CT 4
T D4 +
T D4 - MX 4 -
M X4 +
MCT 4
MX 3 -
M X3 +
MCT 3
MX 2 -
M X2 +
MCT 2
MX 1 -
M X1 +
MCT 1
L F- H6 442 S- 1
MDI O 0 +
C6 4 0
0. 1U _1 6 V _ 04
4 0m il s and l en gth < 2 00m il
L A N_ V D D3
1 . 2 V _L A N
1 . 2 V _ LA N
C 3 75
0 . 1 U_ 1 6 V _0 4
20mils
C 37 1
0 . 1 U_ 1 6V _ 0 4
C6 1
*4 . 7 U_ 6 . 3V _X 5 R_ 0 6
St uf f
LA N _ V DD 3
C1 0 09 1 - 1 08 A 4
J_ R J- 4 5
8
7
6
5
4
3
2
1 G ND 1
G ND 2
D D-
D D+
D B -
D C-
D C+
D B +
D A -
D A + s hi e l d
s hi e l d
Uns tu ff
S US B # [ 1 7, 2 0 , 2 6, 2 7 , 2 9]
MDI O 2 +
R4 5 3. 6 K _ 0 6
C 35 6
0 . 1 U_ 1 6V _ 0 4
RTL 81 02 E
L A N _V D D3
MX 4 +
L MX 3 +
C 3 57
0 . 1 U_ 1 6 V _0 4
C 64 4
* 0. 1 U _1 6 V _ 04
St uff
Un st uff
R4 01
M DI O 0-
Q2 8 *A O 3 40 9
G
D S
C3 6 8
22 P _ 5 0V _ 0 4
C3 64
0. 1 U _1 6 V _ 04
0_ 08 05
M X1 -
MDI O 1 +
L MX 2 -
Q2 9
*2 N 70 0 2 W
G
D S
HC B1 005 KF -1 21T 20
LA N _ V DD3
M DI O 0+
C2 8 4 0 . 0 1 U_ 16 V _ X 7R _ 04
V _D A C
C3 8 7
0. 1U _1 6 V _ 04
L 6 7
*W C M2 0 12 F 2 S - 1 61 T 0 3
1
4
2
3
15mils
L MX 3-
M DI O 3-
L MX 1 +
R2 1 7 0_ 0 4
L1 9
Schematic Diagrams
Audio Codec ALC662 B - 25
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Audio Codec ALC662

C los e t o cod ec pi n 3 8
5V S _ A UD
C2 5 9
0. 1 U _1 6 V _0 4 C5 06
0. 1 U_ 1 6 V _0 4
GREEN
A U DG
C5 6 8
6 80 P _ 50 V _ X7 R _0 4
R 33 4
2 . 2 K _0 4
5V S [ 12 , 1 3, 1 6 , 19 , 2 1 , 25 , 2 7]
MI C_ S E NS E
M I C1 - V RE F O - R
Z 2 4 04
C5 7 4
0. 0 1 U_ 1 6V _ X 7R _0 4
A Z _ S DI N 0 [ 1 3 ] R3 1 2 3 3 _0 4
Z 2 4 1 2
L 4 6 F C M1 00 5 K F - 1 21 T 03
A UD G
Z 2 4 2 4
R 38 5 *0 _0 4
CO DE C _E A P D # [ 2 5 ]
C5 8 8
6 80 P _ 50 V _ X 7R _0 4
MI C 1-L _ 73
BLACK
HP -R [ 2 5]
HP - L _ 73
MI C 1- L
A UDG
I NT _ MI C
Z 24 0 8
HP -R_ 7 3
R3 3 7
2 20 _ 04
Layout Note:
J _I N T MI C1
8 82 6 6 - 02 0 01
P CB F o o t pr i n t = 8 8 26 6 - 2 L
2
1
A UD_ A Z _ RS T # [ 1 3 , 25 ]
MI C 1- R _7 3
B E E P
I C H_ S P K R [ 1 5 ]
HP _ P L UG [ 2 5 ]
F R ON T- R [ 2 5]
Z 24 0 9
SPDIF OUT
K B C _B E E P [ 2 6 ]
F R ON T- L [ 2 5 ]
MI C_ S E NS E
L 4 7 F C M1 00 5 K F - 1 21 T 03
C5 5 6 4 . 7U _6 . 3 V _ X5 R_ 0 6
I NT _ MI C
C 56 5
4 . 7 U_ 6. 3 V _ X5 R _0 6
FOR M730T
HP - L
C5 1 4
1 0U _1 0 V _0 8
R 38 8 *0 _0 4
MI C1 - R_ 7 3
C1 5 5
6 80 P _ 50 V _ X7 R _0 4
C 5 76
1 U _1 0 V _0 6
R1 4 2 2 0 K _1 % _ 04
A U DG
C5 6 2 0. 1U _1 6 V _0 4
H P _O UT - L [ 2 5]
S P DI F O
MI C 1- V R E F O- R
MI C1 - L
L 38 HC B 10 0 5 K F - 12 1 T2 0
Close to codec
R1 16 4 . 7K _ 0 4
1
C2 36
0. 1 U_ 1 6V _0 4
R
L
J _ MI C _7 2
C1 2 10 3 - D0 6 09 - L
2
6
5
3
1
4
HEADPHONE
For M730T
A UD G
5 V S
HP - L [ 25 ]
A UD _A Z _ S DO UT [ 1 3]
Z 24 1 1
R 38 6 *0 _0 4
L5 4 F C M1 0 05 K F - 1 02 T 02
A UDG
4
Layout Note:
3. 3 V S _ A UD
MI C _S E N S E
C 5 75
1 0 U_ 1 0V _ 0 8
M I C1 - V RE F O - L
A UD _A Z _ S Y N C [ 1 3]
HP _ S E NS E
MI C1 - R
FOR M720T
Z 2 4 2 1
5
C 56 7
0 . 1 U_ 1 6V _ 0 4
M I C1 -V RE F O -L
Z 2 40 8
B E E P
Z 2 4 2 7
A Z _ S DI N0 _ R
C 23 7
0 . 1 U_ 1 6V _ 0 4
MI C2 - V R E F O
A UD G
MI C1 - L
Z 24 1 0
HP - R _7 3
JD _S E NS E 1
L 4 5
H CB 1 00 5 K F -1 21 T 20
A UDG
Z 2 4 2 6
A U DG
R7 2
4 . 7K _ 0 4
C 5 30 2 2 P _5 0 V _ 04
HP - R
JD _S E NS E 2
A UD G
2
Z 2 40 9
Layout Note:
6
2
S P DI F O
Lay ou t N ot e:
R3 20 3 9. 2 K _ 1 %_ 0 4
S P DI F O_ 7 3
Z 2 41 0
Z 2 41 1
R3 29 1 K _0 4
A UD _A Z _ B I T CL K [ 1 3]
Z 2 4 2 5
L 4 8 F C M1 00 5 K F - 1 21 T 03
C5 5 8 0. 1U _1 6 V _0 4
3
C5 6 6
1 0 U_ 1 0V _ 0 8
3 . 3V S [ 5 , 8. . 1 6 , 18 . . 2 3, 2 5 . . 2 7, 3 1 ]
R 38 7 *0 _0 4
R
L
J _ S P DI F _ 7 2
C1 2 10 3 - 1 06 0 9- L
2
6
5
3
1
4
3 . 3V S
HP _ S E NS E
C5 7 8
6 80 P _ 50 V _ X 7R _0 4
C5 7 0
1 0U _ 10 V _ 08
1
Z 2 4 2 8
C5 7 7
68 0 P _ 50 V _ X7 R_ 0 4
M I C2 - V RE F O
J_I NT MIC 1
C 23 8 1 0 0P _ 5 0V _ 0 4
C5 23 1 U_ 10 V _ 06
R 38 9 *0 _0 4
L 5 0 F C M1 00 5 K F - 1 21 T 03
PINK
C2 2 8 1 U_ 10 V _ 0 6
A UD G
R3 3 3
2 . 2K _ 0 4
A U DG
Z 2 4 3 0
C5 6 0 4 . 7U _6 . 3 V _ X5 R_ 0 6
Ve ry clo se to Au dio C ode c
Clo se to co dec p in 25
H P _O UT - R [ 25 ]
C 56 9
6 8 0P _ 5 0V _ X 7 R_ 04
HP -L _7 3
Z 2 40 3
C5 4 8 0. 1U _1 6 V _0 4
MI C 1- R
L 1 6
H CB 1 60 8 K F -1 21 T 25
C5 5 5 0. 1U _1 6 V _0 4
DIG ITA L
ANALOG
U 25
A L C6 6 2- G R
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
1 3
14
15
1 6
1 7
1 8
1 9
2 0
2 1
2 2
23
24
2
6
27
28
2 9
30
31
32
33
3 4
35
36
3 7
39
40
41
42
43
44
45
46
4 7
4 8
38 2
5
D
V
D
D
1
GP I O 0
GP I O 1 D
V
S
S
1
S DA T A - OU T
B I T -CL K
D
V
S
S
2
S DA T A - I N
D
V
D
D
2
S Y N C
RE S E T #
P CB E E P
S e ns e A (JD 1 )
L I NE 2 - L
L I NE 2 - R
MI C 2- L
MI C 2- R
CD -L
CD -GND
CD -R
MI C 1- L
MI C 1- R
L I NE 1 - L
L I NE 1 - R
A
V
S
S
1
V R E F
MI C1 - V RE F O - L
N. C .
M I C2 - V RE F O
L I NE 2 - V RE F O
MI C 1- V R E F O- R
N. C .
S e ns e B (JD 2 )
F RON T- O UT - L
F RO NT - OUT - R
N. C .
S U RR- O UT - L
J DR E F
S URR - OUT - R
A
V
S
S
2
CE N
L F E
N. C .
N. C .
E A P D
S P DI F O
A
V
D
D
2
A
V
D
D
1
S P DI F O _7 3
Cod ec pi n 1 ~ 11 an d p in 47 ~ 48
are D igi tal s ign als .
The o the rs ar e a nal og si gna ls.
H P _P L UG
R1 17 4 7K _ 0 4
5 V S _A U D
C 56 3
4 . 7 U_ 6. 3 V _ X5 R _0 6
HP _ P LU G
C5 8 0
10 0 0 P _5 0 V _X 7 R_ 0 4
MICIN
MI C 1 -R
J_ A UD _7 3
*8 7 15 1 - 12 0 71 G
1
2
3
4
5
6
7
8
9
10
11
12
C2 2 7 1 U_ 10 V _ 0 6
R3 23 2 0K _ 1 % _0 4
Layout Note:
C5 7 9
68 0 P _ 50 V _ X7 R_ 0 4 R3 30 1 K _0 4
R
L
J _ HP _ 7 2
C1 2 10 3 - 6 06 0 9- L
2
6
5
3
1
4
R385,R386,R387,R388,
R389
MI C1 - L _7 3
HP _ S E NS E
Z 2 4 2 9
E A P D_ MO DE
Sheet 24 of 40
Audio Codec
ALC662
Schematic Diagrams
B - 26 Audio AMP2056
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Audio AMP2056
Sheet 25 of 40
Audio AMP2056

S P K O UT L + _ R1
R 13 4 3 9 K _ 04
A U DG
Z 2 5 0 6
C2 6 0
0 . 1 U_ 1 6 V _ 04
Low mute!
S P K O UT L -
C1 0
18 0 P _ 5 0 V _ 04
S P K O UT L -
MU T E A M P #
C 5 3 8
0 . 1 U _1 0 V _ X 7 R_ 0 4
C5 2 0
0. 1U _ 1 6V _0 4
C 2 51 4 . 7 U _ 6. 3 V _ X 5 R_ 0 6
HP _ O UT - R [ 2 4 ]
R 14 0 3 9 K _ 04
H P _ O UT - L [ 2 4 ]
MU T E A M P #
Near CP+and CP-
C6 3 6
0. 01 U _ 16 V _ X 7 R_ 0 4
For M720T
3 . 3 V S
S P K O U TR - [ 1 9]
C 2 4 5
* 0 . 1 U_ 1 6 V _ 04
R _ HP _ O
5 V S
S P K O U TL - _ R
C6 2 0 6 8P _5 0 V _ 0 4
A U DG
L 1
F CM 1 00 5 K F - 12 1 T 0 3
L 5 7
* F CM 1 0 05 K F -1 21 T 0 3
C6 3 7
1U _ 1 0V _0 6
HP - R [ 2 4 ]
A U D_ A Z _R S T # [ 1 3 , 2 4 ]
S P K O UT R-
S P K O UT L - _ R1
S P K O UT L + S P K O UT R+
R144
M730T
5V S
5 V S [ 1 2, 1 3 , 1 6 , 1 9 , 21 , 2 4 , 2 7 ]
J _S P K L _ 72
8 8 2 66 - 0 2 0 0 1_ R
P C B F o o t p r i nt = 88 2 6 6 - 02 R
2
1
A U DG
C 6 1 5
* 1 80 P _ 5 0 V _ 0 4
S P K O U TR + [ 1 9 ]
R_ H P _ O
L 5 9
* F CM 1 0 05 K F -1 21 T 0 3
3 . 3 V S _ A M P
5 V S _ A M P
A UD G
C 6 1 3
* 1 80 P _ 5 0 V _ 0 4
C 2 61
0 . 1 U_ 1 6 V _ 0 4
5.6K_04
S P K O UT L +
S Y S M UT E A MP #
5 V S
C 2 57 4 . 7 U _ 6. 3 V _ X 5 R_ 0 6
J_ S P K R_ 7 3
*8 8 2 6 6- 02 0 0 1 _R
P C B F o o t p r i n t = 8 8 2 6 6- 0 2 R
2
1
Z 2 5 09
C 6 4 2
*0 . 1 U_ 1 6 V _ 0 4
3.01K_1%_04
C5 3 9 0 . 1 U_ 1 6 V _ 0 4
R1 2 7
1 0K _0 4
S P K OU T L+
C 51 5
*1 0 U _1 0 V _ 0 8
C 2 55 4 . 7 U _ 6. 3 V _ X 5 R_ 0 6
R141
Z 2 5 12
AP A205 6A
U2 6
A P A 2 0 5 6A
6
4
1 9
1 1
2
6
1
3
1 7
1 8
1 5
9
2 7
2
5
8
2 1
2 2
3
1 2
1 4
1 6
2 4
5
2
8
1 201
0
272
3
2
9
L _I N _ HP
R_ I N _ HP
HV D D
CV D D
S
D
#
C
G
N
D
R_ O UT _ HP
L _ O UT _ HP
CV S S
L _ OU T-
A MP _E N#
B
IA
S
L _ OU T +
R _ OU T-
R _ OU T +
R_ I N _ A MP
CP +
CP -
HV S S
HP _ E N
L _I N _ A M P
B
E
E
P
V
D
D
P
V
D
D
P
V
D
D
G
N
D
P
G
N
D
P
G
N
D
G
N
D
C 2 62 4 . 7 U _ 6. 3 V _ X 5 R_ 0 6
A U DG
L _ HP _O
S P K O UT R +
Z 2 5 1 0
Z 2 5 0 9
U 2 4
7 4 A H C1 G 0 8G W
1
2
5
4
3
A UD G
HP - L [ 2 4 ]
S B _ MU T E # [ 1 3 ]
3. 3 V S [ 5, 8 . . 1 6 , 1 8 . . 2 4 , 2 6, 2 7 , 3 1 ]
R3 2 1 10 0 K _ 0 4
F R O NT - L [ 2 4 ]
Z 2 5 19
C5 7 1
2 . 2 U_ 1 6 V _ X5 R _ 06
C6 2 1 6 8P _5 0 V _ 0 4
2
C5 7 2
2 . 2 U_ 1 6 V _ X5 R _ 06
D3 2 A S D7 5 1 V
A C
F R O NT - R [ 2 4 ]
Z 2 5 10
Z 2 5 0 5 R1 4 4 3. 0 1 K _ 1 % _ 04
L 5 8
* F CM 1 0 05 K F -1 21 T 0 3
5V S
R3 1 4 0_ 0 4
M720T
D03
BCN
A U DG
S P K O UT R -
R1 4 1 3. 0 1 K _ 1 % _ 04
1
L 2
F CM 1 00 5 K F - 12 1 T 0 3
C 6 12
* 1 80 P _ 5 0 V _ 0 4
U2 8
*7 4 A H C1 G0 8 G W
1
2
5
4
3
30mils
R 13 7
1 0 0K _0 4
5V S _ A MP
5V S _ A MP
K B C _ MU T E # [ 2 6]
6.2K_1%_04
Z 25 2 0
C2 5 6
0. 1 U _ 16 V _ 0 4
C 5 1 8
* 0 . 1 U_ 1 6 V _ 04
Z 2 5 1 3
C 6 14
* 1 80 P _ 5 0 V _ 0 4
R3 9 1 2 7 0 _ 0 4
J_SPK*_*
A U DG
L _ HP _ O
S P K OU T L-
R 3 22 1 0 K _ 0 4
J_ S P K L _7 3
*8 8 2 6 6- 02 0 0 1 _R
P C B F o o t p r i n t = 8 8 2 6 6- 0 2 R
2
1
C2 5 8
0. 1 U _ 16 V _ 0 4 R3 1 5 *0 _ 04
D03
BCN
L 5 5
H CB 1 0 0 5 K F - 1 2 1 T2 0
C2 6 3
*0 . 1 U_ 1 6 V _ 0 4
H P _ P L UG [ 2 4]
S P K O UT R -_ R1
L 5 6
* F CM 1 0 05 K F -1 21 T 0 3
R3 9 0 2 7 0 _ 0 4
C 51 6
*1 0 U _1 0 V _ 0 8
C2 5 3
0 . 1 U_ 1 6 V _ 04
For M730T
Q 5
DT C 11 4 E U A
C
E
B
C9
18 0 P _ 5 0 V _ 0 4
L 3 7
H CB 1 0 0 5 K F - 1 2 1T 2 0
CO DE C_ E A P D # [ 2 4 ]
A U DG
C 2 5 2
1 U _ 10 V _ 0 6
S P K O UT R +_ R 1
3.01K_1%_04
D03 BCN
? ? APA2057A
S P K O U TL + _ R
C 25 4
1 U_ 1 0 V _ 0 6
Schematic Diagrams
KBC-ITE IT8512E B - 27
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
KBC-ITE IT8512E

K B - S I 0
K B - S I 5
C1 8 2 0 . 1U _1 6 V _ 04
C4 7 9 1 U_ 1 0V _ 0 6
S M C_ B A T [ 3 2 ]
8 0 CL K
KBC_SPI_*_R = 0.1"~0.5"
T HE RM _ A LE R T# [ 2]
D 03 A
B OM ? ?
W D T _E N
K B C_ S P I _ CE #
R 27 6 10 K _ 0 4
C 18 0
* 0. 1 U _1 6 V _0 4
J_ECDBG1
K B C _S P I _ C E #_ R
B A T _ DE T
K B - S O0
V DD3
S E RI R Q [ 15 , 1 9]
CC D_ DE T # [ 1 9]
L 10
HCB 1 0 0 5K F - 1 2 1 T2 0
P W R_ B T N# [ 1 5 ]
J_ K B _ 7 2
8 5 20 2 - 24 0 5 1
2 4
2 3
2 2
1 4
1 2
1 1
2 1
8
2 0
1 9
6
5
1 8
4
1 7
1 0
9
7
3
2
1
1 6
1 5
1 3
CP U _F A NS E N [ 2 1]
L P C_ F R A ME # [ 1 3, 1 9 ]
K B - S O1 4
C P UT E MP
D 24
B A V 9 9
A
C
A C
A P _K E Y # [ 30 ]
K B - S I 5
K B C _ A GND
8 0 CL K
K B C_ S P I _ S CL K
K B C _W R E S E T #
C UR_ S E N S E _R
R2 7 3 4. 7 K _ 0 4
R2 8 1 10 K _ 04
K B C_ A GND
3 G_ DE T # [ 1 9 ]
L E D_ B A T _ F UL L# [ 2 1 ]
K B - S O1
C1 78
0. 1 U_ 1 6 V _0 4
1
CP U TE M P [ 2]
FOR M730T
C1 9 4 *1 0 P _ 50 V _ 04
3 .3V
W D _D I S A B L E
B A T _ V OL T _R
3 . 3V S
P ME # [ 14 ]
W L A N_ E N [ 20 , 2 1 ]
R 27 5 10 K _ 0 4
L E D_ TH RO TT L E # [ 1 9]
CC D_ E N [ 19 ]
R2 5 1 1 5 _1 % _0 4
J _ K B _7 3
*8 52 0 2 - 24 0 51
2 4
2 3
2 2
1 4
1 2
1 1
2 1
8
2 0
1 9
6
5
1 8
4
1 7
1 0
9
7
3
2
1
1 6
1 5
1 3
K B - S O7
RS M RS T # [ 1 5, 1 7 ]
K B C_ W RE S E T #
C 2 20
0 . 1 U_ 1 6V _ 0 4
MODEL ID SELECTOR
MP ? ? ?
P W R_ S W # [ 30 ]
S M C_ B A T
C P U_ F A N_ R
R2 8 0 1 0 0_ 0 4
C1 86
0. 1 U_ 1 6 V _0 4
R2 8 9 1 0 0_ 0 4
R 41 5
CH G_ E N [ 32 ]
X5 3 2. 7 6 8 K Hz
1 4
3 2
S CI # [ 1 5 ]
K B C _S P I _ S O _R
S MD_ B A T
K B - S O6
R 19 9 4. 7 K _ 0 4
K B - S I 6
3 G_ DE T #
V D D3
K B - S I 2
R2 9 4 10 K _ 04
S MD _C P U_ T HE RM
C 2 22
1 5 P _ 50 V _ 0 4
35mi l
8 0 DE T #
T OT A L _ CUR [ 32 ]
W L A N_ DE T # [ 2 0 ]
K B - S O1 5
8 0 DE T #
R2 4 0 1 5 _1 % _0 4
K B C_ A V DD
J 1
*OP E N_ 35 m i l
R 2 90
1 0 0 K _0 4
T HE R M_ RS T # [ 2 ]
K B - S O1 1
K B - S I 0
R 26 4 10 K _ 0 4
LOW ACTIVE
V D D3
S M C_ CP U _ TH E RM [ 2 ]
S M D_ B A T
K B - S O8
0V
Z 2 61 2
Z 2 60 8
K B - S O8
P C LK _ K B C
L I D_ S W # [ 1 2, 1 9 ]
R 37 0 *1 K _ 1% _ 04
FOR M720T
V DD3
R2 8 6 1 0 0_ 0 4
C4 8 5 1 U_ 1 0V _ 0 6
W L A N _P W R [ 2 0 ]
3 I N1
C 4 89
1 U _1 0 V _0 6
25mil
K B - S O1 4
K B - S O3
K B - S I 2
K B - S O5
K B C_ S P I _S C L K
K B - S O1 0
R2 85
I T8 512 E/ EX -- -0 _0 4 O HM
P CL K _ K B C [ 1 8]
B T_ E N [ 1 9 , 21 ]
V DD3 [ 1 3, 2 1 , 27 . . 3 0 , 32 ]
R9 0 * 10 _ 04
U 2 0
A T 35 1 0 I GV - 2 . 9 3- C - C- T 1
3
5
2
1
4
M R#
V C C
G ND
RE S E T#
W DI
Q2 1
2 N7 0 02 W
G
D S
K B - S I 7
K B - S O4
P C LK _ K B C
K B - S O1 0
R1 0 5 * 10 M _0 4
R 41 5
0 _ 0 4
K B C_ S P I _S I
N C1 *NC _0 4
L E D_ B A T _C HG# [ 2 1]
LE D _ A CI N# [ 2 1]
D 12
B A V 9 9
A
C
A C
K B C_ F LA S H
D 11
B A V 9 9
A
C
A C
K B C_ A GN D
GA 2 0 [ 1 3]
K B C_ S P I _ S I
T OT A L _C UR _R
R2 4 1 1 5 _1 % _0 4
S M C_ CP U _T HE R M
K B - S O0
R 2 39 3. 3 K _ 1 %_ 0 4
2
L P C _A D 2 [ 1 3 , 19 ]
V DD 3
Z 2 6 0 9
3 G_ DE T #
K B - S O1 5
R 20 1 4. 7 K _ 0 4
V DD 3
L E D_ S C ROL L # [ 1 9 ]
L CD _B R I GH TN E S S
D 25
B A V 9 9
A
C
A C
D 26
B A V 9 9
A
C
A C
T P _ CL K [ 2 1 ]
T O TA L _ CUR _ R
V CO RE _ ON [ 3 1 ]
CC D_ DE T #
S MC_ B A T
C P U_ F A N_ R
C 4 34 0 . 1 U_ 16 V _ 0 4
24
L P C _A D 3 [ 1 3 , 19 ]
K B - S I 7
K B - S O1 2
W DT _ E N
K B - S O7
K B - S I 3
S MI # [ 1 5 ]
3. 3 V S [ 5 , 8 . . 1 6, 1 8 . . 25 , 2 7 , 31 ]
K B - S O5
I T8 502 E- J-- - -0. 1U _16 V_0 4
C UR _S E N S E _ R
C4 3 5 *3 3 P _ 50 V _ 04
K B - S O9
C4 5 2 *3 3 P _ 50 V _ 04
D 27
B A V 9 9
A
C
A C
K B C _S P I _ S C LK _ R
K B - S O1 2
C1 9 2 *0 . 1 U_ 1 6V _ 0 4
K B C_ S P I _ S O
L E D _C A P # [ 19 ]
K B C _S P I _ S I _ R
T OT A L _C UR
C4 3 6 *3 3 P _ 50 V _ 04
5mi l
J_KB1
K B C_ RS T# [ 1 3 ]
W D _D I S A B L E
S MC _C P U_ T HE RM
K B - S I 1
K B C _ MUT E # [ 2 5 ]
K B - S I 3
K B - S I 4
C4 7 6
0 . 1 U_ 16 V _ 0 4
S US B # [ 17 , 2 0, 2 3 , 2 7, 2 9 ]
K B - S O3
C2 0 3
0. 1 U _1 6 V _0 4
S US C # [ 1 7]
R2 5 2 1 5 _1 % _0 4
S W I # [ 1 5 ]
R 28 5 *1 0 K _0 4
R2 8 8 10 K _ 04
M7 20T /M7 30 T
3 G_ E N [ 19 , 2 1]
CP U TE M P
C HG_ CU R
R2 9 2
1 0K _ 0 4
M ODE L_ ID
CL _ P W RO K [ 5 , 1 2, 1 5 , 17 ]
A C_ I N# [ 3 2]
W E B _ W W W # [ 1 9 ]
3 I N1
X
T OT A L _C UR
J _ E CD B G1
S P UF Z - 1 0S 3- V B - 0 - B
1 2
3 4
5 6
7 8
9 1 0
R 2 48 3. 3 K _ 1 %_ 0 4
K B - S I 1
C1 8 8
0. 1 U _1 6 V _0 4
C2 2 1
1 5P _ 5 0V _0 4
C CD_ DE T #
1
10
VO LTA GE
B A T _ DE T [ 3 2 ]
B UF _ P L T_ RS T # [ 1 4, 1 9 , 2 0, 2 2 , 23 ]
B A T _ V OL T
V DD3
K B - S O1 1
R 276
A C_ P RE S E NT [ 1 5 ]
R2 7 4 4. 7 K _ 0 4
CL K RU N#
B A T_ V OL T _R
X
B A T _V O LT [ 3 2]
K B C_ S P I _S O
B K L_ E N [ 12 ]
W E B _ E MA I L # [ 1 9 ]
L P C _A D 0 [ 1 3 , 19 ]
C4 5 1 *3 3 P _ 50 V _ 04
1 0K
DD _O N [ 28 ]
MO DE L _I D
K B - S O6
S M D_ CP U _ TH E RM [ 2 ]
L E D_ P W R# [ 2 1 ]
W D T _E N
K B - S O9
K/B MATRIX
FLASH
LPC
SMBUS
PS/2
PWM
UART
DAC
CLOCK
IT8512E
CIR
ADC
WAKE UP
PWM/COUNTER
LPC/WAKE UP
EXT GPIO
GP INTERRUPT
WAKE UP
GPIO
U4
I T8 5 1 2E / E X
1 4
1 3
1 0
9
8
7
6
1 7
5
1 5
2 3
1 2 6
4
5 8
5 9
6 0
6 1
6 2
6 3
6 4
6 5
3 6
3 7
3 8
3 9
4 0
4 1
4 2
4 3
4 4
4 5
4 6
5 1
5 2
5 3
5 4
5 5
1
1
2
6
5
0
9
2
11
4
12
7
1
2
1
374
8 5
8 6
8 7
1 2 0
1 2 4
2 2
3 5
1 2 5
1 8
2 1
1 1 2
1 0 9
1 0 8
1 2 3
8 8
8 9
9 0
4 7
4 8
2 4
2 5
2 8
2 9
3 0
3 1
3 2
3 4
6 6
6 7
6 8
6 9
7 0
7 1
7 2
7 3
11
2
2
7
491
22
11
3
7
5
2
1 2 8
7 9
7 8
7 7
7 6
8 3
8 4
8 2
3 3
2 0
9
1
8 1
8 0
1 6
1 1 9
5 6
5 7
9 3
9 4
9 5
9 6
9 7
9 8
9 9
1 0 7
1 1 0
1 1 1
1 1 5
1 1 6
1 1 7
1 1 8
1 0 0
1 0 1
1 0 2
1 0 3
1 0 4
1 0 5
1 0 6
1 9
W RS T #
L P C CL K
L A D 0
L A D 1
L A D 2
L A D 3
L F R A ME #
( P D ) LP C P D# / W UI 6 / GP E 6
S E RI RQ
E C S MI # / GP D4 ( P U )
E C S CI # / GP D3 ( P U )
G A 2 0/ G P B 5
K B RS T #/ G P B 6 ( P U )
K S I 0 / S TB #
K S I 1 / A F D #
K S I 2/ I N I T #
K S I 3/ S L I N #
K S I 4
K S I 5
K S I 6
K S I 7
K S O0 / P D 0
K S O1 / P D 1
K S O2 / P D 2
K S O3 / P D 3
K S O4 / P D 4
K S O5 / P D 5
K S O6 / P D 6
K S O7 / P D 7
K S O8 / A CK #
K S O 9/ B U S Y
K S O 10 / P E
K S O1 1 / E RR #
K S O1 2/ S L C T
K S O 1 3
K S O 1 4
K S O 1 5
V
C
C
V
S
T
B
Y
V
S
T
B
Y
V
S
T
B
Y
V
S
T
B
Y
V
S
T
B
Y
V
S
T
B
Y
V
B
A
T
A
V
C
C
P S 2C LK 0 / G P F 0( P U )
P S 2D A T0 / G P F 1( P U )
P S 2C LK 1 / G P F 2( P U )
( P D ) T MR I 0/ W UI 2 / GP C 4
( P D ) T MR I 1/ W UI 3 / GP C 6
L P C RS T #/ W UI 4 / GP D 2( P U )
( P D ) W UI 5 / GP E 5
P W RS W / GP E 4( P U )
R I 1 #/ W U I 0/ GP D0 ( P U )
R I 2 #/ W U I 1/ GP D1 ( P U )
( P D ) RI N G# / P W RF A I L# / L P CR S T# / GP B 7
T X D/ G P B 1( P U )
R X D/ GP B 0 ( P U )
( P D ) C TX / GP B 2
P S 2D A T1 / G P F 3( P U )
P S 2C LK 2 / G P F 4( P U )
P S 2D A T2 / G P F 5( P U )
( P D ) T A C H0 / GP D 6
( P D ) T A C H1 / GP D 7
P W M0 / GP A 0 ( P U )
P W M1 / GP A 1 ( P U )
P W M2 / GP A 2 ( P U )
P W M3 / GP A 3 ( P U )
P W M4 / GP A 4 ( P U )
P W M5 / GP A 5 ( P U )
P W M6 / GP A 6 ( P U )
P W M7 / GP A 7 ( P U )
A D C0 / GP I 0
A D C1 / GP I 1
A D C2 / GP I 2
A D C3 / GP I 3
A D C4 / GP I 4
A D C5 / GP I 5
A D C6 / GP I 6
A D C7 / GP I 7
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
A
V
S
S
C K 32 K E
C K 32 K
D A C3 / GP J 3
D A C2 / GP J 2
D A C1 / GP J 1
D A C0 / GP J 0
( P D ) E G CS # / GP E 2
( P D ) E G CL K / GP E 3
( P D ) E G A D/ GP E 1
G I NT / GP D 5 ( P U )
L 8 0 LL A T / GP E 7 ( P U )
V
S
S
D A C5 / GP J 5
D A C4 / GP J 4
P W URE Q #/ GP C7 ( P U )
( P D ) C RX / GP C 0
( P D ) K S O1 6 / GP C 3
( P D ) K S O1 7 / GP C 5
( P D ) I D0 / GP H 0
( P D ) I D1 / GP H 1
( P D ) I D2 / GP H 2
( P D ) I D3 / GP H 3
( P D ) I D4 / GP H 4
( P D ) I D5 / GP H 5
( P D ) I D6 / GP H 6
( P D ) I D7 / GP G 1
S M CL K 0 / GP B 3
S M DA T 0 / GP B 4
S M CL K 1 / GP C 1
S M DA T 1 / GP C 2
S M CL K 2 / GP F 6 ( P U )
S M DA T 2 / GP F 7 ( P U )
F L F RA ME # / GP G 2
F L A D0 / S CE #
F L A D1 / S I
F L A D2 / S O
F L A D3 / GP G 6
F L CL K / S CK
( P D ) F LR S T #/ W U I 7 / TM / GP G 0
( P D ) L 80 H LA T / GP E 0
R 6 7
1 0 0 K _0 4
10 K
V D D3
L P C _A D 1 [ 1 3 , 19 ]
K B - S I 6
M73 5T
B RI GH T NE S S [ 1 2 , 27 ]
K B - S O4
CH G_ CUR [ 3 2]
B T _D E T# [ 19 ]
L CD _ B RI GH TN E S S
K B - S O2
S US _ P W R _A C K [ 1 5 ]
C HG_ CU R
K B - S O1 3
K B - S O1
U 1 7
E N 2 5P 0 5 - 50 G CP
1
2
3
4
5
6
7
8
C E #
S O
W P #
V S S
S I
S C K
H OL D#
V D D
R8 4 *1 0 mi l _s h o r t
B A T _ DE T
V D D3
K B - S O1 3
R8 5 1 20 K _ 1% _ 0 4
3 I N1
K B C_ S P I _C E #
M ODE L _ I D
B A T _ V OL T
9
K B C_ B E E P [ 24 ]
S M D_ B A T [ 3 2 ]
C1 8 5
*0 . 1 U_ 1 6V _ 0 4
T P _ DA T A [ 2 1 ]
S M D_ CP U _T HE R M
K B - S I 4
C4 7 0
10 U _1 0 V _0 8
CP U _ F A N [ 2 1 ]
L E D _N UM# [ 19 ]
K B - S O2
C4 7 7 1 U_ 1 0V _ 0 6
Sheet 26 of 40
KBC-ITE IT8512E
Schematic Diagrams
B - 28 System Power, LED BKLT
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
System Power, LED BKLT

1
L E D 5-
V D D5
P Q5 9
*2 N7 0 02 W
G
D
S
S G ND
L V DS - L 1 N [ 5, 1 2 ]
L V DS - L 0 P [ 5, 1 2 ]
J _ LE D1 _7 3
* 20 3 7 4- 0 3 0E - 3 1
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
1 3
1 4
1 5
1 6
1 7
1 8
1 9
2 0
2 1
2 2
2 3
2 4
2 5
2 6
2 7
2 8
2 9
3 0
Onl y LED1 on
5 V S
LED1 t hr ogh LED5 on
P C2 06
* 0 . 1U _1 6 V _0 4
F s w= 2 MH z
0
L V DS - L CL K P [ 5 , 1 2]
P R9 1
10 0 K _ 04
L E D5 -
P Q2 9
A O4 4 68
4
6 2
5
7 3
1
8
SEL1
S US B
P U 9
*A 8 5 00
19
20
6
2
3
4
5
7
891
0
11121
3
1
4
1 5
1 6
1 7
1 8
1
2 6
2
2
23 24 2
5
2 1
2 7
E N
P W M
A P W M
S K I P
CO MP
F S E T
I S E T
L E D1
L
E
D
3
L
E
D
5
L
E
D
7
LG
N
D
L
E
D
8
L
E
D
6
L
E
D
4
L E D2
S E L1
S E L2
S E L3
P GN D
A GN D
O
V
P
S
W
S
W
V
IN
P GN D
E P
L E D_ P W R+
P C 20 1
* 10 U_ 2 5V _ 1 2
P R1 8 9 *0 _0 4
1
1
P Q3 2
2 N7 00 2 W G
D
S
S GN D
0
V DD 5 [ 28 , 2 9]
P R 14 7
* 10 0 K _0 4
P C1 0 3
*1 0 0P _ 5 0V _ 0 4
P C 10 0
1 0 0P _ 5 0 V _0 4
0 P C2 0 4
*1 U_ 5 0V _ 1 2
S GND
R.OVP = (V.OVP-30)/54.9uA
L V DS - L 0 N [ 5, 1 2 ]
2 0 K - 2 MH z
V DD5
3 . 3V S [ 5 , 8 . . 16 , 1 8 . . 26 , 3 1]
P Q 2 5
2 N7 0 0 2W G
D
S
0
1
V DD5
L E D 2-
P C1 0 4
*1 0 U_ 10 V _ 08
P C2 07
*0 . 1U _1 6 V _ 04
2A
S Y S 1 5V [ 1 2, 2 8 , 29 ]
S
G
N
D
0
P R9 5
10 0 K _0 4
0
P L V DD
LED1 throgh LED6 on
P Q 64
* 2N 7 00 2 W
G
D
S
P Q 27
A O 44 6 8
4
6 2
5
7 3
1
8
S GN D
P R1 8 7 *1 0K _ 0 4
1
0
S US B
Fsw= 26. 03/ R.FSET I D =
1. 23/ I .SET * 210
( mA/ LED)
V D D3
S U S B
5VS,3.3VS
1
L E D3 -
P D2 3 *F M2 6 0
A C
P R 1 54
1 M_ 0 4
0
3 . 3V S
P R 20 0
*1 0 _ 06
1
S US B # [ 1 7 , 2 0, 2 3 , 26 , 2 9 ]
P L1 0 *4 . 7u H
V I N
P R1 88
*1 . 05 K _ 1 %_ 0 4
S E L 2 = L
P R 19 1
* 13 K _ 1% _ 04
P Q6 0
*2 N7 00 2 W
G
D
S
P L V DD [ 1 2]
P R1 9 0 *1 0K L E D = 20 m A
P C9 8
0 . 1 U_ 1 6V _ 0 4
V DD5
V DD 3 [ 1 3, 2 1 , 26 , 2 8 . . 30 , 3 2]
0
L E D_ P W R+
L E D 6-
P R1 9 2
*1 2 K _0 4
P Q2 4
2 N7 00 2 W G
D
S
3A
S
G
N
D
1
I N V _B LO N [ 12 ]
L E D1 -
P R9 7
1 M_ 04
0
OV P=3 5V
M735T LED PANEL BACKLIGHT DRIVER
1
S G ND
B RI G HT NE S S [ 12 , 2 6 ]
6A
S Y S 1 5 V
3 . 3 V S
L E D 1-
L E D 3-
L V DS - L 2 N [ 5, 1 2 ]
S E L 3 = H
P _ DDC _C LK [ 5 , 1 2]
3A
P C1 05
*1 0U _1 0 V _ 08
LEDx Output
0
V DD 5
P C2 0 3
*1 U_ 5 0 V _1 2
L V DS - L CL K N [ 5 , 1 2]
L E D2 -
P C 20 2
* 10 U_ 2 5 V _1 2
S Y S 15 V
V I N [ 12 , 2 8. . 3 2 ]
SEL2
1
P C1 0 1
0 . 1U _1 6 V _ 04
S E L 1 = H
L V DS - L 2 P [ 5, 1 2 ]
L E D 4-
L E D4 -
0
L E D6 -
P R1 86
*1 00 K _ 04
1 0 0 - 4 0 0H z
5 V S [ 12 , 1 3, 1 6 , 1 9, 2 1 , 24 , 2 5]
SEL3
P R 1 93 *0 _ 06
P C 20 5
* 1U _1 0 V _ 06
P R9 8
1 00 K _ 04
30mil
P R1 8 5
*9 0 . 9K _ 1 % _0 4
1
6A
0
P _ D DC_ DA T A [ 5 , 12 ]
L V DS - L 1 P [ 5, 1 2 ]
Sheet 27 of 40
System Power,
LED BKLT
Schematic Diagrams
Power VDD3, VDD5 B - 29
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Power VDD3, VDD5

P L 8
4 . 7 UH _6 . 8 *7 . 3 *3 . 5
P R 17 9
* 10 K _ 04
P R1 58
8m _ 25
P R 85
1 00 K _ 0 4
S Y S 5 V [ 32 ]
P C1 92
* 1 00 P _ 50 V _ 0 4
P R 16 5
* 10 _ 0 6
P L 9
2. 5 U H_ 6. 8 *7 . 3 *3 . 5
6 - 06 - 0 054 0- 021
V DD 5
LG A TE 2
S GN D4
P R 16 2 * 10 m i l _ s ho r t
P R1 6 8
1 05 K _ 1% _ 0 6
P C1 8 6 * 10 0 P _ 50 V _ 0 4
P C1 63
0. 1 U_ 1 0 V _X 7 R_ 0 4
5V [ 1 6, 1 9 , 2 1, 2 9 . . 31 ]
7A
P C2 0 0
0. 0 2 2 U_ 16 V _ X 7R _0 4
P R1 82 1 0_ 0 4
S GN D4
V I N [ 1 2, 2 7 , 2 9. . 3 2 ]
P C 1 91
* 0 . 1U _1 6 V _ 04
P R1 7 5
*0 _0 4
5A
L DO5 V
L DO5 V
S G ND 4
P C 19 9 10 0 0P _5 0 V _X 7 R_ 0 4
P C1 76
*1 00 0 P _ 50 V _ X7 R _0 4
P R1 6 6
*0 _ 04
P R1 81 1 0_ 0 4
P C 1 87
* 2 2P _ 5 0V _ 0 4
P R 17 6 0 _0 6
5mil
P R1 7 8
*1 00 K _ 0 4
S Y S 5V
P D 16
F M 58 2 2
A
C
P D2 1
F M0 5 4 0- N
A
C
P J 1 2
*O P E N_ 5 mm
P R1 8 4
* 10 m i l _ s ho r t
P C 18 1 22 0 P _ 50 V _ 0 4
S GN D4
S G ND4
P J 1 3
*O P E N_ 5 mm
+P C 17 7
1 5 0U _ 6. 3 V _ V
1
2
5 V
P Q 57
* 2N 70 0 2 W
G
D
S
V DD 3
P Q 55
A O 44 6 8
4
6
2
57
3 1
8
P R 17 0
2 0 K _1 % _0 4
P J 1 4
*O P E N_ 3 5m i l
P R1 5 9 1 0 K _ 04
P Q5 3
A O 44 6 8
4
6
2
5 7
31
8
P C1 7 8
2 20 0 P _ 50 V _ X7 R _0 4
P R 17 1
* 1M _0 4
P R1 83
*1 0K _ 0 4
DD _O NH [ 3 0]
P C 17 4
0 . 1 U_ 10 V _ X 7R _0 4
S GN D4
P C1 89
0. 0 1 U_ 5 0V _ X 7 R_ 04
P R1 5 7
*1 0 _0 6
02/22
V I N 2
P C1 9 7
0 . 1U _ 10 V _ X7 R _0 4
P M _T HR MT RI P # [ 2, 5 , 1 3]
P D1 5
F M5 82 2
A
C
S GND 4
P C1 9 4
4 . 7U _ 6. 3 V _ X5 R _0 6
S Y S 5V
LD O5 V
S Y S 3 V
L GA T E 1
L GA T E 1
P Q 18
2 N7 0 02 W
G
D
S
5mil
E N_ 3 V
5A
P C1 8 4
1 00 0 P _5 0 V _ X7 R _0 4
P Q5 6
*2 N7 0 02 W
G
D
S
+
P C2 1 1
*1 5 U_ 2 5V _ D 2
P D 19 F M0 54 0 - N
A C
S Y S 1 5V [ 12 , 2 7 , 29 ]
V I N
S Y S 5 V
25mi l
D D_ ON # [ 2 9, 3 0 ]
E N_ 5 V
P R1 61 1 0_ 0 4
P C1 9 3
0 . 1U _ 10 V _ X7 R _0 4
+P C1 7 1
1 50 U _6 . 3 V _V
1
2
35mi l
P R1 7 7
*1 0 K _0 4
P C 1 48
0 . 1 U_ 1 6V _ 0 4
P C1 8 8
0 . 1 U_ 25 V _ X 7R _0 6
P Q 2 1
D T A 11 4 E UA
C
E
B
VDD3,VDD5
2 5mohm_NE C
S GN D4
P R1 4 1
20 0 K _ 1% _ 0 4
S Y S 10 V
L D O5 V
P C1 9 8
1 00 0 P _ 50 V _ X 7R _0 4
P C1 90
0. 0 1 U_ 5 0V _ X 7 R_ 04
S Y S 15 V
P R1 8 0
*0 _ 0 4
+
P C2 1 0
15 U _2 5 V _D 2
25 mo hm_ NE C
25mi l
S GND 4
P C1 8 0
*1 00 0 P _ 50 V _ X 7R _0 4
P R1 6 9 1 0 _0 4 V I N1
P Q5 2
A O4 46 8
4
6
2
5 7
31
8
E N _3 V
P C 19 5 2 20 P _ 5 0V _ 0 4
P R1 6 7
2 0K _ 1 %_ 0 6
P NC 1 *NC _0 4
P R1 63
3. 3 2 K _ 1% _ 06
P D 18 F M0 54 0 - N
A C
P C 18 2
0 . 0 1U _ 50 V _ X7 R _0 4
P R 17 2
6 3 . 4K _ 1 %_ 0 6
S G ND 4
V DD 3 [ 1 3 , 21 , 2 6 , 27 , 2 9 , 30 , 3 2]
T K / S S 2
P D2 2
F M0 54 0 - N
A
C
P D 17 F M0 54 0 - N
A C
E N_ 5V
P C1 7 9
2 20 0 P _ 50 V _ X7 R _0 4
P R1 60 1 0_ 0 4
PI N29 = SGND4
P U 8
L T C3 85 0
5
1
0
9
2 5
15
1 3
1 4
1 7 2 0
1
8
2 3
2 2
1
1 2
2
6
2
1
1
9
2
6
3
1 1
1 6
4
2 4
8
7
2 7
2 8
I T H2
ILIM
R
U
N
2
F RE Q / P L LF L T R
B
O
O
S
T
2
S W 2
T G2
B G2 B G1
IN
T
V
C
C
S W 1
T G1
T
K
/S
S
1
P GO OD
R
U
N
1
B
O
O
S
T
1
V
IN
I T H1
T
K
/S
S
2
V F B 1
E X T V CC
P GND
V F B 2
MO DE / P L L I N
S E NS E 2 +
S E NS E 2 -
S E NS E 1 +
S E NS E 1 -
P J 9
* OP E N _3 5 m i l
P C1 8 5
0 . 1U _ 10 V _ X7 R _0 4
P R1 56
10 m _1 2
DD_ O N [ 26 ]
S G ND 4
P R1 7 3 47 K _ 0 4
LD O5 V
P D 20 F M0 54 0 - N
A C
P Q 58
* 2N 70 0 2 W
G
D
S
P C1 9 6 1 0 0 P _5 0 V _ 04
S Y S 5 V
P R1 6 4 47 K _ 04
7A
S GND 4
P C1 6 2
0. 1U _1 0 V _ X7 R_ 0 4
P R1 74 * 0_ 0 4
S GN D4
5 V
V DD 5 [ 27 , 2 9]
P Q 54
A O 44 6 8
4
6
2
57
3 1
8
35mi l
P C 18 3 10 0 0P _5 0 V _X 7 R_ 0 4
Sheet 28 of 40
Power VDD3, VDD5
Schematic Diagrams
B - 30 Power 1.5VS, 1.05VS, 3.3V, 5V
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Power 1.5VS, 1.05VS, 3.3V, 5V

P C2 17
1U _1 0 V _ 06
S Y S 1 5V [ 1 2, 2 7 , 28 ]
5 V
S US B # [ 17 , 2 0, 2 3 , 2 6, 2 7 ]
V D D5
P R1 5 1 1 0 K _0 4
D D_ ON#
P R7 8 1 00 K _ 04
P Q3 0
2N 70 0 2W
G
D
S
1. 5 V S _ P W RG D [ 1 7]
1. 05 V S [ 2. . 5 , 7 , 8 , 13 , 1 6]
P R9 0
1 00 K _ 0 4
5V
+
P C 2 14
2 2 0U _ 4V _ D
P C1 5 1
8 2P _ 5 0V _ 0 4
P R 2 05
2 4 . 9 K _1 % _0 6
P Q4 7
2 N7 0 02 W
G
D
S
1 . 5V S [ 3 , 8, 1 3 , 14 , 1 6 , 19 , 2 0]
P U1 0
S C4 1 2 A
1
2
3
4
5 6 7 8
9
1 0
1 1
1 2
1
3
141
5
1
6
1 7
LX
B S T
V C C
DL
G
N
D
R
T
N
N
.C
N
.C
F B
V OU T
P GD
E N IL
IM
N
.C
N
.C
D
H
P A D
S U S B L [ 30 ]
1 . 05 V S
P C2 13
0. 1 U_ 5 0V _ 0 6
V 1 . 8
P Q 23
2 N7 00 2 W
G
D
S
P Q 46
2 N7 00 2 W
G
D
S
S Y S 15 V
P R 96
1 M_ 0 4
P R1 4 9
1 00 K _ 0 4
2. 5A
3 . 3 V
V 1 . 5
25mi l P C1 53
10 U_ 1 0V _ 0 8
DD _O N#
P R 20 4
1 0 . 7K _ 1 % _0 4
P C 90
0 . 0 33 U_ 1 6 V _X 7 R_ 04
S Y S 1 5 V
1. 05 V M_ P W RG D [ 1 7]
3 . 3V [ 2 , 1 2. . 1 7 , 1 9, 2 0 , 23 , 3 0]
P L 1 1
2. 5 UH + / - 20 % _B C I HP 1 0 40
1 2
V DD 3
V I N [ 12 , 2 7 , 28 , 3 0. . 3 2 ]
V DD 3 [ 1 3, 2 1 , 26 . . 2 8 , 30 , 3 2]
P C 10 2
4 7 0P _ 5 0V _ X 7R _ 04
P D 25
F M5 82 2
A
C
P C 15 8
1 0 U_ 10 V _ 0 8
2. 5A
P C1 52
10 0 0P _5 0 V _X 7 R_ 04
V I N
DD _ ON# [ 2 8 , 30 ]
V DD 5 [ 27 , 2 8]
+
P C2 15
*2 20 U_ 4 V _D
35mi l
P R1 4 8 1 0 0K _ 0 4
E N _ 1. 0 5 V S
P C 21 9
2 0 P _5 0 V _ 04
3 . 3V
1 . 5V S
P R 93
1 00 K _ 0 4
P Q6 5
I RF 7 4 13 Z P B F
4
6
2
7
3
8 5
1
P R1 5 2
1 9. 6 K _ 1% _ 06
3 A
P U 7
A P L 5 9 13
1
6
3
5
4
2
7
8
9
GN D
V CNT L
V O UT
V I N
V O UT
V F B
P OK
E N
V I N
P Q2 8
A O4 4 6 8
4
6 2
5
7 3
1
8 3 . 3 V
P R1 5 0
17 . 4 K _1 % _ 04
15A
P R2 02 1 0K _ 0 4
S US B L
3A
5V
1.5V
S US B L
P C9 9
*1 00 P _ 5 0V _ 0 4
P C 21 8
0 . 0 1U _ 16 V _ X7 R_ 0 4
P R2 0 1 5 . 1K _1 % _0 4
P C1 59
0. 1 U_ 1 6V _0 4
P Q6 6
I RF 7 8 32 Z T RP B F
4
6
2
7
3
8 5
1
P Q3 1
2N 70 0 2 W
G
D
S
V 1 . 0 5
5 V
P D2 4
F M0 54 0 - N
A
C
+
P C2 12
15 U_ 2 5 V _D
P J 1 0
* OP E N _3 m m
1 2
P Q2 6
A O4 46 8
4
6 2
5
7 3
1
8
5 V
3 A
V 1 . 8 [ 3 0 ]
P C 16 0
1 0 U_ 1 0V _ 0 8
P J 27
* OP E N _3 5 mi l
5mi l
P J 28
1 0m m
1 2
1.05VS
3A
P R 20 3
0 _ 04
P R9 4
1M _0 4
P C1 5 4
1 U_ 10 V _ 06
P C1 5 6
0 . 1U _ 16 V _ 04
5V [ 16 , 1 9 , 21 , 2 8, 3 0 , 31 ]
P C2 1 6
0 . 1U _ 16 V _ 04
3.3V,5V
Sheet 29 of 40
Power 1.5VS,
1.05VS, 3.3V, 5V
Schematic Diagrams
Power 1.8V, 0.9VSM B - 31
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Power 1.8V, 0.9VSM
Sheet 30 of 40
Power 1.8V,
0.9VSM

1 . 8 V _ P W R GD [ 17 ]
P R1 3 2
1 0K _ 1 % _ 04
V I N
V I N [ 1 2 , 2 7 . . 29 , 3 1 , 3 2 ]
V S S A
P Q 9
2N 7 0 02 W
G
D
S
P R1 3 3 1 0 _0 6
P R6 2
2 . 2K _1 % _ 0 4
P U3
S C 4 86
1 1
2
3
4
5
6
7
8
9
1 0
1
1 2
1 3
1 4
1 5
1 6
1 7
1 8
1 9
2 0
2 1
2 2
2 3
2 4
V T T E N
T ON
V D DQ S
V S S A
V C CA
F B
P G D
RE F
CO MP
V T T S
E N / P S V
V D DP 2
V D DP 2
V T T
V T T
P GN D1
P GN D2
P GN D1
DL
V D DP 1
I L I M
LX
D H
B S T
P C6 7
1 0 U _1 0 V _ 0 8
V S S A
A P K E Y # [ 1 9]
V DD 3 [ 1 3, 2 1 , 2 6 . . 2 9, 3 2 ]
P D 8 F M0 5 40 - N
A C
P L 5
2 . 5 U H_ 6 . 8 *7 . 3 *3 . 5
1 2
P R 5 4
1 0 _ 06
P C 14 0
0 . 1 U_ 5 0 V _0 6
P J 2
* OP E N _ 3m m
1 2
P C 48
*0 . 0 6 8 U_ 1 0V _0 4
P R 1 9 4 1 00 K _ 0 4
P R5 6
0 _0 6
P Q 4 3
I R F 7 41 3 Z P B F 4
6
2
57
3 1
8
P C4 4
1U _ 1 0V _ 0 6
P Q1 5
ND S 3 5 2A P _N L
G
D S
P W R_ S W # [ 2 6 ]
5 V
V 1 . 8 [ 29 ]
P R 1 4 2 20 K _ 1 % _ 04
P D 1 2
F M 0 5 40 - N
A
C
V I N
P R5 1 1 0 _ 06
P R 19 6 1 0 K _ 04
500mA
P C1 3 6
1U _ 10 V _ 0 6
P D7
F M5 8 22
A
C
P Q 14
2 N7 0 0 2W
G
D
S
P Q 4 0
2N 7 0 02 W
G
D
S
V I N
P R 14 3 1 0 0 K _0 4
0 . 9 V S M [ 10 , 1 1 ]
M_ B T N# [ 1 9 ]
P C5 5
4 . 7U _ 6. 3V _ X 5 R_ 0 6
P C5 2
1 U_ 1 0V _0 6
P J4
* OP E N_ 8 m m
1 2
P C 5 0
1 0 0 P _5 0 V _ 0 4
1.8V,0.9VSM
P R4 1 4 7 K _ 04
P Q 1 3
2 N 70 0 2 W
G
D
S
P C2 0 8
0. 1 U _5 0 V _ 0 6
1.5A
5 V
V T T E N
P C 4 2
1 0 00 P _ 5 0 V _ X7 R _0 4
V 1 . 8
5 V
+
P C1 4 6
22 0 U_ 4 V _ D
V 1 . 8
P C 7 7
0 . 1 U_ 1 6 V _ 04
P R 4 0
2 0 K _ 1% _ 0 4
7A P C 5 3
1 U_ 1 0 V _ 0 6
P R1 4 6
10 0 K _ 0 4
P C 15 0
0 . 1 U_ 5 0 V _0 6
V D D3
S US B L [ 2 9 ]
P R 14 0 1 0 0 K _0 4
V A
P R 14 4 1 0 K _ 0 4
V I N1
1 . 8 V E N
Ra
P C 4 9
1 0 U_ 1 0 V _ 08
DD _ ON # [ 2 8, 29 ]
P R 42
0 _ 06
P Q6 2
2 N 70 0 2 W
G
D
S
P C 5 6
* 4 . 7U _ 25 V _ X 5 R_ 0 8
5 V
P Q 61
2 N7 0 0 2W
G
D
S
P C3 5
1 U _1 0 V _ 0 6
P C7 4
0 . 01 U _5 0 V _ X 7R _ 0 4
P C 20 9
0 . 1 U _5 0 V _ 0 6
P R3 0 2 20 K _ 1 % _ 04
P R 39
1 M_ 0 4
V 1 . 8
1. 8 V
V I N
P D 9 F M0 5 40 - N
A C
P C 1 49
0. 1 U _5 0 V _ 0 6
P R5 7
0 _ 0 6
P C 1 3 9
1 U _1 0 V _ 0 6
P Q 4 2
A O 4 45 6
4
6
2
57
3 1
8
P Q 6 3
D TA 11 4 E U A
C E
B
P R1 4 5
1 0 K _ 0 4
P R4 7
10 _ 0 6
3 . 3V [ 2 , 1 2 . . 1 7 , 19 , 2 0 , 2 3, 29 ]
P C 51
*0 . 1 U _1 6 V _ 0 4
Rb
P R2 6
0 _ 0 6
P R 1 95
1 0 0 K _0 4
0 . 9 V S M
A P _ K E Y # [ 2 6 ]
P Q 17
2 N7 0 0 2W
G
D
S
P C1 4 2
*4 . 7 U_ 2 5 V _X 5 R _0 8
1 . 8V [ 5 , 7 , 8 , 1 0, 11 ]
P Q 1 6
D TA 11 4 E U A
C E
B
D D_ O NH [ 2 8 ]
P C 3 8
0 . 1 U_ 1 6 V _ 04
V I N
P C 4 6
0 . 1 U_ 1 6 V _ 04
P C3 6
0 . 1U _ 25 V _ X 7 R_ 0 6
5V [ 1 6 , 1 9, 2 1 , 2 8 , 2 9, 3 1 ]
P R2 5
4 . 7 K _ 0 4
3 . 3 V
P R 5 0
1 0 0 K _ 04
Schematic Diagrams
B - 32 Power VCORE
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Power VCORE

V I N
P R2 0 7. 5 K _ 1 %_ 0 4
CS 2 N
P R 1 4
7 . 5K _ 1 % _0 4
S G ND3
P C4 7
0 . 0 33 U_ 1 6 V _X 7 R_ 0 4
S GN D3
V C _S S
D RP +
40A
P C2 0
0 . 1U _5 0 V _ 06
P L 4
0. 5 UH _ 10 *1 0 *4 . 1
P C1 33
*1 00 P _ 5 0V _ 0 4
P R1 9
6 80 _ 0 4
H_ V I D4 [ 3]
V I N
B G 2
H_ V I D0 [ 3]
TRERMAL PAD
P U2
S C4 5 2
1
2
3
4
5
6
7
8
9
10
11
1
5
161
7
181
9
2
0
2
1
2
2
2 3
2 4
2 5
2 6
2 7
2 8
2 9
3 0
3 1
3 2
3 3
3
4
3
5
3
6
3
7
38 3
9
40 4
1
42 4
3
4
4
14 1
3
1
2
4
5
C LK E N #
V R E F
H Y S
C LS E T
V I D 6
V I D 5
V I D 4
V I D 3
V I D 2
V I D 1
V I D 0
B
S
T
2
T
G
2
D
R
N
2
B
G
2
V
5
_
2
P
S
I#
F
B
+
F
B
-
D RP -
DR P +
S S
D A C
A GN D
V C CA
E RR OU T
C S 2 +
CS 2-
CS 1-
C S 1 +
IS
H
N
C
E
N
V
5
_
1
B
G
1
D
R
N
1
T
G
1
B
S
T
1
V
IN
1
V
P
N
1
D
P
R
S
L
V
IN
2
V
P
N
2
P
W
R
G
D
G
N
D
P C3 9
0 . 0 33 U_ 1 6 V _X 7 R_ 0 4
CP U_ V C CS E N S E [ 3 ]
V COR E _ V RE F
P
C
3
1
15
0
0
P
_5
0
V
_
04
V COR E
E N _ V COR E
P RT 1
10 0 K _ NT C_ 0 6
1 2
P R4 3 4 7 K _ 04
DRP -
DCR _ DR1
C
S
1N
DRN 1
P Q4 1
I RF 7 8 32 Z T RP B F
4
6
2
7
3
8 5
1
P R 1 31 1 0_ 0 4
P R1 5 0_ 0 6
P R3 7
47 K _ 0 4
5mi l
C S 1 N
C L K E N#
P R 35
2 8K _ 1 % _0 4
P
C
13
4
0
.0
22
U
_1
6
V
_
X
7R
_0
4
P Q3 8
2 N7 00 2 W
G
D
S
S GN D3
P D1 3
F M0 5 40 - N
A
C
P C2 3
1 U_ 25 V _ 0 8
DRP +
P C3 3 1 0 00 P _ 50 V _ X 7R _ 04
5 V
P
C
3
7
10
0
0P
_5
0
V
_
X
7R
_0
4
P Q 3 7
2 N7 0 0 2W
G
D
S
P
R
2
1
1K
_1
%
_0
4
5 V
S G ND3
H_ DP R S TP # [ 2 , 5 , 13 ]
P R1 2 2 4 9 9 _1 % _0 4
P Q3 6
I RF 7 4 13 Z P B F
4
6
2
7
3
8 5
1
DP RS L_ S T P
+
P C1 3 1
33 0 U_ 2 . 5V _D 3
D
R
N
1
+
P C 12 4
3 3 0U _ 2. 5 V _ D3
P C 29
0 . 0 15 U _5 0 V _ 06
V CC A
P C1 2 8
1 00 0 P _ 50 V _ X 7R _ 04
5 V [ 1 6 , 19 , 2 1 , 28 . . 3 0 ]
P Q4 4
I RF 7 4 13 Z P B F
4
6
2
7
3
8 5
1
P R2 3 2 2 0K _ 1 % _0 4
C S 2P
I S H
P C 13 7
* 10 0 P _5 0 V _ 04
P C2 1
0 . 1U _ 50 V _ 06
P D3
F M5 8 22
A
C
P R 18
13 0 K _ 1% _ 0 4
S GND 3
T G1
+
P C 12 3
*3 3 0 U_ 2. 5 V _ D3
V I N
3 . 3 V S [ 5 , 8. . 1 6 , 1 8. . 2 7 ]
D RP _ L 1
P
C
25
0
.1
U
_
25
V
_
X
7
R
_
0
6
P R1 2 9 0 _ 0 6
20A
20A
V COR E
25mi l
E
-R
C
P C 26
*0 . 0 2 2U _ 16 V _ X 7R _0 4
D RP -
S GN D3
P Q 7
* I RF 7 8 32 Z T RP B F
4
6
2
7
3
8 5
1
P R 12 5
1 00 K _ 0 4
P R 3 3 1 0_ 0 4
DP RS L
H_ V I D5 [ 3]
B S T2
P R1 2 7 *1 0 m i l _ sh o r t
S GND 3
P R 11 *0 _ 0 4
Z 2 8 02
P R 22
13 0 K _ 1% _ 0 4
close to IMVP6
P
C
3
2
1
U
_
1
0V
_
0
6
P R 27
1 7. 4 K _ 1 %_ 0 4
P D1 1
F M0 5 4 0- N
A
C
V C ORE _ H Y S
C S 2 N
P R4 4 4 7 K _ 04
P R3 8 0 _ 0 6
P C4 3
1 00 0 P _ 50 V _ X 7R _ 04
P R 12 4
*1 0 K _ 04
D RP _ L 2
+
P C 11 6
3 30 U _2 . 5 V _ D3
P R2 4
1 0_ 0 6
P C4 5
1U _2 5 V _ 08
V
-R
C
2
P R4 9
1 00 _ 1 %_ 0 4
CS 1 N
P C1 3 5
*1 0 0P _5 0 V _ 04
P R 3 2 0 _ 06
+
P C 13 0
* 33 0 U_ 2 . 5V _D 3
E N_ V CO RE
P S I # [ 2 ]
B S T 1
P R 12 *0 _ 0 4
P C5 9
0. 1 U _5 0 V _0 6
5 V
P C 19
0 . 1 U_ 50 V _ 0 6
H_ V I D1 [ 3]
V CO RE [ 3 ]
P R 3 1 *1 0m i l _s h or t
B G 1
CL K E N# [ 1 5]
P R 16 * 0_ 0 4
P C3 4 1 0 0P _ 5 0V _0 4
P R3 6
47 K _ 0 4
DA C
H_ V I D6 [ 3]
P U1
*7 4A H CT 1 G0 2 GW
4
5
3
1
2
R 17 0 1 00 _ 1 %_ 0 4
S GN D3
V - R C1
3 . 3V S
C P U_ V S S S E N S E [ 3 ]
DCR _ DR2
P Q 3 9
I R F 7 83 2 Z T RP B F
4
6
2
7
3
8 5
1
P M_ DP R S L P V R [ 5 , 15 ]
P
C
3
0
1
00
P
_
5
0V
_0
4
+
P C1 2 9
33 0 U_ 2 . 5V _D 3
V I N [ 1 2 , 2 7. . 3 0 , 3 2]
B G 1
V
P
N
2
DRN 2
F B -
R1 7 2
10 0 _ 1% _ 0 4
P Q 6
*2 N7 0 02 W
G
D
S
H_ V I D3 [ 3]
DE L A Y _P W RGD [ 5 , 1 7]
B G 1
P R 46
1 7. 4 K _ 1 %_ 0 4
P R4 8 0 _ 0 6
P C2 7
0 . 01 5 U_ 5 0V _ 0 6
P C 22
0 . 1 U_ 5 0V _ 0 6
P R1 0 0 _ 0 4
5 V
V I N
D P RS L _ S T P
V C _ S S
P R 1 28 * 10 m i l _ s ho r t
H_ V I D2 [ 3]
Z 2 8 01
VCORE
B G 1
P R 13 *0 _ 04
P C1 8
* 0 . 1U _1 6 V _ 04
P R1 7 3 3 K _1 % _ 04
P C5 8
0 . 1 U_ 5 0 V _0 6
V COR E _ ON [ 26 ]
P R2 8
9. 1 K _ 1 %_ 0 6
P R1 2 3
1 00 _ 1 %_ 0 4
P C 24
1 U_ 1 0V _ 0 6
P D4
F M5 8 22
A
C
P L 3
0. 5 UH _ 10 *1 0 *4 . 1
V C ORE _ C LS E T
+
P C 1 32
1 5 U_ 2 5V _D 2
F B +
P C4 1
1 U_ 10 V _ 0 6
P C2 8 1 0 0P _ 5 0V _0 4
P R 29
1 K _ 04
B G 1
P RT 2
1 0 0K _N TC _ 06
1 2
C
S
2N
D RN1
T G2
P J 6
*O P E N_ 3 5m i l
P R1 3 0
*6 8 0_ 0 4
P Q8
*I R F 7 83 2 Z T RP B F
4
6
2
7
3
8 5
1
35mi l
V C ORE _ V R E F
P C4 0
6 80 P _ 5 0V _ X 7 R_ 0 4
S GND 3
D P RS L
D
R
N
2
V
P
N
1
P R 45
2 8K _ 1 % _0 4
+
P C1 3 8
1 5U _ 25 V _ D2
3 . 3V S
P R 1 26 1 0 K _0 4
Sheet 31 of 40
Power VCORE
Schematic Diagrams
Power AC-IN, Charger B - 33
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Power AC-IN, Charger

P Q 1
D TD 11 4 E K
C
E
B
S G ND 5
P C1 1 7 0 . 1 U_ 5 0V _ 0 6
P C 17
4 . 7 U_ 25 V _ X 5R _0 8
V D D3
V A
B A T _ V OL T [ 2 6 ]
P C 12 2
0 . 1 U_ 1 6V _ 0 4
P
C
11
8
0
.1
U
_
16
V
_
0
4
Z 3 23 1
P R 10 4
3 0 m_ 2 0
S GND 5
P L 1
HCB 4 5 3 2K F - 8 0 0 T6 0
P C 9
* 0. 1 U _1 6 V _0 4
P Q 2
D TA 1 1 4 E UA
C E
B
35mi l
S GND 5
P R 1 15
1 0 K _ 1% _ 04
P C 10 8
0 . 1U _ 50 V _ 06
02/22
S Y S 5 V [ 28 ]
P MB A T 1
B T D- 0 5 T I 1G
1
2
3
4
5
P Q 35 B
S P 8 K 1 0S F D5 TB 4
3
56
Ch arg e Cur re nt 2.0 A
S MD_ B A T [ 26 ]
V _ B A T
S Y S 5V
P R1 02
1 K _ 1% _ 04
P C1 4
4. 7 U_ 2 5 V _X 5 R_ 0 8
CH G_ CU R [ 2 6]
Z 3 22 8
B A T
V I N [ 1 2 , 2 7. . 3 1 ]
P
C
1
1
3
4
.7
U
_
2
5V
_
X
5
R
_
0
8
P Q 4
2N 70 0 2 W
G
D
S
P C 1
3 0 P _ 50 V _ 04
P R 1 14 0 _0 6
P C 12 1 *2 2 P _5 0 V _ 04
P C4
0. 1 U _5 0 V _0 6
Z 3 2 30
P Q 34
A M 48 3 5P
4
6 2
5
7 3
1
8
S G ND 5 S G ND 5
S G ND5
T OT A L _ CUR [ 26 ]
P C 3
3 0 P _5 0 V _ 04
P Q5
2N 70 0 2W
G
D
S
P R 1 19
1 K _ 1 %_ 0 4
V _B A T
Z 32 2 6
P R 9 9
1 0 K _ 08
P C7
0. 1 U_ 5 0 V _0 6
P C8
0 . 1U _ 50 V _ 06
P R 1 16
1 0 0 K _1 % _0 4
AC IN & CHARGER
V A
P C 6
0 . 1 U_ 5 0V _ 0 6
S Y S 5V
TRERMAL PAD
P U6
MB 3 9 A 13 2
1
2
3
4
5
6
7
91
0
111
2
1
3
1
4
1
5
1 7
1 8
1 9
2 0
2 1
2 2
2 3
25 2
6
2
7
2
8
2
9
30 3
1
8
16
2 4
3
2
3 3
V C C
- I N C1
+ I NC 1
A C I N
A C OK
- I N E 3
A D J 1
-IN
E
1
O
U
T
C
1
O
U
T
C
2
+
IN
C
2
-IN
C
2
A
D
J
2
C
O
M
P
2
B A TT
A D J3
CS
RT
V RE F
GN D
CT L1 C
E
L
L
S
P
G
N
D
O
U
T
-2
V
B
L
X
O
U
T
-1
C
B
C OMP 1
C
O
M
P
3
V I N C
T
L
2
S GN D
P
R
1
0
6
4
9
.9K
_
1
%
_0
4
P R8
3 0 K _ 1% _ 0 4
P C 10 7
0 . 1 U_ 50 V _ 0 6
P R 4
1 0 K _0 4
CHARGE
CURRENT
ADJ
P R7
0 _0 4
0 .7 5V/ 1A
P R 1 08
*1 0 m i l _ sh o r t
P L 2
10 UH _6 . 8 *7 . 3 *3 . 5
1 2
Z 3 22 9
P Q3
2 N7 0 02 W
G
D
S
V A
P C 1 0
0 . 1 U_ 5 0V _ 0 6
P
C
1
0
9
4
.7
U
_
2
5V
_
X
5
R
_
0
8
V A
P C1 2
0. 1 U_ 5 0 V _0 6
P C 1 19 1 00 0 P _ 50 V _ X 7R _0 4
J_ DC - J A CK 1
2D C- G2 1 3 - B 20 0
G ND2
G ND1
2
1
G ND4
G ND3
P
C
1
11
4
.7U
_2
5
V
_
X
5R
_0
8
P C1 1
0 . 1U _ 50 V _ 06
P R 11 1 0 _ 04
P Q 35 A
S P 8K 10 S F D5 T B
7
8
1
2
P C1 2 5
0 . 1 U_ 25 V _ X 7R _0 6
P R2 1 0 0 _0 4
P C1 1 5
0 . 1U _ 50 V _ 06
5mi l
P R 11 2 0 _ 04
P C 5
0 . 1 U_ 5 0V _ 0 6
25mi l
S GND 5
P
C
1
1
2
4
.7
U
_
25
V
_
X
5
R
_
08
P R 1 17
2 0 0 K _1 % _0 4
P C1 5
0 . 1U _ 16 V _ 04
P C1 2 6
22 0 0 P _5 0 V _ X7 R_ 0 4
12V~16.8V
P
C
11
4
4.7
U
_2
5
V
_X
5
R
_0
8
P D 2
F M0 5 40 - N
A C
V I N
C TL 1
P R9
30 m _ 20
V DD 3 [ 13 , 2 1, 26 . . 3 0]
P R1 10
10 K _ 1 %_ 0 4
TOTAL
POWER
ADJ
P C1 06
0. 1 U_ 5 0 V _0 6
Bttery Voltage:
CT L 1
P R 5
0 _0 4
P J 1
*O P E N_ 3 5 mi l
P C1 6
1 U_ 2 5V _0 8
P R 10 3
22 K _ 1 %_ 0 4
P F 2
5 A
P C 12 0
1 0 00 P _ 5 0V _ X 7R _ 04
P Q3 3
A M4 8 35 P
4
6 2
5
7 3
1
8
V A
CH G_ E N [ 2 6 ]
B A T
0 .7 5V/ 1A
P R1 0 0
1 30 K _ 1 %_ 0 4
P R 1 20
1 0 . 2 K _1 % _ 04
P R1 0 5
* 10 m i l _ s ho r t
P R 10 9 2 2 K _1 % _ 04
P
C
11
0
4.7
U
_
2
5
V
_X
5
R
_0
8
P C 13
0 . 1U _5 0 V _ 06
P R1 1 0 0 _0 4
S Y S 5 V
P R1 1 8
10 0 K _ 04
P D1
UD Z 1 6B
A C
Ch arg e Vol ta ge 16. 8V
S GND 5
S MC_ B A T [ 26 ]
P R1 0 1
1 0K _ 1 % _0 4
B A T
P R3 1 0 0 _0 4
Z 32 2 7
P R 12 1 1 00 K _ 0 4
V I N
To tal P owe r 60W
P
R
1
0
7
3
9.2
K
_
1
%
_
0
4
P C 2
3 0 P _ 50 V _ 04
A C_ I N# [ 2 6 ]
P R1 1 3
10 K _ 1 %_ 0 4
P C 1 27
1 0 0 P _5 0 V _ 04
P R6
6 . 04 K _ 1 %_ 0 4
S GN D5
B A T _ DE T [ 2 6 ]
Z 32 2 5
Sheet 32 of 40
Power AC-IN,
Charger
Schematic Diagrams
B - 34 Multi I/O Board 1/2
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Multi I/O Board 1/2

MA Z _ S Y N C [ 34 ]
MUS B _ P P 5 _ 3G _1 3
M C1 7
1 8 0P _ 5 0V _ 0 4
SW2
M GND
MW L A N_ CL K R E Q# [ 3 4]
M A Z _B I T C LK [ 3 4 ]
MG ND
MS P K R -
M D2
R Y - S P 1 7 2Y G3 4
A
C
1
M3 . 3 V S
M US B _ P N5 _3 G
MG ND
THROTTLE
LED
M 3. 3 V
MW E B _ E MA I L#
MR N1
*4 P 2 RX 0_ 0 4 1 4
2 3
SW4
M1 . 5 V S
M CL K _P C I E _ MI NI _ 3 G#
MA Z _ B I TC LK
M D1
R Y - S P 1 7 2Y G3 4
A
C
1
MM_ B T N#
M J_ MF B 1_ 7 3
*5 P 1- 2 5 1A 4 - 1 3 V 00 - 2 14
1 2
3 4
5 6
7 8
9 1 0
1 1 1 2
1 3 1 4
1 5 1 6
1 7 1 8
1 9 2 0
2 1 2 2
2 3 2 4
2 5 2 6
2 7 2 8
MC 19
0 . 1U _1 6 V _ 04
M P CI E _ TX P 3 _ 3G
MW L A N_ C LK R E Q#
MC 16
1 80 P _ 50 V _ 0 4
ML 6
F CM 10 0 5K F - 12 1 T0 3
MP C I E _R X N3 _3 G
ML I D_ S W #
MP C I E _R X P 3_ 3 G
MC LK _ P C I E _M I NI _ 3G # _1 3
MG ND
MP C I E _W A K E #
MCA P _ L E D#
M3 . 3 V
MU S B _P N3 _1 3
M3 G_ E N
MJ _ S P K R_ 7 2
8 82 6 6- 0 2 00 1
P CB F o o t p r i n t = 88 2 66 - 2 L
2
1
M A Z _ S DI N1
MUS B _ P P 3 _ 13
MW E B _ E M A I L#
M J_S PK R_7 2
MA Z _ S DI N 1 [ 34 ]
M C1
0 . 1 U_ 16 V _ 04
MG ND
MGN D
M A Z _ RS T #
MP CI E _ R XN 3_ 3 G_ 13
MG ND
MG ND
M3 . 3 V S
MU S B _P N 3
M LI D _S W #
SW6
2
M1 . 5 V S
MA Z _ RS T# [ 3 4 ]
M M_ B T N#
SW8
M US B _ P P 3 [ 34 ]
MA P K E Y #
MC 22
0 . 1U _1 6 V _ 04
MU S B _P N5 _3 G_ 1 3
M S P K R+
M 3 . 3V S
M P CI E _ RX P 3 _3 G
M A Z _ B I TC LK
M1 . 5 V S
M3 . 3 V
MW E B _E M A I L#
MP C I E _R XN 3 _3 G [ 3 4]
M1 . 5 V S [ 3 4]
M 3G _ DE T #
MP C I E _W A K E #
MP C I E _T X P 3 _3 G
MC LK _ P C I E _M I NI _ 3G #
MB U F _P LT _ RS T #
MW L A N _C LK R E Q#
MSW 1~ 4
MP C I E _R X P 3_ 3 G_ 13
MS W 4
T JG - 5 33 - S - V - T / R
3
1
4
2
56
MP C I E _R X N3 _3 G_ 1 3
MS W 2
T JG - 5 33 - S - V - T / R
3
1
4
2
56
3.3 VS= 2A
MUS B _P N 3 [ 3 4]
M CL K _P C I E _ MI NI _ 3 G
MW L A N _C LK R E Q# [ 3 4 ]
MG ND
MA Z _ S DOU T
M3 . 3 V [ 3 4]
M US B _ P P 5_ 3 G
MS P K R-
M D4
R Y - S P 1 72 Y G 3 4
A
C
2
MP CI E _ T XN 3 _3 G [ 34 ]
M S A T A _L E D#
MR 6
2 20 _ 04
MJ _ MF B 2 _7 2
5 P 1- 25 1 A 4- 1 3 V 00 - 2 1 4
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
MP CI E _ RX P 3 _ 3G [ 34 ]
MS C ROL L _ LE D #
MR N3
*4 P 2 RX 0_ 0 4 1 4
2 3
SPEAKER
MU S B V CC 2
M A Z _S D OU T [ 3 4 ]
MU S B _P N 5 _3 G
M A Z _ S DOU T
M3 G_ E N
MQ 1
D T A 11 4 E UA C
E
B
M 3. 3 V S
M P CI E _ W A K E # [ 3 4 ]
MP CI E _ R XP 3 _ 3G _1 3
4
MG ND
M P CI E _ RX N3 _ 3G
M CA P _ L E D#
M NU M_ LE D #
M C9
* 0 . 1U _1 6 V _0 4
M D3
R Y - S P 1 7 2Y G3 4
A
C
MR2
22 0 _0 4
M R1 10 0 K _ 04
MC LK _ P CI E _ MI N I _ 3G [ 3 4]
FO R E MI
MR 5
2 20 _ 0 4
M3 . 3 V S
MP CI E _ T X P 3_ 3 G_ 13
MU S B _P P 3
MM_ B T N#
M 3. 3 V S
M S P K R+ _R
M S A T A _L E D#
FOR M730T
2
M 73 0T/ M73 5T D0 3
B CN ? ? 470
MG ND
MA Z _ S DI N1
MW L A N_ CL K R E Q#
M US B V CC 2
For M720T
MC LK _ P C I E _M I NI _ 3G
MA Z _ S Y NC
MS A T A _L E D#
3
MW E B _ W W W #
MA P K E Y #
MUS B _ P N 3_ 1 3
MCL K _ P CI E _ MI N I _3 G _1 3
MR N5
*4 P 2 RX 0_ 0 4 1 4
2 3
M 3 . 3V S
3. 3V S=2 A
MC LK _ P C I E _M I NI _ 3G _ 13
MW E B _W W W #
M US B _ P P 3
MR 3
22 0 _ 04
MG ND
M3 . 3V S
MU S B V CC 2 [ 3 4 ]
MNU M_ LE D #
M GN D
M TH ROT T LE _L E D#
M GN D
MP CI E _ T X N3 _3 G_ 1 3
MT H ROT T LE _ L E D#
M S 1
S M D8 0 X8 0
1
1
LED
POWER SWITCH
LED
MG ND
MS 2
S MD 80 X 80
1
1
3
3/ 31 MS1? ? 180?
BY? ? ? ?
M3 . 3V S MCL K _ P CI E _ MI N I _ 3G # [ 3 4]
M3 . 3 V S [ 3 4]
MA P K E Y #
MS P K R+
M S CRO LL _ L E D#
M R7
2 2 0 _0 4
M GN D
MP C I E _T X N3 _ 3G
MP C I E _T X P 3 _3 G_ 1 3
MA Z _ RS T #
HDD/ODD
LED
NUM LOCK
LED
MU S B _P P 5_ 3 G_ 13
MS W 1
T JG - 5 33 - S - V - T / R
3
1
4
2
56
M P CI E _ TX P 3 _ 3G [ 3 4 ]
MC 11
*0 . 1 U_ 1 6V _ 0 4
LID SWITCH
ML I D_ S W #
MG ND
MUS B _ P N 5_ 3 G_ 13
MCL K _ P CI E _ MI N I _3 G #_ 1 3
MD 6
RY - S P 17 2 Y G 34
A
C
MS W 3
T JG - 5 33 - S - V - T / R
3
1
4
2
56
MP C I E _T X N3 _ 3G _1 3
M US B _ P P 5 _3 G [ 3 4 ]
M US B _ P N5 _ 3G [ 3 4 ]
MS P K R +
M A Z _ S Y NC
MU S B _P P 5_ 3 G
MC 18
0 . 1U _1 6 V _ 04
FOR M720T
SCROLL LOCK
LED
MU 1
M US B _ P N3
M J _M F B 1_ 7 2
5P 1 - 2 51 A 4 - 1 3V 0 0 - 21 4
1 2
3 4
5 6
7 8
9 1 0
1 1 1 2
1 3 1 4
1 5 1 6
1 7 1 8
1 9 2 0
2 1 2 2
2 3 2 4
2 5 2 6
2 7 2 8
MJ _ MF B 2 _ 73
* 5P 1 - 2 51 A 4 - 1 3V 0 0 - 21 4
1 2
3 4
5 6
7 8
9 1 0
11 1 2
13 1 4
15 1 6
17 1 8
19 2 0
21 2 2
23 2 4
25 2 6
27 2 8
MU S B V CC 2
MR N2
*4 P 2 RX 0_ 0 4 1 4
2 3
M3 G_ DE T #
MN UM_ L E D#
MR 4
2 20 _ 04
1
MB U F _P L T _ RS T # [ 3 4]
M P CI E _ TX N3 _ 3 G
M3 G_ DE T# [ 3 4 ]
MW L A N_ C LK R E Q#
MG ND
M S P K R-
M GND
MW E B _ W W W #
MG ND
MD 5
RY - S P 1 50 DN B 84 - 5 / 1 X
A
C
HOT KEY & POWER SWITCH
MG ND
M GND
M S P K R- _ R
MU S B _P P 3_ 1 3
MT HR OT TL E _ L E D#
M U1
MH- 2 4 8
1
2
3
V CC
G
N
D
O UT
ML 7
F CM 10 0 5K F - 12 1 T0 3
MR N4
*4 P 2 RX 0_ 0 4 1 4
2 3
M GND
M3 G_ E N [ 3 4]
MS C RO LL _ LE D #
MB U F _P L T _ RS T #
MC A P _ LE D #
MC8
0. 1 U_ 1 6V _ 0 4
CAPS LOCK
LED
Sheet 33 of 40
Multi I/O Board 1/2
Schematic Diagrams
Multi I/O Board 2/2 B - 35
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Multi I/O Board 2/2

I H 8
C 23 7 D1 4 6
MR1 2 *4 . 7 K _ 04
MR 11
2 2_ 0 4
MC 13
0 . 1U _1 6 V _0 4
M3 G_ DE T # [ 3 3]
MGN D
MG ND
Z 3 5 04
MJ _ RJ - 1 1
P J S - 02 F B 3 G
1
2 TI P
RI NG
FOR M720T
1
I H2
MT H3 1 5D 1 11
2
3
4
5 6
7
8
9
M3 . 3 V [ 3 3]
? ? ? ? ? ? ? ? ?
MG ND
ML 1
H CB 1 00 5 K F - 1 21 T 20
M GND
MC 27
*2 2 P _5 0 V _0 4
I H1 1
C2 3 7D 14 6
M C2 1
1 50 U_ 6 . 3V _V
FOR M730T
M3 . 3 V
M US B _ P P 5 _3 G [ 3 3]
M3 . 3 V S
11
1
60 mil
M3 . 3 V S [ 3 3]
M CL K _P C I E _ MI NI _ 3 G# [ 3 3 ]
MU I M_ P W R
I H9
C2 76 D1 8 6
20 mil
MG ND
M US B _ P P 3 _R
MG ND
MUI M _P W R
MU I M_ DA T A
1
I H 3
MT H2 37 D 11 1
2
3
4
5 6
7
8
9
M GN D
M1 . 5 V S
MC1 4
10 0 U_ 6 . 3V _ B 2
MA Z _ S DI N 1 [ 33 ]
KEY
MJ _3 G1
88 9 10 - 5 2 04
3
5
7
9
1 1
1 3
1
1 5
2 3
2 5
2 1
2 7
3 1
3 3
2 9
1 7
1 9 20
3 7
3 9
4 1
4 3
4 5
4 7
4 9
5 1
44
42
18
16
14
2
12
10
8
6
4
22
24
26
28
30
32
34
36
38
40
46
48
50
52
3 5
B T _ DA T A
B T _ CH CL K
C LK R E Q#
G ND0
R E F CL K -
R E F CL K +
W A K E #
G ND1
P E T n 0
P E T p 0
G ND2
G ND3
P E R n0
P E R p0
G ND4
N C3
N C4 W _ DI S A B L E #
N C6
N C7
N C8
N C9
N C1 0
N C1 1
N C1 2
N C1 3
L E D_ W LA N #
NC( L E D _W W A N #)
GND 6
UI M _V P P
UI M _R E S E T
3. 3 V _ 0
UI M _C LK
UI M _D A TA
UI M_ P W R
1. 5 V _ 0
GND 5
P E RS E T #
3 . 3V A U X
GND 7
1. 5 V _ 1
N C( S M B _C LK )
N C( S M B _D A TA )
GND 8
N C( US B _ D- )
N C( U S B _D +)
GND 9
NC( L E D _W P A N #)
1. 5 V _ 2
GN D1 0
3. 3 V _ 1
G ND1 1
MGN D M GND
MA Z _ RS T# [ 3 3 ]
USB PORT
RJ-11
M1 . 5 V S [ 3 3]
M CL K _P C I E _ MI NI _ 3 G [ 3 3 ]
Z 3 50 2
MUI M _D A TA
MUS B V CC
MG ND MGN D
2
USB trace requirment
M A Z _S D OU T [ 3 3 ]
M GN D
M A Z _B I T C LK [ 33 ]
MC 23
1 0U _1 0 V _ 08
? ? 6-34M72SS-010
M GND
MU S B V CC 2 [ 3 3 ]
MU I M_ P W R
M R1 3
*1 0m i l _s h or t
M R8 *0 _0 4
MGN D
ML 2 B K 16 0 8H S 12 1
? ? 6-34-D90T0-010-1
? ? 2.5mm ? ?
La you t not e:
MU I M_ DA T A _ R
M C2
0 . 1 U_ 16 V _ 04
1
MG ND
MA Z _ S Y N C [ 33 ]
I H5
C2 56 D 14 6
? ? 6-34-M56AS-011
I H1 0
C2 37 D 14 6
M US B _ P N5 _ 3G [ 3 3 ]
MJ _ MOD E M1
85 2 0 5- 0 2 00 1
2
1
3G/Raboson
P I N GN D1 ~ 2= MG ND
MU I M_ V P P
MJ _ US B 1
C 10 7 B 3 - 10 4 03 - Y
1
G
N
D
1
2
3
4
G
N
D
2
G
N
D
3
G
N
D
4
V +
s
hie
ld
D A T A _L
D A T A _H
G ND
s
h
ie
ld
sh
ie
ld
s
h
ie
ld
MA Z _ S DI N 1_ R
M C2 0
1 5 0 U_ 6. 3 V _ V
MDC MODULE
? ? 6-34-M72SS-020
MG ND
M3 . 3 V S
M B UF _ P L T_ RS T # [ 3 3 ]
12
MW L A N_ C LK R E Q# [ 3 3 ]
MU I M_ RS T
MG ND
ML 3 B K 16 0 8H S 12 1
M GND
MG ND
M1 . 5 V S
1
I H1
M TH 3 15 D1 1 1
2
3
4
5 6
7
8
9
MG ND
MG ND
MC 3 0 . 1 U_ 16 V _ 04
M1 . 5V S
M1 . 5 V S
M P CI E _ T XP 3 _ 3G [ 33 ]
MUI M _V P P
MUS B _ P P 3 [ 33 ]
M GND
M 3G _ E N [ 3 3 ]
MG ND
10mil
MODEM
MC7
22 P _ 50 V _ 0 4
M C5
0 . 1 U_ 1 6V _ 0 4
MP CI E _T X N3 _3 G [ 3 3]
M GND
MU S B _P N 3 [ 3 3 ]
1
I H 6
M T H3 15 D1 1 1
2
3
4
5 6
7
8
9
MC 4
0 . 1U _1 6 V _0 4
M GND
M C2 8
* 2 2P _ 5 0V _ 0 4
MC 2 5
*2 2 P _ 50 V _ 04
ML 4
*W CM 20 1 2F 2 S - 1 6 1T 0 3
1
4
2
3
MJ_MODEM1
M3 . 3 V
M UI M _C LK
Z 3 5 03
MUI M _R S T
RJ-11
M3 . 3 V S
M3 . 3 V S
3/ 31 DEL
*MC15 F OR EMI
I H4
C2 56 D1 4 6
M GN D
M US B _ P N3 _ R
I H 7
C 23 7 D1 4 6
M L5
H CB 1 60 8 K F - 1 21 T 25
MG ND
Z 3 50 1
MG ND
MR 1 5 *1 0 mi l _ sh o r t
M J_ MD C1
8 8 01 8 - 12 0 G
1
3
5
7
9
1 1 12
10
8
6
4
2
GN D
A za l i a _ S DO
GN D
A za l i a _ S Y N C
A za l i a _ S DI
A za l i a _ RS T # A za l i a _B C L K
G ND
G ND
3. 3 V Ma i n/ au x
R E S E RV E D
R E S E RV E D
La you t ?
1. SI M? ? ? ? ? ? ? ? ( 1 0mi l )
2. ? ? ? ? ? ? ? ? GND
3. SI M h ol d ? ? ? ? ? GND? ?
4. SI M CONN ? ? MI NI CARD CONN
FOR M720T
M3 . 3 V S
3/ 31 DEL
* MC12 FOR
EMI
MP CI E _R XP 3 _ 3G [ 3 3]
MJ _MDC1
MGN D
MU I M_ CL K _ R MR1 4 *1 0m i l _ s h or t
MUS B V C C2
MG ND
M GN D
M P CI E _ W A K E # [ 3 3 ]
(TO P VIE W)
LOC K
OP EN
M J_ S I M 1
S I M L OCK 1 7 70 6 6 1- 1
C 7
C 6
C 5 C1
C2
C3
UI M_ DA TA
UI M_ V P P
UI M_ GN D UI M_ P W R
UI M_ RS T
UI M_ CL K
MG ND
MC 24
0 . 1 U_ 1 6V _ 0 4
MP C I E _ RX N3 _3 G [ 3 3 ]
MUI M _C LK
MC 6
0 . 1U _1 6 V _0 4
M C2 6
* 22 P _ 50 V _ 0 4
2
Sheet 34 of 40
Multi I/O Board 2/2
Schematic Diagrams
B - 36 Finger Printer Board
B
.
S
c
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D
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Finger Printer Board

F 3. 3 V
F R 2 1 0K _ 0 4
F GR I D0 / S E N S E
3 30 K_ 04
F G ND
F U S B _ P P 1 _R
F G ND
F R5
0 _0 4
F C 3
1 U_ 1 0 V _ 06
F G P I O0 / I N T
F R1 6
*0 _ 06
F GND
F G ND
F E S D _R I NG
TC S4 C
F T C_ V D D
Z 3 7 0 6
F C 1 3 1 U_ 6 . 3 V _ 04
F G ND
F D V DD 1
F G ND
F DA T A 1
F GND
F G ND
F U1
S N7 4 L V C1 G1 2 3 DCT
8
7
6
5 4
3
2
1
V C C
Rx / Cx
Cx
Q GND
CL R#
B
A #
Z 3 7 0 1
F R 2 0 2 7 . 4 _1 % _ 04
F G ND
F
J_
F
P
1
F U3
M9 5 12 8 W M N6 T P
1
2
3
4
5
6
7
8
CS #
Q
W P #
V S S
S
S CK
H OL D#
V D D
F C 1 4 1 U_ 1 0 V _ 06
F J _ F P 1
8 52 0 1 - 04 0 5 1
1
2
3
4
F G_ F E T
F R4
3 3_ 0 6
F U S B _ P P 1
F G ND
F C 1 6 0 . 1 U_ 1 6 V _0 4
U ns tu ff
3/31 ? ? FUSB_PN1 BOT? ? -? Case ? ?
F Q1
ND S 3 52 A P _ NL
G
D
S
F G _ F E T
F R6
*3 3 0K _0 4
F R 1 4 4 7 K _ 04
4
F X I N
F R1 3 4 7K _ 0 4
F GP I O 1
F E S D _G ND
F C2 0
4 7P _ 5 0 V _0 4
F G ND
F M I S O/ M OD E 3
TC S4 B
F G P I O0 / I N T
F R9 4 7K _ 0 4
F GN D
F G ND
F A V DD
F C 4
0 . 1U _ 16 V _ 0 4
F C 9
0 . 1U _ 25 V _ X 7R _ 06
F U4
T CS 4 B
A 1
B 1
C1
D1
E 1
F 1
G1
H1
J1
A 2
B 2
C2
D2
E 2
F 2
G2
H2
J2
A 3
B 3
C3
D3
E 3
F 3
G3
H3
J3
E X T _R I NG 2
CR I DO
R I NG
M UX OU T
A V DD
MCS
P A D _ V DD 1B
M I S O
D V DD
GP I O 1
A G ND
D A T A 0
D A T A 1
GP I O 0
MC LK
U S B _ DN
US B _ DP
M OS I
P D _ RE G
NRE S E T
DG ND
D A T A 2
E X T _R I NG 1
P V DD
XT A L I N
P G ND
XT A L OU T
F R 1 5 1 5 _ 06
F GN D
F C1 9
4 7P _ 5 0 V _0 4
F C 1 5 1 U_ 1 0 V _ 06
F G RI D 0 / S E NS E
F DA T A 2
F 3 . 3 V
F Q2
2 S B 1 19 8 K R/ T 1 4 6
B
E
C F C1 7
1 8P _ 5 0 V _0 6
F R1 0
1 00 _ 0 6
F R1 1 4 7K _ 0 4
F GN D
Z 3 70 4
F R1 7 *1 M_ 0 4
F C 2 2
0 . 1 U_ 1 6 V _0 4
F GN D
F T C_ V D D
F C1
0 . 02 2 U_ 1 6 V _X 7 R_ 0 4
F R 1
3 3 0 K _0 4
2 2P _5 0V_ 04
10mil
F G ND
F U S B _ P N1
F MI S O / MO DE 3
F P D _ RE G
F C5
1 U_ 10 V _ 0 6
F R1 2 4 7K _ 0 4
F MI S O / MO DE 3
TC S4 B
F U S B _ P N1
F D A T A 1
F C 7
* 47 P _ 5 0 V _0 6
47 P_ 50 V_0 6
F R 1 9 1 . 5 K _ 04
F T C_ V D D
F L 1
HC B 1 60 8 K F - 1 2 1T 2 5
F D A T A 2
F X 1
HS X 5 3 1S _ 1 2 MH z
1 2
3 4
F G ND
F E S D_ RI N G
F C 1 2 3 3 P _ 50 V _ 0 4
1
F T C_ V D D
F R 3
1 0 0 K _0 4
Un st uf f
F GN D
F R 2 1 2 7 . 4 _1 % _ 04
F TC _ V DD
F U S B _ P P 1 _R
F R1 8
1 00 K _ 0 4
F G ND
3 3P _5 0V_ 04
F 3 . 3 V
F MC L K
F C 8
0 . 1 U_ 1 6 V _0 4
T CS 4C
F MO S I
F C1 1
0 . 1U _ 16 V _ 0 4
F DA T A 0
TC S4 C
F D A T A 0
F GN D
T CS 4B
Z 3 70 5
F M CL K
F C6
*1 U_ 6 . 3 V _ 04
F GN D
F A V DD
F E S D _G ND
F US B _ P P 1
F T C_ V D D
F M OS I
Finger Printer
F 3 . 3V
F C 2 2 . 2U _ 6. 3 V _ 0 6
1U _6 .3 V_0 4
F 3 . 3 V
F N RE S E T
Z 3 70 2
F C 1 0
1 U_ 1 0 V _ 06
F GN D
F R8
3 30 K _ 0 6
F MC S
T CS 4C
F X O UT
Z 3 70 3
F GN D
F G ND
F U S B _ P N1 _ R
F P D _ RE G
F E S D_ RI N G
F M CS
Un st uf f
F R7 3 30 K _ 0 4
F C 2 1
1 U_ 1 0 V _ 06
F U2
RC l a m p 05 0 2 B
1
2
3
F D V DD 1
F E S D _G ND
F D 1
*R B 5 51 V - 3 0
A
C
T CS 4B
F G P I O1
F C1 8
1 8P _ 5 0 V _0 6
F U S B _ P N1 _ R
F 3 . 3 V
Sheet 35 of 40
Finger Printer
Board
Schematic Diagrams
Click Board B - 37
B
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Click Board
Sheet 36 of 40
Click Board

CTPBUTTON_L
CGND
CSW 1~2
CTPBTN_R_73
CGND
CTPBTN_L_73
CTPBTN_R_73
C5V
CC1
0.1U_16V_04
CJ_TP1
87151-12071G
1
2
3
4
5
6
7
8
9
10
11
12
1
1
CH2
MTH237D91
2
3
4
5 6
7
8
9
CGND
CTPBTN_L_73
2
4
CGND
CTPBTN_R_72
CGND
CGND
CTP_DATA
For M720T
CJ_T P1 CTPBTN_L_72
CTPBUTTON_R CTPBTN_R_72
For M730T
12
CSW1
TJG-533-S- V- T/R
3
1
4
2
56
CR2 *0_04
1
CGND
CR1 0_04
CSW2
TJG-533-S- V- T/R
3
1
4
2
56
1
CH1
MTH237D91
2
3
4
5 6
7
8
9
1
CGND
1
CH4
MTH237D91
2
3
4
5 6
7
8
9
CGND
6- 20- 94A20- 112
CTP_CLK
CJ _TP2
CTPBUTTON_R
CR4 *0_04
CTPBUTTON_L
CJ_TP2
85201-04051_R
1
2
3
4
CGND
CR3 0_04
RIGHT
KEY
C5V
CGND
CLICK BOARD
LIFT
KEY
4
CTPBUTTON_R
CTP_DATA
CTPBTN_L_72
CGND
CTP_CLK
1
CH3
MTH237D91
2
3
4
5 6
7
8
9
3
CC2
0.1U_16V_04
CTPBUTTON_L
Schematic Diagrams
B - 38 M730T ODD Bridge Board
B
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M730T ODD Bridge Board

BGND
BH4
C236D110
BJ ODD2
*88266- 12
1
2
3
4
5
6
7
8
9
10
11
12
BSATA_RXP1
BSATA_RXP1
BGND
BSATA_TXN1
BSATA_TXP1
BH2
C45D45N
BGND
BSATA_TXN1
B5VS
BGND
M730T ODD BRIDGE BOARD
BSATA_TXP1
1.6A
BH1
C236D110
BSATA_RXN1
BODD_DETECT#
BH3
C45D45N
BGND
BSATA_RXN1
B5VS
BJ_SATA1
*C18535-11305-L
S1
S2
S3
S4
S5
S6
S7
P1
P2
P3
P4
P5
P6
BODD_DETECT#
Sheet 37 of 40
M730T ODD Bridge
Board
Schematic Diagrams
M730T Audio Board B - 39
B
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M730T Audio Board
Sheet 38 of 40
M730T Audio Board

GREEN
AMIC1-L
AH1
C315D110
SP DIF OUT
AHP_PLUG
AMIC1- R
HE ADPHONE
AC4
*680P_50V_X7R_04
AAGND
AMIC_SENSE
AAGND
AC5
*1000P_50V_X7R_04
M730T AUDIO BRIDGE BOARD
AHP_SENSE
AMIC_SENSE
AC6
*680P_50V_X7R_04
AAGND
5
AHP_SENSE
AH2
C315D110
R
L
AJSPDIF1
*C12103-10609- L
2
6
5
3
1
4
AL3 *FCM1005KF-121T03
AL2 *FCM1005KF-121T03
AHP-L
AAGND
AL1 *FCM1005KF-121T03
AHP-L
ASPDIFO
AC2
*680P_50V_X7R_04
AR2
*220_04
AHP_PLUG
R
L
AJMIC1
*C12103-D0609-L
2
6
5
3
1
4
AC1
*0.01U_16V_X7R_04
AC3
*680P_50V_X7R_04
AAGND
ASPDIFO
AHP-R
6
AHP-R
AMIC1- L
3
MIC IN
4
AL4 *FCM1005KF- 102T02
AH3
C45D45N
PINK
R
L
AJHP1
*C12103-60609-L
2
6
5
3
1
4
AMIC1-R
BLACK
AAGND
AJ_AUD2
*87151-12071G
1
2
3
4
5
6
7
8
9
10
11
12
AL5 *FCM1005KF-121T03
1
AAGND
AH4
C45D45N
2
3/ 31 ? ? ? NET? ? ? ? ? , ? ? ? ?
Schematic Diagrams
B - 40 Power Sequence Diagram
B
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Power Sequence Diagram

14
13
C L_ PW RO K
6
3 .3 VM
DD _O N
SL P_ M#
DR AM V R
10
7
M ULT I I/ O BO AR D
CL _P WR OK
9
5VS
6
FO R ME
IC S9 LP R3 63E GL F
Other
1
S C4 72 B
Other
V R
PCI
9
Platform
1. 5V S_ PW RGD
4 a
Processor
SC 41 1
5b
2
1 50 m s
6
5 b
1 5
12
8
DE LAY
P LT _R ST #
1. 5V S
FOR M E
6
3
S C4 86
1 2- 1
3.3 VS
DD _ON
3
MOS FE T
1.0 5V S
CL KE N#
H_P WR GD
Penryn
4 b
6
PW R_ SW #
C lo ck G en era to r
1 .0 5V M
Cantiga
DE LA Y_ PW RGD
D EL AY
Devices
5 b
CLK _P WR GD
3
CL _P WR OK
PM _R SM RS T#
CL _P WRO K
GFX VR NORTH BRIDGE 13
6
PCI _R ST #
V GF X_ CO RE
PW R_ BT N#
G FX _V RE N
LT C3 85 0
I TE 85 12 E
5 V
5 a
DE LA Y_ PW RG D
A PL 59 13
SU SC #
11
M OS FE T
EC
V RM _P WR GD
1 .8 V
1 7
1. 8V _P WR GD
S B_ PW RO K
VC OR E_ ON
1. 05 VM _P WR GD
1 6
0 .9 VS M
3 .3 V
9
SC 45 2
SOUTH BRIDGE
Devices
VC OR E
M720T V0.0 BOOT BLOCK DIAGRAM
V DD 3/ VD D5
75 ms
9
H _C PU RS T#
ICH9-M
? ? ? ? ? ?
SU SB #
VCORE VR
S US B#
1 6
6
C L_ PW RO K
Sheet 39 of 40
Power Sequence
Diagram
Schematic Diagrams
Power Sequence v3.0 B - 41
B
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Power Sequence v3.0

CLK_PWRGD
206.4ms
3.3V
5b
SUSB#
6
ms
2.64ms (950mV)
4b
17
6
12
1.5VS
H_CPURST#
10.44ms
2
3
PWR_SW#
560ms
120.8ms
3.32ms
9.36ms
1.17V
9
3
365.6us
6
2.981ms
PLT_RST#
DELAY_PWRGD
3.932ms
10
690.8us
568.0us
8
VCORE_ON
11
1
16
SUSC#
DD_ON
VRM_PWRGD
9.4ms
0.9VSM
3
13
15
5a
174.4ms
370us
6
5VS
107.6ms
1.8V
V5REF_SUS
14
61.10us
920us
(440mV)
CL_PWROK
515.4us
1.5912ms
RSMRST#
5V
SB_PWROK
6
12ms
6.215ms
76.4ms
12-1
(1.05V)
482.8us
6
4a
9.36ms
V5REF
VCORE
3.3VS
164.7ms
PWR_BTN#
85.6ms
105.6ms
1.05VS
3
M720T V3.0 POWER ON SEQUENCE
H_PWRGD
371.5us
7
Sheet 40 of 40
Power Sequence
v3.0
Schematic Diagrams
B - 42
B
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Clevo m720t m730t m728t m729t PDF

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Preface

is a registered trademark of Microsoft Corporation.

HDD System Warning

3. HDD Bay Cover

1. Component Bay Cover

1. HDD Bay Cover

7. LCD Front Panel

Inverter Power Warning

Re-Inserting the Key-

24. Top Case

31. Bottom Case

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