LG 84lm9600-CA CH - Lc2ec

LC2EC
84LM9600
84LM9600-CA
PN:MFL67450457
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SVC.SHEET .....................................................................
LG
LG
1.5 K / 10
0.15 uF
1000 ohms/volt
0.75volt RMS
AC Volt-meter
1M
5.2M
To Instruments
exposed
METALLIC PARTS
0.15uF
Good Earth Ground

such as WATER PIPE,
CONDUIT etc.
1.5 Kohm/10W
25A
-3-
1 AC AC
a.
b.
c.
2.
DVMFETVOM
3.
4.
10 %
90 %90%-99%
5. / B
6.
AC
7.
8.
ES
ES
ES
LG
1.
2. ES
3. ES
4.
ES
5.
ES
6. ES
ES ES
7. ES
8. ES
ES
1.
500 600
2. 60 40 RMB
3.
4.
0.5 1.25 cm
5.
a. 500 600
b.
c. -
6.
a. 500 600
b.
c.
d.
LG
IC /
IC
IC
5 6
1.
IC
2. -
1. IC
2. IC
3.
/
1.
2. U
3. U
4.
U
/
1.
2.
3.
4.
5.
6.
/
1.
2.
3.
4.
5.
LG
/
1.
2.
3.
IC
IC
IC
1.
2.
3. U
IC IC
4.
IC
1.
1/4
2.
3.
20-
LG
1.
3.
1) LGE TV
2)
- : CE, IEC
- EMC:CE, IEC
LC23J
2.
1) :25 C 5 C(77 F 9 F), CST: 40 C 5 C

2) : 65 % 10 %
3) :
(AC 100-240V~ 50 / 60 Hz)
*
4) BOM P/
NO.
5) 5
4. TV
No
Item
Specification
1.
84inch
2.
16:9
3.
LCD Module
LC840EQD-SEF1(FPR CELL)
4.
5.
LG
Remark
3840*2160
Temp. : -20 ~ 60 deg

Humidity : 10 ~ 90 %
Temp. : 0 ~ 40 deg
Humidity : 0 ~ 85 %
AC 100-240V~, 50 / 60Hz
LG
5.Component Video (Y,CB/PB,CR/PR)
(kHz)
(Hz)
1.
720480
15.73
60.00
SDTV, DVD 480i
2.
720480
15.63
59.94
SDTV, DVD 480i
3.
720480
31.47
59.94
4.
720480
31.50
60.00
480p
480p
5.
720576
15.625
50.00
SDTV, DVD 625 Line
6.
720576
31.25
50.00
HDTV 576p
7.
1280720
45.00
50.00
HDTV 720p
8.
1280720
44.96
59.94
HDTV 720p
9.
1280720
45.00
60.00
HDTV 720p
10.
19201080
31.25
50.00
HDTV 1080i
11.
19201080
33.75
60.00
HDTV 1080i
12.
19201080
33.72
59.94
HDTV 1080i
13.
19201080
56.250
50
HDTV 1080p
14.
19201080
67.5
60
HDTV 1080p
6. RGB
(PC)
No
EGA
DOS
37.879
363
54.348
712
LG
60.31
60.00
60.053
60.015
60
40.000
65.000
80
85.5
5
VESA(SVGA)
VESA(XGA)
VESA
VESA(WXGA)
WUXGA (Reduced Blanking)
FHD only(Support to RGB-PC)
LG
7. HDMI
No
1
2
3
4
5
6
7
8
Resolution
HDMI-PC
640*350
720*400
640*480
800*600
1024*768
1152*864
1280*1024
1360*768
1920*1080
67.5
60
148.5
10
11
12
3840*2160
3840*2160
3840*2160
HDMI-DTV
640*480
720*480
720*576
720*576
1280*720
1280*720
1920*1080
1920*1080
1920*1080
1920*1080
1920*1080
1920*1080
1920*1080
3840*2160
3840*2160
3840*2160
67.5
56.25
54.0
30.00
25.00
24.00
297.00
297.00
297.00
31.469 / 31.5
31.469 / 31.5
31.25
15.625
37.500
44.96 / 45
33.72 / 33.75
28.125
26.97 / 27
59.94/ 60
59.94 / 60
50
50
50
59.94 / 60
59.94 / 60
50.00
23.97 / 24
25
29.976 / 30.00
50
59.94 / 60
30.00
25.00
24.00
25.125
27.00/27.03
27
27
74.25
74.17/74.25
74.17/74.25
74.25
74.17/74.25
1
2
3
4
5
6
7
8
9
10
11
12
13
13
14
15
LG
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
31.468
31.469
31.469
37.879
48.363
54.348
63.981
47.712
70.09
70.08
59.94
60.31
60.00
60.053
60.020
60.015
25.17
28.32
25.17
40.00
65.00
80.00
108.00
85.50
33.716 / 33.75
56.250
67.43 / 67.5
67.5
56.25
54.0
74.25
148.5
148.35/148.50
297.00
297.00
297.00
Proposed
EGA
DOS
VESA(VGA)
VESA(SVGA)
VESA(XGA)
VESA
VESA (SXGA)
VESA (WXGA)
WUXGA(Reduced
Blanking)
UDTV 2160P
UDTV 2160P
UDTV 2160P
1
2,3
17,18
21
19
4
5
20
32
33
34
31
16
DDC
O
O
O
O
O
O
O
O
SDTV 480P
SDTV 480P
SDTV 576P
SDTV 576I
HDTV 720P
HDTV 720P
HDTV 1080I
HDTV 1080I
HDTV 1080P
HDTV 1080P
HDTV 1080P
HDTV 1080P
HDTV 1080P
UDTV 2160P
UDTV 2160P
UDTV 2160P
LG
LGE
Establish: 12. 06. 08
Reform:
LCD Division
LC23J Adjust Specification
LC23J
84LM9600-CA
Adjust Specification
TV Research Lab.
R&D 1 Dept. / HW4 Team.
LG Electronics Inc
LG Electronics
LG(51)
C2-2230
1/ 36
LGE
LCD Division
Reform:
LG(51)
2/ 36
C2-2230
Revision history
No
//
2012/06/08
LC23J Initial
2012/07/25
UD EDID
UD EDID
LG Electronics
DH.Lee
LGE
LCD Division
LG(51)
Reform:
C2-2230
1. Application range
Chassis
Model Name
84LM9600-CA
LC23J
Module
Local
type
dimming
Edge
THX
Remark
1 point W/B adjustment
This spec. sheet applies to LC23J Chassis applied LCD TV all models manufactured
in TV factory
Major production type

SET
( o
CKD
SKD
2. Specification.
2.1
Because this is not a hot chassis, it is not necessary to use an isolation transformer.
However, the use of isolation transformer will help protect test instrument.
2.2
Adjustment must be done in the correct order.
2.3
The adjustment must be performed in the circumstance of 25 5C of temperature

and 6510% of relative humidity if there is no specific designation.
2.4
The input voltage of the receiver must keep 100~220V, 50/60Hz.
2.5
The receiver must be operated for about 5 minutes prior to the adjustment when
module is in the circumstance of over 15C
In case of keeping module is in the circumstance of 0C, it should be placed
in the circumstance of above 15C for 2 hours
In case of keeping module is in the circumstance of below -20C, it should be
placed in the circumstance of above 15C for 3 hours,.
Caution) When still image is displayed for a period of 20 minutes or longer (especially where
W/B scale is strong. Digital pattern 13ch and/or Cross hatch pattern 09ch), there can some
afterimage in the black level area.
LG Electronics
3/ 36
LGE
LCD Division
Reform:
LG(51)
C2-2230
3. Adjustment items
3.1 Main PCB check process
MAC Address Download
Adjust 480i Comp1, 1920*1080 Comp1
Adjust 1920*1080p RGB
EDID/DDC download
Above adjustment items can be also performed in Final Assembly if needed. Both
Board-level and Final assembly adjustment items can be check using In-Star Menu
1.ADJUST CHECK.
3.2 Final assembly adjustment
White Balance adjustment
RS-232C functionality check
PING Test
Factory Option setting per destination
Ship-out mode setting (In-Stop)
3.3 Etc
Ship-out mode
Service Option Default
USB Download(S/W Update, Option, Service only)
ISP Download(Option)
LG Electronics
4/ 36
LGE
LCD Division
Reform:
LG(51)
C2-2230
4. Automatic Adjustment
4.1 ADC Adjustment
Overview
ADC adjustment is needed to find the optimum black level and gain in Analog-to-Digital device
and to compensate RGB deviation.
Equipment & Condition
1) USB to RS-232C Jig
2) MSPG-925 Series Pattern Generator(MSPG-925FA, pattern -65)
- Resolution : 480i Comp1
1080P Comp1
1920*1080P RGB
- Pattern : Horizontal 100% Color Bar Pattern
- Pattern level : 0.70.1 Vp-p
- Image
Adjustment method
Using USB, adjust items listed in 3.1 in the other shown in 4.1.3.3
Adj. protocol
Protocol
Command
Set ACK
Enter adj. mode
aa 00 00
a 00 OK00x
LG Electronics
5/ 36
LGE
LCD Division
Reform:
Source change
Begin adj.
LG(51)
C2-2230
xb 00 04
b 00 OK04x (Adjust 480i, 1080p Comp1 )
xb 00 06
b 00 OK06x (Adjust 1920*1080 RGB)
6/ 36
ad 00 10
Return adj. result
OKx (Case of Success)

NGx (Case of Fail)
Read adj. data
Confirm adj.
(main)
(main)
ad 00 20
000000000000000000000000007c007b006dx
(sub )
(Sub)
ad 00 21
000000070000000000000000007c00830077x
ad 00 99
NG 03 00x (Fail)
NG 03 01x (Fail)
NG 03 02x (Fail)
OK 03 03x (Success)
End adj.
aa 00 90
a 00 OK90x
Ref.) ADC Adj. RS232C Protocol_Ver1.0

Adj. order
aa 00 00
[Enter ADC adj. mode]
xb 00 04
[Change input source to Component1(480i&1080p)]
ad 00 10
[Adjust 480i&1080p Comp1]
xb 00 06
[Change input source to RGB(1024*768)]
ad 00 10
[Adjust 1920*1080 RGB]
aa 00 90
End adj.
Ref) ADC adj. RS232C Protocol_Ver1.0
LG Electronics
LGE
LCD Division

Reform:
LG(51)
C2-2230
4.2 MAC address D/L , CI+ key D/L , Widevine key D/L
Connect: PCBA Jig-> L9Board 4pin -> RS-232C Jig-> RS-232C Port == PC-> RS-232C Port
Communication Prot connection
PCBA
PC(RS-232C)
RS-232C Port
Com 1,2,3,4 and 115200(Baudrate)
Mode check: Online Only
check the test process: DETECT -> MAC -> CI -> Widevine -> ESN
. Play: START
. Result: Ready, Test, OK or NG
. Printer Out (MAC Address Label)
LG Electronics
7/ 36
LGE
LCD Division

Reform:
4.3 LAN Inspection

4.3.1 Equipment & Condition
Each other connection to LAN Port of IP Hub and Jig
4.3.2 LAN inspection solution

LAN Port connection with PCB
Network setting at MENU Mode of TV
setting automatic IP
Setting state confirmation
-
If automatic setting is finished, you confirm IP and MAC Address.
4.3.3 WIDEVINE Key Inspection

. WIDEVINE Key Inspection
- Confirm Key input Data at the IN START MENU Mode
LG Electronics
LG(51)
C2-2230
8/ 36
LGE
LCD Division

Reform:
4.4 LAN PORT INSPECTION(PING TEST)
4.4.1. Equipment setting

1) Play the LAN Port Test PROGRAM.
2) Input IP set up for an inspection to Test
Program.
*IP Number : 12.12.2.2
4.4.2. LAN PORT inspection
(PING TEST)
1) Play the LAN Port Test Program.

2) connect each other LAN Port Jack.
3) Play Test (F9) button and confirm OK Message.
4) remove LAN CABLE
LG Electronics
LG(51)
C2-2230
9/ 36
LGE
LCD Division
Reform:
LG(51)
C2-2230
4.5 V-COM Adjust

( ONLY FOR GP2 2010year model. GP3 LW Series[2011year] spec out!)
4.6 Model name & Serial number Download
4.6.1 Model name & Serial number D/L
Press Power on key of service remocon.(Baud rate : 115200 bps)
Connect RS-232C Signal to USB Cable to USB.
Write Serial number by use USB port.
Must check the serial number at Instart menu.
4.6.2
Method & notice

A.
B.
C.
Serial number D/L is using of scan equipment.

Setting of scan equipment operated by Manufacturing Technology Group.
Serial number D/L must be conformed when it is produced in production line,
because serial number D/L is mandatory by D-book 4.0
Manual Download (Model Name and Serial Number)
If the TV set is downloaded By OTA or Service man, Sometimes model name or serial number
is initialized.( Not always)
LG Electronics
10/ 36
LGE
LCD Division

Reform:
LG(51)
C2-2230
There is impossible to download by bar code scan, so It need Manual download.

a. Press the instart key of ADJ remote controller.
b. Go to the menu 7.Model Number D/L like below photo.
c. Input the Factory model name(ex 55LM9600-CA) or Serial number like photo.
d. Check the model name Instart menu Factory name displayed (ex 55LM9600-CA)
e. Check the Diagnostics (DTV country only) Buyer model displayed (ex 55LM9600-CA)
4.7 WIFI MAC ADDRESS CHECK

a. Using RS232 Command
Command
[A][l][][Set ID][][20][Cr]
Transmission
b. check the menu on in-start
LG Electronics
Set ACK
[O][K][x] or
[N][G]
11/ 36
LGE
LCD Division

Reform:
LG(51)
C2-2230
5. Manual Adjustment
5.1. ADC adjustment is not needed because of OTP(Auto ADC adjustment)
5.2. EDID (The Extended Display Identification Data)
/ DDC (Display Data Channel) download
5.2.1 Overview
It is a VESA regulation. A PC or a MNT will display an optimal resolution through information
sharing without any necessity of user input. It is a realization of Plug and Play.
5.2.2 Equipment
Since embedded EDID data is used, EDID download JIG, HDMI cable and D-sub cable are not
LG Electronics
12/ 36
LGE
LCD Division
LG(51)
Reform:
13/ 36
C2-2230
need.
Adjust remocon
5.2.3 Download method
1) Press Adj. key on the Adj. R/C, then select 12.EDID D/L.
By pressing Enter key, enter EDID D/L menu.
2) Select [Start] button by pressing Enter key, HDMI1 / HDMI2 / HDMI3 / HDMI4 / RGB are
Writing and display OK or NG.
For Analog EDID
For HDMI EDID
D-sub to D-sub
DVI-D to HDMI or HDMI to HDMI
5.2.4 EDID DATA

HDMI
0x00
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
00
FF
FF
FF
FF
FF
FF
00
1E
6D
01
03
80
A0
5A
78
0A
EE
91
A3
54
0x01
0x0D
0x0
0x0
4C
99
26
0x02
0F
50
54
A1
08
00
71
40
81
C0
81
00
81
80
95
00
0x03
90
40
A9
C0
B3
00
02
3A
80
18
71
38
2D
40
58
2C
0x04
45
00
A0
5A
00
00
00
1E
66
21
50
B0
51
00
1B
30
0x05
40
70
36
00
A0
5A
00
00
00
1E
00
00
00
FD
00
39
0x06
3F
1F
52
10
00
0A
20
20
20
20
20
20
01
20
21
0x07
0x00
02
03
37
F1
4E
90
1F
04
13
05
0x01
22
15
01
26
15
07
50
09
57
07
LG Electronics
14
03
02
12
LGE
LCD Division
LG(51)
Reform:
0x02
14/ 36
C2-2230
0x03
E3
05
03
01
02
3A
80
18
71
1C
38
2D
40
0x04
2C
45
00
A0
5A
00
00
00
1E
01
1D
80
18
71
1C
16
0x05
20
58
2C
25
00
A0
5A
00
00
00
9E
01
1D
00
72
51
0x06
D0
1E
20
6E
28
55
00
A0
5A
00
00
00
1E
00
00
00
0x07
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
0x0D
0x0
0x0
RGB
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
00
FF
FF
FF
FF
FF
FF
00
1E
6D
01
03
68
10
09
78
0A
EE
91
A3
54
4C
99
26
0
0x0
1
0x0
0F
50
54
A1
08
00
71
40
81
C0
81
00
81
80
95
00
90
40
A9
C0
B3
00
02
3A
80
18
71
38
2D
40
58
2C
45
00
A0
5A
00
00
00
1E
66
21
50
B0
51
00
1B
30
40
70
36
00
A0
5A
00
00
00
1E
00
00
00
FD
00
3A
3E
1E
53
10
00
0A
20
20
20
20
20
20
00
2
0x0
3
0x0
4
0x0
5
0x0
6
0x0
7
Reference
- HDMI1 ~ HDMI4 / RGB
- In the data of EDID, bellows may be different by S/W or Input mode.
Product ID
Serial No:
Controlled on production line.
LG Electronics
LGE
LCD Division

Reform:
LG(51)
C2-2230
Month, Year: Controlled on production line: ex) Monthly : 01 01

Year
: 2012
16
Model Name(Hex): LGTV

Checksum(LG TV): Changeable by total EDID data.
Vendor Specific(HDMI)
# HDMI 1(C/S : 43 96)

EDID Block 0, Bytes 0-127 [00H-7FH]
0
10
20
30
40
50
60
70
0 1 2
3 4
5 6 7 8 9 A B
C D E F
________________________________________________________________
| 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
| 01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
| 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
| 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
| 45 00 A0 5A 00 00 00 1E 66 21 50 B0 51 00 1B 30
| 40 70 36 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A
| 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
| 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 43
______________________________________________________________________
EDID Block 1, Bytes 128-255 [80H-FFH]
0
10
20
30
40
50
60
70
0 1
2 3
4 5 6 7 8 9 A B
C D E F
________________________________________________________________
| 02 03 3A F1 4E 10 9F 04 13 05 14 03 02 12 20 21
| 22 15 01 26 15 07 50 09 57 07 7B 03 0C 00 10 00
| B8 3C 20 C0 6E 01 02 03 01 4F 3F FC 08 10 18 10
| 06 10 16 10 28 10 E3 05 03 01 02 3A 80 18 71 38
| 2D 40 58 2C 45 00 A0 5A 00 00 00 1E 01 1D 80 18
| 71 1C 16 20 58 2C 25 00 A0 5A 00 00 00 9E 01 1D
| 00 72 51 D0 1E 20 6E 28 55 00 A0 5A 00 00 00 1E
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 96
______________________________________________________________________
# HDMI 2(C/S : 43 86 )
0
10
20
30
40
50
60
70
0 1 2 3 4 5 6 7 8 9 A B
C D E F
________________________________________________________________
| 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
| 01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
| 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
| 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
| 45 00 A0 5A 00 00 00 1E 66 21 50 B0 51 00 1B 30
| 40 70 36 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A
| 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
| 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 43
LG Electronics
15/ 36
LGE
LCD Division

Reform:
LG(51)
C2-2230
______________________________________________________________________
0
10
20
30
40
50
60
70
0 1 2 3 4 5 6 7 8 9 A B
C D E F
________________________________________________________________
| 02 03 3A F1 4E 10 9F 04 13 05 14 03 02 12 20 21
| 22 15 01 26 15 07 50 09 57 07 7B 03 0C 00 20 00
| B8 3C 20 C0 6E 01 02 03 01 4F 3F FC 08 10 18 10
| 06 10 16 10 28 10 E3 05 03 01 02 3A 80 18 71 38
| 2D 40 58 2C 45 00 A0 5A 00 00 00 1E 01 1D 80 18
| 71 1C 16 20 58 2C 25 00 A0 5A 00 00 00 9E 01 1D
| 00 72 51 D0 1E 20 6E 28 55 00 A0 5A 00 00 00 1E
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 86
______________________________________________________________________
# HDMI 3(C/S : 43 76)
0
10
20
30
40
50
60
70
0 1 2 3 4 5 6 7 8 9 A B
C D E F
________________________________________________________________
| 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
| 01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
| 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
| 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
| 45 00 A0 5A 00 00 00 1E 66 21 50 B0 51 00 1B 30
| 40 70 36 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A
| 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
| 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 43
______________________________________________________________________
0
10
20
30
40
50
60
70
0 1 2 3 4 5 6 7 8 9 A B
C D E F
________________________________________________________________
| 02 03 3A F1 4E 10 9F 04 13 05 14 03 02 12 20 21
| 22 15 01 26 15 07 50 09 57 07 7B 03 0C 00 30 00
| B8 3C 20 C0 6E 01 02 03 01 4F 3F FC 08 10 18 10
| 06 10 16 10 28 10 E3 05 03 01 02 3A 80 18 71 38
| 2D 40 58 2C 45 00 A0 5A 00 00 00 1E 01 1D 80 18
| 71 1C 16 20 58 2C 25 00 A0 5A 00 00 00 9E 01 1D
| 00 72 51 D0 1E 20 6E 28 55 00 A0 5A 00 00 00 1E
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 76
______________________________________________________________________
# HDMI 4(C/S : 43 66)
0 1
2 3 4 5 6 7 8 9 A B
C D E F
________________________________________________________________
LG Electronics
16/ 36
LGE
LCD Division
Reform:
0
10
20
30
40
50
60
70
| 00
| 01
| 0F
| 01
| 45
| 40
| 3E
| 00
FF
16
50
01
00
70
1E
4C
FF
01
54
01
A0
36
53
47
FF
03
A1
01
5A
00
10
20
FF
80
08
01
00
A0
00
54
FF
A0
00
01
00
5A
0A
56
FF 00
5A 78
31 40
02 3A
00 1E
00 00
20 20
0A 20
LG(51)
C2-2230
17/ 36
1E 6D 01 00 01 01 01 01
0A EE 91 A3 54 4C 99 26
45 40 61 40 71 40 81 80
80 18 71 38 2D 40 58 2C
66 21 50 B0 51 00 1B 30
00 1E 00 00 00 FD 00 3A
20 20 20 20 00 00 00 FC
20 20 20 20 20 20 01 43
______________________________________________________________________
0
10
20
30
40
50
60
70
0 1 2
3 4 5 6 7 8 9 A B
C D E F
________________________________________________________________
| 02 03 3A F1 4E 10 9F 04 13 05 14 03 02 12 20 21
| 22 15 01 26 15 07 50 09 57 07 7B 03 0C 00 40 00
| B8 3C 20 C0 6E 01 02 03 01 4F 3F FC 08 10 18 10
| 06 10 16 10 28 10 E3 05 03 01 02 3A 80 18 71 38
| 2D 40 58 2C 45 00 A0 5A 00 00 00 1E 01 1D 80 18
| 71 1C 16 20 58 2C 25 00 A0 5A 00 00 00 9E 01 1D
| 00 72 51 D0 1E 20 6E 28 55 00 A0 5A 00 00 00 1E
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 66
______________________________________________________________________
# RGB(C/S : 5C)
0
10
20
30
40
50
60
70
0 1 2
3 4 5
6 7 8 9 A B
C D E F
________________________________________________________________
| 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
| 01 16 01 03 68 A0 5A 78 0A EE 91 A3 54 4C 99 26
| 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
| 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
| 45 00 A0 5A 00 00 00 1E 66 21 50 B0 51 00 1B 30
| 40 70 36 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A
| 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
| 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 00 5C
______________________________________________________________________
5.3 White Balance Adjustment

5.3.1 Overview
W/B adj. Objective & How-it-works
- Objective: To reduce each Panels W/B deviation
- How-it-works: When R/G/B gain in the OSD is at 192, it means the panel is at its Full
Dynamic Range. In order to prevent saturation of Full Dynamic range and data,
one of R/G/B is fixed at 192, and the other two is lowered to find the desired
LG Electronics
LGE
LCD Division
LG(51)
Reform:
C2-2230
value.
-Adj. condition : normal temperature
1) Surrounding Temperature: 255
2) Warm-up time: About 5 Min
3) Surrounding Humidity: 20% ~ 80%
5.3.2 Equipment
1) Color Analyzer: CA-210 (LED Module : CH 14)
2) Adj. Computer(During auto adj., RS-232C protocol is needed)
3) Adjust Remocon
4) Video Signal Generator MSPG-925F 720p/216-Gray(Model:217, Pattern:78)
Only when internal pattern is not available
Color Analyzer Matrix should be calibrated using CS-100
5.3.3 Equipment connection MAP
Color Analyzer
RS-
Probe
Computer232C
USB to RS-232C
RS-
232C
Pattern Generator
Signal Source
If TV internal pattern is used, not

5.3.4 Adj. Command (Protocol)
<Command Format>
START
6E
A 50
A LEN A 03
A CMD A 00
A VAL A CS A STOP
- LEN: Number of Data Byte to be sent

- CMD: Command
- VAL: FOS Data value
- CS: Checksum of sent data
- A: Acknowledge
LG Electronics
18/ 36
LGE
LCD Division
LG(51)
Reform:
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Ex) [Send: JA_00_DD] / [Ack: A_00_okDDX]

RS-232C Command used during auto-adj.
RS-232C COMMAND
[CMD
ID
Explanation
DATA]
wb
00
00
Begin White Balance adj.
wb
00
10
Gain adj.(internal white pattern)
wb
00
1f
Gain adj. completed
wb
00
20
Offset adj.(internal white pattern)
wb
00
2f
Offset adj. completed
wb
00
ff
End White Balance adj.

(internal pattern disappears )
Ex) wb 00 00
->
wb 00 10
ja 00 ff
Begin white balance auto-adj.
->
->
Gain adj.
Adj. data
jb 00 c0
...
...
wb 00 1f
-> Gain adj. complete
*(wb 00 20(start), wb 00 2f(endc)) -> Off-set adj.

wb 00 ff
->End white balance auto adj.
Adj. Map
Applied Model : LD23E Chassis ALL MODELS
Adj. item
Cool
Command
Data Range
Default
(lower caseASCII)
(Hex.)
(Decimal)
CMD1
CMD2
MIN
MAX
R Gain
00
C0
TBD
G Gain
00
C0
TBD
B Gain
00
C0
TBD
R Cut
TBD
G Cut
TBD
LG Electronics
Details
LGE
LCD Division
LG(51)
Reform:
B Cut
Medium
Warm
C2-2230
TBD
R Gain
00
C0
TBD
G Gain
00
C0
TBD
B Gain
00
C0
TBD
R Cut
TBD
G Cut
TBD
B Cut
TBD
R Gain
00
C0
TBD
G Gain
00
C0
TBD
B Gain
00
C0
TBD
R Cut
TBD
G Cut
TBD
5.3.5 Adj. method

5.3.5.1 Auto adj. method
1) Set TV in adj. mode using POWER ON key
2) Zero calibrate probe then place it on the center of the Display
3) Connect Cable (RS-232C to USB)
4) Select mode in adj. Program and begin adj.
5) When adj. is complete (OK Sing), check adj. status pre mode
(Warm, Medium, Cool)
6) Remove probe and RS-232C to USB cable to complete adj.
W/B Adj. must begin as start command wb 00 00 , and finish as end command wb 00 ff,
and Adj. offset if need
5.3.5.2 Manual adj. method
1) Set TV in Adj. mode using POWER ON
2) Zero Calibrate the probe of Color Analyzer, then place it on the center of LCD module within
10cm of the surface..
3) Press ADJ key EZ adjust using adj. R/C 7. White-Balance then press the cursor to the
right (KEY).
LG Electronics
20/ 36
LGE
LCD Division
Reform:
LG(51)
C2-2230
(When KEY() is pressed 216 Gray internal pattern will be displayed)

4) Adjust modes (Cool) Fix the G gain to 172 (default data) and change the others (R/B Gain).
5) Adjust two modes (Medium / Warm) Fix the one of R/G/B gain to 192 (default data) and
decrease the others.
CASE Cool
First adjust the coordinate far away from the target value(x, y).B
1.
x, y target
2.
x, y target
3.
x target ,
4.
x target ,
y target
y target
Every 4 case have to fit y value by adjusting B Gain and then fit x value by adjusting R-Gain.
In this case, increasing/decreasing of B Gain and R Gain can be adjusted.
How to adjust
1. Fix G gain to 172 and then adjust R Gain and B Gain(In Case of Mostly Blue
Gain Saturation )
2. When B Gain > 255, Release Fixed G Gain and Readjust
CASE Medium / Warm
First adjust the coordinate far away from the target value(x, y).
1.
x, y target
) Decrease the R, G.
2.
x, y target
) First decrease the B gain,
) Decrease the one of the others.

3.
x target ,
y target
) First decrease B, so make y a little more than the target.

) Adjust x value by decreasing the R
4.
x target ,
y target
) First decrease B, so make x a little more than the target.

) Adjust x value by decreasing the G
6) Adj. is completed, Exit adjust mode using EXIT key on Remote controller.
LG Electronics
21/ 36
LGE
LCD Division
LG(51)
Reform:
C2-2230
If internal pattern is not available, use RF input. In EZ Adj. menu 7.White Balance, you can
select one of 2 Test-pattern: ON, OFF. Default is inner(ON). By selecting OFF, you can
adjust using RF signal in 216 Gray pattern.
Adj. condition and cautionary items
1) Lighting condition in surrounding area
Surrounding lighting should be lower 10 lux. Try to isolate adj. area into dark surrounding.
2) Probe location
- PDP: Color Analyzer (CA-100, CA-100+, CA210) probe should be firmly attached to the
Module
- LCD: Color Analyzer (CA-210) probe should be within 10cm and perpendicular of the
module surface (80~ 100)
3) Aging time
- After Aging Start, Keep the Power ON status during 5 Minutes.
- In case of LCD, Back-light on should be checked using no signal or Full-white pattern.
5.3.6 Reference (White Balance Adj. coordinate and color temperature)
Luminance: 216 Gray
Standard color coordinate and temperature using CS-1000 (over 26 inch)
Coordinate
Mode
Temp
uv
Cool
Medium
Warm
0.269
0.285
0.313
0.273
0.293
0.329
13000K
9300K
6500K
0.0000
0.0000
0.0000
Standard color coordinate and temperature using CA-210(CH 14)

Coordinate
Mode
Temp
uv
x
y
Cool
0.2690.002 0.2730.002 13000K
0.0000
Medium
0.2850.002
0.2930.002
9300K
0.0000
Warm
0.3130.002
0.3290.002
6500K
0.0000
Standard color coordinate and temperature using CA-210(CH-14) by aging time (TBD)
84LM9600-CA
Aging time
GP4
(Min)
20
21-25
Cool
X
Medium
y
Warm
Y
269
273
285
293
313
329
282
298
298
318
319
344
280
296
296
316
317
342
LG Electronics
22/ 36
LGE
LCD Division
Reform:
3
4
5
6
7
8
9
LG(51)
26-30
31-35
36-40
41-50
51-80
81-119
Over 120
23/ 36
C2-2230
279
294
295
314
316
340
277
292
293
312
314
338
276
290
292
310
313
336
275
288
291
308
312
334
272
284
288
304
309
330
271
282
287
302
308
328
270
281
286
301
307
327
5.3.8 ALELF&EDGE LED White balance table

Edge LED module change color coordinate because of aging time
apply under the color coordinate table, for compensated aging time
ALEF (LM960X)
Aging time
GP4
(Min)
Cool
Medium
Warm
269
273
285
293
313
329
0-2
282
294
298
314
322
343
3-5
281
292
297
312
321
341
6-9
280
291
296
311
320
340
10-19
279
289
295
309
319
338
20-35
277
284
293
304
317
333
36-49
274
279
290
299
314
328
50-79
271
277
287
297
311
326
80-149
270
274
286
294
310
323
Over 150
269
273
285
293
309
322
5.4 EYE-Q function check

Step 1) Turn on TV
Step 2) Press EYE key of Adj. R/C
Step 3) Cover the Eye Q II sensor on the front of the using your hand and wait for 6 seconds
Step 4) Confirm that R/G/B value is lower than 10 of the Raw Data (Sensor data, Back light ) .
LG Electronics
If after
LGE
LCD Division

Reform:
LG(51)
C2-2230
6 seconds, R/G/B value is not lower than 10, replace Eye Q II sensor
Step 5) Remove your hand from the Eye Q II sensor and wait for 6 seconds
Step 6) Confirm that ok pop up.
If change is not seen, replace Eye Q II sensor
5.5 Local Dimming Function Check

Step 1) Turn on TV
Step 2) At the Local Dimming mode, module Edge Backlight moving right to left
Back light of IOP module moving
Step 3) confirm the Local Dimming mode
Step 4) Press exit Key
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24/ 36
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LCD Division

Reform:
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C2-2230
25/ 36
5.6 Magic Motion Remocon test

-equipment : RF Remocon for test, IR-KEY-Code Remocon for test
-You must confirm the battery power of RF-Remocon before test
(recommend that change the battery per every lot)
-Sequence (test)
a)if you select the start key(wheel) on the controller, you can pairing with the TV SET.
b)You can check the cursor on the TV Screen, when select the Wheel Key on the controller
c) You must remove the pairing with the TV Set by select Back + Home Key on the controller
5.7 3D function test

(Pattern Generator MSHG-600, MSPG-6100 [SUPPORT HDMI1.4])
* HDMI mode NO. 872 , pattern No.83
1) Please input 3D test pattern like below (HDMI mode NO. 872 , pattern No.83)
LG Electronics
LGE
LCD Division

Reform:
2.When 3D OSD appear automatically , then select green button.
3. Dont wear a 3D Glasses, Check the picture like below .
5.8 3D Depth function TEST
LG Electronics
LG(51)
C2-2230
26/ 36
LGE
LCD Division

Reform:
5.9
Wi-Fi Test
Step 1) Turn on TV
Step 2) Select Network Connection option in Network Menu.
Step 3) Select Start Connection Button in Network Connection.
Step 4) If the system finds any AP like blow PIC, it is working well.
LG Electronics
LG(51)
C2-2230
27/ 36
LGE
LCD Division
Reform:
LG(51)
C2-2230
5.10 LNB voltage and 22KHz tone check (only for DVB-S/S2 model)
Test method
1. Set TV in Adj. mode using POWER ON.
2. Connect cable between satellite ANT and test JIG.
4. Press Yellow Key (ETC+SWAP) in Adj Remocon to make LNB on.
5. check LED light ON at 18V menu.
6. check LED light ON at 22KHz tone menu.
7. Press Blue Key (ETC+PIP INPUT) in Adj Remocon to make LNB off.
8. check LED light OFF at 18V menu.
9. check LED light OFF at 22KHz tone menu.
Test result
1. After press LNB On key, 18V LED and 22KHz tone LED should be ON.
2. After press LNB OFF key, 18V LED and 22KHz tone LED should be OFF.
5.11 Inspection of light scattering
Test Method
1. Push Power only Key.
LG Electronics
28/ 36
LGE
LCD Division
Reform:
LG(51)
C2-2230
2. Push HDMI hot Key.

3. Inspect whether light scattering is occurred in internal black pattern or not.
4. Push Power only Key.
5.12 Option selection per country

5.12.1 Overview
Option selection is only done for models in Non-EU
5.12.2 Method
1) Press ADJ key on the Adj. R/C, then select Country Group Meun
2) Depending on destination, select Country Group Code 04 or Country Group EU then on
the lower Country option, select US, CA, MX. Selection is done using +, - or KEY
6.0 Tool Option selection

Method: Press Adj. key on the Adj. R/C, then select Tool option.
6.1 Ship-out mode check (In-stop)
After final inspection, press In-Stop key of the Adj. R/C and check that the unit goes to Standby mode.
6.2 GND and Internal Pressure check
6.2.1 Method
1) GND & Internal Pressure auto-check preparation
- Check that Power Cord is fully inserted to the SET.
(If loose, re-insert)
2) Perform GND & Internal Pressure auto-check
- Unit fully inserted Power cord, Antenna cable and A/V arrive to the auto-check process.
- Connect D-terminal to AV JACK TESTER
- Auto CONTROLLER(GWS103-4) ON
- Perform GND TEST
- If NG, Buzzer will sound to inform the operator.
- If OK, changeover to I/P check automatically.
(Remove CORD, A/V form AV JACK BOX)
LG Electronics
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LCD Division
LG(51)
Reform:
C2-2230
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- Perform I/P test

- If NG, Buzzer will sound to inform the operator.
- If OK, Good lamp will lit up and the stopper will allow the pallet to move on to next process.
6.2.2 Checkpoint
TEST voltage
- GND: 1.5KV/min at 100mA
- SIGNAL: 3KV/min at 100mA
TEST time: 1 second
TEST POINT
- GND TEST = POWER CORD GND & SIGNAL CABLE METAL GND
- Internal Pressure TEST = POWER CORD GND & LIVE & NEUTRAL
LEAKAGE CURRENT: At 0.5mArms
7. Audio
No
1.
Item
Mi
n
Typ
Max
Unit
Audio practical max

Output, L/R
(Distortion=10% max
Output)
9.0
10.0
12.0
8.5
8.9
9.8
Vrms
2.
Speaker (8
Impedance)
10.0
15.0
Remark
Measurement
condition
(TBD)
84LM9600-CA
Measurement
condition
(TBD)
84LM9600-CA
Measurement condition:
1. RF input: Mono, 1KHz sine wave signal, 100% Modulation
2. CVBS, Component: 1KHz sine wave signal 0.5Vrms
3. RGB PC: 1KHz sine wave signal 0.7Vrms
8. Etc
Power Status
Main B/D Shipping Condition
LG Electronics
AC Swithch condtion
LGE
LCD Division
LG(51)
Reform:
Chassis Module Assembly
ON
N/A
Front Module Assembly
N/A
OFF
Factory incoming
ON
OFF
Final Assembly
ON
ON
Ship-Out
OFF
ON
C2-2230
8. 1 SET Factoring Condition

No.
Item
Condition
1.
Power
Off
3.
Volume Level
10
4.
Main Picture Input
DTV
5.
Main Last Channel
N.A.
6.
Mute
ARC
Off
7.
Remark
DTV&ATV
16:10(DTV)
Auto Tuning
8.
SETUP
(DTV&ATV)
Manual Tuning
DTV/TV
Programme edit
TV/DTV/Radio
Booster
On
CI information
Module
Cable DTV Setting

10.
PICTURE
Aspect Ratio
16:10
Picture Wizard
Energy Saving
Off
Picture Mode
Vivid
Backlight
100
Contrast
95
Brightness
50
Sharpness
30
Colour
70
Tint
Colour Temp
LG Electronics
31/ 36
LGE
LCD Division

Reform:
LG(51)
C2-2230
32/ 36
Dynamic Contrast
High
Dynamic Colour
High
Clear White
High
Preferred
Colour
Super
On
Resolution
Gamma
Mediu
m
Colour Gamut
Wide
Noise Reduction
Mediu
m
MPEG NOISE
Mediu
Reduction
Black Level
Auto
Real Cinema
On
Eye Care
Low
LED Local
High
Dimming
TruMotion
Smoot
h
Picture Reset
TruMotion
Resolution
Auto Config
Position
Screen
Size
Phase
Reset
10.
AUDIO
Volume Mode
Auto Volume
Volume Control
Sound Optimizer
Normal
Vitural Surround
Off
Clear Voice II
Off
LG Electronics
Low
LGE
LCD Division
LG(51)
Reform:
Av Sync.
C2-2230
Off
Stanard
Music
Cinema
Sound Mode
Standard
Sport
Game
Vivid
User setting
DTV Sound Setting
Auto
ARC Mode
Sound Setting
Balance
TV Speaker
Digital Sound out
Clock
11.
Time
-- : --
Off time
Off
On time
Off
Sleep Timer
Off
User control
Language
Beijing
City/Area
12.
OPTION
Hard of hearing
Off
Standby Light
On
Pointer
UK
Balloon Help
On
Factory Reset
Off
Dual Play
Home Use
Mode setting
Home Use
Smart TV Setting
Set Password
13.
LOCK
Lock System
New
****
Confirm
****
Off
Block Programme
Input Block
LG Electronics
In case of Beijing
33/ 36
LGE
LCD Division

Reform:
LG(51)
C2-2230
8.2 USB S/W Download (option, Service only)

1.
Put the USB Stick to the USB socket
2.
Automatically detecting update file in USB Stick

- If your downloaded program version in USB Stick is Lower, it didnt work.
But your downloaded version is Higher, USB data is automatically detecting
(Download Version High & Power only mode, Set is automatically Download)
3.
Show the message Copying files from memory
4.
Updating is staring.
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34/ 36
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LCD Division
Reform:
LG(51)
C2-2230
5.
Updating Completed, The TV will restart automatically
6.
If your TV is turned on, check your updated version and Tool option. (explain the
Tool option, next stage)

* If downloading version is more high than your TV have, TV can lost all channel data. In
this case, you have to channel recover. if all channel data is cleared, you didnt
have a DTV/ATV test on production line.
* After downloading, have to adjust TOOL OPTION again.
1. Push "IN-START" key in service remote controller.
2. Select "Tool Option 1" and Push OK button.
3. Punch in the number. (Each model has their number.)
8.3 Tool Option selection

Method: Press Adj. key on the Adj. R/C, then select Tool option.
LM9600
tool option 1
84 inch
33005
tool option 2
46421
tool option 3
21325
tool option 4
tool option 5
tool option 6
Tool option 7
20943
24079
1321
63147
LG Electronics
35/ 36
PA138A_MA0~12
IC1100
DDR2
IC301
SPI
Flash
SPI_DO
SPI_DI
/SPI_CS
SPI_CLK
IC1101
DDR2
PA138A_MA0~12
PA138A_MDQ16~31
SPLT_TXA0/1/2/3/4N,CLKN
SPLT_TXA0/1/2/3/4P,CLKP
RXA0/1/2/3/4N,CLKN
P300
PA138A_MDQ0~15
RXA0/1/2/3/4P,CLKP
LG1122_TXA0/1/2/3/4N,CLKN
SPLT_TXB0/1/2/3/4N,CLKN
RXB0/1/2/3/4N,CLKN
LG1122_TXA0/1/2/3/4P,CLKP
SPLT_TXB0/1/2/3/4P,CLKP
RXB0/1/2/3/4P,CLKP
LG1122_TXB0/1/2/3/4N,CLKN
L/DIM0_SCLK/MOSI/VS
LG1122_TXB0/1/2/3/4P,CLKP
LG1122_RST/FLASH_WP
PWM_BPL
IC300
IC300
FRC3
FRC3
LG1122_TXC0/1/2/3/4N,CLKN SPLT I/O

SPLT I/O
LG1122_TXC0/1/2/3/4P,CLKP
LG1122_TXD0/1/2/3/4P,CLKP
SPLT_DCLK
IC500 LG1122_DDR1_DATA0~15
DDR
BA/DQS/CLK/DM
PA138A
PA138A
IC600
IC600
LG1122_TXD0/1/2/3/4N,CLKN
LG1122_DDR1_A0~12
IC900
IC900
IC701
SPLT
Flash
SPLT_TXC0/1/2/3/4N,CLKN
SPLT_TXC0/1/2/3/4P,CLKP
SPLT_ASDO
SPLT_TXD0/1/2/3/4N,CLKN
SPLT_CSO
SPLT_TXD0/1/2/3/4P,CLKP
SPLT_DATAO
PA138B
PA138B
PA138B_MA0~12
IC1400
DDR2
IC1401
DDR2
IC1000
IC1000
PA138B_MDQ0~15
PA138B_MA0~12
PA138B_MDQ16~31
PA138A_TX0N/P
PA138A_TX1N/P
PA138A_TX2N/P
IC900
IC900 PA138A_TX3N/P
PA138A
PA138A PA138A_TX4N/P
PA138A_TX5N/P
PA138A_TX6N/P
PA138A_TX7N/P
PA138B_TX0N/P
PA138B_TX1N/P
PA138B_TX2N/P
IC1000
IC1000 PA138B_TX3N/P
PA138B
PA138B PA138B_TX4N/P
PA138B_TX5N/P
PA138B_TX6N/P
PA138B_TX7N/P
IC1503
THCV
216
T216A_TXA0/1/2/3/4N(\P
IC1502
THCV
216
T216A_TXC0/1/2/3/4N(\P
IC1501
THCV
216
T216A_TXE0/1/2/3/4N(\P
IC1500
THCV
216
T216A_TXG0/1/2/3/4N(\P
T216A_TXB0/1/2/3/4N(\P
T216A_TXD0/1/2/3/4N(\P
T216A_TXF0/1/2/3/4N(\P
T216A_TXH0/1/2/3/4N(\P
IC1603
THCV
216
T216B_TXA0/1/2/3/4N(\P
IC1602
THCV
216
T216B_TXC0/1/2/3/4N(\P
IC1601
THCV
216
IC1600
THCV
216
P2300
FMTA_TXA0/1/2/3/4/CLKN(\P) IC2100 TX0N/P
FMTA_TXB0/1/2/3/4/CLKN(\P) THCV TX1N/P
T216B_TXB0/1/2/3/4N(\P
215
IC1700
IC1700
FMTA
FMTA
I/O
I/O
FMTA_TXC0/1/2/3/4/CLKN(\P) IC2101 TX2N/P

FMTA_TXD0/1/2/3/4/CLKN(\P) THCV TX3N/P
215
FMTA_TXE0/1/2/3/4/CLKN(\P) IC2102 TX4N/P

FMTA_TXF0/1/2/3/4/CLKN(\P) THCV TX5N/P
215
FMTA_TXG0/1/2/3/4/CLKN(\P) IC2103 TX6N/P

FMTA_TXH0/1/2/3/4/CLKN(\P) THCV TX7N/P
215
P2301
FMTB_TXA0/1/2/3/4/CLKN(\P) IC2200 TX8N/P
FMTB_TXB0/1/2/3/4/CLKN(\P) THCV TX9N/P
215
FMTB_TXC0/1/2/3/4/CLKN(\P) IC2201 TX10N/P

IC1900
IC1900
T216B_TXD0/1/2/3/4N(\P
FMTB_TXD0/1/2/3/4/CLKN(\P) THCV TX11N/P
215
FMTB
FMTB
FMTB_TXE0/1/2/3/4/CLKN(\P) IC2202 TX12N/P
T216B_TXE0/1/2/3/4N(\P I/O
I/O
T216B_TXF0/1/2/3/4N(\P
FMTB_TXF0/1/2/3/4/CLKN(\P) THCV TX13N/P
215
T216B_TXG0/1/2/3/4N(\P
T216B_TXH0/1/2/3/4N(\P
FMTB_TXG0/1/2/3/4/CLKN(\P) IC2203 TX14N/P

FMTB_TXH0/1/2/3/4/CLKN(\P) THCV TX15N/P
215
LV1
200
300
830
400
541
820
540
531
532
700
710
530
570
310
580
510
500
121
122
810
120
560
A2
A22
A9
A10
Stand Base Set + Stand

+ Body
AG1
910
900
System Configuration
+3.3V_NORMAL
NVRAM
Clock for LG1152
for DiiVA(China)
VCC
Write Protection
WP
- Low : Normal Operation

- High : Write Protection
I2C_SDA2
HP_DET
I2C_SCL2
EPHY_INT
SMARTCARD_DATA
SEL_USB1
SMARTCARD_RST
I2C_SCL5
AB17
XIN_MAIN
XO_MAIN
P26
N28
R28
R27
R26
P28
N22
M22
L22
T26
T22
R22
P22
K23
V22
U22
K27
K26
K25
K24
L24
L23
K28
N26
N27
M26
L28
J23
L26
L27
L25
J22
K22
T28
U27
U26
U28
M24
M23
N23
T27
P27
EB_DATA3
EB_DATA2
EB_DATA1
E28
EMMC_RST
EMMC_CLK
EMMC_CMD
OPM0
EMMC_DATA7
PORES_N
EMMC_DATA5
EMMC_DATA6
AE3
DiiVA_POD_CTL
EMMC_DATA4
V23
U25
V25
V24
U24
Y22
AA22
AB20
AB21
W22
AB9
AB8
AB15
AB14
Place to LVDS Wafer
TRST_N0
EMMC_DATA3
TMS0
EMMC_DATA2
TCK0
EMMC_DATA1
TDI0
EMMC_DATA0
TDO0
W23
EB_DATA[0-7]
EB_ADDR[0-14]
NAND_CS1
TMS1
NAND_CS0
TCK1
NAND_ALE
TDI1
NAND_CLE
TDO1
NAND_REN
PLLSET1
NAND_WEN
PLLSET0
W6
Y6
GPIO31
GPIO30
GPIO29
EXT_INTR3/GPIO48
GPIO28
EXT_INTR2/GPIO63
GPIO27
EXT_INTR1/GPIO62
GPIO26
EXT_INTR0/GPIO61
GPIO25
UART0_RX/GPIO49
GPIO23
GPIO24
AA5
UART0_TX/GPIO50
GPIO22
UART1_RX
GPIO21
UART1_TX
GPIO20
UART2_RX
GPIO19
UART2_TX
GPIO18
SPI_DI0/GPIO39
GPIO16
GPIO17
AB23
AB24
AA25
R160
OPT
R102
22
R103
22
GPIO15
GPIO14
GPIO13
GPIO12
SPI_DO1/GPIO34
GPIO11
SPI_SCLK1/GPIO33
GPIO10
SPI_CS1/GPIO32
GPIO9
GPIO8
SDA1/GPIO57
MOTOR_CW
D28
C27
C28
MOTOR_CCW
MO_SENS_TO_MAIN_UP
D26
P24
N25
P23
N24
P25
MO_SENS_TO_MAIN_DOWN
BT_TXR_RKL
W5
W4
V6
V5
V4
U6
U5
U4
T6
T5
T4
R6
OPTIC_FPGA_RESET
R5
R4
P6
P5
P4
N6
OPTIC_SERDES_RESET
OLED_TCON_RESET
N5
N4
N3
M6
AC23
AC24
AE24
AD23
AE23
AC22
AD22
AE22
FPGA_LVDS_INFO
BT_ANALOGTEST
USB_ANALOGTEST
BT_USB_DP
BT_USB_DM
V7
Y4
B25
AA1
AA2
AA4
USB_DP2
USB_DM2
USB_TXR_RKL
USB_DM1
A26
B26
C25
SD_DATA0/GPIO85
USB_DP1
SD_WP_N/GPIO74
SD_DATA3/GPIO72
SD_DATA2/GPIO87
SD_DATA1/GPIO86
A25
B27
A27
B23
A24
B24
C24
SD_CMD/GPIO73
SD_CD_N/GPIO75
SD_CLK/GPIO76
C22
C23
A23
SC_VCC_SEL/GPIO88
SC_RST/GPIO91
SC_DATA/GPIO92
SC_VCCEN/GPIO89
T24
T23
R24
SC_CLK/GPIO90
R25
U23
T25
CAM_WAIT_N
CAM_REG_N
CAM_IOIS16_N
CAM_VCCEN_N
Y28
V27
V26
CAM_IREQ_N
CAM_RESET
CAM_INPACK_N
CAM_VS2_N
AA28
AB26
AA27
AA26
CAM_CD2_N
CAM_VS1_N
CAM_CD1_N
Y27
Y26
W28
W27
RMII_RXD0
CAM_CE2_N
RMII_TXD1
RMII_TXD0
RMII_RXD1
RMII_CRS_DV
RMII_MDIO
RMII_MDC
RMII_TXEN
RMII_REF_CLK
CAM_CE1_N
W26
V28
AC3
AE1
AD3
AD1
AB1
SCL5/GPIO66
SC_DETECT/GPIO93
GPIO0
AD2
EB_DATA[0]
EB_DATA[1]
EB_DATA[2]
EB_DATA[3]
EB_DATA[4]
EB_DATA[5]
EB_DATA[6]
EB_DATA[7]
R109
10K
EB_ADDR[1]
EB_ADDR[2]
EB_ADDR[0]
EB_ADDR[3]
EB_ADDR[4]
EB_ADDR[5]
EB_ADDR[7]
EB_ADDR[8]
EB_ADDR[6]
EB_ADDR[9]
EB_ADDR[10]
EB_ADDR[11]
EB_ADDR[12]
EB_ADDR[13]
EB_ADDR[14]
EB_BE_N0
GPIO3
GPIO2
GPIO1
SDA3/GPIO69
SCL4/GPIO68
SDA4/GPIO67
SDA5/GPIO65
EB_BE_N1
GPIO4
SCL2/GPIO56
SDA2/GPIO71
SCL3/GPIO70
AB2
AC7
+3.3V_NORMAL
GPIO7
GPIO6
GPIO5
AB3
AD5
AE6
AD6
AC6
SCL0/GPIO60
SDA0/GPIO59
SCL1/GPIO58
AC2
AD4
AE4
AE5
EB_OE_N
Mhz)
Mhz)
Mhz)
Mhz)
SPI_DO0/GPIO38
SPI_SCLK0/GPIO37
SPI_CS0/GPIO36
SPI_DI1/GPIO35
AB6
AB4
AC5
AC4
EB_WE_N
3D_DEPTH_RESET
Y24
USB_CTL3
is high
(792/792
(672/792
(792/672
(792/792
4.7K
N.C
DDR
DDR
DDR
DDR
R113
Pull-UP.
Main0,1/2
Main0,1/2
Main0,1/2
Main0,1/2
10K
FRC3
R170
FRC3_RESET
Y25
AA23
AA24
DiiVA_POD_CTL
22
FRC_RESET
PLL SET[1:0] ==> Internal

00 : CPU clock(1056Mhz),
FPGA_LVDS_INFO
AB25
R151
C26
E27
E26
D27
AC1
BOOT_MODE1
BOOT_MODE0
Y5
AA6
AB5
F27
F26
R23
TRST_N1
Y23
W25
W24
MOTOR_CLOSE_SW
MOTOR_OPEN_SW
EB_DATA0
EB_DATA7
EB_DATA6
EB_DATA5
EB_DATA4
EB_DATA9
EB_DATA8
EB_DATA10
EB_DATA14
EB_DATA13
EB_DATA12
EB_DATA11
EB_ADDR1
EB_ADDR0
EB_DATA15
EB_ADDR4
EB_ADDR3
EB_ADDR2
EB_ADDR8
EB_ADDR7
EB_ADDR6
EB_ADDR5
EB_ADDR9
EB_ADDR12
EB_ADDR11
EB_ADDR10
EB_ADDR14
EB_ADDR13
EB_WE_N
OPM1
EB_ADDR15/GPIO82
I2C_SDA3
A22
B22
AB16
EB_WAIT
M25
SMARTCARD_CLK
SC_DET
EB_OE_N
I2C_SCL3
SMARTCARD_DET
EB_BE_N0
OPT R142
22
R143
OPT 22
XO_MAIN
SMARTCARD_VCC
EB_BE_N1
I2C_SDA5
EB_CS2/GPIO79
/RST_PHY
EB_CS1/GPIO78
SDA
SEL_USB3
EB_CS0/GPIO77
SMARTCARD_PWR_SEL
SCL
EB_CS3/GPIO64
A0h
EB_ADDR17/GPIO84
VSS
EB_ADDR16/GPIO83
SEL_USB1
SEL_USB2
SEL_USB3
1M
A2
GND_2
X-TAL_2
SEL_USB2
R112
A1
A0
XIN_MAIN
24MHz
X101
GND_1
X-TAL_1
C100
8pF
50V
C101
8pF
50V
C111
0.1uF
IC102
R1EX24256BSAS0A
MAIN Clock(24Mhz)
IRB_SPI_MISO
IRB_SPI_MOSI
LG1152_RM
IC100-*1
IRB_SPI_CK
IRB_SPI_SS
22
IR_B_RESET
I2C_SDA1
I2C_BE_SDA1
N28
P26
P27
P28
R26
R27
R28
T26
L22
M22
N22
P22
R22
T22
U22
V22
K23
K24
K25
K26
K27
K28
L23
L24
L28
M26
N27
N26
L25
L27
L26
J23
K22
J22
U28
U26
U27
T28
T27
N23
PLLSET0
I2C_BE_SCL1
M23
22
M25
R162
I2C_SCL1
M24
PLLSET1
OPT
R131
U24
Y22
AA22
AB20
AB21
W22
TDI0
AB9
TDO0
PLLSET1
TMS0
PLLSET0
BOOT_MODE1
BOOT_MODE1
AB15
BOOT_MODE0
AB14
AB8
EB_DATA0
EB_DATA1
EB_DATA2
EB_DATA3
EB_DATA4
EB_DATA5
EB_DATA6
EB_DATA7
EB_DATA8
EB_DATA9
EB_DATA10
EB_DATA11
EB_DATA12
EB_DATA13
EB_DATA14
EB_DATA15
EB_ADDR0
EB_ADDR1
EB_ADDR2
EB_ADDR3
EB_ADDR4
EB_ADDR5
EB_ADDR6
EB_ADDR7
EB_ADDR8
EB_ADDR9
EB_ADDR10
EB_ADDR11
EB_ADDR12
EB_ADDR13
EB_ADDR14
EB_BE_N0
EB_BE_N1
EB_WAIT
EB_WE_N
EMMC_DATA3
TMS0
EMMC_DATA2
TCK0
EMMC_DATA1
TDI0
EMMC_DATA0
TDO0
ERROR_OUT
100K
R202
G
D
R134
OPT
NAND_CS1
TMS1
NAND_CS0
TCK1
NAND_ALE
TDI1
NAND_CLE
TDO1
NAND_REN
PLLSET1
NAND_WEN
PLLSET0
22
R101
22
GPIO31
BOOT_MODE0
GPIO30
W24
W23
/USB_OCD3
Q100
2N7002K
GPIO29
Y23
W25
EPHY_INT
/USB_OCD2
GPIO28
EXT_INTR3/GPIO48
EXT_INTR2/GPIO63
EXT_INTR0/GPIO61
SOC_TX
BOOT_MODE0
AA6
UART1_RX
Q103
2N7002K
Y6
UART1_TX
AB5
M_REMOTE_RX
AA5
M_REMOTE_TX
GPIO27
IC100
LG1152D-B1
LG1152_NON_RM
EXT_INTR1/GPIO62
Y5
W6
UART0_RX/GPIO49
UART0_TX/GPIO50
UART1_RX
GPIO26
GPIO25
GPIO24
GPIO23
GPIO22
GPIO21
UART1_TX
GPIO20
UART2_RX
GPIO19
UART2_TX
GPIO18
+5V_NORMAL
AA25
IRB_SPI_CK
AB25
IRB_SPI_SS
AB24
IRB_SPI_MOSI
MHL_DET
Y25
AV1_CVBS_DET
Q105
2N7002K OPT
AA23
Y24
DTV_ATV_SELECT
AA24
GPIO14
SPI_CS0/GPIO36
GPIO13
SPI_DI1/GPIO35
GPIO12
SPI_DO1/GPIO34
GPIO11
SPI_SCLK1/GPIO33
GPIO10
22
22
22
R105
R106
R108
EMMC_DATA[6]
E26
EMMC_DATA[5]
D27
EMMC_DATA[4]
D28
EMMC_DATA[3]
C27
EMMC_DATA[2]
C28
EMMC_DATA[1]
D26
EMMC_DATA[0]
P24
N25
P23
N24
P25
W5
OPTIC_SERDES_RESET
W4
3D_DEPTH_RESET
V6
/RST_PHY
V5
OLED_TCON_RESET
V4
U6
HW_OPT_9
HW_OPT_7
U5
HW_OPT_8
U4
+3.3V_NORMAL
SW1
JTP-1127WEM
2
DSUB_DET
T6
T5
T4
SC_DET
R6
COMP1_DET
R5
For ISP
Delete PV
DEBUG
HW_OPT_5
R4
HW_OPT_6
P6
M_RFModule_ISP
P5
HW_OPT_10
P4
M_RFModule_RESET
N6
FRC_RESET
N5
HW_OPT_2
N4
HW_OPT_1
N3
HW_OPT_0
M6
HW_OPT_4
AC23
+5V_NORMAL
FLASH_WP
/RST_HUB
AC24
AE24
HW_OPT_3
AD23
HP_DET
AE23
AC22
RF_SWITCH_CTL
AD22
HDMI_S/W_RESET
Q104
2N7002K
/TU_RESET
AE22
/S2_RESET
BT_ANALOGTEST
BT_TXR_RKL
BT_USB_DM
OPTIC_FPGA_RESET
V7
Y4
AA4
AA2
BT_USB_DP
AA1
USB_ANALOGTEST
USB_TXR_RKL
B25
C25
USB_DM2
B26
USB_DP2
USB_DM1
A26
A27
B27
USB_DP1
SD_DATA0/GPIO85
A25
SD_DATA1/GPIO86
SD_DATA2/GPIO87
C24
B24
SD_DATA3/GPIO72
SD_CD_N/GPIO75
SD_CMD/GPIO73
SD_CLK/GPIO76
SC_RST/GPIO91
SC_VCCEN/GPIO89
SC_DETECT/GPIO93
SC_CLK/GPIO90
CAM_IOIS16_N
CAM_REG_N
CAM_WAIT_N
CAM_VCCEN_N
CAM_INPACK_N
CAM_RESET
CAM_IREQ_N
SD_WP_N/GPIO74
A24
Not Support
B23
Support
C2 Tuner
A23
S Tuner
MODEL_OPT_9
C23
MODEL_OPT_8
C22
FrontEnd 2
R24
Not Support
T23
Support
T24
T2 Tuner
T25
MODEL_OPT_7
U23
FrontEnd 1
DDR_Default
R25
Enable
V26
CP BOX
V27
MODEL_OPT_6
Y28
CP BOX
NON_3D_Depth_IC
AA26
Reserved
3D_Depth_IC
AA27
DDR
AB26
3D DEPTH
MODEL_OPT_5
AD2
MODEL_OPT_4
DDR Size
HW_OPT_5
AA28
NON_OPTIC
CAM_VS2_N
UD
OPTIC
CAM_VS1_N
FHD
MODEL_OPT_3
3D Depth IC
W27
MODEL_OPT_2
OPTIC I/F
HW_OPT_4
CAM_CD2_N
Pannel Resol
HW_OPT_3
CAM_CD1_N
HW_OPT_2
LOW
W28
HIGH
Y26
BackEnd 2
Y27
SDA5/GPIO65
HW_OPT_1
V28
SCL5/GPIO66
CAM_CE2_N
SDA4/GPIO67
SC_DATA/GPIO92
GPIO0
SCL4/GPIO68
SC_VCC_SEL/GPIO88
SDA3/GPIO69
CAM_CE1_N
AC7
GPIO1
RMII_RXD0
I2C_SDA6
BackEnd 1
AC6
SCL3/GPIO70
RMII_RXD1
HW_OPT_0
AD6
GPIO2
W26
I2C_SCL6
AE6
SDA2/GPIO71
AD1
I2C_SDA5
GPIO3
RMII_TXD0
I2C_SCL5
AD5
GPIO4
SCL2/GPIO56
AD3
AE5
GPIO5
SDA1/GPIO57
AE1
AE4
SCL1/GPIO58
RMII_TXD1
AD4
GPIO6
RMII_TXEN
AC4
SDA0/GPIO59
RMII_MDC
MODEL_OPT_1
AC5
GPIO7
AC3
I2C_SDA4
MODEL_OPT_0
GPIO8
SCL0/GPIO60
AC2
I2C_SCL4
AB4
AB3
I2C_SDA3
URSA5
GPIO9
AB6
RMII_MDIO
UD_FRC
R121
10K
DVB_S_TUNER
R154
10K
DVB_C2_TUNER
R156
10K
CP_BOX
R147
10K
DVB_T2_TUNER
R152
10K
OPT
10K
R145
3D_DEPTH
R140
10K
OPTIC
R138
10K
FHD
10K
I2C_SCL3
R124
SPI_SCLK0/GPIO37
RMII_CRS_DV
I2C_SCL2
I2C_SDA2
URSA5
R110
10K
GPIO15
RMII_REF_CLK
+3.3V_NORMAL
FRC_EXTERNAL
R100
10K
SPI_DO0/GPIO38
AB2
I2C_SDA1
LG FRC3
GPIO16
AB1
I2C_SCL1
SoC
internal
FRC
SPI_DI0/GPIO39
SPI_CS1/GPIO32
HDMI_INT
NO_FRC
GPIO17
AB23
IRB_SPI_MISO
OPT
R203
100K
+3.3V_NORMAL
E27
AC1
BOOT_MODE1
OPT
R133
4.7K
SOC_RX
10K
10K
BOOT_MODE0
R150
EMMC_DATA[7]
R23
TRST_N1
SOC_RESET
4.7K
R188
BOOT_MODE0
TRST_N0
EMMC_DATA[0-7]
C26
2.7K
R201
V24
TDO0
TCK0
EMMC_DATA4
EMMC_CMD
F26
5%
1/16W
10K
10K
V25
TCK0
R132
OPT
R187
4.7K
4.7K
R185
OPT
U25
TMS0
+3.3V_NORMAL
+5V_NORMAL
EMMC_DATA5
V23
TRST_N0
+3.3V_NORMAL
EMMC_DATA6
PORES_N
TDI0
BOOT_MODE1
EMMC_DATA7
AE3
SOC_RESET
TRST_N0
BOOT_MODE1
OPT
EMMC_CMD
OPM0
+3.3V_NORMAL
R186
OPM1
EMMC_CLK
AB17
EMMC_CLK
F27
AB16
+3.3V_NORMAL
XO_MAIN
EMMC_RST
E28
EMMC_RST
560
EB_ADDR15/GPIO82
R104
1%
XO_MAIN
XIN_MAIN
EB_ADDR16/GPIO83
JTAG I/F FOR MAIN
B22
EB_ADDR17/GPIO84
A22
XIN_MAIN
EB_OE_N
MODE
or "01" : NOR
: eMMC
: NAND
EB_CS0/GPIO77
BOOT
"11"
"10"
"00"
EB_CS1/GPIO78
LOCAL_DIM_EN
EB_CS2/GPIO79
EB_CS3/GPIO64
OPT
HW_OPT_6
Disable
HW_OPT_7
USB_DM3
USB_DP3
USB_HUB_IC_IN_DM
USB_HUB_IC_IN_DP
SMARTCARD_RST
SMARTCARD_DATA
SMARTCARD_VCC
SMARTCARD_DET
SMARTCARD_PWR_SEL
10K CI
CAM_REG_N
P100
+3.3V_NORMAL
12507WS-04L
OPT
1
UART1_RX
OPT
22
R175
R176
22
R174
R173
RCLAMP0502BA
D100
3
WIFI_DM
UART1_TX
WIFI_DP
MOTOR_CW
MOTOR_OPEN_SW
IR_B_RESET
MO_SENS_TO_MAIN_UP
MOTOR_CCW
OPT
DEBUG
R168
CAM_WAIT_N
PCM_RST
Debug
MOTOR_CLOSE_SW
I2C_SDA6
I2C_SCL6
R166
R167
I2C_SDA4
I2C_SCL4
+3.3V_NORMAL
PCM_5V_CTL
I2C_SCL3
CAM_INPACK_N
CAM_IREQ_N
CAM_CD2_N
CAM_CD1_N
I2C_SDA3
10K CI
10K CI
/PCM_CE2
/PCM_CE1
EPHY_RXD0
EPHY_RXD1
EPHY_TXD0
EPHY_EN
EPHY_MDC
I2C_SCL2
I2C_SDA5
I2C_SCL5
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
EPHY_TXD1
I2C_SCL1
I2C_SDA2
EPHY_MDIO
R183
1.2K
R199
3.3K
R197
3.3K
R198
3.3K
R196
3.3K
R195
2.2K
R184
1.2K
I2C_SDA1
EPHY_CRS_DV
MODEL OPTION 8 is just for CP Box

It should not be appiled at MP
EPHY_REFCLK
NON_UD_FRC
R126
10K
NON_DVB_C2_TUNER
R158
10K
NON_DVB_S_TUNER
R155
10K
NON_CP_BOX
R148
10K
NON_DVB_T2_TUNER
R153
10K
1GByte
R146
10K
NON_3D DEPTH
R141
10K
NON_OPTIC
R139
10K
10K
UD
R125
22
R117
R111 FRC310K
OPT
FRC_INTERNAL
R107
10K
HP_AMP_MUTE
R182
2.2K
Not Support
R181
3.3K
Support
(For UD)
R180
3.3K
UD FRC
I2C PULL UP
Not Support
R179
2.2K
MODEL_OPT_10
HW_OPT_10
+3.3V_NORMAL
Support
R178
2.2K
HW_OPT_9
SMARTCARD_CLK
HW_OPT_8
Place near Jack side

LG1152 B1
MAIN & GPIO
+1.5V_DDR
0.1uF
0.1uF
0.1uF
0.1uF
C337
C342
C343
C346
0.1uF
0.1uF
C334
0.1uF
C323
C329
0.1uF
0.1uF
C320
0.1uF
C317
C302 10uF
C326 10uF
0.1uF
IC100
LG1152D-B1
Max 680mA
L300
BLM18PG121SN1D
ESD_LG1152
ZD301
5V
0.1uF
C338
C332 10uF
C370
C333
0.1uF
0.1uF
C369 10uF
C366 10uF
C368
C359 10uF
0.1uF
C313
VCC1.5V_MAIN
(18)
L305
BLM18PG121SN1D
L308
BLM18PG121SN1D
C305 10uF
0.1uF
0.1uF
C321
C318
AVDD10_LVTX
LG1152D
+1.5V_Bypass Cap
Max 35mA
+1.0V_VDD
AVDD10_VSB
+1.0V_VDD
VDDC_XTAL
L302
BLM18PG121SN1D
L304
BLM18PG121SN1D
C312 10uF
Max 1mA
+1.0V_VDD
AVDD10_DEMOD
C311
Max 12mA
Max 360mA
+1.0V_VDD
VDD33
U8
U9
U10
V8
V9
On Package Decap : 0.1uF *3ea
VDD33_USB
V10
J21
VCC1.5V_MAIN
VCC1.5V_MAIN
K21
AA10
Max 40mA
R302
VREF_M0
1K 1%
R300
LG1152A
1K 1%
Max 40mA
AA11
VREF_M1
VDD18
For HDCP OTP

Will be change to LOW for MP
AVSS25_REF
GND_62
GND_63
N10
K16
D16
G5
G8
G9
G10
G11
G14
G15
H4
H5
H6
H7
H8
H9
H10
H11
H12
H13
H14
H15
J4
J5
J6
J7
AVSS25_REF
GND_64
GND_XTAL
GND_65
GND_1
GND_66
GND_2
GND_67
GND_3
GND_68
GND_4
GND_69
GND_5
GND_70
GND_6
GND_71
GND_7
GND_72
GND_8
GND_73
GND_9
GND_74
GND_10
GND_75
GND_11
GND_76
GND_12
GND_77
GND_13
GND_78
GND_14
GND_79
GND_15
GND_80
GND_16
GND_81
GND_17
GND_82
GND_18
GND_83
GND_19
GND_84
GND_20
GND_85
GND_21
GND_86
GND_22
GND_87
GND_23
GND_88
GND_24
GND_89
1000pF
0.1uF
C350
C362
1%
1K
R303
1000pF
0.1uF
C300
C308
1%
0.1uF
M11
M12
R304
1K 1%
C351
C363
1000pF
0.1uF
1%
1K
R305
0.1uF
C340
0.1uF
C316
C336
0.1uF
0.1uF
0.1uF
C310
C306
C303 10uF
0.1uF
0.1uF
C324
0.1uF
0.1uF
0.1uF
VREF_M1
+2.5V_NORMAL
VDD25_AUD
+2.5V_NORMAL
M13
VREF_M2
VDD25_REF
VDD25_COMP
Max 50mA
Max 20mA
+1.0V_VDD
Max 1320mA
+0.9V_VDD
M14
M15
L315
BLM18PG121SN1D
L322
BLM18PG121SN1D
M17
N4
N5
N6
N8
N9
N11
AVSS25_REF
F13
F14
L306
BLM18PG121SN1D
L320
BLM15BD121SN1
AVDD10_OSPREY
G15
M20
M21
M27
M28
N20
N21
P20
N15
P21
N16
R20
P3
R21
+0.9V_VDD
P4
P5
Max 120mA
+1.8V_NORMAL
+1.8V_NORMAL
P15
Max 256mA
Max 35mA
+3.3V_NORMAL
P16
+3.3V_NORMAL
VDD33_HDMI
+3.3V_NORMAL
R3
R16
L323
BLM18PG121SN1D
L319
BLM18PG121SN1D
R17
R18
T13
U13
GND_90
L309
BLM18PG121SN1D
K10
L316
BLM18PG121SN1D
L312
BLM18PG121SN1D
VDD33_XTAL
VDD33_CVBS
K9
VDD18
Max 1mA
K11
L8
L9
L10
L11
M8
M9
M10
M11
N8
On Package Decap:0.1uF *1ea
N9
N10
N11
P8
P9
P10
Max 31mA
+1.8V_NORMAL
Max 93mA
VDD18_LVRX
L318
BLM18PG121SN1D
M315
M315-*1
MDS62110214
ESD
UD_ESD_9.5T
M312
UD Option
MDS62110214
ESD
UD_ESD_9.5T
MDS62110214
GASKET_8.0X6.0X9.5H
MDS62110214
UD_GASKET except ATSC
0.1uF
C304
C384
0.1uF
0.1uF
0.1uF
L310
BLM18PG121SN1D
M319
M309-*1
MDS62110214
GASKET_8.0X6.0X9.5H
UD_9.5T
M322-*1
MDS62110214
GASKET_8.0X6.0X9.5H
UD_9.5T
MDS62110217
M311-*1
ESD
MDS62110214
VDD33
ESD
OPT_UD_9.5T
UD_ATSC_9.5T
J7
Max 48.8mA
+3.3V_NORMAL
J8
VDD33_USB
J9
J10
L317
BLM18PG121SN1D
J11
J12
0.1uF
UD_ESD_AJ_9.5T
M317-*1
M308-*1
+3.3V_NORMAL
0.1uF
MDS62110215
MDS62110214
MDS62110217
M310-*1
J13
J14
J15
J16
C406
ESD_AJ
M317
M318-*1
J17
J18
J19
J20
K7
K12
THE
11/05/31
AVDD33_BT_USB_2
GND_30
GND_31
VDD18_1
GND_32
VDD18_2
GND_33
VDD18_3
GND_34
VDD18_4
GND_35
VDD18_5
GND_36
VDD18_6
GND_37
VDD18_LTX_1
GND_38
VDD18_LTX_2
GND_39
VDD18_LTX_3
GND_40
VDD18_LTX_4
GND_41
VDD18_LVRX_1
GND_42
VDD18_LVRX_2
GND_43
VDD18_LVRX_3
GND_44
VDD18_DISPPLL
GND_45
VDD18_DR3PLL
GND_46
VDD18_MAIN_XTAL
GND_47
GND_48
VDD15_M2_1
GND_49
VDD15_M2_2
GND_50
VDD15_M2_3
GND_51
VDD15_M2_4
GND_52
VDD15_M2_5
GND_53
VDD15_M2_6
GND_54
VDD15_M2_7
GND_55
VDD15_M2_8
GND_56
VDD15_M2_9
GND_57
VDD15_M0_1
GND_58
VDD15_M0_2
GND_59
VDD15_M0_3
GND_60
VDD15_M0_4
GND_61
VDD15_M0_5
GND_62
VDD15_M0_6
GND_63
VDD15_M0_7
GND_64
VDD15_M0_8
GND_65
VDD15_M0_9
GND_66
VDD15_M0_10
GND_67
VDD15_M0_11
GND_68
VDD15_M0_12
GND_69
VDD15_M0_13
GND_70
VDD15_M0_14
GND_71
VDD15_M0_15
GND_72
VDD15_M0_16
GND_73
VDD15_M0_17
GND_74
GND_75
VREF_M2_0
GND_76
VREF_M1_0
GND_77
VREF_M1_1
GND_78
VREF_M0_0
GND_79
VREF_M0_1
GND_80
GND_81
VDDC10_OSPREY_1
GND_82
VDDC10_OSPREY_2
GND_83
VDDC10_OSPREY_3
GND_84
VDDC10_OSPREY_4
GND_85
VDDC10_OSPREY_5
GND_86
VDDC10_OSPREY_6
GND_87
VDDC10_OSPREY_7
GND_88
VDDC10_OSPREY_8
GND_89
VDDC10_OSPREY_9
GND_90
VDDC10_OSPREY_10
GND_91
VDDC10_OSPREY_11
GND_92
GND_93
VDDC09_1
GND_94
VDDC09_2
GND_95
VDDC09_3
GND_96
VDDC09_4
GND_97
VDDC09_5
GND_98
VDDC09_6
GND_99
VDDC09_7
GND_100
VDDC09_8
GND_101
VDDC09_9
GND_102
VDDC09_10
GND_103
VDDC09_11
GND_104
VDDC09_12
GND_105
VDDC09_13
GND_106
VDDC09_14
GND_107
VDDC09_15
GND_108
VDDC09_16
GND_109
VDDC09_17
GND_110
VDDC09_18
GND_111
VDDC09_19
GND_112
VDDC09_20
GND_113
VDDC09_21
GND_114
VDDC09_22
GND_115
VDDC09_23
GND_116
VDDC09_24
GND_117
VDD09_LTX_1
GND_118
VDD09_LTX_2
GND_119
VDD09_LTX_3
GND_120
AVDD09_DR3PLL
GND_121
GND_122
GND_123
GND_124
GND_125
GND_126
GND_MAIN_XTAL
H15
C402
MDS62110215
M320
UD Option
C396 10uF
MDS62110218
M318
GND_29
G23
H12
0.1uF
HEATSINK/ALBLOCK
M323
UD_ESD_9.5T
GND_28
AVDD33_BT_USB_1
VDDC_MAIN_XTAL
H7
NON_UD
0.1uF
MDS62110218
MDS62110214
ESD
AVDD33_USB_2
GND_127
GND_128
G7
ESD
C399
MDS62110218
HEATSINK
GND_27
SP_VQPS
C394
HEATSINK/ALBLOCK
M307
MDS62110218
M324
For ATSC
0.1uF
MDS62110218
M321
ALBLOCK
MDS62110215
GASKET_8.0X6.0X7.5H
M314-*1
MDS62110215
HEATSINK/ALBLOCK
M306
OPT_UD_ESD_9.5T
M314
AVDD33_USB_1
AA19
MDS62110214
OPT
MDS62110218
MDS62110218
AF1
F28
For secure BOOT OTP

Will be change to LOW for MP
C392
MDS62110215
GND_26
MDS62110217
M322
M313-*1
MAIN_XTAL
M316
ATSC
0.1uF
M305
HEATSINK
MDS62110215
UD_ESD_9.5T
M313
GND_25
VDD33_6
M311
C391
MDS62110218
ESD
LM8600
Y8
0.1uF
HEATSINK
MDS62110215
SMD TOP FOR ESD
C388
M304
MDS62110214
GASKET_8.0X6.0X7.5H
Y7
VDD18
0.1uF
MDS62110218
HEATSINK/ALBLOCK
M302
MDS62110215
M309
OPT
C383
HEATSINK/ALBLOCK
M303
MDS62110218
M312-*1
MDS62110215
0.1uF
MDS62110218
HEATSINK/ALBLOCK
M301
GASKET except ATSC
VDD33_5
H22
C377
HEATSINK/ALBLOCK
M300
MDS62110215
R10
R11
For Tuner Sensitivity / Under TUNER

M310
C372 10uF
MDS62110215
For HeatSinK, AL Block / SMD Top
For Tuner Sensitivity / Under DDR

M308
GASKET_8.0X6.0X7.5H
R9
+0.9V_VDD
C378 10uF
UD Option
R8
L314
BLM18PG121SN1D
C404
C397 10uF
SMD Bottom
P11
VDD18_MAIN_XTAL
C389
+1.8V_NORMAL
GND_24
K8
Max 49mA
VDD18_LVTX
P13
GND_23
VDD33_4
L20
N13
N14
VDD33_3
L4
G12
AVDD10_OSPREY
L321
BLM15BD121SN1
N12
VREF_M0
0.33uF
VQPS
C349
GND_61
G4
H21
0.1uF
+2.5V_NORMAL
H20
Max 10mA
Max 250mA
M10
H19
C411
GND_60
M9
H18
0.33uF
VDDC_XTAL
M8
H17
C348
GND_59
M7
H16
0.1uF
GND_58
AVDD10_LLPLL
M6
H14
C410
AVDD10_LVTX_2
M5
0.1uF
GND_57
M4
H13
C345
L16
AVDD10_LVTX_1
C395 10uF
N7
GND_56
C309 10uF
VDDC_XTAL
AVDD10_VSB
L14
G21
C315
D18
GND_55
G19
L303
BLM18PG121SN1D
C341 10uF
D17
AVDD10_CVBS
MAIN_XTAL
G20
C327
AVDD10_LVTX
GND_54
C322
K15
GND_53
VDDC10_2
C325
R15
VDDC10_1
0.1uF
G7
C319
AVDD10_VSB
L13
0.1uF
GND_52
G6
G18
Max 5900mA
L12
C314
AVDD10_DEMOD
+0.9V_VDD
Max 6mA
L11
0.1uF
GND_51
G17
C353
GND_50
VDD18_2
H11
G13
+0.9V_VDD
0.1uF
VDD18_1
L10
H9
C382
N2
L9
H8
G16
C307 10uF
GND_49
N1
L8
C347 10uF
GND_48
G11
G14
C374 10uF
GND_47
VDD25_LVTX_3
L7
C301 10uF
VDD25_LVTX_2
L6
G10
F22
ESD_LG1152
ZD300
5V
GND_46
G9
H10
0.1uF
GND_45
VDD25_LVTX_1
L5
G22
G8
VCC1.5V_MAIN
C418
VDD25_AUD_3
L324
BLM18PG121SN1D
L4
GND_22
F9
L325
BLM18PG121SN1D
C415 10uF
GND_44
L313
BLM18PG121SN1D
0.1uF
VDD25_AUD_2
K14
VCC1.5V_DE
C381
GND_43
+2.5V_NORMAL
VDD25_LVTX
0.1uF
GND_42
VDD25_AUD_1
VDD25_VSB
C400
G13
VDD25_AAD
+2.5V_NORMAL
K13
+2.5V_NORMAL
VDD25_CVBS
C371 10uF
VDD18_A
GND_41
K12
Max 28mA
Max 250mA
Max 100mA
0.1uF
G12
VDD25_COMP_4
K11
C393
B18
GND_40
0.1uF
V6
GND_39
VDD25_COMP_2
C390
P7
VDD25_LVTX
VDD25_COMP_1
K10
0.1uF
P6
GND_38
K9
C407
J16
GND_37
VDD25_COMP_3
K8
0.1uF
VDD25_AUD
AVDD25_REF
K7
C385
V7
GND_36
L301
BLM18PG121SN1D
0.1uF
R9
VDD25_CVBS_3
B28
K6
OPT
C416
P9
GND_35
C375 10uF
R10
VDD25_COMP
GND_34
VDD25_CVBS_1
0.1uF
P10
VDD25_CVBS_2
AA13
J28
VREF_M2
VCC1.5V_DE
K5
0.1uF
V13
GND_33
C405
R12
VDD25_REF
VDD25_VSB
AG1
AB12
Max 40mA
Max 340mA
+1.5V_DDR
C379 10uF
R13
K4
C386
L15
VCC1.5V_DE
J15
C413 10uF
VDD25_CVBS
GND_32
C423
GND_31
AH27
AA12
VDD18_MAIN_XTAL
J14
0.1uF
VDD33_XTAL
VDD25_VSB
AG28
AA7
0.1uF
GND_30
C417
AVDD33_HDMI_2
J13
C419
GND_29
J12
VDD18_LVTX
VDD18_LVRX
0.1uF
AVDD33_HDMI_1
J11
Y19
AA9
C409
GND_28
J10
0.1uF
AVDD33_CVBS_2
C422 10uF
GND_27
Y18
AA8
C408
M16
GND_26
AVDD33_CVBS_1
C414 10uF
H16
VDD33_2
J9
C401 10uF
F18
GND_25
0.1uF
R14
VDD33_XTAL
VDD33_1
C398 10uF
P14
VDD33_HDMI
J8
C421 10uF
P2
VDD18_A
L326
BLM18PG121SN1D
C403
P1
VDD33_CVBS
R301
VDD33
1K
+1.8V_NORMAL
GND_21
VDD33_2
W18
W19
IC101
LG1152AN-B2
K13
VDD33_1
GND_1
GND_129
GND_2
GND_130
GND_3
GND_131
GND_4
GND_132
GND_5
GND_133
GND_6
GND_134
GND_7
GND_135
GND_8
GND_136
GND_9
GND_137
GND_10
GND_138
GND_11
GND_139
GND_12
GND_140
GND_13
GND_141
GND_14
GND_142
GND_15
GND_143
GND_16
GND_144
GND_17
GND_145
GND_18
GND_146
GND_19
GND_147
GND_20
GND_148
LG1152
MAIN POWER
K14
K15
K16
K17
K18
K19
K20
L7
L12
L13
L14
L15
L16
L17
L18
L19
L21
M7
M12
M13
M14
M15
M16
M17
M18
M19
N7
N12
N13
N14
N15
N16
N17
N18
N19
P7
P12
P13
P14
P15
P16
P17
P18
P19
R7
R12
R13
R14
R15
R16
R17
R18
R19
T7
T8
T9
T10
T11
T12
T13
T14
T15
T16
T17
T18
T19
T20
T21
U7
U11
U12
U13
U14
U15
U16
U17
U18
U19
U20
U21
V11
V12
V13
V14
V15
V16
V17
V18
V19
V20
V21
W7
W8
W9
W10
W11
W12
W13
W14
W15
W16
W17
W20
W21
Y9
Y10
Y11
Y12
Y13
Y14
Y15
Y16
Y17
Y20
Y21
AA14
AA15
AA16
AA17
AA18
AA20
AA21
AB7
AB10
AB11
AB13
AB22
+5V_NORMAL
Q506
MMBT3904(NXP)
EU
C510
0.1uF
16V
TU_CVBS
EU
R527
10K
EU
R507
10K
EU
R593
220
EU
R592
220
EU
680pF
C506
OPT
IC101
LG1152AN-B2
DTV_ATV_SELECT
INTR_GBB
INTR_HDMI1
IC500
NLASB3157DFT2G
IC100
LG1152D-B1
L1
AH2
L2
AG2
L3
AF2
INTR_AFE3CH
STPI_CLK
INTR_HDMI1
STPI_SOP
INTR_AFE3CH
STPI_VAL
E
100
L503 1uH
SELECT
SC_CVBS_IN
C508
150pF
50V
EU
C509
150pF
EU
EU
R614
75
1%
VCC
5.5V D504
EU
AUD_HMR00ARC
ATV_OUT
EU
Q504
MMBT3906(NXP)
C
B1
R576
AUD_HMR0AMUTE
EU
R599
75
AUD_HMR0ALRCK
OPT
GND
AUD_HMR0ABCK
AUD_HMR0ASD4
AUD_HMR0ASD3
L504 1uH
AV1_CVBS_IN
K1
A
C514
150pF
50V
50V
150pF
C511
R615
75
1%
B0
AUD_HMR0ASD2
Selece = Low
AUD_HMR0ASD1
DTV/MNT_VOUT
Selece = High ==> A = B1
DTV/MNT_V_OUT
AUD_DAC1_SCK
IC101
LG1152AN-B2
R616
220CHB
AUD_FS23CLK
M2
SC_SOG_IN
M1
R521
SC_ID
SOC_RESET
M3
33 C549
0.047uF
33 C550
0.047uF
T14
0.047uF
V15
0.047uF
U15
R574
100 C553
0.047uF
T15
L500
R551
33
L502
R575
R558
DSUB_G+
0.047uF
U16
33 C555
0.047uF
V14
33 C556
68 C557
0.047uF
T16
75
75
75
OPT
10K
10K
R555
R553
V16
0.047uF
R563
R530
R528
R529
OPT
C554
0
EU
C515
100pF
50V
EU
DTV/MNT_VOUT
C607
10pF
OPT
C606
10pF
C605
10pF
5.5V D500
OPT
5.5V D501
OPT
5.5V D502
OPT
R557
V17
U17
R579
R580
22
22
R8
R536
68
C516
0.047uF
U8
R539
33
C518
0.047uF
V8
R541
75
75
OPT
C524
10pF
75
OPT
OPT
C546
10pF
68
C523
0.047uF
V10
R546
33
C526
0.047uF
T8
R547
C527
1000pF
V9
0.047uF
T11
R550
33
C532
0.047uF
U9
R568
33
C542
0.047uF
T9
R594
R600
R595
R548
C531
68
33
C543
0.047uF
U10
33
1000pF
0.047uF
T10
R570
C544
C545
R564
150
C538
0.047uF
U11
COMP1_Pb
COMP1_Y
R565
150
C539
0.047uF
V12
R566
COMP1_Pr
R567
150
R569
C540
C541
V11
U12
1000pF
0.047uF
T12
R604 1% 75
R605 1% 75
AUAD_L_CH1_IN
CVBS_IN3
AUAD_R_CH1_IN
CVBS_VCM
CVBS_IN4
AUAD_REFN
CVBS_IN5
AUAD_REFP
CVBS_IN6
AUAD_VR_OUT
CB_IN
CB_VCM
BUF_OUT1
AUMI_BIAS
AUMI_IN
AUAD_R_CH5_IN
V4
AUAD_L_CH4_IN
T3
AUAD_R_CH4_IN
U5
T5
PHY0_RXCN_0
SC1_SID
PHY0_RXCP_0
BINCOM_IN
PHY0_RX0N_0
B_IN
PHY0_RX0P_0
GINCOM_IN
PHY0_RX1N_0
G_IN
PHY0_RX1P_0
SOG_IN
PHY0_RX2N_0
RINCOM_IN
R_IN
PHY0_RX2P_0
Y1_IN
BB_TP_DATA4
U6
BB_TP_DATA5
T6
U7
T7
T4
10K
R534
2.2uF
C537
U4
10K
R520
2.2uF
C547
2.2uF
C548
V5
SOY1_IN
RFAGC
PR1_IN
IFAGC
PB2_IN
Y2_IN
SOY2_IN
ADC_I_INP
PR2_IN
ADC_I_INN
100K
R538
EU
3
X-TAL_2
SCART_AMP_L_FB
1uF 25V 10K
R6005
C6001
8pF
C512
+3.3V_NORMAL
E17
R577
4.7K
R578
4.7K
SC_R
CHB_CVBS
HDMI_CLK-
J17
H17
H18
G17
G18
SC_CVBS_IN
F16
CHB_UP
CHB_START
SC_B
HDMI_RX0-
SC_G
CHB_DATA1
HDMI_RX0+
SC_FB
HDMI_RX1-
SC_ID
ATV_OUT
CHB_DATA2
CHB_DATA3
SC_R_IN
TUNER_SIF
TUNER_SIF
DTV/MNT_V_OUT
M18
CVBS_GC2
CVBS_GC1
CVBS_GC0
CVBS_UP
P18
IF_AGC
U18
T18
C115
0.1uF
C116
0.1uF
C117
0.1uF
JDVR_SCLK
IF_N
IF_P
IF_N
IF_P
IF_AGC
L509
C575
100pF
50V
R514
C581
560pF
50V
OPT
C572
330pF
50V
OPT
2.2uF R509
C587
100pF
50V
FE_TS_SYNC
DAC_DATA1
FE_TS_VAL
DAC_DATA2
TPI_DVB_ERR
DAC_DATA3
FE_TS_DATA[0-7]
DAC_DATA4
TPO_DATA[0-7]
TPI_DATA[0-7]
DAC_START
100K
TPI_ERR
AAD_GC0
TPI_VAL
OPTIC_GPIO1
AAD_GC1
AAD_GC2
AAD_GC4
AAD_DATA3
AAD_DATA4
AAD_DATA5
AAD_DATA6
XO_SUB
AAD_DATA8
HP_LOUT_MAIN
C603
0.01uF
C502
EU
L510
C582
330pF
50V
OPT
C503
2.2uF
EU
2.2uF
EU
EU
C588
330pF
50V
R510
HSR_AP0
HP_ROUT_MAIN
C604
0.01uF
HSR_BM0
HSR_BP0
HSR_CM0
HSR_CLKM0
HSR_DM0
HSR_EP0
HSR_AM1
HSR_BP1
22K
AUAD_L_CH4_IN
EU
R511
R516
22K
EU
R517
C586
560pF
50V
OPT
100K
C505
HSR_CLKM1
HSR_CLKP1
HSR_EM1
2.2uF R512
22K
AUAD_L_CH3_IN
R518
2.2uF R513
22K
AF6
B1
AH7
STPIO_CLK
AUD_HMR0ALRCK
STPIO_SOP/GPIO43
AUD_HMR0ABCK
STPIO_VAL/GPIO42
AUD_HMR0ASD4
STPIO_ERR/GPIO41
AUD_HMR0ASD3
STPIO_DATA/GPIO40
C1
AG7
A4
AH10
B4
AG10
C4
AF10
A2
AH8
D1
AF7
D2
AE8
E2
AD8
E1
AE7
F1
AD7
C529
220pF
OPT
50V
F2
B2
A3
AC8
AG8
AH9
C2
AF8
B3
AG9
C3
AF9
AE9
E3
AD9
F3
AC9
D4
AE10
E4
AD10
F4
AC10
D5
AE11
E5
AD11
F5
AC11
D6
AE12
A5
AH11
B5
AG11
C5
AF11
A6
AH12
B6
AG12
C6
AF12
CHB_ERR
CHB_DATA
R200
AD26
47 CHB
AC28
AC26
AB28
33
R556
USB_CTL2
AC27
AB27
AUD_HMR0ASD1
TPI_DVB_SOP/GPIO46
AUD_DAC1_LRCH
TPI_DVB_VAL/GPIO45
AUD_DAC1_SCK
AUD_DAC1_LRCK
FE_TS_CLK
AF27
TPI_DVB_CLK/GPIO47
TPI_DVB_ERR
TPI_DVB_DATA0/GPIO44
AUD_FS25CLK
TPI_DVB_DATA1
AUD_FS24CLK
TPI_DVB_DATA2
AUD_FS23CLK
TPI_DVB_DATA3
AUD_FS21CLK
TPI_DVB_DATA4
AUD_FS20CLK
TPI_DVB_DATA5
AUDCLK_OUT_SUB
TPI_DVB_DATA6
AUD_DAC0_LRCK
TPI_DVB_DATA7
AE28
FE_TS_SYNC
AG27
FE_TS_VAL
TPI_DVB_ERR
AF28
AG26
FE_TS_DATA[0]
AF26
FE_TS_DATA[1]
AF25
FE_TS_DATA[2]
AH26
FE_TS_DATA[3]
AH25
FE_TS_DATA[4]
AG25
FE_TS_DATA[5]
AH24
FE_TS_DATA[6]
AG24
FE_TS_DATA[7]
FE_TS_DATA[0-7]
AUD_DAC0_LRCH
AUD_DAC0_SCK
TPI_CLK
H24
AUD_ADC_LRCH
TPI_CLK
AUD_ADC_SCK
TPI_SOP
AUD_ADC_LRCK
TPI_VAL
AUD_MIC_LRCH
TPI_ERR
AUD_MIC_SCK
TPI_DATA0
TPI_DATA1
TPI_DATA2
BB_TPI_DATA0
TPI_DATA3
BB_TPI_DATA1
TPI_DATA4
BB_TPI_DATA2
TPI_DATA5
BB_TPI_DATA3
TPI_DATA6
BB_TPI_DATA4
TPI_DATA7
TPI_SOP
J25
TPI_VAL
J24
TPI_ERR
H25
J27
TPI_DATA[0]
J26
TPI_DATA[1]
H28
TPI_DATA[2]
H27
TPI_DATA[3]
H26
TPI_DATA[4]
G28
TPI_DATA[5]
G27
TPI_DATA[6]
G26
TPI_DATA[7]
TPI_DATA[0-7]
BB_TPI_DATA5
BB_TPI_DATA6
TPO_CLK
D24
BB_TPI_DATA7
TPO_CLK
BB_TPI_VAL
TPO_SOP
BB_TPI_SOP
TPO_VAL
BB_TPI_ERR
TPO_ERR
BB_TPI_CLK
TPO_DATA0
TPO_DATA1
BB_SDA_I
TPO_DATA2
BB_SDA_O
TPO_DATA3
BB_SCL
TPO_DATA4
HS_SCL
TPO_DATA5
HS_SDA_I
TPO_DATA6
HS_SDA_O
TPO_DATA7
TPO_SOP
E23
TPO_VAL
D25
TPO_ERR
D23
H23
TPO_DATA[0]
G25
TPO_DATA[1]
G24
TPO_DATA[2]
F25
TPO_DATA[3]
F24
TPO_DATA[4]
F23
TPO_DATA[5]
E25
TPO_DATA[6]
E24
TPO_DATA[7]
TPO_DATA[0-7]
AD12
F6
AC12
D7
AE13
B7
AG13
C7
AF13
A8
AH14
B8
AG14
C8
AF14
CHB_DN
CHB_UP
CHB_START
C1
CHB_DATA0
AUDCLK_OUT
CHB_DATA1
DACLRCH
CHB_DATA2
DACSLRCH/GPIO95
CHB_DATA3
DACCLFCH/GPIO94
CHB_DATA4
Close to LG1152A
R581
33
AE14
F7
AC13
E7
AD13
E8
AD14
F8
AC14
Close to LG1152A
R582
33
AH15
R583
AG15
33
DACSCK
CLK_54
PCMI3LRCK/GPIO81
CVBS_GC1
PCMI3LRCH
CVBS_GC0
PCMI3SCK/GPIO80
CVBS_UP
E9
AD15
F9
AC15
C10
AF16
D10
AE16
AUD_MASTER_CLK
AUD_LRCH
A2
B2
100
R544
B1
100
R545
FRC3_FLASH_WP
AUD_SCK
AUD_LRCK
OPTIC_BACK_CHANNEL
C3
A4
OPTIC_GPIO1
AE2
CVBS_DN
IEC958OUT
FS00CLK
AUD_SUBMCK
R630
AUD_SUBLRCH
AUD_SUBSCK/GPIO51
DAC_DATA0
100
AC25
R628 OPT 22
47
AD24
R629
AE25
SPDIF_OUT
C630
82pF
50V
R598 OPT 47
R619 OPT 47
AD25
AUDCLK_TO_DIGITAL
AE15
R542
100 R543
A3
B3
CVBS_GC2
AF15
D9
100
C2
DACLRCK
AH13
D8
B9
CHB_VAL
AD27
AUD_HMR0ASD2
AUD_MIC_LRCK
D3
CHB_SYNC
AD28
AMP_RESET_N
AUD_SUBLRCK/GPIO52
+3.3V_NORMAL
DAC_DATA1
DAC_DATA2
DAC_DATA3
BTSCSEL
DAC_DATA4
DTS_EN
AB18
22
R596
AB19
22
R597
DTS_EN: ENABLE(1) (for development)
DAC_START
E10
AD16
F10
AC16
D11
AE17
E11
AD17
F11
AC17
D12
AE18
E12
AD18
F12
AC18
D13
AE19
E13
AD19
F13
AC19
D14
AE20
E14
AD20
F14
AC20
D15
AE21
E15
AD21
F15
R9112
33
AC21
AAD_GC0
AAD_GC1
N1
AAD_GC2
TXA0N
AAD_GC3
TXA0P
AAD_GC4
TXA1N
AAD_DATAEN
TXA1P
AAD_DATA0
TXA2N
AAD_DATA1
TXA2P
AAD_DATA2
TXACLKN
AAD_DATA3
TXACLKP
AAD_DATA4
TXA3N
AAD_DATA5
TXA3P
AAD_DATA6
TXA4N
AAD_DATA7
TXA4P
AAD_DATA8
TXB0N
AAD_DATA9
TXB0P
TXB1N
AUPLL_CLK
B10
AG16
A10
AH16
A11
AH17
B11
AG17
C12
AF18
C11
AF17
B12
AG18
A12
AH18
A13
AH19
B13
AG19
C14
AF20
C13
AF19
B14
AG20
A14
AH20
A15
AH21
B15
AG21
C16
AF22
C15
AF21
B16
AG22
A16
AH22
A17
AH23
B17
AG23
C18
AF24
C17
AF23
HSR_EP1
TXB1P
TXB2N
HS_RX1_AM
TXB2P
HS_RX1_AP
TXBCLKN
HS_RX1_BM
TXBCLKP
HS_RX1_BP
TXB3N
HS_RX1_CM
TXB3P
HS_RX1_CP
TXB4N
HS_RX1_CLKM
TXB4P
N2
P2
P1
P3
R3
R1
R2
T2
T1
T3
U3
U1
U2
V2
V1
V3
W3
W1
W2
Y2
Y1
Y3
AA3
SOC_TXA0N
SOC_TXA0P
SOC_TXA1N
SOC_TXA1P
SOC_TXA2N
SOC_TXA2P
SOC_TXACLKN
SOC_TXACLKP
SOC_TXA3N
SOC_TXA3P
SOC_TXA4N
SOC_TXA4P
SOC_TXB0N
SOC_TXB0P
SOC_TXB1N
SOC_TXB1P
SOC_TXB2N
SOC_TXB2P
SOC_TXBCLKN
SOC_TXBCLKP
SOC_TXB3N
SOC_TXB3P
SOC_TXB4N
SOC_TXB4P
HS_RX1_CLKP
HS_RX1_DM
HS_RX1_DP
HS_RX1_EM
L6
HS_RX1_EP
PWM0/GPIO55
HS_RX2_AM
PWM1/GPIO54
HS_RX2_AP
PWM2/GPIO53
HS_RX2_BM
PWM_IN
L5
M4
M5
OPT
EDGE_LED
R631
10K
R632
100
R633
100
HS_RX2_BP
HS_RX2_CM
HS_RX2_CP
HS_RX2_CLKM
HS_RX2_CLKP
HS_RX2_DM
HS_RX2_DP
HS_RX2_EM
HS_RX2_EP
AUAD_R_CH3_IN
100K
LG1152A
LG1152D
Place SOC Side
LG1152 B0
MAIN AUDIO/VIDEO
A_DIM
PWM_DIM2
PWM_DIM
BPL_IN
75K
C589
100pF
50V
Place JACK Side

THE
HSR_CP1
HSR_DP1
R519
R609
470K
EU
HSR_CM1
HSR_DM1
C504
L511
75K
AUAD_R_CH4_IN
R603
C577
100pF
50V
EU
AG6
G3
DCO_OUT_CLK
HSR_BM1
C576
330pF
50V
EU
G2
AUD_HMR0AMUTE
AUD_HMR0ASD0
AAD_DATA9
HSR_AP1
L507
AH6
STPI_DATA
CHB_CLK
AE26
BTSC_EN: ENABLE(1) (for development)
HSR_EM0
AUAD_R_CH5_IN
R515
R608
470K
C574
560pF
50V
OPT
75K
22K
G1
C9
DAC_DATA0
HSR_DP0
C501
AH4
AUDCLK_OUT
FE_TS_CLK
HSR_CLKP0
C573
560pF
50V
AF5
J1
A9
FS00CLK
AAD_DATA7
OPT
AG5
H3
CVBS_DN
AAD_DATA2
AUAD_L_CH5_IN
H2
A7
CLK_F54M
HSR_CP0
22K
AH5
CHB_DATA4
SC_L_IN
HDMI_RX2+
SPDIF_OUT_ARC
F17
R626
22K
2.2uF R508
AF3
H1
E6
CHB_DN
CHB_DATA0
HDMI_RX2-
R627
22K
C500
AF4
K3
L9DA_SDA_O
HDMI_CLK+
HDMI_RX1+
G16
L9DA_SCL
L9DA_SDA_I
SCART_Rout
E16
R625
100
L508
AV1_R_IN
TU_CVBS
SCART_Lout
BB_SCL
HSR_AM0
EU
470K
BB_SDA_I
BB_SDA_O
SCART_Rout_SOC
SC_R_IN
AV1_L_IN
BB_TP_CLK
AAD_DATA1
2.2uF
10V
EU
EU
R602
470K
BB_TP_ERR
TPO_CLK
CHB_ERR
EU
PC_R_IN
SC_L_IN
TPO_SOP
CHB_VAL
AUDA_OUTL
PC_L_IN
R607
BB_TP_SOP
JDVR_SCLK
R624
100
L506
470K
TPO_VAL
R6
AUDA_OUTR
470K
BB_TP_VAL
AAD_DATAEN
SCART_Lout_SOC
R601
BB_TP_DATA7
TPO_ERR
AAD_DATA0
C525
C522
TPI_CLK
R5
XIN_SUB
EU
SCART_Lout
BB_TP_DATA6
R7
T17
ADC_I_INCOM
TPI_SOP
CHB_DATA
P12
ANTCON
BB_TP_DATA2
AUAD_R_CH3_IN
PHY0_ARC_OUT_0
PB1_IN
BB_TP_DATA1
BB_TP_DATA3
1M
R6006
J3
AUD_MIC_LRCK
AUAD_L_CH3_IN
J18
SC1_FB
AUD_MIC_SCK
BB_TP_DATA0
HPD0
VSYNC
SCART_Rout_SOC
OPTIC_BACK_CHANNEL
R535
C513
EU
EU
100K
R549
EU
AUAD_L_CH5_IN
V3
AUD_ADC_LRCK
AUD_MIC_LRCH
R502
AAD_GC3
X-TAL_1
GND_1
SCART_AMP_R_FB
10K
25V 1uF
C6006
+12V
8pF
EU
24MHz
X500
Near Place Scart AMP

EU
100K
R554
EU
EU
100
T2
Main clock for LG1152A
DSUB_VSYNC
SCART_Rout
AUD_ADC_SCK
DSUB_HSYNC
C3626
5pF
50V
OPT
2.2uF
10V
AUD_ADC_LRCH
SCART_Lout_SOC
U2
AUMI_COM
DDCD0_CK
HSYNC
AUD_DAC0_SCK
R501
H/NIM&CHB
H/NIM&CHB
GND_2
C579
10pF
R606 1% 75
SC_SOG_IN
C578
10pF
CVBS_IN2
P8
R11
C580
10pF
AUAD_R_CH2_IN
BUF_OUT2
P11
SC_R
100
V2
E18
DSUB_VSYNC
SC_B
SC_G
C528
10pF
CVBS_IN1
DDCD0_DA
Close to LG1152A
DSUB_HSYNC
5.5V D506
AUAD_L_CH2_IN
U14
100 C551
68 C552
5.5V D505
AUAD_R_CH4_IN
AUAD_R_CH3_IN
OPT
R3633
2K
AUAD_L_CH4_IN
AUD_DAC0_LRCH
AUDA_OUTR
T1
EU
AUAD_L_CH3_IN
R572
100K
R552
EU
L9A_SCL
AUD_DAC0_LRCK
C558
1000pF
OPT
2.2uF
AUDA_OUTL
R2
U3
AUAD_R_CH5_IN
L9A_SDA
EU
R524
2.7K
NON SCART
R524-*1
C536
R1
AUDCLK_OUT_SUB
TUNER_SIF
10uF
AUD_SCART0_OUTRP
AUAD_L_CH5_IN
L501
5.5V D503
AUD_SCART0_OUTLN
PORES_N
R573
R559
C3625
5pF
50V
OPT
AUDA_OUTR
OPM0
N3
DSUB_B+
OPT
R3634
2K
AUDA_OUTL
OPM1
AUD_SCART0_OUTRN
R571
DSUB_R+
AUDA_BGR_OUT
AUD_SCART0_OUTLP
10K EU
75
U1
XTLOUT_AAD
100
EU
R525
XTLIN_AAD
R4
SC_FB
R522
C535
0.01uF
K18
AAD_ADC_SIF
VSB_AUX_XIN
EU
K17
XO_SUB
0.01uF
P17
0.1uF
C520
EU
C521
33
C534
AUD_FS20CLK
22K
R561
N18
0.1uF
22K
L18
C533
EU
330
AAD_ADC_SIFM
R531
XO_SUB
R560
N17
XIN_SUB
EU
L17
XIN_SUB
AUD_FS21CLK
R532
680pF
C517
OPT
R613
75
1%
NON SCART
R525-*1
AUD_FS25CLK
AUD_FS24CLK
R617
75
OPT
AUD_DAC1_LRCK
E
OPT
CHB_CVBS
AG4
AUD_HMR0ARC
==> A = B0
AUD_DAC1_LRCH
Q505
CHB
AG3
J2
AUD_HMR0ASD0
+5V_TU
R618
220
CHB
STPI_ERR
AH3
K2
47CHB AR102
AE27
INTR_GBB
2.2uF
C559
OPT
+5V_NORMAL
Place these close to tuner
IC700
H5TQ2G83BFR-PBC
IC703
H5TQ2G83BFR-PBC
M0_DDR_VREFCA
VCC1.5V_MAIN
M0_DDR_DQ7
M0_DDR_DQ8
M0_DDR_DQ9
M0_DDR_DQ10
M0_DDR_DQ11
M0_DDR_DQ12
M0_DDR_DQ13
M0_DDR_DQ14
M0_DDR_DQ15
A20
G2
M0_DDR_ODT
M0_DDR_RASN
200
M0_DDR_CASN
F4
G4
H4
M0_DDR_WEN
0.1uF
C710
0.1uF
M2
C711
0.1uF
M10
C712
0.1uF
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
E10
ODT
RAS
CAS
A1
M0_DDR_DML
M0_DDR_DQ1
C21
A8
R730
VSS_1
VSS_2
M0_DDR_DQ5
B21
M0_DDR_DQ6
A19
D3
M0_DDR_DQ2
M0_DDR_DQ10
B14
E9
M0_DDR_DQ3
M0_DDR_DQ9
A16
E4
M0_DDR_DQ4
M0_DDR_DQ8
C14
C9
M0_DDR_DQ7
M0_DDR_DQ7
B17
C3
M0_DDR_DQ6
E8
M0_DDR_DQ5
B15
C17
A15
SIGN50005
VSS_7
DQ1
VSS_8
DQ2
VSS_9
DQ3
VSS_10
DQ4
VSS_11
DQ5
VSS_12
M0_DDR_DQ13
F2
M0_DDR_DQ14
F10
H2
M0_DDR_DQ15
R704
240
H10
1%
J8
0.1uF
1000pF
M0_DDR_DMU
VSSQ_3
NC_3
VSSQ_4
NC_4
VSSQ_5
M3
N9
M4
H8
M8
K8
N4
N8
K9
J4
J2
M0_DDR_DQ10
J10
M0_DDR_DQ13
L2
M0_DDR_DQ14
L10
M0_DDR_DQ11
N2
M0_DDR_DQ15
N10
M0_DDR_DQ9
M0_DDR_DQ12
B9
G10
G2
F4
G4
H4
D4
E13
D12
C12
C11
M1_DDR_DQSL_N
A7
B7
M1_DDR_DQSU_N
A11
C6
M1_DDR_DMU
A12
M1_DDR_DQ0
M1_DDR_DQ1
M1_DDR_DQ2
M1_DDR_DQ3
M1_DDR_DQ4
M1_DDR_DQ5
M1_DDR_DQ6
M1_DDR_DQ7
M1_DDR_DQ8
M1_DDR_DQ9
M1_DDR_DQ10
M1_DDR_DQ11
M1_DDR_DQ12
M1_DDR_DQ13
M1_DDR_DQ14
M1_DDR_DQ15
VDD_3
A12/BC
VDD_4
A13
VDD_5
A14
VDD_6
B11
A13
C10
B12
A10
B13
B10
A8
B4
C8
B5
B6
A5
B8
A6
R707
M1_DDR_BA0
M1_DDR_BA1
200
M1_DDR_BA1
M1_DDR_BA2
M1_DDR_CLK
M1_DDR_CLKN
J4
M1_DDR_BA2
BA0
G10
M1_DDR_CKE
0.1uF
0.1uF
C715
0.1uF
M1_DDR_CLK
M1_DDR_RASN
M1_DDR_CASN
R708
M1_DDR_WEN
200
G2
M1_DDR_ODT
F4
M1_DDR_RASN
G4
M1_DDR_CASN
H4
M1_DDR_WEN
M1_DDR_RESET_N
VDDQ_2
VDDQ_3
CKE
VDDQ_4
K2
C716
0.1uF
K10
C717
0.1uF
M2
C718
0.1uF
M10
C719
0.1uF
M1_DDR_RESET_N
E10
CAS
A1
NC_S1
0.1uF
1000pF
1%
R734
M1_DDR_CLK
M1_DDR_CLKN
M1_DDR_CKE
M2
C723
0.1uF
C760
0.1uF
C751
0.1uF
M10
BA1
B10
VDDQ_1
CK
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
C761
0.1uF
C756
0.1uF
C2
E3
E10
CS
ODT
RAS
CAS
A1
NC_S1
NC_S2
A11
N1
N11
NC_S4
DQS
B8
A8
A2
DM/TDQS
VSS_1
NF/TDQS
VSS_2
VSS_6
B4
C8
C3
C9
E4
E9
D3
E8
DQ0
VSS_7
DQ1
VSS_8
DQ2
VSS_9
DQ3
VSS_10
DQ4
VSS_11
DQ5
VSS_12
A9
B2
D9
F3
F9
J2
J10
L2
L10
N2
N10
DQ6
DQ7
B3
VSSQ_1
NC_1
VSSQ_2
NC_2
VSSQ_3
NC_3
VSSQ_4
NC_4
VSSQ_5
B9
C10
D2
D10
NC_5
K4
L8
L4
K3
L9
L3
M9
M3
N9
M4
H8
M8
K8
N4
N8
A0
DDR3
2Gbit
M1_1_DDR_VREFCA
J9
VREFCA
A1
A2
A3
E2
VREFDQ
A4
A5
A6
H9
A3
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
A13
VDD_5
A14
VDD_6
VDD_8
J4
BA0
C757
0.1uF
D8
G3
C752
0.1uF
G9
C753
0.1uF
K2
K10
C754
0.1uF
M2
M10
C755
0.1uF
B10
C745
0.1uF
C759
0.1uF
VDD_9
BA2
G10
A10
BA1
VDDQ_1
F8
G8
VCC1.5V_MAIN
240
1%
A8
J3
K9
R740
ZQ
A7
CK
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
C2
E3
E10
H3
M1_DDR_ODT
M1_DDR_RASN
M1_DDR_CASN
M1_DDR_WEN
M1_DDR_RESET_N
G2
F4
G4
H4
CS
ODT
RAS
CAS
WE
A1
NC_S1
N3
RESET
NC_S2
NC_S3
N11
NC_S4
C4
M1_DDR_DQSL_N
M1_DDR_BA2
M1_1_DDR_VREFDQ
N1
NC_S3
M1_DDR_DQSU_P
M1_DDR_BA1
A11
NC_S2
M1_DDR_DQSL_N
VCC1.5V_MAIN
M1_DDR_VREFDQ
E3
RAS
M1_DDR_DQSL_P
D4
K2
K10
VDD_9
BA0
VDD_7
M1_DDR_BA0
ODT
RESET
M1_DDR_DQSL_P
R735
M1_DDR_A14
CS
N3
1K
M1_DDR_A12
C2
WE
M1_DDR_CLKN
1000pF
0.1uF
M1_DDR_A11
B10
VDDQ_1
CK
M1_DDR_A9
M1_DDR_A10
VCC1.5V_MAIN
CK
M1_DDR_A8
M1_DDR_A13
H3
M1_DDR_ODT
1K 1%
R726
1K 1%
1%
R727
C713
C714
G9
VDD_9
BA2
G8
G3
BA1
F8
M1_DDR_CLK
M1_DDR_CLKN
M1_DDR_CKE
M1_DDR_DQSU_N
D8
VDD_8
J3
K9
M1_DDR_CLKN
0
A10
M1_DDR_A6
M1_DDR_A7
C749
VDD_2
A11
C734
VDD_1
A10/AP
C730
A9
1K
A3
VDD_7
M1_DDR_BA0
G9
DQS
M1_DDR_DQSU_P
DQS
M1_DDR_DQSU_N
D4
A11
N1
N11
NC_S4
C4
DQS
DQS
M1_DDR_CKE
B8
M1_DDR_DML
A8
M1_DDR_DML
M1_DDR_DMU
A2
DM/TDQS
VSS_1
NF/TDQS
VSS_2
R741
VSS_3
10K
VSS_4
M1_DDR_DQ0
M1_DDR_DQ2
M1_DDR_DQ0
M1_DDR_DQ3
M1_DDR_DQ1
M1_DDR_DQ4
M1_DDR_DQ6
M1_DDR_DQ5
M1_DDR_DQ7
M1_DDR_DQ6
M1_DDR_DQ4
M1_DDR_DQ7
M1_DDR_DQ3
M1_DDR_DQ8
M1_DDR_DQ2
M1_DDR_DQ9
M1_DDR_DQ5
C8
C3
C9
E4
E9
D3
E8
DQ0
VSS_7
DQ1
VSS_8
DQ2
DQ3
VSS_10
VSS_11
DQ5
VSS_12
F2
F10
M1_DDR_DQ13
H2
M1_DDR_DQ14
H10
M1_DDR_DQ15
J8
VSS_4
VSS_5
J2
M1_DDR_DQ10
J10
M1_DDR_DQ13
L2
M1_DDR_DQ14
L10
M1_DDR_DQ11
N2
M1_DDR_DQ15
N10
M1_DDR_DQ9
M1_DDR_DQ8
M1_DDR_DQ12
B3
VSSQ_1
A4
M1_DDR_DQ12
NC_1
VSSQ_2
NC_2
VSSQ_3
NC_3
VSSQ_4
NC_4
VSSQ_5
B9
D10
M2_DDR_A4
M2_DDR_A5
M2_DDR_A6
M2_DDR_A7
M2_DDR_A8
M2_DDR_A9
M2_DDR_A10
M2_DDR_A11
M2_DDR_A12
D2
E5
H6
E4
J4
D6
J5
D3
H4
J6
K5
D4
M2_DDR_A13
M2_DDR_A4
M2_DDR_A5
M2_DDR_A1
M2_DDR_A2
M2_DDR_A6
M2_DDR_A3
M2_DDR_A7
M2_DDR_A4
M2_DDR_A8
M2_DDR_A5
M2_DDR_A9
M2_DDR_A10
M2_DDR_A6
M2_DDR_A11
M2_DDR_A7
M2_DDR_A8
M2_DDR_A12
M2_DDR_A9
M2_DDR_A13
VCC1.5V_DE
M2_DDR_CKE
M2_DDR_BA1
H5
F4
M2_DDR_BA2
R743
R714
10K
M2_DDR_BA0
M2_DDR_BA1
M2_DDR_BA2
M2_DDR_BA0
M2_DDR_RESET_N
M2_DDR_BA1
M2_DDR_CLK
M2_DDR_BA2
M2_DDR_CKE
F6
M2_DDR_ODT
M2_DDR_RASN
M2_DDR_CASN
M2_DDR_CLK
M3
G6
G5
G4
F5
M2_DDR_WEN
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
150
A3
M2_DDR_CASN
M2_CLKN
M2_DDR_WEN
M2_DDR_CASN
M2_DDR_RESET_N
M2_DDR_WEN
M2_DDR_RESET_N
M2_DDR_DQSL_P
H3
M2_DDR_DQSU_P
J1
M2_DDR_DQSU_N
M2_DDR_DQSU_P
M2_DDR_CLK
R716
M2_CLK
M2_DDR_DQSU_N
M2_DDR_CLKN
R717
M2_CLKN
M2_DDR_DQSL_N
M2_DDR_DQSU_P
H1
M2_DDR_DQSL_P
H2
M2_DDR_DQSL_N
M2_DDR_DQSU_N
M2_DDR_DQSL_P
M2_DDR_DQSL_N
M2_DDR_DML
K3
M2_DDR_DML
F2
M2_DDR_DMU
M2_DDR_DMU
M2_DDR_DML
M2_DDR_DMU
M2_DDR_DQ0
M2_DDR_DQ13
M2_DDR_DQ14
M2_DDR_DQ15
M2_DDR_ZQCAL
G2
K1
G3
K6
R718
1K 1%
M2_DDR_DQ8
M2_DDR_DQ9
M2_DDR_DQ10
M2_DDR_DQ11
M2_DDR_DQ12
M2_DDR_DQ13
M2_DDR_DQ14
M2_DDR_DQ15
R711
240
0.1uF
M2_DDR_DQ9
1000pF
J2
M2_DDR_DQ8
1%
F3
M2_DDR_DQ7
M2_DDR_DQ6
M2_DDR_DQ7
C703
M2_DDR_DQ12
K2
R719
M2_DDR_DQ11
G1
M2_DDR_DQ6
1K
M2_DDR_DQ10
J3
M2_DDR_DQ5
M2_DDR_VREFDQ
C702
M2_DDR_DQ9
M2_DDR_VREFCA
0.1uF
M2_DDR_DQ8
M2_DDR_DQ5
M2_DDR_DQ4
1000pF
M2_DDR_DQ7
L3
M2_DDR_DQ4
M2_DDR_DQ3
C701
M2_DDR_DQ6
E2
M2_DDR_DQ3
VCC1.5V_DE
VCC1.5V_DE
R712
M2_DDR_DQ5
M1
M2_DDR_DQ2
1K 1%
M2_DDR_DQ4
E1
M2_DDR_DQ2
1%
M2_DDR_DQ3
L2
M2_DDR_DQ1
R713
M2_DDR_DQ2
L1
E3
M2_DDR_DQ1
1K
M2_DDR_DQ1
M2_DDR_DQ0
C700
F1
M2_DDR_DQ0
VSS_9
DQ3
VSS_10
DQ4
VSS_11
DQ5
VSS_12
K9
K1
J3
K3
L3
M2_DDR_DQ10
M2_DDR_DQ11
M2_DDR_DQ12
M2_DDR_DQ13
M2_DDR_DQ14
M2_DDR_DQ15
J10
L10
N2
N10
DQ6
DQ7
B3
VSSQ_1
NC_1
VSSQ_2
NC_2
VSSQ_3
NC_3
VSSQ_4
NC_4
VSSQ_5
B9
C10
D2
D10
NC_5
M2_DDR_VREFDQ
A4
A5
A6
L8
ZQ
R738
SIGN50000
VCC1.5V_DE
240
A7
A8
B2
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
A13
VDD_5
VDD_6
VDD_7
VDD_8
BA0
D9
G7
C722
C704
0.1uF
0.1uF
K2
C705
0.1uF
K8
C720
0.1uF
N1
C721
0.1uF
N9
R1
R9
VDD_9
BA1
A1
VDDQ_1
CK
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
WE
RESET
NC_2
NC_4
F3
DQSL
A8
C1
C736
C737
0.1uF
0.1uF
C9
C738
0.1uF
D2
C739
0.1uF
E9
C740
0.1uF
F1
C741
0.1uF
H2
C742
0.1uF
H9
C743
C744
J1
NC_1
T2
G3
J2
L2
H1
NC_3
D5
M2_DDR_RESET_N
DQ2
F9
VREFDQ
BA2
K7
M2_DDR_RASN
M2_DDR_RASN
M3
J7
M2_DDR_ODT
M2_DDR_ODT
VSS_8
F3
VREFCA
A2
L2
R715
M2_DDR_CKE
N8
M2_CLK
M2_CLK
M2_DDR_CLKN
DQ1
D9
A1
M2
M2_CLKN
M2_DDR_CKE
M2_DDR_CLKN
P7
A15
M2_DDR_A12
M2
E8
VSS_7
B2
M2_DDR_VREFCA
M8
A0
M7
10K
E6
M2_DDR_BA0
N3
M2_DDR_A11
M2_DDR_A13
D3
DQ0
A9
NC_6
IC702
H5TQ1G63DFR-PBC
M2_DDR_A0
M2_DDR_A10
E9
J8
M2_DDR_A1
K4
E4
H10
NC_5
M2_DDR_A0
D1
C9
H2
M2_DDR_A3
M2_DDR_A3
C3
F10
M2_DDR_A2
M2_DDR_A2
C8
F2
D2
IC100
LG1152D-B1
M2_DDR_A1
VSS_6
B4
A4
C10
NC_6
M2_DDR_A0
VSS_2
F9
DQ7
M1_DDR_DQ11
VSS_1
VSS_3
DQ6
M1_DDR_DQ10
A2
DM/TDQS
NF/TDQS
F3
VSS_9
DQ4
A8
D9
VSS_6
B4
B8
B2
VSS_5
M1_DDR_DQ1
M1_DDR_DMU
A9
J9
L1
L9
T7
0.1uF
10uF 10V
DDR3 1.5V bypass Cap - Place these caps near Memory
C13
F11
M1_DDR_DML
240
1%
A8
0.1uF
D7
M1_DDR_WEN
M1_DDR_DQSU_P
ZQ
A7
M1_DDR_A5
1000pF
A9 R702
B9 R703
M1_DDR_RESET_N
M1_DDR_DQSL_P
N8
A6
VCC1.5V_MAIN
R721
H9
C750
M1_DDR_CASN
M1_DDR_A14
N4
A5
R736
D9
D13
M1_DDR_ODT
M1_DDR_A13
K8
M1_DDR_A2
M1_DDR_A3
M1_DDR_A4
A4
M1_DDR_CLK
F7
M1_DDR_CKE
M1_DDR_RASN
M8
E2
VREFDQ
A3
M1_DDR_A0
M1_DDR_A1
1K 1%
M1_DDR_CLK
H8
A2
M1_DDR_A14
M1_DDR_BA2
M1_DDR_CLKN
M1_DDR_A13
M1_DDR_VREFCA
VREFCA
A1
1%
C7
M1_DDR_A12
VDD_8
0.1uF
0.1uF
G3
M1_1_DDR_VREFDQ
M1_1_DDR_VREFCA
R737
E10
E12
M1_DDR_BA1
M1_DDR_A9
M1_DDR_A11
M1_DDR_A11
M1_DDR_A12
A0
J9
1K
D8
M4
M1_DDR_A10
M1_DDR_RESET_N
M1_DDR_A10
C5
N9
M1_DDR_A8
M1_DDR_A9
C4
M1_DDR_A14
M1_DDR_BA0
M1_DDR_A8
10K
DDR3
2Gbit
C735
M1_DDR_A13
R710
VDD_6
C758
C746
D8
IC704
H5TQ2G83BFR-PBC
1000pF
M1_DDR_A12
D10
M3
M1_DDR_A7
M1_DDR_A7
A14
A10
VCC1.5V_MAIN
M1_DDR_VREFDQ
0.1uF
M1_DDR_A9
M1_DDR_A11
E7
M9
M1_DDR_A6
M1_DDR_A6
E11
L3
VDD_5
DQS
M1_DDR_VREFCA
C731
M1_DDR_A8
M1_DDR_A10
M1_DDR_A5
E8
L9
M1_DDR_A4
M1_DDR_A5
VCC1.5V_MAIN
A13
NC_6
C726
M1_DDR_A7
M1_DDR_A4
D11
K3
M1_DDR_A3
M1_DDR_A3
F8
VDD_4
C4
J8
R728
M1_DDR_A6
M1_DDR_A2
M1_DDR_A2
F12
VDD_3
A12/BC
RESET
H10
1K 1%
M1_DDR_A5
M1_DDR_A1
F10
VDD_2
A11
WE
H2
D10
1%
M1_DDR_A4
VDD_1
A10/AP
N3
F10
R729
M1_DDR_A3
A3
A9
BA2
F2
D2
1K
M1_DDR_A2
L4
A8
A4
C10
C727
M1_DDR_A1
L8
M1_DDR_A1
240
1%
A7
F8
G8
VCC1.5V_MAIN
R739
ZQ
F9
NC_5
K4
M1_DDR_A0
M1_DDR_A0
H9
A6
VSS_5
VCC1.5V_MAIN
E9
A5
VSS_4
IC701
H5TQ2G83BFR-PBC
C9
M1_DDR_A0
VREFDQ
A4
J3
NC_6
IC100
LG1152D-B1
E2
A3
F3
VSSQ_1
VSSQ_2
M9
J9
VREFCA
VSS_3
B3
NC_2
L3
DDR3
2Gbit
A2
D9
M0_DDR_DQ8
NC_1
L9
A0
A1
NC_S3
DQ6
A4
M0_DDR_DQ12
A14
DQ0
K3
B2
DQ7
M0_DDR_DQ11
M0_DDR_RESET_N
A9
VSS_6
B4
L4
N11
VSS_5
C8
M0_DDR_WEN
A2
DM/TDQS
VSS_4
M0_DDR_DQ1
M0_DDR_CASN
M0_DDR_DQSU_N
NF/TDQS
L8
H3
M0_DDR_ODT
M0_DDR_RASN
DQS
VSS_3
M0_DDR_DQ4
C18
M0_DDR_CKE
M0_DDR_DQSU_P
10K
M0_DDR_DQ0
M0_DDR_CLKN
DQS
R742
M0_DDR_DQ3
A21
C747
M0_DDR_CLK
NC_S4
M0_DDR_DQ2
B18
M0_DDR_BA2
M0_1_DDR_VREFDQ
N1
B8
M0_DDR_DML
M0_DDR_CKE
M0_DDR_DMU
M0_DDR_DQ0
B19
D4
M0_DDR_BA1
A11
NC_S2
C4
M0_DDR_DQSL_N
1%
R731
VCC1.5V_MAIN
M0_DDR_VREFDQ
E3
NC_S1
K4
VDD_7
C2
NC_S3
M0_DDR_DQSU_N
1K
M0_DDR_A14
M0_DDR_BA0
CS
RESET
C732
0.1uF
1000pF
C728
1%
M0_DDR_A13
B10
VDDQ_1
CK
N3
M0_DDR_DQSL_P
1K 1%
1K 1%
R722
C709
K10
M0_DDR_A12
VCC1.5V_MAIN
WE
M0_DDR_RESET_N
M0_DDR_DQSU_P
C15
E22
0.1uF
BA1
M0_DDR_DQSL_N
C16
M0_DDR_ZQCAL
G10
C708
M0_DDR_A9
M0_DDR_A10
M0_DDR_A11
H3
M0_DDR_CLK
R706
M0_DDR_DQSL_P
C20
M0_DDR_DQ6
M0_DDR_CLKN
M0_DDR_CLKN
M0_DDR_DMU
M0_DDR_DQ5
G8
0.1uF
VDD_9
F8
M0_DDR_CLK
0.1uF
C707
K2
VDD_8
BA0
BA2
M0_DDR_CLKN
M0_DDR_RESET_N
C19
M0_DDR_DQ4
J4
M0_DDR_BA2
M0_DDR_CLK
M0_DDR_CLKN
M0_DDR_WEN
M0_DDR_DQSU_N
M0_DDR_DQ3
M0_DDR_BA1
M0_DDR_CASN
D21
B16
M0_DDR_DQ2
200
C706
G3
G9
VDD_6
A14
J3
K9
M0_DDR_RASN
E21
M0_DDR_DQSL_N
M0_DDR_DQ1
VDD_5
D8
0.1uF
D22
B20
M0_DDR_DQ0
M0_DDR_BA0
M0_DDR_CKE
E19
M0_DDR_DML
A13
A10
M0_DDR_ODT
M0_DDR_RESET_N
M0_DDR_DQSU_P
VDD_4
VDD_7
R705
M0_DDR_CKE
M0_DDR_WEN
M0_DDR_DQSL_P
VDD_3
A12/BC
1000pF
VDD_2
A11
M0_DDR_A7
M0_DDR_A8
C748
R701
F15
VDD_1
A10/AP
R732
R700
A18
A3
A9
M0_DDR_A5
M0_DDR_A6
1K 1%
A17
A8
1%
M0_DDR_CASN
N8
M0_DDR_A14
240
1%
A7
M0_DDR_CLK
M0_DDR_BA2
F21
M0_DDR_RASN
N4
M0_DDR_A13
M0_DDR_BA1
F17
M0_DDR_CKE
M0_DDR_ODT
K8
ZQ
R733
M0_DDR_CLK
M8
M0_DDR_A12
M0_DDR_BA0
D15
M0_DDR_BA2
M0_DDR_CLKN
H8
M0_DDR_A11
M0_DDR_A13
M0_DDR_A14
D16
M4
M0_DDR_A9
M0_DDR_A10
M0_DDR_RESET_N
M0_DDR_A12
F18
F20
M0_DDR_BA1
10K
M0_DDR_A11
D17
M0_DDR_A14
M0_DDR_BA0
M0_DDR_A9
M0_DDR_A10
E14
N9
M0_DDR_A8
VCC1.5V_MAIN
R720
H9
A6
1K
M0_DDR_A13
D14
R709
M0_DDR_A3
M0_DDR_A4
A5
0.1uF
M0_DDR_A12
M3
M0_DDR_A7
M0_DDR_A8
VREFDQ
M0_DDR_A2
A4
1000pF
M0_DDR_A11
D19
E2
A3
M0_DDR_A0
M0_DDR_A1
C729
M0_DDR_A9
M0_DDR_A10
M0_DDR_A7
E15
M9
M0_DDR_A6
M0_1_DDR_VREFDQ
M0_1_DDR_VREFCA
M0_DDR_VREFCA
R723
M0_DDR_A8
L3
M0_DDR_A5
VCC1.5V_MAIN
M0_DDR_A6
F19
L9
M0_DDR_A4
M0_DDR_A5
F16
K3
M0_DDR_A3
M0_DDR_A4
D20
J9
VREFCA
A2
1K
M0_DDR_A7
M0_DDR_A3
E16
A0
A1
C724
M0_DDR_A6
L4
M0_DDR_A2
R724
M0_DDR_A5
L8
M0_DDR_A1
M0_DDR_A2
1%
M0_DDR_A4
K4
M0_DDR_A0
M0_DDR_A1
E18
E20
R725
M0_DDR_A3
M0_DDR_A0
E17
1K
M0_DDR_A2
C725
M0_DDR_A1
M0_1_DDR_VREFCA
VCC1.5V_MAIN
M0_DDR_VREFDQ
1K 1%
D18
M0_DDR_A0
DDR3
2Gbit
C733
IC100
LG1152D-B1
NC_6
DQSL
C7
B7
A9
DQSU
VSS_1
DQSU
VSS_2
VSS_3
E7
D3
DML
VSS_4
DMU
VSS_5
VSS_6
E3
F7
F2
F8
H3
H8
G2
H7
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
C2
A7
A2
B8
A3
J2
J8
M1
M9
P1
P9
T1
T9
B1
VSSQ_1
D7
C8
E1
G8
DQL6
DQL7
C3
B3
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
D1
D8
E2
E8
F9
G1
G9
1%
THE
LG1152 B0
MAIN DDR
50
+5V_CI_ON
CI HOST I/F
5V <=> 3.3V
CI_DATA[0-7]
R6209
10K
OPT
+3.3V_NORMAL
CI_TS_DATA[3]
35
GND
36
DAT3
CI_DATA[3]
37
DAT4
CI_DATA[4]
TS_OUT4
38
DAT5
CI_DATA[5]
TS_OUT5
39
DAT6
CI_DATA[6]
CI_DATA[7]
CI R6224
CI_TS_DATA[4]
R6206
10K
OPT
R6204
10K
OPT
CI_TS_DATA[5]
CI_TS_DATA[6]
CI_TS_DATA[7]
/PCM_CE2
CI_VS1
/PCM_IORD
/PCM_IOWR
R6249
0
OPT
/PCM_WAIT
PCM_INPACK
R6202
R6203
22 CI
22 CI
R6200
22 OPT
ADDR10
43
/O_EN
44
10
ADDR11
11
ADDR10
46
12
ADDR8
CI_IN_TS_DATA[0]
TS_IN0
47
13
ADDR13
CI_IN_TS_DATA[1]
TS_IN1
48
14
ADDR14
CI_IN_TS_DATA[2]
TS_IN2
49
15
/WR_EN
CI_IN_TS_DATA[3]
TS_IN3
50
16
/IRQA
VCC
51
17
VCC
VPP
52
18
VPP
TS_IN4
53
19
TS_IN_VAL
CI_IN_TS_DATA[5]
TS_IN5
54
20
TS_IN_CLK
CI_IN_TS_DATA[6]
TS_IN6
55
21
ADDR12
R6213
CI_IN_TS_DATA[7]
TS_IN7
56
22
ADDR7
TS_OUT_CLK
57
23
ADDR6
CI_RESET
58
24
ADDR5
CI_WAIT
22
CI_ADDR[10]
CI_ADDR[10]
CI_ADDR[11]
CI_ADDR[11]
CI_ADDR[9]
CI_ADDR[8]
CI_ADDR[13]
CI_ADDR[13]
CI_ADDR[14]
R6243
C6205
R6216
0.1uF
CI
CI
C6206
0.1uF
16V
CI_ADDR[14]
A1
CI_DATA[3]
A3
CI_DATA[4]
33
CI
AR910
A4
CI_DATA[6]
A5
CI_DATA[7]
CI_ADDR[12]
CI_ADDR[7]
CI_ADDR[6]
CI_ADDR[5]
19
18
17
VCC
CI
16V
0
R913
OE
/PCM_CE1
B0
16
CI
15
EB_DATA[0]
B1
EB_DATA[1]
B2
EB_DATA[2]
B3
EB_DATA[3]
B4
CI_ADDR[12]
A6
CI_ADDR[7]
14
EB_DATA[4]
13
B5
EB_DATA[5]
B6
EB_DATA[6]
B7
EB_DATA[7]
CI_ADDR[6]
A7
CI_ADDR[5]
ADDR4
CI_ADDR[4]
ADDR3
CI_ADDR[3]
ADDR2
CI_ADDR[2]
62
28
ADDR1
CI_ADDR[1]
TS_OUT_SYN
63
29
ADDR0
CI_ADDR[0]
TS_OUT0
64
30
DAT0
CI_DATA[0]
TS_OUT1
65
31
DAT1
CI_DATA[1]
TS_OUT2
66
32
DAT2
CI_DATA[2]
R6215 CI 100 /CI_DET2

GND
67
33
/IO_BIT
68
34
GND
R6217
20
CI_DATA[5]
OPT
27
69
CI_DATA[2]
R6246
10K
OPT
/PCM_IRQA
26
G2
A0
CI_DATA[1]
/PCM_WE
25
R6210 0
33
CI_DATA[0]
CI
AR909
A2
R6244
10K
CI
22
OPT
61
/PCM_CE2
+5V_CI_ON
CI_ADDR[9]
CI_ADDR[8]
60
CI_TS_DATA[1]
R6245
10K
OPT
/PCM_OE
59
CI_TS_DATA[0]
DIR
+5V_CI_ON
INPACK
CI_TS_SYNC
CI_TS_DATA[2]
/CI_CD2
0
OPT
DIR
REG
0 CI
TS_OUT_VAL
R6212
CI_TS_VAL
PCM_INPACK
/CARD_EN1
45
/PCM_REG
CI_VS1
42
IORD
CI_TS_CLK
PCM_RST
41
IOWR
CI_IN_TS_DATA[4]
R6207
10K
CI
TS_OUT7
CARD_EN2
TS_IN_SYN
+5V_CI_ON
R6205
10K
OPT
40
DAT6
VS1
CI_IN_TS_DATA[0-7]
R6211
10K
OPT
TS_OUT6
IC904
74LVC245A
/PCM_CE1
GND
100 /CI_DET1
CI TS_OUT3
EB_DATA[0-7]
R6214
/CI_CD1
R6219
10K
OPT
OPT
P6200
10067972-000LF CI
C904
R6208
10K
OPT
0.1uF
+5V_CI_ON
C6201
10uF
10V
CI
CI_DATA[0-7]
C6200
0.1uF
CI
CI_ADDR[4]
12
10
11
CI_DATA[0-7]
CI_ADDR[3]
GND
CI_ADDR[2]
CI_ADDR[1]
CI_ADDR[0]
EB_DATA[0-7]
+5V_CI_ON
10K
+3.3V_NORMAL
OPT
IC905
74LVC1G00GW
G1
OPT
1
GND
VCC
IOWE=>IORD
C903
CI
16V
/PCM_IORD
CI_IN_TS_SYNC
0.1uF
CI_IN_TS_VAL
CI_IN_TS_CLK
B
/PCM_OE
WE=>OE
DIR
CI
AND GATE => NAND GATE
33
TPO_DATA[1]
CI_IN_TS_DATA[1]
TPO_DATA[2]
CI_IN_TS_DATA[2]
TPO_DATA[3]
CI_IN_TS_DATA[3]
TPO_DATA[4]
TPO_DATA[7]
TPO_SOP
TPO_VAL
33
CI_ADDR[13]
EB_ADDR[13]
EB_ADDR[2]
CI_ADDR[14]
EB_ADDR[14]
CI_ADDR[3]
EB_ADDR[3]
33
CI_ADDR[5]
EB_ADDR[5]
CI_ADDR[6]
EB_ADDR[6]
CI_ADDR[7]
EB_ADDR[7]
CI
AR903
CI_IN_TS_CLK
33
CI_ADDR[8]
EB_ADDR[4]
EB_ADDR[11]
BUFFER FOR 5V => 3.3V

IC903
74LVC16244ADGG
+5V_NORMAL
10K
10K
R916 CI
R915 CI
1A1
/PCM_IRQA
GND_8
1A2
/CI_CD2
1A3
/CI_CD1
VCC_4
CI
C905
0.1uF
16V
CI
C906
0.1uF
16V
2A0
AR921 CI
2A1
PCM_INPACK
GND_7
CI_TS_CLK
CI_TS_VAL
100
CI_TS_SYNC
2A2
2A3
3A0
AR920 CI
3A1
CI_TS_DATA[7]
GND_6
CI_TS_DATA[6]
CI_TS_DATA[5]
CI_TS_DATA[4]
100
3A2
3A3
VCC_3
4A0
AR919 CI
4A1
CI_TS_DATA[3]
GND_5
CI_TS_DATA[2]
CI_TS_DATA[1]
CI_TS_DATA[0]
100
4A2
4A3
3OE
EB_BE_N1
EB_BE_N0
48
47
46
45
44
43
42
41
40
39
10
38
11
37
36
12
CI
13
35
14
34
15
33
16
32
17
31
18
30
19
29
20
28
21
27
22
26
23
25
24
1OE
+3.3V_NORMAL
CI
16V
1Y0
1Y1
CAM_WAIT_N
CAM_IREQ_N
GND_1
1Y2
1Y3
VCC_1
CAM_CD2_N
CAM_CD1_N
TPI_CLK
2Y0
CAM_INPACK_N
TPI_VAL
2Y1
CI
GND_2
TPI_SOP
2Y2
AR918 75
2Y3
3Y0
TPI_DATA[7]
3Y1
TPI_DATA[6]
GND_3
3Y2
TPI_DATA[5]
3Y4
TPI_DATA[4]
VCC_2
75 CI AR917
4Y0
TPI_DATA[3]
4Y1
TPI_DATA[2]
GND_4
4Y2
TPI_DATA[1]
4Y3
TPI_DATA[0]
4OE
AR916 75
THE
EB_OE_N
EB_WE_N
/PCM_WE
/PCM_IORD
/PCM_IOWR
EB_ADDR[9]
EB_ADDR[10]
CI_ADDR[11]
/PCM_WAIT
CI
AR914
EB_ADDR[8]
CI_ADDR[9]
1A0
33
/PCM_OE
CI
AR913
CI_ADDR[10]
2OE
CAM_REG_N
/PCM_REG
CI
AR912
CI_ADDR[4]
CI_IN_TS_SYNC
CI_IN_TS_VAL
EB_ADDR[12]
EB_ADDR[1]
CI_ADDR[2]
CI_IN_TS_DATA[7]
TPO_ERR
CI
AR915
CI_ADDR[1]
CI_IN_TS_DATA[6]
AR905 CI
33
33
CI_ADDR[12]
CI_IN_TS_DATA[5]
TPO_DATA[6]
CI
AR911
EB_ADDR[0]
CI_IN_TS_DATA[4]
TPO_DATA[5]
TPO_CLK
33
CI_ADDR[0]
CI_IN_TS_DATA[0]
C900
CI
AR904
TPO_DATA[0]
0.1uF
TPO_DATA[0-7]
CI
C2307
0.1uF
16V
GND
GND
GND
10
3.5V
3.5V
11
12
3.5V
14
GND
GND
13
C2317
0.1uF
50V
GND
15
16
GND/V-sync
12V
17
18
INV ON
12V
19
20
A.DIM
12V
21
22
P.DIM1
GND/P.DIM2
23
24
Err OUT
L2302
C2332
10uF
16V
+3.3V_NORMAL
R2330
1K
LPB
R2302
100
D
G
C2346
0.1uF
50V
INV_CTL
A_DIM
POWER_DET
RESET
2
1
C2359
0.1uF
16V
GND
C2365
0.1uF
16V
PD_24V
R2372
100K
+24V
not to RESET at 8kV ESD
Q2304
MMBT3904(NXP)
R2341
10K
R2376
10K
OPT
NCP803SN293
PD_+12V
R2363
1.2K
1%
C
B
PANEL_CTL
R2312
100
L/DIM0_VS
C2335
0.1uF
50V
OPT
C2339
OPT 1uF
25V
L2305
CIS21J121
R2344
5.6K
3.5V
CIS21J121
C2306
0.1uF
50V
24V
+3.5V_ST
IC2307
VCC
S
R2343
33K
2
3
L2303
BLM18SG121TN1D
GND
24V
R2373
100K
PD_+3.5V
R2366
0
5%
Q2305
AO3407A
OPT
P2301
FW20020-24S
+3.5V_ST
PD_+12V
R2362
2.7K
1%
PANEL_VCC
C2328
0.1uF
50V
C2326
0.01uF
50V
+24V
+12V
+12V
TYP 1450mA
L2311
PWR ON 1
24V
3
+3.5V_ST
Power_DET
CIS21J121
Q2301
MMBT3906(NXP)
10K
R2306
R2305
10K
RL_ON
PANEL_POWER
+12V
+3.5V_ST
PD_24V
IC2308
PD_24V
R2364
8.2K
1%
PWM_DIM
NCP803SN293
VCC
PD_24V
R2365
1.5K
1%
25
SMAW200-H24S2
C2360
0.1uF
16V
PD_24V
RESET
2
1
24V-->3.48V
12V-->3.58V
ST_3.5V-->3.5V
GND
+5V_Normal
1
+12V
+5V_NORMAL
MAX 1A
L2310
BLM18PG121SN1D
R2304
0
ERROR_OUT
Tuner 1.25V REG Input
LG1152 Max: 1728 mA

LG1132 Max: 2000 mA
R2301
10K
POWER_ON/OFF1
EMMC_VCCQ
1%
R1
VFB
R2308
C2371
0.1uF
16V
56K
L2306
BLM18PG121SN1D
L2314
BLM18PG121SN1D
[EP]PGND
VIN2
VIN
VIN1
C2345
VBST
0.1uF
16V
SW
14
C2354
10uF
16V
L2313
6.8uH
URSA5
R2322-*1
24K
R2311
10K
R2
3A
GND
C2303
0.1uF
50V
10
C2318
1uF
10V
SS
PGND2
PGND1
GND
PG
R2310
10K
POWER_ON/OFF2_3
L2316
2uH
293 mA
IC2300
AP7173-SPG-13 HF(DIODES)
IC2303
+1.8V_NORMAL
[EP]
L2301
VCC
R2
R2315
100
1%
POWER_ON/OFF2_2
R2334
10K
R2347
4.3K R1
1%
SS
C2340
10uF
10V
1.5A
C2324
10uF
10V
EN
GND
C2331
2200pF
50V
R2346
2K
1% R2
C2344
0.1uF
16V
Vout=0.8*(1+R1/R2)
IC2305
Vout=0.8*(1+R1/R2)
DDR MAIN 1.5V

1074 mA
POWER_ON/OFF2_3
C2310
0.1uF
16V
R2318
10K
POWER_ON/OFF2_1
10
1/16W
1%
R2378
6.8K
PH_1
C2350
22uF
10V
SS/TR
NR8040T3R6N
C2329
C2333
22uF
10V
C2341
0.1uF
16V
C2337
22uF
10V
0.01uF
50V
R2342
1/16W 330K 5%
1/16W
5%
R1
C2330
4700pF
50V
C2338
100pF
50V
R2
C2302
4.7uF
16V
FRC3
URSA5
OPT
C2370
10uF
10V
SS/TR
URSA5
COMP
R2357
1K
POWER_ON/OFF2_3
R2
Vout=0.6*(1+R1/R2)
THE
C2363
22uF
10V
EN
Switching freq: 400 ~ 580 Khz
R2350
56K
1/16W
1%
Vout=0.8*(1+R1/R2)
L2317
50V
PH_1
R2340
15K
R2
11
PH_2
C2374
PH_2
3A
0.1uF
16V
22000pF
12
+0.9V_VDD
C2349
1/16W
5%
GND_2
BOOT
C2373
11
IC2302
10
TPS54319TRE
9
THERMAL
17
13
PWRGD
4700pF
2
3
1/16W
1%
PWRGD
BOOT
13
14
15
EN
VIN_3
VIN_2
GND_1
VIN
R1
L2312
3.6uH
R2379
12K
C2320
10uF
10V
PVIN_2
VSENSE
1/16W
1%
R1
C2375
180pF
50V
R2378-*1
8.2K
C2311
2200pF
50V
C2353
3300pF
50V
OPT
R2319
C2352
10uF
10V
R2317
20K
C2316
10uF
10V
COMP
C2314
10uF
10V
C2347
10uF
16V
+1.5V_DDR
1/16W
1%
6A
EN
C2312
10uF
10V
14
FRC3
PH_3
COMP
OPT
R23160
C2327
0.1uF
12
NC_1
Max 5926 mA
[EP]GND
1uH
16V
AGND
NC_2
1/16W
1%
R2382
30K
FB
1%
C2309
0.1uF
16V
OPT
ADUC 20S 02 010L

D2350
C2304
10uF
16V
R2320
10K
AGND
C2300
10uF
16V
1
THERMAL
VIN
1.5K
1%
*NOTE 17
PGND
Placed on SMD-TOP
EP[GND]
VIN_1
L2304
2uH
[EP]LX
VSENSE
IC2301
AOZ1038PI
L2308
16
L2300
BLM18PG121SN1D
CIS21J121
L2307
OPT
+12V
CIS21J121
L2318
+3.5V_ST
GND_1
PVIN_1
0.1uF
16V
R2379-*1
15K
+3.3V_NORMAL
RT/CLK
1/16W
5%
GND_2
+0.9V_VDD
C2325
R2349
10K
R2339
+3.3V_NORMAL
4.7 A
RT/CLK
MAX
L2315
R2377
100K
R2381 0
47K 1%
EAN62348501
+12V
R2307
C2308
2200pF
50V
FB
50V
GND
1.5A
+5V_NORMAL
R2314
3K
1%
OUT
PG
C2348
C2315
0.1uF
16V
47pF
POWER_ON/OFF1
C2313
10uF
10V
3.9K
R2321
SS
R1
1.3K
EN
IN
1%
1/16W
FB
50V
R2300
10K
15
VCC
Vout=0.765*(1+R1/R2)
OUT
THERMAL
C2301
4.7uF
10V
PG
THERMAL
IN
700 mA
[EP]
+3.3V_NORMAL
BLM18PG121SN1D
+2.5V_NORMAL
THERMAL
+3.5V_ST
C2368
22uF
10V
+2.5V
C2321
22pF
50V
+1.0VDC
EN
3. soft start
+1.8V
R2313
9.1K
1%
C2319
3300pF
50V
R2309
100K
C2305
0.1uF
OPT
OPT
R1
SW1
Vout=0.765*(1+R1/R2)
Switching freq: 700K
1%
FRC3
VREG5
11
R2322
22K
VFB
4A
SW2
C2343
22uF
10V
C2342
2200pF
50V
C2336
1uF
10V
1%
R2
12
1%
VO
13
VBST
NR8040T4R7N
SS
C2376
22uF
10V
SAMSUNG_eMMC
C2372
0.1uF
16V
VREG5
C2334
100pF
50V
EN
THERMAL
R2348
10K
+3.3V_TU
L2319
BLM18PG121SN1D
IC2306
TPS54425PWPR
POWER_ON/OFF2_1 OPT
+3.3V_TU_IN
3.3V_EMMC +1.8V_NORMAL
L2309
BLM18PG121SN1D
IC2304
TPS54327DDAR [EP]GND
THERMAL
+3.3V_NORMAL
+1.0V_VDD
+12V
C2322
10uF
16V
eMMC POWER
15
PWM_DIM2
P2300
3A $ 0.145
Vout=0.827*(1+R1/R2)=1.521V
LG1152
POWER
C2369
22uF
10V
Renesas MICOM
+3.3V_NORMAL
R3035
4.7K
OPT
For Debug
12V_EXT_PWR_DET
10K
HDMI_WAUP:HDMI_INIT
R3000
+3.5V_ST
GND
+3.5V_ST
MICOM_RESET
22
(GP3_Soft touch)
MHL
MODEL_OPT_6
NON_GED
GED
P120/ANI19
25
P27/ANI7
+3.3V_NORMAL
MODEL1_OPT_1
R3036
10K
OPT
MODEL1_OPT_0
SIDE_HP_MUTE
MODEL1_OPT_4
MODEL1_OPT_3
24
23
12
22
P26/ANI6
21
26
20
11
19
P70/KR0/SCK21/SCL21
18
P25/ANI5
17
27
16
10
15
P71/KR1/SI21/SDA21
14
P24/ANI4
For Sample Set
P147/ANI18
P146
P10/SCK00/SCL00
P13/TXD2/SO20
P12/SO00/TXD0/TOOLTXD
P14/RXD2/SI20/SDA20
P15/PCLBUZ1/SCK20/SCL20
For JAPAN
P16/TI01/TO01/INTP5
For LM86
P17/TI02/TO02
P51/INTP2/SO11
R3019
3.3K
(GP4_TOOL)
NON_MHL
KEY1
MODEL1_OPT_2
28
PDP
MODEL_OPT_5
10K
OPT
POWER_ON/OFF2_1
MODEL1_OPT_4
MODEL1_OPT_5
R3037
KEY2
P72/KR2/SO21
POWER_ON/OFF2_3
IR Wafer
10Pin
37
P23/ANI3
SCART_MUTE
For Japan:LNB_INIT
POWER_ON/OFF2_4
P11/SI00/RXD0/TOOLRXD/SDA00
12/15Pin
MODEL1_OPT_3
P41/TI07/TO07
29
MICOM
+3.3V_NORMAL
RL_ON
P73/KR3/SO01
10K
IR Wafer
MODEL_OPT_4
MODEL1_OPT_2
P40/TOOL0
P22/ANI2
R3022
MODEL1_OPT_1
38
30
R5F100GEAFB
13
LCD / OLED
39
P21/ANI1/AVREFM
P74/KR4/INTP8/SI01/SDA01
IC3000
P50/INTP1/SI11/SDA11
MICOM_OLED_FRC
R3005-*2
22K
MICOM_OLED_MAIN
R3005-*1
56K
MICOM_LOGO_LIGHT
R3012
10K
MICOM_JAPAN
R3009
10K
MICOM_TOUCH_KEY
R3007
10K
MICOM_PDP
R3005
10K
MICOM_GP4_10PIN
R3030
10K
MICOM_MHL
R3020
10K
MICOM_GED
R3016
10K
MODEL_OPT_3
MODEL1_OPT_0
R3024
31
P75/KR5/INTP9/SCK01/SCL01
TOUCH_KEY
RESET
P20/ANI0/AVREFP
+3.5V_ST
TACT_KEY
40
32
MICOM MODEL OPTION
MODEL_OPT_2
P124/XT2/EXCLKS
+3.5V_ST
JAPAN
41
P31/TI03/TO03/INTP4
P30/INTP3/RTC1HZ/SCK11/SCL11
NON JAPAN
42
P130
MODEL1_OPT_6
MODEL_OPT_1
43
33
EEPROM_SDA
LOGO_LIGHT
44
POWER_ON/OFF2_2
NON LOGO_LIGHT
45
P63
HDMI_CEC
MODEL_OPT_0
46
P01/TO00/RXD1
IR
47
34
PANEL_CTL
EEPROM_SCL
48
35
P62
MODEL1_OPT_5
MICOM MODEL OPTION
SCART_MUTE
22
AMP_RESET_BY_MICOM
R3018
3.3K
COMMERCIAL_12V_CTL
12V_EXT_PWR_DET
R3003
SOC_RESET
EXT_AMP_MUTE
EXT_AMP_RESET
P00/TI00/TXD1
I2C_SDA3
POWER_ON/OFF2_4
P140/PCLBUZ0/INTP6
P61/SDAA0
AMP_RESET_N
POWER_ON/OFF2_3
36
P60/SCLA0
POWER_ON/OFF2_3
POWER_ON/OFF2_4
I2C_SCL3
POWER_ON/OFF2_2
C3004
0.1uF
16V
MICOM_RESET_SW
SW3000
JTP-1127WEM
10K
POWER_ON/OFF!
POWER_ON/OFF2_1
REGC
R3033
VSS
R3032
10K
AMP_RESET_BY_MICOM
GP4 High/MID Power SEQUENCE
VDD
+3.3V_NORMAL
P121/X1
C3001
C3000
0.1uF
13
P123/XT1
12
P137/INTP0
11
P122/X2/EXCLK
0.47uF
10
270K
OPT
10K
LOGO_LIGHT
+3.5V_ST
4.7M
OPT
R3026
MICOM_DEBUG
R3023
R3027
32.768KHz
MICOM_DIIVA
R3025
22
for DiiVA
3
MICOM_DEBUG
LOGO_LIGHT
X3000
C3003
/RST_DIIVA
POD_WAKEUP_N
FLG_POD_DR
MICOM_RESET
Dont remove R3014,

Not making P40 floated
C3002
/RST_DIIVA
MICOM_DIIVA
R3001
22
MICOM_DIIVA
R3002
22
R3014 1K
P3000
12507WS-12L
R3011 10K
MICOM_DEBUG
MICOM_DEBUG
8pF
8pF
FLG_POD_DR
POD_WAKEUP_N
GP4_HIGH
Eye Sensor Option
EXT_AMP_RESET
EXT_AMP_MUTE
AMP_MUTE
SOC_RX
INV_CTL
SOC_TX
SOC_RESET
LED_B/GP4_LED_R
R3034
4.7K
OPT
POWER_DET
+3.3V_NORMAL
COMMERCIAL_12V_CTL
MICOM_NON_LOGO_LIGHT
R3013
10K
MICOM_NON_JAPAN
R3010
10K
MICOM_TACT_KEY
R3008
10K
MICOM_LCD/OLED
R3006
10K
MICOM_GP3_12/15PIN
R3031
10K
MICOM_NON_MHL
R3021
10K
MICOM_NON_GED
R3017
10K
MODEL1_OPT_6
For CEC
POWER_ON/OFF1
EDID_WP
+3.5V_ST
MODEL_OPT_4
MODEL_OPT_2
N/A
R3029
120K
R3028
27K
MC8101_ABOV
(TACT_KEY)
Q3000
MMBT3904(NXP)
EDID_WP
D3000
CEC_REMOTE
BAT54_SUZHO
Q3001
RUE003N02
HDMI_CEC_FET_ROHM
S
THE
HDMI_CEC
CM3231_CAPELLA
(GP4 Soft touch)
CM3231_CAPELLA
(GP3 Soft touch)
Q3001-*1
SI1012CR-T1-GE3
HDMI_CEC_FET_VISHAY
2011.12.12
MICOM
30
3
4
R1X1N
220K
R3206
5%
1/16W
62K
R3201
1/10W
3
2
1
R3204
0
R3205
0
ARC
TX2P
TX2N
TX1P
TX1N
TX0P
TX0N
TXCP
TXCN
TCVDD12
TPVDD12
R0XCN
R0XCP
R0X0N
R0X0P
R0X1N
R0X1P
R0X2N
VDD12_3
67
68
69
70
71
72
73
74
75
76
77
78
79
81
80
43
44
CBUS_HPD4
42
DSDA4
DSCL4
41
R3PWR5V
40
39
DSCL3
CBUS_HPD3
38
DSDA3
36
37
R1PWR5V
CBUS_HPD1
35
DSCL1
33
32
34
DSDA1
R0PWR5V
CBUS_HPD0
DSCL0
DSDA0
VDD12_2
R4X0N
SPDIF_OUT_ARC
OPT
IN
DDC_SDA_3
OUT
L3203
VDD12_3
10K
R3202
53
CD_SENSE0
52
WKUP
16
51
LPSBV
R3X2N
17
50
PWRMUX_OUT
20
47
DSCL5[VGA]
R4XCN
21
46
DSDA5[VGA]
R4XCP
22
45
R4PWR5V
DSCL4
DSDA4
R3PWR5V
DSCL3
RGB_5V
R3242
10
RGB_DDC_SCL
RGB_DDC_SDA
C3209
0.1uF
16V
44
43
VDD33_1
42
R5PWR5V[VGA]
41
SBVCC5
48
40
49
19
39
18
38
HDMI_WKUP
R3216
10
R3X2P
AVDD12_2
37
+3.3V_NORMAL
1/16W
R3213
5.1K
5%
10K
R3203
CD_SENSE1
10K
R3244
TX2P
ARC
68
69
TX1P
TX1N
TX2N
70
71
72
TX0N
TX0P
73
74
TXCN
TXCP
75
76
77
TCVDD12
TPVDD12
78
R0XCN
79
80
R0XCP
R0X0N
81
82
R0X0P
R0X1N
83
84
R0X1P
R0X2P
R0X2N
85
67
GPIO2
54
CBUS_HPD4
DDC_DATA
DDC_CLK
L3201
GND
55
R3X1P
CBUS_HPD3
5V
MHL_DET
+3.5V_ST
+5V_NORMAL
15
BLM18PG121SN1D
IC3200
AZ1117BH-1.2TRE1
HDMI_S/W_RESET
14
5V_HDMI_3
HDMI_HPD_3
I2C_SDA5
R3X1N
Device Address : 0XB0
33
I2C_SCL5
R3X0P
DSDA3
C3211
0.1uF
16V
FHD
23
C3210
0.1uF
16V
13
R1PWR5V
D2+_HDMI3
12
R3X0N
36
+3.3V_NORMAL
R3XCP
35
D1+_HDMI3
AVDD12_3
CD_SENSE3
34
CK+_HDMI3
86
88
CD-SENSE4
11
DSCL1
D0-_HDMI3
D2+
HDMI_INT
56
R3XCN
SPDIF_OUT
33
GPIO0
CBUS_HPD1
D2+_HDMI2
D2_GND
R3211
57
10
IC3201
SII9587CNUC
33
CK-_HDMI3
INT
58
VDD12_1
32
HDMI3
D2-_HDMI2
64
59
AVDD12_1
D1+_HDMI2
D2-
OPT
R3224
33
GPIO1
DSDA1
DDC_SCL_4
SPDIF_IN
60
R1X2P
R0PWR5V
D2+_HDMI2
DDC_SDA_4
RSVDL
65
TPWR
31
DDC_SCL_3
66
61
CBUS_HPD0
DDC_SDA_3
D1+
HDMI2
30
R4PWR5V
31
45
29
22
+3.3V_NORMAL
C3221
C3215
0.1uF
16V
C3212
1uF
10V
C3222
10uF
10V
C3218
10uF
10V
1uF
10V
DDC_SCL_3
NC
GND/ADJ
CE_REMOTE
CEC_REMOTE
CK-
C3200
10uF
10V
C3203
10uF
10V
C3201
10uF
10V
OPT
R3215
33
C3216
10uF
10V
C3206
0.1uF
16V
12V_EXT_PWR_DET
HDMI_WKUP
CK-_HDMI3
R3212
CK_GND
33
MHL_DET
CK+
CK+_HDMI3
D0D0-_HDMI3
D0_GND
C3204
0.1uF
16V
C3207
0.1uF
16V
C3217
0.1uF
16V
DDC_SCL_4
DDC_SDA_4
DDC_SCL_3
HDMI_HPD_4
HDMI4
DDC_SDA_3
Vout=0.8*(1+R1/R2)
HDMI_HPD_3
D1+_HDMI3
D2-
DDC_SCL_2
D1-_HDMI3
D1+
DDC_SDA_2
D0+_HDMI3
D1D1_GND
HDMI_HPD_2
D0+
HDMI_HPD_1
DSDA5[VGA]
R4XCP
33
DDC_SCL_1
46
33
DDC_SDA_1
21
R3214
D2+_HDMI4
DSCL5[VGA]
R4XCN
RESET_N
D2-_HDMI4
R5PWR5V[VGA]
47
R3237
D1+_HDMI4
48
20
R3236
30
D1-_HDMI2
D1_GND
HP_DET
11
10
SBVCC5
19
VDD33_1
CSDA
DSCL0
D2-_HDMI2
20
12
49
CSCL
29
R3229
47K
C3205
10uF
10V
13
18
62
DSDA0
R3226
47K
BLM18PG121SN1D
14
PWRMUX_OUT
R3X2P
63
R1X2N
D2-_HDMI3
15
LPSBV
50
28
47K
D1-
L3200
16
51
17
VDD12_2
D1+_HDMI2
R3220
D1-_HDMI3
17
WKUP
16
R3X2N
R1X1N
R4X2P
D0+_HDMI2
R3218
47K
D0+_HDMI3
18
52
R1X0P
R1X1P
D0_GND
D0+
27
D1-_HDMI2
JK3200
19
15
16V
0.1uF
C3225
C3224
0.1uF
16V
THERMAL
89
R4X2N
D0+_HDMI2
D3205
26
D3203
D0-_HDMI2
R1XCP
R1X0N
D0-_HDMI2
A2
D3201
D0-
R1XCN
R4X1P
CK+_HDMI2
CK-_HDMI2
+3.5V_ST
CK+_HDMI2
CK_GND
CK+
HDMI2
+5V_NORMAL
5V_HDMI_4
25
+5V_NORMAL
5V_HDMI_3
CK-_HDMI2
A1
CEC_REMOTE
A2
CE_REMOTE
CK-
51U019S-312HFN-E-R-B-LG
VDD33_2
[EP]GND
DDC_SDA_2
DDC_SCL_2
NC
BODY_SHIELD
CD_SENSE0
R3X1N
R3X1P
D3204
L3202
A1
C
47K
DDC_SCL_1
DDC_SCL_2
R4X1N
R3228
47K
D1-_HDMI4
R3225
D0+_HDMI4
DDC_SDA_1
R4X0N
DDC_CLK
47K
DDC_SDA_2
D0-_HDMI4
6
5
R3209
0
R3210
0
DDC_DATA
CK+_HDMI4
GND
CK-_HDMI4
R3219
R3217
47K
CD_SENSE1
53
D3202
A1
11
10
HDMI4 With MHL
5V
12
MHL_DET
A2
13
54
14
+5V_NORMAL
5V_HDMI_2
HDMI_HPD_2
A1
14
B
Q3200
HDMI S/W OUTPUT
A2
A1
5V_HDMI_2
15
MMBT3904(NXP) E
D3200
16
C3223
0.047uF
25V
JK3203
20
17
GPIO2
13
R3X0P
R3221
10
D3207
D2+_HDMI4
+5V_NORMAL
5V_HDMI_1
HP_DET
HDMI1
A2
HDMI1 With ARC
E MMBT3906(NXP)
Q3201
R3247
10K
HDMI_RX2+
1/16W
5%
HDMI_RX2-
R3243
1K
HDMI_RX1-
D2-_HDMI4
D2+
HDMI_RX1+
D1+_HDMI4
D2D2_GND
HDMI_RX0-
D1+
18
55
+3.5V_ST
HDMI_RX0+
D2+_HDMI1
JK3202
19
12
D1-_HDMI4
HDMI_CLK-
D2+
BODY_SHIELD
CD_SENSE3
R3XCP
R3X0N
D0+_HDMI4
D1-
HDMI_CLK+
D2_GND
56
D1_GND
CK-_HDMI1
D2-_HDMI1
11
D0+
D0-_HDMI1
D1+_HDMI1
D2-
R3XCN
MHL_DET
CK+_HDMI1
D1+
R0X2P
CD-SENSE4
10
A2
D0+_HDMI1
82
GPIO0
57
VDD12_1
A1
C
87
10K
R3245
D1-_HDMI1
D1-_HDMI1
D1_GND
5%
1/16W
EN
D1+_HDMI1
D0+_HDMI1
D1-
D0-_HDMI4
D0_GND
D2-_HDMI1
D2+_HDMI1
CK+_HDMI4
D0-
Limit 0.8A
OPT
C3226
0.1uF
16V
CK+
24
10V
CK_GND
ILIM1
ILIM_SEL
R4X0P
D0+
OPT
R3249
3.9K
D0-_HDMI1
D0_GND
SPDIF_OUT_ARC
CEC_REMOTE
CK-_HDMI4
62K
R3200
CK+_HDMI1
D0-
11
10
CE_REMOTE
CK-
OPT
C3202
1uF
CK+
12
EAG62611204
CK_GND
11
10
13
ARC
OPT
R3248
1K
CK-_HDMI1
1/10W
CEC_REMOTE
CK-
12
ILIM0
Limit 0.8A
CE_REMOTE
13
EAG62611204
14
AVDD12_3
VDD33_2
GPIO1
58
IC3201-*1
SII9587CNUC-3
AVDD12_2
C3208
0.1uF
IN_2
83
59
NC
ARC
14
DDC_SCL_4
15
84
TPWR
27
DDC_SCL_1
15
OUT_1
85
RESET_N
R1X2P
28
DDC_CLK
CSDA
60
R4X2P
R3208
DDC_CLK
16
30V
R3246
10K
16
DDC_SDA_4
CSCL
62
61
26
DDC_SDA_1
INT
63
25
IN_1
SPDIF_IN
64
23
R3207
DDC_DATA
R3222
0
R3223
0
DDC_DATA
+5V_NORMAL
RSVDL
65
R1X1P
24
17
17
OUT_2
GND
66
R1X2N
R4X1P
GND
D3206
MBR230LSFT1G
GND
10
THERMAL
18
18
FAULT
5V
THERMAL
89
R4X2N
5V
5V_HDMI_4
86
R1X0N
R1X0P
R4X1N
19
HDMI_HPD_4
11
HDMI_HPD_1
5.6V
19
EAG62611204
R1XCP
AVDD12_1
HP_DET
HP_DET
EAG62611204
UD
R1XCN
R4X0P
[EP]
20
20
IC3202
TPS2554
87
[EP]GND
5V_HDMI_4
GND
BODY_SHIELD
88
BODY_SHIELD
5V_HDMI_1
D2-_HDMI3
D2_GND
D2+
D2+_HDMI3
5V_HDMI_1
5V_HDMI_2
R3231
10
R3232
10
5V_HDMI_4
5V_HDMI_3
R3240
10
R3238
10
JK3201
HDMI3
THE
C3213
1uF
1/16W
R3233
5.1K
5%
C3214
1uF
1/16W
R3234
5.1K
5%
C3220
1uF
1/16W
R3241
5.1K
5%
GP4
HDMI
C3219
1uF
1/16W
R3239
5.1K
5%
2011.10.19
32
RGB/ PC AUDIO/ SPDIF
RGB_5V
RGB PC
+5V_NORMAL
RGB_5V
A1
C
R3642
2.7K
2.7K
VCC
R3645
10K
RGB_EDID
E1
E2
VSS
JK3602
2F11TC1-EM52-4F
+3.3V_NORMAL
WC
EDID_WP
R3643
SCL
22
SPDIF OUT
RGB_DDC_SCL
R3644
SDA
22
RGB_DDC_SDA
C3633
18pF
50V
C3634
18pF
50V
R3615
33
R3620
2.7K
OPT
SPDIF_OUT
D3613-*1
5.5V
ADUC 5S 02 0R5L
ESD_MTK
DSUB_VSYNC
D3621
ADUC 5S 02 0R5L
5.5V
OPT
D3615
30V
OPT
D3613
5.5V
ADUC 5S 02 0R5L
OPT
C3615
0.1uF
16V
VIN
VCC
GND
Fiber Optic
4
SHIELD
R3641
IC3600
M24C02-RMN6T
E0
RGB_EDID
A2
MMBD6100
D3620
D3622
ADUC 5S 02 0R5L
5.5V
OPT
DSUB_HSYNC
D3616
30V
OPT
RGB_DEBUG
R3602
100
DSUB_B+
SOC_RX
RGB_DEBUG
R3647
100
PC AUDIO
SOC_TX
R3600
0
NON_RGB_DEBUG
D3600
20V
OPT
R3601
0
NON_RGB_DEBUG
D3601
20V
OPT
JK3601
KJA-PH-0-0177
5
GND
DETECT
PC_L_IN
+3.3V_NORMAL
DSUB_G+
R3646
10K
D3611
5.6V
OPT
D3611-*1
ESD_MTK
5.6V
DSUB_DET
PC_R_IN
D3623
5.6V
OPT
DSUB_R+
15
10
D3612-*1
ESD_MTK
5.6V
16
10
5
9
3
8
2
7
1
16
15
14
14
13
12
11
13
12
11
Closed to JACK
D3612
5.6V
OPT
JK3603
SLIM-15F-D-2
THE
JACK HIGH / MID
2011.11.21
36
HP_LOUT
JK3700
KJA-PH-0-0177
+3.3V_NORMAL
GND
R3700
10K
HP_OUT
HP_DET
HP_ROUT
DETECT
EAG61030001
HP_OUT
VA3700
5.6V
OPT
ESD for MTK
ESD for LG1152
VA3700-*1
VA3700-*2
5.6V
5.6V
ESD_MTK_HP_OUT
ESD_LG1152_HP_OUT
THE
JACK_COMMON
2011.11.21
37
12V_COMMERCIAL_OUT
12V 1A FOR COMMERCIAL(RS-232C POWER)

12V_COMMERCIAL_OUT
CVBS 1 PHONE JACK
RS232C
10
5
+3.3V_NORMAL
9
4
IR_OUT
IC3800
0.1uF
C1+
C3800
16
0.1uF
+3.5V_ST
V+
C3801
15
14
13
GND
D3805
20V
OPT
D3804
20V
OPT
RS232
C1-
DOUT1
AV1_CVBS_DET
RS232
100
R3821
VCC
RS232
R3810
10K
RS232
100
R3820
+3.5V_ST
MAX3232CDR
JK3800
KJA-PH-1-0177
OPT_RS232
R3834
1
10K
D3800
5.6V
OPT
AV_JACK_BLACK
M5_GND
M4
M3_DETECT
M1
M6
RS232
FOR COMMERCIAL
AV1_CVBS_IN
SPG09-DB-009
0.1uF
C2+
C3802
JK3803
RS232
RS232
C2-
0.1uF
RIN1
V-
C3803
12
11
ROUT1
DIN1
RS232
DOUT2
RIN2
10
DIN2
AV1_L_IN
AV_JACK_YELLOW
ROUT2
JK3800-*1
KJA-PH-1-0177-1
SOC_RX
D3801
5.6V
M5_GND
OPT
EAN41348201
SOC_TX
UART_4PIN_STRAIGHT
+3.5V_ST
R3811
4.7K
R3814
OPT
OPT
UART_4PIN_ANGLE
P3800
P3801
12507WS-04L
12507WR-04L
+3.5V_ST
M4
M3_DETECT
M1
M6
AV1_R_IN
4.7K
1
D3802
5.6V
OPT
4
5
ESD For MTK
COMPONENT 1 PHONE JACK
ESD For LG1152

D3803-*1
5.6V
ESD_MTK
+3.3V_NORMAL
D3800-*1
5.6V
ESD_MTK
R3806
10K
D3803-*2
5.6V
ESD_LG1152
D3800-*2
5.6V
ESD_LG1152
COMP1_DET
D3801-*1
5.6V
D3803
5.6V
COMP_JACK_BLACK
ESD_MTK
OPT
JK3801
KJA-PH-1-0177
5
M5_GND
M4
M3_DETECT
M1
M6
D3802-*1
5.6V
COMP1_Y
ESD_MTK
D3801-*2
5.6V
ESD_LG1152
D3802-*2
5.6V
ESD_LG1152
COMP1_Pb
COMP_JACK_GREEN
JK3801-*1
KJA-PH-1-0177-2
THE
M5_GND
M4
M3_DETECT
M1
M6
COMP1_Pr
JACK_COMMON
2011.11.21
38
+3.5V_ST
IR & KEY
RGB Sensor
EEPROM_SCL
KEY1
COMMERCIAL_IR
R4101
1K
KEY2
C4100
0.1uF
COMMERCIAL_IR
R4103
3.3K
IR
Q4100
MMBT3904(NXP)
COMMERCIAL_IR
+3.5V_ST
R4102
10K
R4107
10K
B
E
EEPROM_SDA
R4114
100
+3.5V_ST
R4104
47K
COMMERCIAL_IR
C
IR_BYPASS
+3.5V_ST
C4102
0.1uF
R4124
100
D4101
5.6V
AMOTECH CO., LTD.
OPT
D4106
ADUC 20S 02 010L
20V
OPT
D4100
5.6V
AMOTECH CO., LTD.
OPT
5
L4100
BLM18PG121SN1D
B
Q4101
MMBT3904(NXP)
COMMERCIAL_IR
P4102
12507WR-10L
D4105
ADUC 20S 02 010L
20V
OPT
R4113
100
COMMERCIAL +3.5V_ST
GP4_IR_10P
R4123
100
R4118
10K
5%
R4117
10K
5%
COMMERCIAL_IR
C4104
1000pF
50V
R4125
1.5K
LED_B/GP4_LED_R
8
R4100
0
IR_BYPASS
COMMERCIAL
C4107
100pF
50V
+3.5V_ST
D4104
5.6V
OPT
AMOTECH CO., LTD.
COMMERCIAL_IR_EU
10
11
+3.5V_ST
R4109
1K
COMMERCIAL_IR
R4105
22
IR_OUT
COMMERCIAL_IR
Q4102
MMBT3904(NXP)
COMMERCIAL_IR_EU
R4115
COMMERCIAL_IR_EU3.3K
R4111
C
10K
B
E
R4119
47K
C
B
Q4104
MMBT3904(NXP)
COMMERCIAL_IR
R4108
0
COMMERCIAL_IR_US
COMMERCIAL_IR
Soft Touch Micom D/L
Zener Diode is
close to wafer
ESD for MTK
ESD for LG1152
D4105-*1
ADUC 20S 02 010L
20V 10pF
ESD_MTK
D4106-*1
ADUC 20S 02 010L
20V 10pF
ESD_MTK
D4100-*2
D4100-*1
200pF
5.6V
ADMC 5M 02 200L
200pF
5.6V
ADMC 5M 02 200L
ESD_LG1152
ESD_MTK
D4101-*2
D4101-*1
5.6V
200pF
ADMC 5M 02 200L
ESD_MTK
D4104-*1
5.6V 200pF
ADMC 5M 02 200L
ESD_MTK
THE
5.6V 200pF
ADMC 5M 02 200L
ESD_LG1152
D4104-*2
5.6V 200pF
ADMC 5M 02 200L
ESD_LG1152
IR / KEY
2011.11.21
41
USB_DM1
25V
1uF
C4209
USB_DP1
USB_HUB_IC_IN_DP
22
1/16W 1%
XTALIN/CLKIN
VDD33_3
[EP]VSS
RBIAS
PLLFILT
IC4200
USB2512B-AEZG
USB HUB
USBDM_DN[1]
USBDP_DN[1]
USBDM_DN[2]
USBDP_DN[2]
VDDA33_1
NC_1
C4212
0.1uF
OPT
C4213
0.1uF
C4214
1uF
25V
VDDA33_2
C4206
TEST
PRTPWR[1]/BC_EN[1]
OCS_N[1]
CRFILT
VDD33_1
0.1uF
C4204
C4211
0.1uF
OPT
R4210
USB_CTL1
100K
OPT
/USB_OCD1
USB_CTL2
/USB_OCD2
OPT
R4207
OPT
R4208
100K
OPT
22
0.1uF
25V
1uF
OCS_N[2]
NC_5
100K
R4203
C4202
C4210
0.1uF
OPT
+3.3V_NORMAL
10
NC_4
11
9
12
19
13
NC_3
NC_6
14
15
20
16
NC_7
17
21
NC_2
18
NC_8
R4209
THE
12K
R4206
15pF
C4205
15pF
C4207
XTALOUT
USBDP_UP
USBDM_UP
VDDA33_3
THERMAL
37
22
C4201
4.7uF
23
SDA/SMBDATA/NON_REM[1]
36
24
VDD33_2
35
SCL/SMBCLK/CFG_SEL[0]
34
25
USB_DM2
USB_DP2
33
HS_IND/CFG_SEL[1]
100K
R4202
+3.3V_NORMAL
100K
R4201
C4200
0.1uF
OPT
32
26
31
27
RESET_N
30
VBUS_DET
/RST_HUB
PRTPWR[2]/BC_EN[2]
0.1uF
X4200
24MHz
28
C4203
R4200
100K
R4205
1% 1M
29
R4204
+3.3V_NORMAL
SUSP_IND/LOCAL_PWR/NON_REM[0]
100K
0.1uF
C4208
USB_HUB_IC_IN_DM
USB3_HUB
2011.06.13
42
+3.3V_NORMAL
+5V_USB FOR USB1

R4327
10K
OPT
MAX 2A
R4323
10K
POWER_ON/OFF2_4
IC4303
TPS2554
11
ILIM1
3AU04S-305-ZC-(LG)
JK4303
1
R1
OPT
C4338
1000pF
50V
USB_DM1
1%
R2
2K
R4339
USB_DP1
Vout=0.8*(1+R1/R2)
R4336
20K
C4328
0.01uF
50V
USB_CTL1
DVR Ready
MAX 1.8A
ILIM0
USB DOWN STREAM
C4334
4700pF
50V
10uF
10V
C4332
47pF
50V
VSENSE
USB1
C4323
OUT_1
EN
COMP
OPT
RCLAMP0502BA
D4303
/USB_OCD1
OUT_2
R4300
27K
3A
ILIM_SEL
GND
FAULT
1/10W
OPT
330K
R4329
C4336
0.1uF
16V
10
1/10W
EN
SS/TR
IN_2
C4333
22uF
10V
[EP]
OPT
R4341
27K
C4326
0.1uF
50V
PH
1%
C4324
10uF
35V
820
R4343
VIN
IN_1
1%
BOOT
BLM18PG121SN1D
GND
L4308
6.8uH
10K
R4338
L4305
IC4305
TPS54331D
40V
0
R4330
C4329
D4304
SMAB34
16V
0.1uF
+24V
40V
C4327
0.1uF
16V
THERMAL
D4304-*1
SX34
R4328
10K
R4332
POWER_ON/OFF2_4
IC4306
10K
C4300
0.1uF
16V
SN1104041, DC-DC+2CH USB SW
+12V
LX_2
17
DEV_USB_DCDC_BD86180
IC4306-*1
BD86180MUV
SS
RT
CTL2
CTL1
FLG2
FLG1
USB_OUT2
GND_1
GND_2
USB_OUT1
24
25
COMP
1
THERMAL
EN
23
22
21
20
19
18
17
16
10
15
11
14
12
13
[EP]GND
VREG
GND_3
C4337
22uF
10V
C4301
22uF
10V
LX_1
16
VIN_2
SW_IN_3
VIN_1
15
PGND_2
PGND_1
SW_IN_2
BST
SW_2
14
10
11
OPT
10K
OPT
R4304 10K
USB_DCDC_SN1104041
EN_SW2
+5V_USB_2
3AU04S-305-ZC-(LG)
JK4302
USB_CTL2
EN_SW1
/USB_OCD2
NFAULT2
2
USB2
MAX 1.5A
USB_DM2
NFAULT1
USB_DP2
SW_OUT2
+5V_USB_3
C4322
10uF
10V
AGND_1
AGND_2
C4331
0.1uF
16V
18
ROSC
USB_DCDC_SN1104041
C4340-*1
0.01uF
50V
USB_DCDC_BD86180
USB DOWN STREAM
L4307
3.6uH
19
C4340
4700pF
50V
BST
+5V_USB
20
C4342
100pF
50V
PGND_1
21
SS
OPT
RCLAMP0502BA
D4302
PGND_2
5%
3
R4303
C4325
10uF
16V
R4342
10K
COMP
10K
VIN_1
22
10K
VIN_2
23
+3.3V_NORMAL
EN
R4301
AGND_3
USB_DCDC_SN1104041
C4341
4.7uF
10V
1
THERMAL
L4306
BLM18PG121SN1D
24
25
V7V
R4302
[EP]GND
+5V_USB_2
SW_1
USB_IN_3
SW_IN_1
USB_IN_2
13
12
SW_OUT1
USB_IN_1
USB3
MAX 1.5A
+5V_USB_3
ESD for LG1152
ESD_LG1152
RCLAMP0502BA
D4300-*2
10uF
10V
C4310
OPT
RCLAMP0502BA
D4300
ESD for MTK
USB DOWN STREAM
3AU04S-305-ZC-(LG)
JK4300
ESD_LG1152
RCLAMP0502BA
D4302-*1
USB_WIFI
+5V_USB
L4302 WIFI 120-ohm

BLM18PG121SN1D
ESD_LG1152
RCLAMP0502BA
D4303-*3
From SoC
C4319
0.1uF
16V
C4320
0.1uF
16V
WIFI
WIFI
C4321
10uF
10V
WIFI
C4339
10uF
10V
WIFI
MAX 0.4A
P4301
USB_DM3
12507WR-04L
For EMI
WIFI
VDD
USB_DP3
DM
USB_CTL3
WIFI_DM
/USB_OCD3
DP
WIFI_DP
GND
4
5
.
THE
USB3_HUB_WiFi
2011.10.26
43
+3.3V_NORMAL
+12V
EU
R4601
10K
Full Scart(18 Pin Gender)
CLOSE TO JUNCTION
SC_DET
EU
E
MMBT3906(NXP)
Q4600
EU
D4611-*1
5.6V
200pF
D4611-*2
5.6V
200pF
D4611
5.6V
OPT
ESD_LG1152_SCART
C4604
0.1uF
ESD_MTK_SCART
SC_CVBS_IN
SHIELD
D4609-*2
5.5V
15pF
ESD_LG1152_SCART
D4609-*1
5.5V
15pF
ESD_MTK_SCART
D4609
5.5V
OPT
AV_DET
17
16
15
14
13
12
11
75
COM_GND
SYNC_IN
Gain=1+Rf/Rg
Rf
R4600
EU
C4605
100uF
16V
D4610-*1
5.5V
15pF
ESD_MTK_SCART
SYNC_OUT
EU
Q4601
EU
MMBT3904(NXP)
C
R4602
390
B
EU
C4606
0.1uF
50V
EU
R4606
47K
EU
C4607
47uF
25V
EU
D4610
5.5V
OPT
R4605
EU
R4603
390
19
18
EU
470
B
EU
R4604
180
Rg
R4608
EU
R4607
15K
DTV/MNT_V_OUT
0
OPT
SYNC_GND
RGB_IO
SC_FB
R_OUT
D4601
5.6V
OPT
R_GND
G_OUT
D4601-*1
5.6V
200pF
ESD_MTK_SCART
D4601-*2
5.6V
200pF
ESD_LG1152_SCART
10
G_GND
9
SC_R
ID
D4602
5.5V
OPT
B_OUT
7
AUDIO_L_IN
6
D4602-*1
5.5V
15pF
ESD_MTK_SCART
B_GND
5
SC_G
AUDIO_GND
4
AUDIO_L_OUT
3
AUDIO_R_IN
D4603
5.5V
OPT
D4603-*1
5.5V
15pF
ESD_MTK_SCART
D4604
5.5V
OPT
D4604-*1
5.5V
15pF
ESD_MTK_SCART
2
AUDIO_R_OUT
1
SC_B
DA1R018H91E
JK4600
EU
SC_ID
SC_L_IN
D4605
5.6V
OPT
D4600
20V
OPT
D4600-*1
20V
10pF
ESD_MTK_SCART
D4600-*2
20V
10pF
ESD_LG1152_SCART
D4605-*1
5.6V
200pF
ESD_MTK_SCART
D4605-*2
5.6V
200pF
ESD_LG1152_SCART
SC_R_IN
D4606
5.6V
OPT
D4606-*1
5.6V
200pF
ESD_MTK_SCART
D4606-*2
5.6V
200pF
ESD_LG1152_SCART
BLM18PG121SN1D
L4600
D4607
5.6V
OPT
EU
EU
C4600
1000pF
50V
DTV/MNT_L_OUT
EU
C4602
4700pF
BLM18PG121SN1D
L4601
D4608
5.6V
OPT
THE
EU
EU
C4601
1000pF
50V
EU
C4603
4700pF
DTV/MNT_R_OUT
SCART GENDER
2011.10.26
46
ZigBee_Radio Pulse M_REMOTE OPTION

+3.3V_NORMAL
P4800
12507WR-08L
L4800
120-ohm
M_REMOTE
1
M_REMOTE
3.3V
C4800
GND
0.1uF
AR4800
100
1/16W
RX
M_REMOTE_RX
TX
M_REMOTE_TX
RESET
M_RFModule_RESET
DC
M_RFModule_ISP
DD
3D_SYNC_RF
GND
M_REMOTE
3D_SYNC_RF
Only For PDP
ALL M_REMOTE OPTION
THE
MOTION REMOTE
2011.11.21
48
Ethernet Block
LAN_JACK_POWER
C5000
0.1uF
16V
C5001
0.01uF
50V
C5002
0.1uF
16V
C5003
0.01uF
50V
JK5000
XRJH-01A-4-DA7-180-LG(B)
LAN_XML
1
10
11
D1
D2
D3
D4
P1[CT]
P2[TD+]
EPHY_TDP
P3[TD-]
EPHY_TDN
P4[RD+]
EPHY_RDP
P5[RD-]
EPHY_RDN
P6[CT]
P7
D5000
D5001
D5002
5.5V
OPT
5.5V
OPT
5.5V
OPT
D5003
5.5V
OPT
P8
P9
P10[GND]
P11
YL_C
YL_A
GN_C
GN_A
ESD for MTK
ESD for LG1152
12
ESD_LG1152
SHIELD
D5000-*1
ESD_MTK
D5000-*2
ADUC 5S 02 0R5L
5.5V
ADUC 5S 02 0R5L
ESD_LG1152
D5001-*1
ESD_MTK
ADUC 5S 02 0R5L
D5001-*2
5.5V
ADUC 5S 02 0R5L
JK5000-*1
TLA-6T764
ESD_LG1152
LAN_TDK
1
R1
R2
R3
D5002-*1
ESD_MTK
D5002-*2
ADUC 5S 02 0R5L
4
10
11
D1
D2
D3
D4
R4
5.5V
ADUC 5S 02 0R5L
R5
R6
ESD_LG1152
R7
R8
D5003-*1
R9
R10[GND]
ESD_MTK
D5003-*2
ADUC 5S 02 0R5L
5.5V
ADUC 5S 02 0R5L
R11
YL_C
YL_A
GN_C
GN_A
12
SHIELD
THE
LAN_VERTICAL
2011.12.09
50
Ethernet Block
+3.3V_NORMAL
+3.3V_NORMAL
C5203
0.1uF
16V
4.7K
C5201
0.1uF
16V
R5215
Place 0.1uF close to each power pins

LAN_JACK_POWER
R5216
C5200
4.7uF
10V
4.7K
+3.3V_NORMAL
EPHY_LINK
EPHY_ACTIVITY
R5217 4.7K
ET_RXER
ET_COL/SNI
Place this cap. near IC
EPHY_CRS_DV
ET_RXER
ET_COL/SNI
C5206
15pF
50V
R5210
X5200
25MHZ
+3.3V_NORMAL
22
25MHz, CL 18pF, ESR , max 30 Ohm, +/-30ppm
MDI+[0]
MDI-[0]
MDI+[1]
EPHY_TDP
EPHY_TDN
LED0/PHYAD[0]/PMEB
23
MDIO
22
MDC
21
PHYRSTB
20
TXEN
EPHY_LINK
C5212
0.1uF
OPT
EPHY_TXD1
TXC
TXD[0]
+3.3V_NORMAL
100NH
EPHY_REFCLK
EPHY_TXD0
C5202
56pF
56pF
EPHY_INT
R5208
4.7K
EPHY_RXD1
L5211
DVDD33
RXC
C5209
RXD[3]/CLK_CTL
RXD[1]
R5207
22
9
RXD[0]
22
R5206
/RST_PHY
EPHY_EN
C5211
0.1uF
16V
Place near IC
EPHY_RXD0
EPHY_MDIO
EPHY_MDC
16
TXD[1]
4.7K
15
TXD[2]
17
14
18
8
13
RXDV
12
19
AVDD33_1
11
TXD[3]
1/16W
5%
24
R5212
1.5K
CRS/CRS_DV
25
26
COL
RXER/FXEN
DVDD10OUT
AVDD33_2
+3.3V_NORMAL
MDI-[1]
EPHY_RDN
R5203
IC5200
RTL8201F-VB-CG
22 RXD[2]/INTB
+3.3V_NORMAL
THERMAL
33
R5201
EPHY_RDP
27
28
29
RSET
AVDD10OUT
Route Single 50 Ohm, Differential 100 Ohm
10
R5204
2.49K 1%
CKXTAL1
Place this Res. near IC
30
[EP]
C5205
0.1uF
16V
32
C5204
10uF
10V
OPT
31
CKXTAL2
50V
LED1/PHYAD[1]
R5205
C5207
15pF
Place this cap. near IC
EPHY_ACTIVITY
C5210
10uF
10V
OPT
C5208
0.1uF
16V
THE
LG1152 A0
ETHERNET
14
50
+3.3V_NORMAL
DUAL COMPONENT
C5415
1000pF
50V
2ND : 0TR387500AA
50V
1ST : 0TRIY80001A
C5416
L5401
BLM18PG121SN1D
AUD_MASTER_CLK
+24V_AMP
22000pF
Q1801
AMP_RESET_N
OPT
R5406
3.3
3.3K
AVDD_PLL
LF
DGND_PLL
GND_1
10K
E
PVDD1_1
PVDD1_2
PVDD1_3
OUT1A_1
OUT1A_2
PGND1A
BST1A
/RESET
AD
R5414
12
38
39
40
41
42
43
44
45
46
37
33
BST1B
32
VDR1
31
VCC_5
28
BST2A
WCK
10
27
PGND2A
BCK
11
26
OUT2A_2
SDA
12
25
OUT2A_1
R5408
12
R5415
5.1K
C5434
0.47uF
50V
SPEAKER_L
C5437
0.1uF
50V
NRS6045T100MMGK
R5412
12
R5416
5.1K
C5425
22000pF
50V
WAFER-ANGLE
SPK_L-
SPK_R+
C5427
1uF
25V
C5428
1uF
25V
C5433
1uF
25V
SPK_R-
C5426
22000pF
50V
P5400
24
23
22
21
20
19
18
17
NRS6045T100MMGK
C5430
390pF
50V
D5401
1N4148W
100V
OPT
C5436
0.1uF
50V
SPK_L+
SDATA
0x54
L5404
10.0uH
SPK_L-
VDR2
C5417
22000pF
PVDD2_3
PVDD2_2
PVDD2_1
SPK_R+
OUT2B_2
PGND1B
AGND
OUT2B_1
R5400
AMP_MUTE
100 C5404
1000pF
Q5400
50V
MMBT3904(NXP)
34
29
PGND2B
OUT1B_1
30
BST2B
R5405
35
SCL
R5401
10K
OUT1B_2
MONITOR2
C5408
33pF
50V
C5406
33pF
50V
+3.3V_NORMAL
R5407
12
L5405
10.0uH
DVDD
16
100
IC5400
NTP-7500L
15
100
R5403
SPK_L+
DGND
AUD_SCK
R5402
THERMAL
49
MONITOR1
C5412
0.1uF
16V
2
3
AUD_LRCK
I2C_SDA1
OPT
C5424
0.01uF
50V
D5400
1N4148W
100V
OPT
36
DVDD_PLL
AUD_LRCH
I2C_SCL1
C5422
10uF
35V
C5420
0.1uF
50V
C5429
390pF
50V
AGND_PLL
R5404
OPT
C5410
10uF
10V
C5418
0.1uF
50V
C5411
0.1uF
16V
47
C5407
4.7uF
10V
14
100pF
50V
OPT
C5405
10uF
10V
MONITOR0
C5402
C5403
1000pF
50V
/FAULT
C5401
0.1uF
50V
48
C5400
0.1uF
50V
GND_IO
16V
OPT
C5409
10uF
10V
CLK_I
0.1uF
L5400
CIS21J121
C5414
10uF
10V
[EP]
C5413
13
+24V
VDD_IO
+24V_AMP
+24V_AMP
D5402
1N4148W
100V
OPT
R5409
12
R5413
12
C5419
C5421
C5423
0.1uF
50V
0.1uF
50V
10uF
35V
D5403
1N4148W
100V
OPT
L5403
10.0uH
C5432
390pF
50V
R5410
12
L5402
10.0uH
NRS6045T100MMGK
C5431
390pF
50V
NRS6045T100MMGK
R5411
12
C5435
0.47uF
50V
C5438
R5417
0.1uF
50V
5.1K
C5439
R5418
0.1uF
50V
5.1K
SPEAKER_R
50V
WOOFER_MUTE
SPK_R-
WOOFER_MUTE
TP5403
THE
AMP_NEO
2011.11.21
54
+24V_AMP_WOOFER
+24V
L5501
CIS21J121
WOOFER
C5529
0.1uF
50V
WOOFER
+3.3V_NORMAL
FW25001-02(SPK 2P)
WOOFER
C5513
1000pF
50V
WOOFER
LF
DGND_PLL
GND_1
DGND
100 WOOFER
C5510
1000pF
50V
THE
PVDD1_2
PVDD1_1
37
38
OUT1A_1
OUT1A_2
PVDD1_3
39
40
42
PGND1A
BST1A
AD
GND_IO
CLK_I
VDD_IO
/RESET
44
45
35
OUT1B_1
34
PGND1B
33
BST1B
32
VDR1
31
VCC_5
30
AGND
26
OUT2A_2
12
25
OUT2A_1
50V
0.1uF
50V
L5503
10.0uH
NRS6045T100MMGK
L5504
10.0uH
WOOFER
R5512
12
WOOFER
C5534
0.1uF
50V
WOOFER
WOOFER
C5532
0.47uF
50V
WOOFER
WOOFER
C5535
0.1uF
50V
NRS6045T100MMGK
WOOFER
R5515
5.1K
WOOFER
R5516
5.1K
SPK_WOOFER_L-
WOOFER
C5523
22000pF
50V
P5501
250A1-WR-H03B
WOOFER
C5525
1uF
25V
WOOFER
C5526
1uF
25V
WOOFER
C5531
1uF
25V
SPK_WOOFER_R-
SPK_WOOFER_R+
WOOFER
C5524
22000pF
50V
WOOFER_STEREO
WOOFER_STEREO
24
PVDD2_3
PVDD2_2
PVDD2_1
OUT2B_2
OUT2B_1
BST2B
MONITOR2
WOOFER
C5515
22000pF
WOOFER
C5519
0.1uF
50V
WOOFER
R5514
12
WOOFER
C5528
D5502
1N4148W
100V
OPT
WOOFER
C5521
10uF
35V
R5500
12
WOOFER_STEREO
R5511
12
C5530
390pF
50V
WOOFER_STEREO
+24V_AMP_WOOFER
WOOFER
C5517
WOOFER
R5507
12
WOOFER
C5527
390pF
50V
390pF
50V
WOOFER
R5508
12
D5501
1N4148W
100V
OPT
WOOFER_MONO
5%
1/16W
11
SDA
23
BCK
22
PGND2A
21
27
20
10
19
WCK
17
BST2A
16
28
5%
1/16W
WOOFER_MUTE
OUT1B_2
29
4.7K
R5518
WOOFER_MONO
WOOFER
R5504
36
13
C5505
33pF
50V
SPK_WOOFER_L+
SPK_WOOFER_L+
SCL
C5503
33pF
50V
WOOFER
WOOFER
WOOFER
R5502
100
C5522
0.01uF
50V
D5500
1N4148W
100V
OPT
SDATA
AUD_SCK
I2C_SCL1
WOOFER
C5520
10uF
35V
VDR2
AUD_LRCK
I2C_SDA1
WOOFER
C5518
0.1uF
50V
DVDD
AUD_LRCH
WOOFER
R5501
100
WOOFER
IC5500
NTP-7500L
15
C5509
0.1uF
16V
MONITOR1
WOOFER
DVDD_PLL
THERMAL
49
MONITOR0
OPT
C5507
10uF
10V
1
2
SPK_WOOFER_L-
OPT
WOOFER
C5516
0.1uF
50V
4.7K
R5517
AVDD_PLL
46
AGND_PLL
3.3K
47
OPT
C5506
10uF
10V
14
100pF
50V
OPT
C5502
10uF
10V
WOOFER
C5501
1000pF
50V
WOOFER
R5503
WOOFER
C5508
0.1uF
16V
/FAULT
WOOFER
C5500
WOOFER
C5504
4.7uF
10V
C5512
10uF
10V
[EP]
16V
48
0.1uF
WOOFER
OPT
R5506
3.3
41
C5514
AUD_MASTER_CLK
+24V_AMP_WOOFER
22000pF
10K
WOOFER
C5511
WOOFER
50V
WOOFER
R5505
PGND2B
BLM18PG121SN1D
P5500
AMP_RESET_N
43
WOOFER
L5500
18
WOOFER AMP.
D5503
1N4148W
100V
OPT
WOOFER_STEREO
C5533
390pF
50V
R5509
12
R5510
12
WOOFER_STEREO WOOFER_STEREO
SPK_WOOFER_R+
WOOFER_STEREO
L5502
10.0uH
NRS6045T100MMGK
WOOFER_STEREO
L5505
10.0uH
NRS6045T100MMGK
WOOFER_STEREO
C5536
0.47uF
50V
WOOFER_STEREO
WOOFER_STEREO
R5513
C5537
0.1uF
5.1K
50V
WOOFER_STEREO
WOOFER_STEREO
C5538
R5519
0.1uF
50V
5.1K
SPK_WOOFER_R-
+12V
EU
AUD_OUT >> EU/CHINA_HOTEL_OPT
IC6000
AZ4580MTR-E1
L6000
EU
EU
OUT1
C6000
1uF
25V
EU
OPT
OPT
R6002
C6002
470K
6800pF
33K
EU
R6004
C6003
33pF
EU
IN1-
IN1+
VEE
SCART_AMP_L_FB
C6004
EU
0.1uF
OUT2
50V
SIGN600005
R6011
2.2K
[SCART AUDIO MUTE]
EU
C6008
DTV/MNT_R_OUT
EU
3
VCC
IN2-
R6008
EU
33K
OPT
R6010
470K
OPT
1uF
C6007
25V
DTV/MNT_L_OUT
6800pF
+3.5V_ST
EU
IN2+
C
C6005 EU
33pF
Q6000
MMBT3904(NXP)
SCART_AMP_R_FB
B
EU
Q6002
MMBT3906(NXP)
C
R6013
1K
EU
SCART_Rout
DTV/MNT_R_OUT
SCART_MUTE
EU
R6003
10K
SCART_Lout
OPT
R6012
4.7K
R6000
2.2K
DTV/MNT_L_OUT
THE
R6014
1K
EU
C
Q6001
MMBT3904(NXP)
R6001
10K
EU
EU
SCART AUDIO AMP
2011.11.21
60
CI POWER ENABLE CONTROL

+5V_CI_ON
+5V_NORMAL
C6202
0.1uF
16V
D
G
OPT
Q6201
AO3407A
CI
CI
R6241
22K
R6221
10K
OPT
R6223
4.7K
PCM_5V_CTL
R6218
10K
CI
C6207
4.7uF
10V
OPT
C6210
1uF
25V
OPT
R6248
10K
CI
R6242
2.2K
CI
C
Q6200
MMBT3904(NXP)
CI
CI
E
Option FOR MTK
Option FOR LG1152
C6210-*1
1uF
25V
CI_MTK
THE
CI SLOT
2011.10.31
62
+3.3V_NORMAL
EARPHONE AMP
L6400
120-ohm
BLM18PG121SN1D
C6403
10uF
10V
Place Near jack Side

C6405
0.1uF
16V
R6406
10
C6402
1uF
10V
C6400
1uF
10V
16
INL-
HP_LOUT_MAIN
15
1/16W
5%
+3.3V_NORMAL
14
13
12
11
HPVDD
C6406
2.2uF
10V
10
OPT
R6401
OPT
G0
OUTR
R6400
4.7K
5
R6402
4.7K
EAN60724701
7
PGND
CPN
C6407
2.2uF
10V
Q6400
MMBT3904(NXP)
HP_AMP_MUTE
INR-
HP_ROUT_MAIN
CPP
R6405
1K
SIDE_HP_MUTE
From Micom
HPVSS
C6401
1uF
10V
IC6400
TPA6132A2
G1
INR+
C6408
0.47uF
16V
R6404
4.7K
C
INL+
HP_LOUT
EN
VDD
SGND
OUTL
Close to the IC
R6407
10
R6403
4.7K
HP_ROUT
1/16W
5%
C6404
2.2uF
10V
C6409
0.47uF
16V
Low Pass Filter
THE
HEADPHONE AMP
2011.06.29
61
T/C/S & H/NIM & T2/C TUNER(EU & CHINA)

RF_SWITCH_CTL USE: T2/C,T/C,ATSC,DTMB.ISDB-T
TU6501
TDSN-G351D
TU6500
TDSS-G151D
TU6504
TDSH-T151F
TU6502
TDSQ-H051F
TU6503
TDSQ-G051D
+3.3V_TU
CHB
+5V_TU
L6508
BLM18PG121SN1D
RF_S/W_CTL
RESET
1
2
NC
T2/C_F/NIM_DEV
NC_1
RESET
CHB_V
+5V[SPLITTER] 1
RESET
SCL
RESET
TU_SCL
CHB
T/C/S2_V
N.C_1
OPT
R6511
100K
C6520
0.1uF
16V
BR_TW_CN_TUNER
R6500-*1
1K
T/C_H/NIM_V
CHB_CVBS
CHB_ERR
L9_T2/C/S
ATV_OUT
CHB_SYNC
IC6500
74LVC1G08GW
ERROR & VALID PIN
CHB_VAL
close to TUNER
TW_H/NIM
LNB_TX
LNB_OUT
5%
CHB_DATA
/TU_RESET
TU_TS_VAL
L9_T2/C/S
C6544
TU_TS_ERR
RF_SWITCH_CTL
C6501
10uF
10V
RESET
SCL
R6500
C6503
0.1uF
16V
GND
BR_TW_CN_TUNER
R6508-*1
R6508
100
SDA
+B1[3.3V]
SIF
5
6
+B2[1.8V]
CVBS
7
8
IF_AGC
DIF[P]
DIF[N]
9
10
11
SCL
1K
SDA
+B1[3.3V]
SIF
SDA
TU_SDA
SDA
+B1[3.3V]
M_+3.3V
+3.3V_TUNER
SIF
+B2[1.8V]
CVBS
IF_AGC
DIF[P]
DIF[N]
+B2[1.8V]
M_+1.8V
+1.8V_TUNER
CVBS
M_CVBS
CVBS
NC_2
M_IF_AGC
T/C_IF_AGC
C6551
100pF
50V
C6550
0.1uF
16V
C6500
NC_3
10
M_DIF[P]
10
T/C_DIF[P]
10
11
NC_4
11
M_DIF[N]
11
T/C_DIF[N]
11
0.1uF
16V
R6506
S_3.3V
12
N.C_2
12
13
S_1.8V
13
N.C_3
13
NC_5
14
S_CVBS
14
N.C_4
14
close to TUNER
15
C6507
100pF
50V
GND_1
15
GND_1
15
ERROR
16
SD_ERROR
16
ERROR
16
SYNC
17
SD_SYNC
17
SYNC
17
VALID
18
SD_VALID
18
VALID
18
NOT_L9_T2/C/S
R6516
470
R6518
82
R6520
220
TUNER_SIF
16V
R6521
220
2012 perallel
because of derating
E
C
R6515
4.7K
Q6500
MMBT3906(NXP)
B
+1.8V_TU
R6519
1K
T/C_H/NIM
Q6501
MMBT3906(NXP)
T/C/S2
T/C&AT&CHB
OPT
1. should be guarded by ground
IF_AGC2. No via on both of them
3. Signal Width >= 12mils
Signal to Signal Width = 12mils
Ground Width >= 24mils
100 T/C&AT&CHB
CHB
C6523
100pF
50V
IF_N
12
R6525
0
+5V_TU
+5V_TU
TU_CVBS
C6522
0.1uF
should be guarded by groumd

IF_P
+B4[1.23V]
GND
BR_TW_CN_TUNER
C6506-*1
68pF
50V
close to TUNER
C6514
0.1uF
16V
C6505
0.1uF
16V
close to Tuner
10
SHIELD
I2C_SDA6
+3.3V_TU
BR_TW_CN_TUNER
C6508-*1
68pF
50V
L6500
BLM18PG121SN1D
L9 ATSC
12
SHIELD
SIF
+B3[3.3V]
12
M_SIF
C6509
0.1uF
16V
CHB
C6510
1000pF
50V CN
T2/C&CHB&CN&BR
FE_TS_VAL
1/16W
5%
L9_T2/C/S
5%
I2C_SCL6
C6511
100pF
50V
R6526
100
ATV_OUT
R6509
C6508
33
18pF R6510
OPT
50V
33
C6506
OPT
18pF
50V
0.1uF
16V
MTK/L9_DVB/ATSC/NTSC
SCL
VCC
MTK/L9_DVB/ATSC/NTSC
RF_SWITCH
RF_SWITCH
+3.3V_TU
CHB_CLK
C6513
4700pF
50V CN
OPT
C6525
0.1uF
16V
NOT_DVB_S
T2/C_F/NIM
DVB_S
T2/C/S2
NOT_T/C&AT
CHB
T2/C
DVB_S&CHB
DVB_S&CHB
T2/C&CN
NOT_T/C&AT
DVB_S&CHB
Not_L9_T2/C/S NOT_T/C&AT
T/C&AT&CHB
CHB
L6507
+1.8V_TU
CN
NOT_DVB_S
NOT_T/C&AT
NOT_T/C&AT Not_L9_T2/C/S
T2/C
T2/C&CHB&CN
RF_SWITCH
Not_L9_T2/C/S
NOT_DVB_S
NOT_T/C&AT&CHB
T/C&AT&CHB
T2/C&CN
NOT_T/C&AT&CHB NOT_T/C&AT&CHB
+1.23V_TU
BR
CN
T/C&AT&CHB
+3.3V_D_Demod
OPT
C6528
10uF
6.3V
T2/C&CN&BR
L6502
BLM18PG121SN1D
AT_H/NIM
CHB
DVB_S
T2/C&CHB&CN
NOT_DVB_S
Not_L9_T2/C/S
H/NIM&CHB
T2/C&CHB&CN
Not_L9_T2/C/S NOT_T/C&AT&CHB Not_L9_T2/C/S
C6516
BLM18PG121SN1D
0.1uF
16V
T2/C&CHB&CN&BR
CHB_CVBS
L9_T2/C/S
CHB_ERR
CHB_SYNC
CHB_VAL
NOT_T/C&AT&CHB
AR6500 0
CHB_CLK
TU_TS_ERR
MCLK
19
SD_MCLK
D0
20
D1
D2
FE_TS_SYNC
MCLK
19
SD_SERIAL_D0 20
D0
20
21
N.C_1
21
D1
21
NOT_T/C&AT&CHB
AR6501
0
FE_TS_DATA[0]
22
N.C_2
22
D2
22
FE_TS_DATA[1]
D3
23
N.C_3
23
D3
23
FE_TS_DATA[3]
D4
24
N.C_4
24
D4
24
FE_TS_DATA[4]
25
N.C_5
25
D5
25
26
N.C_6
26
D6
27
N.C_7
27
D7
27
GND_2
28
GND_2
28
29
GND_3
19
TU_TS_VAL
FE_TS_CLK
CHB_DATA
FE_TS_DATA[0-7]
T2 : Max 1.7A
else : Max 0.7A
FE_TS_DATA[2]
D5
FE_TS_DATA[5]
FE_TS_DATA[6]
FE_TS_DATA[7]
NOT_T/C&AT
D6
D7
+3.3V_TU_IN
AR6502
0
NOT_T/C&AT&CHB
26
IC6501
AP2132MP-2.5TRG1
+1.23V_TU
[EP]
NOT_T/C&AT
R6527
R2
20K
1%
NOT_T/C&AT
R6528
11K
1%
R6529 R1
10K
1%
Seperate GND for CHB
29
SD_1.23V_DEMOD
30
+1.23V_S2_DEMOD
30
SD_RESET
S2_RESET
31
SD_3.3V_DEMOD32
N.C_8
DVB_S&CHB
L6501
BLM18PG121SN1D
2
+1.23V_TU
C6512
100pF
C6515
0.1uF
DVB_S&CHB
EN
R6523
10K
C6519
10uF
10V
DVB_S&CHB
10uF
16V
C6521
0.1uF
OPT
S2_F22_OUTPUT 33
10
DVB_S&CHB
GND
NOT_T/C&AT
C6533
+3.3V_D_Demod
OPT
R6512
2.2K
R6513
+3.3V_S2_DEMOD
32
33
PG
DVB_S&CHB
31
GND_3
SHIELD
1
C6540
0.1uF
THERMAL
28
7
ADJ
6
VOUT
VIN
2A
4
+5V_NORMAL
CN
R6528-*1
12K
1/16W
1%
NOT_T/C&AT
5
NC
VCTRL
NOT_T/C&AT
C6549
EAN61387601
/S2_RESET
10uF
+3.3V_D_Demod
16V
OPT
SD_SCL
34
S2_SCL
34
SD_SDA
35
S2_SDA
35
LNB
36
C6524
100pF
LNB_TX
R6503
36
GND_4
38
OPT
C6517
18pF
50V
OPT
C6518
18pF
50V
22
C6527
0.1uF
OPT
C6535
1uF
OPT
Vout=0.6*(1+R1/R2)
I2C_SCL4
DVB_S&CHB
CHB : Max 480mA

else : Max 240mA
37
R6504
SHIELD
LNB_OUT
SHIELD
22
I2C_SDA4
DVB_S&CHB
+3.3V_TU
+3.3V_D_Demod
IC6503
NOT_T/C&AT
L6506
BLM18PG121SN1D
AZ1117BH-1.8TRE1
NOT_T/C&AT
C6531
0.1uF
BR_F/NIM_V
CN_ATBM
TU6501-*1
TDSN-B051F
2
3
4
5
6
7
AT_H/NIM_V
TU6500-*1
TDSS-H151F
8
9
10
1
2
3
4
5
6
7
8
9
10
11
NC
11
RESET
12
13
SCL
14
SDA
15
+B1[3.3V]
16
SIF
17
18
+B2[1.8V]
19
CVBS
20
IF_AGC
21
DIF[P]
22
23
DIF[N]
24
25
12
26
SHIELD
27
28
RF_S/W_CTL
RESET
SCL
SDA
+B1[3.3V]
SIF
+B2[1.8V]
CVBS
NC_1
NC_2
10
NC_3
11
+B3[3.3V]
12
+B4[1.23V]
13
NC_4
14
GND
15
ERROR
16
SYNC
17
VALID
18
MCLK
19
D0
20
D1
21
D2
22
D3
23
D4
24
D5
25
D6
26
D7
27
IN
OUT
1
ADJ/GND
R6531
1
TU6503-*1
TDSQ-G351D
TU6501-*3
TDSN-C051D
RF_S/W_CTL
RESET
SCL
SDA
+B1[3.3V]
SIF
RF_S/W_CTL
RESET
4
5
SCL
6
SDA
7
8
+B1[3.3V]
+B2[1.8V]
CVBS
NC_1
SIF
10
+B2[1.8V]
11
CVBS
12
13
NC_2
NC_3
10
+B3[3.3V]
11
NC_1
14
NC_2
15
16
NC_3
17
+B4[1.23V]
12
NC_4
13
GND
14
ERROR
15
SYNC
16
+B3[3.3V]
18
+B4[1.23V]
19
NC_4
20
21
VALID
17
MCLK
18
GND
22
ERROR
23
24
SYNC
25
D0
19
D1
20
D2
21
D3
22
VALID
26
MCLK
27
D0
28
29
D4
23
D1
30
D2
31
32
D3
33
D5
24
D6
25
D7
26
28
27
D4
34
D5
35
36
D6
D7
28
SHIELD
NOT_T/C&AT
C6542
0.1uF
C6538
10uF
10V
T2/C/S2
CN_LG3921
TU6501-*2
TDSN-C251D
+1.8V_TU
+3.3V_TU
38
37
SHIELD
SHIELD
SHIELD
THE
N.C_1
RESET
C6546
10uF
10V
SCL
SDA
+B1[3.3V]
SIF
+B2[1.8V]
Close to the tuner
C6548
0.1uF
16V
CVBS
N.C_2
N.C_3
N.C_4
+B3[3.3V]
+B4[1.23V]
N.C_5
GND_1
ERROR
L9/BR_TW_CN_TUNER
R6532-*1
BLM18PG121SN1D
465mA(MAX)
SYNC
VALID
MCLK
150mA(MAX)
D0
D1
D2
120-ohm
D3
D4
D5
+3.3V_NORMAL
+3.3V_TU
D6
+5V_TU
+5V_NORMAL
D7
GND_2
GND_3
+B5[1.23V]
S2_RESET
+B6[3.3V]
S2_F22_OUTPUT
NOT_L9_BR_TW_CN Tuner
R6532
0
L6503
BLM18PG121SN1D
S2_SCL
S2_SDA
LNB
GND_4
C6526
0.1uF
16V
C6529
22uF
10V
C6530
0.1uF
16V
Close to the tuner
TUNER
C6532
0.1uF
16V
C6534
22uF C6536
22uF
10V
10V
C6539
0.1uF
16V
Close to the tuner
2011.11.21
65
DCDC_GND and A_GND are connected

DCDC_GND and A_GND are connected in pin#27
PCB_GND and A_GND are connected
DVB-S2 LNB Part Allegro

(Option:LNB)
Input trace widths should be sized to conduct at least 3A

Ouput trace widths should be sized to conduct at least 2A
2A
D6901-*1
LNB_SX34
D6903-*1
40V
40V
LNB_SX34
D6901
LNB_SMAB34
D6903
3A
40V
LNB_SMAB34
40V
C6901
0.01uF
50V
LNB
C6912
68uF
35V
LNB
C6902
1uF
50V
LNB
+12V_LNB
C6906
68uF
35V
LNB
LNB
L6900
33UH
SP-7850_33
LNB_OUT
close to Boost pin(#1)
DCDC_GND
D6900
MBR230LSFT1G
DCDC_GND
LNB
A_GND
BFO
22
NC_9
23
BFI
VIN
24
21
NC_8
20
NC_7
19
BFC
18
NC_6
17
NC_5
R6904
0
NC_1
IC6900
A8290SETTR-T
TDO
LNB
EXTM
16
NC_4
TDI
15
NC_3
LNB_TX
TCAP
THERMAL
29
A_GND
A_GND
+12V
27pF
+12V_LNB
C6917 LNB
0.1uF
50V
LNB
C6918
0.1uF
50V
LNB
OPT
C6909
A_GND
L6901
BLM18PG121SN1D
4.7K
LNB
LNB
R6901 33
OPT
C6908
27pF
LNB
R6900 33
LNB
0.22uF
R6903
C6907
DCDC_GND
Max 1.3A
IRQ
NC_2
SCL
ADD
SDA
VREG
GND
+3.3V_NORMAL
A_GND
R6905
0
14
22000pF
13
C6905
VCP
12
LNB
BOOST
11
C6903 0.1uF
LX
A_GND
A_GND
25
D6902-*1
LNB_SX34
40V
A_GND
GNDLX
C6900
0.22uF
25V
A_GND
D6902
LNB_SMAB34
40V
C6904
0.1uF
50V
26
LNB
LNB
10
30V
LNB
Close to Tuner
Surge protectioin
close to VIN pin(#25)
LNB
DCDC_GND
LNB
D6904
LNB
R6906
2.2K
1W
LNB
27
C6914
33pF
LNB
C6913
33pF
OPT
[EP]
C6916
18pF
LNB
28
C6915
18pF
OPT
C6911
0.1uF
50V
C6910
10uF
25V
LNB
2.4A
THE
I2C_SCL4
I2C_SDA4
A_GND
LNB
2011.11.21
69
[51Pin LVDS Connector]

(For FHD FRC3 HS_LVDS)
P7200
L/DIM0_SCLK
FI-RE51S-HF-J-R1500
L/DIM0_MOSI
L/DIM0_VS
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
NC
I2C_BE_SDA1
L/DIM0_SCLK
NC
I2C_BE_SCL1
L/DIM0_MOSI
NC
FRC3_RESET
L/DIM0_VS
NC
I2C_BE_SDA1
NC
I2C_BE_SCL1
NC
FRC3_RESET
LVDS_SEL
R7201
0
NC
FRC3_FLASH_WP
NC
R7200
10K
BPL_IN
L/DIM_ENABLE
GND
TP7204
LOCAL_DIM_EN
LOCAL_DIM_EN
RA0N
TXA0N
RA0P
TXA0P
RA1N
TXA1N
RA1P
TXA1P
RA2N
TXA2N
RA2P
TXA2P
GND
RACLKN
TXACLKN
RACLKP
TXACLKP
GND
RA3N
TXA3N
RA3P
TXA3P
RA4N
TXA4N
RA4P
TXA4P
GND
BIT_SEL
RB0N
TXB0N
RB0P
TXB0P
RB1N
TXB1N
RB1P
TXB1P
RB2N
TXB2N
RB2P
TXB2P
GND
RBCLKN
TXBCLKN
RBCLKP
TXBCLKP
GND
RB3N
TXB3N
RB3P
TXB3P
RB4N
TXB4N
RB4P
TXB4P
GND
PANEL_VCC
GND
GND
L7200
120-ohm
GND
GND
NC
VLCD
C7200
10uF
16V
OPT
C7201
1000pF
50V
OPT
C7202
0.1uF
16V
OPT
VLCD
VLCD
VLCD
52
GND
THE
LG1152 A0
Interface block
72
100
LOCAL DIMMING
[To LED DRIVER]
P7600
12507WR-08L
L/DIM_OUT
+3.3V_NORMAL
R7600
10K
OPT
R7601
10K
L/DIM_OUT
AR7600
33
1/16W
L/DIM0_SCLK
L/DIM0_MOSI
R7603
L/DIM_OUT
R7602
0
L/DIM_OUT
I2C_SCL1
I2C_SDA1
L/DIM_OUT
R7606
33
L/DIM0_VS
L/DIM_OUT
9
THE
R7607
4.7K
L/DIM_OUT
LOCAL DIMMING
2012.02.22
76
eMMC I/F
EMMC_VCCQ
10K
10K
10K
10K
R8104
R8105
R8106
R8107
EMMC_DATA[0]
A3
EMMC_DATA[1]
A4
EMMC_DATA[2]
A5
EMMC_DATA[3]
EMMC_DATA[4]
B2
EMMC_DATA[5]
B4
B3
EMMC_DATA[6]
EMMC_DATA[7]
B5
AR8101
22
1/16W
B6
DAT0
NC_25
DAT1
NC_26
DAT2
NC_27
DAT3
NC_28
DAT4
NC_29
DAT5
NC_30
DAT6
NC_31
DAT7
NC_32
NC_33
NC_34
M6
M5
CLK
NC_35
CMD
NC_36
NC_37
NC_38
A6
C5
E5
E8
AR8102
E9
22
E10
EMMC_CMD
F10
EMMC_RST
G3
G10
H5
OPT
J5
C8107
10pF
50V
K6
K7
K10
P7
P10
NC_3
NC_39
NC_4
NC_40
NC_23
NC_41
NC_42
NC_46
NC_43
NC_47
NC_44
NC_48
NC_45
NC_49
NC_52
NC_50
NC_58
NC_51
NC_59
NC_53
NC_66
NC_54
NC_73
NC_55
NC_80
NC_56
NC_81
NC_57
NC_82
NC_60
NC_116
NC_61
NC_119
NC_62
K5
RESET
OPT
C8100
0.1uF
16V
C6
M4
3.3V_EMMC
EMMC_VCCQ
N4
P3
EMMC_RESET_BALL
EMMC_CMD_BALL
EMMC_CLK_BALL
DAT6
DAT5
DAT4
DAT3
P5
VCCQ_1
VCCQ_2
VCCQ_3
VCCQ_4
VCCQ_5
C8105
0.1uF
16V
C8106
2.2uF
10V
E6
F5
J10
K9
VCC_1
VCC_2
VCC_3
VCC_4
EMMC_VDDI
C2
VDDI
C8104
0.1uF
16V
E7
G5
H10
K8
C8102
0.1uF
16V
C8103
2.2uF
10V
C4
N2
N5
P4
P6
VSS_1
SANDISK_EMMC_4GB
A7
EMMC_CLK
IC8100-*3
H26M31001EFR
IC8100-*1
H26M21001ECR
NC_63
NC_64
NC_65
NC_67
NC_68
NC_69
NC_70
NC_71
NC_72
NC_74
NC_75
NC_76
NC_77
NC_78
NC_79
NC_83
NC_84
NC_85
NC_86
NC_87
NC_88
NC_89
VSS_2
NC_90
VSS_3
NC_91
VSS_4
NC_92
VSSQ_1
NC_93
VSSQ_2
NC_94
VSSQ_3
NC_95
VSSQ_4
NC_96
VSSQ_5
NC_97
NC_98
NC_99
DAT3
DAT4
A2
A8
A9
A10
A11
A12
A13
A14
B1
B7
B8
B9
B10
B11
B12
Dont Connect Power At VDDI
B13
EMMC_VDDI
B14
C1
(Just Interal LDO Capacitor)
DAT5
NC_100
A1
C3
C7
NC_1
NC_101
NC_2
NC_102
NC_5
NC_103
NC_6
NC_104
NC_7
NC_105
NC_8
NC_106
NC_9
NC_107
NC_10
NC_108
NC_11
NC_109
NC_12
NC_110
NC_13
NC_111
NC_14
NC_112
NC_15
NC_113
NC_16
NC_114
NC_17
NC_115
NC_18
NC_117
NC_19
NC_118
NC_20
NC_120
NC_21
NC_121
NC_22
NC_122
NC_24
NC_123
DU1
DU2
DU3
DU4
DU5
DU6
DU7
DU8
THE
DUMMY_1
DUMMY_9
DUMMY_2
DUMMY_10
DUMMY_3
DUMMY_11
DUMMY_4
DUMMY_12
DUMMY_5
DUMMY_13
DUMMY_6
DUMMY_14
DUMMY_7
DUMMY_15
DUMMY_8
DUMMY_16
C8
A3
C9
A4
C10
A5
C11
B2
C12
B3
C13
B4
C14
B5
D1
B6
D2
DAT5
C8
DAT0
NC_25
DAT1
NC_26
DAT2
NC_27
DAT3
NC_28
DAT4
NC_29
DAT5
NC_30
DAT6
NC_31
DAT7
NC_32
NC_33
D3
NC_34
M6
D4
M5
D12
D13
CLK
NC_35
CMD
NC_36
NC_37
D14
E1
A6
E2
A7
E3
C5
E12
E5
E13
E8
E9
E14
F1
F2
DAT6
E10
F10
G3
F3
F12
G10
F13
H5
F14
J5
G1
K6
K7
G2
G12
K10
G13
P7
P10
G14
H1
NC_38
NC_3
NC_39
NC_4
NC_40
NC_23
NC_41
NC_42
NC_46
NC_43
NC_47
NC_44
NC_48
NC_45
NC_49
NC_52
NC_50
NC_58
NC_51
NC_59
NC_53
NC_66
NC_54
NC_73
NC_55
NC_80
NC_56
NC_81
NC_57
NC_82
NC_60
NC_116
NC_61
NC_119
NC_62
NC_63
H2
NC_64
K5
H3
RESET
H12
H13
H14
C6
J1
M4
J2
N4
J3
P3
J12
P5
VCCQ_1
VCCQ_2
VCCQ_3
VCCQ_4
VCCQ_5
J13
J14
K1
K2
EMMC_RESET_BALL
E6
F5
J10
K3
K9
K12
VCC_1
VCC_2
VCC_3
VCC_4
K13
K14
C2
L1
VDDI
L2
L3
L12
E7
L13
G5
H10
L14
M1
K8
M2
C4
M3
N2
M7
N5
M8
P4
P6
M9
M10
VSS_1
VSS_2
VSS_3
VSS_4
VSSQ_1
VSSQ_2
VSSQ_3
A2
A8
N3
A9
EMMC_CMD_BALL
A10
N7
A11
N8
A12
N9
A13
N10
A14
N11
B1
N12
B7
N13
B8
B9
N14
P1
B10
P2
B11
EMMC_CLK_BALL
B12
B13
B14
P12
C1
P13
C3
C7
DU9
DU1
DU10
DU2
DU11
DU3
DU12
DU4
DU13
DU5
DU14
DU6
DU15
DU16
NC_71
NC_72
NC_74
NC_75
NC_76
NC_77
NC_78
NC_79
NC_83
NC_84
NC_85
NC_86
NC_87
NC_88
NC_89
NC_90
NC_91
NC_92
NC_93
NC_94
NC_95
VSSQ_5
NC_97
NC_100
A1
N1
P14
NC_70
NC_99
M14
P11
NC_69
NC_98
M13
P9
NC_68
NC_96
M12
P8
NC_67
VSSQ_4
M11
N6
NC_65
DU7
DU8
NC_1
NC_101
NC_2
NC_102
NC_5
NC_103
NC_6
NC_104
NC_7
NC_105
NC_8
NC_106
NC_9
NC_107
NC_10
NC_108
NC_11
NC_109
NC_12
NC_110
NC_13
NC_111
NC_14
NC_112
NC_15
NC_113
NC_16
NC_114
NC_17
NC_115
NC_18
NC_117
NC_19
NC_118
NC_20
NC_120
NC_21
NC_121
NC_22
NC_122
NC_24
NC_123
C9
C10
C11
C12
C13
C14
D1
D2
A3
A4
A5
B2
B3
B4
B5
B6
DAT0
NC_25
DAT1
NC_26
DAT2
NC_27
DAT3
NC_28
DAT4
NC_29
DAT5
NC_30
DAT6
NC_31
DAT7
NC_32
D3
NC_33
D4
NC_34
D12
D13
M6
M5
CLK
NC_35
CMD
NC_36
D14
E1
E2
E3
E12
E13
E14
F1
F2
F3
F12
F13
F14
G1
G2
G12
G13
G14
H1
NC_37
NC_38
A6
A7
C5
E5
E8
E9
E10
F10
G3
G10
H5
J5
K6
K7
K10
P7
P10
NC_3
NC_39
NC_4
NC_40
NC_23
NC_41
NC_42
NC_46
NC_43
NC_47
NC_44
NC_48
NC_45
NC_49
NC_52
NC_50
NC_58
NC_51
NC_59
NC_53
NC_66
NC_54
NC_73
NC_55
NC_80
NC_56
NC_81
NC_57
NC_82
NC_60
NC_116
NC_61
NC_119
NC_62
H2
H3
H12
K5
RESET
H13
H14
J1
J2
J3
J12
J13
C6
M4
N4
P3
P5
VCCQ_1
VCCQ_2
VCCQ_3
VCCQ_4
VCCQ_5
J14
K1
K2
K3
K12
K13
E6
F5
J10
K9
VCC_1
VCC_2
VCC_3
VCC_4
K14
L1
L2
C2
VDDI
L3
L12
L13
L14
M1
M2
M3
M7
M8
M9
M10
E7
G5
H10
K8
C4
N2
N5
P4
P6
VSS_1
VSS_2
VSS_3
VSS_4
NC_63
NC_64
NC_65
NC_67
NC_68
NC_69
NC_70
NC_71
NC_72
NC_74
NC_75
NC_76
NC_77
NC_78
NC_79
NC_83
NC_84
NC_85
NC_86
NC_87
NC_88
NC_89
NC_90
NC_91
NC_92
VSSQ_1
NC_93
VSSQ_2
NC_94
VSSQ_3
NC_95
VSSQ_4
NC_96
VSSQ_5
NC_97
M11
NC_98
M12
NC_99
M13
NC_100
M14
N1
N3
N6
N7
N8
N9
N10
N11
N12
N13
N14
P1
P2
P8
P9
P11
P12
P13
P14
A1
A2
A8
A9
A10
A11
A12
A13
A14
B1
B7
B8
B9
B10
B11
B12
B13
B14
C1
C3
C7
NC_1
NC_101
NC_2
NC_102
NC_5
NC_103
NC_6
NC_104
NC_7
NC_105
NC_8
NC_106
NC_9
NC_107
NC_10
NC_108
NC_11
NC_109
NC_12
NC_110
NC_13
NC_111
NC_14
NC_112
NC_15
NC_113
NC_16
NC_114
NC_17
NC_115
NC_18
NC_117
NC_19
NC_118
NC_20
NC_120
NC_21
NC_121
NC_22
NC_122
NC_24
NC_123
IC8100-*2
KLM2G1HE3F-B001
C8
A3
C9
A4
C10
A5
C11
B2
C12
B3
C13
B4
C14
B5
B6
D1
D2
C8
DAT0
NC_25
DAT1
NC_26
DAT2
NC_27
DAT3
NC_28
DAT4
NC_29
DAT5
NC_30
DAT6
NC_31
DAT7
NC_32
NC_33
D3
D4
M6
D12
M5
D13
NC_34
CLK
NC_35
CMD
NC_36
NC_37
D14
NC_38
A6
E1
E2
A7
E3
C5
E12
E5
E13
E8
E14
E9
E10
F1
F2
F10
F3
G3
F12
G10
F13
H5
F14
J5
G1
K6
G2
K7
K10
G12
G13
P7
G14
P10
H1
NC_3
NC_39
NC_4
NC_40
NC_23
NC_41
NC_42
NC_46
NC_43
NC_47
NC_44
NC_48
NC_45
NC_49
NC_52
NC_50
NC_58
NC_51
NC_59
NC_53
NC_66
NC_54
NC_73
NC_55
NC_80
NC_56
NC_81
NC_57
NC_82
NC_60
NC_116
NC_61
NC_119
NC_62
NC_63
H2
NC_64
K5
H3
RSTN
H12
H13
C6
H14
J1
M4
J2
N4
P3
J3
P5
J12
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
J13
J14
K1
E6
K2
F5
J10
K3
K9
K12
VDDF_1
VDDF_2
VDDF_3
VDDF_4
K13
K14
C2
L1
VDDI
L2
L3
C4
L12
L13
E7
L14
G5
H10
M1
M2
K8
M3
N2
N5
M7
M8
P4
M9
P6
M10
VSS_1
VSS_2
VSS_3
SAMSUNG_EMMC_2GB
10K
R8103
IC8100
SDIN5D2-4G-974L1
AR8100
22
1/16W
HYNIX_EMMC_2GB
10K
R8102
R8116
10K
10K
R8101
R8117
10K
10K
R8100
47K
47K
47K
47K
R8107-*1
R8106-*1
R8105-*1
EMMC DATA LINE

10K PULL/UP
DEV_HYNIX_EMMC_4GB
EMMC_DATA[0-7]
R8104-*1
47K
47K
47K
R8103-*1
R8102-*1
R8101-*1
R8100-*1
47K
EMMC DATA LINE 47K PULL/UP
NC_65
NC_67
NC_68
NC_69
NC_70
NC_71
NC_72
NC_74
NC_75
NC_76
NC_77
NC_78
NC_79
NC_83
NC_84
NC_85
NC_86
NC_87
NC_88
NC_89
NC_90
NC_91
VSS_4
NC_92
VSS_5
NC_93
VSS_6
NC_94
VSS_7
NC_95
VSS_8
NC_96
VSS_9
NC_97
NC_98
M11
NC_99
M12
M13
A1
M14
A2
A8
N1
N3
A9
N6
A10
N7
A11
N8
A12
N9
A13
N10
A14
N11
B1
B7
N12
N13
B8
N14
B9
P1
B10
P2
B11
P8
B12
P9
B13
P11
B14
P12
C1
P13
C3
P14
C7
NC_100
NC_1
NC_101
NC_2
NC_102
NC_5
NC_103
NC_6
NC_104
NC_7
NC_105
NC_8
NC_106
NC_9
NC_107
NC_10
NC_108
NC_11
NC_109
NC_12
NC_110
NC_13
NC_111
NC_14
NC_112
NC_15
NC_113
NC_16
NC_114
NC_17
NC_115
NC_18
NC_117
NC_19
NC_118
NC_20
NC_120
NC_21
NC_121
NC_22
NC_122
NC_24
NC_123
C9
C10
C11
C12
C13
C14
D1
D2
D3
D4
D12
D13
D14
E1
E2
E3
E12
E13
E14
F1
F2
F3
F12
F13
F14
G1
G2
G12
G13
G14
H1
H2
H3
H12
H13
H14
J1
J2
J3
J12
J13
J14
K1
K2
K3
K12
K13
K14
L1
L2
L3
L12
L13
L14
M1
M2
M3
M7
M8
M9
M10
M11
M12
M13
M14
N1
N3
N6
N7
N8
N9
N10
N11
N12
N13
N14
P1
P2
P8
P9
P11
P12
P13
P14
DU9
DUMMY_1
DUMMY_9
DUMMY_2
DUMMY_10
DUMMY_3
DUMMY_11
DUMMY_4
DUMMY_12
DUMMY_5
DUMMY_13
DUMMY_6
DUMMY_14
DUMMY_7
DUMMY_15
DUMMY_8
DUMMY_16
DU10
DU11
DU12
DU13
DU14
DU15
DU16
eMMC
11.09.29
81
BLM18PG121SN1D
L8900
LOGO_LIGHT
+3.5V_ST
Place Near Micom

+3.5V_ST
LOGO_LIGHT
R8910
33
10K
R8902
OPT
LOGO_LIGHT
R8911
33
LOGO_LIGHT
LOGO_LIGHT
LOGO_LIGHT
R8901
10K
1
LOGO_LIGHT
2
3
4
LOGO_LIGHT
B
THE
P8900
12507WR-03L
C8900
0.1uF
16V
1K Q8900
R8903
MMBT3904(NXP) E
LOGO_LIGHT
IC9300
LG1132
XTAL(24.75MHz)
R9306
100
R9308
100
R9329
1M
R9310
100
AB17
SOC_TXA0P
AA17
SOC_TXA0N
Y16
SOC_TXA1P
Y17
SOC_TXA1N
AA16
SOC_TXA2P
AB16
SOC_TXA2N
AB15
SOC_TXACLKP
AA15
SOC_TXACLKN
Y14
SOC_TXA3P
Y15
SOC_TXA3N
AA14
SOC_TXA4P
AB14
SOC_TXA4N
R9301
100
R9303
100
R9305
100
R9307
100
R9309
100
R9311
100
A10
RXA0P
TXA0P
RXA0N
TXA0N
RXA1P
TXA1P
RXA1N
TXA1N
RXA2P
TXA2P
RXA2N
TXA2N
RXACLKP
TXACLKP
RXACLKN
TXACLKN
RXA3P
TXA3P
RXA3N
TXA3N
RXA4P
TXA4P
RXA4N
TXA4N
B10
C9
C10
B9
A9
A8
B8
C7
C8
B7
A7
TXA0N
TXA1P
X-TAL_1
XTAL_IN
TXA1N
X9300
24.75MHz
1
GND_1
TXA2P
TXA2N
+3.3V_NORMAL
+1.0VDC
GND_2
H8
X-TAL_2
XTAL_OUT
C9339
30pF
50V
C9333
30pF
50V
TXACLKP
TXACLKN
R9334
R9335
4.7K
10K
OPT
TXA3P
CS
SPI_CS
TXA3N
TXA4P
R9337
TXA4N
AB13
AA13
SOC_TXB0N
Y12
SOC_TXB1P
Y13
SOC_TXB1N
AA12
SOC_TXB2P
AB12
SOC_TXB2N
AB11
SOC_TXBCLKP
AA11
SOC_TXBCLKN
Y10
SOC_TXB3P
Y11
SOC_TXB3N
AA10
SOC_TXB4P
AB10
SOC_TXB4N
A6
RXB0P
TXB0P
RXB0N
TXB0N
RXB1P
TXB1P
RXB1N
TXB1N
RXB2P
TXB2P
RXB2N
TXB2N
RXBCLKP
TXBCLKP
RXBCLKN
TXBCLKN
RXB3P
TXB3P
RXB3N
TXB3N
RXB4P
TXB4P
RXB4N
B6
DO[IO1]
SPI_DI
C5
C6
B5
A5
A4
B4
C3
C4
B3
A3
TXB4N
TXB0P
WP
SPI/I2C For Aardvak Interface
TXB0N
FLASH_WP
TXB1P
TXB1N
+3.3V_NORMAL
TXB2P
P9300
TXB2N
12507WR-10L
H9
IC9301
W25X40BVSSIG
33
SOC_TXB0P
IC9300
LG1132
SPI FLASH(4M Bit)
TXA0P
LG1132_FLASH
R9304
100
1/16W
R9302
100
R9336
100K
R9300
100
GND
H14
C9365
0.1uF
H15
J8
VCC
J15
K8
K15
R9343
HOLD
L8
3.3K
6
L15
CLK
M8
SPI_SCLK
M15
N8
DI[IO0]
N15
SPI_DO
P8
P15
TXBCLKP
R8
TXBCLKN
R9
TXB3P
R10
R11
TXB3N
R12
TXB4P
2
TXB4N
R13
SPI_CS
R14
Y7
P9301
12507WS-04L
AA6
+3.3V_NORMAL
AB6
RXC1N
TXC1N
RXC2P
TXC2P
RXC2N
TXC2N
RXCCLKP
TXCCLKP
RXCCLKN
TXCCLKN
RXC3P
TXC3P
RXC3N
TXC3N
RXC4P
TXC4P
RXC4N
TXC4N
AB5
1
AA5
Y4
Y5
AA4
AB4
DEBUG 3
AB3
AA3
Y2
Y3
AA2
AB2
C17
C18
B17
A17
A16
B16
C15
C16
B15
A15
A14
RXD0P
TXD0P
RXD0N
TXD0N
RXD1P
TXD1P
RXD1N
TXD1N
RXD2P
TXD2P
RXD2N
TXD2N
RXDCLKP
TXDCLKP
RXDCLKN
TXDCLKN
RXD3P
TXD3P
RXD3N
TXD3N
RXD4P
TXD4P
RXD4N
TXD4N
B14
C13
C14
B13
A13
A12
B12
C11
C12
B11
A11
TXC1N
TEST MODE Configuration

LG1132 Has Internal Pull-up
SPI_SCLK
TXC2P
TXC2N
G4
H4
Default Setting
All H = Normal Operation Mode
SPI_DI
TXCCLKP
J4
K4
L4
TXCCLKN
6
TXC3P
3D_DEPTH_RESET
DEBUG
TXC3N
TXC4P
OPT
R9330
TMODE0
TXC4N
R9331
TXD0P
FLASH_WP
DEBUG
TXD0N
TXD1P
R9332
9
+3.3V_NORMAL
TXD1N
0
I2C_SDA2
OPT
TXD2P
R9333
10
TXD2N
TXDCLKN
TMODE[3:0]
0000 =>
0001 =>
0010 =>
0011 =>
0100 =>
1001 =>
1010 =>
1011 =>
1100 =>
1101 =>
1110 =>
1111 =>
M4
System PLL Test
LVDS Rx Isolation Test
LVDS Tx Isolation Test
LVDS Bypass Test
ALL PLL Test
DDR PLL IsolationTest
Functional Test
MBIST
Scan Test(Normal)
Scan Test (Adaptive)
Display PLL Test
Normal Operation
N4
P4
R4
R9338
100 OPT
R9339
R9340
TMODE0
T4
100 OPT
TMODE1
U4
100 OPT
TMODE2
TXD4P
TXD4N
100 OPT
R9341
TMODE3
W8
W9
W10
I2C_SCL2
OPT
W11
11
W12
W13
W14
+1.0VDC
I2C_SDA2
33
I2C_SCL2
R9316
33
E1
R9317
33
D1
I2C_SDA2
R9318
OPT 0
R9344
OPT 0
R9345
I2C_SCL2
33
SPI_DO
E3
GPIO[6]
GPIO[7]
SDA_M
GPIO[8]
SCL_M
GPIO[9]
SDA_S
GPIO[10]
SCL_S
GPIO[11]
GPIO[12]
F2
SMODE
F1
TMODE0
G3
TMODE1
G2
TMODE2
G1
TMODE3
SMODE
GPIO[13]
TMODE0
GPIO[14]
TMODE1
GPIO[15]
TMODE2
GPIO[16]
TMODE3
GPIO[17]
I2C_SDA1
I2C_SCL1
TRST_N
TRST_N
TDO
TDO
TDI
TDI
TCK
TCK
TMS
TMS
3D_DEPTH_RESET
GPIO[18]
H1
R9319
33
H3
H2
J3
J2
TRST_N
GPIO[19]
TDO
GPIO[20]
TDI
GPIO[21]
TCK
GPIO[22]
TMS
GPIO[23]
GPIO[24]
F3
PORES_N
GPIO[25]
GPIO[26]
AB21
XTAL_OUT
AA21
XTAL_IN
XTALO
GPIO[27]
XTALI
GPIO[28]
GPIO[29]
GPIO[30]
V1
U3
U2
U1
T3
T2
T1
D8
LG1132 HW RESET
D9
SMODE
D10
100
R9315
E2
GPIO[5]
V2
+3.3V_NORMAL
D11
D12
D13
R3
R9328
10K
SW9300
JTP-1127WEM
D14
R9342
B2
SPI_DI
V3
OPT
D15
D16
R2
3D_DEPTH_RESET
R1
P3
P2
Y22
C9336
4.7uF
AA22
+2.5V_AVDD
P1
N3
Y20
N2
AA20
N1
AB20
M3
+3.3V_XTAL_AVDD
AB19
M2
L1
L2
Monitoring Pins for

3D-Depth Interanl status
A19
L3
B19
K1
C19
K2
D4
K3
D5
J1
D6
+3.3V_IO Decaps
TXA1N
TXC1N
TXA2P
TXC2P
TXA2N
TXC2N
TXACLKP
TXCCLKP
E4
TXACLKN
TXCCLKN
TXA3P
TXC3P
TXA3N
TXC3N
TXA4P
TXC4P
TXA4N
TXC4N
TXB0P
TXD0P
TXB0N
TXD0N
TXB1P
TXD1P
TXB1N
TXD1N
TXB2P
TXD2P
TXB2N
TXD2N
TXBCLKP
TXDCLKP
TXBCLKN
TXDCLKN
TXB3P
TXD3P
TXB3N
TXD3N
TXB4P
TXD4P
TXB4N
TXD4N
+1.0VDC
E6
+2.5V LVDS_RX Decaps

+3.3V_IO
+2.5V_LG1132
E7
E8
+2.5V_LVDS_RX +2.5V_LVDS_RX
E9
C9353
4.7uF
10V
L9303
BLM18SG121TN1D
C9304
0.1uF
16V
OPT
C9300
0.1uF
16V
OPT
VDD_10
VSS_33
VDD_11
VSS_34
VDD_12
VSS_35
VDD_13
VSS_36
VDD_14
VSS_37
VDD_15
VSS_38
VDD_16
VSS_39
VDD_17
VSS_40
VDD_18
VSS_41
VDD_19
VSS_42
VDD_20
VSS_43
VDD_21
VSS_44
VDD_22
VSS_45
VDD_23
VSS_46
VDD_24
VSS_47
VSS_48
VDD33_1
VSS_49
VDD33_2
VSS_50
VDD33_3
VSS_51
VDD33_4
VSS_52
VDD33_5
VSS_53
VDD33_6
VSS_54
VDD33_7
VSS_55
VDD33_8
VSS_56
VDD33_9
VSS_57
VDD33_10
VSS_58
VDD33_11
VSS_59
VDD33_12
VSS_60
VSS_61
LVRX_VDD25_1
VSS_62
LVRX_VDD25_2
VSS_63
LVRX_VDD25_3
VSS_64
LVRX_VDD25_4
VSS_65
LVRX_VDD25_5
VSS_66
LVRX_VDD25_6
VSS_67
LVRX_VDD25_7
VSS_68
LVRX_VDD25_8
VSS_69
VSS_70
LVTX_VDD10_1
VSS_71
LVTX_VDD10_2
VSS_72
LVTX_VDD10_3
VSS_73
LVTX_VDD10_4
VSS_74
VSS_75
LVTX_VDD25_1
VSS_76
LVTX_VDD25_2
VSS_77
LVTX_VDD25_3
VSS_78
LVTX_VDD25_4
VSS_79
LVTX_VDD25_5
VSS_80
LVTX_VDD25_6
VSS_81
LVTX_VDD25_7
VSS_82
LVTX_VDD25_8
VSS_83
LVTX_VDD25_9
VSS_84
LVTX_VDD25_10
VSS_85
VSS_86
DISP_VDD
VSS_87
DR3P_VDD
VSS_88
SSP_VDD
VSS_89
XTAL_VDD
VSS_90
VSS_91
DISP_AVDD
VSS_92
DR3P_AVDD
VSS_93
SSP_AVDD
VSS_94
XTAL_AVDD
VSS_95
C9308
0.1uF
16V
OPT
C9311
10uF
10V
C9312
10uF
10V
VSS_97
A2
E5
TXC1P
VSS_32
VSS_96
+1.0V Power Separation
TXA1P
VDD_9
M1
D19
TXC0N
VSS_31
AA19
D18
TXA0N
VSS_30
VDD_8
Y21
D17
TXC0P
VDD_7
+1.0V_PLL_VDD
GPIO[31]
TXA0P
VSS_29
D7
33
R9314
SPI_DO
GPIO[4]
1
DEBUG
SPI_DI
SPI_CS
VDD_6
B1
C1
VSS_28
+2.5V_LVDS_TX
Default Setting(0)
0 : Boot From Ext. Flash(Normal Booting)
1 : Internal RAM Boot (JTAG Booting)
W1
10K
33
GPIO[3]
R9327
R9313
SPI_SCLK
10K
C2
H13
W2
10K
33
GPIO[2]
H12
System Configuration
W3
R9325
SPI_CS
R9312
GPIO[1]
R9323
SPI_SCLK
UART_TXD
NON_72INCH_LVDS_AB
R9321
10K
D2
GPIO[0]
VSS_27
VDD_5
H10
Y1
UART_RXD
VDD_4
W7
H11
D3
VSS_26
+2.5V_LVDS_RX
TXD3P
TXD3N
VSS_25
VDD_3
F4
TXC1P
TXDCLKP
VSS_24
VDD_2
+3.3V_IO
10K
Y6
TXC1P
SPI_DO
TXC0N
10K
AA7
RXC1P
R15
OPT
R9326
AB7
TXC0N
TXC0P
10K
AB8
RXC0N
B18
OPT
R9324
Y9
AA8
TXC0P
10K
Y8
A18
RXC0P
OPT
R9322
AA9
OPT
R9320
AB9
E17
VDD_1
E10
C9361
4.7uF
10V
E11
E12
E13
C9315
4.7uF
10V
C9318
4.7uF
10V
C9321
0.1uF
16V
OPT
C9324
0.1uF
16V
C9327
0.1uF
16V
OPT
C9330
0.1uF
16V
E14
E15
E16
VSS_1
VSS_98
VSS_2
VSS_99
VSS_3
VSS_100
VSS_4
VSS_101
VSS_5
VSS_102
VSS_6
VSS_103
VSS_7
VSS_104
VSS_8
VSS_105
VSS_9
VSS_106
VSS_10
VSS_107
VSS_11
VSS_108
VSS_12
VSS_109
VSS_13
VSS_110
VSS_14
VSS_111
VSS_15
VSS_112
VSS_16
VSS_113
VSS_17
VSS_114
VSS_18
VSS_115
VSS_19
VSS_116
VSS_20
VSS_117
VSS_21
VSS_118
VSS_22
VSS_119
E18
F5
F18
G5
G18
H5
H18
J5
J9
J10
J11
J12
J13
J14
J18
K5
K9
K10
K11
K12
K13
K14
K18
L5
L9
L10
L11
L12
L13
L14
L18
M5
M9
M10
M11
M12
M13
M14
M18
N5
N9
N10
N11
N12
N13
N14
N18
P5
P9
P10
P11
P12
P13
P14
P18
R5
R18
T5
T18
T19
U5
U18
U19
V4
V5
V6
V7
V8
V9
V10
V11
V12
V13
V14
V15
V16
V17
V18
V19
W4
W5
W6
W15
W16
W17
W18
W19
W20
W21
W22
Y18
Y19
AA1
AA18
AB18
VSS_23
+1.0VDC Decaps
+1.0VDC

+2.5V LVDS_TX Decaps
+3.3V_NORMAL
+3.3V_IO
+2.5V_LG1132
L9300
BLM18SG121TN1D
C9303
4.7uF
10V
C9301
4.7uF
10V
+2.5V_LVDS_TX
+2.5V_LVDS_TX
C9348
0.1uF
16V
OPT
L9304
BLM18SG121TN1D
C9316
4.7uF
10V
C9319
4.7uF
10V
C9354
0.1uF
16V
OPT
C9356
10uF
10V
C9360
10uF
10V
C9364
0.1uF
16V
OPT
C9366
0.1uF
16V
OPT
M9300
C9328
0.1uF
16V
C9322
0.1uF
16V
OPT
ALBLOCK
MDS62110218
M9301
ALBLOCK
MDS62110218
M9302
+3.3V_IO
+3.3V_XTAL_AVDD
C9307
4.7uF
10V
+1.0V_XTAL/DDR3 PLL/SS PLL/DIS PLL_VDD

M9303
+2.5V DDR PLL/SS PLL/DIS PLL AVDD Decaps

+3.3V_XTAL_AVDD
L9302
BLM18SG121TN1D
+2.5V_LG1132
+2.5V_AVDD
+1.0VDC
+2.5V_AVDD
THE
C9314
0.1uF
16V
C9317
4.7uF
10V
+1.0V_PLL_VDD
+1.0V_PLL_VDD
C9320
4.7uF
10V
C9323
0.1uF
16V
OPT
C9326
0.1uF
16V
OPT
C9352
4.7uF
10V
ALBLOCK
MDS62110218
L9309
BLM18SG121TN1D
L9305
BLM18SG121TN1D
C9310
4.7uF
10V
ALBLOCK
MDS62110218
+3.3V XTAL AVDD Decaps
For Heat Sink

C9357
4.7uF
10V
C9359
0.1uF
16V
C9363
0.1uF
16V
LG1152 B0
3D Depth
2011. 11. 28
DDR0 PHY VREF

+1.5VQ
IC9400
H5TQ1G63DFR-PBC
DDR_A[0-13]
IC9300
LG1132
+0.75V_VREF_M0
+0.75V_VREF_M0
+1.5VQ
+0.75V_VREF_M1
+1.5V_LG1132
+1.5VQ
R9406
1K
1%
DDR_A[0-13]
R9410
1K
1%
+0.75V_VREF_M1
N3
DDR_A[0]
DDR_A[1]
P7
P3
DDR_A[2]
DDR_A[3]
DDR_A[4]
DDR_A[5]
N2
DDR_A[6]
DDR_A[7]
R8
DDR_A[8]
DDR_A[9]
T8
DDR_A[10]
L7
P8
P2
R2
R3
R7
DDR_A[11]
DDR_A[12]
N7
T3
DDR_A[13]
Connect A13 for
Using 2Gbit Memory
B22
A2
DDR_A[2]
V20
DDR_A[3]
T20
DDR_A[4]
C22
DDR_A[5]
T21
DDR_A[6]
C21
DDR_A[7]
T22
DDR_A[8]
C20
DDR_A[9]
U22
DDR_A[10]
D22
DDR_A[11]
B21
DDR_A[12]
DDR_A[13]
D20
A3
N8
M3
100 1%
DDR_CLKN
DDR_CKE
+1.5VQ
K7
K9
DDR_ODT
J3
DDR_RASN
K3
DDR_CASN
L3
DDR_WEN
L8
A6
ZQ
A8
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
A13
VDD_5
VDD_6
VDD_7
DDR_DQS[1]
DDR_DQS_N[1]
DDR_DATA[0-15]
DDR_DM[0]
DDR_DM[1]
G7
K2
K8
Connect A13 for

Using 2Gbit Memory
N1
N9
BA1
DDR_DATA[2]
N20
BA2
DDR_DATA[3]
F22
DDR_DATA[4]
N22
DDR_DATA[5]
F20
DDR_DATA[6]
N21
DDR_DATA[7]
F21
DDR_DATA[8]
H21
DDR_DATA[9]
L22
DDR_DATA[10]
G22
DDR_DATA[11]
M20
DDR_DATA[12]
H22
DDR_DATA[13]
L21
DDR_DATA[14]
H20
DDR_DATA[15]
L20
A1
VDDQ_1
CK
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
A8
C1
C9
D2
E9
F1
H2
H9
J1
NC_1
NC_2
NC_4
DQSL
R9
VDD_9
J9
L1
L9
T7
A9
DQSU
VSS_1
DQSU
VSS_2
VSS_3
E7
D3
DDR_DATA[0]
E3
DDR_DATA[1]
F7
DDR_DATA[2]
F2
DDR_DATA[3]
F8
DDR_DATA[4]
H3
DDR_DATA[5]
H8
DDR_DATA[6]
G2
DDR_DATA[7]
H7
DML
VSS_4
DMU
VSS_5
VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
D7
DDR_DATA[9]
C3
DDR_DATA[10]
C8
DDR_DATA[11]
C2
DDR_DATA[12]
A7
DDR_DATA[13]
A2
DDR_DATA[14]
B8
DDR_DATA[15]
A3
DDR_DQS[1]
E1
DDR_DQS_N[1]
G8
DDR_CKE
J2
DDR_WEN
J8
DDR_RASN
M1
DDR_CASN
M9
DDR_ODT
P1
DDR_DM[0]
P9
DDR_DM[1]
T1
T9
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
J21
E20
R20
P20
P21
P22
G21
M21
R21
D21
DDR_BA[1]
R22
DDR_BA[2]
B1
DQU0
J22
DDR_BA[0]
+0.75V_VREF_D0
+0.75V_VREF_D1
VSSQ_1
K21
DDR_DQS_N[0]
B3
DQL6
DQL7
DDR_DATA[8]
K22
DDR_DQS[0]
C7
R9407
1K
1%
DDR_A[2]
DDR_A[3]
C9401
4.7uF
DDR_A[4]
C9413
0.1uF
C9417
1000pF
R9411
1K
1%
C9420
0.1uF
C9422
1000pF
C9407
4.7uF
DDR_A[5]
DDR_A[6]
DDR_A[7]
DDR_A[8]
DDR_A[9]
DDR_A[10]
+1.5VQ
+0.75V_VREF_D0
+1.5VQ
+0.75V_VREF_D1
DDR_A[11]
DDR_A[12]
DDR_A[13]
U20
DDR_RESET_N
R9403
240
A20
DDR_DQ[2]
DDR_DQ[3]
DDR_DQ[4]
R9408
1K
1%
DDR_DQ[1]
C9400
0.1uF
1K
1%
R9405
1K
1%
C9406
0.1uF
C9410
1000pF
R9409
1K
1%
C9415
0.1uF
C9419
0.1uF
C9421
1000pF
DDR_DQ[5]
DDR_DQ[6]
DDR_DQ[7]
DDR_DQ[8]
DDR_DQ[9]
DDR_DQ[10]
DDR_DQ[11]
DDR_DQ[12]
DDR_DQ[13]
DDR_DQ[14]
DDR_CK
+1.5VQ
DDR3 1.5V Decaps - Place these caps near Memory
DDR_CK_N
DDR_DQS[0]
DDR_DQS_N[0]
DDR_DQS[1]
DDR_DQS_N[1]
DDR_CKE
C9402 C9404 C9405 C9408 C9411 C9412 C9414 C9416 C9418
DDR_WE_N
DDR_RAS_N
DDR_CAS_N
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF

OPT
OPT
OPT
OPT
DDR_ODT
DDR_DM[0]
DDR_DM[1]
DDR_BA[0]
DDR_BA[1]
DDR_BA[2]
DDR_RST_N
DDR_ZQ_CAL
1%
B9
R9404
DDR_DQ[0]
DDR_DQ[15]
E21
DDR_CLKN
DQSL
DDR_A[1]
E22
DDR_CLK
NC_6
L9400
BLM18SG121TN1D
DDR_A[0]
DDR_A[14]
R1
G20
F3
B7
U21
B20
DDR_DATA[0-15]
DDR_DATA[1]
BA0
NC_3
DDR_DQS_N[0]
D9
M22
RESET
G3
+1.5VQ
DDR_DATA[0]
VDD_8
T2
DDR_DQS[0]
1%
B2
WE
DDR_RESET_N
R9402
240
A7
L2
K1
H1
VREFDQ
A5
J7
R9401
VREFCA
A4
M2
DDR_BA[1]
200
V21
DDR_A[1]
A15
DDR_BA[2]
R9400
DDR_A[0]
M7
DDR_BA[0]
DDR_CLK
M8
A1
A0
V22
D1
A21
D8
E2
DDR_VREF0
DDR_VREF1
DDR3 1.5V/0.75V Decap

- Place these caps near IC101
DDR_VDDQ_1
+0.75V_VREF_D0
E19
E8
F19
F9
G19
G1
H19
G9
J19
+1.5VQ
J20
K19
K20
L19
M19
N19
P19
R19
+0.75V_VREF_D1
DDR_VDDQ_2
DDR_VDDQ_3
DDR_VDDQ_4
DDR_VDDQ_5
DDR_VDDQ_6
DDR_VDDQ_7
C9403
0.1uF
C9409
0.1uF
DDR_VDDQ_8
DDR_VDDQ_9
DDR_VDDQ_10
DDR_VDDQ_11
DDR_VDDQ_12
DDR_VDDQ_13
THE
LG1132 DDR3
LG1132 DDR3
2011. 06 .28
3D-Depth Analog for 2.5V
+2.5V_LG1132
+2.5V
IC9500
+1.5V_LG1132
+1.5V_DDR
PG
+5V_USB
ZD9500
5.48VTO5.76V
VCC
R9500
EN
10K
BLM18PG121SN1D
1
THERMAL
IN
L9500
C9500
10uF
10V
Max 600 mA
[EP]
+3.3V_NORMAL
OUT
FB
R9502
4.3K R1
1%
SS
C9513
10uF
10V
1.5A
4
GND
C9501
2200pF
50V
R9501
2K
1% R2
C9514
0.1uF
16V
Place near USB JACK
Vout=0.8*(1+R1/R2)
L9 CORE for 1.0V

(UD Model only / LG1132 DDR=792Mh)
READY
LG1152 for 1.0V

+1.0VDC
+1.0V_VDD
OPT
+12V
Max 2000 mA
L9501
BLM18PG121SN1D
120-ohm
+1.0V_VDD
OPT
Max 2000 mA
L9502
IC9501
TPS54327DDAR [EP]GND
500
POWER_ON/OFF2_3
1%
R1
VFB
11K
VREG5
C9503
100pF
50V
VIN
VBST
16V
0.1uF
C9506
OPT
SW
L9503
3.6uH
OPT
33K
Switching freq: 700K
C9504
1uF
10V
OPT
R9505
OPT
SS
OPT
1%
THE
OPT R9503
R2
**UD Model
LG1132 DDR = 792Mhz
LG1152 1.0V ==> IC2501
LG1132 1.1V ==> IC2306
EN
OPT
OPT
**NON UD Model
LG1132 DDR = 668Mhz
LG1152 1.0V ==> IC2306
LG1132 1.0V ==> IC2306
R9504
10K
CIC21J501NE
THERMAL
+1.0VDC
C9502
10uF
16V
C9505
3300pF
50V
3A
GND
OPT
C9507
22uF
10V
OPT
C9508
22uF
10V
OPT
Vout=0.765*(1+R1/R2)
LG1132 Power
LG1132 POWER
2011. 06. 28
10K
R10007
10K
R10006
+3.3V_NORMAL
+3.3V_NORMAL
+12V_MOTOR
C10004
0.1uF
16V
8.2V
UDZS8.2B
8.2V
ZD10001
ZD10000
UDZS8.2B
R10009
100
C10005
0.1uF
16V
4.7K
BD6222HFP
R10023
4.7K
MOTOR_CLOSE_SW
MOTOR_OPEN_SW
R10022
IC10001
R10008
100
VREF
OPT
R10020 0
OUT1
L/DIM0_VS
MOTOR_CW
MOTOR+
R10019
R10029
100
FIN
GND
MOTOR_CCW
R10017
R10028
SIGN100013 100
RIN
OUT2
R10018
MOTOR-
A_DIM
OPT
R10034
P10000
R10033
VCC
12507WR-06L
MOTOR_SENSOR
CLOSE
JP10000
2
R10027
MOTOR_SENSOR
OPEN
MOTOR_SENSOR
JP10001
3
L10000
JP10002
MLB-201209-0120P-N2
MOTORJP10003
L10001
MOTOR+
JP10004
MLB-201209-0120P-N2
6
OPT
7
C10000
0.1uF
50V
C10001
0.1uF OPT
50V
MOTOR DRIVER
+12V_MOTOR
+12V
MAX 1500mA
Close to IC7406
MLB-201209-0120P-N2
L10003
MLB-201209-0120P-N2
L10002
C10011
10uF
50V
C10009
0.1uF
50V
20K
R10024
1%
1/16W
MOTOR_SENSOR_UP
R10030
20K
0
MOTOR_SENSOR_O
MOTOR_SENSOR_UP
C10008
0.1uF
50V
MOTOR_SENSOR
C10010
0.1uF
50V
MOTOR_SENSOR_UP
50V
MOTOR_SENSOR
R10036
MOTOR_SENSOR_UP
C10013
0.1uF
50V
10K
R10021
10K
R10026
OPT
JP10007
MO_SENS_TO_MAIN_UP
MOTOR_SENSOR
R10035
MOTOR_SENSOR_UP
MOTOR_SENSOR_UP
MOTOR_SENSOR_UP
1/16W
1%
R10014
22K
MOTOR_SENSOR
10K
OPT
R10013
50V
MOTOR_SENSOR_UP
C10003
0.1uF
MOTOR_SENSOR_O
C10007
0.1uF
MOTOR_SENSOR
22K
R10025
JP10005
R10016
1%
1/10W
R10005
51K
MOTOR_SENSOR_O
MOTOR_SENSOR
1/16W
1%
R10002
1K
MOTOR_SENSOR
50V
MOTOR_SENSOR
+12V_MOTOR
IC10000
KA4558D
1
1/10W
1%
Q10001
C
MMBT3906(NXP)
MOTOR_SENSOR
1/8W
1%
R10001
22K
1/16W
1%
1/16W
1%
MOTOR_SENSOR
Q10000
2SC3052
MOTOR_SENSOR
E
C10006
0.1uF
R10000
18K
MOTOR_SENSOR
R10003
10K
1/16W
1%
R10012
20K
JP10006
MOTOR_SENSOR
MOTOR_SENSOR
+3.3V_NORMAL
10K
MOTOR_SENSOR
R10010
+12V_MOTOR
MOTOR_SENSOR
R10015
12K
AC
MOTOR_SENSOR
R10011
MOTOR_SENSOR
MOTOR_SENSOR
1/10W
1%
MOTOR_SENSOR
C10002
0.1uF
25V
R10004
1K
MOTOR_SENSOR
MOTOR Ground
+12V_MOTOR
+12V_MOTOR
MOTOR_SENSOR
D10000
BAT54SWT1
C10012
0.1uF
50V
C10014
0.1uF
50V
MOTOR_SENSOR_UP
MOTOR SENSOR OPTION
THE
GP4
MOTOR CONTROL
2011.07.01
IR BLASTER
Pattern Width : 0.5mm

+3.3V_IR_Bla
+5V_NORMAL
IR_Bla
AO3438
Q11002
IR_Bla
Q11001
SBT2222A_AUK
L11001
BLM18PG121SN1D
IR_Bla
R11019
0
IR_Bla
IR_Bla
R11021
C11004 C11008
10uF
10uF
10V
IR_Bla IR_Bla
10K
DETECT
JP11001
D11002
IR_Bla
120
+3.3V_IR_Bla
R11015
D11001
IR_Bla
C11009
0.1uF
16V
OPT
IR_Bla
JP11002
Pattern Width : 0.5mm
10
IR_Bla
+3.3V_NORMAL
IR_Bla
R11020
GND
5
KJA-PH-0-0177
JK11001
C11006
0.1uF
16V
OPT
Close to JK11001
+3.3V_IR_Bla
+3.3V_IR_Bla
P11001
12507WS-04L
IC11002
MC96FR3128R
1
IR_Bla
VSS
IR_Bla
+3.3V_IR_Bla
IR_Bla
C11003
8MHz
22pF
X11001
50V
IR_Bla
C11005
22pF
50V
XIN
XOUT
P20/RESETB
P10/KS8/MOSI1
P11/KS9/MISO1
R11022
4.7K
IR_Bla
P12/KS10/INT0
P13/KS11/INT1
P14/KS12/SS1/INT2
C
IR_B_RESET
R11001
1K
Q11003
MMBT3904(NXP)
IR_Bla
IR_Bla
IR_Bla
C11010
0.1uF
16V
P15/KS13/XCK1/INT3
P16/KS14/MOSI0
P17/KS15/MISO0
E
P30/SS0/EC2/EXTREF
P31/XCK0/SENSOR
IRB_SPI_MOSI
IRB_SPI_MISO
IRB_SPI_SS
IRB_SPI_CK
THE
R11006
22 IR_Bla
R11007
22 IR_Bla
R11008
22 IR_Bla
R11009
22 IR_Bla
IR_Bla
28
27
26
25
24
23
22
21
20
10
19
11
18
12
17
13
16
14
15
VDD
REMOUT
DSCL
P22/INT3/DSDA
DSDA
P21/INT2/DSCL
4
5
P07/KS7
P06/KS6
P05/KS5/EC3
P04/KS4/EC0
P03/KS3/T3/PWM3
IR_B Micom Download
P02/KS2/T2
P01/KS1/T1/PWM1
P00/KS0/T0
P37/INT1/SS0
P36/INT0/XCK0
LG1152 A1
IR Blaster/Boost
2011. 06. 02
94
PA138 for 1.8V
+12V_BE
L109
MLB-201209-0120P-N2
Vout=0.765*(1+R1/R2)
+1.8V_PA138
+2.5V_PA138
IC102
TPS54327DDAR
R1
R119
R110
10K
C128
C131
C133
0.1uF
10uF
10uF
25V
25V
25V
[EP]GND
OPT
C117
EN
50V
30K
1%
VFB
VREG5
R2
22pF
R111
THERMAL
PA138 Block
Panel
MAX 1.24A
+1.8V_PA138
VIN
C126
VBST
R134
0
1/8W
L107
3.6uH
0.1uF 16V
SW
5%
NR8040T3R6N
R112
SS
22K
1%
GND
C119
C123
C134
C139
1uF
3300pF
22uF
22uF
10V
50V
10V
10V
tss(ms)=[C303(nF)*Vref]/Iss(uA)
UD_VCC
PA138 for 1.05V
PA138 for 2.5V
MAX 5.1A
+12V_BE
MAX 0.2A
+12V_BE
L118
C142
10uF
25V
+12V_BE
L119
C143
0.1uF
25V
C149
10uF
25V
L120
C151
0.1uF
25V
L101
MLB-201209-0120P-N2
L110
Vout=0.765*(1+R1/R2)
10uF
25V
25V
OPT
UD_VCC
+2.5V_FPGA
+2.5V_PA138
+1.05V_PA138
PANEL_POWER
IC103
TPS54327DDAR
R1
IC100
AOZ1038PI
+1.05V_PA138
L102
3.6uH
[EP]LX
R120
R113
0
NR8040T3R6N
PGND
330
100pF
C102
1%
50V
OPT
AGND
0.1uF
R104
1%
FB
22uF
10K
C113
22uF
10V
EN
50V
51K
C115
1%
3300pF
VFB
50V
OPT
VREG5
R2
COMP
10V
R108
EN
C111
R106
3.3K
SS
22K
10uF
25V
25V
R105
22K
OPT
R130
0
25V
VIN
R135
PANEL_VCC
SW
C145
0.1uF
25V
C147
0.01uF
50V
Q101
AO4423
S1
D4
L108
3.6uH
0.1uF 16V
C144
10uF
25V
OPT
+2.5V_PA138
C127
VBST
C148
10uF
25V
R126
1/8W 5%
10K
C150
10uF
25V
PANEL_CTL
S2
S3
D3
D2
D1
GND
C120
C124
C136
C140
1uF
3300pF
22uF
22uF
10V
50V
10V
10V
R123
R131
2K
OPT
R133
2K
OPT
C156
10uF
25V
OPT
C157
0.1uF
25V
1.8K
R125
10K
C
Q100
2SC3052
R124
OPT
3.3K
FPGA Block
Wafer
FPGA for 2.5V
MAX 6A
C153
10uF
25V
10K
1%
Vout=0.8*(1+R1/R2)
FPGA for 1.2V
TYP 6000mA
L115
L114
R127
1%
4700pF
50V
R2
C135
10uF
NR8040T3R6N
R115
C108
C132
0.1uF
OPT
22pF
R114
+2.5V_PA138
NC_1
25V
6.8K
NC_2
C100
VIN
THERMAL
R103
R1
C129
[EP]GND
10K
C118
C106
10uF
THERMAL
C104
MLB-201209-0120P-N2
MAX 3A
P100
+12V_BE
SMAW200-10
+12V_BE
UD_VCC
L100
MLB-201209-0120P-N2
L105
T-con power
MLB-201209-0120P-N2
+1.2V_FPGA
2
C122
C125
25V
OPT
10uF
10uF
25V
25V
+1.2V_FPGA
OPT
L103
3.6uH
IC104
AOZ1038PI
+2.5V_FPGA
L106
3.6uH
[EP]LX
1%
FB
EN
COMP
R107
3.3K
R2
22uF
3300pF
10V
10V
50V
OPT
C116
100pF
50V
OPT
C109
VIN
R116
0
C121
R117
0.1uF
47K
R102
22K
1%
AGND
NC_2
+3.3V
NC_1
EN
FB
1%
COMP
R121
3.3K
R2
PANEL_VCC
6
C137
C138
C141
22uF
22uF
3300pF
10V
10V
50V
OPT
3
7
4
8
L121
5
C130
9
L122
6
4700pF
50V
R118
22K
LG1122_RST
25V
4700pF
50V
22
22uF
R1
C114
10K
AGND
C112
R122
0.1uF
PGND
C110
THERMAL
C103
25V
22
11K
OPT
1%
R101
NC_1
R138
50V
OPT
VIN
NR8040T3R6N
+3.3V LG1122_RST
10K
100
NC_2
R109
100pF
R100
THERMAL
PGND
R1
C101
20037WR-05A00
NR8040T3R6N
R139
[EP]LX
P101
3
OPT
IC101
AOZ1038PI
+2.5V_FPGA
10uF
25V
R137
10uF
C107
R136
C105
10
C152
10uF
25V
C155
10uF
25V
C154
0.1uF
25V
C158
0.1uF
25V
Vout=0.8*(1+R1/R2)
1%
Vout=0.8*(1+R1/R2)
THE
EAX64768002
1.0
2012.06.05
1
21
FRC-III CORE for 0.95V
MAX 0.345A
FRC-III AIP for 1.8V
MAX 1.97A
+12V_BE
+12V_BE
L207
MLB-201209-0120P-N2
+1.8V_LG1122
+0.95V_LG1122
L213
+3.3V
MLB-201209-0120P-N2
C229
C233
0.1uF
10uF
10uF
16V
25V
25V
OPT
[EP]GND
C215
C226
22pF
30K
1%
VFB
Vout=0.765*(1+R1/R2)
VREG5
R2
EN
50V
OPT
THERMAL
R209
VIN
SS
22K
1%
C242
L204
3.6uH
EN
50V
OPT
1%
R217
SW
[EP]GND
10K
22pF
5.6K
C223
VBST
IC205
TPS54327DDAR
R230
R224
VFB
VREG5
R2
MAX 0.045A
C253
C256
0.1uF
10uF
10uF
16V
25V
25V
OPT
+0.95V_LG1122
C250
VBST
GND
SW
C237
C220
22uF
22uF
1uF
3300pF
10V
10V
10V
50V
NR8040T3R6N
SS
22K
C234
C216
R234
L210
3.6uH
0.1uF 16V
C259
VIN
R225
C243
1uF
GND
C260
C266
C247
22uF
22uF
3300pF
10V
10V
1%
50V
10V
FPGA for 2.7V
Vout=0.765*(1+R1/R2)
NR8040T3R6N
R210
R223
0
+1.8V_LG1122
0.1uF 16V
R1
IC202
TPS54327DDAR
10K
R208
THERMAL
R215
R1
FRC-III DDR3 for 1.5V
MAX 0.078A
FRC-III I/O for 3.3V
MAX 0.38A
+12V_BE
+12V_BE
L214
MLB-201209-0120P-N2
IC200
+3.3V
+2.7V_FPGA
TJ4220GDP-ADJ
+1.5V_LG1122
L206
+3.3V
+3.3V
MLB-201209-0120P-N2
R204
R1
R205
C213
3.6K
C202
C203
10uF
0.1uF
0.1uF
25V
16V
16V
OPT
EN2
NC_1
R2
7
ADJ/SENSE
100pF
1%
VOUT
R201
VIN3
0
C201
6
THERMAL
R200
C206
0.01uF
50V
1K
1%
R202
51K
C209
C210
C212
R206
10uF
10uF
0.1uF
18K
25V
25V
OPT
16V
1%
IC203
TPS54327DDAR
R214
[EP]GND
10K
50V
OPT
EN
VFB
1%
GND
VREG5
Vout=0.8*(1+R2/R1)
[EP]GND
C228
C231
0.1uF
10uF
10uF
16V
25V
25V
OPT
VIN
VBST
1%
C214
1%
1uF
C244
68K
1%
50V
OPT
EN
1%
SW
R218
L203
3.6uH
VFB
Vout=0.765*(1+R1/R2)
VREG5
R2
GND
C238
22uF
22uF
3300pF
10V
10V
10uF
10uF
16V
25V
25V
OPT
C261
+3.3V
C251
VBST
R232
L211
3.6uH
0.1uF 16V
SW
NR8040T3R6N
SS
22K
C232
C257
0.1uF
VIN
R228
C219
C254
[EP]GND
5.1K
1%
50V
10V
10K
22pF
R227
NR8040T3R6N
SS
22K
R1
22K
R226
C222
R207
R203
R1
+1.5V_LG1122
0.1uF 16V
R2
IC206
TPS54327DDAR
R231
C225
NC_2
THERMAL
THERMAL
0
NC4
C245
C248
1uF
0.01uF
10V
50V
GND
C262
C264
22uF
22uF
10V
10V
Vout=0.765*(1+R1/R2)
THCV Block
THCV for 1.8V
MAX 2.24A
THCV for 3.3V
MAX 2.962A
+12V_BE
+12V_BE
Vout=0.765*(1+R1/R2)
L212
L208
IC201
TPS54327DDAR
10K
C217
R212
22pF
OPT
EN
1%
VFB
VREG5
Vout=0.765*(1+R1/R2)
C235
10uF
10uF
16V
25V
25V
VIN
+1.8V_THCV
SS
22K
C240
1%
22pF
VBST
SW
GND
VREG5
C239
22uF
22uF
1uF
3300pF
10V
10V
C258
10uF
10uF
16V
25V
25V
OPT
+3.3V_THCV
C249
VBST
R233
0.1uF 16V
SW
L209
3.6uH
NR8040T3R6N
SS
22K
C236
C255
0.1uF
VIN
R222
C221
VFB
R2
C218
50V
EN
50V
OPT
R219
L205
3.6uH
C252
[EP]GND
1%
NR8040T3R6N
R213
68K
R221
IC204
TPS54327DDAR
10K
R220
C224
0.1uF 16V
R229
R1
5.1K
R2
THE
C230
0.1uF
OPT
30K
1%
C227
[EP]GND
THERMAL
R211
MLB-201209-0120P-N2
+2.5V_PA138
R216
R1
+3.3V_THCV
MLB-201209-0120P-N2
THERMAL
+2.5V_PA138
+1.8V_THCV
1%
C241
C246
1uF
3300pF
10V
50V
GND
C263
C265
22uF
22uF
10V
10V
EAX64768002
2012.06.05
1.0
21
[51P HS-LVDS input wafer]
IC300
LG1122
R306
100
R310
100
R314
100
R316
100
R318
100
R343
100
1%
1%
1%
1%
1%
1%
AC1
RXB4N
AC2
RXB4P
P300
RXB3N
+3.3V
FI-RE51S-HF-J-R1500
AB3
AC3
RXB3P
AB2
RXBCLKN
AB1
RXBCLKP
1
L/DIM0_SCLK
L/DIM0_MOSI
L/DIM0_VS
RXB2N
0.1uF
16V
RXB2P
AA1
AA2
Y3
RXB1N
AA3
RXB1P
D
RXB0P
Q300
2N7002A
R300
33
OPT
LG1122_RST
Y2
RXB0N
I2C_SDA_S
C302
Y1
R307
100
R311
100
R315
100
R317
100
R319
100
R344
100
1%
1%
1%
1%
1%
1%
W2
RXA4P
V3
RXA3N
8
9
W3
RXA3P
FLASH_WP
V2
RXACLKN
PWM_BPL
V1
RXACLKP
U1
RXA2N
10
+3.3V
U2
RXA2P
11
T3
RXA1N
12
U3
RXA1P
RXA0N
13
T2
RXA0N
14
RXA1N
0.1uF
16V
15
RXA1P
T1
RXA0P
RXA0P
C303
RXA2P
R301
RXACLKN
20
RXACLKP
R336
R337
L/D_L_CLK
R338
33 OPT
33 OPT
33 OPT
B26
L/D_R_V_SYNC
L/D_L_DATA
R339
33 OPT
E22
L/D_R_CLK
R340
L/D_R_DATA
R341
33 OPT
33 OPT
E2
C26
D24
Q301
2N7002A
18
19
L/D_L_V_SYNC
I2C_SCL_S
RXA2N
17
16
TX0P
RXA0N
TX0N
RXA1P
TX1P
RXA1N
TX1N
RXA2P
TX2P
RXA2N
TX2N
RXACLKP
TX3P
RXACLKN
TX3N
RXA3P
TX4P
RXA3N
TX4N
RXA4P
TX5P
RXA4N
TX5N
TX6P
W1
RXA4N
B2
RXA0P
G22
33
OPT
D2
E1
D1
D3
RXB0P
TX6N
RXB0N
TX7P
RXB1P
TX7N
RXB1N
TXA0P
RXB2N
TXA0N
RXBCLKP
TXA1P
RXBCLKN
TXA1N
RXB3P
TXA2P
RXB3N
TXA2N
RXB4P
TXACLKP
RXB4N
TXACLKN
TXA3P
L_VSOUT_LD
TXA3N
R_VSOUT_LD
TXA4P
M0_SCLK
TXA4N
M0_MOSI
TXB0P
M1_MOSI
TXB0N
M2_SCLK
TXB1P
M2_MOSI
TXB1N
M3_SCLK
TXB2P
M3_MOSI
TXB2N
22
RXA3N
23
RXA3P
24
RXA4N
25
UART_RX
+3.3V
UART_TX
R320
33
H3
SPI_SCLK
R321
33
G1
SPI_CS
R322
33
G2
R323
33
RXA4P
F2
SPI_DI
SPI_DO
26
R309
+3.3V
3.3K
27
31
R305
3.3K
RXB1N
R304
3.3K
30
R303
3.3K
RXB0P
R302
3.3K
RXB0N
29
F1
RXB2N
33
RXB2P
3.3K
R324
33 OPT
33 OPT
J1
R326
22
H1
I2C_SCL_S
R327
22
H2
R328
K3
L3
M3
+3.3V
R313
3.3K
OPT
SW300
RXBCLKP
JTP-1127WEM
40
RXB4N
41
RXB4P
R308
L1
33
L2
M1
TCK
N1
R330
R331
SPI_CS
TXB4N
N2
R333
33 OPT
33 OPT
42
RESET Input
1) LG1122_RST : From Main SOC
2) HW_RESET
: From HW Switch
3) SPI_DL_MODE : Download Mode to Flash Mem
R334
33 OPT
P3
N3
TXC1N
TXC2P
SCL_S
TXC2N
TXCCLKP
SMODE
TXC3P
TMODE1
TXC3N
TMODE2
TXC4P
TMODE3
TXC4N
TXD0P
TDO
TXD0N
TDI
TXD1P
TCLK
TXD1N
TMS
TXD2P
TXD2N
XTALO
TXD3P
XTALI
TXD3N
TXD4P
MON_SYNC0
C301
10uF
25V
51
LG1122_3DLR
R342
33
OPT
AC5
AE4
AD4
PWM_BPL
52
R335
33
R382
33
AC4
AF3
AE3
AD3
AF2
FRAME_OPT
TCON_OPT
SOC_OPT
REVERSE_OPT
DISPLAY_OPT
AE2
AD2
AE1
B25
B24
FRAME_OPT
A4
OPT
TCON_OPT
SOC_OPT
R355
10K
B5
REVERSE_OPT
R360
10K
R358
10K
OPT
C6
C5
B6
A6
A7
B7
LG1122_TXA0P
B23
LG1122_TXA0N
C22
LG1122_TXA1P
C23
LG1122_TXA1N
B22
LG1122_TXA2P
A22
LG1122_TXA2N
A21
LG1122_TXACLKP
B21
+3.3V
P301
LG1122_TXA3P
C21
R363
10K
LG1122_TXA3N
B20
R370
10K
MDS62110215
LG1122_TXA4N
L/D_L_CLK
L/DIMMING_OPT
M302
MDS62110215
GASKET_FRC3
OPT_READY_2
OPT_READY_1
LG1122_TXB0P
B19
LG1122_TXB1P
C19
LG1122_TXB1N
B18
LG1122_TXB2P
A18
L/D_L_DATA
LG1122_TXB0N
C18
R378
33
R379
33
L/D_L_V_SYNC
LG1122_TXB2N
A17
R374
10K
R371
10K
OPT
R364
10K
OPT
LG1122_TXBCLKP
B17
LG1122_TXBCLKN
C16
LG1122_TXB3P
C17
LG1122_TXB3N
B16
LG1122_TXB4P
A16
LG1122_TXB4N
P302
LG1122_TXC0P
B15
LG1122_TXC0N
C14
LG1122_TXC2P
A14
R381
LG1122_TXC3P
C13
LG1122_TXC3N
B12
12
JIG_OPT
Without_TCON
With_TCON
13
SOC_OPT
L9 (LG1152)
14
IMAGE_OPT
IMAGE_NORMAL
IMAGE_OPT
(for 72INCH)
(for NON_72INCH)
33
8
9
LG1122_TXC4N
15
DISPLAY_OPT
LG1122_TXD0P
B11
MTK
L/D_R_V_SYNC
LG1122_TXC4P
A12
120Hz
(for FRC3 JIG)

33
R380
LG1122_TXCCLKN
C12
LOW
240Hz
L/D_R_DATA
LG1122_TXCCLKP
B13
HIGH
FRAME_OPT
LG1122_TXC2N
A13
OPTION NAME
11
3
L/D_R_CLK
LG1122_TXC1N
B14
GPIO NO
LG1122_TXC1P
C15
OLED
LCD
L/D_ON_FRC
L/D_ON_MAIN
LG1122_TXD0N
C10
LG1122_TXD1P
C11
L/DIMMING_OPT
20
LG1122_TXD1N
B10
LG1122_TXD2P
A10
LG1122_TXD2N
A9
21
OPT_READY_1
22
OPT_READY_2
Default
OPT
LG1122_TXDCLKP
B9
LG1122_TXDCLKN
C8
Default
OPT
LG1122_TXD3P
C9
LG1122_TXD3N
B8
LG1122_TXD4P
A8
LG1122_TXD4N
GPIO[18]
GPIO[19]
GPIO[20]
GPIO[21]
GPIO[0]
GPIO[22]
GPIO[1]
GPIO[23]
GPIO[2]
GPIO[24]
GPIO[3]
GPIO[25]
GPIO[4]
GPIO[26]
GPIO[5]
GPIO[27]
GPIO[6]
GPIO[28]
GPIO[7]
GPIO[29]
GPIO[8]
GPIO[30]
GPIO[9]
GPIO[31]
GPIO[10]
C24
AD1
R1
R351
R345
33
33
3D_EN
XTAL(24.75MHz)
LG1122_3DLR
R352
47K
R2
R3
L/DIMMING_OPT
P1
OPT_READY_1
A25
OPT_READY_2
R372
1M
+3.3V
D23
D22
R353
R356
F22
4.7K
4.7K
R346
33
I2C_SCL_PQ
E3
R347
33
I2C_SDA_PQ
R348
33
A24
R349
OPT
33
X300
24.75MHz
1
GND_1
E23
F3
X-TAL_1
XTAL_IN
C304
27pF
50V
GND_2
X-TAL_2
C305
27pF
50V
XTAL_OUT
FLASH_WP
TCON_I2C_EN
P2
R350
10K
GPIO[11]
GPIO[12]
GPIO[13]
GPIO[14]
GPIO[15]
I2C Slave Address

0x1C (Direct access)
0xB2 (In-direct access)
+3.3V
SPI FLASH(4MByte)
@optio
Will be deleted pull-up resistor from B0+3D Depth Bd
R361
R365
4.7K
10K
IC301
MX25L3206EM2I-12G
SPI_CS
R367
GASKET_FRC3
R373
10K
OPT
LG1122_TXA4P
A20
CS#
5) GPIO[7] : 120Hz Mode --> 120Hz (Fixed)

240Hz Mode --> 240Hz (Fixed)
+3.3V
+3.3V
12507WR-08L
LG1122_TXACLKN
C20
3) GPIO[5] : 120Hz Mode --> 120 or 240Hz (Programmable)

240Hz Mode --> 240 or 480Hz (Programmable)
4) GPIO[6] : 120Hz Mode --> 120Hz (Fixed)
240Hz Mode --> 240Hz (Fixed)
DISPLAY_OPT
R377
10K
R369
10K
OPT

M301
+3.3V
R376
10K
A5
GPIO[1:0]
: Local Dimming Debugging
GPIO[7:3] = PWM[4:0]
+3.3V
R368
10K
R359
10K
OPT
C25
GPIO[16]
GPIO[17]
AB5
AD5
C300
10uF
25V
R357
10K
B4
TXD4N
MON_SYNC1
TX_LOCKN
AB4
TXDCLKP
TXDCLKN
VIREF_REXT
L300
MLB-201209-0120P-N2
C3
A11
TRST_N
C1
48
50
TXCCLKN
TMODE0
MON_INTR
PANEL_CTL
49
TXC1P
SDA_S
C2
47
TXC0P
SCL_M
45
46
C4
A15
TXC0N
SDA_M
AF6
AE6
R354
10K
OPT
12507WR-08L
SPI_DI
PORES_N
XTAL_OUT
R332
44
TXB4P
K1
XTAL_IN
43
TXB3N
SPI_DL_MODE
4
RXB3P
1
RXB3N
39
38
R329
TDI
TMS
LG1122_RST
TXB3P
SPI_SCLK
M2
TRST_N
TDO
37
UART_TXD
K2
10K
J3
RXBCLKN
36
J2
I2C_SDA_S
34
35
TXBCLKN
SPI_DO
RXB1P
32
UART_RXD
R312
R325
28
TXBCLKP
G3
+3.3V
B3
A19
M1_SCLK
+3.3V
A3
A23
RXB2P
21
+3.3V
A2
SO/SIO1
SPI_DI
HOLD#
FLASH_WP
R362
WP#
0
R366
10K
OPT
R375
3.3K
33
GPIO[8]
: External Vsync input for Local Dimming block
C306
0.1uF
VCC
GND
SCLK
SPI_SCLK
SI/SIO0
SPI_DO
GPIO[10]
: T-Con L/R Sync Monitor(AR)
GPIO[12:11]
: S/W I2C_Master CH
GPIO[26:16]
: BLU Direct Control CH
GPIO[28:27]
: I2C for PQ tunning
THE
All of OPT decaps must be placed on PCB Bottom side
Write Protection
- HIGH : Normal Operation
- LOW : Write Protection
EAX64768002
FRC3 & INPUT
2012.06.05
3
23
IC300
LG1122
B1
C7
D4
D5
D6
D7
D8
D18
D19
IC300
LG1122
+0.95VDC
D20
D21
+3.3V_IO
D25
D26
J9
J10
J11
J16
J17
J18
K9
K18
L9
L18
M9
M18
N9
N18
P9
P18
R9
R18
T9
T18
U9
U18
V9
V10
V11
V12
V13
V14
V15
V16
V17
V18
F6
VDD_1
VDD33_1
VDD_2
VDD33_2
VDD_3
VDD33_3
VDD_4
VDD33_4
VDD_5
VDD33_5
VDD_6
VDD33_6
VDD_7
VDD33_7
VDD_8
VDD33_8
VDD_9
VDD33_9
VDD_10
VDD_11
VDD18_1
VDD_12
VDD18_2
VDD_13
VDD18_3
VDD_14
VDD18_4
VDD_15
VDD18_5
VDD_16
VDD18_6
VDD_17
LVRX_VDD18_1
VDD_19
LVRX_VDD18_2
VDD_20
LVRX_VDD18_3
VDD_21
LVRX_VDD18_4
VDD_22
LVTX_VDD18_1
VDD_24
LVTX_VDD18_2
VDD_25
LVTX_VDD18_3
VDD_26
LVTX_VDD18_4
VDD_27
LVTX_VDD18_5
VDD_28
LVTX_VDD18_6
VDD_29
LVTX_VDD18_7
VDD_30
LVTX_VDD18_8
VDD_31
LVTX_VDD18_9
VDD_32
G6
LVTX_VDD_2
LVTX_VDD_3
+1.8LVDS_RX
+3.3V_IO
J6
L400
MLB-201209-0120P-N2
K6
Y6
AA6
+1.8V_LG1122
C407
0.1uF
16V
C403
4.7uF
10V
C400
4.7uF
10V
E6
+3.3V_IO
E7
E8
L405
MLB-201209-0120P-N2
L6
E9
E10
C410
0.1uF
16V
C411
10uF
25V
C414
10uF
25V
C417
4.7uF
10V
E11
C421
4.7uF
10V
E12
E13
E20
E14
F4
E15
G4
E16
H4
E17
J4
E18
AA5
E21
V4
E24
+1.8LVDS_TX
+1.8LVDS_TX
+1.8V_LG1122
U4
E19
+1.8VLVDS_TX Decaps
+1.8LVDS_RX
F5
F7
L401
MLB-201209-0120P-N2
W4
F8
+1.8LVDS_TX
D10
D11
F9
C408
0.1uF
16V
C404
4.7uF
10V
C401
4.7uF
10V
F10
F11
F12
D12
+0.95V Decaps
+0.9AVDD Decaps
F13
F14
D13
D14
F15
+0.95AVDD
+0.95VDC
F16
D15
D16
F17
D17
F18
+0.95VDC
F19
+1.8V_AVDD
+1.8V_LG1122
C412
10uF
25V
+1.8V_AVDD
J13
L402
MLB-201209-0120P-N2
J14
C418
0.1uF
16V
C415
10uF
25V
C420
0.1uF
16V
F21
F23
G5
G21
J15
+0.95AVDD
C402
4.7uF
10V
AE7
AF7
AVDD09_2
G23
C409
0.1uF
16V
C405
4.7uF
10V
H5
H8
+1.8V_AVDD
H9
AE5
AVDD18_1
+3.3V
H6
LVTX_VDD_4
AVDD09_1
+1.8LVDS_RX
+1.8V_LG1122
J12
LVTX_VDD_1
E4
E5
D9
VDD_23
F20
T4
VDD_18
+3.3V_IO Decaps
+1.8VLVDS_RX Decaps
H10
H11
AF5
AVDD18_2
+0.95V_LG1122
+0.95VDC
+0.95VDC
L404
MLB-201209-0120P-N2
+0.95AVDD
H12
H13
H14
L407
MLB-201209-0120P-N2
H15
H16
C413
4.7uF
10V
C416
4.7uF
10V
C419
4.7uF
10V
C422
4.7uF
10V
H17
H18
H19
H21
H22
H23
J5
J8
J19
J21
All of OPT decaps must be placed on PCB Bottom side
J22
K4
K5
K8
K10
K11
K12
K13
K14
K15
K16
K17
SPI/I2C For Aardvak Interface
UART For CPU
K21
For JTAG Interface

12507WR-04L
P400
P401
12507WR-10L
12507WR-08L
12507WR-04L
+3.3V
C406
0.1uF
16V
SPI_CS
SPI_DO
R405
33
TDI
L10
L11
OPT
R409
2
L8
L406
MLB-201209-0120P-N2
1K
L4
+3.3V
L5
L403
MLB-201209-0120P-N2
R400
K22
P403
P402
+3.3V
+3.3V
K19
I2C For PQ tunning
L12
2
3.3K
L13
UART_RX
L14
3
I2C_SDA_PQ
L15
L16
L17
SPI_SCLK
R406
R407
33
33
TMS
TCK
4
5
4
UART_TX
I2C_SCL_PQ
L19
L21
L22
M4
M5
SPI_DI
TDO
M6
M8
SPI_DL_MODE
R401
OPT
R408
33
TRST_N
M10
M11
M12
M13
M14
R402
FLASH_WP
M16
OPT
9
R403
M15
9
I2C_SDA_S
M17
M19
M21
10
R404
0
I2C_SCL_S
M22
N4
N5
11
N6
N8
N10
N11
N12
N13
N14
N15
N16
N17
N19
N21
N22
N24
P4
P5
P6
P8
THE
EAX64768002
P10
VSS_1
VSS_135
VSS_2
VSS_136
VSS_3
VSS_137
VSS_4
VSS_138
VSS_5
VSS_139
VSS_6
VSS_140
VSS_7
VSS_141
VSS_8
VSS_142
VSS_9
VSS_143
VSS_10
VSS_144
VSS_11
VSS_145
VSS_12
VSS_146
VSS_13
VSS_147
VSS_14
VSS_148
VSS_15
VSS_149
VSS_16
VSS_150
VSS_17
VSS_151
VSS_18
VSS_152
VSS_19
VSS_153
VSS_20
VSS_154
VSS_21
VSS_155
VSS_22
VSS_156
VSS_23
VSS_157
VSS_24
VSS_158
VSS_25
VSS_159
VSS_26
VSS_160
VSS_27
VSS_161
VSS_28
VSS_162
VSS_29
VSS_163
VSS_30
VSS_164
VSS_31
VSS_165
VSS_32
VSS_166
VSS_33
VSS_167
VSS_34
VSS_168
VSS_35
VSS_169
VSS_36
VSS_170
VSS_37
VSS_171
VSS_38
VSS_172
VSS_39
VSS_173
VSS_40
VSS_174
VSS_41
VSS_175
VSS_42
VSS_176
VSS_43
VSS_177
VSS_44
VSS_178
VSS_45
VSS_179
VSS_46
VSS_180
VSS_47
VSS_181
VSS_48
VSS_182
VSS_49
VSS_183
VSS_50
VSS_184
VSS_51
VSS_185
VSS_52
VSS_186
VSS_53
VSS_187
VSS_54
VSS_188
VSS_55
VSS_189
VSS_56
VSS_190
VSS_57
VSS_191
VSS_58
VSS_192
VSS_59
VSS_193
VSS_60
VSS_194
VSS_61
VSS_195
VSS_62
VSS_196
VSS_63
VSS_197
VSS_64
VSS_198
VSS_65
VSS_199
VSS_66
VSS_200
VSS_67
VSS_201
VSS_68
VSS_202
VSS_69
VSS_203
VSS_70
VSS_204
VSS_71
VSS_205
VSS_72
VSS_206
VSS_73
VSS_207
VSS_74
VSS_208
VSS_75
VSS_209
VSS_76
VSS_210
VSS_77
VSS_211
VSS_78
VSS_212
VSS_79
VSS_213
VSS_80
VSS_214
VSS_81
VSS_215
VSS_82
VSS_216
VSS_83
VSS_217
VSS_84
VSS_218
VSS_85
VSS_219
VSS_86
VSS_220
VSS_87
VSS_221
VSS_88
VSS_222
VSS_89
VSS_223
VSS_90
VSS_224
VSS_91
VSS_225
VSS_92
VSS_226
VSS_93
VSS_227
VSS_94
VSS_228
VSS_95
VSS_229
VSS_96
VSS_230
VSS_97
VSS_231
VSS_98
VSS_232
VSS_99
VSS_233
VSS_100
VSS_234
VSS_101
VSS_235
VSS_102
VSS_236
VSS_103
VSS_237
VSS_104
VSS_238
VSS_105
VSS_239
VSS_106
VSS_240
VSS_107
VSS_241
VSS_108
VSS_242
VSS_109
VSS_243
VSS_110
VSS_244
VSS_111
VSS_245
VSS_112
VSS_246
VSS_113
VSS_247
VSS_114
VSS_248
VSS_115
VSS_249
VSS_116
VSS_250
VSS_117
VSS_251
VSS_118
VSS_252
VSS_119
VSS_253
VSS_120
VSS_254
VSS_121
VSS_255
VSS_122
VSS_256
VSS_123
VSS_257
VSS_124
VSS_258
VSS_125
VSS_259
VSS_126
VSS_260
VSS_127
VSS_261
VSS_128
VSS_262
VSS_129
VSS_263
VSS_130
VSS_264
VSS_131
VSS_265
VSS_132
VSS_266
VSS_133
VSS_267
VSS_134
VSS_268
P11
P12
P13
P14
P15
P16
P17
P19
P21
P22
P24
R4
R5
R6
R8
R10
R11
R12
R13
R14
R15
R16
R17
R19
R21
R22
T5
T6
T8
T10
T11
T12
T13
T14
T15
T16
T17
T19
T21
T22
U5
U6
U8
U10
U11
U12
U13
U14
U15
U16
U17
U19
U21
U22
V5
V6
V8
V19
V21
V22
W5
W6
W8
W9
W10
W11
W12
W13
W14
W15
W16
W17
W18
W19
W21
W22
Y4
Y5
Y21
Y22
AA4
AA7
AA8
AA9
AA10
AA11
AA12
AA13
AA14
AA15
AA16
AA17
AA18
AA19
AA20
AA21
AA22
AA23
AB6
AB7
AB8
AB9
AB10
AB11
AB12
AB13
AB14
AB15
AB16
AB17
AB18
AB19
AB20
AB21
AB22
AB23
AC6
AC7
AC8
AC9
AC10
AC23
AC24
AC25
AC26
AD6
AD7
AD8
AD17
AD18
AE8
AF4
AF8
2012.06.05
4
21
IC300
LG1122
DDR1 PHY VREF
LG1122_DDR1_A[0-12]
+1.5VQ1
AB25
F26
AB24
Y24
G26
Y25
G25
Y26
G24
AA26
H26
F25
H24
AA25
F24
DDR0_A[0]
DDR1_A[0]
DDR0_A[1]
DDR1_A[1]
DDR0_A[2]
DDR1_A[2]
DDR0_A[3]
DDR1_A[3]
DDR0_A[4]
DDR1_A[4]
DDR0_A[5]
DDR1_A[5]
DDR0_A[6]
DDR1_A[6]
DDR0_A[7]
DDR1_A[7]
DDR0_A[8]
DDR1_A[8]
DDR0_A[9]
DDR1_A[9]
DDR0_A[10]
DDR1_A[10]
DDR0_A[11]
DDR1_A[11]
DDR0_A[12]
DDR1_A[12]
DDR0_A[13]
DDR1_A[13]
DDR0_A[14]
DDR1_A[14]
DDR0_DQ[0]
DDR1_DQ[0]
T26
L24
U24
K26
U26
K24
U25
K25
M25
R26
L26
T24
M26
R25
M24
R24
DDR1_DQ[1]
DDR0_DQ[2]
DDR1_DQ[2]
DDR0_DQ[3]
DDR1_DQ[3]
DDR0_DQ[4]
DDR1_DQ[4]
DDR0_DQ[5]
DDR1_DQ[5]
DDR0_DQ[6]
DDR1_DQ[6]
DDR0_DQ[7]
DDR1_DQ[7]
DDR0_DQ[8]
DDR1_DQ[8]
DDR0_DQ[9]
DDR1_DQ[9]
DDR0_DQ[10]
DDR1_DQ[10]
DDR0_DQ[11]
DDR1_DQ[11]
DDR0_DQ[12]
DDR1_DQ[12]
DDR0_DQ[13]
DDR1_DQ[13]
DDR0_DQ[14]
DDR1_DQ[14]
DDR0_DQ[15]
DDR1_DQ[15]
J26
J25
P26
P25
N26
N25
J24
W24
V24
V25
V26
L25
T25
W25
H25
W26
AA24
E25
DDR0_CK_N
DDR0_DQS[0]
DDR0_DQS_N[0]
DDR0_DQS[1]
DDR0_DQS_N[1]
DDR0_CKE
DDR0_WE_N
DDR1_CK
DDR1_CK_N
DDR1_DQS[0]
DDR1_DQS_N[0]
DDR1_DQS[1]
DDR1_DQS_N[1]
DDR1_CKE
DDR1_WE_N
DDR0_RAS_N
DDR1_RAS_N
DDR0_CAS_N
DDR1_CAS_N
DDR0_ODT
DDR1_ODT
DDR0_DM[0]
DDR1_DM[0]
DDR0_DM[1]
DDR1_DM[1]
DDR0_BA[0]
DDR1_BA[0]
DDR0_BA[1]
DDR1_BA[1]
DDR0_BA[2]
DDR1_BA[2]
DDR0_RST_N
DDR1_RST_N
DDR0_ZQ_CAL
E26
J23
DDR0_VREF1
DDR1_VREF0
N23
P23
R23
T23
U23
V23
W23
Y23
LG1122_DDR1_A[2]
P3
LG1122_DDR1_A[3]
N2
LG1122_DDR1_A[4]
P8
LG1122_DDR1_A[5]
P2
LG1122_DDR1_A[6]
R8
LG1122_DDR1_A[7]
R2
LG1122_DDR1_A[8]
T8
LG1122_DDR1_A[9]
R3
AD11
LG1122_DDR1_A[3]
AF24
LG1122_DDR1_A[4]
AE11
R505
1K
1%
R501
1K
1%
L500
MLB-201209-0120P-N2
LG1122_DDR1_A[5]
AE24
LG1122_DDR1_A[6]
AF11
LG1122_DDR1_A[7]
AD24
LG1122_DDR1_A[8]
AF10
LG1122_DDR1_A[9]
R502
1K
1%
C502
0.1uF
C504
1000pF
R506
1K
1%
C509
1000pF
C507
0.1uF
C516
4.7uF
10V
C512
4.7uF
10V
AF23
LG1122_DDR1_A[10]
LG1122_DDR1_A[10]
L7
AE25
LG1122_DDR1_A[11]
LG1122_DDR1_A[11]
R7
AD23
LG1122_DDR1_A[12]
LG1122_DDR1_A[12]
N7
T3
AE10
AD25
DDR1_VREF1
AD20
LG1122_DDR1_DATA[0]
+0.75V_VREF1_D0
+1.5VQ1
LG1122_DDR1_DATA[1]
+0.75V_VREF1_D1
+1.5VQ1
DDR1_VDDQ_2
DDR0_VDDQ_3
DDR1_VDDQ_3
DDR0_VDDQ_4
DDR1_VDDQ_4
DDR0_VDDQ_5
DDR1_VDDQ_5
DDR0_VDDQ_6
DDR1_VDDQ_6
DDR0_VDDQ_7
DDR1_VDDQ_7
DDR0_VDDQ_8
DDR0_VDDQ_9
DDR1_VDDQ_8
DDR1_VDDQ_9
DDR0_VDDQ_10
DDR1_VDDQ_10
DDR0_VDDQ_11
DDR1_VDDQ_11
DDR0_VDDQ_12
DDR1_VDDQ_12
A2
A3
LG1122_DDR1_DATA[2]
AF21
LG1122_DDR1_BA[1]
LG1122_DDR1_DATA[3]
LG1122_DDR1_BA[2]
AF14
LG1122_DDR1_DATA[4]
AD21
LG1122_DDR1_DATA[5]
AE14
LG1122_DDR1_DATA[6]
AE21
LG1122_DDR1_DATA[7]
AE19
LG1122_DDR1_DATA[8]
AF16
LG1122_DDR1_CLK
LG1122_DDR1_DATA[10]
AD15
C500
0.1uF
R504
1K
1%
C503
0.1uF
C506
1000pF
C508
0.1uF
A5
A6
A8
LG1122_DDR1_CKE
C511
0.1uF
C514
1000pF
A9
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
A13
VDD_5
VDD_6
LG1122_DDR1_ODT
LG1122_DDR1_RASN
R509
AE16
LG1122_DDR1_CASN
150
LG1122_DDR1_WEN
AE22
AF17
AE17
AF18
AE18
AD22
AD12
AD13
AE13
AF13
AE20
AE15
AE12
AE23
AF12
AD10
AD26
AC13
AC14
AC15
AC16
K7
K9
K1
J3
K3
L3
LG1122_DDR1_DQS[0]
LG1122_DDR1_CLKN
LG1122_DDR1_DQS_N[0]
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
WE
LG1122_DDR1_DQS[1]
LG1122_DDR1_DQS[1]
LG1122_DDR1_CKE
LG1122_DDR1_WEN
LG1122_DDR1_DATA[0-15]
LG1122_DDR1_RASN
LG1122_DDR1_DM[0]
LG1122_DDR1_DM[1]
LG1122_DDR1_CASN
NC_2
B7
D3
LG1122_DDR1_DM[0]
LG1122_DDR1_DATA[1]
F7
LG1122_DDR1_DM[1]
LG1122_DDR1_DATA[2]
F2
LG1122_DDR1_BA[0]
LG1122_DDR1_DATA[3]
F8
LG1122_DDR1_DATA[4]
H3
LG1122_DDR1_DATA[5]
H8
LG1122_DDR1_DATA[6]
G2
LG1122_DDR1_DATA[7]
H7
LG1122_DDR1_DATA[8]
D7
LG1122_DDR1_DATA[9]
C3
C8
C2
A7
A2
B8
A3
LG1122_DDR1_BA[1]
LG1122_DDR1_RESET_N
R500
240
1%
+0.75V_VREF1_D1
+0.75V_VREF1_D0
+0.75V_VREF1_D1
+1.5VQ1
DDR3 1.5V beCaps - Place these caps near Memory
+1.5VQ1
C501
0.1uF
C505
0.1uF
C510
0.1uF
C513
0.1uF
C515
0.1uF
C517
0.1uF
C518
0.1uF
DQSL
K8
N1
N9
R1
R9
A8
C1
C9
D2
E9
F1
H2
H9
J9
L1
L9
T7
NC_6
A9
DQSU
VSS_1
DQSU
VSS_2
VSS_3
E7
E3
LG1122_DDR1_BA[2]
NC_4
C7
LG1122_DDR1_DATA[0]
DDR3 1.5V/0.75V Decap

- Place these caps near IC100
K2
DQSL
LG1122_DDR1_ODT
+0.75V_VREF1_D0
G7
J1
NC_1
F3
G3
D9
A1
VDDQ_1
NC_3
LG1122_DDR1_DQS[0]
+1.5VQ1
VDD_9
CK
RESET
LG1122_DDR1_CLK
1%
BA1
T2
LG1122_DDR1_RESET_N
AE26
AC11
BA0
VDD_7
VDD_8
L2
AD16
100 1%
R511
240
B2
BA2
+1.5VQ1
R508
1K
1%
L8
ZQ
A7
J7
R510
AF19
AD19
M3
LG1122_DDR1_CLKN
1K
1%
1K
1%
LG1122_DDR1_DATA[9]
AF20
R507
R503
N8
H1
VREFDQ
A4
M2
LG1122_DDR1_BA[0]
VREFCA
A1
A15
LG1122_DDR1_DATA[0-15]
AD14
AC12
DDR0_VDDQ_2
M8
A0
M7
DDR1_VDDQ_1
K23
M23
P7
AF9
DDR0_VREF0
DDR0_VDDQ_1
L23
N3
LG1122_DDR1_A[1]
DDR1_ZQ_CAL
AB26
+0.75V_VREF1_M1
LG1122_DDR1_A[0]
LG1122_DDR1_A[1]
LG1122_DDR1_A[2]
AD9
+0.75V_VREF1_M0
+1.5VQ1
+1.5V_LG1122
LG1122_DDR1_A[0]
AF25
AF22
DDR0_CK
+1.5VQ1 +0.75V_VREF1_M1
AE9
AF15
DDR0_DQ[1]
+0.75V_VREF1_M0
IC500
H5TQ1G63DFR-PBC
LG1122_DDR1_A[0-12]
DML
VSS_4
DMU
VSS_5
VSS_6
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQL6
DQL7
B1
VSSQ_1
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
D1
D8
E2
E8
F9
G1
G9
AC17
AC18
AC19
AC20
AC21
AC22
THE
EAX64768002
2012.06.05
5
21
IC600
EP4CE15F23I7N
IC600
EP4CE15F23I7N
H5
B2
B1
G5
E4
E3
C2
C1
D2
SPLT_ASDO
D1
H7
H6
J6
SPLT_CSO
E2
E1
F2
F1
G4
G3
SPLT_STATUS
K6
L8
K8
J7
K7
J4
H2
H1
J3
J2
J1
SPLT_DCLK
SPLT_DATAO
SPLT_CONFIG
SPLT_TDI
SPLT_TCK
SPLT_TMS
SPLT_TDO
SPLT_CE
K2
K1
K5
L5
L2
L1
L4
L3
G1
IC600
EP4CE15F23I7N
T2
IO_1
T1
IO/DIFFIO_L1P
IO/DIFFIO_L1N
SPLT_TXD4P
IO_2
SPLT_TXD4N
IO/DIFFIO_L2P/NRESET
SPLT_TXD1P
IO/DIFFIO_L2N
SPLT_TXD1N
IO/DIFFIO_L3P
SPLT_TXD2P
IO/DIFFIO_L3N
SPLT_TXD2N
IO/DIFFIO_L4P
SPLT_TXD0P
IO/DIFFIO_L4N/DATA1/ASDO
SPLT_TXD0N
L6
M6
M2
M1
M4
M3
N2
N1
L7
IO/VREFB1N0
M5
IO/DIFFIO_L5P
IO/DIFFIO_L5N
SPLT_TXC4P
IO/DIFFIO_L6P/FLASH_NCE/NCSO
SPLT_TXC4N
IO/DIFFIO_L6N
SPLT_TXC3P
IO/DIFFIO_L7P
SPLT_TXC3N
P2
P1
R2
R1
N5
IO/DIFFIO_L7N
P4
IO/DIFFIO_L8P
P3
IO/DIFFIO_L8N
NSTATUS/NSTATUS
SPLT_TXCCLKP
IO/DIFFIO_L9P
SPLT_TXCCLKN
IO/DIFFIO_L9N
SPLT_TXC2P
IO/DIFFIO_L10P
SPLT_TXC2N
U2
U1
V2
V1
P5
IO_3
IO_4
SPLT_TXDCLKP
IO/DIFFIO_L11P
SPLT_TXDCLKN
IO/DIFFIO_L11N
SPLT_TXD3P
IO/VREFB1N1
SPLT_TXD3N
IO/DIFFIO_L12P
SPLT_TXC1P
IO/DIFFIO_L12N
SPLT_TXC1N
DCLK/DCLK
SPLT_TXC0P
IO/DATA0
SPLT_TXC0N
N6
M7
M8
N8
W2
W1
Y2
Y1
T3
NCONFIG/NCONFIG
N7
TDI/TDI
P7
TCK/TCK
AA1
TMS/TMS
V4
TDO/TDO
V3
NCE/NCE
P6
CLK1/DIFFCLK_0N
R5
T4
T5
R6
R7
T7
P8
R8
IC600
EP4CE15F23I7N
R9
CLK2/DIFFCLK_1P
T8
CLK3/DIFFCLK_1N
R10
IO/DIFFIO_L13P
T9
IO/DIFFIO_L13N
V6
IO/DIFFIO_L14P
V5
IO/DIFFIO_L14N
U7
IO/DIFFIO_L15P
U8
IO/DIFFIO_L15N
Y4
IO/DIFFIO_L16P
R11
IO/DIFFIO_L16N
R12
IO_5
Y3
IO/VREFB2N0
Y6
IO/DIFFIO_L17P
IO/DIFFIO_L17N
SPLT_SYNC[0]
IO/DIFFIO_L18P
SPLT_SYNC[1]
AA3
AB3
W6
IO/DIFFIO_L18N
V7
IO_6
IO/DIFFIO_L19P
FMTA_SYNC[0]
IO/DIFFIO_L19N
FMTA_SYNC[1]
IO/DIFFIO_L20P
FMTB_SYNC[0]
IO/DIFFIO_L20N
FMTB_SYNC[1]
AA4
AB4
AA5
AB5
W7
IO/DIFFIO_L21P
Y7
IO/DIFFIO_L21N
U9
IO_7
V8
IO/DIFFIO_L22P
W8
IO/DIFFIO_L22N
IO/DIFFIO_L23P
SPLT_SDA2V5
IO/DIFFIO_L23N
SPLT_SCL2V5
AA7
AB7
Y8
IO/DIFFIO_L24P
V9
IO/DIFFIO_L24N
V10
IO/DIFFIO_L25P
T10
IO/DIFFIO_L25N
U10
IO/VREFB2N1
R613
AA8
IO/DIFFIO_L26P
R614
AB8
IO/DIFFIO_L26N
T11
IO/DIFFIO_L27N
R615
AA9
IO/RUP1
R616
AB9
IO/RDN1
U11
IO/DIFFIO_L28P
V11
LG1122_3DLR
IO/DIFFIO_L28N
W10
SPLT_3DLR
IO_8
Y10
IO/DIFFIO_L29P
IO/DIFFIO_L29N
SPLT_LED[0]
IO/DIFFIO_L30P
SPLT_RESET2V5
IO/DIFFIO_L30N
SPLT_SYSCLK
AA10
AB10
AA11
AB11
IO/DIFFIO_L31P
AA12
IO/DIFFIO_B1P
AB12
IO/DIFFIO_B1N
IO/DIFFIO_B2P
SPLT_TP[0]
IO/DIFFIO_B2N
PA138_RESET2V5
IO/DIFFIO_B3P
FMTA_CONFIG_DONE
IO/DIFFIO_B3N
FMTB_CONFIG_DONE
AA13
R626
22
R630
22
AB13
R631
22
AB14
V12
IO/DIFFIO_B4P
W13
IO/DIFFIO_B4N
Y13
IO/VREFB3N1
IO/DIFFIO_B5P
SPLT_TP[4]
IO/DIFFIO_B5N
SPLT_TP[5]
AA15
AB15
U12
IO/DIFFIO_B6P
T12
IO_9
IO/PLL1_CLKOUTP
SPLT_TP[6]
IO/PLL1_CLKOUTN
PA138A_READY
AA16
R627
22
IO/DIFFIO_B7P
IO/DIFFIO_B7N
AA14
R629
22
AB16
AA17
AB17
FMT_RESET2V5
R13
IO/DIFFIO_B8P
V13
IO/DIFFIO_B8N
W14
IO/DIFFIO_B9P
U13
IO/DIFFIO_B9N
V14
IO/DIFFIO_B10P
V15
IO/DIFFIO_B10N
W15
IO/DIFFIO_B11P
T14
IO/DIFFIO_B11N
T15
IO_10
AB18
IO/DIFFIO_B12P
AA18
IO/DIFFIO_B12N
AA19
IO/DIFFIO_B13P
AB19
IO/VREFB3N0
W17
IO_11
Y17
IO/DIFFIO_B14P
V16
IO/DIFFIO_B14N
AA20
IO/DIFFIO_B15P
AB20
IO/DIFFIO_B15N
T16
IO_12
R16
IO/DIFFIO_B16P
U15
IO/DIFFIO_B16N
U14
IO_13
R14
IO/DIFFIO_B17P
R15
IO/DIFFIO_B17N
CLK13/DIFFCLK_7P
CLK12/DIFFCLK_7N
IO/DIFFIO_B19P
IO/DIFFIO_B19N
IO/DIFFIO_B20P
IO/DIFFIO_B20N
IO_15
IO/DIFFIO_B21P
IO/DIFFIO_B21N
IO/DIFFIO_B22P
IO/DIFFIO_B22N
IO/DIFFIO_B23P
IO/DIFFIO_B23N
IO/DIFFIO_B24P
IO/DIFFIO_B24N
IO/DIFFIO_B25P
IO/DIFFIO_B25N
IO_16
IO_17
IO/VREFB4N1
IO/DIFFIO_B26P
IO/DIFFIO_B26N
IO/DIFFIO_B27P
IO/DIFFIO_B27N
IO/DIFFIO_B28P
IO/DIFFIO_B28N
IO_18
IO_19
IO/RUP2
IO/RDN2
IO/DIFFIO_B29P
IO/DIFFIO_B29N
IO/VREFB4N0
IO/DIFFIO_B30P
IO/DIFFIO_B30N
IO/PLL4_CLKOUTP
IO/PLL4_CLKOUTN
IO/DIFFIO_B31P
IO/DIFFIO_B31N
IO/DIFFIO_B32P
IO/DIFFIO_B32N
IO/DIFFIO_B18P
IO/DIFFIO_B18N
IO_14
CLK15/DIFFCLK_6P
CLK14/DIFFCLK_6N
IO/DIFFIO_L31N
IC600
EP4CE15F23I7N
IC600
EP4CE15F23I7N
IC600
EP4CE15F23I7N
IC600
EP4CE15F23I7N
R617
100
R600
100
1%
AA21
P14
T17
T18
SPLT_TXBCLKN
SPLT_TXBCLKP
SPLT_TXB4N
SPLT_TXB4P
SPLT_TXB0N
SPLT_TXB0P
SPLT_TXB3N
SPLT_TXB3P
W20
W19
Y22
Y21
U20
U19
N14
W22
W21
P15
P16
R17
M15
N15
P17
SPLT_TXB2N
SPLT_TXB2P
SPLT_TXB1N
SPLT_TXB1P
SPLT_TXA3N
SPLT_TXA3P
SPLT_TXA4N
SPLT_TXA4P
SPLT_TXACLKN
SPLT_TXACLKP
SPLT_TXA1N
SPLT_TXA1P
V22
V21
R20
U22
U21
R18
R19
N16
R22
R21
P20
P22
P21
N20
N19
N17
N18
SPLT_TXA2N
SPLT_TXA2P
SPLT_TXA0N
SPLT_TXA0P
N22
N21
M22
M21
M20
M19
M16
T22
T21
IO/DIFFIO_R35P
LG1122_TXDCLKN
IO_20
LG1122_TXDCLKP
IO/RUP3
SPLT_CONFIG_DONE
IO/RDN3
SPLT_MSEL[0]
IO/DIFFIO_R34N
SPLT_MSEL[1]
IO/DIFFIO_R34P
SPLT_MSEL[2]
IO/DIFFIO_R33N
SPLT_MSEL[3]
G22
G21
M18
M17
L18
L17
K20
L16
IO/DIFFIO_R33P
L15
IO/DIFFIO_R32N
L22
IO/DIFFIO_R32P
L21
IO_21
K15
IO/DIFFIO_R31N
K19
IO/DIFFIO_R31P
J15
IO/DIFFIO_R30N
K22
IO/DIFFIO_R30P
K21
IO/VREFB5N1
J22
IO/DIFFIO_R29N
J21
IO/DIFFIO_R29P
J16
IO_22
K16
IO/DIFFIO_R28N
H22
IO/DIFFIO_R28P
H21
IO_23
K17
IO/DIFFIO_R27N
IO/DIFFIO_R27P
R601
100
IO/DIFFIO_R26N
1%
K18
J18
IO/DIFFIO_R26P
LG1122_TXD4N
IO_24
LG1122_TXD4P
F22
F21
IO/DIFFIO_R25N
R602
100
IO/DIFFIO_R25P
1%
H20
H19
IO/VREFB5N0
LG1122_TXD3N
IO/DIFFIO_R24N
LG1122_TXD3P
IO/DIFFIO_R24P
E22
E21
H18
IO/DIFFIO_R23N
R603
100
IO/DIFFIO_R23P
1%
J17
H16
IO/DIFFIO_R22N
LG1122_TXD2N
IO/DIFFIO_R22P
LG1122_TXD2P
D22
D21
F20
IO/DIFFIO_R21N/DEV_OE
F19
IO/DIFFIO_R21P/DEV_CLRN
IO/DIFFIO_R20N
R604
100
IO/DIFFIO_R20P
1%
G18
H17
IO/DIFFIO_R19N
LG1122_TXD1N
IO/DIFFIO_R19P
LG1122_TXD1P
IO_25
LG1122_TXD0N
CLK7/DIFFCLK_3N
LG1122_TXD0P
CLK6/DIFFCLK_3P
R605
100
1%
C22
C21
B22
B21
C20
D20
F17
G17
1%
F16
CLK5/DIFFCLK_2N
E16
CLK4/DIFFCLK_2P
F15
CONF_DONE/CONF_DONE
G16
MSEL0/MSEL0
G15
MSEL1/MSEL1
F14
MSEL2/MSEL2
R606
100
MSEL3/MSEL3
G14
D17
IO/DIFFIO_R18N
1%
IO/DIFFIO_R18P
LG1122_TXC4N
IO/DIFFIO_R17N/INIT_DONE
LG1122_TXC4P
C19
D19
A20
IO/DIFFIO_R17P/CRC_ERROR
B20
IO_26
C17
IO/VREFB6N1
H15
IO_27
H14
IO/DIFFIO_R16N/NCEO
R607
100
IO/DIFFIO_R16P/CLKUSR
B19
A19
IO/DIFFIO_R15N
1%
IO/DIFFIO_R15P
LG1122_TXC3N
IO/DIFFIO_R14N
LG1122_TXC3P
IO/DIFFIO_R14P
A18
B18
D15
IO/DIFFIO_R13N
R608
100
IO/DIFFIO_R13P
1%
R611
100
E15
G13
IO/DIFFIO_R12N
LG1122_TXC2N
IO/DIFFIO_R12P
LG1122_TXC2P
IO_28
LG1122_TXC1N
IO/DIFFIO_R11N
LG1122_TXC1P
1%
A17
B17
A16
B16
C15
IO/DIFFIO_R11P
E14
IO/DIFFIO_R10N
F12
IO/DIFFIO_R10P
H13
IO/DIFFIO_R9N/NEW
H12
IO/DIFFIO_R9P/NOE
R609
100
IO/VREFB6N0
G12
F13
IO/DIFFIO_R8N
1%
IO/DIFFIO_R8P
LG1122_TXC0N
IO/DIFFIO_R7N
LG1122_TXC0P
IO/DIFFIO_R7P
B15
C13
R610
100
IO/DIFFIO_R6N/NAVD
A15
R612
100
D13
E13
IO/DIFFIO_R6P
1%
IO/DIFFIO_R5N/PADD23
LG1122_TXB4N
IO/DIFFIO_R5P
LG1122_TXB4P
IO/DIFFIO_R4N
LG1122_TXB3N
IO/DIFFIO_R4P
LG1122_TXB3P
1%
A14
B14
A13
B13
E12
IO/DIFFIO_R3P/PADD21
R628
100
1%
E11
F11
IO/DIFFIO_R2P
LG1122_TXCCLKN
IO/DIFFIO_R1N
LG1122_TXCCLKP
A12
B12
IO/DIFFIO_T32N
LG1122_TXBCLKN
IO/DIFFIO_T32P
LG1122_TXBCLKP
IO/DIFFIO_T31N
H11
IO/DIFFIO_T31P
IO/DIFFIO_T30N
1%
LG1122_TXB2N
IO_29
LG1122_TXB2P
IO/VREFB7N0
LG1122_TXB1N
IO/DIFFIO_T29N
LG1122_TXB1P
IO/DIFFIO_T29P
D10
1%
A10
B10
A9
B9
R619
100
R624
100
R625
100
C10
G11
IO/PLL2_CLKOUTN
1%
IO/PLL2_CLKOUTP
LG1122_TXB0N
IO_30
LG1122_TXB0P
IO/DIFFIO_T28N
LG1122_TXA2N
IO/DIFFIO_T28P
LG1122_TXA2P
IO/RUP4
LG1122_TXA1N
IO/RDN4
LG1122_TXA1P
IO/DIFFIO_T27N
LG1122_TXA3N
IO/DIFFIO_T26N
LG1122_TXA3P
1%
1%
A8
B8
A7
B7
A6
R620
100
B6
E9
1%
IO/DIFFIO_T27P/PADD0
C8
C7
G10
IO/DIFFIO_T26P
G9
IO_31
H10
IO/DIFFIO_T25N/PADD1
H9
A5
IO/DIFFIO_T24N
B5
IO/DIFFIO_T24P
F9
IO/VREFB7N1
R621
100
F10
C6
IO/DIFFIO_T23P
1%
IO/DIFFIO_T22N
LG1122_TXA0N
IO/DIFFIO_T22P
LG1122_TXA0P
A4
B4
F8
IO/DIFFIO_T21N
G8
A3
B3
D6
E7
R622
100
IO_32
C3
C4
1%
LG1122_TXA4N
LG1122_TXA4P
IO_33
R623
100
E10
IO/DIFFIO_T30P
A11
B11
R618
100
F7
G7
E6
E5
CLK10/DIFFCLK_4N
CLK11/DIFFCLK_4P
IO_34
IO/DIFFIO_T15N
IO/DIFFIO_T15P
IO/DIFFIO_T14N
IO_35
IO_36
IO/DIFFIO_T12N/DATA2
IO/DIFFIO_T12P/DATA3
IO/VREFB8N0
IO/DIFFIO_T8N
IO/DIFFIO_T8P
IO/DIFFIO_T7N
IO/DIFFIO_T7P
IO/DATA5
IO_37
IO/DIFFIO_T6N
IO/DIFFIO_T6P/DATA6
IO/DATA7
IO/DIFFIO_T5N
IO/DIFFIO_T5P/DATA8
IO/DIFFIO_T4N/DATA9
IO/DIFFIO_T4P
IO/VREFB8N1
IO_38
IO/DIFFIO_T2N
IO/DIFFIO_T1N
IO/DIFFIO_T1P
IO/PLL3_CLKOUTN
IO/PLL3_CLKOUTP
CLK8/DIFFCLK_5N
CLK9/DIFFCLK_5P
IO/DIFFIO_R1P
THE
EAX64768002
SPLT I/O
2012.06.05
6
23
M701
Oscillator for System Clk
+2.5V_FPGA
TP
LED
MDS62110215
SAM2333
LD700
22
SPLT_TP[0]
SPLT_TP[4]
22
R705
SPLT_TP[5]
22
R706
SPLT_TP[6]
22
R707
R738
22
GASKET_SPLT
SPLT_LED[0]
R701
R721
10K
OPT
X700
12.288MHz
ST
VCC
1
4
GND
OUT
2
3
R737
1K
A2[RD]
A1[GN]
M702
R728
0
MDS62110215
SPLT_SYSCLK
+1.2V_FPGA_VCCD_SPLT
GASKET_SPLT
C704
0.1uF
16V
+2.5V_FPGA_VCCA_SPLT
M703
+2.5V_FPGA
MDS62110215
+1.2V_FPGA
GASKET_SPLT
IC600
EP4CE15F23I7N
FPGA I2C Level Shift (3.3V <-> 2.5V)
L10
+3.3V
+2.5V_FPGA
L11
M10
M11
L12
L13
M12
FPGA CONFIGURATION
R716
R718
R722
4.7K
2K
5.6K
N11
N12
OPT
C700
18pF
50V
R726
22
K11
+2.5V_FPGA
R711
SPLT_SDA2V5
M13
+2.5V_FPGA
K12
SPLT_SDA
K13
AO3438
Q700
SPLT_CONFIG_DONE
N13
R745
10K
N10
AR701
SPLT_STATUS
22
R746
10K
+3.3V
+2.5V_FPGA
SPLT_CONFIG
SPLT_CE
R717
R719
R723
4.7K
2K
5.6K
R747
10K
R760
0
OPT
R764
0
R762
0
OPT
R766
0
K10
J9
SPLT_MSEL[3]
D7
SPLT_MSEL[2]
J5
SPLT_MSEL[1]
H8
SPLT_MSEL[0]
A1
C5
C9
R748
1K
R761
0
R763
0
R765
0
OPT
R767
0
OPT
C11
C12
C14
C16
A22
E20
R712
S
SPLT_SCL2V5
22
OPT
C701
18pF
50V
R727
G20
SPLT_SCL
L20
P19
AO3438
Q701
P701
V20
+2.5V_FPGA
Y20
12507WR-10L
AB22
Y18
R749
22
+3.3V
1
Y16
SPLT_TCK
Y12
R753
1K
Y11
+3.3V
R713
4.7K
OPT
R715
4.7K
OPT
P700
R720
OPT
33
U3
W3
0.1uF
R725
N3
C716
R754
1K
SPLT_SCL
L700
Y5
AB1
FMTB_TDO
12507WR-04L
5V
Y9
R750
22
D3
R751
22
F3
SPLT_TMS
K3
33
I2C_SCL_S
G2
6
GND
AA2
AA22
H3
R3
SCL
SDA
AB6
8
R730
33
R755
1K
Y15
T20
R752
22
SPLT_SDA
9
R733
J19
SPLT_TDI
C18
33
I2C_SDA_S
D8
10
J11
GND_1
VCCINT_1
GND_2
VCCINT_2
GND_3
VCCINT_3
GND_4
VCCINT_4
GND_5
VCCINT_5
GND_6
VCCINT_6
GND_7
VCCINT_7
GND_8
VCCINT_8
GND_9
VCCINT_9
GND_10
VCCINT_10
GND_11
VCCINT_11
GND_12
VCCINT_12
GND_13
VCCINT_13
GND_14
VCCINT_14
GND_15
VCCINT_15
GND_16
VCCINT_16
GND_17
VCCINT_17
GND_18
VCCINT_18
GND_19
VCCINT_19
GND_20
VCCINT_20
GND_21
VCCINT_21
GND_22
E18
F5
V18
L14
M14
P11
P12
L9
M9
J13
J14
K14
J10
K9
N9
P9
P10
P13
U16
U17
T13
J8
D4
GND_23
VCCIO1_1
GND_24
VCCIO1_2
GND_25
VCCIO1_3
GND_26
VCCIO1_4
GND_27
F4
VCCIO2_1
GND_29
VCCIO2_2
GND_30
VCCIO2_3
GND_31
VCCIO2_4
GND_32
+2.5V_FPGA
K4
H4
L703
BLM18SG700TN1D
N4
GND_28
U4
W4
R4
C774
0.1uF
16V
C754
0.1uF
16V
AB2
GND_33
VCCIO3_1
GND_34
VCCIO3_2
GND_35
VCCIO3_3
GND_36
VCCIO3_4
GND_37
VCCIO3_5
GND_38
W5
W9
W11
AA6
AB21
GND_39
VCCIO4_1
GND_40
VCCIO4_2
GND_41
VCCIO4_3
GND_42
VCCIO4_4
GND_43
VCCIO4_5
GND_44
W12
W16
W18
Y14
C755 C760 C764 C768

0.1uF 0.1uF 0.1uF 0.1uF
16V
16V
16V
16V
P18
GND_45
VCCIO5_1
GND_46
VCCIO5_2
GND_47
VCCIO5_3
GND_48
VCCIO5_4
GND_49
V19
Y19
T19
E19
GND_50
VCCIO6_1
GND_51
VCCIO6_2
GND_52
VCCIO6_3
GND_53
VCCIO6_4
GND_54
G19
L19
VCCIO7_1
GND_56
VCCIO7_2
GND_57
VCCIO7_3
GND_58
VCCIO7_4
GND_59
VCCIO7_5
GNDA1
VCCIO8_1
GNDA2
VCCIO8_2
GNDA3
VCCIO8_3
GNDA4
VCCIO8_4
+1.2V_FPGA
J20
A21
GND_55
U5
11
J12
L704
BLM18SG700TN1D
D12
D14
D16
D18
C756
0.1uF
16V
C775
0.1uF
16V
A2
D5
D9
D11
E8
VCCIO8_5
T6
VCCA1
+2.7V_FPGA
VCCA2
VCCA3
FPGA Reset Level Shifter (3.3V to 2.5V)
VCCD_PLL1
0
OPT
VCCD_PLL2
VCCD_PLL3
+3.3V
R724
R714
IC700
1K
SW700
JTP-1127WEM
1
3
2
4
4.7K
APX803D29
R700
330
VCC
R731
R735
10K
4.7K
GND
NCS
R744
27
DATA
SPLT_DATAO
R732
C703
0.1uF
16V
25Ohm
Q703
2SC3052
10K
E
VCC
GND
C708
100pF
50V
DCLK
R758
22
ASDI
R759
22
10K
F6
V17
VCCD_PLL4
SPLT_DCLK
SPLT_ASDO
+1.2V_FPGA
Q702
2SC3052
C757 C761 C765 C769

0.1uF 0.1uF 0.1uF 0.1uF
16V
16V
16V
16V
VCC_1
C
R729
E17
VCC_2
SPLT_RESET2V5
C
1
C702
0.1uF
16V
R743
22
SPLT_CSO
R736
22
RESET
C706
0.1uF
16V
IC701
EPCS4SI8N
+2.5V_FPGA
U18
U6
BLM18PG121SN1D
LG1122_RST
+3.3V
G6
VCCA4
L702
R734
F18
C715
10pF
E
C726 C728 C730 C732 C734 C736 C738 C740 C742 C744 C746 C748 C750 C752 C758 C762 C766 C770 C772 C776 C778
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
+2.5V_FPGA
C707 C709 C710 C711 C712 C713 C717 C718 C719 C720 C721 C722 C723 C724 C725 C727 C729 C731 C733 C735 C737 C739 C741 C743 C745 C747 C749 C751 C753 C759 C763 C767 C771 C773 C777 C779
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
THE
EAX64768002
SPLT PWR
2012.06.05
7
23
+1.05V_PA138A_OSCVDD
+1.05V_PA138A_DPLLVDD
IC900
PA138P
A19
G16
OSCVDD1V
VSS_1
VSS_2
E14
DPLLVDD1V
VSS_3
VSS_4
+1.05V_PA138A_VDD
VSS_5
VSS_6
VSS_7
H7
H9
J10
J12
J15
J8
K11
K13
K7
K9
L10
L12
L8
M11
M13
M15
M9
N12
N16
P15
R16
T15
+1.8V_PA138A_VDDM
H11
VDD1V_1
VSS_8
VDD1V_2
VSS_9
VDD1V_5
VSS_10
VDD1V_6
VSS_11
VDD1V_7
VSS_12
VDD1V_4
VSS_13
VDD1V_10
VSS_14
VDD1V_11
VSS_15
VDD1V_8
VSS_16
VDD1V_9
VSS_17
VDD1V_13
VSS_18
VDD1V_14
VSS_19
VDD1V_12
VSS_20
VDD1V_16
VSS_21
VDD1V_17
VSS_22
VDD1V_18
VSS_23
VDD1V_15
VSS_24
VDD1V_19
VSS_25
VDD1V_20
VSS_26
VDD1V_21
VSS_27
VDD1V_22
VSS_28
VDD1V_23
VSS_29
VDD1V_3
VSS_30
VSS_31
K4
L2
M7
N10
N8
R14
R3
T6
T9
U12
U14
U4
V16
V9
+2.5V_PA138A_LVRVDD
W17
W2
VDDM18_1
VSS_32
VDDM18_2
VSS_33
VDDM18_3
VSS_34
VDDM18_5
VSS_35
VDDM18_4
VSS_36
VDDM18_7
VSS_37
VDDM18_6
VSS_38
VDDM18_8
VSS_39
VDDM18_9
VSS_40
VDDM18_11
VSS_41
VDDM18_12
VSS_42
VDDM18_10
VSS_43
VDDM18_14
VSS_44
VDDM18_13
VSS_45
VDDM18_16
VSS_46
VDDM18_15
VSS_47
VSS_48
A1
C3
C5
E3
+2.5V_PA138A_OSCVDDIO
J3
G3
LVRVDD25_1
VSS_49
LVRVDD25_2
VSS_50
LVRVDD25_3
VSS_51
LVRVDD25_4
VSS_52
LVRVDD25_6
VSS_53
LVRVDD25_5
VSS_54
VSS_55
F16
OSCVDDIO25
+2.5V_PA138A_PORVDD
VSS_57
B10
PORVDD25
+2.5V_PA138A_LVTVDD
J16
J17
+3.3V_PA138A_VDDIO
LVTVDD25_1
VSS_60
LVTVDD25_2
VSS_61
LVTVDD25_3
VSS_62
LVTVDD25_4
VSS_63
VSS_64
A11
A6
E17
G10
G12
G18
G5
G8
H13
H19
J18
K17
K19
L18
M17
P17
T17
T19
U18
V18
+2.5V_PA138A_PLL
V19
VSS_58
VSS_59
H16
H17
VSS_56
VDDIO33_2
VSS_65
VDDIO33_1
VSS_66
VDDIO33_3
VSS_67
VDDIO33_6
VSS_68
VDDIO33_7
VSS_69
VDDIO33_8
VSS_70
VDDIO33_4
VSS_71
VDDIO33_5
VSS_72
VDDIO33_9
VSS_73
VDDIO33_10
VSS_74
VDDIO33_11
VSS_75
VDDIO33_12
VSS_76
VDDIO33_13
VSS_77
VDDIO33_14
VSS_78
VDDIO33_15
VSS_79
VDDIO33_16
VSS_80
VDDIO33_17
VSS_81
VDDIO33_19
VTVDD1V_1
VDDIO33_21
VTVDD1V_2
VTVDD1V_4
H4
R901
10
C906
0.1uF
16V
H5
LRPLLVDD25
VTVDD1V_5
LRPLLVSS25CAP
VTVDD1V_6
VTVDD1V_7
F15
R902
10
C901
4.7uF
10V
C907
0.1uF
16V
10
C902
4.7uF
10V
C908
0.1uF
16V
G15
DPLLVDD25
VTVDD1V_8
DPLLVSS25CAP
VTVDD1V_9
R903
MEPLLVDD25
LVRVSS_1
MEPLLVSS25CAP
LVRVSS_2
LVRVSS_3
K15
R904
10
C903
4.7uF
10V
C909
0.1uF
16V
C904
4.7uF
10V
C910
0.1uF
16V
C905
22uF
10V
C911
0.1uF
16V
K16
C11
+1.05V_PA138A_PORVDD
+2.5V_PA138A_PORVDD
+2.5V_PA138A_LVTVDD
C12
C13
C14
C913
1uF
C15
C16
C929
1uF
C935
470pF
C925
470pF
C930
0.1uF
C936
470pF
C926
470pF
50V
C931
0.1uF
16V
C937
470pF
50V
C918
470pF
C946
1uF
C951
470pF
C941
0.1uF
C947
470pF
C952
0.1uF
C942
470pF
50V
C948
470pF
50V
C953
470pF
50V
C960
1uF
25V
C966
470pF
C956
10uF
C961
10uF
C967
470pF
C957
470pF
50V
C962
470pF
50V
C968
470pF
50V
C17
C976
1uF
25V
C981
470pF
50V
C972
0.1uF
C977
470pF
C982
0.1uF
C973
470pF
50V
C978
22uF
10V
C983
22uF
10V
C991
470pF
50V
C995
470pF
50V
C992
0.1uF
C996
470pF
50V
D10
D18
E10
E15
E16
F17
+1.8V_PA138A_VDDM
G4
G7
G9
C914
470pF
50V
G11
G13
C919
0.1uF
C986
470pF
G17
C1000
0.1uF
16V
G19
H8
H10
H12
H15
H18
+1.05V_PA138A_VDD
J7
J9
J11
C915
470pF
50V
J13
J19
C920
470pF
50V
K3
K5
K8
K10
K12
K18
L1
+2.5V_PA138A_LVRVDD
+3.3V_PA138A_VDDIO
L3
L7
L9
C916
470pF
50V
L11
L13
C921
0.1uF
16V
C927
470pF
50V
C932
0.1uF
16V
C938
470pF
50V
C943
0.1uF
16V
C949
470pF
50V
C954
0.1uF
16V
C958
470pF
50V
C963
0.1uF
16V
C990
0.1uF
16V
C985
470pF
50V
C969
4.7uF
10V
C994
470pF
50V
C999
0.1uF
16V
C1001
470pF
50V
C1003
0.1uF
16V
C1005
10uF
10V
L17
L19
M8
M10
M12
M16
M18
M19
+3.3V
N9
N11
N13
+1.05V_PA138A_VTVDD
+3.3V_PA138A_VDDIO
+1.8V_PA138
+3.3V_PA138A_VDDIO
+1.8V_PA138A_VDDM
L908
BLM18SG700TN1D
@volta
N15
N17
N19
C917
470pF
50V
P3
P16
C922
470pF
50V
C928
470pF
50V
C933
470pF
50V
C939
470pF
50V
C959
0.1uF
16V
C944
4.7uF
10V
C964
0.1uF
16V
C970
0.1uF
16V
C974
1uF
25V
C979
0.1uF
16V
C984
0.1uF
16V
C987
4.7uF
10V
C993
0.1uF
16V
R6
R9
L910
BLM18SG700TN1D
@volta
C1006
0.1uF
16V
C1002
0.1uF
16V
C1009
0.1uF
16V
R15
R17
T14
T16
T18
U9
U13
+1.05V_PA138
U15
+1.05V_PA138
+1.05V_PA138
+1.05V_PA138
+1.05V_PA138
U17
U19
V4
V17
L901
BLM18SG700TN1D
@volta
W1
W9
L903
BLM18SG700TN1D
@volta
L905
BLM18SG700TN1D
@volta
+1.05V_PA138A_VDD
+1.05V_PA138A_VTVDD
L909
BLM18SG700TN1D
@volta
L906
BLM18SG700TN1D
@volta
W16
W18
W19
C923
0.1uF
16V
+1.05V_PA138A_VTVDD
C934
0.1uF
16V
C945
0.1uF
16V
C955
0.1uF
16V
C971
0.1uF
16V
C980
0.1uF
16V
C988
0.1uF
16V
C997
0.1uF
16V
C1008
0.1uF
16V
C1004
0.1uF
16V
D11
D12
D13
D14
D15
D16
D17
+2.5V_PA138
+2.5V_PA138
+2.5V_PA138
+2.5V_PA138
+2.5V_PA138
D19
+2.5V_PA138A_PORVDD
+2.5V_PA138A_LVTVDD
+2.5V_PA138A_LVRVDD
+2.5V_PA138A_PLL
A2
L15
L16
C10
B19
VDDIO33_20
10
C900
4.7uF
10V
B11
VDDIO33_18
VTVDD1V_3
R900
B6
MPLLVDD25
LVRVSS_4
MPLLVSS25CAP
LVRVSS_5
C4
D3
F3
H3
L900
BLM18SG700TN1D
@volta
L902
BLM18SG700TN1D
@volta
L904
BLM18SG700TN1D
@volta
L907
BLM18SG700TN1D
@volta
L911
BLM18SG700TN1D
@volta
J5
R905
J4
V3DPLLVDD25
V3DPLLVSS25CAP
10
E11
E12
E13
C912
0.1uF
16V
C924
0.1uF
16V
C940
0.1uF
16V
C950
0.1uF
16V
C965
0.1uF
16V
C975
0.1uF
16V
C989
0.1uF
16V
C998
0.1uF
16V
C1007
0.1uF
16V
C1010
0.1uF
16V
VPLLVDD25
VPLLVSS25CAP
REXT
R906
1.2K 1%
THE
EAX64768002
PA138A POWER
2012.06.05
9
23
IC900
PA138P
+3.3V
+3.3V
P1003
+2.5V_FPGA
12507WR-04L
R1051
1K
B4
SPLT_TXA1P
TXD1N
LVDSRXA2N
TXD1P
LVDSRXA2P
A3
SPLT_TXA2N
B3
SPLT_TXA2P
B1
SPLT_TXACLKN
B2
SPLT_TXACLKP
C1
SPLT_TXA3N
C2
SPLT_TXA3P
D1
SPLT_TXA4N
D2
SPLT_TXA4P
TXD2N
LVDSRXA3N
TXD2P
LVDSRXA3P
TXD3N
LVDSRXACLKN
TXD3P
LVDSRXACLKP
TXD4N
LVDSRXA4N
TXD4P
LVDSRXA4P
TXD5N
LVDSRXA5N
TXD5P
LVDSRXA5P
TXD6N
TXD6P
E1
SPLT_TXB0N
E2
SPLT_TXB0P
F1
SPLT_TXB1N
LVDSRXB1N
TXD7N
LVDSRXB1P
TXD7P
LVDSRXB2N
F2
SPLT_TXB1P
TXD8N
LVDSRXB2P
G1
SPLT_TXB2N
C1012
0.1uF
C18
C1013
0.1uF
A18
C1014
0.1uF
C1015
0.1uF
B18
A17
C1016
B17
C1017
A16
C1018
0.1uF
0.1uF
0.1uF
B16
C1019
0.1uF
A15
C1020
0.1uF
B15
C1021
0.1uF
A14
C1022
0.1uF
B14
C1023
0.1uF
A13
C1024
0.1uF
B13
C1025
0.1uF
A12
C1026
0.1uF
B12
C1027
0.1uF
TXD8P
PA138A_TX0N
PA138A_TX0P
PA138_RESET
PA138A_TX1N
PA138A_TX2N
PA138A_TX2P
SPLT_TXBCLKN
LVDSRXBCLKN
H2
SPLT_TXBCLKP
SPLT_TXB3N
K1
SPLT_TXB4P
SPLT_TXB0N
SPLT_TXB2N
SPLT_TXBCLKN
SPLT_TXB3N
LOCKN
100
R1002
100
R1003
+3.3V
PA138A_TX5P
PA138A_TX6N
R1004
R1005
100
100
R1007
SPLT_TXA1N
SPLT_TXA2N
SPLT_TXACLKN
SPLT_TXA3N
SPLT_TXA4N
100
R1006
SPLT_TXB4N
SPLT_TXA0N
100
100
R1008
100
R1009
100
R1010
100
R1011
100
R1012
100
SPLT_TXB2P
SPLT_TXBCLKP
PA138A_TX7N
PA138A_TX7P
SPLT_TXA0P
SPLT_TXA1P
R1024
4.7K
OPT
R1025
4.7K
OPT
R1016
4.7K
C1031
OPT
X-TAL_1
R1082
2.2M
PA138A_SDA_DEBUG
X1001
27MHz
3pF
GND_2
GND_1
X-TAL_2
C1032
OPT
3pF
IC900
PA138P
R1026
4.7K
R1027
4.7K
+3.3V
PA138A_SDA_DEBUG
R1032
33
A9
R1033
33
D6
I2C_SCL_S
I2C_SDA_S
R1034
33
C6
33
P19
PA138_SCL_INT
R1035
33
P18
R1031
R1036
PA138_SDA_INT
TWOWSCL0
R1018
PA138_RESET
33
R1019
1K OPT
LG1122_RST
TDI
TWOWSDA0
TMS
TWOWSCL1
TCK
TWOWSDA1
TWOWSCL2
TRSTN
TWOWSDA2
TESTEN
RESETN
R1029
33
F5
PA138_ACK
R1030
33
F4
PA138_SYNC_EXEC
10K
C7
R1038
33
D7
PA138B_READY
E7
PA138A_FMT_1
R1039
R1040
E6
PA138A_FMT_2
R1041
22
D5
PA138A_READY
LG1122_3DLR
R1042
0
OPT
N18
SPICLK
SPITXD
R1059
10K
E5
R1060
10K
D4
R1061
10K
D8
R1062
10K
E4
R1063
10K
C8
R1064
D9
R1065
PA138A_SPI_CS0
E9
R1066
PA138A_SPI_CLK
A8
R1067
PA138A_SPI_TXD
B8
R1068
PA138A_SPI_RXD
E8
R1069
PA138A_UART_RX0
B7
R1070
PA138A_UART_TX0
R18
R1071
R19
R1072
SPIRXD
INTL
INTH
R1037
SPLT_TXACLKP
SPICS0
B9
A7
TDO
SPICS1
R1017
4.7K OPT
PA138A_SPI_TXD
C1028
0.1uF
16V
Middle Crystal
C9
SPLT_TXA2P
PA138A_SCL_DEBUG
4
5
R1028
C1011
0.1uF
R1058
0
PA138_RESET
DI[IO0]
PA138A_SPI_CLK
PA138T_XIN
L1000
T216_LOCKN
R1057
0
PA138A_UART_TX0
GASKET_PA138
SPLT_TXB3P
SPLT_TXB4P
P1000
12507WR-04L
A10
MDS62110215
SW1000
JTP-1127WEM
CLK
+3.3V
P1002
12507WR-04L
33
M1001
SPLT_TXB1P
OPT
PA138A_TX6P
R1022
4.7K
SPLT_TXB0P
HOLD[IO3]
PA138A_LOCKN
Q1000
2N7002A
R1001
R1020
33
+3.3V
SPLT_TXB1N
R1056
10K
VCC
PA138T_XOUT
+1.8V_PA138
R1015
G 1.5K
R1014
5.6K
0
%WP[IO2]
PA138A_TX5N
R1000
PA138B_LOCKN
DO[IO1]
R1052
10K
PA138A_TX4P
PA138A_SCL_DEBUG
R1013
R1050
0
PA138A_SPI_RXD
R1054
10K
OPT
LVDSRXB5P
CS
GND
R1023
4.7K
PA138A_LOCKN
R1049
0
PA138A_TX4N
LVDSRXB5N
K2
+3.3V
PA138_RESET2V5
PA138A_SPI_CS0
LVDSRXB4P
SPLT_TXB4N
IC1001
W25Q80BVSSIG
+3.3V
E19
LVDSRXB4N
J2
SPLT_TXB3P
+3.3V
PA138A_TX3P
HTPDN
LVDSRXBCLKP
J1
JUMP4
PA138A_TX3N
R1021
0
E18
4
5
PA138A_UART_RX0
LVDSRXB3P
H1
JUMP3
R1077
PA138A_TX1P
LVDSRXB3N
G2
SPLT_TXB2P
+3.3V
R1053
10K
A4
SPLT_TXA1N
C19
LVDSRXA1P
B5
SPLT_TXA0P
LVDSRXA1N
Q1001
2N7002A
SPLT_TXA0N
R1076
4.7K
A5
R1075
G 1.5K
R1074
5.6K
UARTRXD0
UARTTXD0
GPIO4
UARTRXD1
GPIO5
UARTTXD1
GPIO6
GPIO9
F18
GPIO10
XIN
GPIO21
XOUT
F19
R1080
R1081
PA138T_XIN
0
PA138T_XOUT
SPLT_TXA3P
R1043
0
SPLT_TXA4P
SPLT_3DLR
THE
EAX64768002
PA138A
2012.06.05
10
23
IC900
PA138P
+0.9V_PA138A_VREF
IC1100
W9751G6KB-25
PA138A_MDQ[0-15]
C1106
470pF
VREF
PA138A_MA[0-12]
PA138A_MA[0]
A0
PA138A_MA[1]
A1
A2
PA138A_MA[2]
J2
M8
M3
M7
PA138A_MA[3]
A3
N2
PA138A_MA[4]
A4
N8
PA138A_MA[5]
A5
N3
PA138A_MA[6]
A6
N7
A7
PA138A_MA[7]
A8
PA138A_MA[8]
A9
PA138A_MA[9]
PA138A_MA[10]
A10/AP
A11
PA138A_MA[11]
A12
PA138A_MA[12]
P2
G8
DQ0
PA138A_MDQ[0]
G2
DQ1
PA138A_MDQ[1]
H7
DQ2
PA138A_MDQ[2]
H3
DQ3
PA138A_MDQ[3]
H1
DQ4
PA138A_MDQ[4]
H9
DQ5
F1
DQ6
PA138A_MDQ[6]
F9
DQ7
PA138A_MDQ[7]
C8
DQ8
PA138A_MDQ[8]
C2
DQ9
PA138A_MDQ[9]
D7
P8
D3
P3
D1
M2
D9
P7
B1
R2
B9
PA138A_MDM0
PA138A_MDM1
PA138A_MDM2
PA138A_MDM3
PA138A_MBA0
PA138A_MBA1
L2
BA1
L3
DDR
PA138A_MCK0P
R1100
100
PA138A_MCK0N
PA138A_MCKEN
PA138A_MDQ[5]
PA138A_MDQ[10]
DQ10
PA138A_MDQ[14]
DQ14
PA138A_MDQ[15]
DQ15
A1
VDD_5
E1
VDD_4
J9
VDD_3
CLK
K8
M9
VDD_2
CKE
K2
R1
VDD_1
K9
A9
VDDQ_10
K7
C1
VDDQ_9
CAS
L7
C3
VDDQ_8
WE
K3
C7
VDDQ_7
RAS
L8
C9
PA138A_MDQSP0
PA138A_MDQSP1
LDQS
F7
UDQS
B7
PA138A_MDM0
PA138A_MDM1
LDM
F3
UDM
B3
LDQS
PA138A_MDQSN0
PA138A_MDQSN1
UDQS
NC_4
PA138A_MBA2
NC_5
NC_6
E8
A8
L1
R3
VDDQ_6
E9
VDDQ_5
G1
VDDQ_4
G3
NC_2
E2
NC_3
VDDQ_3
G7
VDDQ_2
G9
VDDQ_1
VSSDL
+1.8V_PA138A_VDDL1
VDDL
J1
R1109
R1110
W12
R1111
W13
22
R1112
V13
22
R1113
P2
22
R1114
P1
22
R1115
R1
R1116
MD1
MDM2
MD2
MDM3
MD3
MD4
V12
22
22
MD0
MDM1
R2
MDQSP0
MDQSN0
MD7
MDQSN1
MD8
MDQSP2
MD9
MDQSN2
MD10
MDQSP3
MD11
MDQSN3
MD12
R1117
MD13
V8
22
R1118
W8
22
R1119
V1
22
R1120
V2
MCK0P
MD14
MCK0N
MD15
MCK1P
C1102
0.1uF
MCK1N
R1121
C1109
470pF
C1111
0.1uF
MD18
T8
R5
T3
U3
AR1100
22
T4
T5
V3
U6
W3
U8
W4
U7
W5
W7
V5
W6
V6
U5
V7
R8
T7
R7
MCKE
MD19
MODT
MD20
MRAS
MD21
MCS
MD22
MCAS
MD23
MWE
MD24
MA0
MD25
MA1
MD26
MA2
MD27
MA3
MD28
MA4
MD29
MA5
MD30
MA6
MD31
C1103
0.1uF
C1107
0.1uF
C1108
22uF
C1110
470pF
C1112
0.1uF
W11
W14
T12
R10
R13
T10
U10
T13
R11
T11
T2
N2
U1
M1
M2
U2
N1
T1
N4
M5
P5
L5
L4
P4
M4
N5
PA138A_MDQ[16]
DQ0
G8
PA138A_MDQ[17]
DQ1
G2
PA138A_MDQ[18]
DQ2
H7
PA138A_MDQ[19]
DQ3
H3
PA138A_MDQ[20]
MA9
MREXT0
R4
R1123
240
U16
R1124
240
H1
PA138A_MDQ[21]
DQ5
H9
PA138A_MDQ[22]
DQ6
F1
PA138A_MDQ[23]
DQ7
F9
PA138A_MDQ[24]
DQ8
C8
PA138A_MDQ[25]
DQ9
C2
PA138A_MDQ[26]DQ10
D7
PA138A_MDQ[27]DQ11
D3
PA138A_MDQ[28]DQ12
D1
PA138A_MDQ[29]DQ13
B1
PA138A_MDQ[31]DQ15
B9
A3
PA138A_MA[3]
N8
A4
PA138A_MA[4]
N3
A5
PA138A_MA[5]
N7
A6
PA138A_MA[6]
P2
A7
PA138A_MA[7]
P8
A8
PA138A_MA[8]
P3
A9
PA138A_MA[9]
PA138A_MA[10]
A10/AP
P7
A11
PA138A_MA[11]
R2
A12
PA138A_MA[12]
L2
BA0
L3
BA1
J9
J8
CLK
VDD_2
M9
K8
CLK
VDD_1
R1
K2
CKE
K9
ODT
A9
L8
CS
VDDQ_9
C1
K7
RAS
VDDQ_8
C3
L7
CAS
VDDQ_7
C7
K3
WE
VDDQ_6
C9
VDDQ_5
E9
VDDQ_4
F7
LDQS
G1
B7
UDQS
F3
LDM
B3
UDM
G7
G9
+0.9V_PA138A_VREF
A3
E8
LDQS
E3
A8
UDQS
J3
VSS_3
VSS_3
J3
N1
VSS_2
PA138A_MA[0]
VSS_2
N1
VSS_1
PA138A_MA[1]
VSS_1
P9
L1
NC_4
P9
R3
NC_5
R7
NC_6
A2
NC_1
E2
NC_2
R8
NC_3
J7
VSSDL
J1
VDDL
B2
VSSQ_10
B8
VSSQ_9
A7
VSSQ_8
D2
VSSQ_7
D8
VSSQ_6
PA138A_MA[5]
PA138A_MA[6]
PA138A_MA[7]
PA138A_MA[8]
PA138A_MA[9]
E7
VSSQ_5
F2
VSSQ_4
F8
VSSQ_3
PA138A_MA[10]
PA138A_MA[11]
PA138A_MA[12]
H2
VSSQ_2
H8
VSSQ_1
PA138A_MA[0]
PA138A_MA[1]
PA138A_MA[2]
PA138A_MA[3]
PA138A_MA[4]
PA138A_MA[5]
PA138A_MA[6]
PA138A_MA[7]
PA138A_MA[8]
PA138A_MA[9]
PA138A_MA[10]
PA138A_MA[11]
PA138A_MA[12]
A_W7_T
A_V7_T
A_W6_T
A_V6_T
+1.8V_PA138
+0.9V_PA138A_VREF
C1113
470pF
C1115
0.1uF
C1117
0.1uF
1%
R1104
1K 1%
1K
A_V3_T
A_N5_T
A_N4_T
A_P5_T
A_P4_T
C1114
470pF
C1116
0.1uF
C1118
0.1uF
PA138A_MA[0]
PA138A_MDQ[31]
PA138A_MDQ[24]
PA138A_MDQ[26]
PA138A_MDQ[29]
C1119
0.1uF
+1.8V_PA138A_VDDL1
R1101
1
+1.8V_PA138A_VDDL2
R1102
1
A_T7_T
A_U7_T
A_R8_T
A_U8_T
A_U10_T
A_T10_T
A_R10_T
A_R11_T
A_T11_T
A_T12_T
A_T13_T
A_R13_T
THE
AR1105
22
22
AR1101
22
AR1102
22
AR1103
22
AR1104
22
PA138A_MWE
PA138A_MA[11]
PA138A_MBA2
PA138A_MA[1]
PA138A_MBA1
PA138A_MA[5]
PA138A_MBA0
PA138A_MA[3]
A_W5_T
A_V5_T
A_W4_T
A_W3_T
A_U2_T
A_U1_T
A_T2_T
A_T1_T
A_M2_T
A_M1_T
A_N2_T
A_N1_T
A_V10_T
A_W10_T
A_V11_T
A_W11_T
PA138A_MDQ[12]
PA138A_MDQ[11] A_W14_T
PA138A_MDQ[9] A_V14_T
PA138A_MDQ[14] A_W15_T
A_V15_T
PA138A_MDQ[15]
A_L4_T
PA138A_MDQ[8]
PA138A_MDQ[13] A_L5_T
PA138A_MDQ[10] A_M5_T
A_M4_T
AR1106
22
AR1107
22
AR1108
22
AR1109
22
AR1110
22
AR1111
22
AR1112
22
PA138A_MA[7]
PA138A_MA[12]
PA138A_MA[9]
PA138A_MA[10]
PA138A_MA[6]
PA138A_MA[8]
PA138A_MA[4]
PA138A_MA[2]
PA138A_MDQ[21]
PA138A_MDQ[18]
PA138A_MDQ[16]
PA138A_MDQ[23]
PA138A_MDQ[20]
PA138A_MDQ[19]
PA138A_MDQ[17]
PA138A_MDQ[22]
PA138A_MDQ[4]
PA138A_MDQ[3]
PA138A_MDQ[1]
PA138A_MDQ[6]
VSSQ_10
B2
VSSQ_9
B8
VSSQ_8
A7
VSSQ_7
D2
VSSQ_6
D8
VSSQ_5
E7
VSSQ_4
F2
VSSQ_3
F8
VSSQ_2
H2
VSSQ_1
H8
PA138A_MBA0
PA138A_MBA1
DDR
VDDQ_10
VDDQ_1
C1120
470pF
N2
E1
VDDQ_2
MVREF
A2
PA138A_MA[0]
VDD_3
MA12
MBANK1
PA138A_MA[1]
M7
PA138A_MA[2]
VDD_4
MA11
N7
A1
A1
G3
MBANK0
A0
M3
VDD_5
+1.8V_PA138
MREXT1
M8
PA138A_MA[0-12]
+1.8V_PA138
VDDQ_3
MA10
VREF
M2
D9
PA138A_MDQ[30]DQ14
PA138A_MDQ[16-31]
MA7
MA8
DQ4
470pF
J2
VSS_4
+1.8V_PA138
C1105
470pF
V15
C1135
VSS_5
+1.8V_PA138
C1101
470pF
V10
MBANK2
A_T5_T
A_U5_T
A_R7_T
A_U6_T
+1.8V_PA138
MD17
W10
PA138A_MDQ[16-31]
E3
+1.8V_PA138
C1104
1uF
MD16
W15
PA138A_MDQ[0]
PA138A_MDQ[1]
PA138A_MDQ[2]
PA138A_MDQ[3]
PA138A_MDQ[4]
PA138A_MDQ[5]
PA138A_MDQ[6]
PA138A_MDQ[7]
PA138A_MDQ[8]
PA138A_MDQ[9]
PA138A_MDQ[10]
PA138A_MDQ[11]
PA138A_MDQ[12]
PA138A_MDQ[13]
PA138A_MDQ[14]
PA138A_MDQ[15]
PA138A_MDQ[16]
PA138A_MDQ[17]
PA138A_MDQ[18]
PA138A_MDQ[19]
PA138A_MDQ[20]
PA138A_MDQ[21]
PA138A_MDQ[22]
PA138A_MDQ[23]
PA138A_MDQ[24]
PA138A_MDQ[25]
PA138A_MDQ[26]
PA138A_MDQ[27]
PA138A_MDQ[28]
PA138A_MDQ[29]
PA138A_MDQ[30]
PA138A_MDQ[31]
VSS_4
R1103
C1100
470pF
MD6
MDQSP1
R1122
+1.8V_PA138A_VDDL1
MD5
A_V14_T
A_V11_T
A_W15_T
A_W10_T
A_V10_T
A_V15_T
A_W11_T
A_W14_T
A_T12_T
A_R10_T
A_R13_T
A_T10_T
A_U10_T
A_T13_T
A_R11_T
A_T11_T
A_T2_T
A_N2_T
A_U1_T
A_M1_T
A_M2_T
A_U2_T
A_N1_T
A_T1_T
A_N4_T
A_M5_T
A_P5_T
A_L5_T
A_L4_T
A_P4_T
A_M4_T
A_N5_T
V11
VSS_5
PA138A_MA[3]
J7
M3
V14
MDM0
A3
PA138A_MA[2]
R8
R1108
PA138A_MCKEN
PA138A_MODT
PA138A_MRAS
PA138A_MCS
PA138A_MCAS
A_T5_T
A_V3_T
A_U6_T
A_W3_T
A_U8_T
A_W4_T
A_U7_T
A_W5_T
A_W7_T
A_V5_T
A_W6_T
A_V6_T
A_U5_T
PA138A_MA[0-12]
A_V7_T
A_R8_T
A_T7_T
A_R7_T
PA138A_MA[4]
A2
N3
22
22
R7
NC_1
R12
R1107
22
PA138A_MCK0P
PA138A_MCK0N
PA138A_MCK1P
PA138A_MCK1N
PA138A_MDQ[13]
DQ13
J8
CS
U11
22
22
PA138A_MDQ[12]
DQ12
CLK
ODT
R1105
R1106
PA138A_MDQ[11]
DQ11
+1.8V_PA138
PA138A_MODT
PA138A_MCS
PA138A_MRAS
PA138A_MCAS
PA138A_MWE
22
22
22
PA138A_MDQSP0
PA138A_MDQSN0
PA138A_MDQSP1
PA138A_MDQSN1
PA138A_MDQSP2
PA138A_MDQSN2
PA138A_MDQSP3
PA138A_MDQSN3
+1.8V_PA138
BA0
+0.9V_PA138A_VREF
IC1101
W9751G6KB-25
PA138A_MDQ[0-15]
R1125
100
PA138A_MCK1P
PA138A_MCK1N
PA138A_MCKEN
PA138A_MODT
PA138A_MCS
PA138A_MRAS
PA138A_MCAS
PA138A_MWE
PA138A_MDQSP2
PA138A_MDQSP3
PA138A_MDM2
PA138A_MDM3
PA138A_MDQSN2
PA138A_MDQSN3
PA138A_MBA2
+1.8V_PA138A_VDDL2
+1.8V_PA138
+1.8V_PA138A_VDDL2
C1121
470pF
C1123
0.1uF
C1129
470pF
C1125
1uF
C1124
0.1uF
C1133
470pF
C1136
0.1uF
C1138
0.1uF
C1134
470pF
C1137
0.1uF
C1139
0.1uF
+1.8V_PA138
+1.8V_PA138
C1122
470pF
C1131
0.1uF
C1126
470pF
C1127
0.1uF
C1128
22uF
C1130
470pF
C1132
0.1uF
PA138A_MDQ[7]
PA138A_MDQ[0]
PA138A_MDQ[2]
PA138A_MDQ[5]
PA138A_MDQ[28]
PA138A_MDQ[27]
PA138A_MDQ[25]
PA138A_MDQ[30]
EAX64768002
2012.06.05
PA138A DDR2
11
21
IC1000
+1.05V_PA138B_OSCVDD
PA138P
A19
G16
+1.05V_PA138B_DPLLVDD
OSCVDD1V
VSS_1
VSS_2
E14
DPLLVDD1V
VSS_3
VSS_4
+1.05V_PA138B_VDD
VSS_5
VSS_6
VSS_7
H7
H9
J10
J12
J15
J8
K11
K13
K7
K9
L10
L12
L8
M11
M13
M15
M9
N12
N16
P15
R16
+1.8V_PA138B_VDDM
T15
H11
VDD1V_1
VSS_8
VDD1V_2
VSS_9
VDD1V_5
VSS_10
VDD1V_6
VSS_11
VDD1V_7
VSS_12
VDD1V_4
VSS_13
VDD1V_10
VSS_14
VDD1V_11
VSS_15
VDD1V_8
VSS_16
VDD1V_9
VSS_17
VDD1V_13
VSS_18
VDD1V_14
VSS_19
VDD1V_12
VSS_20
VDD1V_16
VSS_21
VDD1V_17
VSS_22
VDD1V_18
VSS_23
VDD1V_15
VSS_24
VDD1V_19
VSS_25
VDD1V_20
VSS_26
VDD1V_21
VSS_27
VDD1V_22
VSS_28
VDD1V_23
VSS_29
VDD1V_3
VSS_30
VSS_31
K4
L2
M7
N10
N8
R14
R3
T6
T9
U12
U14
U4
V16
V9
+2.5V_PA138B_LVRVDD
W17
W2
VDDM18_1
VSS_32
VDDM18_2
VSS_33
VDDM18_3
VSS_34
VDDM18_5
VSS_35
VDDM18_4
VSS_36
VDDM18_7
VSS_37
VDDM18_6
VSS_38
VDDM18_8
VSS_39
VDDM18_9
VSS_40
VDDM18_11
VSS_41
VDDM18_12
VSS_42
VDDM18_10
VSS_43
VDDM18_14
VSS_44
VDDM18_13
VSS_45
VDDM18_16
VSS_46
VDDM18_15
VSS_47
VSS_48
A1
C3
C5
E3
+2.5V_PA138B_OSCVDDIO
J3
G3
LVRVDD25_1
VSS_49
LVRVDD25_2
VSS_50
LVRVDD25_3
VSS_51
LVRVDD25_4
VSS_52
LVRVDD25_6
VSS_53
LVRVDD25_5
VSS_54
VSS_55
F16
OSCVDDIO25
+2.5V_PA138B_PORVDD
PORVDD25
H17
J16
J17
+3.3V_PA138B_VDDIO
LVTVDD25_1
VSS_60
LVTVDD25_2
VSS_61
LVTVDD25_3
VSS_62
LVTVDD25_4
VSS_63
VSS_64
A11
A6
E17
G10
G12
G18
G5
G8
H13
H19
J18
K17
K19
L18
M17
P17
T17
T19
U18
V18
+2.5V_PA138B_PLL
V19
VSS_58
VSS_59
H16
+2.5V_PA138B_LVTVDD
VSS_56
VSS_57
B10
VDDIO33_2
VSS_65
VDDIO33_1
VSS_66
VDDIO33_3
VSS_67
VDDIO33_6
VSS_68
VDDIO33_7
VSS_69
VDDIO33_8
VSS_70
VDDIO33_4
VSS_71
VDDIO33_5
VSS_72
VDDIO33_9
VSS_73
VDDIO33_10
VSS_74
VDDIO33_11
VSS_75
VDDIO33_12
VSS_76
VDDIO33_13
VSS_77
VDDIO33_14
VSS_78
VDDIO33_15
VSS_79
VDDIO33_16
VSS_80
VDDIO33_17
VSS_81
VDDIO33_19
VTVDD1V_1
VDDIO33_21
VTVDD1V_2
VTVDD1V_4
H4
R1201
10
C1206
0.1uF
16V
10
C1201
4.7uF
10V
C1207
0.1uF
16V
H5
LRPLLVDD25
VTVDD1V_5
LRPLLVSS25CAP
VTVDD1V_6
VTVDD1V_7
F15
R1202
G15
DPLLVDD25
VTVDD1V_8
DPLLVSS25CAP
VTVDD1V_9
10
C1202
4.7uF
10V
C1208
0.1uF
16V
L16
MEPLLVDD25
LVRVSS_1
MEPLLVSS25CAP
LVRVSS_2
LVRVSS_3
K15
R1204
10
C1203
4.7uF
10V
C1209
0.1uF
16V
K16
MPLLVDD25
LVRVSS_4
MPLLVSS25CAP
LVRVSS_5
J5
R1205
C1204
4.7uF
10V
C1210
0.1uF
16V
C1205
22uF
10V
C1211
0.1uF
16V
J4
V3DPLLVDD25
V3DPLLVSS25CAP
10
+1.05V_PA138B_PORVDD
C11
+2.5V_PA138B_PORVDD
+2.5V_PA138B_LVTVDD
C12
C13
C14
C15
C16
C17
C1212
1uF
25V
C1218
470pF
50V
C1229
1uF
25V
C1235
470pF
50V
C1224
470pF
50V
C1230
0.1uF
16V
C1236
470pF
50V
C1225
470pF
50V
C1231
0.1uF
16V
C1237
470pF
50V
C1246
1uF
25V
C1250
470pF
50V
C1240
0.1uF
16V
C1247
470pF
50V
C1251
0.1uF
16V
C1241
470pF
50V
C1248
470pF
50V
C1252
470pF
50V
C1260
1uF
25V
C1265
470pF
50V
C1256
10uF
10V
C1261
10uF
10V
C1266
470pF
50V
C1257
470pF
50V
C1262
470pF
50V
C1267
470pF
50V
C1275
1uF
25V
C1281
470pF
50V
C1272
0.1uF
16V
C1276
470pF
50V
C1282
0.1uF
16V
C1273
470pF
50V
C1277
22uF
10V
C1283
22uF
10V
C1290
470pF
50V
C1294
470pF
50V
C1291
0.1uF
16V
C1295
470pF
50V
D10
D18
E10
E15
E16
F17
+1.8V_PA138B_VDDM
G4
G7
G9
C1213
470pF
50V
G11
G13
C1219
0.1uF
16V
C1286
470pF
50V
G17
C1299
0.1uF
16V
G19
H8
H10
H12
H15
H18
+1.05V_PA138B_VDD
J7
J9
J11
C1214
470pF
50V
J13
J19
C1220
470pF
50V
K3
K5
K8
K10
K12
K18
L1
+3.3V_PA138B_VDDIO
+2.5V_PA138B_LVRVDD
L3
L7
L9
C1215
470pF
50V
L11
L13
C1221
0.1uF
16V
C1226
470pF
50V
C1232
0.1uF
16V
C1238
470pF
50V
C1242
0.1uF
16V
C1249
470pF
50V
C1253
0.1uF
16V
C1258
470pF
50V
C1263
0.1uF
16V
C1285
470pF
50V
C1268
4.7uF
10V
C1289
0.1uF
16V
C1292
470pF
50V
C1298
0.1uF
16V
C1300
470pF
50V
C1303
0.1uF
16V
C1305
10uF
10V
L17
L19
M8
M10
M12
M16
M18
M19
+3.3V
N9
N11
N13
+3.3V_PA138B_VDDIO
+1.8V_PA138
+3.3V_PA138B_VDDIO
+1.05V_PA138B_VTVDD
+1.8V_PA138B_VDDM
L1210
BLM18SG700TN1D
@volta
L1208
BLM18SG700TN1D
@volta
N15
N17
N19
C1216
470pF
50V
P3
P16
C1222
470pF
50V
C1227
470pF
50V
C1233
470pF
50V
C1239
470pF
50V
C1259
0.1uF
16V
C1243
4.7uF
10V
C1264
0.1uF
16V
C1269
0.1uF
16V
C1274
1uF
25V
C1284
0.1uF
16V
C1278
0.1uF
16V
C1287
4.7uF
10V
C1296
0.1uF
16V
R6
R9
C1306
0.1uF
16V
C1302
0.1uF
16V
C1309
0.1uF
16V
R15
R17
T14
T16
T18
U9
U13
U15
U19
V4
V17
W9
L1202
BLM18SG700TN1D
@volta
L1201
BLM18SG700TN1D
@volta
W1
+1.05V_PA138
+1.05V_PA138
+1.05V_PA138
U17
+1.05V_PA138
+1.05V_PA138
L1204
BLM18SG700TN1D
@volta
+1.05V_PA138B_VDD
+1.05V_PA138B_VTVDD
L1209
BLM18SG700TN1D
@volta
L1206
BLM18SG700TN1D
@volta
W16
W18
W19
+1.05V_PA138B_VTVDD
C1223
0.1uF
16V
C1234
0.1uF
16V
C1244
0.1uF
16V
C1254
0.1uF
16V
C1279
0.1uF
16V
C1270
0.1uF
16V
C1297
0.1uF
16V
C1288
0.1uF
16V
C1304
0.1uF
16V
C1307
0.1uF
16V
D11
D12
D13
D14
D15
D16
+2.5V_PA138
+2.5V_PA138
+2.5V_PA138
+2.5V_PA138
+2.5V_PA138
D17
D19
+2.5V_PA138B_PORVDD
+2.5V_PA138B_LVTVDD
+2.5V_PA138B_LVRVDD
+2.5V_PA138B_PLL
A2
L15
R1203
C10
B19
VDDIO33_20
10
C1200
4.7uF
10V
B11
VDDIO33_18
VTVDD1V_3
R1200
B6
C4
D3
F3
L1200
BLM18SG700TN1D
@volta
L1205
BLM18SG700TN1D
@volta
L1203
BLM18SG700TN1D
@volta
L1207
BLM18SG700TN1D
@volta
L1211
BLM18SG700TN1D
@volta
H3
C1217
0.1uF
16V
C1228
0.1uF
16V
C1245
0.1uF
16V
C1255
0.1uF
16V
C1271
0.1uF
16V
C1280
0.1uF
16V
C1293
0.1uF
16V
C1301
0.1uF
16V
C1308
0.1uF
16V
C1310
0.1uF
16V
E11
E12
E13
VPLLVDD25
VPLLVSS25CAP
REXT
R1206
1.2K
1%
THE
EAX64768002
PA138B POWER
2012.06.05
12
23
IC1000
PA138P
+3.3V
R1336
1K
A5
B5
SPLT_TXC0P
A4
SPLT_TXC1N
B4
SPLT_TXC1P
A3
SPLT_TXC2N
B3
SPLT_TXC2P
B1
SPLT_TXCCLKN
B2
SPLT_TXCCLKP
C1
SPLT_TXC3N
C2
SPLT_TXC3P
D1
SPLT_TXC4N
D2
SPLT_TXC4P
LVDSRXA1P
LVDSRXA2N
LVDSRXA2P
LVDSRXA3N
LVDSRXA3P
E2
SPLT_TXD0P
F1
SPLT_TXD1N
F2
SPLT_TXD1P
G1
SPLT_TXD2N
G2
SPLT_TXD2P
H1
SPLT_TXDCLKN
H2
SPLT_TXDCLKP
J1
SPLT_TXD3N
J2
SPLT_TXD3P
K1
SPLT_TXD4N
K2
TXD1N
TXD1P
TXD2N
TXD2P
TXD3N
LVDSRXACLKN
TXD3P
LVDSRXACLKP
TXD4N
LVDSRXA4N
TXD4P
LVDSRXA4P
TXD5N
LVDSRXA5N
TXD5P
LVDSRXA5P
TXD6N
TXD6P
E1
SPLT_TXD0N
+3.3V
LVDSRXA1N
LVDSRXB1N
LVDSRXB1P
LVDSRXB2N
LVDSRXB2P
TXD7N
TXD7P
TXD8N
C19
C1311
0.1uF
C18
C1312
0.1uF
A18
C1313
0.1uF
B18
C1314
0.1uF
A17
C1315
0.1uF
B17
A16
C1316
C1317
0.1uF
0.1uF
B16
C1318
0.1uF
A15
C1319
0.1uF
B15
C1320
0.1uF
A14
C1321
0.1uF
B14
C1322
0.1uF
A13
C1323
0.1uF
B13
C1324
0.1uF
A12
C1325
0.1uF
B12
C1326
0.1uF
TXD8P
JUMP4
LVDSRXBCLKN
PA138B_TX1N
PA138B_TX1P
PA138B_SPI_RXD
PA138B_TX2N
R1337
10K
PA138B_TX2P
GND
SPLT_TXC1N
SPLT_TXC2N
SPLT_TXCCLKN
SPLT_TXC3N
SPLT_TXD0N
SPLT_TXD1N
SPLT_TXD2N
SPLT_TXDCLKN
SPLT_TXD3N
100
100
100
R1303
100
R1304
100
100
R1306
100
R1307
100
R1308
100
R1309
100
R1310
100
R1311
100
SPLT_TXD4N
R1341
10K
VCC
HOLD[IO3]
CLK
R1342
0
DI[IO0]
R1343
0
PA138B_SPI_CLK
PA138B_SPI_TXD
C1327
0.1uF
16V
PA138B_TX3P
R1338
10K
OPT
PA138B_TX4N
PA138B_TX4P
PA138B_TX5N
PA138B_TX5P
+3.3V
+3.3V
P1300
P1302
PA138B_TX6N
12507WR-04L
12507WR-04L
OPT
PA138B_TX6P
PA138B_UART_TX0
L1300
PA138B_TX7N
PA138B_TX7P
PA138B_SCL_DEBUG
PA138B_SDA_DEBUG
E19
LOCKN
+3.3V
R1312
33
LVDSRXB5N
R1301
SPLT_TXC4N
LVDSRXB4P
R1302
R1305
PA138B_TX3N
IC1000
PA138P
PA138B_LOCKN
R1315
4.7K
R1321
PA138B_SCL_DEBUG
SPLT_TXC0N
DO[IO1]
%WP[IO2]
R1314
4.7K
R1300
CS
R1335
0
HTPDN
LVDSRXBCLKP
LVDSRXB4N
R1334
0
PA138B_SPI_CS0
PA138B_UART_RX0
E18
IC1300
W25Q80BVSSIG
PA138B_TX0P
R1313
0
LVDSRXB5P
SPLT_TXD4P
PA138B_TX0N
LVDSRXB3N
LVDSRXB3P
+3.3V
JUMP3
R1339
10K
SPLT_TXC0N
SPLT_TXC0P
+3.3V
33
A10
PA138B_SDA_DEBUG
R1322
33
A9
D6
PA138_SCL_INT
R1323
R1324
C6
PA138_SDA_INT
SPLT_TXC1P
SPLT_TXC2P
SPLT_TXCCLKP
SPLT_TXC3P
SPLT_TXC4P
R1325
33
P19
R1326
33
P18
TWOWSCL0
TDI
TWOWSDA0
TMS
TWOWSCL1
TCK
TWOWSDA1
TRSTN
TWOWSCL2
SPICS1
SPLT_TXD1P
SPLT_TXD2P
SPLT_TXDCLKP
SPLT_TXD3P
M1309
M1305
R1318
SPLT_TXD4P
MDS62110207
MDS62110207
M1310
M1306
MDS62110207
MDS62110207
GASKET_PA138_Upper GASKET_PA138_Upper
C9
M1303
MDS62110207
M1302
MDS62110215
GASKET_PA138
PA138_ACK
F4
PA138_SYNC_EXEC
MDS62110207
10K
C7
R1320
33 OPT
D7
R1327
10K
E7
R1328
10K
E6
M1308
MDS62110207
D5
PA138B_READY
LG1122_3DLR
SPLT_3DLR
THE
R1319
MDS62110207
SPICLK
RESETN
SPITXD
R1316
0
OPT
R1317
N18
R1345
10K
D4
R1346
10K
D8
R1347
10K
E4
R1348
10K
INTL
UARTRXD0
UARTTXD0
GPIO4
UARTRXD1
GPIO5
UARTTXD1
10K
C8
R1349
D9
R1350
E9
R1351
PA138B_SPI_CLK
A8
R1352
PA138B_SPI_TXD
R1353
PA138B_SPI_RXD
B8
SPIRXD
INTH
+3.3V
M1307
M1304
TESTEN
F5
MDS62110215
GASKET_PA138
SPICS0
B9
PA138_RESET
M1301
R1344
E5
TDO
TWOWSDA2
SPLT_TXD0P
A7
PA138B_SPI_CS0
E8
R1354
PA138B_UART_RX0
B7
R1355
PA138B_UART_TX0
R18
R1356
R19
R1357
GPIO6
GPIO9
F18
GPIO10
XIN
GPIO21
XOUT
R1359
PA138T_XIN
F19
EAX64768002
PA138B
2012.06.05
13
23
+0.9V_PA138B_VREF
+0.9V_PA138B_VREF
IC1400
W9751G6KB-25
PA138B_MDQ[0-15]
C1406
470pF
PA138B_MA[0-12]
VREF
PA138B_MA[0]
A0
PA138B_MA[1]
A1
J2
M8
M3
PA138B_MA[2]
A2
M7
PA138B_MA[3]
A3
N2
A4
PA138B_MA[4]
A5
PA138B_MA[5]
PA138B_MA[6]
A6
PA138B_MA[7]
A7
N8
N3
N7
P2
PA138B_MA[8]
A8
P8
PA138B_MA[9]
A9
P3
PA138B_MA[10]A10/AP
A11
PA138B_MA[11]
A12
PA138B_MA[12]
M2
P7
R2
PA138B_MBA0
PA138B_MBA1
L2
BA1
L3
DDR
PA138B_MCK0P
R1400
100
PA138B_MCK0N
PA138B_MCKEN
IC1000
PA138P
DQ0
PA138B_MDQ[0]
DQ1
PA138B_MDQ[1]
H7
DQ2
PA138B_MDQ[2]
H3
DQ3
PA138B_MDQ[3]
H1
DQ4
PA138B_MDQ[4]
PA138B_MDQ[20]
DQ4
H1
H9
DQ5
PA138B_MDQ[5]
PA138B_MDQ[21]
DQ5
H9
F1
DQ6
PA138B_MDQ[6]
F9
DQ7
PA138B_MDQ[7]
C8
DQ8
PA138B_MDQ[8]
C2
DQ9
PA138B_MDQ[9]
D7
DQ10PA138B_MDQ[10]
D3
DQ11PA138B_MDQ[11]
D1
DQ12PA138B_MDQ[12]
D9
DQ13PA138B_MDQ[13]
B1
DQ14PA138B_MDQ[14]
B9
DQ15PA138B_MDQ[15]
PA138B_MDM0
PA138B_MDM1
VDD_5
E1
VDD_4
J9
VDD_3
CLK
K8
M9
VDD_2
CKE
K2
R1
VDD_1
PA138B_MDQ[0-15]
PA138B_MDM0
PA138B_MDM1
PA138B_MDM2
PA138B_MDM3
PA138B_MDQSP0
PA138B_MDQSN0
PA138B_MDQSP1
PA138B_MDQSN1
PA138B_MDQSP2
PA138B_MDQSN2
PA138B_MDQSP3
PA138B_MDQSN3
A9
K7
C1
VDDQ_9
CAS
L7
C3
VDDQ_8
WE
K3
C7
VDDQ_7
C9
VDDQ_6
E9
VDDQ_5
G1
VDDQ_4
G3
VDDQ_3
G7
VDDQ_2
G9
VDDQ_1
L8
LDQS
F7
UDQS
B7
LDM
F3
UDM
B3
PA138B_MA[0-12]
PA138B_MA[0]
PA138B_MA[1]
PA138B_MA[2]
PA138B_MA[3]
PA138B_MA[4]
PA138B_MA[5]
PA138B_MA[6]
PA138B_MA[7]
UDQS
NC_4
PA138B_MBA2
NC_5
NC_6
E8
A8
L1
R3
A2
NC_2
E2
NC_3
VSSDL
R8
J7
+1.8V_PA138B_VDDL1
VDDL
A3
VSS_5
PA138B_MA[9]
E3
VSS_4
PA138B_MA[10]
J3
VSS_3
PA138B_MA[11]
N1
VSS_2
PA138B_MA[12]
P9
VSS_1
R7
NC_1
J1
+1.8V_PA138B_VDDL1
C1402
0.1uF
C1409
470pF
C1411
0.1uF
R12
22
22
R1407
R1408
R1409
V12
22
R1410
W12
22
R1411
W13
22
R1412
V13
22
R1413
P2
22
R1414
22
R1415
22
R1416
R1417
C1403
0.1uF
C1407
0.1uF
C1408
22uF
C1410
470pF
C1412
0.1uF
R1
R2
R1418
W8
22
R1419
V1
22
R1420
R1421
MDM2
MD2
MDM3
MD3
MD4
MDQSP0
MD5
MDQSN0
MD6
MDQSP1
MD7
MDQSN1
MD8
MDQSP2
MD9
MDQSN2
MD10
MDQSP3
MD11
MDQSN3
MD12
MD13
V8
22
22
MD1
V2
MCK0P
MD14
MCK0N
MD15
MCK1P
MD16
MCK1N
MD17
MD18
T8
R5
T3
U3
AR1400
22
T4
T5
V3
U6
W3
U8
W4
U7
W5
W7
V5
W6
V6
U5
V7
R8
T7
R7
MCKE
MD19
MODT
MD20
MRAS
MD21
MCS
MD22
MCAS
MD23
MWE
MD24
MA0
MD25
MA1
MD26
MA2
MD27
MA3
MD28
MA4
MD29
MA5
MD30
MA6
MD31
B_V14_T
B_V11_T
B_W15_T
B_W10_T
B_V10_T
B_V15_T
B_W11_T
B_W14_T
B_T12_T
B_R10_T
B_R13_T
B_T10_T
B_U10_T
B_T13_T
B_R11_T
B_T11_T
B_T2_T
B_N2_T
B_U1_T
B_M1_T
B_M2_T
B_U2_T
B_N1_T
B_T1_T
B_N4_T
B_M5_T
B_P5_T
B_L5_T
B_L4_T
B_P4_T
B_M4_T
B_N5_T
V11
W15
W10
V10
V15
W11
W14
T12
R10
R13
T10
U10
T13
R11
T11
T2
N2
U1
M1
M2
U2
N1
T1
N4
M5
P5
L5
L4
P4
M4
N5
PA138B_MDQ[0]
PA138B_MDQ[1]
PA138B_MDQ[2]
PA138B_MDQ[3]
PA138B_MDQ[4]
PA138B_MDQ[5]
PA138B_MDQ[6]
PA138B_MDQ[7]
PA138B_MDQ[8]
PA138B_MDQ[9]
PA138B_MDQ[10]
PA138B_MDQ[11]
PA138B_MDQ[12]
PA138B_MDQ[13]
PA138B_MDQ[14]
PA138B_MDQ[15]
PA138B_MDQ[16]
PA138B_MDQ[17]
PA138B_MDQ[18]
PA138B_MDQ[19]
PA138B_MDQ[20]
PA138B_MDQ[21]
PA138B_MDQ[22]
PA138B_MDQ[23]
PA138B_MDQ[24]
PA138B_MDQ[25]
PA138B_MDQ[26]
PA138B_MDQ[27]
PA138B_MDQ[28]
PA138B_MDQ[29]
PA138B_MDQ[30]
PA138B_MDQ[31]
G2
PA138B_MDQ[18]
DQ2
H7
PA138B_MDQ[19]
DQ3
H3
PA138B_MDQ[22]
PA138B_MDQ[23]
DQ6
F1
DQ7
F9
PA138B_MDQ[24]
DQ8
C8
PA138B_MDQ[25]
DQ9
C2
PA138B_MDQ[26]DQ10
D7
PA138B_MDQ[27]DQ11
D3
PA138B_MDQ[28]DQ12
D1
PA138B_MDQ[29]DQ13
B1
PA138B_MDQ[31]DQ15
B9
VDD_5
A1
BA1
PA138B_MBA0
PA138B_MBA1
DDR
C3
L7
CAS
VDDQ_7
C7
K3
WE
VDDQ_6
C9
VDDQ_5
E9
VDDQ_4
F7
LDQS
G1
B7
UDQS
F3
LDM
B3
UDM
VDDQ_3
G3
VDDQ_2
G7
VDDQ_1
G9
MA8
MA9
MREXT0
MA10
MREXT1
R4
R1422
240
U16
R1423
240
MA11
MA12
MBANK0
MBANK1
N7
MVREF
+0.9V_PA138B_VREF
VSS_5
A3
E8
LDQS
VSS_4
E3
A8
UDQS
VSS_3
J3
VSS_2
N1
VSS_1
L1
NC_4
P9
R3
NC_5
R7
NC_6
A2
NC_1
E2
NC_2
R8
NC_3
J7
VSSDL
C1420
470pF
F8
H2
VSSQ_2
VSSQ_2
H2
H8
VSSQ_1
VSSQ_1
H8
THE
L3
PA138B_MA[0-12]
VDDQ_8
F2
AR1407
22
L2
BA0
RAS
E7
B_L4_T
B_L5_T
B_M5_T
B_M4_T
PA138B_MA[12]
CS
VSSQ_3
AR1406
22
A12
K7
VSSQ_3
B_V14_T
B_W15_T
B_V15_T
PA138B_MA[11]
R2
C1
F8
A11
VDDQ_9
D8
R1403
PA138B_MA[10]
A10/AP
P7
ODT
VSSQ_4
R1402
PA138B_MA[9]
L8
VSSQ_5
C1418
0.1uF
PA138B_MA[8]
A9
K9
VSSQ_5
C1416
0.1uF
A8
P3
A9
VSSQ_4
C1414
470pF
P8
VDDQ_10
E7
AR1405
22
PA138B_MA[7]
CKE
F2
B_V10_T
+1.8V_PA138B_VDDL1 B_W10_T
B_V11_T
B_W11_T
1
+1.8V_PA138B_VDDL2 B_W14_T
A7
K2
VSSQ_6
AR1404
22
PA138B_MA[6]
P2
R1
VSSQ_6
AR1403
22
A6
VDD_1
D8
C1419
0.1uF
PA138B_MA[5]
N7
R1425
100
PA138B_MA[7]
PA138B_MA[12]
PA138B_MA[9]
PA138B_MA[10]
PA138B_MA[6]
PA138B_MA[8]
PA138B_MA[4]
PA138B_MA[2]
R1424
22
B_V3_T
PA138B_MA[0]
AR1408
PA138B_MCK1N
PA138B_MODT
PA138B_MCS
PA138B_MRAS
PA138B_MCAS
PA138B_MWE
PA138B_MDQSP2
PA138B_MDQSP3
PA138B_MDM2
PA138B_MDM3
PA138B_MDQSN2
PA138B_MDQSN3
PA138B_MBA2
+1.8V_PA138B_VDDL2
J1
VDDL
22
B_N5_T
B_N4_T
B_P5_T
B_P4_T
PA138B_MDQ[31]
PA138B_MDQ[24]
PA138B_MDQ[26]
PA138B_MDQ[29]
AR1409
22
B_T5_T
PA138B_MDQ[21] B_U5_T
PA138B_MDQ[18] B_R7_T
PA138B_MDQ[23]
PA138B_MDQ[20]
PA138B_MDQ[19] B_T7_T
B_U8_T
PA138B_MDQ[4]
PA138B_MDQ[3]
B_R10_T
PA138B_MDQ[0]
PA138B_MDQ[2]
PA138B_MDQ[28]B_T12_T
PA138B_MDQ[27]B_T13_T
PA138B_MDQ[25]B_R13_T
PA138B_MCK1P
+1.8V_PA138
D2
R1404
1K
1%
A5
CLK
VSSQ_7
1K
PA138B_MA[4]
N3
K8
VSSQ_7
1%
A4
M9
D2
C1417
0.1uF
PA138B_MA[3]
N8
VDD_2
A7
C1415
0.1uF
PA138B_MA[2]
CLK
B8
C1413
470pF
A2
A3
J8
VSSQ_8
B_U2_T
B_U1_T
B_T2_T
B_T1_T
M7
N2
J9
VSSQ_8
+0.9V_PA138B_VREF
PA138B_MA[1]
E1
A7
+1.8V_PA138
PA138B_MA[0]
A1
VDD_4
B2
AR1402
22
A0
M3
PA138B_MDQ[16-31]
VDD_3
VSSQ_9
B_W5_T
B_V5_T
B_W4_T
B_W3_T
M8
MA7
MBANK2
AR1401
22
VREF
+1.8V_PA138
VSSQ_10
B_W7_T
B_V7_T
B_W6_T
B_V6_T
470pF
J2
M2
D9
PA138B_MDQ[30]DQ14
VSSQ_9
+1.8V_PA138
C1405
470pF
P1
MD0
MDM1
G8
DQ1
B8
+1.8V_PA138
C1401
470pF
M3
22
B_M2_T
B_M1_T
B_N2_T
B_N1_T
+1.8V_PA138
N3
V14
MDM0
DQ0
PA138B_MDQ[17]
VSSQ_10
+1.8V_PA138
C1404
1uF
U11
R1406
PA138B_MDQ[16]
B2
R1401
C1400
470pF
R1405
22
PA138B_MCKEN
PA138B_MODT
PA138B_MRAS
PA138B_MCS
PA138B_MCAS
B_T5_T
PA138B_MA[0] B_V3_T
PA138B_MA[1] B_U6_T
PA138B_MA[2] B_W3_T
PA138B_MA[3] B_U8_T
PA138B_MA[4] B_W4_T
PA138B_MA[5] B_U7_T
PA138B_MA[6] B_W5_T
PA138B_MA[7] B_W7_T
PA138B_MA[8] B_V5_T
PA138B_MA[9] B_W6_T
PA138B_MA[10]B_V6_T
PA138B_MA[11]B_U5_T
PA138B_MA[12]B_V7_T
B_R8_T
B_T7_T
B_R7_T
PA138B_MA[8]
LDQS
PA138B_MDQSN0
PA138B_MDQSN1
22
22
PA138B_MCK0P
PA138B_MCK0N
PA138B_MCK1P
PA138B_MCK1N
+1.8V_PA138
K9
VDDQ_10
RAS
PA138B_MDQSP0
PA138B_MDQSP1
A1
J8
CS
C1435
G2
CLK
ODT
PA138B_MODT
PA138B_MCS
PA138B_MRAS
PA138B_MCAS
PA138B_MWE
PA138B_MDQ[16-31]
G8
+1.8V_PA138
BA0
IC1401
W9751G6KB-25
PA138B_MWE
PA138B_MA[11]
PA138B_MBA2
PA138B_MA[1]
AR1410
C1423
0.1uF
C1429
470pF
C1425
1uF
C1431
0.1uF
C1433
470pF
C1436
0.1uF
C1438
0.1uF
C1434
470pF
C1437
0.1uF
C1439
0.1uF
+1.8V_PA138
+1.8V_PA138
22
PA138B_MDQ[12]
PA138B_MDQ[11]
PA138B_MDQ[9]
PA138B_MDQ[14]
AR1412
C1421
470pF
22
PA138B_MBA1
PA138B_MA[5]
PA138B_MBA0
PA138B_MA[3]
AR1411
+1.8V_PA138
+1.8V_PA138B_VDDL2
C1422
470pF
C1424
0.1uF
C1426
470pF
C1427
0.1uF
C1428
22uF
C1430
470pF
C1432
0.1uF
22
PA138B_MDQ[15]
PA138B_MDQ[8]
PA138B_MDQ[13]
PA138B_MDQ[10]
PA138B_MDQ[30]
EAX64768002
PA138B DDR2
2012.06.05
14
21
IC1500
THCV216
IC1501
THCV216
+3.3V_LPVDH
LPVDH_1
LPGND_1
+1.8V_VDL
SDSEL
SDSEL
COL1
COL1
COL0
R1500
10K
COL0
No USE(NC at Rx side) HTPDN
LOCKN
LOCKN1
VDL_1
+1.8V_CPVDL
GND_1
CPVDL0
+1.8V_CAVDL
CPGND0
CAVDL_1
CAGND_1
PA138A_TX7N
C1500
0.1uF
PA138A_TX7P
C1501
0.1uF
RX0N
RX0P
CAGND_2
CAGND_3
PA138A_TX6N
C1502
0.1uF
PA138A_TX6P
C1503
0.1uF
+1.8V_CAVDL
RX1N
RX1P
CAGND_4
CAVDL_2
CPGND1
+1.8V_CPVDL
CPVDL1
GND_2
+1.8V_VDL
VDL_2
RESERVED1
PDN
PDN1
RESERVED2
RESERVED3
RES3
RS
RS
+3.3V_LPVDH
IC1502
THCV216
LPGND_2
LPVDH_2
64
63
62
61
60
59
58
7
8
57
56
10
55
11
54
12
53
13
52
14
51
15
50
16
49
17
48
18
47
19
46
20
45
21
44
22
43
23
42
24
41
25
40
26
39
27
38
28
37
29
36
30
35
31
34
32
33
+3.3V_LAVDH
LAGND_2
LPVDH_1
LPGND_1
LAVDH_2
+1.8V_VDL
RLA0RLA0+
RLB0-
SDSEL
T216A_TXH0N
SDSEL
T216A_TXH0P
COL1
COL1
COL0
T216A_TXH1N
RLB0+
R1509
10K
T216A_TXH1P
RLC0-
T216A_TXH2N
RLC0+
COL0
LOCKN
LOCKN2
VDL_1
T216A_TXH2P
+1.8V_CPVDL
RLCLK0R1512
100
1%
RLCLK0+
T216A_TXH3N
RLD0+
CAGND_1
T216A_TXH4N
RLE0+
T216A_TXH4P
CPGND0
CAVDL_1
T216A_TXH3P
RLE0-
GND_1
CPVDL0
+1.8V_CAVDL
RLD0-
PA138A_TX5N
C1506
0.1uF
PA138A_TX5P
C1507
0.1uF
RLF0-
RX0N
RX0P
CAGND_2
RLF0+
CAGND_3
RLA1T216A_TXG0N
RLA1+
T216A_TXG0P
PA138A_TX4N
C1508
0.1uF
T216A_TXG1N
PA138A_TX4P
C1509
0.1uF
RLB1RLB1+
+1.8V_CAVDL
T216A_TXG1P
RX1N
RX1P
CAGND_4
CAVDL_2
RLC1T216A_TXG2N
RLC1+
+1.8V_CPVDL
T216A_TXG2P
CPGND1
CPVDL1
RLCLK1R1513
100
1%
RLCLK1+
+1.8V_VDL
GND_2
VDL_2
RLD1T216A_TXG3N
RESERVED1
RLD1+
T216A_TXG3P
PDN
RLE1T216A_TXG4N
PDN2
RESERVED2
RLE1+
T216A_TXG4P
RESERVED3
RLF1RES3
+3.3V_LAVDH
RLF1+
RS
RS
LAVDH_1
+3.3V_LPVDH
LAGND_1
LPGND_2
LPVDH_2
64
63
62
61
60
59
58
7
8
57
56
10
55
11
54
12
53
13
52
14
51
15
50
16
49
17
48
18
47
19
46
20
45
21
44
22
43
23
42
24
41
25
40
26
39
27
38
28
37
29
36
30
35
31
34
32
33
+1.8V_THCV
R1501
560
+3.3V_THCV
LAVDH_2
C1504
0.1uF
16V
PDN3
C
Q1500
2SC3875S(ALY)
R1503
33
LOCKN1
Q1502
2SC3875S(ALY)
LPVDH_1
LPGND_1
+1.8V_VDL
RLA0RLA0+
RLB0-
SDSEL
T216A_TXF0P
COL1
T216A_TXF1N
RLB0+
T216A_TXF1P
RLC0-
T216A_TXF2N
RLC0+
SDSEL
T216A_TXF0N
COL1
COL0
COL0
R1510
10K
HTPDN
No USE(NC at Rx side)
LOCKN
LOCKN3
VDL_1
T216A_TXF2P
+1.8V_CPVDL
RLCLK0-
GND_1
R1514
100
1%
RLCLK0+
CPVDL0
+1.8V_CAVDL
RLD0-
CPGND0
T216A_TXF3N
RLD0+
CAVDL_1
T216A_TXF3P
RLE0-
CAGND_1
T216A_TXF4N
RLE0+
T216A_TXF4P
PA138A_TX3N
C1522
0.1uF
PA138A_TX3P
C1523
0.1uF
RLF0-
RX0N
RX0P
CAGND_2
RLF0+
CAGND_3
RLA1T216A_TXE0N
RLA1+
T216A_TXE0P
PA138A_TX2N
C1524
0.1uF
T216A_TXE1N
PA138A_TX2P
C1525
0.1uF
RLB1RLB1+
RX1N
RX1P
CAGND_4
+1.8V_CAVDL
T216A_TXE1P
CAVDL_2
RLC1T216A_TXE2N
RLC1+
CPGND1
+1.8V_CPVDL
T216A_TXE2P
CPVDL1
RLCLK1R1515
100
1%
RLCLK1+
GND_2
+1.8V_VDL
VDL_2
RLD1T216A_TXE3N
RESERVED1
RLD1+
T216A_TXE3P
PDN
RLE1T216A_TXE4N
PDN3
RESERVED2
RLE1+
T216A_TXE4P
RESERVED3
RLF1RES3
+3.3V_LAVDH
RLF1+
RS
RS
LAVDH_1
LPGND_2
+3.3V_LPVDH
LAGND_1
LPVDH_2
64
63
62
61
60
59
58
7
8
57
56
10
55
11
54
12
53
13
52
14
51
15
50
16
49
17
48
18
47
19
46
20
45
21
44
22
43
23
42
24
41
25
40
26
39
27
38
28
37
29
36
30
35
31
34
32
33
LAGND_2
+3.3V_LAVDH
+1.8V_THCV
+1.8V_VDL
LPGND_1
+1.8V_VDL
RLA0RLA0+
RLB0-
C1510
0.1uF
16V
C1511
0.1uF
16V
C1512
0.1uF
16V
C1513
0.1uF
16V
C1514
0.1uF
16V
C1515
0.1uF
16V
C1516
0.1uF
16V
C1517
0.1uF
16V
C1518
0.1uF
16V
SDSEL
T216A_TXD0N
SDSEL
T216A_TXD0P
COL1
COL1
COL0
T216A_TXD1N
RLB0+
R1511
10K
T216A_TXD1P
RLC0-
T216A_TXD2N
RLC0+
COL0
LOCKN
LOCKN4
VDL_1
T216A_TXD2P
+1.8V_CPVDL
RLCLK0-
GND_1
T216A_TXDCLKN
RLCLK0+
CPVDL0
T216A_TXDCLKP
+1.8V_CAVDL
RLD0-
CPGND0
T216A_TXD3N
RLD0+
CAVDL_1
T216A_TXD3P
RLE0-
CAGND_1
T216A_TXD4N
RLE0+
T216A_TXD4P
PA138A_TX1N
C1554
0.1uF
PA138A_TX1P
C1555
0.1uF
RLF0-
RLA1-
RLB1RLB1+
T216A_TXC0P
PA138A_TX0N
C1556
0.1uF
T216A_TXC1N
PA138A_TX0P
C1557
0.1uF
RX1P
CAVDL_2
T216A_TXC2N
RLC1+
RX1N
CAGND_4
+1.8V_CAVDL
T216A_TXC1P
RLC1-
CPGND1
+1.8V_CPVDL
T216A_TXC2P
CPVDL1
RLCLK1R1516
100
1%
RLD1-
GND_2
+1.8V_VDL
VDL_2
T216A_TXC3N
RLD1+
RESERVED1
T216A_TXC3P
RLE1-
PDN
T216A_TXC4N
RLE1+
PDN4
RESERVED2
T216A_TXC4P
RESERVED3
RLF1RLF1+
RX0P
CAGND_3
T216A_TXC0N
RLA1+
RLCLK1+
RX0N
CAGND_2
RLF0+
RES3
+3.3V_LAVDH
RS
RS
LAVDH_1
LPGND_2
+3.3V_LPVDH
LAGND_1
LPVDH_2
64
63
62
61
60
59
58
7
8
57
56
10
55
11
54
12
53
13
52
14
51
15
50
16
49
17
48
18
47
19
46
20
45
21
44
22
43
23
42
24
41
25
40
26
39
27
38
28
37
29
36
30
35
31
34
32
33
+3.3V_LAVDH
LAGND_2
LAVDH_2
RLA0-
T216A_TXB0N
RLA0+
T216A_TXB0P
RLB0-
T216A_TXB1N
RLB0+
T216A_TXB1P
RLC0-
T216A_TXB2N
RLC0+
T216A_TXB2P
RLCLK0R1517
100
1%
RLCLK0+
RLD0-
T216A_TXB3N
RLD0+
T216A_TXB3P
RLE0-
T216A_TXB4N
RLE0+
T216A_TXB4P
RLF0RLF0+
RLA1-
T216A_TXA0N
RLA1+
T216A_TXA0P
RLB1-
T216A_TXA1N
RLB1+
T216A_TXA1P
RLC1-
T216A_TXA2N
RLC1+
T216A_TXA2P
RLCLK1R1518
100
1%
RLCLK1+
RLD1-
T216A_TXA3N
RLD1+
T216A_TXA3P
RLE1-
T216A_TXA4N
RLE1+
T216A_TXA4P
RLF1+3.3V_LAVDH
RLF1+
LAVDH_1
LAGND_1
[+1.8V_CAVDL Decaps]
+1.8V_THCV
+1.8V_VDL
L1501
CIS21J121
C1505
0.1uF
16V
LPVDH_1
LAVDH_2
[+1.8V_VDL Decaps]
+3.3V_LAVDH
L1500
CIS21J121
R1505
560
PDN2
+3.3V_LAVDH
+3.3V_LPVDH
+3.3V_LAVDH
LAGND_2
[+3.3V_LAVDH Decaps]
+1.8V_THCV
IC1503
THCV216
+3.3V_LPVDH
+3.3V_LPVDH
+1.8V_CAVDL
+1.8V_CAVDL
L1503
CIS21J121
C1520
0.1uF
16V
C1526
0.1uF
16V
C1529
0.1uF
16V
C1532
0.1uF
16V
C1535
0.1uF
16V
C1538
0.1uF
16V
C1541
0.1uF
16V
C1544
0.1uF
16V
C1547
0.1uF
16V
C1552
0.1uF
16V
C1550
0.1uF
16V
C1558
0.1uF
16V
C1561
0.1uF
16V
C1564
0.1uF
16V
C1567
0.1uF
16V
C1570
0.1uF
16V
C1573
0.1uF
16V
C1576
0.1uF
16V
C1579
0.1uF
16V
C1562
0.1uF
16V
C1565
0.1uF
16V
C1568
0.1uF
16V
C1571
0.1uF
16V
C1574
0.1uF
16V
C1577
0.1uF
16V
C1580
0.1uF
16V
C1563
4.7uF
10V
C1566
4.7uF
10V
C1569
4.7uF
10V
C1572
4.7uF
10V
C1575
4.7uF
10V
C1578
4.7uF
10V
C1581
4.7uF
10V
R1507
33
LOCKN2
+1.8V_THCV
R1502
560
[+1.8V_CPVDL Decaps]
[+3.3V_LPVDH Decaps]
+1.8V_THCV
+3.3V_THCV
R1506
560
+3.3V_LPVDH
+3.3V_LPVDH
+1.8V_THCV
PDN4
+1.8V_CPVDL
+1.8V_CPVDL
L1504
CIS21J121
L1502
CIS21J121
PDN5
C
Q1501
2SC3875S(ALY)
R1504
33
LOCKN3
Q1503
2SC3875S(ALY)
R1508
33
LOCKN4
C1519
0.1uF
16V
C1521
0.1uF
16V
C1527
0.1uF
16V
C1530
0.1uF
16V
C1533
0.1uF
16V
C1536
0.1uF
16V
C1539
0.1uF
16V
C1542
0.1uF
16V
C1545
0.1uF
16V
C1548
0.1uF
16V
C1551
0.1uF
16V
C1553
0.1uF
16V
C1559
0.1uF
16V
+3.3V_LPVDH
C1528
4.7uF
10V
THE
+1.8V_CPVDL
C1531
4.7uF
10V
C1534
4.7uF
10V
C1537
4.7uF
10V
C1540
4.7uF
10V
C1543
4.7uF
10V
C1546
4.7uF
10V
C1549
4.7uF
10V
C1560
4.7uF
10V
EAX64768002
Vx1 HS to LVDS
2012.06.05
15
23
IC1600
THCV216
IC1601
THCV216
+3.3V_LPVDH
LPVDH_1
LPGND_1
+1.8V_VDL
SDSEL
SDSEL
COL1
COL1
COL0
R1600
10K
COL0
LOCKN
LOCKN5
VDL_1
+1.8V_CPVDL
GND_1
CPVDL0
+1.8V_CAVDL
CPGND0
CAVDL_1
CAGND_1
PA138B_TX7N
PA138B_TX7P
C1606
C1607
RX0N
0.1uF
RX0P
0.1uF
CAGND_2
CAGND_3
PA138B_TX6N
PA138B_TX6P
C1608
C1609
IC1602
THCV216
RX1N
0.1uF
RX1P
0.1uF
CAGND_4
+1.8V_CAVDL
CAVDL_2
CPGND1
+1.8V_CPVDL
CPVDL1
GND_2
+1.8V_VDL
VDL_2
RESERVED1
PDN
PDN5
RESERVED2
RESERVED3
RES3
RS
RS
LPGND_2
+3.3V_LPVDH
LPVDH_2
64
63
62
61
60
59
58
57
56
10
55
11
54
12
53
13
52
14
51
15
50
16
49
17
48
18
47
19
46
20
45
21
44
22
43
23
42
24
41
25
40
26
39
27
38
28
37
29
36
30
35
31
34
32
33
LAGND_2
+3.3V_LAVDH
LPVDH_1
LAVDH_2
LPGND_1
+1.8V_VDL
RLA0RLA0+
RLB0-
SDSEL
T216B_TXH0N
SDSEL
T216B_TXH0P
COL1
COL1
COL0
T216B_TXH1N
RLB0+
R1601
10K
T216B_TXH1P
RLC0-
LOCKN6
VDL_1
T216B_TXH2P
+1.8V_CPVDL
RLCLK0RLCLK0+
COL0
LOCKN
T216B_TXH2N
RLC0+
GND_1
R1622
100
1%
CPVDL0
+1.8V_CAVDL
RLD0-
CPGND0
T216B_TXH3N
RLD0+
CAVDL_1
T216B_TXH3P
RLE0-
CAGND_1
T216B_TXH4N
RLE0+
T216B_TXH4P
PA138B_TX5N
RLF0PA138B_TX5P
C1634
C1635
RX0N
0.1uF
RX0P
0.1uF
RLF0+
CAGND_2
RLA1-
CAGND_3
T216B_TXG0N
RLA1+
T216B_TXG0P
RLB1-
PA138B_TX4N
T216B_TXG1N
RLB1+
PA138B_TX4P
C1637
RX1N
0.1uF
RX1P
0.1uF
CAGND_4
+1.8V_CAVDL
T216B_TXG1P
RLC1-
C1636
CAVDL_2
T216B_TXG2N
RLC1+
CPGND1
+1.8V_CPVDL
T216B_TXG2P
CPVDL1
RLCLK1RLCLK1+
R1623
100
1%
RLD1-
VDL_2
RESERVED1
T216B_TXG3P
RLE1-
PDN
T216B_TXG4N
RLE1+
PDN6
RESERVED2
T216B_TXG4P
RLF1RLF1+
GND_2
+1.8V_VDL
T216B_TXG3N
RLD1+
RESERVED3
RES3
+3.3V_LAVDH
RS
RS
LAVDH_1
IC1603
THCV216
+3.3V_LPVDH
+3.3V_LPVDH
LPGND_2
+3.3V_LPVDH
LAGND_1
LPVDH_2
64
63
62
61
60
59
58
57
56
10
55
11
54
12
53
13
52
14
51
15
50
16
49
17
48
18
47
19
46
20
45
21
44
22
43
23
42
24
41
25
40
26
39
27
38
28
37
29
36
30
35
31
34
32
33
+3.3V_LPVDH
+3.3V_LAVDH
LAGND_2
LPVDH_1
LAVDH_2
LPGND_1
+1.8V_VDL
RLA0RLA0+
RLB0-
SDSEL
T216B_TXF0N
SDSEL
T216B_TXF0P
COL1
COL1
COL0
T216B_TXF1N
RLB0+
R1602
10K
T216B_TXF1P
RLC0-
LOCKN7
VDL_1
T216B_TXF2P
+1.8V_CPVDL
RLCLK0R1624
100
1%
RLCLK0+
T216B_TXF3N
RLD0+
CAGND_1
T216B_TXF4N
RLE0+
CPGND0
CAVDL_1
T216B_TXF3P
RLE0-
GND_1
CPVDL0
+1.8V_CAVDL
RLD0-
HTPDN
LOCKN
T216B_TXF2N
RLC0+
COL0
No USE(NC at Rx side)
T216B_TXF4P
PA138B_TX3N
RLF0PA138B_TX3P
C1664
RX0N
0.1uF
C1665
RX0P
0.1uF
RLF0+
CAGND_2
RLA1-
CAGND_3
T216B_TXE0N
RLA1+
T216B_TXE0P
RLB1-
PA138B_TX2N
T216B_TXE1N
RLB1+
PA138B_TX2P
0.1uF
C1667
CAGND_4
CAVDL_2
T216B_TXE2N
RLC1+
RX1P
0.1uF
+1.8V_CAVDL
T216B_TXE1P
RLC1-
C1666
RX1N
+1.8V_CPVDL
T216B_TXE2P
CPGND1
CPVDL1
RLCLK1R1625
100
1%
RLCLK1+
RLD1-
GND_2
+1.8V_VDL
VDL_2
T216B_TXE3N
RLD1+
RESERVED1
T216B_TXE3P
RLE1-
PDN
T216B_TXE4N
RLE1+
PDN7
RESERVED2
T216B_TXE4P
RLF1-
RESERVED3
RES3
+3.3V_LAVDH
RLF1+
RS
RS
LAVDH_1
+3.3V_LPVDH
LAGND_1
LPGND_2
LPVDH_2
64
63
62
61
60
59
58
57
56
10
55
11
54
12
53
13
52
14
51
15
50
16
49
17
48
18
47
19
46
20
45
21
44
22
43
23
42
24
41
25
40
26
39
27
38
28
37
29
36
30
35
31
34
32
33
LAGND_2
+3.3V_LAVDH
LPVDH_1
LAVDH_2
LPGND_1
+1.8V_VDL
RLA0RLA0+
RLB0-
SDSEL
T216B_TXD0N
SDSEL
T216B_TXD0P
COL1
COL1
COL0
T216B_TXD1N
RLB0+
R1613
10K
T216B_TXD1P
RLC0-
T216B_TXD2N
RLC0+
COL0
LOCKN
T216_LOCKN
VDL_1
T216B_TXD2P
+1.8V_CPVDL
RLCLK0-
GND_1
T216B_TXDCLKN
CPVDL0
RLCLK0+
T216B_TXDCLKP
+1.8V_CAVDL
RLD0-
CPGND0
T216B_TXD3N
RLD0+
CAVDL_1
T216B_TXD3P
RLE0-
CAGND_1
T216B_TXD4N
RLE0+
T216B_TXD4P
C1668
PA138B_TX1N
RLF0-
C1669
PA138B_TX1P
RX0N
0.1uF
RX0P
0.1uF
RLF0+
CAGND_2
RLA1-
CAGND_3
T216B_TXC0N
RLA1+
T216B_TXC0P
RLB1-
T216B_TXC1N
RLB1+
0.1uF
C1671
PA138B_TX0P
CAGND_4
CAVDL_2
T216B_TXC2N
RLC1+
RX1P
0.1uF
+1.8V_CAVDL
T216B_TXC1P
RLC1-
C1670
PA138B_TX0N
RX1N
CPGND1
+1.8V_CPVDL
T216B_TXC2P
CPVDL1
RLCLK1RLCLK1+
R1626
100
1%
RLD1RLD1+
VDL_2
RESERVED1
T216B_TXC3P
RLE1-
PDN
T216B_TXC4N
RLE1+
PDN8
RESERVED2
T216B_TXC4P
RLF1RLF1+
GND_2
+1.8V_VDL
T216B_TXC3N
RESERVED3
RES3
+3.3V_LAVDH
RS
RS
LAVDH_1
+3.3V_LPVDH
LAGND_1
LPGND_2
LPVDH_2
64
63
62
61
60
59
58
57
56
10
55
11
54
12
53
13
52
14
51
15
50
16
49
17
48
18
47
19
46
20
45
21
44
22
43
23
42
24
41
25
40
26
39
27
38
28
37
29
36
30
35
31
34
32
33
+3.3V_LAVDH
LAGND_2
LAVDH_2
RLA0-
T216B_TXB0N
RLA0+
T216B_TXB0P
RLB0-
T216B_TXB1N
RLB0+
T216B_TXB1P
RLC0-
T216B_TXB2N
RLC0+
T216B_TXB2P
RLCLK0R1627
100
1%
RLCLK0+
RLD0-
T216B_TXB3N
RLD0+
T216B_TXB3P
RLE0-
T216B_TXB4N
RLE0+
T216B_TXB4P
RLF0RLF0+
RLA1-
T216B_TXA0N
RLA1+
T216B_TXA0P
RLB1-
T216B_TXA1N
RLB1+
T216B_TXA1P
RLC1-
T216B_TXA2N
RLC1+
T216B_TXA2P
RLCLK1R1628
100
1%
RLCLK1+
RLD1-
T216B_TXA3N
RLD1+
T216B_TXA3P
RLE1-
T216B_TXA4N
RLE1+
T216B_TXA4P
RLF1+3.3V_LAVDH
RLF1+
LAVDH_1
LAGND_1
+1.8V_CAVDL
[+3.3V_LPVDH Decaps]
+1.8V_THCV
+1.8V_THCV
+1.8V_THCV
+1.8V_THCV
+1.8V_THCV
+3.3V_LPVDH
+3.3V_LAVDH
C1640
0.1uF
16V
C1643
0.1uF
16V
C1646
0.1uF
16V
C1649
0.1uF
16V
C1652
0.1uF
16V
C1655
0.1uF
16V
C1658
0.1uF
16V
C1661
0.1uF
16V
R1614
10K
R1609
10K
R1603
560
R1618
10K
SDSEL
PDN1
C1600
0.1uF
16V
C1602
0.1uF
16V
C1604
0.1uF
16V
C1610
0.1uF
16V
C1612
0.1uF
16V
C1614
0.1uF
16V
C1616
0.1uF
16V
C1618
0.1uF
16V
C1620
0.1uF
16V
C1622
0.1uF
16V
C1624
0.1uF
16V
C1626
0.1uF
16V
C1628
0.1uF
16V
C1630
0.1uF
16V
C1632
0.1uF
16V
PDN6
C1638
0.1uF
16V
C
Q1600
2SC3875S(ALY)
COL0
COL1
R1615
10K
OPT
R1610
10K
OPT
R1606
33
R1620
10K
OPT
R1619
10K
OPT
R1621
10K
LOCKN5
E
Power Down Mode
- PDN1=High:Normal Operation
- PDN1=Low:Power Down(Hi-Z)
Input Mode Selection

- SDSEL=High:Ch.0/1 enable
- SDSEL=Low:Ch.0 enable,Ch.1 disable
+3.3V_LPVDH
+1.8V_THCV
C1621
4.7uF
10V
C1623
4.7uF
10V
C1625
4.7uF
10V
C1627
4.7uF
10V
C1629
4.7uF
10V
C1631
4.7uF
10V
C1633
4.7uF
10V
C1639
4.7uF
10V
R1611
10K
OPT
PDN7
C
C1641
0.1uF
16V
C1644
0.1uF
16V
C1647
0.1uF
16V
C1650
0.1uF
16V
C1653
0.1uF
16V
C1656
0.1uF
16V
C1659
0.1uF
16V
C1662
0.1uF
16V
Q1601
2SC3875S(ALY)
C1603
0.1uF
16V
C1605
0.1uF
16V
C1611
0.1uF
16V
C1613
0.1uF
16V
C1615
0.1uF
16V
C1617
0.1uF
16V
R1616
10K
OPT
R1607
33
LOCKN6
RES3
RS
R1612
10K
C1601
0.1uF
16V
+3.3V_THCV
+1.8V_THCV
R1604
560
+1.8V_CPVDL
[+1.8V_VDL Decaps]
+1.8V_VDL
Color Depth Selection

- COL1=High&COL0=High:12bit
- COL1=High&COL0=Low:10bit
- COL1=Low&COL0=High:8bit
- COL1=Low&COL0=Low:6bit
R1617
10K
C1619
0.1uF
16V
Field BET(Bit Error Tester) Mode Selection
- RES1=High:Test Pattern enable
- RES1=Low:Normal Operation
+1.8V_THCV
+1.8V_CPVDL
LVDS Swing Range Selection

(RES3=Low)
- RS=High:Normal swing(350mV)
- RS=Low:Reduced swing(200mV)
R1605
560
C1642
4.7uF
10V
C1645
4.7uF
10V
C1648
4.7uF
10V
C1651
4.7uF
10V
C1654
4.7uF
10V
C1657
4.7uF
10V
C1660
4.7uF
10V
C1663
4.7uF
10V
PDN8
C
Q1602
2SC3875S(ALY)
R1608
33
LOCKN7
THE
EAX64768002
Vx1 HS to LVDS
2012.06.05
16
23
IC1700
EP4CE15F23I7N
R1700
100
H5
B2
T216A_TXA1P
1%
T216A_TXA1N
R1701
100
R1703
100
B1
T216A_TXA4P
1%
1%
E4
G5
E3
T216A_TXA4N
C2
T216A_TXA2P
C1
T216A_TXA2N
D2
D1
FMTA_ASDO
H7
H6
FMTA_TXH3P
J6
FMTA_TXH3N
E2
FMTA_CSO
E1
F2
F1
G4
FMTA_TXH4P
G3
FMTA_TXH4N
K6
FMTA_STATUS
L8
FMTA_TXH2P
K8
FMTA_TXH2N
J7
FMTA_TXHCLKP
K7
FMTA_TXHCLKN
J4
H2
FMTA_TXH1P
H1
FMTA_TXH1N
J3
J2
FMTA_TXH0P
J1
FMTA_TXH0N
K2
FMTA_DCLK
K1
FMTA_DATAO
FMTA_CONFIG
SPLT_TDO
SPLT_TCK
SPLT_TMS
FMTA_TDO
FMTA_CE
R1702
22
IC1700
EP4CE15F23I7N
K5
L5
L2
L1
L4
L3
G1
T2
IO_1
T1
IO/DIFFIO_L1P
IO/DIFFIO_L1N
FMTA_TXG3P
IO_2
FMTA_TXG3N
FMTA_TXG1P
IO/DIFFIO_L2N
FMTA_TXG1N
IO/DIFFIO_L3P
FMTA_TXG4P
IO/DIFFIO_L3N
FMTA_TXG4N
IO/DIFFIO_L4P
FMTA_TXG0P
FMTA_TXG0N
L6
M6
M2
M1
M4
M3
N2
N1
L7
IO/VREFB1N0
M5
IO/DIFFIO_L5P
IO/DIFFIO_L5N
FMTA_TXE4P
FMTA_TXE4N
IO/DIFFIO_L6N
FMTA_TXE3P
IO/DIFFIO_L7P
FMTA_TXE3N
P2
P1
R2
R1
N5
IO/DIFFIO_L7N
IO/DIFFIO_L8P
FMTA_TXF4P
IO/DIFFIO_L8N
FMTA_TXF4N
NSTATUS/NSTATUS
FMTA_TXECLKP
IO/DIFFIO_L9P
FMTA_TXECLKN
IO/DIFFIO_L9N
FMTA_TXE2P
IO/DIFFIO_L10P
FMTA_TXE2N
P4
P3
U2
U1
V2
V1
P5
IO_3
IO_4
FMTA_TXGCLKP
IO/DIFFIO_L11P
FMTA_TXGCLKN
IO/DIFFIO_L11N
FMTA_TXG2P
IO/VREFB1N1
FMTA_TXG2N
IO/DIFFIO_L12P
FMTA_TXE1P
IO/DIFFIO_L12N
FMTA_TXE1N
DCLK/DCLK
FMTA_TXE0P
IO/DATA0
FMTA_TXE0N
N6
M7
M8
N8
W2
W1
Y2
Y1
T3
NCONFIG/NCONFIG
TDI/TDI
FMTA_TXF3P
TCK/TCK
FMTA_TXF3N
N7
P7
AA1
TMS/TMS
V4
TDO/TDO
V3
NCE/NCE
CLK1/DIFFCLK_0N
P6
FMTA_TXFCLKP
R5
FMTA_TXFCLKN
T4
T5
FMTA_TXF1P
R6
FMTA_TXF1N
R7
FMTA_TXF0P
T7
FMTA_TXF0N
P8
FMTA_TXF2P
R8
FMTA_TXF2N
T17
T18
FMTA_TXDCLKP
FMTA_TXD4N
FMTA_TXD4P
FMTA_TXD0N
FMTA_TXD0P
FMTA_TXD3N
FMTA_TXD3P
FMTA_TXB4N
FMTA_TXB4P
FMTA_TXB3N
FMTA_TXB3P
FMTA_TXD2N
FMTA_TXD2P
FMTA_TXD1N
FMTA_TXD1P
FMTA_TXC3N
FMTA_TXC3P
FMTA_TXC4N
FMTA_TXC4P
FMTA_TXCCLKN
FMTA_TXCCLKP
FMTA_TXC1N
FMTA_TXC1P
FMTA_TXBCLKN
FMTA_TXBCLKP
FMTA_TXC2N
FMTA_TXC2P
FMTA_TXC0N
FMTA_TXC0P
FMTA_TXB2N
FMTA_TXB2P
W20
W19
Y22
Y21
U20
U19
N14
W22
W21
P15
P16
R17
M15
N15
P17
V22
V21
R20
U22
U21
R18
R19
N16
R22
R21
P20
P22
P21
N20
N19
N17
N18
N22
N21
M22
M21
M20
M19
M16
T22
T21
R9
CLK2/DIFFCLK_1P
G21
IO_20
IO/RUP3
FMTA_CONFIG_DONE
IO/RDN3
FMTA_MSEL[0]
IO/DIFFIO_R34N
FMTA_MSEL[1]
IO/DIFFIO_R34P
FMTA_MSEL[2]
IO/DIFFIO_R33N
FMTA_MSEL[3]
IO/DIFFIO_R33P
FMTA_TXB0N
IO/DIFFIO_R32N
FMTA_TXB0P
IO/DIFFIO_R32P
FMTA_TXB1N
IO_21
FMTA_TXB1P
22
R1748
L18
L17
K20
L16
L15
L22
L21
K15
K19
IO/DIFFIO_R31P
J15
IO/DIFFIO_R30N
IO/DIFFIO_R30P
FMTA_TXA4N
IO/VREFB5N1
FMTA_TXA4P
IO/DIFFIO_R29N
FMTA_TXA2N
K22
K21
J22
J21
FMTA_TXA2P
IO_22
FMTA_TXACLKN
IO/DIFFIO_R28N
FMTA_TXACLKP
IO/DIFFIO_R28P
FMTA_TXA1N
IO_23
FMTA_TXA1P
IO/DIFFIO_R27N
FMTA_TXA3N
FMTA_TXA3P
J16
K16
H22
H21
K17
R1705
100
R1708
100
K18
1%
1%
F22
IO/DIFFIO_R26N
IO/DIFFIO_R26P
T216A_TXH0N
IO_24
T216A_TXH0P
IO/DIFFIO_R25N
FMTA_TXA0N
IO/DIFFIO_R25P
FMTA_TXA0P
IO/VREFB5N0
T216A_TXH1N
IO/DIFFIO_R24N
T216A_TXH1P
IO/DIFFIO_R23N
H20
H19
E22
E21
H18
R1707
100
J17
1%
D22
H16
IO/DIFFIO_R23P
IO/DIFFIO_R22N
T216A_TXH2N
IO/DIFFIO_R22P
T216A_TXH2P
J18
F21
IO/DIFFIO_R24P
D21
F20
F19
R1706
100
IO/DIFFIO_R20N
R1709
100
G18
1%
C22
IO/DIFFIO_R20P
IO/DIFFIO_R19N
T216A_TXH3N
IO/DIFFIO_R19P
T216A_TXH3P
IO_25
T216A_TXH4N
CLK7/DIFFCLK_3N
T216A_TXH4P
CLK6/DIFFCLK_3P
M18
M17
IO/DIFFIO_R31N
IO/DIFFIO_R27P
R10
IO/DIFFIO_L13P
T9
IO/DIFFIO_L13N
V6
IO/DIFFIO_L14P
V5
IO/DIFFIO_L14N
U7
IO/DIFFIO_L15P
U8
IO/DIFFIO_L15N
Y4
IO/DIFFIO_L16P
R11
IO/DIFFIO_L16N
R12
IO_5
Y3
IO/VREFB2N0
Y6
IO/DIFFIO_L17P
IO/DIFFIO_L17N
FMTA_SYNC[0]
IO/DIFFIO_L18P
FMTA_SYNC[1]
AA3
AB3
W6
IO/DIFFIO_L18N
V7
IO_6
IO/DIFFIO_L19P
FMTB_SYNC[0]
IO/DIFFIO_L19N
FMTB_SYNC[1]
IO/DIFFIO_L20P
SPLT_SYNC[0]
IO/DIFFIO_L20N
SPLT_SYNC[1]
AA4
AB4
AA5
AB5
W7
IO/DIFFIO_L21P
Y7
IO/DIFFIO_L21N
U9
IO_7
V8
IO/DIFFIO_L22P
W8
IO/DIFFIO_L22N
IO/DIFFIO_L23P
SPLT_SDA2V5
IO/DIFFIO_L23N
SPLT_SCL2V5
AA7
AB7
Y8
IO/DIFFIO_L24P
V9
IO/DIFFIO_L24N
V10
IO/DIFFIO_L25P
T10
IO/DIFFIO_L25N
U10
IO/VREFB2N1
R1725 0
AA8
IO/DIFFIO_L26P
R1726 0
AB8
IO/DIFFIO_L26N
T11
R1727
0
R1728
0
IO/DIFFIO_L27N
IO/RUP1
AA9
AB9
IO/RDN1
U11
IO/DIFFIO_L28P
V11
IO/DIFFIO_L28N
W10
IO_8
Y10
IO/DIFFIO_L29P
IO/DIFFIO_L29N
FMTA_LED[0]
IO/DIFFIO_L30P
FMT_RESET2V5
IO/DIFFIO_L30N
FMTA_SYSCLK
AA10
AB10
AA11
AB11
IO/DIFFIO_L31P
G22
IO/DIFFIO_R35P
IO/DIFFIO_R29P
T8
CLK3/DIFFCLK_1N
AA12
IO/DIFFIO_B1P
AB12
IO/DIFFIO_B1N
IO/DIFFIO_B2P
FMTA_TP[0]
IO/DIFFIO_B2N
FMTA_TP[1]
IO/DIFFIO_B3P
FMTA_TP[2]
IO/DIFFIO_B3N
FMTA_TP[3]
AA13
AB13
AA14
AB14
V12
IO/DIFFIO_B4P
W13
IO/DIFFIO_B4N
Y13
IO/VREFB3N1
IO/DIFFIO_B5P
FMTA_TP[4]
IO/DIFFIO_B5N
FMTA_TP[5]
AA15
AB15
U12
IO/DIFFIO_B6P
T12
IO_9
IO/PLL1_CLKOUTP
FMTA_TP[6]
IO/PLL1_CLKOUTN
FMTA_TP[7]
IO/DIFFIO_B7P
FMTA_TP[8]
IO/DIFFIO_B7N
FMTA_TP[9]
AA16
AB16
AA17
AB17
R13
IO/DIFFIO_B8P
V13
IO/DIFFIO_B8N
W14
IO/DIFFIO_B9P
U13
IO/DIFFIO_B9N
V14
IO/DIFFIO_B10P
V15
IO/DIFFIO_B10N
W15
IO/DIFFIO_B11P
T14
IO/DIFFIO_B11N
T15
IO_10
AB18
IO/DIFFIO_B12P
AA18
IO/DIFFIO_B12N
AA19
IO/DIFFIO_B13P
AB19
IO/VREFB3N0
W17
IO_11
Y17
IO/DIFFIO_B14P
V16
IO/DIFFIO_B14N
AA20
IO/DIFFIO_B15P
AB20
IO/DIFFIO_B15N
T16
IO_12
R16
IO/DIFFIO_B16P
U15
IO/DIFFIO_B16N
U14
IO_13
R14
IO/DIFFIO_B17P
R15
IO/DIFFIO_B17N
CLK13/DIFFCLK_7P
CLK12/DIFFCLK_7N
IO/DIFFIO_B19P
IO/DIFFIO_B19N
IO/DIFFIO_B20P
IO/DIFFIO_B20N
IO_15
IO/DIFFIO_B21P
IO/DIFFIO_B21N
IO/DIFFIO_B22P
IO/DIFFIO_B22N
IO/DIFFIO_B23P
IO/DIFFIO_B23N
IO/DIFFIO_B24P
IO/DIFFIO_B24N
IO/DIFFIO_B25P
IO/DIFFIO_B25N
IO_16
IO_17
IO/VREFB4N1
IO/DIFFIO_B26P
IO/DIFFIO_B26N
IO/DIFFIO_B27P
IO/DIFFIO_B27N
IO/DIFFIO_B28P
IO/DIFFIO_B28N
IO_18
IO_19
IO/RUP2
IO/RDN2
IO/DIFFIO_B29P
IO/DIFFIO_B29N
IO/VREFB4N0
IO/DIFFIO_B30P
IO/DIFFIO_B30N
IO/PLL4_CLKOUTP
IO/PLL4_CLKOUTN
IO/DIFFIO_B31P
IO/DIFFIO_B31N
IO/DIFFIO_B32P
IO/DIFFIO_B32N
IO/DIFFIO_B18P
IO/DIFFIO_B18N
IO_14
CLK15/DIFFCLK_6P
CLK14/DIFFCLK_6N
IC1700
EP4CE15F23I7N
AA21
P14
IC1700
EP4CE15F23I7N
IO/DIFFIO_L31N
IC1700
EP4CE15F23I7N
FMTA_TXDCLKN
IC1700
EP4CE15F23I7N
1%
H17
C21
B22
B21
C20
D20
F17
G17
IC1700
EP4CE15F23I7N
CLK5/DIFFCLK_2N
T216A_TXF1N
CLK4/DIFFCLK_2P
T216A_TXF1P
CONF_DONE/CONF_DONE
T216A_TXF2N
MSEL0/MSEL0
T216A_TXF2P
MSEL1/MSEL1
T216A_TXF4N
MSEL2/MSEL2
T216A_TXF4P
R1710
100
R1718
100
R1723
100
1%
1%
1%
F16
E16
F15
G16
G15
F14
G14
R1711
100
MSEL3/MSEL3
D17
IO/DIFFIO_R18N
IO/DIFFIO_R18P
T216A_TXG0N
C19
1%
D19
T216A_TXG0P
A20
IO_26
R1712
100
B20
1%
H15
C17
IO/VREFB6N1
IO_27
T216A_TXF0N
IO/DIFFIO_R16N/NCEO
T216A_TXF0P
H14
R1713
100
R1719
100
B19
1%
1%
A18
A19
IO/DIFFIO_R15N
IO/DIFFIO_R15P
T216A_TXG1N
IO/DIFFIO_R14N
T216A_TXG1P
IO/DIFFIO_R14P
T216A_TXF3N
IO/DIFFIO_R13N
T216A_TXF3P
B18
D15
R1714
100
E15
R1720
100
G13
IO/DIFFIO_R13P
IO/DIFFIO_R12N
T216A_TXG2N
IO/DIFFIO_R12P
T216A_TXG2P
IO_28
T216A_TXG3N
IO/DIFFIO_R11N
T216A_TXG3P
1%
A17
1%
B17
A16
R1715
100
R1721
100
R1724
100
R1729
100
R1730
100
IO/DIFFIO_R11P
IO/DIFFIO_R10N
T216A_TXE2N
IO/DIFFIO_R10P
T216A_TXE2P
IO/DIFFIO_R9N/NEW
T216A_TXE0N
IO/DIFFIO_R9P/NOE
T216A_TXE0P
IO/VREFB6N0
T216A_TXE3N
IO/DIFFIO_R8N
T216A_TXE3P
IO/DIFFIO_R8P
T216A_TXG4N
IO/DIFFIO_R7N
T216A_TXG4P
IO/DIFFIO_R7P
T216A_TXE1N
IO/DIFFIO_R6N/NAVD
T216A_TXE1P
1%
1%
T216A_TXD0N
IO/DIFFIO_R5P
T216A_TXD0P
IO/DIFFIO_R4N
T216A_TXD1N
IO/DIFFIO_R4P
T216A_TXD1P
T216A_TXE4N
T216A_TXE4P
IO/DIFFIO_R2P
IO/DIFFIO_R1N
1%
C15
E14
H13
H12
G12
F13
A15
B15
C13
R1716
100
1%
R1722
100
1%
D13
E13
A14
B14
A13
R1717
100
1%
B16
F12
IO/DIFFIO_R6P
1%
1%
IC1700
EP4CE15F23I7N
R1731
100
B13
E12
E11
F11
A12
B12
A11
IO/DIFFIO_T32N
T216A_TXDCLKN
1%
T216A_TXDCLKP
R1732
100
R1738
100
R1743
100
B11
IO/DIFFIO_T32P
1%
1%
1%
D10
IO/DIFFIO_T31N
IO/DIFFIO_T31P
T216A_TXC0N
IO/DIFFIO_T30N
T216A_TXC0P
IO/DIFFIO_T30P
T216A_TXD2N
IO_29
T216A_TXD2P
IO/VREFB7N0
T216A_TXD3N
IO/DIFFIO_T29N
T216A_TXD3P
IO/DIFFIO_T29P
E10
A10
B10
A9
B9
R1733
100
R1739
100
R1744
100
1%
1%
1%
IO/PLL2_CLKOUTN
IO/PLL2_CLKOUTP
T216A_TXD4N
IO_30
T216A_TXD4P
IO/DIFFIO_T28N
T216A_TXB2N
IO/DIFFIO_T28P
T216A_TXB2P
IO/RUP4
T216A_TXB3N
IO/RDN4
T216A_TXB3P
T216A_TXB0N
IO/DIFFIO_T26N
T216A_TXB0P
IO/DIFFIO_T26P
T216A_TXC2N
IO_31
T216A_TXC2P
T216A_TXC3N
T216A_TXC3P
IO/DIFFIO_T24N
A6
R1734
100
1%
R1740
100
R1745
100
B6
1%
C8
1%
C7
G9
H10
H9
R1735
100
A5
F9
1%
T216A_TXC1P
R1736
100
B5
R1741
100
R1746
100
IO/DIFFIO_T23P
T216A_TXB4P
IO/DIFFIO_T21N
T216A_TXC4N
T216A_TXC4P
T216A_TXA0N
T216A_TXA0P
1%
1%
T216A_TXA3N
T216A_TXA3P
T216A_TXB1N
T216A_TXB1P
IO_33
C6
A4
F8
G8
A3
B3
R1742
100
D6
1%
C3
IO_32
1%
F10
B4
R1737
100
E9
G10
T216A_TXC1N
IO/DIFFIO_T22P
A8
B7
IO/VREFB7N1
T216A_TXB4N
G11
A7
IO/DIFFIO_T24P
IO/DIFFIO_T22N
C10
B8
IO/DIFFIO_T27N
H11
1%
E7
C4
F7
G7
E6
E5
CLK10/DIFFCLK_4N
CLK11/DIFFCLK_4P
IO_34
IO/DIFFIO_T15N
IO/DIFFIO_T15P
IO/DIFFIO_T14N
IO_35
IO_36
IO/VREFB8N0
IO/DIFFIO_T8N
IO/DIFFIO_T8P
IO/DIFFIO_T7N
IO/DIFFIO_T7P
IO/DATA5
IO_37
IO/DIFFIO_T6N
IO/DIFFIO_T6P/DATA6
IO/DATA7
IO/DIFFIO_T5N
IO/DIFFIO_T5P/DATA8
IO/DIFFIO_T4N/DATA9
IO/DIFFIO_T4P
IO/VREFB8N1
IO_38
IO/DIFFIO_T2N
IO/DIFFIO_T1N
IO/DIFFIO_T1P
IO/PLL3_CLKOUTN
IO/PLL3_CLKOUTP
CLK8/DIFFCLK_5N
CLK9/DIFFCLK_5P
IO/DIFFIO_R1P
THE
EAX64768002
FMTA I/O
2012.06.05
17
23
+2.5V_FPGA
TP
LED
SAM2333
LD1800
22
R1801
FMTA_TP[1]
22
R1802
FMTA_TP[2]
22
R1803
FMTA_TP[3]
22
R1804
FMTA_TP[4]
22
R1805
FMTA_TP[5]
22
R1806
FMTA_TP[6]
22
R1807
FMTA_TP[7]
22
R1808
FMTA_TP[8]
22
R1809
PA138A_FMT_1
FMTA_TP[9]
22
R1810
PA138A_FMT_2
R1812
10K
FMTA_TP[0]
R1823
22
FMTA_LED[0]
R1822
1K
OPT
X1800
12.288MHz
ST
VCC
1
4
GND
OUT
2
3
OPT
A2[RD]
A1[GN]
R1814
0
FMTA_SYSCLK
OPT
+1.2V_FPGA_VCCD
C1802
0.1uF
16V
OPT
+2.5V_FPGA_VCCA
+2.5V_FPGA
+1.2V_FPGA
IC1700
EP4CE15F23I7N
L10
L11
M10
M11
L12
L13
M1806
M1801
M12
FPGA CONFIGURATION
MDS62110215
MDS62110215
GASKET_FMT
M13
+2.5V_FPGA
N11
K11
GASKET_FMT
N12
K12
K13
M1802
M1807
MDS62110215
MDS62110215
M1808
FMTA_STATUS
MDS62110215
GASKET_FMT
GASKET_FMT
FMTA_CONFIG
M1804
M1809
MDS62110215
MDS62110215
GASKET_FMT
R1838
0
R1836
0
N10
K10
J9
FMTA_MSEL[3]
D7
FMTA_MSEL[2]
J5
FMTA_MSEL[1]
H8
FMTA_MSEL[0]
A1
C5
1/16W
22
AR1800
R1828
10K
C9
R1839
0
OPT
MDS62110215
R1827
10K
N13
R1837
0
OPT
M1803
R1826
10K
R1835
0
FMTA_CONFIG_DONE
R1833
0
GASKET_FMT
GASKET_FMT
R1834
0
OPT
R1832
0
OPT
+2.5V_FPGA
C11
C12
C14
C16
A22
FMTA_CE
GASKET_FMT
E20
R1829
1K
G20
L20
P19
M1805
M1810
MDS62110215
MDS62110215
GASKET_FMT
V20
Y20
AB22
Y18
Y16
GASKET_FMT
Y12
Y11
M1811
Y9
Y5
MDS62110215
AB1
N3
GASKET_FMT
U3
W3
D3
F3
K3
G2
AA2
AA22
H3
R3
AB6
Y15
T20
J19
C18
D8
J11
GND_1
VCCINT_1
GND_2
VCCINT_2
GND_3
VCCINT_3
GND_4
VCCINT_4
GND_5
VCCINT_5
GND_6
VCCINT_6
GND_7
VCCINT_7
GND_8
VCCINT_8
GND_9
VCCINT_9
GND_10
VCCINT_10
GND_11
VCCINT_11
GND_12
VCCINT_12
GND_13
VCCINT_13
GND_14
VCCINT_14
GND_15
VCCINT_15
GND_16
VCCINT_16
GND_17
VCCINT_17
GND_18
VCCINT_18
GND_19
VCCINT_19
GND_20
VCCINT_20
GND_21
VCCINT_21
GND_22
E18
F5
V18
L1801
BLM18PG121SN1D
L14
M14
P11
P12
L9
M9
J13
J14
K14
J10
K9
N9
P9
P10
P13
U16
U17
T13
J8
D4
GND_23
VCCIO1_1
GND_24
VCCIO1_2
GND_25
VCCIO1_3
GND_26
VCCIO1_4
GND_27
F4
VCCIO2_1
GND_29
VCCIO2_2
GND_30
VCCIO2_3
GND_31
VCCIO2_4
GND_32
+2.5V_FPGA_VCCA
+2.5V_FPGA
K4
H4
L1802
BLM18SG700TN1D
N4
GND_28
U4
W4
R4
C1850
0.1uF
16V
C1870
0.1uF
16V
AB2
GND_33
VCCIO3_1
GND_34
VCCIO3_2
GND_35
VCCIO3_3
GND_36
VCCIO3_4
GND_37
VCCIO3_5
GND_38
W5
W9
W11
AA6
+2.5V_FPGA_VCCA
AB21
GND_39
VCCIO4_1
GND_40
VCCIO4_2
GND_41
VCCIO4_3
GND_42
VCCIO4_4
GND_43
VCCIO4_5
GND_44
W12
W16
W18
Y14
C1851 C1856 C1860 C1864

0.1uF 0.1uF 0.1uF 0.1uF
16V
16V
16V
16V
P18
GND_45
VCCIO5_1
GND_46
VCCIO5_2
GND_47
VCCIO5_3
GND_48
VCCIO5_4
GND_49
V19
Y19
T19
E19
GND_50
VCCIO6_1
GND_51
VCCIO6_2
GND_52
VCCIO6_3
GND_53
VCCIO6_4
GND_54
G19
L19
VCCIO7_1
GND_56
VCCIO7_2
GND_57
VCCIO7_3
GND_58
VCCIO7_4
GND_59
VCCIO7_5
GNDA1
VCCIO8_1
GNDA2
VCCIO8_2
GNDA3
VCCIO8_3
GNDA4
VCCIO8_4
+1.2V_FPGA
+1.2V_FPGA_VCCD
J20
A21
GND_55
U5
+2.7V_FPGA
J12
L1803
BLM18SG700TN1D
D12
D14
D16
D18
C1871
0.1uF
16V
C1852
0.1uF
16V
A2
D5
D9
D11
E8
VCCIO8_5
+1.2V_FPGA_VCCD
T6
VCCA1
VCCA2
FPGA Reset
VCCA3
+2.5V_FPGA
C1804
0.1uF
16V
C1806
100pF
50V
VCCD_PLL2
VCCD_PLL3
E17
C1853 C1857 C1861 C1865

0.1uF 0.1uF 0.1uF 0.1uF
16V
16V
16V
16V
F6
V17
VCCD_PLL4
IC1801
EPCS4SI8N
R1813
33
FMT_RESET2V5
2
4
U18
U6
R1811
4.7K
G6
VCCA4
VCCD_PLL1
SW1800
JTP-1127WEM
F18
R1824
22
NCS
R1825
27
DATA
FMTA_CSO
C1876
0.1uF
OPT
R1815
1K OPT
FMTA_DATAO
LG1122_RST
25Ohm
VCC
GND
VCC_2
VCC_1
DCLK
R1830
22
ASDI
R1831
22
FMTA_DCLK
FMTA_ASDO
+1.2V_FPGA
C1812
10pF
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
+2.5V_FPGA
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
THE
EAX64768002
FMTA PWR
2012.06.05
18
23
IC1900
EP4CE15F23I7N
R1900
100
H5
B2
T216B_TXA1P
1%
T216B_TXA1N
R1901
100
R1903
100
B1
T216B_TXA4P
1%
1%
E4
G5
E3
T216B_TXA4N
C2
T216B_TXA2P
C1
T216B_TXA2N
D2
D1
FMTB_ASDO
H7
H6
FMTB_TXH3P
J6
FMTB_TXH3N
E2
FMTB_CSO
E1
F2
F1
G4
FMTB_TXH4P
G3
FMTB_TXH4N
K6
FMTB_STATUS
L8
FMTB_TXH2P
K8
FMTB_TXH2N
J7
FMTB_TXHCLKP
K7
FMTB_TXHCLKN
J4
H2
FMTB_TXH1P
H1
FMTB_TXH1N
J3
J2
FMTB_TXH0P
J1
FMTB_TXH0N
K2
FMTB_DCLK
K1
FMTB_DATAO
FMTB_CONFIG
FMTA_TDO
SPLT_TCK
SPLT_TMS
FMTB_TDO
FMTB_CE
IC1900
EP4CE15F23I7N
R1902
22
K5
L5
L2
L1
L4
L3
G1
T2
IO_1
T1
IO/DIFFIO_L1P
IO/DIFFIO_L1N
FMTB_TXG3P
IO_2
FMTB_TXG3N
FMTB_TXG1P
IO/DIFFIO_L2N
FMTB_TXG1N
IO/DIFFIO_L3P
FMTB_TXG4P
IO/DIFFIO_L3N
FMTB_TXG4N
IO/DIFFIO_L4P
FMTB_TXG0P
FMTB_TXG0N
L6
M6
M2
M1
M4
M3
N2
N1
L7
IO/VREFB1N0
M5
IO/DIFFIO_L5P
IO/DIFFIO_L5N
FMTB_TXE4P
FMTB_TXE4N
IO/DIFFIO_L6N
FMTB_TXE3P
IO/DIFFIO_L7P
FMTB_TXE3N
P2
P1
R2
R1
N5
IO/DIFFIO_L7N
IO/DIFFIO_L8P
FMTB_TXF4P
IO/DIFFIO_L8N
FMTB_TXF4N
NSTATUS/NSTATUS
FMTB_TXECLKP
IO/DIFFIO_L9P
FMTB_TXECLKN
IO/DIFFIO_L9N
FMTB_TXE2P
IO/DIFFIO_L10P
FMTB_TXE2N
P4
P3
U2
U1
V2
V1
P5
IO_3
IO_4
FMTB_TXGCLKP
IO/DIFFIO_L11P
FMTB_TXGCLKN
IO/DIFFIO_L11N
FMTB_TXG2P
IO/VREFB1N1
FMTB_TXG2N
IO/DIFFIO_L12P
FMTB_TXE1P
IO/DIFFIO_L12N
FMTB_TXE1N
DCLK/DCLK
FMTB_TXE0P
IO/DATA0
FMTB_TXE0N
N6
M7
M8
N8
W2
W1
Y2
Y1
T3
NCONFIG/NCONFIG
TDI/TDI
FMTB_TXF3P
TCK/TCK
FMTB_TXF3N
N7
P7
AA1
TMS/TMS
V4
TDO/TDO
V3
NCE/NCE
CLK1/DIFFCLK_0N
P6
FMTB_TXFCLKP
R5
FMTB_TXFCLKN
T4
T5
FMTB_TXF1P
R6
FMTB_TXF1N
R7
FMTB_TXF0P
T7
FMTB_TXF0N
P8
FMTB_TXF2P
R8
FMTB_TXF2N
T17
T18
FMTB_TXDCLKP
FMTB_TXD4N
FMTB_TXD4P
FMTB_TXD0N
FMTB_TXD0P
FMTB_TXD3N
FMTB_TXD3P
FMTB_TXB4N
FMTB_TXB4P
FMTB_TXB3N
FMTB_TXB3P
FMTB_TXD2N
FMTB_TXD2P
FMTB_TXD1N
FMTB_TXD1P
FMTB_TXC3N
FMTB_TXC3P
FMTB_TXC4N
FMTB_TXC4P
FMTB_TXCCLKN
FMTB_TXCCLKP
FMTB_TXC1N
FMTB_TXC1P
FMTB_TXBCLKN
FMTB_TXBCLKP
FMTB_TXC2N
FMTB_TXC2P
FMTB_TXC0N
FMTB_TXC0P
FMTB_TXB2N
FMTB_TXB2P
W20
W19
Y22
Y21
U20
U19
N14
W22
W21
P15
P16
R17
M15
N15
P17
V22
V21
R20
U22
U21
R18
R19
N16
R22
R21
P20
P22
P21
N20
N19
N17
N18
N22
N21
M22
M21
M20
M19
M16
T22
T21
R9
CLK2/DIFFCLK_1P
G21
IO_20
IO/RUP3
FMTB_CONFIG_DONE
IO/RDN3
FMTB_MSEL[0]
IO/DIFFIO_R34N
FMTB_MSEL[1]
IO/DIFFIO_R34P
FMTB_MSEL[2]
IO/DIFFIO_R33N
FMTB_MSEL[3]
IO/DIFFIO_R33P
FMTB_TXB0N
IO/DIFFIO_R32N
FMTB_TXB0P
IO/DIFFIO_R32P
FMTB_TXB1N
IO_21
FMTB_TXB1P
22
R1947
L18
L17
K20
L16
L15
L22
L21
K15
K19
IO/DIFFIO_R31P
J15
IO/DIFFIO_R30N
IO/DIFFIO_R30P
FMTB_TXA4N
IO/VREFB5N1
FMTB_TXA4P
IO/DIFFIO_R29N
FMTB_TXA2N
K22
K21
J22
J21
FMTB_TXA2P
IO_22
FMTB_TXACLKN
IO/DIFFIO_R28N
FMTB_TXACLKP
IO/DIFFIO_R28P
FMTB_TXA1N
IO_23
FMTB_TXA1P
IO/DIFFIO_R27N
FMTB_TXA3N
FMTB_TXA3P
J16
K16
H22
H21
K17
R1905
100
R1908
100
K18
1%
1%
F22
IO/DIFFIO_R26N
IO/DIFFIO_R26P
T216B_TXH0N
IO_24
T216B_TXH0P
IO/DIFFIO_R25N
FMTB_TXA0N
IO/DIFFIO_R25P
FMTB_TXA0P
IO/VREFB5N0
T216B_TXH1N
IO/DIFFIO_R24N
T216B_TXH1P
IO/DIFFIO_R23N
H20
H19
E22
E21
H18
R1907
100
J17
1%
D22
H16
IO/DIFFIO_R23P
IO/DIFFIO_R22N
T216B_TXH2N
IO/DIFFIO_R22P
T216B_TXH2P
J18
F21
IO/DIFFIO_R24P
D21
F20
F19
R1906
100
IO/DIFFIO_R20N
R1909
100
G18
1%
C22
IO/DIFFIO_R20P
IO/DIFFIO_R19N
T216B_TXH3N
IO/DIFFIO_R19P
T216B_TXH3P
IO_25
T216B_TXH4N
CLK7/DIFFCLK_3N
T216B_TXH4P
CLK6/DIFFCLK_3P
M18
M17
IO/DIFFIO_R31N
IO/DIFFIO_R27P
R10
IO/DIFFIO_L13P
T9
IO/DIFFIO_L13N
V6
IO/DIFFIO_L14P
V5
IO/DIFFIO_L14N
U7
IO/DIFFIO_L15P
U8
IO/DIFFIO_L15N
Y4
IO/DIFFIO_L16P
R11
IO/DIFFIO_L16N
R12
IO_5
Y3
IO/VREFB2N0
Y6
IO/DIFFIO_L17P
IO/DIFFIO_L17N
FMTB_SYNC[0]
IO/DIFFIO_L18P
FMTB_SYNC[1]
AA3
AB3
W6
IO/DIFFIO_L18N
V7
IO_6
IO/DIFFIO_L19P
FMTA_SYNC[0]
IO/DIFFIO_L19N
FMTA_SYNC[1]
IO/DIFFIO_L20P
SPLT_SYNC[0]
IO/DIFFIO_L20N
SPLT_SYNC[1]
AA4
AB4
AA5
AB5
W7
IO/DIFFIO_L21P
Y7
IO/DIFFIO_L21N
U9
IO_7
V8
IO/DIFFIO_L22P
W8
IO/DIFFIO_L22N
IO/DIFFIO_L23P
SPLT_SDA2V5
IO/DIFFIO_L23N
SPLT_SCL2V5
AA7
AB7
Y8
IO/DIFFIO_L24P
V9
IO/DIFFIO_L24N
V10
IO/DIFFIO_L25P
T10
IO/DIFFIO_L25N
U10
R1925
0
R1926
0
IO/VREFB2N1
IO/DIFFIO_L26P
AA8
AB8
IO/DIFFIO_L26N
T11
R1927
0
R1928
0
IO/DIFFIO_L27N
IO/RUP1
AA9
AB9
IO/RDN1
U11
IO/DIFFIO_L28P
V11
IO/DIFFIO_L28N
W10
IO_8
Y10
IO/DIFFIO_L29P
IO/DIFFIO_L29N
FMTB_LED[0]
IO/DIFFIO_L30P
FMT_RESET2V5
IO/DIFFIO_L30N
FMTB_SYSCLK
AA10
AB10
AA11
AB11
IO/DIFFIO_L31P
G22
IO/DIFFIO_R35P
IO/DIFFIO_R29P
T8
CLK3/DIFFCLK_1N
AA12
IO/DIFFIO_B1P
AB12
IO/DIFFIO_B1N
IO/DIFFIO_B2P
FMTB_TP[0]
IO/DIFFIO_B2N
FMTB_TP[1]
IO/DIFFIO_B3P
FMTB_TP[2]
IO/DIFFIO_B3N
FMTB_TP[3]
AA13
AB13
AA14
AB14
V12
IO/DIFFIO_B4P
W13
IO/DIFFIO_B4N
Y13
IO/VREFB3N1
IO/DIFFIO_B5P
FMTB_TP[4]
IO/DIFFIO_B5N
FMTB_TP[5]
AA15
AB15
U12
IO/DIFFIO_B6P
T12
IO_9
IO/PLL1_CLKOUTP
FMTB_TP[6]
IO/PLL1_CLKOUTN
FMTB_TP[7]
IO/DIFFIO_B7P
FMTB_TP[8]
IO/DIFFIO_B7N
FMTB_TP[9]
AA16
AB16
AA17
AB17
R13
IO/DIFFIO_B8P
V13
IO/DIFFIO_B8N
W14
IO/DIFFIO_B9P
U13
IO/DIFFIO_B9N
V14
IO/DIFFIO_B10P
V15
IO/DIFFIO_B10N
W15
IO/DIFFIO_B11P
T14
IO/DIFFIO_B11N
T15
IO_10
AB18
IO/DIFFIO_B12P
AA18
IO/DIFFIO_B12N
AA19
IO/DIFFIO_B13P
AB19
IO/VREFB3N0
W17
IO_11
Y17
IO/DIFFIO_B14P
V16
IO/DIFFIO_B14N
AA20
IO/DIFFIO_B15P
AB20
IO/DIFFIO_B15N
T16
IO_12
R16
IO/DIFFIO_B16P
U15
IO/DIFFIO_B16N
U14
IO_13
R14
IO/DIFFIO_B17P
R15
IO/DIFFIO_B17N
CLK13/DIFFCLK_7P
CLK12/DIFFCLK_7N
IO/DIFFIO_B19P
IO/DIFFIO_B19N
IO/DIFFIO_B20P
IO/DIFFIO_B20N
IO_15
IO/DIFFIO_B21P
IO/DIFFIO_B21N
IO/DIFFIO_B22P
IO/DIFFIO_B22N
IO/DIFFIO_B23P
IO/DIFFIO_B23N
IO/DIFFIO_B24P
IO/DIFFIO_B24N
IO/DIFFIO_B25P
IO/DIFFIO_B25N
IO_16
IO_17
IO/VREFB4N1
IO/DIFFIO_B26P
IO/DIFFIO_B26N
IO/DIFFIO_B27P
IO/DIFFIO_B27N
IO/DIFFIO_B28P
IO/DIFFIO_B28N
IO_18
IO_19
IO/RUP2
IO/RDN2
IO/DIFFIO_B29P
IO/DIFFIO_B29N
IO/VREFB4N0
IO/DIFFIO_B30P
IO/DIFFIO_B30N
IO/PLL4_CLKOUTP
IO/PLL4_CLKOUTN
IO/DIFFIO_B31P
IO/DIFFIO_B31N
IO/DIFFIO_B32P
IO/DIFFIO_B32N
IO/DIFFIO_B18P
IO/DIFFIO_B18N
IO_14
CLK15/DIFFCLK_6P
CLK14/DIFFCLK_6N
IC1900
EP4CE15F23I7N
AA21
P14
IC1900
EP4CE15F23I7N
IO/DIFFIO_L31N
IC1900
EP4CE15F23I7N
FMTB_TXDCLKN
IC1900
EP4CE15F23I7N
1%
H17
C21
B22
B21
C20
D20
F17
G17
IC1900
EP4CE15F23I7N
CLK5/DIFFCLK_2N
T216B_TXF1N
CLK4/DIFFCLK_2P
T216B_TXF1P
CONF_DONE/CONF_DONE
T216B_TXF2N
MSEL0/MSEL0
T216B_TXF2P
MSEL1/MSEL1
T216B_TXF4N
MSEL2/MSEL2
T216B_TXF4P
R1910
100
R1918
100
R1923
100
1%
1%
1%
F16
E16
F15
G16
G15
F14
G14
R1911
100
MSEL3/MSEL3
D17
IO/DIFFIO_R18N
IO/DIFFIO_R18P
T216B_TXG0N
C19
1%
D19
T216B_TXG0P
A20
IO_26
R1912
100
B20
1%
H15
C17
IO/VREFB6N1
IO_27
T216B_TXF0N
IO/DIFFIO_R16N/NCEO
T216B_TXF0P
H14
R1913
100
R1919
100
B19
1%
1%
A18
A19
IO/DIFFIO_R15N
IO/DIFFIO_R15P
T216B_TXG1N
IO/DIFFIO_R14N
T216B_TXG1P
IO/DIFFIO_R14P
T216B_TXF3N
IO/DIFFIO_R13N
T216B_TXF3P
B18
D15
R1914
100
E15
R1920
100
G13
IO/DIFFIO_R13P
IO/DIFFIO_R12N
T216B_TXG2N
IO/DIFFIO_R12P
T216B_TXG2P
IO_28
T216B_TXG3N
IO/DIFFIO_R11N
T216B_TXG3P
1%
A17
1%
B17
A16
R1915
100
R1921
100
R1924
100
R1929
100
R1930
100
IO/DIFFIO_R11P
IO/DIFFIO_R10N
T216B_TXE2N
IO/DIFFIO_R10P
T216B_TXE2P
IO/DIFFIO_R9N/NEW
T216B_TXE0N
IO/DIFFIO_R9P/NOE
T216B_TXE0P
IO/VREFB6N0
T216B_TXE3N
IO/DIFFIO_R8N
T216B_TXE3P
IO/DIFFIO_R8P
T216B_TXG4N
IO/DIFFIO_R7N
T216B_TXG4P
IO/DIFFIO_R7P
T216B_TXE1N
IO/DIFFIO_R6N/NAVD
T216B_TXE1P
1%
1%
T216B_TXD0N
IO/DIFFIO_R5P
T216B_TXD0P
IO/DIFFIO_R4N
T216B_TXD1N
IO/DIFFIO_R4P
T216B_TXD1P
T216B_TXE4N
T216B_TXE4P
IO/DIFFIO_R2P
IO/DIFFIO_R1N
1%
C15
E14
H13
H12
G12
F13
A15
B15
C13
R1916
100
1%
R1922
100
1%
D13
E13
A14
B14
A13
R1917
100
1%
B16
F12
IO/DIFFIO_R6P
1%
1%
IC1900
EP4CE15F23I7N
R1931
100
B13
E12
E11
F11
A12
B12
A11
IO/DIFFIO_T32N
T216B_TXDCLKN
1%
T216B_TXDCLKP
R1932
100
R1938
100
R1943
100
B11
IO/DIFFIO_T32P
1%
1%
1%
D10
IO/DIFFIO_T31N
IO/DIFFIO_T31P
T216B_TXC0N
IO/DIFFIO_T30N
T216B_TXC0P
IO/DIFFIO_T30P
T216B_TXD2N
IO_29
T216B_TXD2P
IO/VREFB7N0
T216B_TXD3N
IO/DIFFIO_T29N
T216B_TXD3P
IO/DIFFIO_T29P
E10
A10
B10
A9
B9
R1933
100
R1939
100
R1944
100
1%
1%
1%
IO/PLL2_CLKOUTN
IO/PLL2_CLKOUTP
T216B_TXD4N
IO_30
T216B_TXD4P
IO/DIFFIO_T28N
T216B_TXB2N
IO/DIFFIO_T28P
T216B_TXB2P
IO/RUP4
T216B_TXB3N
IO/RDN4
T216B_TXB3P
T216B_TXB0N
IO/DIFFIO_T26N
T216B_TXB0P
IO/DIFFIO_T26P
T216B_TXC2N
IO_31
T216B_TXC2P
T216B_TXC3N
T216B_TXC3P
IO/DIFFIO_T24N
A6
R1934
100
1%
R1940
100
R1945
100
B6
1%
C8
1%
C7
G9
H10
H9
R1935
100
A5
F9
1%
T216B_TXC1P
R1936
100
B5
R1941
100
R1946
100
IO/DIFFIO_T23P
T216B_TXB4P
IO/DIFFIO_T21N
T216B_TXC4N
T216B_TXC4P
T216B_TXA0N
T216B_TXA0P
1%
1%
T216B_TXA3N
T216B_TXA3P
T216B_TXB1N
T216B_TXB1P
IO_33
C6
A4
F8
G8
A3
B3
R1942
100
D6
1%
C3
IO_32
1%
F10
B4
R1937
100
E9
G10
T216B_TXC1N
IO/DIFFIO_T22P
A8
B7
IO/VREFB7N1
T216B_TXB4N
G11
A7
IO/DIFFIO_T24P
IO/DIFFIO_T22N
C10
B8
IO/DIFFIO_T27N
H11
1%
E7
C4
F7
G7
E6
E5
CLK10/DIFFCLK_4N
CLK11/DIFFCLK_4P
IO_34
IO/DIFFIO_T15N
IO/DIFFIO_T15P
IO/DIFFIO_T14N
IO_35
IO_36
IO/VREFB8N0
IO/DIFFIO_T8N
IO/DIFFIO_T8P
IO/DIFFIO_T7N
IO/DIFFIO_T7P
IO/DATA5
IO_37
IO/DIFFIO_T6N
IO/DIFFIO_T6P/DATA6
IO/DATA7
IO/DIFFIO_T5N
IO/DIFFIO_T5P/DATA8
IO/DIFFIO_T4N/DATA9
IO/DIFFIO_T4P
IO/VREFB8N1
IO_38
IO/DIFFIO_T2N
IO/DIFFIO_T1N
IO/DIFFIO_T1P
IO/PLL3_CLKOUTN
IO/PLL3_CLKOUTP
CLK8/DIFFCLK_5N
CLK9/DIFFCLK_5P
IO/DIFFIO_R1P
THE
EAX64768002
FMTB I/O
2012.06.05
19
23
+2.5V_FPGA
TP
LED
SAM2333
LD2000
4.7K
R2000
FMTB_TP[1]
22
R2001
FMTB_TP[2]
22
R2002
FMTB_TP[3]
22
R2003
FMTB_TP[4]
22
R2004
FMTB_TP[5]
22
R2005
FMTB_TP[6]
22
R2006
FMTB_TP[7]
22
R2007
FMTB_TP[8]
22
R2008
PA138A_FMT_1
FMTB_TP[9]
22
R2009
PA138A_FMT_2
R2010
10K
FMTB_TP[0]
R2013
22
FMTB_LED[0]
R2012
1K
OPT
PDN
X2000
12.288MHz
ST
VCC
1
4
GND
OUT
2
3
OPT
A2[RD]
A1[GN]
R2011
0
FMTB_SYSCLK
OPT
+1.2V_FPGA_VCCD
C2000
0.1uF
16V
OPT
+2.5V_FPGA_VCCA
+2.5V_FPGA
+1.2V_FPGA
IC1900
EP4CE15F23I7N
L10
L11
M10
M11
L12
L13
M12
FPGA CONFIGURATION
M13
+2.5V_FPGA
N11
K11
Upper Gasket
N12
GASKET_FMT_Upper
M2002
MDS62110207
GASKET_FMT_Upper
M2007
FMTB_STATUS
FMTB_CONFIG
R2017
10K
R2028
0
N10
K10
J9
FMTB_MSEL[3]
D7
FMTB_MSEL[2]
J5
FMTB_MSEL[1]
H8
FMTB_MSEL[0]
A1
C5
1/16W
22
AR2000
R2018
10K
C9
R2029
0
OPT
MDS62110207
R2016
10K
N13
R2027
0
OPT
FMTB_CONFIG_DONE
R2025
0
M2006
R2023
0
M2001
K13
R2026
0
+2.5V_FPGA
R2024
0
OPT
R2022
0
OPT
K12
C11
C12
C14
MDS62110207
MDS62110207
C16
A22
GASKET_FMT_Upper
GASKET_FMT_Upper
FMTB_CE
E20
R2019
1K
G20
L20
M2003
M2008
MDS62110207
MDS62110207
GASKET_FMT_Upper
P19
V20
Y20
AB22
Y18
GASKET_FMT_Upper
Y16
Y12
M2004
M2009
MDS62110207
MDS62110207
Y11
Y9
Y5
AB1
N3
GASKET_FMT_Upper
GASKET_FMT_Upper
M2005
M2010
U3
W3
D3
MDS62110207
MDS62110207
GASKET_FMT_Upper
GASKET_FMT_Upper
F3
K3
G2
AA2
AA22
H3
R3
AB6
Y15
T20
J19
C18
D8
J11
GND_1
VCCINT_1
GND_2
VCCINT_2
GND_3
VCCINT_3
GND_4
VCCINT_4
GND_5
VCCINT_5
GND_6
VCCINT_6
GND_7
VCCINT_7
GND_8
VCCINT_8
GND_9
VCCINT_9
GND_10
VCCINT_10
GND_11
VCCINT_11
GND_12
VCCINT_12
GND_13
VCCINT_13
GND_14
VCCINT_14
GND_15
VCCINT_15
GND_16
VCCINT_16
GND_17
VCCINT_17
GND_18
VCCINT_18
GND_19
VCCINT_19
GND_20
VCCINT_20
GND_21
VCCINT_21
GND_22
E18
F5
V18
L2001
BLM18PG121SN1D
L14
M14
P11
P12
L9
M9
J13
J14
K14
J10
K9
N9
P9
P10
P13
U16
U17
T13
J8
D4
GND_23
VCCIO1_1
GND_24
VCCIO1_2
GND_25
VCCIO1_3
GND_26
VCCIO1_4
GND_27
F4
K4
H4
N4
GND_28
VCCIO2_1
GND_29
VCCIO2_2
GND_30
VCCIO2_3
GND_31
VCCIO2_4
GND_32
U4
W4
R4
AB2
GND_33
VCCIO3_1
GND_34
VCCIO3_2
GND_35
VCCIO3_3
GND_36
VCCIO3_4
GND_37
VCCIO3_5
GND_38
W5
W9
W11
AA6
+2.5V_FPGA_VCCA
AB21
GND_39
VCCIO4_1
GND_40
VCCIO4_2
GND_41
VCCIO4_3
GND_42
VCCIO4_4
GND_43
VCCIO4_5
GND_44
W12
W16
W18
Y14
C2049 C2054 C2058 C2062

0.1uF 0.1uF 0.1uF 0.1uF
16V
16V
16V
16V
P18
GND_45
VCCIO5_1
GND_46
VCCIO5_2
GND_47
VCCIO5_3
GND_48
VCCIO5_4
GND_49
V19
Y19
T19
E19
GND_50
VCCIO6_1
GND_51
VCCIO6_2
GND_52
VCCIO6_3
GND_53
VCCIO6_4
GND_54
G19
L19
J20
A21
GND_55
VCCIO7_1
GND_56
VCCIO7_2
GND_57
VCCIO7_3
GND_58
VCCIO7_4
GND_59
VCCIO7_5
GNDA1
VCCIO8_1
GNDA2
VCCIO8_2
GNDA3
VCCIO8_3
GNDA4
VCCIO8_4
U5
+2.7V_FPGA
J12
D12
D14
D16
D18
A2
D5
D9
D11
E8
VCCIO8_5
+1.2V_FPGA_VCCD
T6
VCCA1
VCCA2
VCCA3
C2002
0.1uF
16V
C2004
100pF
50V
F18
G6
U18
VCCA4
U6
VCCD_PLL1
VCCD_PLL2
VCCD_PLL3
E17
C2051 C2055 C2059 C2063

0.1uF 0.1uF 0.1uF 0.1uF
16V
16V
16V
16V
F6
V17
VCCD_PLL4
IC2000
EPCS4SI8N
R2014
22
NCS
R2015
27
DATA
FMTB_CSO
FMTB_DATAO
25Ohm
VCC
GND
VCC_2
VCC_1
DCLK
R2020
22
ASDI
R2021
22
FMTB_DCLK
FMTB_ASDO
+1.2V_FPGA
C2010
10pF
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
+2.5V_FPGA
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
THE
EAX64768002
FMTB PWR
2012.06.05
20
23
IC2100
THCV215
IC2101
THCV215
IC2102
THCV215
LAGND_1
LAVDH_1
FMTA_TXA0N
FMTA_TXA0P
FMTA_TXA1N
FMTA_TXA1P
FMTA_TXA2N
FMTA_TXA2P
TLA0TLA0+
TLB0TLB0+
TLC0TLC0+
TLCLK0-
FMTA_TXACLKN
TLCLK0+
FMTA_TXACLKP
FMTA_TXA3N
FMTA_TXA3P
FMTA_TXA4N
FMTA_TXA4P
TLD0TLD0+
TLE0TLE0+
TLF0TLF0+
FMTA_TXB0N
TLA1-
FMTA_TXB0P
TLA1+
FMTA_TXB1N
TLB1-
FMTA_TXB1P
TLB1+
FMTA_TXB2N
TLC1-
FMTA_TXB2P
TLC1+
FMTA_TXBCLKN
TLCLK1-
FMTA_TXBCLKP
TLCLK1+
FMTA_TXB3N
TLD1-
FMTA_TXB3P
TLD1+
FMTA_TXB4N
TLE1-
FMTA_TXB4P
TLE1+
TLF1-
+3.3V_LAVDH
TLF1+
LAVDH_2
LAGND_2
64
63
62
61
60
59
58
57
56
10
55
11
54
12
53
13
52
14
51
15
50
16
49
17
48
18
47
19
46
20
45
21
44
22
43
23
42
24
41
25
40
26
39
27
38
28
37
29
36
30
35
31
34
32
33
+3.3V_LAVDH
LPVDL_2
LPGND_2
LAGND_1
TLA0-
FMTA_TXC0N
SDSEL
COL1
TLA0+
FMTA_TXC0P
COL1
COL0
RDY
TLB0+
FMTA_TXC1P
PDN
TLC0-
FMTA_TXC2N
PDN
HTPDN
TLC0+
FMTA_TXC2P
No USE(GND at Tx side)
+1.8V_VDL
LOCK
TLCLK0FMTA_TXCCLKN
TLCLK0+
VDL_2
FMTA_TXCCLKP
GND_2
+1.8V_CAVDL
CAVDL_2
TX0P
TLD0+
FMTA_TXC3P
CAGND_3
TX0N
TLD0-
FMTA_TXC3N
TLE0-
FMTA_TXC4N
C2100
0.1uF
TX0N
C2101
0.1uF
TX0P
TLE0+
FMTA_TXC4P
TLF0-
CAGND_2
TLF0+
TX1N
TLA1-
TX1P
CAGND_1
C2102
0.1uF
TX1N
FMTA_TXD0N
C2103
0.1uF
TX1P
FMTA_TXD0P
+1.8V_CAVDL
TLB1-
+1.8V_CPVDL
TLC1-
FMTA_TXD2N
CPVDL
TLC1+
FMTA_TXD2P
FMTA_TXDCLKN
DRV0
R2100
TLCLK1+
10K
FMTA_TXDCLKP
PRE1
PRE0
TLE1-
FMTA_TXD4N
RESERVED1
TLE1+
FMTA_TXD4P
RES1
TLF1-
+1.8V_VDL
VDL_1
LPGND_1
TLD1+
FMTA_TXD3P
RESERVED0
GND_1
TLD1-
FMTA_TXD3N
PRE1
TLF1+
+3.3V_LAVDH
+1.8V_LPVDL
LAVDH_2
LPVDL_1
61
60
59
58
57
56
10
55
11
54
12
53
13
52
14
51
15
50
49
17
48
18
47
46
20
45
21
44
22
TLCLK1-
DRV1
62
19
TLB1+
FMTA_TXD1P
CPGND
63
16
TLA1+
FMTA_TXD1N
CAVDL_1
TLB0-
FMTA_TXC1N
COL0
64
LAVDH_1
SDSEL
LOCKN
+1.8V_LPVDL
+1.8V_LPVDL
+1.8V_LPVDL
+3.3V_LAVDH
IC2103
THCV215
LAGND_2
43
23
42
24
41
25
40
26
39
27
38
28
37
29
36
30
35
31
34
32
33
+3.3V_LAVDH
LPVDL_2
LAGND_1
LPGND_2
LAVDH_1
SDSEL
TLA0-
FMTA_TXE0N
SDSEL
COL1
TLA0+
FMTA_TXE0P
COL1
COL0
TLB0-
FMTA_TXE1N
COL0
RDY
TLB0+
FMTA_TXE1P
PDN
HTPDN
+1.8V_VDL
LOCK
LOCKN
TLC0-
FMTA_TXE2N
PDN
TLC0+
FMTA_TXE2P
TLCLK0FMTA_TXECLKN
TLCLK0+
VDL_2
FMTA_TXECLKP
GND_2
+1.8V_CAVDL
TLD0-
FMTA_TXE3N
CAVDL_2
TLD0+
FMTA_TXE3P
CAGND_3
TLE0-
FMTA_TXE4N
TX0N
TX0P
C2132
0.1uF
TX2N
C2133
0.1uF
TX2P
TLE0+
FMTA_TXE4P
TLF0-
CAGND_2
TLF0+
TX1N
TLA1-
TX1P
C2134
0.1uF
TX3N
FMTA_TXF0N
C2135
0.1uF
TX3P
FMTA_TXF0P
CAGND_1
+1.8V_CAVDL
TLA1+
TLB1-
FMTA_TXF1N
CAVDL_1
TLB1+
FMTA_TXF1P
CPGND
+1.8V_CPVDL
CPVDL
TLC1-
FMTA_TXF2N
TLC1+
FMTA_TXF2P
TLCLK1-
DRV1
FMTA_TXFCLKN
DRV0
R2101
10K
PRE1
PRE1
PRE0
TLCLK1+
FMTA_TXFCLKP
TLD1-
FMTA_TXF3N
TLD1+
FMTA_TXF3P
RESERVED0
TLE1-
FMTA_TXF4N
RESERVED1
RES1
GND_1
TLE1+
FMTA_TXF4P
TLF1-
+1.8V_VDL
VDL_1
TLF1+
+3.3V_LAVDH
+1.8V_LPVDL
LPGND_1
LAVDH_2
LPVDL_1
LAGND_2
63
62
60
59
58
57
56
10
55
11
54
12
53
13
52
14
51
15
50
16
48
18
47
19
45
21
44
22
42
24
41
25
40
26
39
27
38
28
37
29
36
30
35
31
34
32
COL0
+3.3V_LAVDH
C2108
0.1uF
16V
RDY
C2114
0.1uF
16V
C2117
0.1uF
16V
C2120
0.1uF
16V
C2123
0.1uF
16V
C2126
0.1uF
16V
C2129
0.1uF
16V
TLB0+
FMTA_TXG1P
PDN
HTPDN
+1.8V_VDL
LOCK
LOCKN
TLC0-
FMTA_TXG2N
PDN
TLC0+
FMTA_TXG2P
TLCLK0FMTA_TXGCLKN
TLCLK0+
VDL_2
FMTA_TXGCLKP
GND_2
+1.8V_CAVDL
TX0P
TLD0+
FMTA_TXG3P
CAGND_3
TX0N
TLD0-
FMTA_TXG3N
CAVDL_2
TLE0-
FMTA_TXG4N
C2156
0.1uF
TX4N
C2157
0.1uF
TX4P
TLE0+
FMTA_TXG4P
TLF0-
CAGND_2
TLF0+
TX1N
TLA1-
TX1P
CAGND_1
C2158
0.1uF
TX5N
FMTA_TXH0N
C2159
0.1uF
TX5P
FMTA_TXH0P
+1.8V_CAVDL
CAVDL_1
TLA1+
TLB1-
FMTA_TXH1N
TLB1+
FMTA_TXH1P
CPGND
+1.8V_CPVDL
CPVDL
TLC1-
FMTA_TXH2N
TLC1+
FMTA_TXH2P
TLCLK1-
DRV1
FMTA_TXHCLKN
DRV0
R2102
10K
PRE1
PRE1
PRE0
TLCLK1+
FMTA_TXHCLKP
TLD1-
FMTA_TXH3N
TLD1+
FMTA_TXH3P
RESERVED0
TLE1-
FMTA_TXH4N
RESERVED1
RES1
GND_1
TLE1+
FMTA_TXH4P
TLF1-
+1.8V_VDL
VDL_1
TLF1+
+3.3V_LAVDH
LPGND_1
+1.8V_LPVDL
LAVDH_2
LPVDL_1
33
LAGND_2
64
1
2
63
62
61
60
59
58
57
56
10
55
11
54
12
53
13
52
14
51
15
50
16
49
17
48
18
47
19
46
20
45
21
44
22
43
23
42
24
41
25
40
26
39
27
38
28
37
29
36
30
35
31
34
32
33
LPVDL_2
LPGND_2
SDSEL
SDSEL
COL1
COL1
COL0
COL0
RDY
PDN
PDN
HTPDN
LOCKN
+1.8V_VDL
LOCK
VDL_2
GND_2
+1.8V_CAVDL
CAVDL_2
CAGND_3
TX0N
TX0P
C2170
0.1uF
TX6N
C2171
0.1uF
TX6P
C2172
0.1uF
TX7N
C2173
0.1uF
TX7P
CAGND_2
TX1N
TX1P
CAGND_1
+1.8V_CAVDL
CAVDL_1
CPGND
+1.8V_CPVDL
CPVDL
DRV1
DRV0
R2103
10K
PRE1
PRE1
PRE0
RESERVED0
RESERVED1
RES1
GND_1
+1.8V_VDL
VDL_1
LPGND_1
+1.8V_LPVDL
LPVDL_1
+1.8V_CPVDL
+1.8V_VDL
C2111
0.1uF
16V
TLB0-
FMTA_TXG1N
COL0
[+1.8V_VDL Decaps]
TLA0+
FMTA_TXG0P
COL1
43
23
TLA0-
FMTA_TXG0N
SDSEL
COL1
46
20
LAVDH_1
SDSEL
49
17
LAGND_1
LPGND_2
61
+1.8V_LPVDL
+3.3V_LAVDH
LPVDL_2
64
C2140
0.1uF
16V
C2142
0.1uF
16V
C2144
0.1uF
16V
C2146
0.1uF
16V
C2148
0.1uF
16V
C2150
0.1uF
16V
C2152
0.1uF
16V
C2154
0.1uF
16V
C2162
0.1uF
16V
C2164
0.1uF
16V
C2166
0.1uF
16V
C2165
4.7uF
10V
C2167
4.7uF
10V
C2168
0.1uF
16V
+1.8V_CPVDL
[+1.8V_LPVDL Decaps]
+1.8V_THCV
+1.8V_LPVDL
C2163
4.7uF
10V
+1.8V_LPVDL
C2169
4.7uF
10V
+1.8V_CAVDL
L2101
CIS21J121
C2105
0.1uF
16V
C2107
0.1uF
16V
C2109
0.1uF
16V
C2112
0.1uF
16V
C2115
0.1uF
16V
C2118
0.1uF
16V
C2121
0.1uF
16V
C2124
0.1uF
16V
C2127
0.1uF
16V
C2113
4.7uF
10V
C2116
4.7uF
10V
C2119
4.7uF
10V
C2122
4.7uF
10V
C2125
4.7uF
10V
C2128
4.7uF
10V
C2130
0.1uF
16V
C2141
0.1uF
16V
C2143
0.1uF
16V
C2145
0.1uF
16V
C2147
0.1uF
16V
C2149
0.1uF
16V
C2151
0.1uF
16V
C2153
0.1uF
16V
C2155
0.1uF
16V
+1.8V_LPVDL
C2110
4.7uF
10V
THE
C2131
4.7uF
10V
EAX64768002
LVDS to Vx1 HS
2012.06.05
21
23
IC2200
THCV215
IC2201
THCV215
IC2202
THCV215
+1.8V_LPVDL
+3.3V_LAVDH
LAGND_1
LAVDH_1
TLA0-
FMTB_TXA0N
TLA0+
FMTB_TXA0P
TLB0-
FMTB_TXA1N
TLB0+
FMTB_TXA1P
TLC0-
FMTB_TXA2N
TLC0+
FMTB_TXA2P
TLCLK0FMTB_TXACLKN
TLCLK0+
FMTB_TXACLKP
TLD0-
FMTB_TXA3N
TLD0+
FMTB_TXA3P
TLE0-
FMTB_TXA4N
TLE0+
FMTB_TXA4P
TLF0TLF0+
TLA1-
FMTB_TXB0N
TLA1+
FMTB_TXB0P
TLB1-
FMTB_TXB1N
TLB1+
FMTB_TXB1P
TLC1-
FMTB_TXB2N
TLC1+
FMTB_TXB2P
TLCLK1FMTB_TXBCLKN
TLCLK1+
FMTB_TXBCLKP
TLD1-
FMTB_TXB3N
TLD1+
FMTB_TXB3P
TLE1-
FMTB_TXB4N
TLE1+
FMTB_TXB4P
TLF1TLF1+
+3.3V_LAVDH
LAVDH_2
LAGND_2
64
63
62
61
60
59
58
57
8
9
56
10
55
11
54
12
53
13
52
14
51
15
50
16
49
17
48
18
47
19
46
20
45
21
44
22
43
23
42
24
41
25
40
26
39
27
38
28
37
29
36
30
35
31
34
32
33
LAGND_1
LPGND_2
LAVDH_1
SDSEL
SDSEL
FMTB_TXC0N
COL1
FMTB_TXC0P
COL0
FMTB_TXC1N
COL1
COL0
RDY
TLA0TLA0+
TLB0TLB0+
FMTB_TXC1P
PDN
TLC0-
FMTB_TXC2N
PDN
HTPDN
+1.8V_VDL
LOCK
TLC0+
FMTB_TXC2P
TLCLK0FMTB_TXCCLKN
VDL_2
TLCLK0+
FMTB_TXCCLKP
GND_2
+1.8V_CAVDL
TLD0+
FMTB_TXC3P
CAGND_3
TX0P
TLD0-
FMTB_TXC3N
CAVDL_2
TX0N
TLE0-
FMTB_TXC4N
C2200
0.1uF
TX8N
C2201
0.1uF
TX8P
TLE0+
FMTB_TXC4P
TLF0-
CAGND_2
TX1N
TX1P
CAGND_1
TLF0+
C2202
C2203
0.1uF
0.1uF
TLA1-
FMTB_TXD0N
TX9N
TLA1+
FMTB_TXD0P
TX9P
+1.8V_CAVDL
TLB1-
FMTB_TXD1N
CAVDL_1
TLB1+
FMTB_TXD1P
CPGND
+1.8V_CPVDL
TLC1-
FMTB_TXD2N
CPVDL
TLC1+
FMTB_TXD2P
TLCLK1-
DRV1
FMTB_TXDCLKN
DRV0
R2208
TLCLK1+
10K
FMTB_TXDCLKP
PRE1
PRE0
TLD1+
FMTB_TXD3P
RESERVED0
TLE1-
FMTB_TXD4N
RESERVED1
TLE1+
FMTB_TXD4P
RES1
TLF1-
+1.8V_VDL
VDL_1
LPGND_1
TLD1-
FMTB_TXD3N
PRE1
GND_1
+1.8V_LPVDL
+1.8V_LPVDL
+3.3V_LAVDH
LPVDL_2
LOCKN
TLF1+
+3.3V_LAVDH
+1.8V_LPVDL
LAVDH_2
LPVDL_1
LAGND_2
64
63
62
61
60
59
58
57
56
10
55
11
54
12
53
13
52
14
51
15
50
16
49
17
48
18
47
19
46
20
45
21
44
22
43
23
42
24
41
25
40
26
39
27
38
28
37
29
36
30
35
31
34
32
33
+3.3V_LAVDH
LPVDL_2
LPGND_2
SDSEL
FMTB_TXE0N
COL1
FMTB_TXE0P
COL0
FMTB_TXE1N
COL1
COL0
RDY
FMTB_TXE1P
PDN
FMTB_TXE2N
PDN
HTPDN
LOCKN
+1.8V_THCV
+1.8V_THCV
FMTB_TXE2P
+1.8V_VDL
LOCK
PDN
R2203
10K
OPT
SDSEL
R2207
10K
OPT
Power Down Mode

- PDN1=High:Normal Operation
- PDN1=Low:Power Down
(CML output High, Others Hi-Z)
COL1
R2210
10K
OPT
Input Mode Selection

- SDSEL=High:Ch.0/1 enable
- SDSEL=Low:Ch.0 enable,Ch.1 disable
TLA0+
TLB0TLB0+
TLC0TLC0+
TLCLK0-
FMTB_TXECLKN
VDL_2
TLCLK0+
FMTB_TXECLKP
GND_2
+1.8V_CAVDL
FMTB_TXE3N
CAVDL_2
FMTB_TXE3P
CAGND_3
TX0N
TX0P
FMTB_TXE4N
C2213
0.1uF
TX10N
C2214
0.1uF
TX10P
FMTB_TXE4P
CAGND_2
TX1N
C2216
CAGND_1
TLD0+
TLE0TLE0+
TLF0+
C2215
TX1P
TLD0-
TLF0-
0.1uF
0.1uF
FMTB_TXF0N
TX11N
FMTB_TXF0P
TX11P
+1.8V_CAVDL
FMTB_TXF1N
CAVDL_1
FMTB_TXF1P
CPGND
+1.8V_CPVDL
FMTB_TXF2N
CPVDL
FMTB_TXF2P
TLA1TLA1+
TLB1TLB1+
TLC1TLC1+
TLCLK1-
DRV1
FMTB_TXFCLKN
DRV0
R2213
TLCLK1+
10K
FMTB_TXFCLKP
PRE1
FMTB_TXF3N
PRE1
PRE0
FMTB_TXF3P
RESERVED0
FMTB_TXF4N
RESERVED1
FMTB_TXF4P
RES1
GND_1
VDL_1
LPGND_1
TLD1TLD1+
TLE1TLE1+
TLF1-
+1.8V_VDL
+3.3V_LAVDH
+1.8V_LPVDL
TLF1+
LAVDH_2
LPVDL_1
LAGND_2
64
63
62
61
60
59
58
57
56
10
55
11
54
12
53
13
52
14
51
15
50
16
49
17
48
18
47
19
46
20
45
21
44
22
43
23
42
24
41
25
40
26
39
27
38
28
37
29
36
30
35
31
34
32
33
+1.8V_LPVDL
+3.3V_LAVDH
LPVDL_2
LPGND_2
SDSEL
FMTB_TXG0N
COL1
FMTB_TXG0P
COL0
FMTB_TXG1N
COL1
COL0
RDY
TLA0TLA0+
TLB0TLB0+
FMTB_TXG1P
PDN
TLC0-
FMTB_TXG2N
PDN
HTPDN
LOCKN
LAGND_1
LAVDH_1
SDSEL
+1.8V_VDL
LOCK
TLC0+
FMTB_TXG2P
TLCLK0FMTB_TXGCLKN
VDL_2
TLCLK0+
FMTB_TXGCLKP
GND_2
+1.8V_CAVDL
CAVDL_2
TX0P
TLD0+
FMTB_TXG3P
CAGND_3
TX0N
TLD0-
FMTB_TXG3N
TLE0-
FMTB_TXG4N
C2240
0.1uF
TX12N
C2241
0.1uF
TX12P
TLE0+
FMTB_TXG4P
TLF0-
CAGND_2
TX1N
TX1P
TLF0+
C2242
C2243
CAGND_1
0.1uF
0.1uF
TLA1-
FMTB_TXH0N
TX13N
TLA1+
FMTB_TXH0P
TX13P
+1.8V_CAVDL
TLB1-
FMTB_TXH1N
CAVDL_1
TLB1+
FMTB_TXH1P
CPGND
+1.8V_CPVDL
TLC1-
FMTB_TXH2N
CPVDL
TLC1+
FMTB_TXH2P
TLCLK1-
DRV1
FMTB_TXHCLKN
DRV0
R2214
TLCLK1+
10K
FMTB_TXHCLKP
PRE1
TLD1-
FMTB_TXH3N
PRE1
PRE0
TLD1+
FMTB_TXH3P
RESERVED0
TLE1-
FMTB_TXH4N
RESERVED1
GND_1
TLE1+
FMTB_TXH4P
RES1
TLF1-
+1.8V_VDL
VDL_1
+3.3V_LAVDH
+1.8V_LPVDL
LPGND_1
TLF1+
LAVDH_2
LPVDL_1
LAGND_2
[+1.8V_VDL Decaps]
+3.3V_LAVDH
64
63
62
61
60
59
58
57
56
10
55
11
54
12
53
13
52
14
51
15
50
16
49
17
48
18
47
19
46
20
45
21
44
22
43
23
42
24
41
25
40
26
39
27
38
28
37
29
36
30
35
31
34
32
33
LPVDL_2
LPGND_2
SDSEL
SDSEL
COL1
COL1
COL0
COL0
RDY
PDN
PDN
HTPDN
LOCKN
+1.8V_VDL
LOCK
VDL_2
GND_2
+1.8V_CAVDL
CAVDL_2
CAGND_3
TX0N
TX0P
C2260
0.1uF
TX14N
C2261
0.1uF
TX14P
C2262
0.1uF
TX15N
C2263
0.1uF
TX15P
CAGND_2
TX1N
TX1P
CAGND_1
+1.8V_CAVDL
CAVDL_1
CPGND
+1.8V_CPVDL
CPVDL
DRV1
DRV0
R2215
10K
PRE1
PRE1
PRE0
RESERVED0
RESERVED1
RES1
GND_1
+1.8V_VDL
VDL_1
LPGND_1
+1.8V_LPVDL
LPVDL_1
+1.8V_CPVDL
+1.8V_VDL
COL0
C2204
0.1uF
16V
C2207
0.1uF
16V
C2210
0.1uF
16V
C2217
0.1uF
16V
C2220
0.1uF
16V
C2223
0.1uF
16V
C2226
0.1uF
16V
C2229
0.1uF
16V
C2232
0.1uF
16V
C2234
0.1uF
16V
C2236
0.1uF
16V
C2238
0.1uF
16V
C2244
0.1uF
16V
C2246
0.1uF
16V
C2248
0.1uF
16V
C2250
0.1uF
16V
C2252
0.1uF
16V
C2254
0.1uF
16V
C2256
0.1uF
16V
C2255
4.7uF
10V
C2257
4.7uF
10V
C2258
0.1uF
16V
R2212
10K
Color Depth Selection

- COL1=High&COL0=High:12bit
- COL1=High&COL0=Low:10bit
- COL1=Low&COL0=High:8bit
- COL1=Low&COL0=Low:6bit
+1.8V_CPVDL
[+1.8V_LPVDL Decaps]
C2253
4.7uF
10V
+1.8V_THCV
+1.8V_THCV
TLA0-
R2211
10K
OPT
R2209
10K
R2206
10K
R2202
10K
+1.8V_THCV
LAGND_1
LAVDH_1
SDSEL
+1.8V_THCV
IC2203
THCV215
+1.8V_LPVDL
C2259
4.7uF
10V
+1.8V_CAVDL
R2204
10K
OPT
R2200
10K
PRE1
R2201
10K
OPT
Pre-emphasis Level Selection

(PRE0=Low)
- PRE1=High:enable
- PRE1=Low:disable
RES1
R2205
10K
C2205
0.1uF
16V
C2208
0.1uF
16V
C2211
0.1uF
16V
C2218
0.1uF
16V
C2221
0.1uF
16V
C2224
0.1uF
16V
C2227
0.1uF
16V
C2209
4.7uF
10V
C2212
4.7uF
10V
C2219
4.7uF
10V
C2222
4.7uF
10V
C2225
4.7uF
10V
C2228
4.7uF
10V
C2230
0.1uF
16V
C2233
0.1uF
16V
C2235
0.1uF
16V
C2237
0.1uF
16V
C2239
0.1uF
16V
C2245
0.1uF
16V
C2247
0.1uF
16V
C2249
0.1uF
16V
C2251
0.1uF
16V
Field BET(Bit Error Tester) Mode Selection

- RES1=High:Test Pattern enable
- RES1=Low:Normal Operation
+1.8V_LPVDL
C2206
4.7uF
10V
THE
C2231
4.7uF
10V
EAX64768002
LVDS to Vx1 HS
2012.06.05
22
23
[51P Vx1 HS output wafer]
[41P Vx1 HS output wafer]

P2301
P2300
FI-RE41S-HF-J-R1500
FI-RE51S-HF-J-R1500
TX7P
TX7N
3
4
TX6P
TX6N
6
7
TX5P
TX5N
9
10
10
11
11
TX4P
12
TX4N
12
13
13
14
14
TX3P
15
TX3N
TCON_I2C_EN
15
16
17
TX2P
18
TX2N
16
17
19
TX15P
19
TX15N
20
20
TX1P
+1.8V_THCV
TX1N
22
R2306
TX0N
R2303
R2302
0
26
LOCK
27
+3.3V
L/D_EN(Pin30)
- T-Con L/D Function
HIGH : Enable
LOW or NC : Disable
28
R2301
10K
29
Q2301
2N7002A
R2310
10K
25
TX14N
23
I2C_SCL_S
24
TX0P
TX14P
22
BIT_SEL(Pin31)
- Bit Selection
HIGH or NC : 10Bit
LOW : 8Bit
30
31
R2300
10K
OPT
24
TX13P
25
TX13N
33 OPT
26
TCON_I2C_EN
23
21
G
21
27
TX12P
28
TX12N
29
30
TX11P
31
TX11N
32
G
32
18
33
R2307
35
3D_EN
37
+3.3V
38
39
R2308
10K
Input Data Format

- Data Format 0(Pin37) = High
Data Format 1(Pin36) = Low
: Mode 3
(Divide screen into 4 area)
R2311
33 OPT
41
PANEL_VCC
42
R2305
10K
TX10N
36
TX9P
37
TX9N
38
R2304
10K
OPT
40
TX10P
34
35
Q2302
2N7002A
+3.3V
36
33
I2C_SDA_S
34
R2309
10K
OPT
39
TX8P
40
TX8N
41
42
L2300
43
MLB-201209-0120P-N2
44
45
46
C2300
10uF
25V
C2301
10uF
25V
47
48
49
50
51
52
THE
EAX64768002
Connector
2012.06.05
23
23
- 16 -

LG 84lm9600-CA CH - Lc2ec

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Available Formats

LG 84lm9600-CA CH - Lc2ec

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Available Formats

LC2EC

Good Earth Ground

1) :25 C 5 C(77 F 9 F), CST: 40 C 5 C

Temp. : -20 ~ 60 deg

5.Component Video (Y,CB/PB,CR/PR)

SDTV, DVD 480i

SDTV, DVD 480i

SDTV, DVD 625 Line

FHD only(Support to RGB-PC)

Establish: 12. 06. 08

LC23J Adjust Specification

Establish: 12. 06. 08

LC23J Adjust Specification

1 point W/B adjustment

Major production type

Adjustment must be done in the correct order.

The adjustment must be performed in the circumstance of 25 5C of temperature

The input voltage of the receiver must keep 100~220V, 50/60Hz.

Establish: 12. 06. 08

LC23J Adjust Specification

Establish: 12. 06. 08

LC23J Adjust Specification

Enter adj. mode

Establish: 12. 06. 08

LC23J Adjust Specification

b 00 OK04x (Adjust 480i, 1080p Comp1 )

b 00 OK06x (Adjust 1920*1080 RGB)

Return adj. result

OKx (Case of Success)

Read adj. data

Ref.) ADC Adj. RS232C Protocol_Ver1.0

[Enter ADC adj. mode]

[Change input source to Component1(480i&1080p)]

[Adjust 480i&1080p Comp1]

[Change input source to RGB(1024*768)]

[Adjust 1920*1080 RGB]

Ref) ADC adj. RS232C Protocol_Ver1.0

Establish: 12. 06. 08

LC23J Adjust Specification

Establish: 12. 06. 08

LC23J Adjust Specification

4.3 LAN Inspection

4.3.2 LAN inspection solution

If automatic setting is finished, you confirm IP and MAC Address.

4.3.3 WIDEVINE Key Inspection

Establish: 12. 06. 08

LC23J Adjust Specification

4.4 LAN PORT INSPECTION(PING TEST)

4.4.1. Equipment setting

1) Play the LAN Port Test Program.

Establish: 12. 06. 08

LC23J Adjust Specification

4.5 V-COM Adjust

Method & notice

Serial number D/L is using of scan equipment.

Establish: 12. 06. 08

LC23J Adjust Specification

There is impossible to download by bar code scan, so It need Manual download.

4.7 WIFI MAC ADDRESS CHECK

b. check the menu on in-start

Establish: 12. 06. 08

LC23J Adjust Specification

Establish: 12. 06. 08