Toshiba Satellite L500D (Compal LA-4971P KSWAE Liverpool 10AR - 10ARG) PDF

A
Compal confidential
Liverpool 10AR/10ARG
KSWAE LA-4971P Schematics Document

Mobile AMD S1G2 S1G3/
RS780MN & RS780MC & RX781 & RS880 /
SB700 & SB710
2009-04-22 Rev. 1.0
Compal Secret Data
Security Classification
2008-09-25
Issued Date
2009-09-25
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
Compal Electronics, Inc.

Cover Sheet
Size Document Number

Custom
Date:
Rev
1.0
LA-4971P
Wednesday, April 22, 2009
Sheet
E
of
45
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Compal Confidential
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with VRAM
page 6
ADM1032ARMZ
APL5607KI-TRG
page 4
page 4,5,6,7
6
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6
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BANK 0, 1, 2, 3
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Page 19
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RS780MN
RS780MC
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page 16
RX781
RS880
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page 17
EC SMBUS
page 18
R5F211A4SP
page 18
PCIe 4x
page 10,11,12,13,14
1.5V 2.5GHz(250MB/s)
SB700
SB710
5V 480MHz
USBPort 6 page 32
USB 5x
3IN1
5V 1.5GHz(150MB/s)
USBPort 8
5V 480MHz
USBPort 7 page 27
3IN1
USBPort 4 page 29
page 29
SATA
PCI BUS 3.3V 33 MHz
SATA port 0 page 25
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page 25
USB
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SATA
USB port 2
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5V 480MHz
page 27
N
A
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W
PCIe port 0
SATA port 2
5V 1.5GHz(150MB/s)
SATA
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page 28
page 32
page 20,21,22,23,24
SATA port 3 page 25
5V 1.5GHz(150MB/s)
LPC BUS 3.3V 33 MHz
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page 34
page 31
page 31
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page 30
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page 33
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page 36
3.3V 24.576MHz/48Mhz
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page 33
page 35
HD Audio
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page 31
page 31
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USB
USB port 11
page 27
page 26
SLG8SP626VTR page 15
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PCIe Port 2
page 32
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page 26
PCIe port 3
USB Port 0,1
page 37,38,39,40
41,42,43,44
page 31
Compal Secret Data
2008-09-25
Issued Date
2009-09-25
Deciphered Date
A
Title

Block Diagram

Custom
Date:
Rev
1.0
LA-4971P
Sheet
E
of
45
Symbol Note :
Voltage Rails
Platform
: Digital Ground
O : ON
X : OFF
Item
PUMA@
: Analog Ground
CPU
NB
VGA
SB
Comment
GM@
S1G2
RS780MC
NA
SB700
GM@
S1G2
RS780MN
NA
SB700
PM@+GPM@
S1G2
RS780MN
MXM
SB700
PM@+PM1@
S1G2
RX781
MXM
SB700
+5VS
1
+3VS
power
plane
@ : just reserve , no build
+2.5VS
+1.5VS
State
+B
+5VALW
+1.8V
+3VL
+3VALW
+0.9V
+5VL
+1.2VALW
+0.9V
+RTCVCC
+3V_LAN
+1.1VS
Item
Platform
DEBUG@ : reserve for debug.
+1.8VS
Layout Notes
TIGRIS@
UMA@: means for RS780M.
+VGA_CORE
CPU
NB
VGA
SB
Comment
GM@
S1G3
RS880MC
NA
SB710
GM@
S1G3
RS880M
NA
SB710
PM@+GPM@
S1G3
RS880M
MXM
SB710
PM@+PM1@
S1G3
RX881
MXM
SB710
+1.2V_HT
BTO (Build-To-Order)
+CPU_CORE_NB
+CPU_CORE_0
Function
+CPU_CORE_1
Option Table
Express card / PCMCIA
BLUE TOOTH
RJ11
SSD
(E/A)
(B)
(R)
(S)
MDC@
SSD@
Description
Explain
SATA ODD
16"
S0
BTO
EXPCARD@ / PCMCIA@
S1
Function
FingerPrinter
CAMERA & MIC
HDMI
S3
Description
(F)
(X)
(Y)
BT@
WiFi
G- sensor
3 in 1 card reader
(H)
17"
16inch@
Half - size
17inch@
WLAN@
First
WIMAX@
Second
G@ + G_1st@
DC-IN
LVDS wireset
RTS5159
G@ + G_2nd@
CARD@
CHIPSET
S5 S4/AC
S5 S4/ Battery only
S5 S4/AC & Battery

don't exist
Explain
BTO
FP@
CAMERA
MIC
AMD(UMA)
ATI VGA/B
COMMON
Cost down
CAM@
MIC@
IHDMI@
HDMI@
H@
LVDSSET@
INVERTER
BATT
HDMI
CEC
CPU
THERMAL
SENSOR
EC_SMB_CK1
EC_SMB_DA1
I2C / SMBUS ADDRESSING
EC_SMB_CK2
EC_SMB_DA2
DEVICE
HEX
ADDRESS
DDR SO-DIMM 0
A0
10100000
I2C_DATA
DDR SO-DIMM 1
A4
10100100
DDC_CLK0
CLOCK GENERATOR (EXT.)
D2
11010010
DDC_DATA0
I2C_CLK
DDC_CLK1
DDC_DATA1
SCL0
HEX
Address
Smart Battery
16H
0001 011X b
HDMI-CEC
34H
0011 010X b
SCL1
SODIMM
I / II
TIGRIS@
SDA1
CLK
GEN
WLAN
LCD
DDC
ROM
HDMI
DDC
ROM
NEW
CARD
MXM
Thermal
Sensor
KB926
RS780M
RS780M
RS780M
SB700
SCL2
V
V
SB700
SDA2
SCL3
EC KB926D2
KB926
SB700
SDA0
EC SM Bus1 address
Device
PUMA@
SMBUS Control Table

SOURCE
16inch_45@ 17inch_45@
SB700
SDA3
EC SM Bus2 address
Device
HEX
Address
ADI1032-1 CPU
98H
1001 100X b
ADI1032-2 VGA
9AH
1001 101X b
Compal Secret Data
EC KB926D2
2008-09-25
Issued Date
Ext. VGA/B
2009-09-25
Deciphered Date
CS/B
A
Title

Notes List

Custom
Date:
Rev
1.0
LA-4971P
Sheet
E
of
45
< C1, C2 and C7 must be replaced to 10-uF for Caspian compatibility >
+1.2V_HT
VLDT CAP.
Near CPU Socket
250 mil
1
PUMA@
C1
4.7U_0805_10V4Z
TIGRIS@
C1
10U_0805_10V6K
PUMA@
C2
4.7U_0805_10V4Z
TIGRIS@
C2
10U_0805_10V6K
C3
0.22U_0603_16V4Z
C4
0.22U_0603_16V4Z
C5
180P_0402_50V8J
C6
180P_0402_50V8J
10 H_CADIP[0..15]
10 H_CADIN[0..15]
H_CADIP[0..15]
H_CADOP[0..15]
H_CADIN[0..15]
H_CADON[0..15]
+1.2V_HT
VLDT=500mA
H_CADIP0
H_CADIN0
H_CADIP1
H_CADIN1
H_CADIP2
H_CADIN2
H_CADIP3
H_CADIN3
H_CADIP4
H_CADIN4
H_CADIP5
H_CADIN5
H_CADIP6
H_CADIN6
H_CADIP7
H_CADIN7
H_CADIP8
H_CADIN8
H_CADIP9
H_CADIN9
H_CADIP10
H_CADIN10
H_CADIP11
H_CADIN11
H_CADIP12
H_CADIN12
H_CADIP13
H_CADIN13
H_CADIP14
H_CADIN14
H_CADIP15
H_CADIN15
< From NB >
H_CADOP[0..15]
10
H_CADON[0..15]
10
JCPUA
D1
D2
D3
D4
E3
E2
E1
F1
G3
G2
G1
H1
J1
K1
L3
L2
L1
M1
N3
N2
E5
F5
F3
F4
G5
H5
H3
H4
K3
K4
L5
M5
M3
M4
N5
P5
10
10
10
10
H_CLKIP0
H_CLKIN0
H_CLKIP1
H_CLKIN1
J3
J2
J5
K5
10
10
10
10
H_CTLIP0
H_CTLIN0
H_CTLIP1
H_CTLIN1
N1
P1
P3
P4
@
HT LINK
VLDT_A0
VLDT_A1
VLDT_A2
VLDT_A3
L0_CADIN_H0
L0_CADIN_L0
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H15
L0_CADIN_L15
VLDT_B0
VLDT_B1
VLDT_B2
VLDT_B3
L0_CADOUT_H0
L0_CADOUT_L0
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15
L0_CLKIN_H0
L0_CLKIN_L0
L0_CLKIN_H1
L0_CLKIN_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CTLIN_H0
L0_CTLIN_L0
L0_CTLIN_H1
L0_CTLIN_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
+VLDT_B
AE2
AE3
AE4
AE5
< VLDT_A & VLDT_B : HyperTransport I/O ring power >
TIGRIS@
C7
10U_0805_10V6K
H_CADOP0
H_CADON0
H_CADOP1
H_CADON1
H_CADOP2
H_CADON2
H_CADOP3
H_CADON3
H_CADOP4
H_CADON4
H_CADOP5
H_CADON5
H_CADOP6
H_CADON6
H_CADOP7
H_CADON7
H_CADOP8
H_CADON8
H_CADOP9
H_CADON9
H_CADOP10
H_CADON10
H_CADOP11
H_CADON11
H_CADOP12
H_CADON12
H_CADOP13
H_CADON13
H_CADOP14
H_CADON14
H_CADOP15
H_CADON15
AD1
AC1
AC2
AC3
AB1
AA1
AA2
AA3
W2
W3
V1
U1
U2
U3
T1
R1
AD4
AD3
AD5
AC5
AB4
AB3
AB5
AA5
Y5
W5
V4
V3
V5
U5
T4
T3
PUMA@
C7
2 4.7U_0805_10V4Z
< To NB >
Y1
W1
Y4
Y3
H_CLKOP0
H_CLKON0
H_CLKOP1
H_CLKON1
10
10
10
10
R2
R3
T5
R5
H_CTLOP0
H_CTLON0
H_CTLOP1
H_CTLON1
10
10
10
10
FOX_PZ63823-284S-41F_638P
< FAN Control Circuit : Vout = 1.6 x Vset >

+5VS
1A
D1
< From EC >
34 EN_DFAN1
@
1SS355_SOD323-2
10U_0805_10V4Z
U6
1
2
3
4
EN
VIN
VOUT
VSET
D2
GND
GND
GND
GND
8
7
6
5
+3VS
JFAN
+FAN1
1
C9
@
BAS16_SOT23-3
1
2
3
4
5
1000P_0402_25V8J
1
2
3
10U_0805_10V4Z
C192
R12
GND
GND
10K_0402_5%
@ ACES_85204-0300N_3P
C183
1
+FAN1
FAN_SPEED1 34
2
APL5607KI-TRG_SO8
< To EC >
C8
@
1
Compal Secret Data
2008-09-25
Issued Date
0.01U_0402_25V7K
2009-09-25
Deciphered Date
A
Title

AMD CPU S1G2 HT I/F

Custom
Date:
Rev
1.0
LA-4971P
Sheet
E
of
45
+1.8V
< DDR2 VREF is 0.5 ratio >
< PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH >

DDR_A_CLK0
DDR_B_CLK0
1
< Processor DDR2 Memory Interface >
C10
C14
R1
DDR_A_CLK#0 2
1K_0402_1%
1.5P_0402_50V9C
C12
0.1U_0402_16V7K
DDR_A_CLK1
C13
DDR_B_CLK1
1
C11
C15
1000P_0402_25V8J
DDR_A_CLK#1 2
1.5P_0402_50V9C
DDR_B_CLK#1 2
+0.9V
1.5P_0402_50V9C
+0.9V
JCPUB
Place them close to CPU within 1"
+1.8V
R4 1
R3 1
2 39.2_0402_1%
2 39.2_0402_1%
T2
< To SO_DIMMA >
9 DDR_CS0_DIMMA#
9 DDR_CS1_DIMMA#
< To SO_DIMMA >
9 DDR_CKE0_DIMMA
9 DDR_CKE1_DIMMA
< To SO_DIMMA >
9 DDR_A_CLK0
9 DDR_A_CLK#0
9 DDR_A_CLK1
9 DDR_A_CLK#1
9 DDR_A_MA[15..0]
< To SO_DIMMA >
< To SO_DIMMA >
9 DDR_A_BS#0
9 DDR_A_BS#1
9 DDR_A_BS#2
9 DDR_A_RAS#
9 DDR_A_CAS#
9 DDR_A_WE#
AF10
AE10
H16
PAD
9 DDR_A_ODT0
9 DDR_A_ODT1
< To SO_DIMMA >
< To SO_DIMMA >
MEM_P
MEM_N
D10
C10
B10
AD10
DDR_A_ODT0
DDR_A_ODT1
T19
V22
U21
V19
DDR_CS0_DIMMA# T20
DDR_CS1_DIMMA# U19
U20
V20
DDR_CKE0_DIMMA J22
DDR_CKE1_DIMMA J20
DDR_A_CLK0
DDR_A_CLK#0
DDR_A_CLK1
DDR_A_CLK#1
N19
N20
E16
F16
Y16
AA16
P19
P20
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15
N21
M20
N22
M19
M22
L20
M24
L21
L19
K22
R21
L22
K20
V24
K24
K19
DDR_A_BS#0
DDR_A_BS#1
DDR_A_BS#2
R20
R23
J21
DDR_A_RAS#
DDR_A_CAS#
DDR_A_WE#
R19
T22
T24
@
VTT1
VTT2
VTT3
VTT4
MEM:CMD/CTRL/CLK VTT5
VTT6
VTT7
VTT8
VTT9
MEMZP
MEMZN
VTT_SENSE
RSVD_M1
MEMVREF
MA0_ODT0
MA0_ODT1
MA1_ODT0
MA1_ODT1
RSVD_M2
MA0_CS_L0
MA0_CS_L1
MA1_CS_L0
MA1_CS_L1
MA_CKE0
MA_CKE1
MB0_ODT0
MB0_ODT1
MB1_ODT0
MB0_CS_L0
MB0_CS_L1
MB1_CS_L0
MB_CKE0
MB_CKE1
MA_CLK_H0
MA_CLK_L0
MA_CLK_H1
MA_CLK_L1
MA_CLK_H2
MA_CLK_L2
MA_CLK_H3
MA_CLK_L3
MB_CLK_H0
MB_CLK_L0
MB_CLK_H1
MB_CLK_L1
MB_CLK_H2
MB_CLK_L2
MB_CLK_H3
MB_CLK_L3
MA_ADD0
MA_ADD1
MA_ADD2
MA_ADD3
MA_ADD4
MA_ADD5
MA_ADD6
MA_ADD7
MA_ADD8
MA_ADD9
MA_ADD10
MA_ADD11
MA_ADD12
MA_ADD13
MA_ADD14
MA_ADD15
MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8
MB_ADD9
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15
MA_BANK0
MA_BANK1
MA_BANK2
MB_BANK0
MB_BANK1
MB_BANK2
MA_RAS_L
MA_CAS_L
MA_WE_L
MB_RAS_L
MB_CAS_L
MB_WE_L
W10
AC10
AB10
AA10
A10
< VTT regulator voltage >
Y10
VTT_SENSE
W17
+MCH_REF
B18
W26
W23
Y26
DDR_B_ODT0
DDR_B_ODT1
V26
W25
U22
DDR_CS0_DIMMB#
DDR_CS1_DIMMB#
J25
H26
DDR_CKE0_DIMMB
DDR_CKE1_DIMMB
P22
R22
A17
A18
AF18
AF17
R26
R25
DDR_B_CLK0
DDR_B_CLK#0
DDR_B_CLK1
DDR_B_CLK#1
P24
N24
P26
N23
N26
L23
N25
L24
M26
K26
T26
L26
L25
W24
J23
J24
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15
R24
U26
J26
DDR_B_BS#0
DDR_B_BS#1
DDR_B_BS#2
U25
U24
U23
DDR_B_RAS#
DDR_B_CAS#
DDR_B_WE#
JCPUC
8 DDR_B_D[63..0]
< From/To SO_DIMMB >
2
1K_0402_1%
1
DDR_B_CLK#0 2
+MCH_REF
R2
1
1.5P_0402_50V9C
PAD
T1
PAD
T3
DDR_B_ODT0 8
DDR_B_ODT1 8
< To SO_DIMMB >
DDR_CS0_DIMMB#
DDR_CS1_DIMMB#
8
8
< To SO_DIMMB >
DDR_CKE0_DIMMB
DDR_CKE1_DIMMB
8
8
< To SO_DIMMB >
DDR_B_CLK0 8
DDR_B_CLK#0 8
DDR_B_CLK1 8
DDR_B_CLK#1 8
< To SO_DIMMB >

8 DDR_B_DM[7..0]
DDR_B_MA[15..0]
< To SO_DIMMB >
DDR_B_BS#0 8
DDR_B_BS#1 8
DDR_B_BS#2 8
< To SO_DIMMB >
DDR_B_RAS# 8
DDR_B_CAS# 8
DDR_B_WE# 8
< To SO_DIMMB >
< To SO_DIMMB >
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
DDR_B_DQS0
DDR_B_DQS#0
DDR_B_DQS1
DDR_B_DQS#1
DDR_B_DQS2
DDR_B_DQS#2
DDR_B_DQS3
DDR_B_DQS#3
DDR_B_DQS4
DDR_B_DQS#4
DDR_B_DQS5
DDR_B_DQS#5
DDR_B_DQS6
DDR_B_DQS#6
DDR_B_DQS7
DDR_B_DQS#7
MEM:DATA
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
C11
A11
A14
B14
G11
E11
D12
A13
A15
A16
A19
A20
C14
D14
C18
D18
D20
A21
D24
C25
B20
C20
B24
C24
E23
E24
G25
G26
C26
D26
G23
G24
AA24
AA23
AD24
AE24
AA26
AA25
AD26
AE25
AC22
AD22
AE20
AF20
AF24
AF23
AC20
AD20
AD18
AE18
AC14
AD14
AF19
AC18
AF16
AF15
AF13
AC12
AB11
Y11
AE14
AF14
AF11
AD11
DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7
A12
B16
A22
E25
AB26
AE22
AC16
AD12
DDR_B_DQS0
DDR_B_DQS#0
DDR_B_DQS1
DDR_B_DQS#1
DDR_B_DQS2
DDR_B_DQS#2
DDR_B_DQS3
DDR_B_DQS#3
DDR_B_DQS4
DDR_B_DQS#4
DDR_B_DQS5
DDR_B_DQS#5
DDR_B_DQS6
DDR_B_DQS#6
DDR_B_DQS7
DDR_B_DQS#7
C12
B12
D16
C16
A24
A23
F26
E26
AC25
AC26
AF21
AF22
AE16
AD16
AF12
AE12
< From/To SO_DIMMB >
MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63
MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63
MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7
MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
MB_DQS_H0
MB_DQS_L0
MB_DQS_H1
MB_DQS_L1
MB_DQS_H2
MB_DQS_L2
MB_DQS_H3
MB_DQS_L3
MB_DQS_H4
MB_DQS_L4
MB_DQS_H5
MB_DQS_L5
MB_DQS_H6
MB_DQS_L6
MB_DQS_H7
MB_DQS_L7
MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7
DDR_A_D[63..0]
G12
F12
H14
G14
H11
H12
C13
E13
H15
E15
E17
H17
E14
F14
C17
G17
G18
C19
D22
E20
E18
F18
B22
C23
F20
F22
H24
J19
E21
E22
H20
H22
Y24
AB24
AB22
AA21
W22
W21
Y22
AA22
Y20
AA20
AA18
AB18
AB21
AD21
AD19
Y18
AD17
W16
W14
Y14
Y17
AB17
AB15
AD15
AB13
AD13
Y12
W11
AB14
AA14
AB12
AA12
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
E12
C15
E19
F24
AC24
Y19
AB16
Y13
DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7
G13
H13
G16
G15
C22
C21
G22
G21
AD23
AC23
AB19
AB20
Y15
W15
W12
W13
DDR_A_DQS0
DDR_A_DQS#0
DDR_A_DQS1
DDR_A_DQS#1
DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DQS4
DDR_A_DQS#4
DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DQS6
DDR_A_DQS#6
DDR_A_DQS7
DDR_A_DQS#7
< From/To SO_DIMMA >
DDR_A_DM[7..0]
< To SO_DIMMA >
DDR_A_DQS0
DDR_A_DQS#0
DDR_A_DQS1
DDR_A_DQS#1
DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DQS4
DDR_A_DQS#4
DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DQS6
DDR_A_DQS#6
DDR_A_DQS7
DDR_A_DQS#7
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
< From/To SO_DIMMA >
FOX_PZ63823-284S-41F_638P
FOX_PZ63823-284S-41F_638P
Compal Secret Data
2008-09-25
Issued Date
2009-09-25
Deciphered Date
A
Title

AMD CPU S1G2 DDRII I/F

Custom
Date:
Rev
1.0
LA-4971P
Sheet
E
of
45
JCPUD
< Differential feedback for VDDNB >
< Close to CPU >
+CPU_CORE_0
1
1
R487
10_0402_5%
R486
10_0402_5%
CPU_VDD0_RUN_FB_L
R484
1 10_0402_5%
CPU_VDDNB_RUN_FB_H
R485
1 10_0402_5%
CPU_VDDNB_RUN_FB_L
Un-Mount R489 For Caspian
+CPU_CORE_1
PUMA@
R489
10_0402_5%
PUMA@
R488
10_0402_5%
+2.5VDDA
F8
F9
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
A9
A8
LDT_RST#
H_PWRGD
LDT_STOP#
CPU_LDT_REQ_R#
B7
A7
F10
C6
Close to CPU
+VDDNB
CPU_VDD0_RUN_FB_H
< Sideband-Temperature Sensor Interface Clock & Data>
CPU_VDD1_RUN_FB_H
CPU_VDD1_RUN_FB_L
AF4
AF5
AE6
< Sideband-Temperature Sensor Interface interrupt >
R13
R14
< Compensation Resistor to VSS >

< Compensation Resistor to VLDT >
+1.2V_HT
CPU_HTREF0
CPU_HTREF1
R6
P6
43 CPU_VDD0_RUN_FB_H
43 CPU_VDD0_RUN_FB_L
CPU_VDD0_RUN_FB_H
CPU_VDD0_RUN_FB_L
F6
E6
43 CPU_VDD1_RUN_FB_H
43 CPU_VDD1_RUN_FB_L
CPU_VDD1_RUN_FB_H
CPU_VDD1_RUN_FB_L
Y6
AB6
2 44.2_0402_1%
2 44.2_0402_1%
1
1
Change R488 to 10K For Caspian
< Debug ready >
< 200-MHz PLL Reference Clock >

1
C20
2 3900P_0402_50V7K
< JTAG debug port >
CPU_CLKIN_SC_P
T9
T10
T11
T12
T19
G10
AA9
AC9
AD9
AF9
PAD
PAD
PAD
PAD
PAD
15 CLK_CPU_BCLK
CPU_TEST23_TSTUPD
AD7
R8
H10
G9
C21
2 3900P_0402_50V7K
15 CLK_CPU_BCLK#
Address:100_1100
169_0402_1%
CPU_TEST25_H_BYPASSCLK_H
CPU_TEST25_L_BYPASSCLK_L
CPU_CLKIN_SC_N
CPU_TEST21_SCANEN
CPU_TEST20_SCANCLK2
CPU_TEST24_SCANCLK1
Place close to CPU wihtin 1.5"
< Filtered PLL Supply Voltage >

2
+2.5VS
+2.5VDDA
VDDA=300mA
L1 1
2 FBM_L11_201209_300L_0805
1
1
C17
C18
1
@
2 R25
0_0402_5%
C2
AA6
+2.5VDDA
1
A3
A5
B3
B5
C1
C19
+ C16
2
100U_D2_6.3VM
4.7U_0805_10V4Z
3300P_0402_50V7K
E9
E8
AB8
AF7
AE7
AE8
AC8
AF8
0.22U_0603_16V4Z
< Serial VID Interface clock & data >

+1.8VS
Add R497 and R498 at PVT
VDDA1
VDDA2
RESET_L
PWROK
LDTSTOP_L
LDTREQ_L
M11
W18
KEY1
KEY2
CLKIN_H
CLKIN_L
CPU_SVC 43
CPU_SVD 43
AF6 CPU_THERMTRIP#_R
AC7 CPU_PROCHOT#_1.8
AA8
2
1 R42
300_0402_5%
THERMTRIP_L
PROCHOT_L
MEMHOT_L
SIC
SID
ALERT_L
CPU_SVC
CPU_SVD
A6
A4
SVC
SVD
< Thermal Sensor Trip output >

< HTC-active state indication or command >
+1.8V
THERMDC_CPU
THERMDA_CPU
W7
W8
THERMDC
THERMDA
< Serial VID Interface clock & data >
HT_REF0
HT_REF1
< Thermal diode cathode & anode >
+1.8V sense no support
VDD0_FB_H
VDD0_FB_L
W9
Y9
VDDIO_FB_H
VDDIO_FB_L
VDD1_FB_H
VDD1_FB_L
VDDNB_FB_H
VDDNB_FB_L
DBRDY
TMS
TCK
TRST_L
TDI
DBREQ_L
TEST28_H
TEST28_L
TEST18
TEST19
TEST17
TEST16
TEST15
TEST14
TEST25_H
TEST25_L
TEST21
TEST20
TEST24
TEST22
TEST12
TEST27
CPU_DBREQ#
43
43
< Differential feedback for VDDIO >

< VDDIO : DDR SDRAM I/O ring power supply>
< Differential feedback for VDDNB >
< Northbridge power supply >
< Debug request >
PAD T20
J7
H8
CPU_TEST28_H_PLLCHRZ_P
CPU_TEST28_L_PLLCHRZ_N
D7
E7
F7
C7
CPU_TEST17_BP3
CPU_TEST16_BP2
CPU_TEST10_ANALOGOUT
PAD
PAD
T5
T6
PAD
PAD
T7
T8
route as differential
as short as possible
testpoint under package
@ R32
1 300_0402_5% +1.2V_HT
Add R32 at PVT

CPU_TEST29_H_FBCLKOUT_P
CPU_TEST29_L_FBCLKOUT_N
C9
C8
TEST29_H
TEST29_L
T22
T21
CPU_VDDNB_RUN_FB_H
CPU_VDDNB_RUN_FB_L
C4
TEST8
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
E10
C3
K8
TEST7
TEST10
TEST9
TEST6
CPU_VDDNB_RUN_FB_H
CPU_VDDNB_RUN_FB_L
AE9
TDO
TEST23
PAD
PAD
H6
G6
PAD
PAD
T13
T14
H18
H19
AA7
D5
C5
RSVD10
RSVD9
RSVD8
RSVD7
RSVD6
FOX_PZ63823-284S-41F_638P
+1.8V
0718 AMD --> 1K ohm
R22
1 1K_0402_5%
CPU_SVC
TIGRIS@
R497
510_0402_5%
CPU_TEST25_H_BYPASSCLK_H
R498
2 510_0402_5%
R23
1 1K_0402_5%
CPU_SVD
R499
510_0402_5%
CPU_TEST25_L_BYPASSCLK_L
TIGRIS@
R500
2 510_0402_5%
+1.8VS
+1.8V
R15
R10
2 10K_0402_5%
20
LDT_RST#
LDT_RST#
R5
300_0402_5%
CPU_THERMTRIP#_R
@
2
D16
2 CH751H-40PT_SOD323-2
< To SB700 ACPI block>
ENTRIP2
EN0
38,40
< HDT Connector >
37,40
@ R11
2 0_0402_5%
1
1
1
1
2
2
2
2
1
11,20 LDT_STOP#
0.1U_0402_16V7K
+1.8V
0.01U_0402_25V7K
1
1
@
0.01U_0402_25V7K
TIGRIS@
R31
1 300_0402_5%
TIGRIS@
R29
2 300_0402_5%
U2
1
CPU_TEST20_SCANCLK2
C26
0.1U_0402_16V7K
1
1
THERMDA_CPU
THERMDC_CPU
2 C27
2200P_0402_50V7K
CPU_TEST23_TSTUPD
CPU_LDT_REQ_R#
R26
1 300_0402_5%
R28
2 300_0402_5%
SCLK
D+
SDATA
D-
ALERT#
THERM#
GND
EC_SMB_CK2
EC_SMB_DA2
EC_SMB_CK2 19,34,35
EC_SMB_DA2 19,34,35
4
6
5
ADM1032ARM-1 ZREEL_MSOP8
CPU_TEST21_SCANEN
Compal Secret Data
Un-Mount R27 For Caspian
< From EC >
VDD
CPU_TEST24_SCANCLK1
2008-09-25
Issued Date
2009-09-25
Deciphered Date
A
SAMTEC_ASP-68200-07
< Thermal Sensor >
+3VS
Add R29 and R31 at PVT
2
C24
CPU_LDT_REQ#
LDT_RST#
NOTE: HDT TERMINATION IS REQUIRED FOR REV. Ax SILICON ONLY.
< noise filter cap >
PUMA@
R27
2 0_0402_5%
2
4
6
8
10
12
14
16
18
20
22
24
26
C25
R30
300_0402_5%
1
3
5
7
9
11
13
15
17
19
21
23
R494
2 0_0402_5%
220_0402_5%
220_0402_5%
220_0402_5%
220_0402_5%
LDT_STOP#
+1.8VS
11,20 CPU_LDT_REQ#
300_0402_5%
H_PWRGD
C23
R40
R39
R38
R37
H_PROCHOT# 20
@
2
2 300_0402_5%
@
@
@
@
+1.8V
T24 PAD
< To SB700 CPU block>
R41
+1.8V
T23 PAD
H_THERMTRIP# 21
R9
2 300_0402_5%
CPU_PROCHOT#_1.8
JP3
< R41 Close to CPU > < R494 Close to CPU >
CPU_DBREQ#
R36
300_0402_5%
1
+1.8V
+1.8VS
R21
< To power circuitry>
@ D20
2 CH751H-40PT_SOD323-2
MMBT3904_NL_SOT23-3
0.01U_0402_25V7K
+1.8VS
20,43 H_PWRGD
@ D12
2 CH751H-40PT_SOD323-2
< To power circuitry>
Q3
C
C22
300_0402_5%
Title

AMD CPU S1G2 CTRL

Custom
Date:
Rev
1.0
LA-4971P
Sheet
E
of
45
+CPU_CORE_0 JCPUE
VDD decoupling : +CPU_CORE

+CPU_CORE_0
+CPU_CORE_0
330U_X_2VM_R6M
C30
+CPU_CORE_0
C32
C33
C34
C35
C40
C41
C42
C28
2
330U_X_2VM_R6M
Near CPU Socket
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
Under CPU Socket
0.22U_0603_16V4Z
0.01U_0402_25V7K
180P_0402_50V8J
Under CPU Socket
+CPU_CORE_1
+CPU_CORE_1
330U_X_2VM_R6M
C31
+CPU_CORE_1
C36
C37
C38
C39
C43
C44
C45
C29
2
330U_X_2VM_R6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
Under CPU Socket
Near CPU Socket
0.22U_0603_16V4Z
0.01U_0402_25V7K
180P_0402_50V8J
+VDDNB
Under CPU Socket
+1.8V
VDDIO decoupling : DDR SDRAM I/O ring power
C46
22U_0805_6.3V6M
C47
22U_0805_6.3V6M
C48
0.22U_0603_16V4Z
C49
0.22U_0603_16V4Z
C50
180P_0402_50V8J
K16
M16
P16
T16
V16
H25
J17
K18
K21
K23
K25
L17
M18
M21
M23
M25
N17
+1.8V
G4
H2
J9
J11
J13
J15
K6
K10
K12
K14
L4
L7
L9
L11
L13
L15
M2
M6
M8
M10
N7
N9
N11
C51
180P_0402_50V8J
Under CPU Socket

+1.8V
@
2
C55
C56
C57
VDD0_1
VDD0_2
VDD0_3
VDD0_4
VDD0_5
VDD0_6
VDD0_7
VDD0_8
VDD0_9
VDD0_10
VDD0_11
VDD0_12
VDD0_13
VDD0_14
VDD0_15
VDD0_16
VDD0_17
VDD0_18
VDD0_19
VDD0_20
VDD0_21
VDD0_22
VDD0_23
VDDNB_1
VDDNB_2
VDDNB_3
VDDNB_4
VDDNB_5
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
+CPU_CORE_1
VDD1_1
VDD1_2
VDD1_3
VDD1_4
VDD1_5
VDD1_6
VDD1_7
VDD1_8
VDD1_9
VDD1_10
VDD1_11
VDD1_12
VDD1_13
VDD1_14
VDD1_15
VDD1_16
VDD1_17
VDD1_18
VDD1_19
VDD1_20
VDD1_21
VDD1_22
VDD1_23
VDD1_24
VDD1_25
VDD1_26
VDDIO27
VDDIO26
VDDIO25
VDDIO24
VDDIO23
VDDIO22
VDDIO21
VDDIO20
VDDIO19
VDDIO18
VDDIO17
VDDIO16
VDDIO15
VDDIO14
VDDIO13
P8
P10
R4
R7
R9
R11
T2
T6
T8
T10
T12
T14
U7
U9
U11
U13
U15
V6
V8
V10
V12
V14
W4
Y2
AC4
AD2
+1.8V
Y25
V25
V23
V21
V18
U17
T25
T23
T21
T18
R17
P25
P23
P21
P18
FOX_PZ63823-284S-41F_638P
Athlon 64
S1 Processor Socket
C58
JCPUF
0.22U_0603_16V4Z
0.22U_0603_16V4Z
0.22U_0603_16V4Z
0.22U_0603_16V4Z
AA4
AA11
AA13
AA15
AA17
AA19
AB2
AB7
AB9
AB23
AB25
AC11
AC13
AC15
AC17
AC19
AC21
AD6
AD8
AD25
AE11
AE13
AE15
AE17
AE19
AE21
AE23
B4
B6
B8
B9
B11
B13
B15
B17
B19
B21
B23
B25
D6
D8
D9
D11
D13
D15
D17
D19
D21
D23
D25
E4
F2
F11
F13
F15
F17
F19
F21
F23
F25
H7
H9
H21
H23
J4
Between CPU Socket and DIMM

+1.8V
C60
0.01U_0402_25V7K
C61
0.01U_0402_25V7K
+1.8V
180PF Qt'y follow the distance between CPU socket and DIMM0. <2.5inch>
C62
180P_0402_50V8J
C63
180P_0402_50V8J
C64
180P_0402_50V8J
C65
180P_0402_50V8J

+1.8V
Change to B2 size
1
1
C74
4.7U_0805_10V4Z
C75
4.7U_0805_10V4Z
C76
4.7U_0805_10V4Z
C77
4.7U_0805_10V4Z
+ C78
220U_B2_4VM_R45M
2
+0.9V
VTT decoupling.
C66
4.7U_0805_10V4Z
C67
4.7U_0805_10V4Z
C68
0.22U_0603_16V4Z
C69
0.22U_0603_16V4Z
C70
1000P_0402_25V8J
C71
1000P_0402_25V8J
C72
180P_0402_50V8J
C73
180P_0402_50V8J
Near CPU Socket Right side
+0.9V
1. Near Power Supply

2. Change to B2 size
+0.9V
+ C59
220U_B2_4VM_R45M
1
C79
4.7U_0805_10V4Z
C80
4.7U_0805_10V4Z
C81
0.22U_0603_16V4Z
C82
0.22U_0603_16V4Z
C83
1000P_0402_25V8J
C84
1000P_0402_25V8J
C85
180P_0402_50V8J
C86
180P_0402_50V8J
Near CPU Socket Left side

4
+VDDNB decoupling : Northbridge power

+VDDNB
@
1
C52
22U_0805_6.3V6M
1 TIGRIS@
C54
C53
22U_0805_6.3V6M
2008-09-25
Issued Date
FOX_PZ63823-284S-41F_638P
Athlon 64
2009-09-25
Deciphered Date
A
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
Compal Secret Data
22U_0805_6.3V6M
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
AC6
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6
Title
S1 Processor Socket

AMD CPU S1G2 PWR & GND

Custom
Date:
Rev
1.0
LA-4971P
Sheet
E
of
45
+1.8V
< EMI require >
2 C160
+1.8V
< EMI require >

0.1U_0402_16V7K
C155 2
1 0.1U_0402_16V7K
+1.8V
+0.9V
JDDRH
9 +V_DDR_MCH_REF
C104
1000P_0402_25V8J
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
DDR_B_D0
DDR_B_D1
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D2
DDR_B_D3
DDR_B_D8
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D10
DDR_B_D11
RP8
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
DDR_B_RAS#
DDR_B_D4
DDR_B_D5
1
2
3
4
8
7
6
5
C105 2
1 0.1U_0402_16V7K
C106 2
1 0.1U_0402_16V7K
C108 2
1 0.1U_0402_16V7K
C107 2
1 0.1U_0402_16V7K
C109 2
1 0.1U_0402_16V7K
C110 2
1 0.1U_0402_16V7K
C111 2
1 0.1U_0402_16V7K
C112 2
1 0.1U_0402_16V7K
C114 2
1 0.1U_0402_16V7K
C113 2
1 0.1U_0402_16V7K
C116 2
1 0.1U_0402_16V7K
C115 2
1 0.1U_0402_16V7K
C118 2
1 0.1U_0402_16V7K
C117 2
1 0.1U_0402_16V7K
DDR_B_DM0
47_0804_8P4R_5%
DDR_B_D6
DDR_B_D7
RP9
DDR_B_MA14
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_D12
DDR_B_D13
1
2
3
4
DDR_B_DM1
8
7
6
5
47_0804_8P4R_5%
DDR_B_CLK0 5
DDR_B_CLK#0 5
RP10
DDR_CKE0_DIMMB 8
DDR_B_BS#2
7
DDR_B_MA15
6
DDR_CKE1_DIMMB 5
DDR_B_D14
DDR_B_D15
1
2
3
4
47_0804_8P4R_5%
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19
DDR_B_D24
DDR_B_D25
2
DDR_B_DM3
DDR_B_D26
DDR_B_D27
5 DDR_CKE0_DIMMB
5 DDR_B_BS#2
DDR_CKE0_DIMMB
DDR_B_BS#2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
5 DDR_B_BS#0
5 DDR_B_WE#
5 DDR_B_CAS#
5 DDR_CS1_DIMMB#
5 DDR_B_ODT1
DDR_B_MA10
DDR_B_BS#0
DDR_B_WE#
DDR_B_CAS#
DDR_CS1_DIMMB#
DDR_B_ODT1
DDR_B_D32
DDR_B_D33
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D34
DDR_B_D35
DDR_B_D40
DDR_B_D41
DDR_B_DM5
DDR_B_D42
DDR_B_D43
DDR_B_D48
DDR_B_D49
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D50
DDR_B_D51
DDR_B_D56
DDR_B_D57
DDR_B_DM7
DDR_B_D58
DDR_B_D59
4
9,15,21,27 SMB_CK_DAT0
9,15,21,27 SMB_CK_CLK0
+3VS
C119
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
VSS
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
VSS
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
DDR_B_D20
DDR_B_D21
RP11
DDR_B_MA3
DDR_B_MA8
DDR_B_MA12
DDR_B_MA9
DDR_B_DM2
8
7
6
5
1
2
3
4
47_0804_8P4R_5%
DDR_B_D22
DDR_B_D23
RP12
DDR_B_D28
DDR_B_D29
DDR_B_BS#0
DDR_B_MA10
DDR_B_MA1
DDR_B_MA5
DDR_B_DQS#3
DDR_B_DQS3
8
7
6
5
1
2
3
4
47_0804_8P4R_5%
DDR_B_D30
DDR_B_D31
RP13
DDR_CKE1_DIMMB
DDR_CKE1_DIMMB
DDR_CS1_DIMMB#
DDR_B_ODT1
DDR_B_CAS#
DDR_B_WE#
DDR_B_MA15
DDR_B_MA14
8
7
6
5
1
2
3
4
47_0804_8P4R_5%
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
RP14
DDR_B_BS#1
1
DDR_CS0_DIMMB# 2
DDR_B_MA13
3
DDR_B_ODT0
4
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
8
7
6
5
47_0804_8P4R_5%
DDR_B_BS#1
DDR_B_RAS#
DDR_CS0_DIMMB#
DDR_B_BS#1 5
DDR_B_RAS# 5
DDR_CS0_DIMMB#
DDR_B_ODT0
DDR_B_MA13
DDR_B_ODT0 5
DDR_B_D36
DDR_B_D37
DDR_B_DM4
3
DDR_B_D38
DDR_B_D39
DDR_B_D[0..63]
DDR_B_D44
DDR_B_D45
DDR_B_DM[0..7]
DDR_B_DQS[0..7]
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_MA[0..15]
DDR_B_D46
DDR_B_D47
DDR_B_DQS#[0..7]
DDR_B_D[0..63]
DDR_B_DM[0..7]
DDR_B_DQS[0..7]
DDR_B_MA[0..15]
DDR_B_DQS#[0..7]
DDR_B_D52
DDR_B_D53
DDR_B_CLK1 5
DDR_B_CLK#1 5
DDR_B_DM6
DDR_B_D54
DDR_B_D55
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
4
+3VS
@ FOX_AS0A426-N8RN-7F_200P
2
0.1U_0402_16V7K
DIMM0 STD H:9.2mm (Bot)
Compal Secret Data
2008-09-25
Issued Date
2009-09-25
Deciphered Date
A
Title

DDRII SO-DIMM 0

Custom
Date:
Rev
1.0
LA-4971P
Sheet
E
of
45
+1.8V
R43
1K_0402_1%
+V_DDR_MCH_REF
8 +V_DDR_MCH_REF
2
1
R44
1K_0402_1%
0.1U_0402_16V7K
C95
1000P_0402_25V8J
DDR_A_D[0..63]
DDR_A_DM[0..7]
C96
< EMI require >

0.1U_0402_16V7K
+1.8V
2 C193
JDDRL
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
DDR_A_D0
DDR_A_D1
DDR_A_DQS#0
DDR_A_DQS0
DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D10
DDR_A_D11
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
203
DDR_A_D16
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2
2
DDR_A_D18
DDR_A_D19
DDR_A_D24
DDR_A_D25
DDR_A_DM3
DDR_A_D26
DDR_A_D27
DDR_CKE0_DIMMA
5 DDR_CKE0_DIMMA
DDR_A_BS#2
5 DDR_A_BS#2
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
DDR_A_MA10
DDR_A_BS#0
DDR_A_WE#
5 DDR_A_BS#0
5 DDR_A_WE#
DDR_A_CAS#
DDR_CS1_DIMMA#
5 DDR_A_CAS#
5 DDR_CS1_DIMMA#
3
DDR_A_ODT1
5 DDR_A_ODT1
DDR_A_D32
DDR_A_D33
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D34
DDR_A_D35
DDR_A_D40
DDR_A_D41
DDR_A_DM5
DDR_A_D42
DDR_A_D43
DDR_A_D48
DDR_A_D49
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51
DDR_A_D56
DDR_A_D57
4
DDR_A_DM7
DDR_A_D58
DDR_A_D59
8,15,21,27 SMB_CK_DAT0
8,15,21,27 SMB_CK_CLK0
+3VS
+1.8V
C103
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
VSS
C161 2
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
VSS
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
204
5
5
DDR_A_DQS[0..7]
DDR_A_MA[0..15]
DDR_A_MA[0..15]
DDR_A_DQS#[0..7]
5
5
DDR_A_DQS#[0..7]
DDR_A_DM0
DDR_A_D6
DDR_A_D7
DDR_A_D12
DDR_A_D13
DDR_A_DM1
RP1
DDR_A_MA6
DDR_A_MA14
DDR_A_MA7
DDR_A_MA11
DDR_A_D20
DDR_A_D21
1
2
3
4
DDR_A_D22
DDR_A_D23
DDR_A_D28
DDR_A_D29
47_0804_8P4R_5%
RP2
8
1
7
2
6
3
5
4
DDR_A_BS#1
DDR_A_MA2
DDR_A_MA0
DDR_A_MA4
47_0804_8P4R_5%
RP3
1
8
2
7
3
6
4
5
DDR_A_MA5
DDR_A_MA8
DDR_A_MA9
DDR_A_MA12
47_0804_8P4R_5%
RP4
8
1
7
2
6
3
5
4
DDR_A_BS#0
DDR_A_MA10
DDR_A_MA3
DDR_A_MA1
47_0804_8P4R_5%
RP5
8
1
7
2
6
3
5
4
DDR_A_ODT1
DDR_CS1_DIMMA#
DDR_A_CAS#
DDR_A_WE#
47_0804_8P4R_5%
RP6
8
1
7
2
6
3
5
4
DDR_A_MA13
DDR_A_ODT0
DDR_A_RAS#
DDR_CS0_DIMMA#
47_0804_8P4R_5%
RP7
1
8
2
7
3
6
4
5
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31
DDR_CKE1_DIMMA
DDR_A_MA15
DDR_A_MA14
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
DDR_A_BS#1
DDR_A_RAS#
DDR_CS0_DIMMA#
DDR_A_ODT0
DDR_A_MA13
DDR_A_BS#1 5
DDR_A_RAS# 5
DDR_CS0_DIMMA#
DDR_A_ODT0 5
8
7
6
5
DDR_CKE0_DIMMA
DDR_A_BS#2
DDR_CKE1_DIMMA
DDR_A_MA15
DDR_A_DM2
DDR_CKE1_DIMMA
+1.8V
+0.9V
DDR_A_CLK0 5
DDR_A_CLK#0 5
DDR_A_D14
DDR_A_D15
C87
2 0.1U_0402_16V7K
C88
2 0.1U_0402_16V7K
C90
2 0.1U_0402_16V7K
C89
2 0.1U_0402_16V7K
C91
2 0.1U_0402_16V7K
C92
2 0.1U_0402_16V7K
C93
2 0.1U_0402_16V7K
C94
2 0.1U_0402_16V7K
C98
2 0.1U_0402_16V7K
C97
2 0.1U_0402_16V7K
C100 1
2 0.1U_0402_16V7K
C99
2 0.1U_0402_16V7K
C102 1
2 0.1U_0402_16V7K
C101 1
2 0.1U_0402_16V7K
47_0804_8P4R_5%
DDR_A_D36
DDR_A_D37
DDR_A_DM4
DDR_A_D38
DDR_A_D39
DDR_A_D44
DDR_A_D45
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
DDR_A_CLK1 5
DDR_A_CLK#1 5
DDR_A_DM6
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
0.1U_0402_16V7K
DIMM0 STD H:5.2mm (Bot)

B
DDR_A_D[0..63]
DDR_A_DM[0..7]
DDR_A_DQS[0..7]
1 0.1U_0402_16V7K
DDR_A_D4
DDR_A_D5
@ FOX_AS0A426-M4R-TR_200P
2
< EMI require >
Compal Secret Data
2008-09-25
Issued Date
2009-09-25
Deciphered Date
C
Title

DDRII SO-DIMM 1

Custom
Date:
Rev
1.0
LA-4971P
Sheet
E
of
45
U3B
PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_P[0..15]
19
19
Polarity inversion
Polarity inversion
Polarity inversion
Polarity inversion
Polarity inversion
1
Polarity inversion
< From MXM VGA board >
Polarity inversion
Polarity inversion
Polarity inversion
Polarity inversion
Polarity inversion
Polarity inversion
Polarity inversion
Polarity inversion
PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_N15
PCIE_GTX_C_MRX_P15
AE3
AD4
AE2
AD3
AD1
AD2
V5
W6
U5
U6
U8
U7
27 PCIE_PTX_C_IRX_P0
27 PCIE_PTX_C_IRX_N0
< To New Card >

< To WLAN >
27
27
26
26
< To LAN >
PCIE_PTX_C_IRX_P2
PCIE_PTX_C_IRX_N2
PCIE_PTX_C_IRX_P3
PCIE_PTX_C_IRX_N3
< From SB700 : x4 PCIE A-link >
20
20
20
20
20
20
20
20
D4
C4
A3
B3
C2
C1
E5
F5
G5
G6
H5
H6
J6
J5
J7
J8
L5
L6
M8
L8
P7
M7
P5
M5
R8
P8
R6
R5
P4
P3
T4
T3
AA8
Y8
AA7
Y7
AA5
AA6
W5
Y5
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N
GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N
GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
GPP_RX4P
GPP_RX4N
GPP_RX5P
GPP_RX5N
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
PART 2 OF 6
PCIE I/F GPP
PCIE I/F SB
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX4P
GPP_TX4N
GPP_TX5P
GPP_TX5N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
PCE_CALRP(PCE_BCALRP)
PCE_CALRN(PCE_BCALRN)
RS780MCR3@
GM : RS780MN & RS780MC, PM : RX781
PCIE I/F GFX
A5
B5
A4
B4
C3
B2
D1
D2
E2
E1
F4
F3
F1
F2
H4
H3
H1
H2
J2
J1
K4
K3
K1
K2
M4
M3
M1
M2
N2
N1
P1
P2
PCIE_MTX_GRX_P0
PCIE_MTX_GRX_N0
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_P15
PCIE_MTX_GRX_N15
AC1
AC2
AB4
AB3
AA2
AA1
Y1
Y2
Y4
Y3
V1
V2
PCIE_ITX_PRX_P0
PCIE_ITX_PRX_N0
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
C120
C121
C122
C123
C124
C125
C126
C127
C128
C129
C130
C131
C132
C133
C134
C135
C136
C137
C138
C139
C140
C141
C142
C143
C144
C145
C146
C147
C148
C149
C150
C151
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
C152 1
C153 1
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_ITX_PRX_P2 WLAN@ C156 1

PCIE_ITX_PRX_N2 WLAN@ C157 1
PCIE_ITX_PRX_P3
C158 1
PCIE_ITX_PRX_N3
C159 1
2
2
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
2
2
2
2
2
2
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N15
Polarity inversion
PCIE_MTX_C_GRX_P[0..15]
Polarity inversion
PCIE_MTX_C_GRX_N[0..15]
4
4
H_CADOP0
H_CADON0
H_CADOP1
H_CADON1
H_CADOP2
H_CADON2
H_CADOP3
H_CADON3
H_CADOP4
H_CADON4
H_CADOP5
H_CADON5
H_CADOP6
H_CADON6
H_CADOP7
H_CADON7
< From S1G2 CPU : x16 HT>
H_CADOP8
H_CADON8
H_CADOP9
H_CADON9
H_CADOP10
H_CADON10
H_CADOP11
H_CADON11
H_CADOP12
H_CADON12
H_CADOP13
H_CADON13
H_CADOP14
H_CADON14
H_CADOP15
H_CADON15
4
4
4
4
H_CLKOP0
H_CLKON0
H_CLKOP1
H_CLKON1
4
4
4
4
H_CTLOP0
H_CTLON0
H_CTLOP1
H_CTLON1
301_0402_1%
301_0402_1%1
0718 Place within 1"

layout 1:2
Y25
Y24
V22
V23
V25
V24
U24
U25
T25
T24
P22
P23
P25
P24
N24
N25
AC24
AC25
AB25
AB24
AA24
AA25
Y22
Y23
W21
W20
V21
V20
U20
U21
U19
U18
T22
T23
AB23
AA22
H_CTLOP0
H_CTLON0
H_CTLOP1
H_CTLON1
2 R57
HT_RXCALP
HT_RXCALN
M22
M23
R21
R20
C23
A24
HT_RXCAD0P
HT_RXCAD0N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD7P
HT_RXCAD7N
PART 1 OF 6
HT_RXCAD8P
HT_RXCAD8N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD15P
HT_RXCAD15N
HT_RXCLK0P
HT_RXCLK0N
HT_RXCLK1P
HT_RXCLK1N
HT_RXCTL0P
HT_RXCTL0N
HT_RXCTL1P
HT_RXCTL1N
HT_RXCALP
HT_RXCALN
HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N
HT_TXCLK0P
HT_TXCLK0N
HT_TXCLK1P
HT_TXCLK1N
HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N
HT_TXCALP
HT_TXCALN
RS780MCR3@RS780M_FCBGA528
< To MXM VGA board >
Polarity inversion
Polarity inversion
PCIE_ITX_C_PRX_P0 27
PCIE_ITX_C_PRX_N0 27
PCIE_ITX_C_PRX_P2
PCIE_ITX_C_PRX_N2
PCIE_ITX_C_PRX_P3
PCIE_ITX_C_PRX_N3
NEED CHECK R57 & R58 WITH AMD
< To New Card >

< To WLAN >
< To LAN >
2
AD7
AE7
AE6
AD6
AB6
AC6
AD5
AE5
SB_TX0P_C
SB_TX0N_C
SB_TX1P_C
SB_TX1N_C
SB_TX2P_C
SB_TX2N_C
SB_TX3P_C
SB_TX3N_C
AC8
AB8
PCIE_CALRP
PCIE_CALRN
C162
C163
C164
C165
C166
C168
C169
C167
R55
R56
1
1
1
1
1
1
1
1
1
1
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
1.27K_0402_1%
2K_0402_1%
2
2
H_CADIP[0..15]
H_CADIP0
H_CADIN0
H_CADIP1
H_CADIN1
H_CADIP2
H_CADIN2
H_CADIP3
H_CADIN3
H_CADIP4
H_CADIN4
H_CADIP5
H_CADIN5
H_CADIP6
H_CADIN6
H_CADIP7
H_CADIN7
D24
D25
E24
E25
F24
F25
F23
F22
H23
H22
J25
J24
K24
K25
K23
K22
H_CADIN[0..15]
20
20
20
20
20
20
20
20
< To SB700 : x4 PCEI A-link>
< TX Impedance Calibration. Connect to GND >

< RX Impedance Calibration. Connect to VDDPCIE >
+1.1VS
H24
H25
L21
L20
H_CTLIP0
H_CTLIN0
H_CTLIP1
H_CTLIN1
B24
B25
HT_TXCALP
HT_TXCALN
H_CADIN[0..15]
DP0
GFX_TX0,TX1,TX2 and TX3
AUX0 and HPD0
DP1
GFX_TX4,TX5,TX6 and TX7
AUX1 and HPD1
< If integrated GFX is used, some PCIE pairs are used as HDMI signal pairs >
H_CLKIP0
H_CLKIN0
H_CLKIP1
H_CLKIN1
M24
M25
P19
R18
RS780M Display Port Support (muxed on GFX)

H_CADIP[0..15]
< To S1G2 CPU : x16 HT>
H_CADIP8
H_CADIN8
H_CADIP9
H_CADIN9
H_CADIP10
H_CADIN10
H_CADIP11
H_CADIN11
H_CADIP12
H_CADIN12
H_CADIP13
H_CADIN13
H_CADIP14
H_CADIN14
H_CADIP15
H_CADIN15
F21
G21
G20
H21
J20
J21
J18
K17
L19
J19
M19
L18
M21
P21
P18
M18
PCIE_MTX_GRX_P0 IHDMI@ R74 1

PCIE_MTX_GRX_N0 IHDMI@ R75 1
PCIE_MTX_GRX_P1 IHDMI@ R76 1
PCIE_MTX_GRX_N1 IHDMI@ R81 1
2 0_0402_5%
2 0_0402_5%
2 0_0402_5%
2 0_0402_5%
HDMI_TXD2+
HDMI_TXD2HDMI_TXD1+
HDMI_TXD1-
18,19
18,19
18,19
18,19
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_N3
2
2
2
2
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
HDMI_TXD0+
HDMI_TXD0HDMI_CLK0+
HDMI_CLK0-
18,19
18,19
18,19
18,19
IHDMI@
IHDMI@
IHDMI@
IHDMI@
R82 1
R83 1
R84 1
R85 1
H_CTLIP0 4
H_CTLIN0 4
H_CTLIP1 4
H_CTLIN1 4
R58
2 301_0402_1%
< Transmitter Calibration Resistor to HT_TXCALN >
Compal Secret Data

2008-09-25
2009-09-25
Deciphered Date
C
4
4
4
4
Issued Date
27
27
26
26
0718 Place within 1"

layout 1:2
19
RS780M_FCBGA528
HYPER TRANSPORT CPU I/F
H_CADOP[0..15]
H_CADON[0..15]
19
Polarity inversion
U3A
H_CADOP[0..15]
H_CADON[0..15]
Title

RS780M&RX781-HT/PCIE

Custom
Date:
Rev
1.0
LA-4971P
Sheet
E
10
of
45
E17
F17
F15
UMA_CRT_G
16 UMA_CRT_G
UMA_CRT_B
16 UMA_CRT_B
14,16
14,16
16
16
UMA_CRT_HSYNC
UMA_CRT_VSYNC
UMA_CRT_HSYNC
UMA_CRT_VSYNC
UMA_CRT_CLK
UMA_CRT_DATA
GPM@ R65
GM@ R65
< DAC internal reference to set full scale DAC current >
2
R71
4.7K_0402_5%
+VDDA18HTPLL
H17
D7
E7
R67 1
2 0_0402_5%
NB_RESET#
NB_PWRGD
DAC_HSYNC(PWM_GPIO4)
DAC_VSYNC(PWM_GPIO6)
DAC_SCL(PCE_RCALRN)
DAC_SDA(PCE_TCALRN)
CLK_NBHT
CLK_NBHT#
C25
C24
E11
F11
VDDA18HTPLL
VDDA18PCIEPLL1
VDDA18PCIEPLL2
SYSRESETb
POWERGOOD
LDTSTOPb
ALLOW_LDTSTOP
HT_REFCLKP
HT_REFCLKN
REFCLK_P/OSCIN(OSCIN)
REFCLK_N(PWM_GPIO3)
T2
T1
15 NBGFX_CLK
15 NBGFX_CLK#
R72
4.7K_0402_5%
GFX_REFCLKP
GFX_REFCLKN
U1
U2
GPP_REFCLKP
GPP_REFCLKN
V4
V3
15 CLK_SBLINK_BCLK
15 CLK_SBLINK_BCLK#
+3VS
R88
1 10K_0402_5%
I2C_CLK
I2C_DATA
DDC_DATA0/AUX0N(NC)
DDC_CLK0/AUX0P(NC)
DDC_CLK1/AUX1P(NC)
DDC_DATA1/AUX1N(NC)
B10
14
RS780MCR3@
GPM@
17
17
17
17
17
17
< LVDS dual channel : channel 1 >
B18
A18
A17
B17
D20
D21
D18
D19
UMA_LCD_TZOUT0_B0+
UMA_LCD_TZOUT0_B0UMA_LCD_TZOUT0_B1+
UMA_LCD_TZOUT0_B1UMA_LCD_TZOUT0_B2+
UMA_LCD_TZOUT0_B2-
17
17
17
17
17
17
< LVDS dual channel : channel 2 >
B16
A16
D16
D17
UMA_LCD_TXCLK_ACLK+ 17
UMA_LCD_TXCLK_ACLK- 17
UMA_LCD_TZCLK_BCLK+ 17
UMA_LCD_TZCLK_BCLK- 17
A13
B13
+VDDLTP18
A15
B15
A14
B14
+VDDLT18
C14
D15
C16
C18
C20
E20
C22
E9
F7
G12
GM@ R79 1
MIS.
TMDS_HPD(NC)
HPD(NC)
SUS_STAT#(PWM_GPIO5)
THERMALDIODE_P
THERMALDIODE_N
TESTMODE
GPM@
+1.8VS
C170
0_0603_5%
L2
2 BLM18PG121SN1D_0603
+AVDD1
1
L4
0_0603_5%
PM1@
GPM@ R73
GM@ R73 2
D9
D10
GPM@ R78
GM@ R78 1
< LVDS backlight enable >
100K_0402_5%
1 100K_0402_5%
0_0402_5%
2 0_0402_5%
HPD
D12
< HDMI hot-plug detection >
18,19,21
< Strap option pin or gate side-port memory IO >
SUS_STAT# 14,21
AE8
AD8
R80 1
D13
2 1.8K_0402_5%
+1.8VS
C172
0_0603_5%
PM1@
C198
0_0402_5%
L4
0_0603_5%
GM@
C172
GM@
2.2U_0603_6.3V4Z
GM@ R62 1
2 140_0402_1% UMA_CRT_R
GM@ R63 1
2 150_0402_1% UMA_CRT_G
GM@ R64 1
2 150_0402_1% UMA_CRT_B
C198
GM@
2.2U_0603_6.3V4Z
2 300_0402_5% NB_PWRGD
R371 1
RS780 use 140 ohm, check RS880 use what value
+AVDD2
1
C170
GM@
2
< LVDS digital power enable >
UMA_ENVDD 17
UMA_ENBKL 34
2 0_0402_5%
PAD T17
< Dedicated power for the DAC which can affect display quality >
PM1@
RS780M_FCBGA528
L2
0_0603_5%
GM@ 1
LVDS_DIGON(PCE_TCALRP)
LVDS_BLON(PCE_RCALRP)
LVDS_ENA_BL(PWM_GPIO2)
UMA_LCD_TXOUT0_A0+
UMA_LCD_TXOUT0_A0UMA_LCD_TXOUT0_A1+
UMA_LCD_TXOUT0_A1UMA_LCD_TXOUT0_A2+
UMA_LCD_TXOUT0_A2-
AUX_CAL(NC)
< Dedicated power for the DAC which can affect display quality >
+3VS
VSSLT1(VSS)
VSSLT2(VSS)
VSSLT3(VSS)
VSSLT4(VSS)
VSSLT5(VSS)
VSSLT6(VSS)
VSSLT7(VSS)
RSVD
C8
AUX_CAL
VDDLT18_1(NC)
VDDLT18_2(NC)
VDDLT33_1(NC)
VDDLT33_2(NC)
STRP_DATA
G11
Strap pin
A22
B22
A21
B21
B20
A20
A19
B19
GPPSB_REFCLKP(SB_REFCLKP)
GPPSB_REFCLKN(SB_REFCLKN)
B9
A9
B8
A8
B7
A7
17 UMA_LCD_DDC_CLK
17 UMA_LCD_DDC_DAT
18 HDMIDAT_UMA
18 HDMICLK_UMA
TXCLK_LP(DBG_GPIO1)
TXCLK_LN(DBG_GPIO3)
TXCLK_UP(PCIE_RESET_GPIO4)
TXCLK_UN(PCIE_RESET_GPIO1)
VDDLTP18(NC)
VSSLTP18(NC)
PLLVDD(NC)
PLLVDD18(NC)
PLLVSS(NC)
1
2
TXOUT_U0P(NC)
TXOUT_U0N(NC)
TXOUT_U1P(PCIE_RESET_GPIO3)
TXOUT_U1N(PCIE_RESET_GPIO2)
TXOUT_U2P(NC)
TXOUT_U2N(NC)
TXOUT_U3P(PCIE_RESET_GPIO5)
TXOUT_U3N(NC)
DAC_RSET(PWM_GPIO1)
D8
A10
C10
C12
15 NB_OSC_14.318M
15
15
A11
B11
F8
E8
+VDDA18PCIEPLL
14,19,20,26,27,33,34 PLT_RST#
21 NB_PWRGD
6,20 LDT_STOP#
6,20 CPU_LDT_REQ#
RED(DFT_GPIO0)
REDb(NC)
GREEN(DFT_GPIO1)
GREENb(NC)
BLUE(DFT_GPIO3)
BLUEb(NC)
715_0402_1%
G14
2 715_0402_1%
+NB_PLLVDD A12
+NB_HTPVDD D14
B12
+NB_PLLVDD
+NB_HTPVDD
+1.1VS
C_Pr(DFT_GPIO5)
Y(DFT_GPIO2)
COMP_Pb(DFT_GPIO4)
G18
G17
E18
F18
E19
F19
PLL PWR
LVTM
UMA_CRT_R
16 UMA_CRT_R
PART 3 OF 6
TXOUT_L0P(NC)
TXOUT_L0N(NC)
TXOUT_L1P(NC)
TXOUT_L1N(NC)
TXOUT_L2P(NC)
TXOUT_L2N(DBG_GPIO0)
TXOUT_L3P(NC)
TXOUT_L3N(DBG_GPIO2)
PM
+AVDDQ
AVDD1(NC)
AVDD2(NC)
AVDDDI(NC)
AVSSDI(NC)
AVDDQ(NC)
AVSSQ(NC)
CRT/TVOUT
F12
E12
F14
G15
H15
H14
+AVDD2
U3C
AVDD=100mA
+AVDD1
CLOCKs
0.1U_0402_16V7K
< DAC Bandgap Reference Voltage >

< 1.8V power for system PLLs >
GPM@
L6
0_0603_5%
+1.8VS
GPM@
PM1@
C175
0_0603_5%
L6
2 BLM18PG121SN1D_0603
GM@ 1
+1.8VS
+AVDDQ
GM@ 1
< Power for integrated DVI/HDMI PLL macro >
L7
0_0603_5%
PM1@
L3
0_0603_5%
PM1@
C171
0_0603_5%
L3
1 BLM18PG121SN1D_0603
GM@ 2
C175
2.2U_0603_6.3V4Z
GPM@
+1.8VS
+NB_HTPVDD
L7
2 BLM18PG121SN1D_0603
GM@
2
C176
0_0603_5%
+VDDLTP18
1
C176
GM@
C171
GM@
2
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
< IO power for HyperTransport PLL >

< 1.1V Power for system PLLs >
+1.8VS
< 1.8V IO power for the integrated DVI/HDMI interface >
+VDDA18HTPLL
GPM@
L10 1
2 BLM18PG121SN1D_0603
1
+1.1VS
C179
GM@ 1
L9
0_0603_5%
PM1@
C178
0_0603_5%
+1.8VS
+NB_PLLVDD
L9
2 BLM18PG121SN1D_0603
2.2U_0603_6.3V4Z
GPM@ L5
0_0603_5%
C174
GM@
2
+1.8VS
C173
0_0402_5%
+VDDLT18
C178
GM@
< 1.8V IO power for PCI-E PLLs >
PM1@
GM@ L5
1 BLM18PG121SN1D_0603
2.2U_0603_6.3V4Z
C173
GM@
2
4.7U_0805_10V4Z
0.1U_0402_16V7K
+VDDA18PCIEPLL
L11 1
2 BLM18PG121SN1D_0603
1
C180
2.2U_0603_6.3V4Z
Compal Secret Data
2008-09-25
Issued Date
2009-09-25
Deciphered Date
A
Title

RS780 VEDIO/CLK GEN

Custom
Date:
Rev
1.0
LA-4971P
Sheet

E
11
of
45
U3D
AD16
AE17
AD17
W12
Y12
AD18
AB13
AB18
V14
V15
W14
AE12
AD12
MEM_A0(NC)
MEM_A1(NC)
MEM_A2(NC)
MEM_A3(NC)
MEM_A4(NC)
MEM_A5(NC)
MEM_A6(NC)
MEM_A7(NC)
MEM_A8(NC)
MEM_A9(NC)
MEM_A10(NC)
MEM_A11(NC)
MEM_A12(NC)
MEM_A13(NC)
MEM_BA0(NC)
MEM_BA1(NC)
MEM_BA2(NC)
MEM_RASb(NC)
MEM_CASb(NC)
MEM_WEb(NC)
MEM_CSb(NC)
MEM_CKE(NC)
MEM_ODT(NC)
SBD_MEM/DVO_I/F
PAR 4 OF 6
AB12
AE16
V11
AE15
AA12
AB16
AB14
AD14
AD13
AD15
AC16
AE13
AC14
Y14
MEM_DQ0/DVO_VSYNC(NC)
MEM_DQ1/DVO_HSYNC(NC)
MEM_DQ2/DVO_DE(NC)
MEM_DQ3/DVO_D0(NC)
MEM_DQ4(NC)
MEM_DQ5/DVO_D1(NC)
MEM_DQ6/DVO_D2(NC)
MEM_DQ7/DVO_D4(NC)
MEM_DQ8/DVO_D3(NC)
MEM_DQ9/DVO_D5(NC)
MEM_DQ10/DVO_D6(NC)
MEM_DQ11/DVO_D7(NC)
MEM_DQ12(NC)
MEM_DQ13/DVO_D9(NC)
MEM_DQ14/DVO_D10(NC)
MEM_DQ15/DVO_D11(NC)
MEM_DQS0P/DVO_IDCKP(NC)
MEM_DQS0N/DVO_IDCKN(NC)
MEM_DQS1P(NC)
MEM_DQS1N(NC)
MEM_DM0(NC)
MEM_DM1/DVO_D8(NC)
IOPLLVDD18(NC)
IOPLLVDD(NC)
MEM_CKP(NC)
MEM_CKN(NC)
IOPLLVSS(NC)
MEM_COMPP(NC)
MEM_COMPN(NC)
MEM_VREF(NC)
AA18
AA20
AA19
Y19
V17
AA17
AA15
Y15
AC20
AD19
AE22
AC18
AB20
AD22
AC22
AD21
Y17
W18
AD20
AE21
W17
AE19
AE23
AE24
+1.8VS
+1.1VS
AD23
AE18
RS780MCR3@ RS780M_FCBGA528
Compal Secret Data
Issued Date
2008-09-25
Deciphered Date
2009-09-25
Title
2

RS780M&RX781 SIDE PORT

Custom
Date:
Rev
1.0
LA-4971P
Sheet
12
of
45
4.7U_0805_10V4Z
C246
4.7U_0805_10V4Z
C236
0.1U_0402_16V7K
C237
0.1U_0402_16V7K
C238
0.1U_0402_16V7K
+VDDA18PCIE
C239
0.1U_0402_16V7K
VDDHTTX_1
VDDHTTX_2
VDDHTTX_3
VDDHTTX_4
VDDHTTX_5
VDDHTTX_6
VDDHTTX_7
VDDHTTX_8
VDDHTTX_9
VDDHTTX_10
VDDHTTX_11
VDDHTTX_12
VDDHTTX_13
J10
P10
K10
M10
L10
W9
H9
T10
R10
Y9
AA9
AB9
AD9
AE9
U10
VDDA18PCIE_1
VDDA18PCIE_2
VDDA18PCIE_3
VDDA18PCIE_4
VDDA18PCIE_5
VDDA18PCIE_6
VDDA18PCIE_7
VDDA18PCIE_8
VDDA18PCIE_9
VDDA18PCIE_10
VDDA18PCIE_11
VDDA18PCIE_12
VDDA18PCIE_13
VDDA18PCIE_14
VDDA18PCIE_15
< 1.8V IO transform power >

+1.8VS
1
C251
+1.8VS
GM@ L89
0_0603_5%
< 1.8V power for side-port memory interface >

1
1U_0402_6.3V4Z
GPM@ L89
0_0603_5%
F9
G9
AE11
AD11
RS780MCR3@
VDD_MEM1(NC)
VDD_MEM2(NC)
VDD_MEM3(NC)
VDD_MEM4(NC)
VDD_MEM5(NC)
VDD_MEM6(NC)
VDD18_1
VDD18_2
VDD18_MEM1(NC)
VDD18_MEM2(NC)
C252
GM@
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDD33_1(NC)
VDD33_2(NC)
K12
J14
U16
J11
K15
M12
L14
L11
M13
M15
N12
N14
P11
P13
P14
R12
R15
T11
T15
U12
T14
J16
AE10
AA11
Y11
AD10
AB10
AC10
C211
C212
10U_0805_10V4Z
C223
10U_0805_10V4Z
C221
C222
C224
0.1U_0402_16V7K
AE25
AD24
AC23
AB22
AA21
Y20
W19
V18
U17
T17
R17
P17
M17
2 L17
+1.1VS
+NB_CORE
< Core power >
PJP9
VDD_CORE:GM=5A/PM=10A
2
+1.1VS
PAD-OPEN 4x4m
C245
0.1U_0402_16V7K
C233
+VDDHTTX
C229
C232
0.1U_0402_16V7K
< 1.8V IO power for PCI-E graphics, SB, and GPP interfaces >
0_0805_5%
C235
C228
10U_0805_10V4Z
0.1U_0402_16V7K
10U_0805_10V4Z
L22
0.1U_0402_16V7K
C227
C244
4.7U_0805_10V4Z
C226
VDDHTRX_1
VDDHTRX_2
VDDHTRX_3
VDDHTRX_4
VDDHTRX_5
VDDHTRX_6
VDDHTRX_7
0.1U_0402_16V7K
2A
2
+1.8VS
H18
G19
F20
E21
D22
B23
A23
0.1U_0402_16V7K
< IO power for HyperTransport transmit interface >
0_0805_5%
C225
0.1U_0402_16V7K
C231
+VDDHTRX
C218
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
C217
C230
L19
0.1U_0402_16V7K
C243
2A
2
+1.2V_HT
0.1U_0402_16V7K
0.1U_0402_16V7K
10U_0805_10V4Z
0.1U_0402_16V7K
C216
FBMA-L11-201209-221LMA30T_0805
1U_0402_6.3V4Z
C214
+VDDA11PCIE
VDDA_12=2.5A
C242
A6
B6
C6
D6
E6
F6
G7
H8
J9
K9
M9
L9
P9
R9
T9
V9
U9
C219
0.1U_0402_16V7K
VDDPCIE_1
VDDPCIE_2
VDDPCIE_3
VDDPCIE_4
VDDPCIE_5
VDDPCIE_6
VDDPCIE_7
VDDPCIE_8
VDDPCIE_9
VDDPCIE_10
VDDPCIE_11
VDDPCIE_12
VDDPCIE_13
VDDPCIE_14
VDDPCIE_15
VDDPCIE_16
VDDPCIE_17
0.1U_0402_16V7K
PART 5/6
C220
0.1U_0402_16V7K
< IO power for HyperTransport receive interface >
0_0805_5%
C215
VDDHT_1
VDDHT_2
VDDHT_3
VDDHT_4
VDDHT_5
VDDHT_6
VDDHT_7
1U_0402_6.3V4Z
0.1U_0402_16V7K
J17
K16
L16
M16
P16
R16
T16
1U_0402_6.3V4Z
+VDDHT
C210
1U_0402_6.3V4Z
0.1U_0402_16V7K
C208
C241
L18
C207
C240
2A
2
4.7U_0805_10V4Z
C206
C247
< Main IO power for PCI-E graphics, SB, and GPP interfaces >
U3E
< Digital IO power for HyperTransport interface >
0_0805_5%
C209
0.1U_0402_16V7K
0.1U_0402_16V7K
L16
0.1U_0402_16V7K
2A
2
+1.1VS
POWER
1
1
C234
470U_D2E_2.5VM_R9M
DVT change to B size
< Isolated power for side-port memory interface >
< 3.3V IO power >

H11
H12
+3VS
1
RS780M_FCBGA528
C250
GM@
1U_0402_6.3V4Z
C253
GM@
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
U3F
A25
D23
E22
G22
G24
G25
H19
J22
L17
L22
L24
L25
M20
N22
P20
R19
R22
R24
R25
H20
U22
V19
W22
W24
W25
Y21
AD25
C252
0_0402_5%
VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT20
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
L12
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11
PART 6/6
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
GROUND
PM1@
VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
A2
B1
D3
D5
E4
G1
G2
G4
H7
J4
R7
L1
L2
L4
L7
M6
N4
P6
R1
R2
R4
V7
U4
V8
V6
W1
W2
W4
W7
W8
Y6
AA4
AB5
AB1
AB7
AC3
AC4
AE1
AE4
AB2
AE14
D11
G8
E14
E15
J15
J12
K14
M11
L15
RS780M_FCBGA528
RS780MCR3@
/
Compal Secret Data
2008-09-25
Issued Date
2009-09-25
Deciphered Date
A
Title

RS780M&RX781 PWR/GND

Custom
Date:
Rev
1.0
LA-4971P
Sheet
E
13
of
45
< RS780 DFT_GPIO5 mux at CRT_VSYNC pull High to 3K >
R101
3K_0402_5%
R102
3K_0402_5%
< DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb >

Enables the Test Debug Bus using GPIO.
SI2: Change to 3K pull high

11,16 UMA_CRT_VSYNC
+3VS
1 : Enable (RX780, RS780)

0 : Disable (RX780, RS780)
PIN: RS740-->RS780_AUX_CAL; RX780-->NB_TV_C; RS780--> VSYNC#
< RS780 use register to control PCI-E configure >
< DFT_GPIO[4:2] : STRAP_PCIE_GPP_CFG[2:0] >

These pin straps are used to configure PCI-E GPP mode.
000 : 00001
001 : 00010
010 : 01011
011 : 00100
100 : 01010
101 : 01100
111 : 01011
< DFT_GPIO1 : LOAD_EEPROM_STRAPS >
< RS780 DFT_GPIO1 >
Selects Loading of STRAPS from EPROM

@
11 AUX_CAL
R104
150_0402_1%
1 : Bypass the loading of EEPROM straps and use Hardware Default Values
0 : I2C Master can load strap values from EEPROM if connected, or use default values if not connected
11,21 SUS_STAT#
D4
1 CH751H-40PT_SOD323-2
RS740/RX780: DFT_GPIO1 RS780:SUS_STAT

PLT_RST# 11,19,20,26,27,33,34
< DFT_GPIO0: STRAP_DEBUG_BUS_PCIE_ENABLEb >
< RS780 use HSYNC to enable SIDE PORT (internal pull high) >
RX780: Enables the Test Debug Bus using PCIE bus

11,16 UMA_CRT_HSYNC
R125
3K_0402_5%
+3VS
1 : Disable ( Can still be enabled using nbcfg register access )

0 : Enable
RS780: Enables Side port memory ( RS780 use HSYNC#)
1. Disable (RS780)
0 : Enable (RS780)
Compal Secret Data
2008-09-25
Issued Date
2009-09-25
Deciphered Date
A
Title

RS780M&RX781 STRAPS

Custom
Date:
Rev
1.0
LA-4971P
Sheet
E
14
of
45
R167 1
R168 1
2 0_0805_5%
1
2 0_0805_5%
1
1
C452
22U_0805_6.3V6M
1
C453
0.1U_0402_16V4Z
1
C454
0.1U_0402_16V4Z
1
C455
0.1U_0402_16V4Z
1
C444
22U_0805_6.3V6M
1
C456
0.1U_0402_16V4Z
+3VS_CLK
+3VS
+VDDCLK_IO
+1.2V_HT
C457
0.1U_0402_16V4Z
C445
0.1U_0402_16V7K
C446
0.1U_0402_16V7K
CLK_48M
R185
33_0402_5%
CLK_48M_CRUSB
R170
33_0402_5%
NB_OSC_14.318M_R
R379
158_0402_1%
R187
33_0402_5%
C447
0.1U_0402_16V7K
C448
0.1U_0402_16V7K
+3VS_CLK
1
C458
C459
C460
C461
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C449
0.1U_0402_16V7K
C450
0.1U_0402_16V7K
C451
1U_0402_6.3V4Z
CLK_48M_CR 29
< To Card Reader >
CLK_48M_USB 21
< To SB700 USB host >
NB_OSC_14.318M 11
< To RS780 Clock block >
0.1U_0402_16V4Z
R380 1
TIGRIS@
2 90.9_0402_1%
SB_14.318M 20
CLK_XTAL_OUT
CLK_XTAL_IN
CLK_NBHT 11
< To RS780 Clock block >

CLK_NBHT# 11
1
14.31818MHZ_20P_L8430
1
C465
R174
+3VS_CLK
+3VS_CLK
C464
+3VS_CLK
Y2
C629
2
1
CLK_CPU_BCLK_R
2
+3VS_CLK
1U_0402_6.3V4Z
R946
0_0402_5%
CLK_CPU_BCLK
22P_0402_50V8J
22P_0402_50V8J
2
8.2K_0402_5%
+3VS_CLK
11 CLK_SBLINK_BCLK#
11 CLK_SBLINK_BCLK
SB LINK
+VDDCLK_IO
27 CLK_PCIE_MCARD2#
27 CLK_PCIE_MCARD2
WLAN
SCL
SDA
VDD_DOT
SRC_7#/27M
SRC_7/27M_SS
VSS_DOT
SRC_5#
SRC_5
SRC_4#
SRC_4
VSS_SRC
VDD_SRC_IO
SRC_3#
SRC_3
SRC_2#
SRC_2
VDD_SRC
VDD_SRC_IO
VSS_SRC
SRC_1#
SRC_1
SRC_0#
SRC_0
CLKREQ_0#
ATIGCLK_2#
ATIGCLK_2
VSS_ATIG
VDD_ATIG_IO
VDD_ATIG
ATIGCLK_1#
ATIGCLK_1
ATIGCLK_0#
ATIGCLK_0
SB_SRC_1#
SB_SRC_1
VSS_SB_SRC
+3VS_CLK
+VDDCLK_IO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
+3VS_CLK
R945
0_0402_5%
CLK_CPU_BCLK#
CLKREQ_NCARD#
CLKREQ_MCARD2#
VDD_CPU
VDD_CPU_I/O
VSS_CPU
CLKREQ_1#
CLKREQ_2#
VDD_A
VSS_A
VSS_SATA
SRC_6/SATA
SRC_6#/SATA#
VDD_SATA
CLKREQ_3#
CLKREQ_4#
SB_SRC_SLOW#
SB_SRC_0
SB_SRC_0#
VDD_SB_SRC
VDD_SB_SRC_IO
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
+3VS_CLK
+VDDCLK_IO
CLKREQ_LAN
CLKREQ_NCARD#
CLKREQ_MCARD2#
2
8.2K_0402_5%
2
8.2K_0402_5%
2
8.2K_0402_5%
+3VS_CLK
CLK_SBSRC_BCLK 20
CLK_SBSRC_BCLK# 20
SB SRC
+3VS_CLK
R372 1
2 10K_0402_5%
+3VS_CLK
+3VS_CLK
+VDDCLK_IO
3
SLG8SP626VTR_QFN72_10x10
OSC_14M_NB
1
RS780
R180
8.2K_0402_5%
+3VS_CLK
+VDDCLK_IO
R181
8.2K_0402_5%
NBGFX_CLK 11
NB
NBGFX_CLK# 11
CLK_PCIE_VGA 19
CLK_PCIE_VGA# 19
NB CLOCK INPUT TABLE
GFX
NB CLOCKS
MiniCard_1
CLKREQ_LAN
configure as SATA output

1 *
configure as 27M and 27M_SS output
27M_SEL
0
configure as SRC_7 output
* default
Use voltage divider resistor R379 & R380 to pull low
configure as single-ended 66MHz output
0*
configure as differential 100MHz output
* default
CLKREQ_LAN 26
CLK_PCIE_LAN 26
CLK_PCIE_LAN# 26
GLAN
CLK_PCIE_NCARD 27
CLK_PCIE_NCARD# 27
New Card
2008-09-25
RS780
100M DIFF
100M DIFF
100M DIFF
100M DIFF
REFCLK_P
REFCLK_N
14M SE (1.8V)
NC
14M SE (1.1V)
vref
GFX_REFCLK
100M DIFF
100M DIFF(IN/OUT)*
GPP_REFCLK
100M DIFF
NC or 100M DIFF OUTPUT
GPPSB_REFCLK
100M DIFF
100M DIFF
2009-09-25
Deciphered Date
B
HT_REFCLKN
Compal Secret Data
Issued Date
NB_OSC_14.318M
RX780
HT_REFCLKP
10/23 Delete for MiniCard1
27M_SEL
SEL_SATA
0 *
configure as normal SRC(SRC_6) output
* default
1.1V 158R/90.9R
+3VS_CLK
SEL_SATA
1
R324
1
R325
1
R390
CLKREQ_NCARD# 27
CLKREQ_MCARD2# 27
+3VS_CLK
R179
@ 8.2K_0402_5%
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
73
GND
8,9,21,27 SMB_CK_CLK0
8,9,21,27 SMB_CK_DAT0
VSS_48
48MHz_0
48MHz_1
VDD_48
XTAL_OUT
XTAL_IN
VSS_REF
REF_0/SEL_HTT66
REF_1/SEL_SATA
REF_2/SEL_27
VDD_REF
VDD_HTT
HTT_0/66M_0
HTT_0#/66M_1
VSS_HTT
PD#
CPU_K8_0
CPU_K8_0#
U10
< To CPU >
261_0402_1%
CLK_CPU_BCLK_R#
Routing the trace at least 10mil

2
SEL_SATA
27M_SEL
CLK_XTAL_OUT
CLK_XTAL_IN
R186
@
Title

Clock Generator

Custom
Date:
Rev
1.0
LA-4971P
Sheet
E
15
of
45
+5VS
11
UMA_CRT_R
GM@
< CRT CONNECTOR >
R662
2 0_0402_5%
+R_CRT_VCC
D36
F2
1.1A_6V_MINISMDC110F-2
2
1
+CRT_VCC
3
19
VGA_CRT_R
PM@
R666
0_0402_5%
1
RB491D_SOT23-3
C475
0.1U_0402_16V4Z
11
19
UMA_CRT_B
VGA_CRT_B
R663
0_0402_5%
GM@
R665
0_0402_5%
PM@
R661
0_0402_5%
D35
DAN217_SC59
D37
DAN217_SC59
D34
DAN217_SC59
+3VS
JCRT
RED_L
D_DDCDATA
GREEN_L
L47
2 NBQ100505T-800Y_0402
RED_L
GREEN
L48
2 NBQ100505T-800Y_0402
GREEN_L
BLUE
L49
2 NBQ100505T-800Y_0402
BLUE_L
RED
HSYNC
BLUE_L
+CRT_VCC
VSYNC
1
R217
150_0402_1%
C471
6P_0402_50V8D
C859
6P_0402_50V8D
C469
6P_0402_50V8D
C858
6P_0402_50V8D
C476
6P_0402_50V8D
C706
220P_0402_50V7K
C472
6P_0402_50V8D
D_DDCCLK
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
G
G
16
17
@ ALLTO_C10532-11505-L_15P
R211
150_0402_1%
R214
140_0402_1%
2
R214
150_0402_1% GM@
PM@
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
PM@
VGA_CRT_G
19
GM@
UMA_CRT_G
11
2
R664
0_0402_5%
RS780 use 140 ohm, check RS880 use what value
+CRT_VCC
2
2 0.1U_0402_16V4Z
R370
2 10K_0402_5%
PM@ 1
R674
0_0402_5%
R_HSYNC
GM@ 1
19 VGA_CRT_HSYNC
D_HSYNC
L84 1
2 10_0402_5%
HSYNC
L83 1
2 10_0402_5%
VSYNC
U14
SN74AHCT1G125GW_SOT353-5
11,14 UMA_CRT_HSYNC
R673
0_0402_5%
P
OE#
5
1
C473 1
< SYNC SIGNAL >
+CRT_VCC
2 0.1U_0402_16V4Z
R381
2 10K_0402_5%
PM@ 1
R675
0_0402_5%
R_VSYNC
GM@ 1
19 VGA_CRT_VSYNC
11,14 UMA_CRT_VSYNC
R676
0_0402_5%
P
OE#
5
1
C477 1
C474
10P_0402_50V8J
1
@
2
Y
C470
10P_0402_50V8J
D_VSYNC
4
U13
+CRT_VCC
+3VS
3
PM@
R237
4.7K_0402_5%GM@
1
PM@ 1
R100
6.8K_0402_5%
GM@
R218
6.8K_0402_5%
GM@
D_DDCDATA
C177
33P_0402_50V8K
19 VGA_CRT_DATA
R670
2 0_0402_5%
R218
2K_0402_1%
Q10B
3 2N7002DW-7-F_SOT363-6
4
1
11 UMA_CRT_DATA
GM@ 1
PM@
+3VS
R238
4.7K_0402_5%
GM@
R672
2 0_0402_5% CRT_DATA
R100
2K_0402_1%
PM:VGA Board have pull high
< Display Data Channel >
+3VS
R669
2 0_0402_5% CRT_CLK
PM@ 1
R671
2 0_0402_5%
Q10A
6 2N7002DW-7-F_SOT363-6
D_DDCCLK
1
C181
33P_0402_50V8K
19 VGA_CRT_CLK
GM@ 1
11 UMA_CRT_CLK
C857
470P_0402_50V8J
1
@
C856
470P_0402_50V8J
RS780 DAC_SCL & SDA is 5V tolerance

FOR EMI
Compal Secret Data
2008-09-25
Issued Date
2009-09-25
Deciphered Date
A
Title

CRT/TV-OUT Connector

Custom
Date:
Rev
1.0
LA-4971P
Sheet
E
16
of
45
11 UMA_LCD_TXOUT0_A0+
GM@ R543
2 0_0402_5%
GM@ R580
2 0_0402_5%
LCD_TXOUT0+
19 LCD_TXOUT0+
11 UMA_LCD_TXOUT0_A0-
LCD/PANEL BD. Conn.
LCD_TXOUT0-
19 LCD_TXOUT0-
+LCD_VDD
+3VS
2 0_0402_5%
LCD_TXOUT1-
Q1A
2N7002DW-T/R7_SOT363-6
LCD_TXOUT2+
GM@ R574
Q2
+LCD_VDD
C195
AO3413_SOT23
0.01U_0402_25V7K
W=60mils
Inrush current = 0A
LCD_TXOUT2-
0.1U_0402_16V7K
2
1
2 0_0402_5%
19 LCD_TXOUT2-
C262
R140
2 47K_0402_5%
19 LCD_TXOUT2+
W=60mils
2
2
GM@ R573
19 LCD_TXOUT1-
150_0603_5%
6 2
2 0_0402_5%
R143
100K_0402_5%
R142
GM@ R578
LCD_TXOUT1+
+3VS
2 0_0402_5%
19 LCD_TXOUT1+
GM@ R566
1
1
2 0_0402_5%
Q1B
LCD_TXCLK+
11 UMA_LCD_TXCLK_ACLK-
GM@ R559
2 0_0402_5%
GM@ R590
2 0_0402_5%
GM@ R681
2 0_0402_5%
11
UMA_ENVDD
GM@ R668 1
19
VGA_ENVDD
PM@ R667 1
ENVDD
2 0_0402_5%
@ C263
2 0_0402_5%
R144
C264
4.7U_0805_10V4Z
2
2N7002DW-T/R7_SOT363-6
0.1U_0402_16V7K
19 LCD_TXCLK+
GM@ R540
11 UMA_LCD_TXCLK_ACLK+
100K_0402_5%
LCD_TXCLK2
19 LCD_TXCLK11 UMA_LCD_TZOUT0_B0+
LCD_TZOUT0+
19 LCD_TZOUT0+
2
11 UMA_LCD_TZOUT0_B0-
GM@ R631
11 UMA_LCD_TZOUT0_B1+
+5VS
2 0_0402_5%
1
1
@ R968
0_0603_5%
R967
0_0603_5%
@ C205
2 0.1U_0402_16V7K
LCD_TZOUT1+
19 LCD_TZOUT1+
JLVDS
+5V_LVDS_CAM
GM@ R680
LCD_TZOUT1-
11 UMA_LCD_TZOUT0_B2+
GM@ R660
2 0_0402_5%
GM@ R677
2 0_0402_5%
31
INT_MIC_R
LCD_TZOUT2+
19 LCD_TZOUT2+
GM@ R591
11 UMA_LCD_TZCLK_BCLK+
2 0_0402_5%
LCD_TZCLK+
GM@ R594
11 UMA_LCD_TZCLK_BCLK-
34
BKOFF#
BKOFF#
2
19 LCD_TZCLK+
LCD_TXOUT0+
LCD_TXOUT0LCD_TXOUT1+
LCD_TXOUT2LCD_TZOUT0+
LCD_TZOUT0LCD_TZOUT1+
LCD_TZOUT2-
LCD_TZOUT2-
19 LCD_TZOUT2-
2 0_0402_5%
LCD_TZCLK-
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
GND
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
GMD
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
LCD_TXCLK+
LCD_TXCLKDAC_BRIG 34
INVT_PWM 34
LCD_TZCLK+
LCD_TZCLKLCD_EDID_CLK
LCD_EDID_DATA
+3VS
+LCDVDD_R
1
+LCD_INV
Rated Current MAX:3000mA

L12 2
@ ACES_87242-4001-09_40P
R146
10K_0402_5%
C268
68P_0402_50V8J
B+
2
1 FBMA-L11-201209-221LMA30T_0805
1
C875
C269
0.1U_0402_25V4Z
C874
680P_0402_50V7K
C267
0.1U_0402_16V7K
< EMI require >

3
680P_0402_50V7K
< EMI require >
19 LCD_TZCLK-
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
32 USB20_P9_R_CAM
32 USB20_N9_R_CAM
2 0_0402_5%
19 LCD_TZOUT1-
+5VALW
LCD_TZOUT0-
19 LCD_TZOUT0-
GM@ R555
11 UMA_LCD_DDC_CLK
1.5A
2 0_0402_5%
LCD_EDID_CLK
19 LCD_EDID_CLK
GM@ R586
11 UMA_LCD_DDC_DAT
+LCDVDD_R
2 0_0402_5%
LCD_EDID_DATA
19 LCD_EDID_DATA
L8 2
1
1 0_0805_5%
+LCD_VDD
1
C265
0.1U_0402_16V7K
C266
4.7U_0805_10V4Z
+3VS
GM@ R68
2 4.7K_0402_5%
UMA_LCD_DDC_CLK
GM@ R69
2 4.7K_0402_5%
UMA_LCD_DDC_DAT
Compal Secret Data
2008-09-25
Issued Date
2009-09-25
Deciphered Date
A
Title

LCD CONN.

Custom
Date:
Rev
1.0
LA-4971P
Sheet
E
17
of
45
< Power, reset and crystal >
+HDMI_5V_OUT
< HDMI CEC Controller >
Vgs
= 10V
Id
= 6A
Rds_on = 35m ohm
U8
EC_SMB_CK1
+3VL
R182
1 4.7K_0402_5%
CEC_RST#
R178
2 47K_0402_5%
CEC_XOUT
P3_5/SSCK/SCL/CMP1_2
P1_6/CLK0/SSI01
P3_7/CNTR0#/SSO/TXD1
P1_5/RXD0/CNTR01/INT11#
RESET#
P1_4/TXD0
XOUT/P4_7
P1_3/KI3#/AN11/TZOUT
11
12
13
H@
D19
1 RB161M-20_SOD123-2
H@
F3
2 1.1A_6V_MINISMDC110F-2
CEC_FSHUPD (Pin13) Low= Force to update flash.
C543
2 1U_0402_6.3V4Z
C257
2 0.1U_0402_16V7K
15
+5VS
XIN/P4_6
P4_2/VREF
VCC/AVCC
P1_1/KI1#/AN9/CMP0_1
16
17
+3VL
0.1U_0402_16V7K
1
+3VL
HDMI_CLK_CEC
8
HDMI_CECIN
C256
MODE
P4_5/INT0#/RXD1
P3_3/TCIN/INT3#/SSI00/CMP1_0
18
HDMI_DATA_CEC
+3VL
19
HDMI_HPD_R
20
EC_SMB_DA1
R157
10K_0402_5%
HDMI_CECIN
0.1U_0402_16V7K
EC_SMB_DA1 34,38
2N7002_SOT23-3
HDMI_R_CK+
HDMI_R_D0HDMI_R_D0+
HDMI_R_D1-
< EMI solution >
R616
0_0402_5%
HDMI_R_CK-
HDMI_R_D2+
HDMI_DATA_CEC
@
R236
10K_0402_5%
HDMI_CLK_CEC
WCM2012F2SF-900T04_0805
+5VS
11 HDMIDAT_UMA
HDMI_R_D0+
499_0402_1%
2 715_0402_1%
19 HDMIDAT_VGA
715_0402_1%
499_0402_1%
11 HDMICLK_UMA
R301
2 0_0402_5%
HDMI@ 1
R302
2 0_0402_5%
HDMI_R_D1-
R621
0_0402_5%
R623
0_0402_5%
HDMI_R_D1+
499_0402_1%
2 715_0402_1%
C851
H@
IHDMI@ R173
HDMI@ R173
715_0402_1%
499_0402_1%
+5VS
HDMI_R_D1+
HDMI_R_D2-
H@ WCM2012F2SF-900T04_0805
4
3
4
3
0.1U_0402_16V4Z
2
HDMI_TX2+
1
L88
R624
0_0402_5%
HDMI@ R141
IHDMI@ R141 1
HDMI_R_D2-
1
IHDMI@ R139
HDMI@ R139
HDMI_HPD_R
H@
499_0402_1%
2 715_0402_1%
H@
Q137B
4
2N7002DW-7-F_SOT363-6
HDMI_HPD_R
715_0402_1%
499_0402_1%
2008-09-25
Issued Date
H@ 2
R588
1 2.2K_0402_5%
R86
1 100K_0402_5%
+3VS
4
H@
D57
2 CH751H-40PT_SOD323-2
Compal Secret Data
HDMI_R_D2+
0.1U_0402_16V4Z
R589
1 100K_0402_5%
H@ 2
+3VL
C850
H@
100K_0402_5%
H@ U39
2009-09-25
Deciphered Date
A
R628
+5VS
HDMI_R_D2+
HDMI_SCLK
HDMI_HPD
H@
Q137A
1
2N7002DW-7-F_SOT363-6
HDMI@ R297
IHDMI@ R297 1
H@
Q140
BSH111_SOT23-3
1
+5VL
< Hot-plug detection & level shift >
WCM2012F2SF-900T04_0805
HDMI_TX2-
IHDMI@ 1
H@ L87
1
1
R299
2 0_0402_5%
19 HDMICLK_VGA
HDMI_TX1+
HDMI@ 1
IHDMI@ R172
HDMI@ R172
HDMI_R_D1-
H@
Q136B
4
2N7002DW-7-F_SOT363-6
HDMI_SDATA
HDMI@ R304
IHDMI@ R304 1
5
1
R620
0_0402_5%
HDMI_R_D0HDMI_R_D0+
H@
Q139
BSH111_SOT23-3
1
R619
0_0402_5%
IHDMI@ 1
IHDMI@
R209
4.7K_0402_5%
R298
2 0_0402_5%
IHDMI@
R176
4.7K_0402_5%
+5VS
1
L86
715_0402_1%
499_0402_1%
+3VS
HDMI_TX1-
+3VS
H@
Q136A
1
2N7002DW-7-F_SOT363-6
IHDMI@ R315
HDMI@ R315
H@ WCM2012F2SF-900T04_0805
4
3
4
3
HDMI_TX0+
499_0402_1%
2 715_0402_1%
HDMI_SCLK
< Place MOSFET close to HDMI connector >
HDMI@ R307
IHDMI@ R307 1
HDMI_R_CK-
HDMI_R_CK+
HDMI_R_D0-
HDMI_SDATA
R618
0_0402_5%
P
OE#
HDMI_TX0-
HDMI_R_CK+
H@
R212
2.2K_0402_5%
@
Q34
BSH111_SOT23-3
1
D
R617
0_0402_5%
H@
R188
2.2K_0402_5%
< Termination resistor >
+HDMI_5V_OUT
@
Q33
BSH111_SOT23-3
1
1
@
R210
10K_0402_5%
TAITW_PDVBR5-19FLBS4NN4N_19P-T
HDMI_CLK+
Q150
+3VL
2N7002_SOT23-3
< Place MOSFET close to HDMI connector >

+3VL
R165
100K_0402_5%
2
< HDMI DDC channel to device >
2
G
20
21
22
23
H@ L85
1
1
HDMI_CLK-
HDMI_R_D1+
HDMI_R_D2-
R163
2 27K_0402_5%
HDMI_CEC
HDMI_R_CK-
HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CKGND
CK_shield GND
CK+
GND
D0GND
D0_shield
D0+
D1D1_shield
D1+
D2D2_shield
D2+
HDMI_CLK+
HDMI_CLK-
HDMI_SDATA
HDMI_SCLK
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
2 0.1U_0402_16V7K
2 0.1U_0402_16V7K
+HDMI_5V_OUT
10,19 HDMI_CLK0+
10,19 HDMI_CLK0-
@
HDMI_CECOUT 1
JHDMI
HDMI_HPD
HDMI_TX0+
HDMI_TX0HDMI_TX1+
HDMI_TX1HDMI_TX2+
HDMI_TX2-
C185 1
C186 1
< HDMI Connector >
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
2
2
2
2
2
2
H@
H@
1
1
1
1
1
1
C189
C188
C190
C184
C187
C191
H@
H@
H@
H@
H@
H@
HDMI_CEC
2
G
R5F211B4D33SP-PLSP0020JB-A
SI:Add R616~R624 for EMI requset
R583
27K_0402_5%
D
@
P3_4/SCS#/SDA/CMP1_1
P1_7/CNTR00/INT10#
HDMI_TXD0+
HDMI_TXD0HDMI_TXD1+
HDMI_TXD1HDMI_TXD2+
HDMI_TXD2-
D13
CH751H-40PT_SOD323-2
@
HDMI_CECOUT 10
Q149
10,19
10,19
10,19
10,19
10,19
10,19
C258
H@
@
2
+5VL
Inrush current = 0A
CEC_XIN
R183
1 4.7K_0402_5%
+HDMI_5V_OUT_M
H@
D18
1 RB161M-20_SOD123-2
< HDMI_CEC level shift > < Place MOSFET close to HDMI connector >
+3VL
1 1
P1_2/KI2#/AN10/CMP0_2
CEC_FSHUPD1
@ R171
2 4.7K_0402_5%
VSS/AVSS
@ R169
2 4.7K_0402_5%
1
14
R177
2 47K_0402_5%
CEC_INT# 34
1
CEC_TEST
34,38 EC_SMB_CK1
Title
HPD
11,19,21

HDMI/CEC

Custom
Date:
Rev
1.0
LA-4971P
Sheet
E
18
of
45
10
10
PCIE_MTX_C_GRX_P[0..15] 10
10
JMXMA
JMXMB
140mil(3.5A)
1
3
5
7
9
11
13
15
17
19
21
23
+MXM_B+
D
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
GND
GND
GND
GND
1V8RUN
1V8RUN
1V8RUN
1V8RUN
1V8RUN
1V8RUN
1V8RUN
RUNPWROK
5VRUN
GND
GND
GND
2
4
6
8
10
12
14
16
18
20
22
24
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_P9
< To NB >
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_P2
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
@
PEX_RX15#
PEX_RX15
GND
PEX_RX14#
PEX_RX14
GND
PEX_RX13#
PEX_RX13
GND
PEX_RX12#
PEX_RX12
GND
PEX_RX11#
PEX_RX11
GND
PEX_RX10#
PEX_RX10
GND
PEX_RX9#
PEX_RX9
GND
PEX_RX8#
PEX_RX8
GND
PEX_RX7#
PEX_RX7
GND
PEX_RX6#
PEX_RX6
GND
PEX_RX5#
PEX_RX5
GND
PEX_RX4#
PEX_RX4
GND
PEX_RX3#
PEX_RX3
GND
PEX_RX2#
PEX_RX2
GND
PRSNT2#
PEX_TX15#
PEX_TX15
GND
PEX_TX14#
PEX_TX14
GND
PEX_TX13#
PEX_TX13
GND
PEX_TX12#
PEX_TX12
GND
PEX_TX11#
PEX_TX11
GND
PEX_TX10#
PEX_TX10
GND
PEX_TX9#
PEX_TX9
GND
PEX_TX8#
PEX_TX8
GND
PEX_TX7#
PEX_TX7
GND
PEX_TX6#
PEX_TX6
GND
PEX_TX5#
PEX_TX5
GND
PEX_TX4#
PEX_TX4
GND
PEX_TX3#
PEX_TX3
GND
PEX_TX2#
PEX_TX2
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_P1
+1.8VS
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
205
207
209
211
213
215
217
219
221
223
225
227
229
231
PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_P0
SUSP#
PLT_RST#
PLT_RST#
C865
PM@
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
CLK_PCIE_VGA#
CLK_PCIE_VGA
15 CLK_PCIE_VGA#
15 CLK_PCIE_VGA
SUSP#
27,30,34,36,39,41
+5VALW
11,14,20,26,27,33,34
PCIE_GTX_C_MRX_N15
PCIE_GTX_C_MRX_P15
EC_SMB_DA2
EC_SMB_CK2
6,34,35 EC_SMB_DA2
6,34,35 EC_SMB_CK2
0.1U_0402_16V4Z
16
16
16
16
PCIE_MTX_C_GRX_N15
PCIE_MTX_C_GRX_P15
VGA_CRT_HSYNC
VGA_CRT_VSYNC
VGA_CRT_CLK
VGA_CRT_DATA
VGA_CRT_HSYNC
VGA_CRT_VSYNC
VGA_CRT_CLK
VGA_CRT_DATA
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_P9
< From NB >
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_P6
11,18,21
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_P5
HPD
HPD
VGA_HDMI_CLKVGA_HDMI_CLK+
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P4
VGA_HDMI_TXD2VGA_HDMI_TXD2+
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P2
QUASA_CA0330-230N20
PEX_RX1#
GND
PEX_RX1
PEX_TX1#
GND
PEX_TX1
PEX_RX0#
GND
PEX_RX0
PEX_TX0#
GND
PEX_TX0
PEX_REFCLK#
PRSNT1#
PEX_REFCLK
TV_C/HDTV_Pr
CLK_REQ#
GND
PEX_RST#
TV_Y/HDTV_Y
RSVD
GND
RSVD
TV_CVBS/HDTV_Pb
SMB_DAT
GND
SMB_CLK
VGA_RED
THERM#
GND
VGA_HSYNC
VGA_GRN
VGA_VSYNC
GND
DDCA_CLK
VGA_BLU
DDCA_DAT
GND
IGP_UCLK#
LVDS_UCLK#
IGP_UCLK
LVDS_UCLK
GND
GND
RSVD
LVDS_UTX3#
RSVD
LVDS_UTX3
RSVD
GND
IGP_UTX2#
LVDS_UTX2#
IGP_UTX2
LVDS_UTX2
GND
GND
IGP_UTX1#
LVDS_UTX1#
IGP_UTX1
LVDS_UTX1
GND
GND
IGP_UTX0#
LVDS_UTX0#
IGP_UTX0
LVDS_UTX0
GND
GND
IGP_LCLK#/DVI_B_CLK#
LVDS_LCLK#
IGP_LCLK/DVI_B_CLK
LVDS_LCLK
DVI_B_HPD/GND
GND
RSVD
LVDS_LTX3#
RSVD
LVDS_LTX3
GND
GND
IGP_LTX2#/DVI_B_TX2#
LVDS_LTX2#
IGP_LTX2/DVI_B_TX2
LVDS_LTX2
GND
GND
LVDS_LTX1#
IGP_LTX1/DVI_B_TX1
LVDS_LTX1
GND
GND
LVDS_LTX0#
IGP_LTX0/DVI_B_TX0
LVDS_LTX0
DVI_A_HPD
GND
DVI_A_CLK#
DDCC_DAT
DVI_A_CLK
DDCC_CLK
GND
LVDS_PPEN
DVI_A_TX2#
LVDS_BL_BRGHT
DVI_A_TX2
LVDS_BLEN
GND
DDCB_DAT
DVI_A_TX1#
DDCB_CLK
DVI_A_TX1
2V5RUN
GND
GND
DVI_A_TX0#
3V3RUN
DVI_A_TX0
3V3RUN
GND
3V3RUN
FIX PIN
FIX PIN
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
208
210
212
214
216
218
220
222
224
226
228
230
232
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_P0
VGA_CRT_R
VGA_CRT_G
VGA_CRT_B
LCD_TZCLKLCD_TZCLK+
LCD_TXCLKLCD_TXCLK+
LCD_EDID_DATA
LCD_EDID_CLK
VGA_ENVDD
VGA_ENBKL
HDMIDAT_VGA
HDMICLK_VGA
VGA_CRT_R 16
VGA_CRT_G 16
VGA_CRT_B 16
LCD_TZCLK- 17
LCD_TZCLK+ 17
LCD_TZOUT2- 17
LCD_TZOUT2+ 17
LCD_TZOUT1- 17
LCD_TZOUT1+ 17
LCD_TZOUT0- 17
LCD_TZOUT0+ 17
C
LCD_TXCLK- 17
LCD_TXCLK+ 17
LCD_TXOUT2- 17
LCD_TXOUT2+ 17
LCD_TXOUT1- 17
LCD_TXOUT1+ 17
LCD_TXOUT0- 17
LCD_TXOUT0+ 17
LCD_EDID_DATA 17
LCD_EDID_CLK 17
VGA_ENVDD 17
VGA_ENBKL 34
HDMIDAT_VGA 18
HDMICLK_VGA 18
+3VS
@ QUASA_CA0330-230N20
B
+MXM_B+
160mil(4A)
1
C868
PM@
PM@ L90
1 0_0805_5%
PM@ L91
1 0_0805_5%
160mil(4A)
B+
2
C869
C867
680P_0402_50V7K
PM@
2
680P_0402_50V7K
68P_0402_50V8J
VGA_HDMI_TXD2+
VGA_HDMI_TXD1-
HDMI@
HDMI@
HDMI@
HDMI@
VGA_HDMI_TXD0+
VGA_HDMI_TXD0VGA_HDMI_CLK+
VGA_HDMI_CLK-
HDMI@ R956 1
HDMI@ R957 1
HDMI@ R958 1
HDMI@ R954 1
R951
R955
R952
R953
1
1
1
1
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
HDMI_TXD2+ 10,18
HDMI_TXD2- 10,18
HDMI_TXD1+ 10,18
HDMI_TXD1- 10,18
2 0_0402_5%
2 0_0402_5%
2 0_0402_5%
2 0_0402_5%
HDMI_TXD0+ 10,18
HDMI_TXD0- 10,18
HDMI_CLK0+ 10,18
HDMI_CLK0- 10,18
2
2
2
2
2008-09-25
Issued Date
Compal Secret Data
2009-09-25
Deciphered Date
5
Title
MXM Connector
Custom
Rev
1.0
LA-4971P
Date:
Sheet
1
19
of
45
+3VALW
C506
1 0.1U_0402_16V4Z
PLT_RST#
@ 1
R303
2 100_0402_5%
C501
2 100P_0402_50V8J
CLK_PCI_SIO2 @ 1
R369
2 100_0402_5%
C503
2 100P_0402_50V8J
PLT_RST# 11,14,19,26,27,33,34
R175
2 8.2K_0402_5%
CLK_PCI_EC
2
NB_RST#_R
+3VS
@ 1
PCI_REQ#0
U16
NC7SZ08P5X_NL_SC70-5
R312
1 33_0402_5%
U15A
< x4 PCIE A-link To NB >
< x4 PCIE A-link from NB >
10
10
10
10
10
10
10
10
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N
10
10
10
10
10
10
10
10
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
2
2
2
2
2
2
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
SB_RX0P_C
SB_RX0N_C
SB_RX1P_C
SB_RX1N_C
SB_RX2P_C
SB_RX2N_C
SB_RX3P_C
SB_RX3N_C
V23
V22
V24
V25
U25
U24
T23
T22
U22
U21
U19
V19
R20
R21
R18
R17
R305
R306
+PCIE_VDDR
+1.2V_HT
1
1
1
1
1
1
1
1
L53 1
1 562_0402_1%
1 2.05K_0402_1%
2
2
2 BLM18PG121SN1D_0603
1
C504
2.2U_0603_6.3V4Z
T25
T24
+SB_PCIEVDD P24
P25
SB700
A_RST#
Part 1 of 5
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCI CLKS
N2
C492
C493
C494
C495
C496
C497
C498
C499
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5/GPIO41
PCIRST#
PCI EXPRESS INTERFACE
@ 2
1
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
PCIE_CALRP
PCIE_CALRN
PCIE_PVDD
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE0#
CBE1#
CBE2#
CBE3#
FRAME#
DEVSEL#
IRDY#
TRDY#
PAR
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
REQ3#/GPIO70
REQ4#/GPIO71
GNT0#
GNT1#
GNT2#
GNT3#/GPIO72
GNT4#/GPIO73
CLKRUN#
LOCK#
PCIE_PVSS
Close to SB
M24
M25
P17
M18
M23
M22
J19
J18
L20
L19
M19
M20
N22
P22
L18
SB_14.318M
J21
C643
2 18P_0402_50V8J
Close to SB
1 10K_0402_5%
NC
IN
NC
SB_32KHI
A3
32.768KHZ_12.5P_1TJS125BJ4A421P
SB_32KHO
CPU_LDT_REQ#
H_PROCHOT#
H_PWRGD
B3
F23
F24
F22
G25
G24
SB700R3@
4
+SB_VBAT
+RTCVCC
R316
2 120_0402_5%
0.1U_0402_16V7K
W=20mils
GPP_CLK3P
GPP_CLK3N
25M_48M_66M_OSC
25M_X1
25M_X2
X1
X2
ALLOW_LDTSTP
PROCHOT#
LDT_PG
LDT_STP#
LDT_RST#
INTE#/GPIO33
INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36
LPCCLK0
LPCCLK1
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
LDRQ1#/GNT5#/GPIO68
BMREQ#/REQ5#/GPIO65
SERIRQ
RTCCLK
INTRUDER_ALERT#
VBAT
R313
1 33_0402_5%
PCI_RST# 28
PCI_AD[0..31]
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3
24,28
PCI_CBE#0 28
PCI_CBE#1 28
PCI_CBE#2 28
PCI_CBE#3 28
PCI_FRAME# 28
PCI_DEVSEL# 28
PCI_IRDY# 28
PCI_TRDY# 28
PCI_PAR 28
PCI_STOP# 28
PCI_REQ#0 28
PAD T15
PCI_GNT#0 28
3
PAD T16
CLKRUN# 28
AD3
AC4
AE2
AE3
PCI_PIRQA# 28
G22 CLK_PCI_EC1 R308

1
2 22_0402_5% CLK_PCI_EC
CLK_PCI_EC 24,34
E22 CLK_PCI_SIOC R310
1
2 22_0402_5%
CLK_PCI_SIO2 24,33
H24
LPC_AD0 33,34
H23
LPC_AD1 33,34
J25
LPC_AD2 33,34
J24
LPC_AD3 33,34
D17
PUMA@ R965
H25
PUMA@ 1
H22
2
2
1 300_0402_5% +3VS
R966
AB8
0_0402_5%
TIGRIS@
TIGRIS@1
AD7
2
LPC_FRAME# 33,34
V15
EC & TPM &Debug
C3
C2
B2
SERIRQ 28,33,34
RTC_CLK 24
STRAP PIN
+SB_VBAT
218S7EALA11FG_BGA528_SB700
+RTCBATT
3
1
C510
1U_0402_6.3V4Z
C509
@
1
GPP_CLK2P
GPP_CLK2N
CLK_PCI_PCM 28
PCI_CLK2 24
PCI_CLK3 24
PCI_CLK4 24
PCI_CLK5 24
D10
R184
1 1K_0402_5%
J1
JUMP_43X39
C297
0.1U_0402_16V7K
2009-09-25
Deciphered Date
Title
C

SB700-PCIE/PCI/ACPI/LPC/RTC
BAS40-04_SOT23-3
+CHGRTC
2008-09-25
Issued Date
2
Compal Secret Data
GPP_CLK1P
GPP_CLK1N
U2
P7
V4
T1
V3
U1
V1
V2
T2
W1
T9
R6
R7
R5
U8
U5
Y7
W8
V9
Y8
AA8
Y4
Y3
Y2
AA2
AB4
AA1
AB3
AB2
AC1
AC2
AD1
W2
U7
AA7
Y1
AA6
W5
AA5
Y5
U6
W6
W4
V7
AC3
AD4
AB7
AE6
AB6
AD2
AE4
AD5
AC6
AE5
AD6
V5
R309
2 22_0402_5%
R317
2 120_0402_5%
GPP_CLK0P
GPP_CLK0N
LPC
OUT
6,11 CPU_LDT_REQ#
6 H_PROCHOT#
6,43 H_PWRGD
6,11 LDT_STOP#
6 LDT_RST#
H_PROCHOT#
SLT_GFX_CLKP
SLT_GFX_CLKN
N1
RTC
R319 2
+3VS
C652
2 18P_0402_50V8J
CPU_HT_CLKP
CPU_HT_CLKN
RTC XTAL
4
R389
20M_0603_5%
J20
NB_HT_CLKP
NB_HT_CLKN
Y3
NB_DISP_CLKP
NB_DISP_CLKN
CPU
15
PCIE_RCLKP/NB_LNK_CLKP
PCIE_RCLKN/NB_LNK_CLKN
PCI INTERFACE
K23
K22
CLOCK GENERATOR
N25
N24
15 CLK_SBSRC_BCLK
15 CLK_SBSRC_BCLK#
P4
P3
P1
P2
T4
T3

Custom
Date:
Rev
1.0
LA-4971P
Sheet
E
20
of
45
+3VALW
@
R320
2.2K_0402_5%
SB_TEST2
R321
2.2K_0402_5%
SB_TEST1
R322
2.2K_0402_5%
SB_TEST0
R561
1K_0402_5%
EC_SWI_R#
Reserve for EMI request

U15D
SMB_CK_DAT0
R331
2.2K_0402_5%
SMB_CK_CLK1
R332
2.2K_0402_5%
SMB_CK_DAT1
R327
100K_0402_5%
EC_RSMRST#
34
34
34
34,43
11,14
+3VALW
R388
2 4.7K_0402_5%
PM_SLP_S3#
PM_SLP_S5#
PBTN_OUT#
SB_PWRGD
SUS_STAT#
< S0~ S5 ASF only >

34
34
34
34
GATEA20
KB_RST#
EC_SCI#
EC_SMI#
27,34 EC_SWI_R#
SUS_STAT#
SUS_STAT#
SB_TEST2
SB_TEST1
SB_TEST0
6 H_THERMTRIP#
11 NB_PWRGD
34 EC_RSMRST#
EC_SWI_R#
H_THERMTRIP#
EC_RSMRST#
D3
PCI_PME#/GEVENT4#
RI#/EXTEVNT0#
SLP_S2/GPM9#
SLP_S3#
SLP_S5#
PWR_BTN#
PWR_GOOD
SUS_STAT#
TEST2
TEST1
TEST0
GA20IN/GEVENT0#
KBRST#/GEVENT1#
LPC_PME#/GEVENT3#
LPC_SMI#/EXTEVNT1#
S3_STATE/GEVENT5#
SYS_RESET#/GPM7#
WAKE#/GEVENT8#
BLINK/GPM6#
SMBALERT#/THRMTRIP#/GEVENT2#
NB_PWRGD
USBCLK/14M_25M_48M_OSC
USB_RCOMP
USB MISC
demo circuit LID use RI#
<S0>
E1
E2
H7
F5
G1
H2
H1
K3
H5
H4
H3
Y15
W15
K4
K24
F1
J2
H6
F2
J6
W14
USB_FSD13P
USB_FSD13N
USB 1.1
R329
1.2K_0402_5%
SMB_CK_CLK0
USB_FSD12P
USB_FSD12N
USB_HSD11P
USB_HSD11N
USB_HSD10P
USB_HSD10N
USB_HSD9P
USB_HSD9N
RSMRST#
USB_HSD8P
USB_HSD8N
+3VS
11,18,19 HPD
R400
2 4.7K_0402_5%
R16
2 0_0402_5%
SMB_CK_CLK0
SMB_CK_DAT0
SMB_CK_CLK1
SMB_CK_DAT1
USB_HSD7P
USB_HSD7N
USB_HSD6P
USB_HSD6N
USB 2.0
30 SB_SPKR
8,9,15,27 SMB_CK_CLK0
8,9,15,27 SMB_CK_DAT0
27 SMB_CK_CLK1
27 SMB_CK_DAT1
SATA_IS0#/GPIO10
CLK_REQ3#/SATA_IS1#/GPIO6
SMARTVOLT1/SATA_IS2#/GPIO4
CLK_REQ0#/SATA_IS3#/GPIO0
CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39
CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40
SPKR/GPIO2
SCL0/GPOC0#
SDA0/GPOC1#
SCL1/GPOC2#
SDA1/GPOC3#
DDC1_SCL/GPIO9
DDC1_SDA/GPIO8
LLB#/GPIO66
SMARTVOLT2/SHUTDOWN#/GPIO5
DDR3_RST#/GEVENT7#
GPIO
AE18
AD18
AA19
W17
V17
W20
W21
AA18
W18
K1
K2
AA20
Y18
C1
Y19
G5
USB_HSD5P
USB_HSD5N
USB_HSD4P
USB_HSD4N
USB_HSD3P
USB_HSD3N
USB_HSD2P
USB_HSD2N
USB_HSD1P
USB_HSD1N
33 HDA_SYNC_MDC
30 HDA_SYNC_CODEC
30 HDA_RST#_CODEC
33 HDA_RST#_MDC
R333
R334
R335
R336
1
1
1
1
2
2
2
2
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
R337
R338
1
1
2 33_0402_5%
2 33_0402_5%
HDA_SYNC
R339
R340
1
1
2 33_0402_5%
2 33_0402_5%
HDARST#
HDA_BITCLK
HDA_SDOUT
HDA_SDIN0
HDA_SDIN1
M1
M2
J7
J8
L8
M3
L6
M4
L5
AZ_BITCLK
AZ_SDOUT
AZ_SDIN0/GPIO42
AZ_SDIN1/GPIO43
AZ_SDIN2/GPIO44
AZ_SDIN3/GPIO46
AZ_SYNC
AZ_RST#
AZ_DOCK_RST#/GPM8#
USB_HSD0P
USB_HSD0N
D22
E24
E25
D23
SB700R3@
IMC_GPIO0
IMC_GPIO1
SPI_CS2#/IMC_GPIO2
IDE_RST#/F_RST#/IMC_GPO3
IMC_GPIO4
IMC_GPIO5
IMC_GPIO6
IMC_GPIO7
IMC_GPIO18
IMC_GPIO19
IMC_GPIO20
IMC_GPIO21
IMC_GPIO22
IMC_GPIO23
IMC_GPIO24
IMC_GPIO25
IMC_GPIO26
IMC_GPIO27
IMC_GPIO28
IMC_GPIO29
IMC_GPIO30
IMC_GPIO31
IMC_GPIO32
IMC_GPIO33
IMC_GPIO34
IMC_GPIO35
IMC_GPIO36
IMC_GPIO37
IMC_GPIO38
IMC_GPIO39
IMC_GPIO40
IMC_GPIO41
INTEGRATED uC
STRAP PIN 24 HDARST#
H19
H20
H21
F25
IMC_GPIO8
IMC_GPIO9
IMC_PWM0/IMC_GPIO10
SCL2/IMC_GPIO11
SDA2/IMC_GPIO12
SCL3_LV/IMC_GPIO13
SDA3_LV/IMC_GPIO14
IMC_PWM1/IMC_GPIO15
IMC_PWM2/IMC_GPO16
IMC_PWM3/IMC_GPO17
INTEGRATED uC
HDA_BITCLK_CODEC
HDA_BITCLK_MDC
HDA_SDOUT_MDC
HDA_SDOUT_CODEC
HDA_SDIN0
HDA_SDIN1
USB_OC6#/IR_TX1/GEVENT6#
USB_OC5#/IR_TX0/GPM5#
USB_OC4#/IR_RX0/GPM4#
USB_OC3#/IR_RX1/GPM3#
USB_OC2#/GPM2#
USB_OC1#/GPM1#
USB_OC0#/GPM0#
USB OC
30
33
33
30
30
33
B9
B8
A8
A9
E5
F8
E4
HD AUDIO
34 EC_LID_OUT#
27 EXP_CPPE#
25,34 USB_OC#2
32,34 USB_OC#0
C617
2 100P_0402_50V8J
Part 4 of 5
SB700
ACPI / WAKE UP EVENTS
R328
1.2K_0402_5%
+3VS
R311
2 100_0402_5%
+3VS
1
C8
G8
USB_RCOMP
CLK_48M_USB 15
R323
2 11.8K_0402_1%
E6
E7
F7
E8
H11
J10
E11
F11
A11
B11
USB20_P9
USB20_N9
C10
D10
USB20_P8
USB20_N8
G11
H12
USB20_P7
USB20_N7
E12
E14
USB20_P6
USB20_N6
C12
D12
USB20_P5
USB20_N5
B12
A12
USB20_P4
USB20_N4
USB20_P9 32
USB20_N9 32
USB-9 Int Camera
USB20_P8 27
USB20_N8 27
USB-8 WLAN
USB20_P7 32
USB20_N7 32
USB-7 FP
USB20_P6 32
USB20_N6 32
USB-6 Bluetooth
2
USB20_P5 27
USB20_N5 27
USB-5 New Card
USB20_P4 29
USB20_N4 29
USB-4 Card Reader (3 IN 1)
USB20_P2 25
USB20_N2 25
USB-2 USB/eSATA
USB20_P1 32
USB20_N1 32
USB-1 Right side
USB20_P0 32
USB20_N0 32
USB-0 Right side
G12
G14
H14
H15
USB20_P2
USB20_N2
A13
B13
USB20_P1
USB20_N1
B14
A14
USB20_P0
USB20_N0
A18
B18
F21
D21
F19
E20
E21
E19
D19
E18
GPIO16
GPIO17
24
24
STRAP PIN
STRAP PIN
G20
G21
D25
D24
C25
C24
B25
C23
B24
B23
A23
C22
A22
B22
B21
A21
D20
C20
A20
B20
B19
A19
D18
C18
Compal Secret Data
2008-09-25
Issued Date
2009-09-25
Deciphered Date
A
Title

SB700 USB/AC97

Custom
Date:
Rev
1.0
LA-4971P
Sheet

E
21
of
45
U15B
SATA_STX_DRX_P2
SATA_STX_DRX_N2
25 SATA_STX_DRX_P2
25 SATA_STX_DRX_N2
AB12
AC12
AE12
AD12
25 SATA_RXN2_C
25 SATA_RXP2_C
SATA_STX_DRX_P3
SATA_STX_DRX_N3
25 SATA_STX_DRX_P3
25 SATA_STX_DRX_N3
AD13
AE13
AB14
AC14
25 SATA_RXN3_C
25 SATA_RXP3_C
AE14
AD14
AD15
AE15
AB16
AC16
AE16
AD16
R342
1 1K_0402_1%
R343
2 10K_0402_5%
SATA_X1
+3VS
1
1
C516
10P_0402_50V8J 2
Y4
SATA_CAL
V12
SATA_X1
Y12
SATA_X2
AA12
R341
SATA_X2
C517
10P_0402_50V8J 2
35
10M_0402_5%
+1.2V_HT
W11
SATA_LED#
L54
BLM18PG121SN1D_0603 2
C522
1U_0402_6.3V4Z
+3VS
L55
BLM18PG121SN1D_0603
2
+PLLVDD_SATA
1
2
AA11
W12
SATA_TX2P
SATA_TX2N
SATA_RX2N
SATA_RX2P
SATA_TX3P
SATA_TX3N
SATA_RX3N
SATA_RX3P
SATA_TX4P
SATA_TX4N
SATA_RX4N
SATA_RX4P
SATA_RX5N
SATA_RX5P
SATA_CAL
SATA_X1
SPI_DI/GPIO12
SPI_DO/GPIO11
SPI_CLK/GPIO47
SPI_HOLD#/GPIO31
SPI_CS1#/GPIO32
LAN_RST#/GPIO13
ROM_RST#/GPIO14
SATA_X2
FANOUT0/GPIO3
FANOUT1/GPIO48
FANOUT2/GPIO49
SATA_ACT#/GPIO67
PLLVDD_SATA
XTLVDD_SATA
1U_0402_6.3V4Z
1
@
IDE_D0/GPIO15
IDE_D1/GPIO16
IDE_D2/GPIO17
IDE_D3/GPIO18
IDE_D4/GPIO19
IDE_D5/GPIO20
IDE_D6/GPIO21
IDE_D7/GPIO22
IDE_D8/GPIO23
IDE_D9/GPIO24
IDE_D10/GPIO25
IDE_D11/GPIO26
IDE_D12/GPIO27
IDE_D13/GPIO28
IDE_D14/GPIO29
IDE_D15/GPIO30
SATA_TX5P
SATA_TX5N
+XTLVDD_SATA
C524
1U_0402_6.3V4Z
C523
SATA_RX1N
SATA_RX1P
FANIN0/GPIO50
FANIN1/GPIO51
FANIN2/GPIO52
HW MONITOR
25MHz_20pF_6X25000017
SATA_TX1P
SATA_TX1N
ATA 66/100/133
AD11
AE11
IDE_IORDY
IDE_IRQ
IDE_A0
IDE_A1
IDE_A2
IDE_DACK#
IDE_DRQ
IDE_IOR#
IDE_IOW#
IDE_CS1#
IDE_CS3#
Part 2 of 5
SATA_RX0N
SATA_RX0P
SPI ROM
AE10
AD10
25 SATA_RXN1_C
25 SATA_RXP1_C
eSATA
ODD
SATA_STX_DRX_P1
SATA_STX_DRX_N1
25 SATA_STX_DRX_P1
25 SATA_STX_DRX_N1
HDD1
SB700
SATA_TX0P
SATA_TX0N
SERIAL ATA
AB10
AC10
SATA PWR
AD9
AE9
C625
0.1U_0402_16V4Z
TEMP_COMM
TEMPIN0/GPIO61
TEMPIN1/GPIO62
TEMPIN2/GPIO63
TEMPIN3/TALERT#/GPIO64
VIN0/GPIO53
VIN1/GPIO54
VIN2/GPIO55
VIN3/GPIO56
VIN4/GPIO57
VIN5/GPIO58
VIN6/GPIO59
VIN7/GPIO60
AVDD
AVSS
SB700R3@
AA24
AA25
Y22
AB23
Y23
AB24
AD25
AC25
AC24
Y25
Y24
AD24
AD23
AE22
AC22
AD21
AE20
AB20
AD19
AE19
AC20
AD20
AE21
AB22
AD22
AE23
AC23
G6
D2
D1
F4
F3
SLP_CHG#
+3VALW
R571
2 100K_0402_5%
U15
J1
SLP_CHG_M3
R572
2 100K_0402_5%
M8
M5
M7
SLP_CHG_M4
R582
2 100K_0402_5%
P5
P8
R8
C6
B6
A6
A5
B5
SPK_SEL
A4
B4
C4
D4
D5
D6
A7
B7
BT_DET#
SPK_SEL 30
EC_THERM# 34
SLP_CHG# 25
SLP_CHG_M3 25
SLP_CHG_M4 25
+SB_AVDD
F6
1
G7
2
D41
1 CH751H-40PT_SOD323-2
ACIN
R562
2 150K_0402_5%
+3VALW
L56
1 0_0603_5%
+3VALW
34,35,37
BT_DET# 32
C525
0.1U_0402_16V4Z
C526
2.2U_0603_6.3V4Z
Compal Secret Data
2008-09-25
Issued Date
2009-09-25
Deciphered Date
A
Title

SB700 SATA/IDE/SPI

Custom
Date:
Rev
1.0
LA-4971P
Sheet
E
22
of
45
U15E
U15C
@ C528
22U_0805_6.3V6M
@ C531
@ C530
@ C533
@ C536
@ C535
1
1
1
1
1
2
2
2
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
@ C539
@ C541
@ C542
1
1
1
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
SB700
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VDDQ_11
VDDQ_12
Part 3 of 5
CORE S0
L9
M9
T15
U9
U16
U17
V8
W7
Y6
AA4
AB5
AB21
PCI/GPIO I/O
+3VS
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
L15
M12
M14
N13
P12
P14
R11
R15
T16
+1.2V_HT_R
R593
0_0805_5%
SB700
+1.2V_HT
10U_0805_6.3V6M
C529
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
2
2
2
1
1
1
1
C532
C534
C538
C537
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
1
1
C527
C540
T10
U10
U11
U12
V11
V14
W9
Y9
Y11
Y14
Y17
AA9
AB9
AB11
AB13
AB15
AB17
AC8
AD8
AE8
VDD33_18_1
VDD33_18_2
VDD33_18_3
VDD33_18_4
+PCIE_VDDR
L61
1 0_0805_5%
C553
C555
C554
C558
1
1
1
1
C557 1
C560 1
4.7U_0805_10V6K
1
2 @
2
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
P18
P19
P20
P21
R22
R24
R25
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
PCIE_VDDR_1
PCIE_VDDR_2
PCIE_VDDR_3
PCIE_VDDR_4
PCIE_VDDR_5
PCIE_VDDR_6
PCIE_VDDR_7
L63
1 0_0805_5%
2
C566
1
22U_0805_6.3V6M
C567 1
C568 1
2 1U_0402_6.3V4Z
2 1U_0402_6.3V4Z
C571 1
C572 1
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
AA14
AB18
AA15
AA17
AC18
AD17
AE17
AVDD_SATA_1
AVDD_SATA_4
AVDD_SATA_2
AVDD_SATA_3
AVDD_SATA_5
AVDD_SATA_6
AVDD_SATA_7
SATA I/O
+1.2V_HT
+1.2V_HT
+S5_3V
+1.2V_SATA
+1.2V_HT
L21
L22
L24
L25
POWER
A-LINK I/O
C552 2
S5_3.3V_1
S5_3.3V_2
S5_3.3V_3
S5_3.3V_4
S5_3.3V_5
S5_3.3V_6
S5_3.3V_7
3.3V_S5 I/O
A17
A24
B17
J4
J5
L1
L2
R564
0_0805_5%
2 @ C556
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2
2
1
1
C559
C561
1U_0402_6.3V4Z
C562
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
1
1
1
C563
C564
C565
L64
0_0603_5%
1U_0402_6.3V4Z 2
1U_0402_6.3V4Z 2
S5_1.2V_1
S5_1.2V_2
USB_PHY_1.2V_1
USB_PHY_1.2V_2
+3VALW
22U_0805_6.3V6M
+S5_1.2V
CORE S5
+1.2V_HT
CKVDD_1.2V_1
CKVDD_1.2V_2
CKVDD_1.2V_3
CKVDD_1.2V_4
CLKGEN I/O
Y20
AA21
AA22
AE25
+3VS
IDE/FLSH I/O
No IDE device unmount CAP
A15
B15
C14
D8
D9
D11
D13
D14
D15
E15
F12
F14
G9
H9
H17
J9
J11
J12
J14
J15
K10
K12
K14
K15
+1.2VALW
C569
C570
1
1
G2
G4
L65
0_0603_5%
A10
B10
+1.2_USB
+1.2VALW
10U_0805_10V4Z 1
2 @ C573
1U_0402_6.3V4Z
C574
0.1U_0402_16V4Z
C575
AVSS_SATA_1
AVSS_SATA_2
AVSS_SATA_3
AVSS_SATA_4
AVSS_SATA_5
AVSS_SATA_6
AVSS_SATA_7
AVSS_SATA_8
AVSS_SATA_9
AVSS_SATA_10
AVSS_SATA_11
AVSS_SATA_12
AVSS_SATA_13
AVSS_SATA_14
AVSS_SATA_15
AVSS_SATA_16
AVSS_SATA_17
AVSS_SATA_18
AVSS_SATA_19
AVSS_SATA_20
AVSS_USB_1
AVSS_USB_2
AVSS_USB_3
AVSS_USB_4
AVSS_USB_5
AVSS_USB_6
AVSS_USB_7
AVSS_USB_8
AVSS_USB_9
AVSS_USB_10
AVSS_USB_11
AVSS_USB_12
AVSS_USB_13
AVSS_USB_14
AVSS_USB_15
AVSS_USB_16
AVSS_USB_17
AVSS_USB_18
AVSS_USB_19
AVSS_USB_20
AVSS_USB_21
AVSS_USB_22
AVSS_USB_23
AVSS_USB_24
+AVDD_USB
C576 1
C577 1
2 10U_0805_10V4Z
2 10U_0805_10V4Z
C580 1
C581 1
2 1U_0402_6.3V4Z
2 1U_0402_6.3V4Z
C583 1
C582 1
C584 1
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
A16
B16
C16
D16
D17
E17
F15
F17
F18
G15
G17
G18
AVDDTX_0
AVDDTX_1
AVDDTX_2
AVDDTX_3
AVDDTX_4
AVDDTX_5
AVDDRX_0
AVDDRX_1
AVDDRX_2
AVDDRX_3
AVDDRX_4
AVDDRX_5
V5_VREF
AVDDCK_3.3V
PLL
USB I/O
+3VALW
L66
1 0_0805_5%
AVDDCK_1.2V
AVDDC
AE7
+V5_VREF
J16
+AVDDCK_3.3V
K17
+AVDDCK_1.2V
E9
+AVDDC
C578
0.1U_0402_16V4Z
+5VS
D14
2 CH751H-40PT_SOD323-2
+3VS
C579
1U_0603_10V4Z
L67
1 0_0603_5%
2.2U_0603_6.3V4Z
0.1U_0402_16V4Z
SB700R3@
R346
1 1K_0402_5%
H18
J17
J22
K25
M16
M17
M21
P16
F9
+3VALW
C585
C586
SB700R3@
PCIE_CK_VSS_1
PCIE_CK_VSS_2
PCIE_CK_VSS_3
PCIE_CK_VSS_4
PCIE_CK_VSS_5
PCIE_CK_VSS_6
PCIE_CK_VSS_7
PCIE_CK_VSS_8
AVSSC
GROUND
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
PCIE_CK_VSS_9
PCIE_CK_VSS_10
PCIE_CK_VSS_11
PCIE_CK_VSS_12
PCIE_CK_VSS_13
PCIE_CK_VSS_14
PCIE_CK_VSS_15
PCIE_CK_VSS_16
PCIE_CK_VSS_17
PCIE_CK_VSS_18
PCIE_CK_VSS_19
PCIE_CK_VSS_20
PCIE_CK_VSS_21
Part 5 of 5
AVSSCK
A2
A25
B1
D7
F20
G19
H8
K9
K11
K16
L4
L7
L10
L11
L12
L14
L16
M6
M10
M11
M13
M15
N4
N12
N14
P6
P9
P10
P11
P13
P15
R1
R2
R4
R9
R10
R12
R14
T11
T12
T14
U4
U14
V6
Y21
AB1
AB19
AB25
AE1
AE24
P23
R16
R19
T17
U18
U20
V18
V20
V21
W19
W22
W24
W25
L17
+AVDDCK_1.2V
+AVDDCK_3.3V
L68
1 0_0603_5%
2
2.2U_0603_6.3V4Z
0.1U_0402_16V4Z
C587
C588
L69
1 0_0603_5%
2
2.2U_0603_6.3V4Z
1 C589
0.1U_0402_16V4Z
1 C590
+1.2V_HT
+3VS
Compal Secret Data
2008-09-25
Issued Date
2009-09-25
Deciphered Date
A
Title

SB700 Power/GND

Custom
Date:
Rev
1.0
LA-4971P
Sheet

E
23
of
45
REQUIRED STRAPS
NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTC_CLK
PCI_CLK2
PCI_CLK3
PCI_CLK4
PCI_CLK5
LPC_CLK0
LPC_CLK1
RTC_CLK AZ_RST_CD#
BOOTFAIL
TIMER
ENABLED
USE
DEBUG
STRAPS
RESERVED
RESERVED
ENABLE PCI
MEM BOOT
CLKGEN
ENABLED
INTERNAL
RTC
EC
ENABLED
DEFAULT
DEFAULT
DEFAULT
R352
+3VALW
R354
10K_0402_5%
+3VALW
+3VALW
R355
R356
2.2K_0402_5%
2.2K_0402_5%
10K_0402_5%
2
L,L = FWH ROM
R353
@
10K_0402_5%
L,H = LPC ROM (Default)
DEFAULT
1
R351
@
10K_0402_5%
+3VALW
EC
DISABLED
10K_0402_5%
2
R350
@
10K_0402_5%
1
R349
@
10K_0402_5%
+3VALW
R348
@
10K_0402_5%
+3VALW
R347
@
+3VS
+3VS
DEFAULT
H,H = Reserved
H,L = SPI ROM
EXT. RTC
(PD on X1,
apply
32KHz to
RTC_CLK)
DISABLE PCI CLKGEN

DISABLED
MEM BOOT
+3VS
+3VS
IGNORE
DEBUG
STRAPS
GP16
Internal pull up
DEFAULT
BOOTFAIL
TIMER
DISABLED
GP17
PULL
LOW
PULL
HIGH
SI2: mount 2.2K
R358
R360
R361
R362
R363
R364
1
R359
R365
@
2.2K_0402_5%
2
10K_0402_5%
2
2.2K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
R366
@
2.2K_0402_5%
2
R357
PCI_CLK2
PCI_CLK3
PCI_CLK4
PCI_CLK5
CLK_PCI_EC
CLK_PCI_SIO2
RTC_CLK
HDARST#
GPIO17
GPIO16
1
20
20
20
20
20,34
20,33
20
21
21
21
Need to confirm if SB SPI ROM will mount
DEBUG STRAPS
SB700 HAS 15K INTERNAL PU FOR PCI_AD[28:23]
PCI_AD28
PULL
HIGH
3
PULL
LOW
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
USE PCI
PLL
USE ACPI
BCLK
USE IDE
PLL
USE DEFAULT
PCIE STRAPS
RESERVED
DEFAULT
DEFAULT
DEFAULT
DEFAULT
DEFAULT
USE
SHORT
RESET
BYPASS
PCI PLL
BYPASS
ACPI
BCLK
BYPASS IDE
PLL
USE EEPROM
PCIE STRAPS
1
R376
R377
R378
2.2K_0402_5%
2
R375
@
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2
@
2.2K_0402_5%
2.2K_0402_5%
2
R374
R373
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
1
20,28
20,28
20,28
20,28
20,28
20,28
PCI_AD27
USE
LONG
RESET
Compal Secret Data
2008-09-25
Issued Date
2009-09-25
Deciphered Date
A
Title

SB700 STRAPS

Custom
Date:
Rev
1.0
LA-4971P
Sheet
E
24
of
45
< SATA HDD1 Conn >
JHDD
+5VS
< 16" SATA ODD Conn >
1.1A
JODD
1
GND
A+
AGND
BB+
GND
24
23
GND
GND
V33
V33
V33
GND
GND
GND
V5
V5
V5
GND
Reserved
GND
V12
V12
V12
1
2
3
4
5
6
7
SATA_TXP1
SATA_TXN1
C512 1
C513 1
2 0.01U_0402_25V7K
2 0.01U_0402_25V7K
SATA_IRX_DTX_N1
SATA_IRX_DTX_P1
C410 1
C412 1
2 0.01U_0402_25V7K
2 0.01U_0402_25V7K
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
1
2
3
4
5
6
7
GND
A+
AGND
BB+
GND
SATA_STX_DRX_P1 22
SATA_STX_DRX_N1 22
SATA_RXN1_C 22
SATA_RXP1_C 22
+3VS
15
14
SATA_RXN3_C_16
SATA_RXP3_C_16
16inch@ C545
16inch@ C544
1
1
2 0.01U_0402_25V7K SATA_STX_DRX_P3
2 0.01U_0402_25V7K SATA_STX_DRX_N3
1
1
2 0.01U_0402_25V7K
2 0.01U_0402_25V7K
1
C414
10U_0805_10V4Z
1
C415
10U_0805_10V4Z
@
C416
1U_0402_6.3V4Z
C417
0.1U_0402_16V7K
C418
0.1U_0402_16V7K
SATA_RXN3_C
SATA_RXP3_C
Place component's closely ODD CONN.
8
9
10
11
12
13
DP
+5V
+5V
MD
GND
GND
GND
GND
SATA_STX_DRX_P3_16 16inch@ C427

SATA_STX_DRX_N3_16 16inch@ C426
+5VS
+5VS
@
SANTA_206401-1_13P_RV
< 17" SATA ODD Conn >
SANTA_19A202-1_22P_RV-T
+5VS
+5VS
1.2A
JODDB
Place closely JHDD0 SATA CONN.
1
C387
10U_0805_10V4Z
C388
0.1U_0402_16V7K
C389
0.1U_0402_16V7K
1
2
3
4
5
6
7
8
9
10
11
12
GND
GND
C390
0.1U_0402_16V7K
+3VS
SSD HDD need 400mA for 3V(PHISON)
@
C336
@
10U_0805_10V4Z
+3VS rail reserve for SSD
C337
C338
0.1U_0402_16V7K
< eSATA/USB >
C339
@
0.1U_0402_16V7K
1
2
3
4
5
6
7
8
9
10
11
12
13
14
SATA_IRX_DTX_P3
SATA_IRX_DTX_N3
17inch@ C425
17inch@ C424
1
1
2 0.01U_0402_25V7K
2 0.01U_0402_25V7K
SATA_TXN3
SATA_TXP3
17inch@ C519
17inch@ C518
1
1
2 0.01U_0402_25V7K
2 0.01U_0402_25V7K
SATA_RXP3_C 22
SATA_RXN3_C 22
SATA_STX_DRX_N3 22
SATA_STX_DRX_P3 22
0.1U_0402_16V7K
@
E-T_6905-E12N-00R_12P
10/22 Add for USB Sleep & Charge M3/M4

+USB_VCCB
@
+USB_VCCB
14
+USB_VCCB
2
1A
2A
3A
4A
1B
2B
3B
4B
VCC
R960
75K_0402_1%
R963
51K_0402_1%
GND
R961
43K_0402_1%
+USB_VCCB
1.4A
USB20_P2_S_O
USB20_N2_S_O
@ R962 1
2 100_0402_5%
3
6
8
11
W=60mils
U19
1
2
3
4
+5VALW
R964
51K_0402_1%
34 USB_CHG_EN#
GND
IN
IN
EN#
OUT
OUT
OUT
FLG
@ C367 1
8
7
6
5
2 4.7U_0805_10V4Z
R584 1
2 0_0402_5%
USB_OC#2 21,34
G528_SO8
SN74CBT3125CPWR_TSSOP14P
@ C872
1OE#
2OE#
3OE#
4OE#
2
5
9
12
0.1U_0402_16V4Z
USB20_P2_R_U
USB20_N2_R_U
22 SLP_CHG_M4
U47
1
4
10
13
22 SLP_CHG_M3
+3VALW
eSATA/USB Conn
U48
USB20_P2_R_U
USB20_N2_R_U
21
USB20_P2
21
USB20_N2
4
5
1D+
VCC
1D-
2D+
D+
2D-
D-
GND
OE#
10
+USB_VCCB
C873
2 0.1U_0402_16V4Z
SLP_CHG#
USB20_P2_R
USB20_N2_R
W=60mils
1
SLP_CHG# 22

@ R96
C350
C352
C351
@ D15
2
2 0_0402_5%
220U_6.3V_M
0.1U_0402_16V7K
1000P_0402_50V7K
3
PJDLC05_SOT23-3
L46
USB20_P2_R
USB20_N2_R
TS3USB221RSER_QFN10_2x1P5~D
USB20_P2
R97
2 0_0402_5%
USB20_P2_R
USB20_N2
R98
2 0_0402_5%
USB20_N2_R
JESATA
USB20_P2_R_S
USB20_N2_R_S
WCM-2012-900T_0805
1
@ R95
2
0_0402_5%
1
2
3
4
USB20_N2_R_S
USB20_P2_R_S
22 SATA_STX_DRX_P2
22 SATA_STX_DRX_N2
C520 1
C521 1
2 0.01U_0402_25V7K
2 0.01U_0402_25V7K
SATA_TXP2
SATA_TXN2
22 SATA_RXN2_C
22 SATA_RXP2_C
C361 2
C357 2
1 0.01U_0402_25V7K
1 0.01U_0402_25V7K
SATA_RXN2
SATA_RXP2
5
6
7
8
9
10
11
USB
VBUS
DD+
GND
GND
A+
AGND
BB+
GND
ESATA
12
13
14
15
SHIELD
SHIELD
SHIELD
SHIELD
@
FOX_3Q318111-RB133A-8F_11P-T
SLP_CHG_M3
SLP_CHG_M4
Mode 3
HIGH
LOW
Mode 4
LOW
HIGH
SLP_CHG#
FUNCTION
LOW
D=1D
HIGH
D=2D
Compal Secret Data
2008-09-25
Issued Date
2009-09-25
Deciphered Date
A
Title

SATA HDD/ODD/ESATA_USB

Custom
Date:
Rev
1.0
LA-4971P
Sheet
E
25
of
45
Place Close to Chip

CL9 1
2 0.1U_0402_16V7K PCIE_PTX_IRX_P3
20
CL8 1
2 0.1U_0402_16V7K PCIE_PTX_IRX_N3
21
10 PCIE_ITX_C_PRX_N3
16
15 CLK_PCIE_LAN
15 CLK_PCIE_LAN#
17
18
15 CLKREQ_LAN
25
11,14,19,20,27,33,34
RL3
2 2.49K_0402_1%
HSIP
LED0
HSIN
MDIP0
MDIN0
MDIP1
MDIN1
NC
NC
NC
NC
CLKREQB
PERSTB
RSET
26
28
LAN_X1
LAN_X2
RTL8103EL-GR
REFCLK_P
REFCLK_M
46
LAN_WAKE_R#
ISOLATEB
34 LAN_WAKE_R#
LED3/EEDO
LED2/EEDI/AUX
LED1/EESK
EECS
HSON
27
PLT_RST#
1
41
42
23
24
VDDTX
DVDD12
DVDD12
DVDD12
DVDD12
NC
NC
7
14
31
47
+3VS
22
2
3
5
6
8
9
11
12
LAN_MDI0+
LAN_MDI0LAN_MDI1+
LAN_MDI1-
RL2
1
2
2 3.6K_0402_5%
+3V_LAN
CL2
0.1U_0402_16V4Z
CL4
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
CL15
0.1U_0402_16V4Z
VCTRL12
+EVDD12
+EVDD12
+LAN_VDD12
Close to Pin19
2
CL13
1U_0402_6.3V4Z
CL14
1U_0402_6.3V4Z
+LAN_VDD12
29
37
VDD33
VDD33
CL5
+LAN_VDD12
Close to Pin45
+3V_LAN
+3V_LAN
Close to Pin1,37,29
1
40
43
1
RL5
CL3
1 1K_0402_5%
1
44
45
AVDD33
NC
NC
GNDTX
LAN_ACTIVITY#
Close to Pin10,13,30,36
T25 PAD
RL1
39
NC
VCTRL12D
GND
GND
GND
GND
38
19
30
36
13
10
NC
LAN_WAKE_R#
LAN_DO
LAN_DI
LAN_SK_LAN_LINK#
LAN_CS
48
VCTRL12A
CKXTAL1
CKXTAL2
33
34
35
32
NC
LANWAKEB
ISOLATEB
+3V_LAN
@ RL4
2 10K_0402_5%
+LAN_VDD12
HSOP
15
10 PCIE_ITX_C_PRX_P3
UL2
RTL8103EL-GR_LQFP48_7X7
CL10
0.1U_0402_16V4Z
CL11
0.1U_0402_16V4Z
CL12
0.1U_0402_16V4Z
1K_0402_1%
2
YL1
ISOLATEB
RL6
LAN_X1
1
CL17
15K_0402_5%
LAN_X2
25MHz_20pF_6X25000017
27P_0402_50V8J
27P_0402_50V8J
2
2
CL20
0.01U_0402_25V7K
CL21
0.01U_0402_25V7K
LAN_MDI1+
LAN_MDI1-
1
2
3
4
5
6
7
8
CL7
10U_0805_10V4Z
0.1U_0402_16V4Z
10/21 Add CL26, CL27

for customer request
UL3
LAN_MDI0+
LAN_MDI0-
CL6
@
2
Place these components

colsed to LAN chip
Close to Pin48
VCTRL12
CL18
TD+
TDCT
NC
NC
CT
RD+
RD-
TX+
TXCT
NC
NC
CT
RX+
RX-
16
15
14
13
12
11
10
9
RJ45_MIDI0+
RJ45_MIDI0-
RJ45_MIDI1+
RJ45_MIDI1-
CL26
2 1000P_0402_50V8-J
RL8
2 75_0402_1%
CL27
2 1000P_0402_50V8-J
RL9
2 75_0402_1%
RJ45_GND
LFE8456E-R
Add RL11, RL12 for customer request

Change RL7, RL10 from 300 to 150
CL19
68P_0402_50V8J
LAN_ACTIVITY#
2
2
+3V_LAN
RL7
1 150_0402_1%
RL11
1 150_0402_1%
< LAN Conn >

1
11
8
7
RJ45_MIDI1-
6
5
4
CL22
LAN_SK_LAN_LINK#2
+3V_LAN
68P_0402_50V8J
RL10
150_0402_1%
RL12
150_0402_1%
RJ45_MIDI1+
RJ45_MIDI0-
RJ45_MIDI0+
1
10
9
@
RJ45_GND
JLAN
12
Yellow LEDYellow LED+

PR4PR4+
PR2PR3PR3+
PR2+
PR1SHLD2
PR1+
SHLD1
14
13
Green LEDGreen LED+

TYCO_2068888-1_12P-T
CL23
2 1000P_1808_3KV7K
LANGND
1
CL24
0.1U_0402_16V4Z
CL25
4
4.7U_0603_6.3V6K
Compal Secret Data
2008-09-25
Issued Date
2009-09-25
Deciphered Date
A
Title

RTL8103EL 10/100 LAN

Custom
LA-4971P
Date:
Rev
1.0
Sheet
E
26
of
45
< PCIe Mini Card for WLAN >

+1.5VS
+3VS
CM20
WLAN@
CM21
WLAN@
0.01U_0402_25V7K
CM22
WLAN@
2
CM17
WLAN@
0.1U_0402_16V4Z
CM18
WLAN@
4.7U_0805_10V4Z
0.01U_0402_25V7K
CM19
WLAN@
2
0.1U_0402_16V4Z
4.7U_0805_10V4Z
+1.5VS
+3VS
JWLAN
15 CLKREQ_MCARD2#
15 CLK_PCIE_MCARD2#
15 CLK_PCIE_MCARD2
+3VS
E51_TXD
E51_RXD
E51_TXD
E51_RXD
RM6
RM7
E51_TXD_R
E51_RXD_R
2 0_0402_5%
2 0_0402_5%
1
1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
WL_OFF# 34
PLT_RST# 11,14,19,20,26,33,34
PLT_RST#
SMB_CK_CLK1
SMB_CK_DAT1
SMB_CK_CLK1 21
SMB_CK_DAT1 21
USB20_N8
USB20_P8
USB20_N8 21
USB20_P8 21
34
34
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
R969
100K_0402_5%
GND1
GND2
54
FOX_AS0B226-S40N-7F_52P
+1.5VS_CARD
UN1
12
14
+1.5VS
60mils
1.5Vin
1.5Vin
11
13
1.5Vout
1.5Vout
+3VALW
Imax = 0.75A
+1.5VS_CARD
1
EXPCARD@ RN1
EXPCARD@ RN2
2 100K_0402_5%
EXP_CPPE#
2 100K_0402_5%
PLT_RST#
2
4
+3VS
CP_USB#
2 100K_0402_5%
17
+3VALW
share with USB OC PIN

need always pull high
PLT_RST#
19,30,34,36,39,41
6
20
34,36,42 SYSON
EXPCARD@ RN3
SUSP#
EXP_CPPE#
10
CP_USB#
RCLKEN
18
3.3Vin
3.3Vin
3
5
3.3Vout
3.3Vout
AUX_IN
PERST#
STBY#
NC
CPPE#
10U_0805_10V4Z
0.1U_0402_16V4Z
+3VALW_CARD
19
8
+3VS_CARD
PERST#
Imax = 1.35A
16
CN4
EXPCARD@
2
21
Thermal_Pad
CN3
EXPCARD@
GND
CPUSB#
CN6
EXPCARD@
2
40mils
OC#
SHDN#
+3VS_CARD
15
AUX_OUT
SYSRST#
CN5
EXPCARD@
40mils
10U_0805_10V4Z
0.1U_0402_16V4Z
RCLKEN
EXPCARD@ TPS2231MRGPR-2
+3VALW_CARD
Imax = 0.275A
+3VS
+3VS
+3VS
JEXP
CN1
EXPCARD@
@
RN5
RN4
21
21
CN7
@
10K_0402_5%
10K_0402_5%
USB20_N5
USB20_P5
Q21
2N7002_SOT23-3
2
G
3
RCLKEN
B
A
21,34 EC_SWI_R#
+3VALW_CARD
@
Y
G Vcc
8,9,15,21 SMB_CK_CLK0
8,9,15,21 SMB_CK_DAT0
+1.5VS_CARD
CLKREQ#
CP_USB#
0.1U_0402_16V4Z
CLKREQ_NCARD#
CLKREQ_NCARD#
UN2
NC7SZ32P5X_NL_SC70-5
15
SMB_CK_CLK0
SMB_CK_DAT0
EC_SWI_R#
PERST#
+3VS_CARD
21 EXP_CPPE#
15 CLK_PCIE_NCARD#
15 CLK_PCIE_NCARD
CLKREQ#
EXP_CPPE#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
< Reserve for test >
0.1U_0402_16V4Z
31
32
GND
GND
29
30
GND
GND
GND
GND
SANTA_130812-3_LT
@
EXPCARD@
CLKREQ#
GND
USB_DUSB_D+
CPUSB#
RSV
RSV
SMB_CLK
SMB_DATA
+1.5V
+1.5V
WAKE#
+3.3VAUX
PERST#
+3.3V
+3.3V
CLKREQ#
CPPE#
REFCLKREFCLK+
GND
PERn0
PERp0
GND
PETn0
PETp0
GND
CN2
EXPCARD@
10U_0805_10V4Z
RN6
2 0_0402_5%
CLKREQ_NCARD#
/
Compal Secret Data
2008-09-25
Issued Date
2009-09-25
Deciphered Date
A
Title

NEW CARD/WLAN/KS

Custom
Date:
Rev
1.0
LA-4971P
Sheet

E
27
of
45
22K TO 47K PULL-UPS MUST BE PLACED

ON INTA#, PME#, SERIRQ# & CLKRUN#.
+3VS
RB22
2 33K_0402_5%
RB23
2 33K_0402_5%
SERIRQ
RB24
2 33K_0402_5%
PCI_PIRQA#
+S1_VCC
20 PCI_CBE#[0..3]
PCI_AD[0..31]
20,24 PCI_AD[0..31]
PCI_CBE#[0..3]
CLKRUN#
+3VS +5VS
CB11
0.1U_0402_16V4Z
PCMCIA@
CB12
4.7U_0805_10V4Z
PCMCIA@
CB1
0.1U_0402_16V4Z
PCMCIA@
+3VS
10_0402_5%
PCMCIA@ RB16 1
1
2
CB5
10U_0805_10V4Z
PCMCIA@
CB6
0.1U_0402_16V4Z
PCMCIA@
CB7
0.1U_0402_16V4Z
PCMCIA@
CB8
0.1U_0402_16V4Z
PCMCIA@
5
6
7
8
10P_0402_50V8J
+3VS
NOTE: IDSEL SELECTION!
CB9
10U_0805_10V4Z
PCMCIA@
CB10
0.1U_0402_16V4Z
PCMCIA@
1
20
33
CB13
0.1U_0402_16V4Z
PCMCIA@
THIS DEVICE UTILIZES A "SELECTABLE IDSEL" SCHEME.

IDSEL CAN BE CONNECTED INTERNALLY TO ONE OF THREE
PCI AD LINES OR EXTERNAL IDSEL SIGNAL.
2
22K TO 47K PULL-UP & PULL-DOWN RESISTORS ARE

REQUIRED TO BE CONNECTED TO PINS 123 & 124 TO
SELECT ONE OF THE 4 POSSIBLE IDSEL CONNECTIONS.
THE TABLE BELOW SHOWS THE 4 POSSIBLE COMBINATIONS.
CONFIGURING IDSEL TO BE INTERNALLY CONNECTED ALLOWS
FOR A FULL PARALLEL POWER MODE. IF AN EXTERNALLY
CONNECTED IDSEL IS REQUIRED THEN AN INVERTER MUST
BE CONNECTED TO VPP_PGM TO CREATE VPP_VCC.
VPP_PGM
(124)
(123)
IDSEL SELECT
DOWN
AD18
DOWN
UP
AD20
UP
DOWN
AD25
UP
UP
PIN 127 ball F4
DOWN
PCMCIA@ RB17 1
RB19
2 100_0402_5%
PCI_AD20 PCMCIA@ 1
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
IDSEL
PCI_CBE#3
PCI_CBE#2
PCI_CBE#1
PCI_CBE#0
must check IDSEL, PCI_PIRQ#,
PCM_SPK#
30 PCM_SPK#
126
120
20 PCI_RST#
CLKRUN#
CLKRUN# @
51
2
3
20 PCI_REQ#0
20 PCI_GNT#0
20
4
5
6
7
8
9
10
13
14
15
16
17
18
19
21
22
28
29
30
31
34
35
36
37
38
39
40
41
42
43
44
46
127
11
12
49
50
26
27
23
24
25
47
48
20 CLK_PCI_PCM
20 PCI_DEVSEL#
20 PCI_FRAME#
20 PCI_IRDY#
20 PCI_TRDY#
20 PCI_STOP#
20 PCI_PAR
RB20
1 0_0402_5%
CB4
0.1U_0402_16V4Z
PCMCIA@
2 33K_0402_5%
55
54
53
52
1
2
3
4
VCC/VPP +3.3V
VCC/VPP +3.3V
VCC5#
+5V
VCC3#
GND
OZ2210GN-B1_SO8
PCMCIA@
CORE_VCC
CORE_VCC
CORE_VCC
CORE_VCC
VCC5#/VCCD0#/SDATA
VCC3#/VCCD1#/SCLK
VPP_PGM/VPPD0/SLATCH
PCI_VCC
PCI_VCC
PCI_VCC
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
VPP_VCC/VPPD1/IDSEL
C/BE3#
C/BE2#
C/BE1#
C/BE0#
PCI_CLK
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PERR#/SPKR_OUT
REQ#
GNT#
RST#
PME#/RI_OUT#
D10/CAD31
D9/CAD30
D1/CAD29
D8/CAD28
D0/CAD27
A0/CAD26
A1/CAD25
A2/CAD24
A3/CAD23
A4/CAD22
A5/CAD21
A6/CAD20
A25/CAD19
A7/CAD18
A24/CAD17
A17/CAD16
IOW#/CAD15
A9/CAD14
IORD#/CAD13
A11/CAD12
OE#/CAD11
CE2#/CAD10
A10/CAD9
D15/CAD8
D7/CAD7
D13/CAD6
D6/CAD5
D12/CAD4
D5/CAD3
D11/CAD2
D4/CAD1
D3/CAD0
A16/CCLK
A23/CFRAME#
A15/CIRDY#
A22/CTRDY#
A21/CDEVSEL#
A20/CSTOP#
A13/CPAR
A14/CPERR#
WAIT#/CSERR#
INPACK#/CREQ#
WE#/CGNT#
RDY/IREQ#/CINT#
A19/CBLOCK#
WP/CCLKRUN#
RESET/CRST#
D2/RFU
D14/RFU
A18/RFU
VS1/CVS1
VS2/CVS2
CD1#/CCD1#
CD2#/CCD2#
BVD2/LED/CAUDIO
BVD1/STSCHG#/RI#/CSTSCHG
MF6
MF4
MF3
MF0
REG#CCBE3#
A12/CCBE2#
A8/CCBE1#
CE1/CCBE0#
32
45
65
96
128
GND
GND
GND
GND
GND
20,33,34 SERIRQ
20 PCI_PIRQA#
2 33K_0402_5%
UB1
64
77
97
115
CB14
VCC5#
RB21
CB3
4.7U_0805_10V4Z
PCMCIA@
UB2
CLK_PCI_PCM
CB2
4.7U_0805_10V4Z
PCMCIA@
+S1_VCC
IDSEL SELECT POWER-ON-STRAPPING

(SEE NOTE & TABLE FOR OPTIONS)
For EMI
PCMCIA Socket
124
125
123
JPCM
103
102
101
100
99
110
109
108
106
105
104
118
95
94
93
75
73
74
71
72
70
69
68
85
84
82
83
80
81
78
79
76
S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3
107
114
117
116
113
61
58
60
91
89
62
88
59
87
119
98
86
63
57
121
56
122
92
90
S1_A16
S1_A23
S1_A15
S1_A22
S1_A21
S1_A20
S1_A13
S1_A14
S1_WAIT#
S1_INPACK#
S1_WE#
S1_RDY#
S1_A19
S1_WP
S1_RST
S1_D2
S1_D14
S1_A18
S1_VS1
S1_VS2
S1_CD1#
S1_CD2#
S1_BVD2
S1_BVD1
111
112
66
67
S1_REG#
S1_A12
S1_A8
S1_CE1#
S1_D3
S1_CD1#
S1_D4
S1_D11
S1_D5
S1_D12
S1_D6
S1_D13
S1_D7
S1_D14
S1_CE1#
S1_D15
S1_A10
S1_CE2#
S1_OE#
S1_VS1
S1_A11
S1_IORD#
S1_A9
S1_IOWR#
S1_A8
S1_A17
S1_A13
S1_A18
S1_A14
S1_A19
S1_WE#
S1_A20
S1_RDY#
S1_A21
+S1_VCC
RB18
2 33_0402_5%
PCMCIA@ 1
S1_A16_R
S1_A22
S1_A15
S1_A23
S1_A12
S1_A24
S1_A7
S1_A25
S1_A6
S1_VS2
S1_A5
S1_RST
S1_A4
S1_WAIT#
S1_A3
S1_INPACK#
S1_A2
S1_REG#
S1_A1
S1_BVD2
S1_A0
S1_BVD1
S1_D0
S1_D8
S1_D1
S1_D9
S1_D2
S1_D10
S1_WP
S1_CD2#
1
35
2
36
3
37
4
38
5
39
6
40
7
41
8
42
9
43
10
44
11
45
12
46
13
47
14
48
15
49
16
50
17
51
18
52
19
53
20
54
21
55
22
56
23
57
24
58
25
59
26
60
27
61
28
62
29
63
30
64
31
65
32
66
33
67
34
68
PCMCIA@ OZ601TN_TQFP128~D
GND
GND
DATA3
CD1#
DATA4
DATA11
DATA5
DATA12
DATA6
DATA13
DATA7
DATA14
CE1#
DATA15
ADD10
CE2#
OE#
VS1#
ADD11
IORD#
ADD9
IOWR#
ADD8
ADD17
ADD13
ADD18
ADD14
ADD19
WE#
ADD20
READY
ADD21
VCC
VCC
VPP
VPP
ADD16
ADD22
ADD15
ADD23
ADD12
ADD24
ADD7
ADD25
ADD6
VS2#
ADD5
RESET
ADD4
WAIT#
ADD3
INPACK#
ADD2
REG#
ADD1
BVD2
ADD0
BVD1
DATA0
DATA8
DATA1
DATA9 GND
DATA2 GND
DATA10 GND
WP
GND
CD2#
GND
GND
69
70
71
72
@ SANTA_130625-3_LT
Issued Date
Compal Secret Data
2008-09-25
Deciphered Date
2009-09-25
Title
CardBus O2 OZ601
Custom
Date:
Rev
1.0
LA-4971P
Sheet
D
28
of
45
CARD@ 2
CC6
1 0.1U_0402_16V4Z
CARD@ 2
CC4
1 0.1U_0402_16V4Z
CARD@
RC7
0_0402_5%
UC2
+3VS_CR
CC1
CARD@
@ 1
+3VALW
0.1U_0402_16V4Z
21
21
confirm that whether can be removed
RST#_R
MODE SEL
XTLO
XTLI
8
44
45
47
48
USB20_N4
USB20_P4
CR_LED#
4
5
14
AV_PLL
NC
NC
CARD_3V3
D3V3
D3V3
1U_0402_6.3V4Z
USB20_N4
USB20_P4
3V3_IN
RST#
MODE_SEL
XTLO
XTLI
DM
DP
GPIO0
+3VS_CR
RC8
CARD@
1
100K_0402_5%
RST#
CARD@
RC10
1 0_0402_5%
RST#_R
CC8
CARD@
2
2
12
32
CARD@
XTAL_CTR
MS_D5
EEDO
EECS
EESK
SD_CMD
AGND
AGND
43
42
41
40
39
38
37
35
34
31
29
28
27
26
25
23
21
20
19
18
CC7
1U_0402_6.3V4Z
13
24
15
16
17
36
SD_DATA2
SD_DATA3
SD_MS_CLK
MS_DATA3_SD_DATA6
MSCD#
MS_DATA2_SD_DATA7
SD_MS_DATA0
MS_DATA1
MSBS
SD_DATA1
SDCD#
SDWP#
CARD@ 1
RC11
2 22_0402_5%
SDCLK
@ 1
RC18
2 10_0402_5%
CC15
10P_0402_50V8J
CARD@ 1
RC12
2 22_0402_5%
MSCLK
@ 1
RC17
2 10_0402_5%
CC14
10P_0402_50V8J
XTAL_CTR
SDCMD
2
RC14
RC15
CARD@
CARD@
6.19K_0402_1%
CARD@
RTS5159-VDD-GR
0_0402_5%
1
1
CARD@
RC16
0_0402_5%
XD_CLE_SP19
XD_CE#_SP18
XD_ALE_SP17
SD_DAT2/XD_RE#_SP16
SD_DAT3/XD_WE#_SP15
XD_RDY_SP14
SD_DAT4/XD_WP#/MS_D7_SP13
SD_DAT5/XD_D0/MS_D6_SP12
SD_CLK/XD_D1/MS_CLK_SP11
MS_INS#_SP9
XD_D5_SP5
XD_D4/SD_DAT1_SP4
SD_CD#_SP3
SD_WP_SP2
XD_CD#_SP1
EEDI
DGND
DGND
6
46
1
C
CC13
0.1U_0402_16V4Z
10
22
30
RREF
1U_0402_6.3V4Z
MODE SEL
1
VREG
MS_D4
NC
CC5
CARD@
RC4
2 0_0603_5%
+3VS_CR
+VCC_3IN1
RC2
2 0_0603_5%
CARD@ 1
+3VS
1
3
7
9
11
33
< Card Reader LED >

+3VS
< 3 in 1 Card Reader >
JREAD
RC13
CARD@
22
120_0402_5%
DC1
HT-110UYG-CT_YEL/GRN
Vf=2.0V(typ),2.4V(max)
CARD@
CR_LED#
CR_LED: Low when card reader is being accessed.

22
23
SD-WP
SD-DAT1
SD-DAT0
SD-GND
MS-GND
MS-BS
SD-CLK
MS-DAT1
MS-DAT0
SD-VCC
MS-DAT2
SD-GND
MS-INS
MS-DAT3
SD-CMD
MS-SCLK
MS-VCC
SD-DAT3
MS-GND
GND1 SD-DAT2
GND2
SD-CD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
SDWP#
SD_DATA1
SD_MS_DATA0
MSBS
SDCLK
MS_DATA1
SD_MS_DATA0
+VCC_3IN1
MS_DATA2_SD_DATA7
1 CARD@
CC11
MSCD#
MS_DATA3_SD_DATA6
SDCMD
MSCLK
0.1U_0402_16V4Z
1 CARD@
CC10
2
1U_0402_6.3V4Z
SD_DATA3
SD_DATA2
SDCD#
@ TAITW_R009-125-LR_RV
< 48MHz >
Cost-down option
CARD@ 1
15 CLK_48M_CR
CARD@ 1
+3VS_CR
RC19
2 0_0402_5%
RC20
2 0_0402_5%
XTLI
XTAL_CTR
NC
YES
NC
47P
YES
NC
NC
NC
680P
Recommended
YES
Compatible with RTS5158E
< 12MHz >

XTLI
LED ON
A
10K 180P
LED ON
YES
CC12
6P_0402_50V8D
10K 680P
YC1
12MHZ_16P_6X12000012
YES
CC9
6P_0402_50V8D
Description
USB AUTO DE-LINK MS FORMATTER
Compal Secret Data
XTLO
2008-09-25
Issued Date
2009-09-25
Deciphered Date
5
Title

RTS5159 Card Reader

Custom
Date:
Rev
1.0
LA-4971P
Sheet
1
29
of
45
+VDDA
+5VS
+AVDD
+3VS_DVDD
30mil
2
19,27,34,36,39,41
2
3
SUSP#
VIN
VOUT
4.75V
GND
SHDN#
BP
@ CA11
1 0.22U_0402_10V4Z
CA10
1 1U_0402_6.3V4Z
40mil
RA3
1 0_0603_5%
1
CA3
2
@
10U_0805_10V4Z
CA4
10U_0805_10V4Z
CA5
0.1U_0402_16V4Z
CA6
0.1U_0402_16V4Z
100P_0402_50V8J
Int. Mic
Ext. Mic
31
MIC2_L
31
MIC2_R
31
31
15
16
17
CA46 1
2 100P_0402_50V8J
23
CA47 1
2 100P_0402_50V8J
24
MIC1_C_L
21
MIC1_C_R
22
CA14
2 100P_0402_50V8J
CA48 1
2 100P_0402_50V8J
MONO_IN
12
6
10U_0805_10V4Z
CA8
10U_0805_10V4Z
21
10_0402_5%
HDA_SDIN0
RA7
1 33_0402_5%
HDA_SDIN0_R
CA34
10
21 HDA_SYNC_CODEC
@
2
8
11
< EMI require >
21 HDA_SDOUT_CODEC
RA31
DVDD
LINE2-L
LOUT1_L
LINE2-R
LOUT1_R
MIC2_L
LOUT2_L
MIC2_R
LOUT2_R
LINE1_L
SPDIFO1
LINE1_R
SPDIFO2
MIC1_L
HPOUT_L
MIC1_R
HPOUT_R
BEEP_IN
MONO_OUT
BITCLK
DMIC_CLK1/2
SDATA_OUT
DMIC_CLK3/4
SPK_SEL
+3VS
SENSE_A
SENSE_B
RA37
< EMI require >
SDATA_IN
LINE2_VREFO
RESET#
LINE1_VREFO
SYNC
MIC1_VREFO
10P_0402_50V8J
22
31
MUTE#
13
34
MUTE#
RA4
2 0_0402_5%
47
4.7K_0402_5%
21 HDA_RST#_CODEC
0.01U_0402_25V7K
DGND
100P_0402_50V8J
AMP_SPK_L 31
36
AMP_SPK_R 31
39
41
48
45
33
HPL
RA5
2 63.4_0402_1%
HP_L
31
32
HPR
RA6
2 63.4_0402_1%
HP_R
31
37
46
MIC2_VREFO
GPIO0/DMIC_DATA1/2
CPVREF
GPIO1/DMIC_DATA3/4
VREF
SENSE A
JDREF
SENSE B
CBN
EAPD
CBP
CA51
1 1U_0402_6.3V4Z
CA12
1 1U_0402_6.3V4Z
CA16
2 2.2U_0603_6.3V6K
44
+MIC1_VREFO
18
10mil
10mil
28
19
31
27
40
AC_JDREF
30
29
AVSS1
AVSS2
2 CA17
1
RA10
AGND
need to re-link ALC272
CA49
2.2U_0603_6.3V6K
26
42
ALC272-GR_LQFP48
+MIC2_VREFO
AC_VREF
NC
DVSS
DVSS
20
2
4
7
GPIO0-->SPK_SEL HIGH: HARMAN

LOW: NO-BRAND
CA42
CA52
35
43
38
0.1U_0402_16V4Z
21 HDA_BITCLK_CODEC
CA7
DVDD_IO
14
2 100P_0402_50V8J
AVDD2
AVDD1
UA2
25
APL5151-475BC-TRL_SOT23-5
CA45 1
+3VS
CA2
CA53
0.1U_0402_16V4Z
1U_0402_6.3V4Z
CA1
20K_0402_1%
1
1
UA1
CA9
J2
JUMP_43X39
+5VALW
RA1
1 0_0603_5%
CA18
10U_0805_10V4Z
CA19
0.1U_0402_16V4Z
CA50
100P_0402_50V8J
100P_0402_50V8J
A2 version
CA54
2 0.1U_0603_50V7K
CA55
2 0.1U_0603_50V7K
CA56
2 0.1U_0603_50V7K
2 0.1U_0603_50V7K
CA57
RA15
< SENSE_A & SENSE_B, place close to chip >
31
MIC_SENSE
NBA_PLUG
Sense Pin
RA18
2 20K_0402_1%
SENSE_A
RA16
2 5.1K_0402_1%
SENSE_B
MIC@ 1
RA17
2 20K_0402_1%
Impedance
Codec Signals
< MONO_IN SOURCE >
Function
39.2K
PORT-A (PIN 39, 41)
20K
PORT-B (PIN 21, 22)
Ext. MIC
10K
PORT-C (PIN 23, 24)
FM tuner
5.1K
PORT-D (PIN 35, 36)
SPK out
39.2K
PORT-E (PIN 14, 15)
20K
PORT-F (PIN 16, 17)
10K
PORT-H (PIN 37)
EC Beep 34 EC_BEEP
RA8
2 47K_0402_5%
PCI Beep 21
RA9
2 47K_0402_5%
PCMCIA@ 1
RA19
2 47K_0402_5%
CardBus Beep 28
SB_SPKR
PCM_SPK#
CA15
2 0.1U_0402_16V4Z MONO_IN
RA11
10K_0402_5%
SENSE B
5.1K
PORT-I (PIN 32, 33)

A
Int. MIC
2008-09-25
Issued Date
2009-09-25
Deciphered Date
Headphone out
B
CA20
0.1U_0402_16V4Z
4
Compal Secret Data
SENSE A
31
2 0_0603_5%
Title

HD Audio ALC272 Codec

Custom
Date:
Rev
1.0
LA-4971P
Sheet
E
30
of
45
< TPA6017 Medium Range Amplifier >
< Ext. Mic >

+5VS
RA20
1 4.7K_0402_5%
2
1
CA23
10U_0805_10V4Z
CA24
0.1U_0402_16V4Z
CA25
0.1U_0402_16V4Z
16
15
6
30
CA32
0.033U_0402_16V7K LINE_C_OUTL
AMP_SPK_L
1 4.7U_0805_10V4Z
ROUT-
LIN-
18
SPKR+
14
SPKR-
SPKL+
SPKL-
BYPASS
Keep 10 mil width
10
AMP_BYPASS
1
RA30
100K_0402_5%
100K_0402_5%
DA3
PACDN042Y3R_SOT23-3
3
1
MIC@
CA26
1 1U_0402_6.3V4Z
MIC2_L
1 1U_0402_6.3V4Z
CA28
MIC@
MIC2_R
MIC@
RA25
1 1K_0402_5%
1 1K_0402_5%
RA26
MIC@
10
0 15.6
45K
1 21.6
25K
@ JMIC
1
1 NC1
2
2 NC2
INT_MIC
CA27
2 220P_0402_50V7K
@ J3
2
3
4
ACES_85204-0200N_2P
1
JUMP_43X39
close to Codec
2
GND5
GND1
GND2
GND3
GND4
INT_MIC_R 17
close to JMIC
RA29
30
12
SHUTDOWN
CA33
2
0.47U_0603_10V7K
TPA6017A2_TSSOP20
21
20
13
11
1
+MIC1_VREFO
+MIC2_VREFO
LVDSSET@
RA38
2 0_0402_5%
100K_0402_5%
< Speaker Connector >

DA4
PACDN042Y3R_SOT23-3
2
GAIN0 GAIN1 Av(db) Rin(ohm)
1 4.7K_0402_5%
LIN+
RA24
NC
19
MIC@
DA2
2 CH751H-40PT_SOD323-2
30
MUTE#
RA23
1 4.7K_0402_5%
RIN-
LOUT-
30
+MIC1_VREFO
MIC1_L
MIC1_R
1 1K_0402_5%
RA22
LOUT+
5
CA22 2
GAIN0
ROUT+
CA31
0.033U_0402_16V7K
MIC1_C_R
100K_0402_5%
RIN+
GAIN1
17
30
DA1
2 CH751H-40PT_SOD323-2
RA21
1 1K_0402_5%
RA28
CA30
0.033U_0402_16V7K LINE_C_OUTR
AMP_SPK_R
1
7
1 4.7U_0805_10V4Z
30
RA27
VDD
PVDD1
PVDD2
CA29
0.033U_0402_16V7K
CA21 2
< Int. Mic >
+5VS
UA3
MIC1_C_L
10 dB
1
30
90K
1
3
70K
JSPK
SPKL+
SPKLSPKR+
SPKR-
LA3 1
LA4 1
LA5 1
LA6 1
SPK_L1
SPK_L2
SPK_R1
SPK_R2
2 FBMA-L11-160808-800LMT_0603
2 FBMA-L11-160808-800LMT_0603
2 FBMA-L11-160808-800LMT_0603
2 FBMA-L11-160808-800LMT_0603
1
2
3
4
@
1
2
3
4
ACES_85204-0400N_4P
1
2
< Volume Control >
DA5
PACDN042Y3R_SOT23-3
+3VS
< HeadPhone JACK >
RA32
1
CA43
0.1U_0402_16V4Z
100K_0402_5%
+3VS
0.01U_0402_25V7K
30
HP_R
LA7 1
2 KC FBM-L11-160808-121LMT 0603
HP_R_L
30
HP_L
LA8 1
2 KC FBM-L11-160808-121LMT 0603
HP_L_L
3
6
2
1
@
FOX_JA6333L-B3T0-7F
3
1
+3VS
UA4
@ DA6
PACDN042Y3R_SOT23-3
74LVC1G14GW_SOT353-5
UA5
1
2
3
4
5
6
7
RA36
2 10K_0402_5%
CA37
SW_XRE094_3P
5
P
RA35
2 10K_0402_5%
DIP
COM
CA36
0.1U_0402_16V4Z
JLINE
< EMI require >
NBA_PLUG
CA35
0.1U_0402_16V4Z
2
1
10K_0402_5%
NC
RA34
10K_0402_5%
RA33
DIP
SW2
+3VS
30
CA38
0.01U_0402_25V7K
CD1#
D1
CP1
SD1#
Q1
Q1#
GND
VCC
CD2#
D2
CP2
SD2#
Q2
Q2#
< Ext.MIC/LINE IN JACK >
14
13
12
11
10
09
08
1
CA44
1
74LCX74MTC_TSSOP14
CA39
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
30
JEXMIC
< EMI require >
5
4
MIC_SENSE
MIC1_R LA9
2 KC FBM-L11-160808-121LMT 0603
MIC1_L_R
MIC1_L LA10 1
2 KC FBM-L11-160808-121LMT 0603
MIC1_L_L
3
6
2
1
ENCODER_DIR 34
ENCODER_PULSE 34
@
3
1
2
@ DA7
PACDN042Y3R_SOT23-3
/
2008-09-25
2009-09-25
Deciphered Date
A
CA40
100P_0402_50V8J @
FOX_JA6333L-B3T0-7F
4
CA41
100P_0402_50V8J
Compal Secret Data
Issued Date
Title

AMP/Audio Jack/HP/SPEAKER/VR

Custom
Date:
Rev
1.0
LA-4971P
Sheet
E
31
of
45
< USB Right-side Board, USB port 0,1 >

+USB_VCCA
2
BT@
2 0_0402_5%
USB_OC#0 21,34
G528_SO8
34
0.1U_0402_16V7K
R441
2 47K_0402_5%
BT@ 1
BT_PWR#
BT@
1
>
t
s
e
u
q
e
r
I
M
E
r
o
f
e
v
r
e
s
e
R
<
C196
+BT_VCC
Inrush current = 0A
1
2
3
4
5
6
7
8
9
10
11
12
13
14
21
USB20_P0
USB20_N0_R
USB20_P0_R
3
USB20_N1_R
USB20_P1_R
WCM-2012-900T_0805
@ R108
0_0402_5%
@ R109
0_0402_5%
2
< Bluetooth Connector >
JBT
12
11
21
21
34
BT@ 1
BT_RST#
R440
2 0_0402_5%
BT_RESET#
E-T_6905-E12N-00R_12P
USB20_P6
USB20_N6
22
+BT_VCC
BT_DET#
(MAX=200mA)
+3VS
C483
C479
R437 1
C480
2 0_0402_5%
R438 1
BT@
0.1U_0402_16V4Z
USB20_N1
21
USB20_P1
R439
10
9
8
7
6
5
4
3
2
1
ACES_87213-1000G_10P
2
BT@
2
4.7U_0805_10V4Z
0.1U_0402_16V4Z
4.7K_0402_5%
L51
21
2 4.7K_0402_5%
BT@
GND2
GND1
10
9
8
7
6
5
4
3
2
1
USB20_P6
USB20_N6
BT@
1
2
3
4
5
6
7
8
9
10
11
12
GND
GND
USB20_N0
JUSBB
W=60mils
L50
21
Q25
AO3413_SOT23
0.01U_0402_25V7K
+USB_VCCA
1
0.1U_0402_16V4Z
BT@
2
1
@ R107
0_0402_5%
2
C482
BT@
100K_0402_5%
R422 1
C481
OUT
OUT
OUT
FLG
+3VS
R432
GND
IN
IN
EN#
2 4.7U_0805_10V4Z
USB_EN#
USB_EN#
C438 1
34
+3VS
W=60mils
8
7
6
5
1.4A
U25
1
2
3
4
+5VALW
< BlueTooth Interface, USB port6 >
2
3
WCM-2012-900T_0805
@ R110
0_0402_5%
< Int. Camera, USB port 9 >

+5VS
CAM@
R430
2 0_0603_5%
+5VALW
R428
2 0_0603_5%
LVDSSET@
W=20mils
+CAM_VDD
R20 close to JCAM
R20
2 0_0402_5%
USB20_N9_R_CAM 17
< EMI require >
1
CAM@
3
C744
0.1U_0402_16V4Z
JCAM
1
2
3
4
5
GND1
GND2
@
1
2
3
4
5
6
7
R103 1
CAM@ L60
1
1
USB20_N9_R
USB20_P9_R
0_0402_5%
3
2
3
USB20_N9 21
USB20_P9 21
WCM-2012-900T_0805
ACES_88266-05001_5P
R99
0_0402_5%
R18
2 0_0402_5%
LVDSSET@
USB20_P9_R_CAM 17
R18 close to JCAM
< Finger Printer, USB port 7 >
FP@ 1
+3VS
R119
2 0_0603_5%
+3VS_FP
C468
2 0.1U_0402_16V4Z
FP@ 1
JFP
21
21
USB20_N7
USB20_P7
USB20_N7
USB20_P7
FP@
R118 1
2 0_0603_5%
1
2
3
4
1
2
3 GND
4 GND
5
6
@ ACES_85201-04051
/
Compal Secret Data
2008-09-25
Issued Date
2009-09-25
Deciphered Date
A
Title

USB/BT/FingerPrint

Custom
Date:
Rev
1.0
LA-4971P
Sheet

E
32
of
45
>
1
*
b
M
8
h
s
a
l
F
I
P
S
<
< MDC 1.5 Conn >

+3VL
U46
20mils
8
1
C786
C607
@
2
C608
10P_0402_50V8J
0.1U_0402_16V4Z
10P_0402_50V8J
SPI_CS#
34 SPI_CS#
34
EC_SPICLK 6
SPI_CLK
34 EC_SO_SPI_SI
VCC
VSS
W
HOLD
S
C
EC_SI_SPI_SO 34
JMDC
MX25L8005M2C-15G
21 HDA_SDOUT_MDC
R518
2 10_0402_5% 1
C606
2 10P_0402_50V8J
21 HDA_SYNC_MDC
21 HDA_SDIN1
21 HDA_RST#_MDC
MDC@
R495 1
2 33_0402_5%
1
HDA_SDOUT_MDC 3
5
HDA_SYNC_MDC 7
HDA_SDIN1_MDC 9
11
GND1
RES0
IAC_SDATA_OUT
RES1
GND2
3.3V
IAC_SYNC
GND3
IAC_SDATA_IN
GND4
IAC_RESET#
IAC_BITCLK
2
4
6
8
10
12
+3VALW
+3VALW
HDA_BITCLK_MDC
21
EC_SPICLK 1
GND
GND
GND
GND
GND
GND
R496
20,34
LPC_AD3
20,34
LPC_AD1
5
4
PLT_RST#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
LPC_FRAME#
2
10P_0402_50V8J
10
+3VALW
PLT_RST# 11,14,19,20,26,27,34
LPC_AD2 20,34
LPC_AD0 20,34
CLK_PCI_SIO2
MDC@
C778
1000P_0402_50V7K
MDC@
C779
0.1U_0402_16V4Z
MDC@
C780
4.7U_0805_10V4Z
20,24
20,34 LPC_FRAME#
C777
H1
R622
2 0_0402_5%
2
@
1
6
SERIRQ
20,28,34 SERIRQ
ACES_88018-124G_12P
Connector for MDC Rev1.5
Please place the PAD under DDR DIMM.

+3VS
10_0402_5%
13
14
15
16
17
18
< LPC Debug Port >
R634
@
DEBUG_PAD
1
22_0402_5%
2
C639
22P_0402_50V8J
< KEYBOARD CONN 16" >

JKB1
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
< KEYBOARD CONN 17" >
R502
1
JKB2
2
+3VS
KSO16
300_0402_5%
KSO17
KSO2
KSO1
KSO0
KSO4
KSO3
KSO5
KSO14
KSO6
KSO7
KSO13
KSO8
KSO9
KSO10
KSO11
KSO12
KSO15
KSI7
KSI2
KSI3
KSI4
KSI0
KSI5
KSI6
KSI1
C781
0.1U_0402_16V4Z
C782
0.1U_0402_16V4Z
< For EMI >
R509
2
CAPS_LED# 34
< For EMI >
+3VS
300_0402_5%
NUM_LED# 34
@ ACES_88170-3400_34P
C783
0.1U_0402_16V4Z
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
KSO16
KSO17
KSO2
KSO1
KSO0
KSO4
KSO3
KSO5
KSO14
KSO6
KSO7
KSO13
KSO8
KSO9
KSO10
KSO11
KSO12
KSO15
KSI7
KSI2
KSI3
KSI4
KSI0
KSI5
KSI6
KSI1
KSO2
KSO1
KSO0
KSO4
KSO3
KSO5
KSO14
KSO6
KSO7
KSO13
KSO8
KSO9
KSO10
KSO11
KSO12
KSO15
KSI7
KSI2
KSI3
KSI4
KSI0
KSI5
KSI6
KSI1
CAPS_LED#
NUM_LED#
C725
C717
C721
C609
C724
C728
C730
C715
C732
C733
C740
C737
C729
C738
C718
C736
C716
C741
C726
C723
C731
C739
C735
C734
C722
C714
KSO16
KSO17
C870 1
C871 1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
2 100P_0402_50V8J
2 100P_0402_50V8J
CAPS_LED#
NUM_LED#
@ ACES_88170-3400_34P
KSI[0..7]
KSO[0..17]
KSI[0..7]
34,35
/
KSO[0..17] 34,35
Compal Secret Data
2008-09-25
Issued Date
2009-09-25
Deciphered Date
A
Title

SPI/LPC/PS2/MDC/FM/CIR

Custom
Date:
Rev
1.0
LA-4971P
Sheet
E
33
of
45
+3VL
+3VL_EC
L25
1 0_0603_5%
VCC
VCC
VCC
VCC
VCC
VCC
U33
67
9
22
33
96
111
125
21
GATEA20
21
KB_RST#
20,28,33 SERIRQ
20,33 LPC_FRAME#
20,33 LPC_AD3
20,33 LPC_AD2
20,33 LPC_AD1
20,33 LPC_AD0

1
@ R530
2 33_0402_5%
20,24 CLK_PCI_EC
11,14,19,20,26,27,33
2 47K_0402_5%
PLT_RST#
21
EC_SCI#
35 WL_BT_LED#
33,35
KSI[0..7]
KSO[0..17]
KSO[0..17]
2 2.2K_0402_5%
R326 1
2 2.2K_0402_5%
EC_SMB_DA1
R70
2 2.2K_0402_5%
EC_SMB_CK1
R77
2 2.2K_0402_5%
CEC_INT#
R563 2
1 100K_0402_5%
TP_CLK
R534 1
2 4.7K_0402_5%
TP_DATA
R535 1
SYSON
R539 1
+3VS
18,38 EC_SMB_CK1
18,38 EC_SMB_DA1
6,19,35 EC_SMB_CK2
6,19,35 EC_SMB_DA2
+3VL
21
21
21
35
PM_SLP_S3#
PM_SLP_S5#
EC_SMI#
LID_SW#
2 10K_0402_5%
R536 1
2 10K_0402_5%
R538 2
1 100K_0402_5%
+3VALW
1 100K_0402_5%
+3VL
E51_TXD
E51_RXD
ON/OFFBTN#
PWR_SUSP_LED#
NUM_LED#
C813
2 15P_0402_50V8J
CRY1
Y7
KSO2
R947
R948
NC
NC
OSC
+3VL_EC
GM@ 1
UMA_ENBKL 11
+3VL_EC
PM@ 1
R683
2 0_0402_5%
VGA_ENBKL 19
2 0_0603_5%
1 D33
1
C805
0.1U_0402_16V4Z
63
64
65
66
75
76
BATT_TEMPA
INVT_PWM 17
EC_BEEP 30
ACOFF
ACOFF 39
BATT_TEMPA 38
39
68
70
71
72
EN_DFAN1
IREF
CHGVADJ
83
84
85
86
87
88
ENCODER_DIR
ENCODER_PULSE
TP_CLK
TP_DATA
97
98
99
109
100
101
102
103
104
105
106
107
108
110
112
114
115
116
117
118
L81
BT_RST#
WOL_EN#
USB_OC#2
USB_CHG_EN# 25
USB_EN# 32
ENCODER_DIR 31
ENCODER_PULSE 31
TP_CLK 35
TP_DATA 35
BT_RST# 32
WOL_EN# 36
USB_OC#2 21,25
VGATE 43
EC_SI_SPI_SO 33
EC_SO_SPI_SI 33
SPI_CLK 33
SPI_CS# 33
CEC_INT#
FSTCHG
BATT_FULL_LED#
BATT_LOW_LED#
PWR_ON_LED#
SYSON
VR_ON
ACIN_D
EC_RSMRST#
EC_SWI#
SB_PWRGD
BKOFF#
WL_OFF#
VR_ON
C807
1000P_0402_50V7K
43
R541
1 10K_0402_5%
2
EC_RSMRST# 21
EC_LID_OUT# 21
EC_ON 35,36
SB_PWRGD 21,43
BKOFF# 17
WL_OFF# 27
HDPINT 35
HDPACT 35
ENBKL
HDPLOC
HDPLOC 35
EC_THERM# 22
SUSP# 19,27,30,36,39,41
PBTN_OUT# 21
SUSP#
PBTN_OUT#
LAN_WAKE#
124 C814 2
CEC_INT# 18
FSTCHG 39
BATT_FULL_LED# 35
CAPS_LED# 33
BATT_LOW_LED# 35
PWR_ON_LED# 35
SYSON 27,36,42
1 4.7U_0805_10V4Z
1 0_0603_5%
39
DAC_BRIG 17
EN_DFAN1 4
IREF
39
CHGVADJ 39
119
120
126
128
73
74
89
90
91
92
93
95
121
127
ADP_I
C154
2 0.22U_0603_16V4Z
KB926QFD3_LQFP128_14X14
1
C806
0.1U_0402_16V4Z
R145
2 100K_0402_5%
1
ADP_V
C812
2 100P_0402_50V8J ECAGND
LAN_WAKE#
@ R24
0_0402_5%
LAN_WAKE_R#
EC_SWI#
@ R33
0_0402_5%
EC_SWI_R#
LAN_WAKE_R#
R34
0_0402_5%
EC_SWI_R#
LAN_WAKE#
R35
0_0402_5%
LAN_WAKE_R# 26
EC_SWI_R#
21,27
USB_OC#0 21,32
1
C808
0.1U_0402_16V4Z
C809
1000P_0402_50V7K
4
+3VL
ACIN
22,35,37
C326
1 100P_0402_50V8J
PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPXID3
GPXID4
GPXID5
GPXID6
GPXID7
GPI
C816
0.1U_0402_16V4Z
Compal Secret Data
2008-09-25
Issued Date
2
EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
BKOFF#/GPXO08
WL_OFF#/GPXO09
GPXO10
GPXO11
V18R
R684
2 0_0402_5%
R560
2 150K_0402_5%
GPO
XCLK1
XCLK0
CRY2
L80
SPIDI/RD#
SPIDO/WR#
SPICLK/GPIO58
SPICS#
CIR_RX/GPIO40
CIR_RLC_TX/GPIO41
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
BATT_LOW_LED#/GPIO54
SUSP_LED#/GPIO55
SYSON/GPIO56
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59
SM Bus
1 47K_0402_5%
ACIN_D
SPI Flash ROM
PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
GPIO
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A
+EC_AVCC
SDICS#/GPXOA00
SDICLK/GPXOA01
SDIDO/GPXOA02
SDIDI/GPXID0
INVT_PWM
SPI Device Interface
GPIO
R545
20M_0402_5%
32.768KHZ_12.5PF_9H03200413
C815
1
2 15P_0402_50V8J
1 47K_0402_5%
122
123
SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47
PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C
PSDAT2/GPIO4D
TP_CLK/PSCLK3/GPIO4E
TP_DATA/PSDAT3/GPIO4F
PS2 Interface
OSC
Add for KB926D2 issue. Please refer to KB926D-AN1-100 for detail
ENBKL
DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3E
DA3/GPIO3F
DA Output
KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25 Int. K/B
KSO6/GPIO26 Matrix
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49
KSO1
6
14
15
16
17
18
19
25
28
29
30
31
32
34
36
FAN_SPEED1
4 FAN_SPEED1
36 VLDT_EN
27 E51_TXD
27 E51_RXD
35 ON/OFFBTN#
35 PWR_SUSP_LED#
33 NUM_LED#
LID_SW#
PM_SLP_S3#
PM_SLP_S5#
EC_SMI#
LID_SW#
BT_PWR#
32 BT_PWR#
2 4.7K_0402_5%
SUSP#
R513
77
78
79
80
+5VS
ON/OFFBTN#
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
AD Input
R330 1
EC_SMB_CK2
55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82
BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
AD3/GPIO3B
AD4/GPIO42
SELIO2#/AD5/GPIO43
MISC
PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D
0.1U_0402_16V4Z
33,35 KSI[0..7]
EC_SMB_DA2
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
PWM Output
21
23
26
27
AGND
12
13
37
20
38
INVT_PWM/PWM1/GPIO0F
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
ACOFF/FANPWM2/GPIO13
69
CLK_PCI_EC
PLT_RST#
ECRST#
EC_SCI#
WL_BT_LED#
GA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1
LAD0 LPC &
ECAGND
C811
1
2
3
4
5
7
8
10
GND
GND
GND
GND
GND
+3VL
R533 1
GATEA20
KB_RST#
SERIRQ
LPC_LFRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
11
24
35
94
113
@ C810
2 15P_0402_50V8J1
+EC_AVCC
AVCC
2009-09-25
Deciphered Date
B
Title

ENE KB926C

Custom
Date:
Rev
1.0
LA-4971P
Sheet
E
34
of
45
< Power Button for Debug >
< G - Sensor >
< Screw Hole >
debug phase using
H15
H16
H17
H18
H19
H20
G@
ON/OFFBTN# 34
H_3P0
@
H_3P0
@
H_3P0
@
H23
H24
H25
1U_0402_6.3V4Z
G@
UG3
H_3P0
@
H_3P0
@
H_3P0
@
6
5
H_3P0
@
SHDN#
1U_0402_6.3V4Z
OUT
GND
+5VS
IN
H26
2
H_3P0
@
CG13
G@
1
SMT1-05-A_4P
H_3P0
@
+3VS_HDP
DG1
2 CH751H-40PT_SOD323-2
1
H22
+3VS_HDP
CG12
4
H21
0_0603_5%
G@
H_3P0
@
H_3P0
@
H_3P0
@
ON/OFFBTN#
SW5
@
1
TOP side
@ R689 2
+3VS
+5VS
CG14
1 0.22U_0402_10V4Z
@ 2
BYP
G9191-330T1U_SOT23-5
H33
H_3P2
@
H36
H32
H_3P2
@
H37
H_3P7
@
H31
H_3P1N
@
H35
SELF_TEST
H_3P7
@
4
6
8
H39
H40
H41
H42
+3VS_HDP
H47
H_3P0
@
CG649
0.1U_0402_16V4Z
VOUTX
G_2nd@
CG642
0.1U_0402_16V4Z
VOUTY
G_2nd@
CG641
0.1U_0402_16V4Z
G_2nd@ UG4
2
XOUT
3
VOUTZ
0G-DET
@
7
10
13
SELF_TEST
SLEEP#
G-SELECT
ST
+3VS_HDP
1
8
11
12
14
NC
NC
NC
NC
NC
ZOUT
FD4
+3VS_HDP
VDD
YOUT
9
@
2
G
1
FD3
G_2nd@
VSS
MMA7360LR2_LGA14
R515
2 120_0402_5%
MDC:
H30, H31
@
@
VGA:
H38, H39
CPU:
H32, H33, H34, H35
Mini Card :
H36, H37
Others:
H15, H16, H17, H18, H19, H20, H21, H22,
H23, H24, H25, H26, H27, H28, H29, H40, H47
22,34,37
ACIN
D54
FD2
FD1
< DC-IN LED >
1
13
GND1
GND2
H_3P0
@
H_3P0N
@
H_3P1X4P1N
@
H_3P7
@
PCB Fedical Mark PAD
+3VALW
2 0.033U_0402_16V7K
2 0.033U_0402_16V7K
2 0.033U_0402_16V7K
1
1
1
TSH35TR_LGA16
10K_0402_5%
G_1st@ CG1
G_1st@ CG2
G_1st@ CG3
10
11
14
15
16
NC1
NC2
NC3
NC4
NC5
Rev
VOUTX
VOUTY
VOUTZ
3
5
7
Voutx
Vouty
Voutz
ST
PD
FS
H_3P7
@
2N7002_SOT23-3
G_1st@ UG1
2
Vdd1
12
Vdd2
+3VS_HDP
H38
H_3P7
@
H_3P7
@
H_3P7
@
H_3P7
@
Q19
R514
H34
H30
37
2
G
3
EC_ON
51_ON#
34,36
H_3P0
@
H_3P0
@
H29
H28
H27
< LID Switch >
C645
17inch@
0.1U_0402_16V4Z
VOUT
17inch@ C647
10P_0402_50V8J
LID_SW#
1
SELF_TEST
34
G@ RG3
1 4.7K_0402_5% 3
G@ RG4
1 4.7K_0402_5% 4
5
Remove WiMAX LED control circuit
C646
GND
+3VS_HDP
16inch@ U36
APX9132ATI-TRL_SOT23-3
VDD
+3VALW
16inch@
0.1U_0402_16V4Z
VOUT
G@ RG5
1 4.7K_0402_5% 6
7
1
16inch@ C648
10P_0402_50V8J
1
2
G@
CG7
0.1U_0402_16V4Z
34
G@
CG8
2
0.1U_0402_16V4Z
HDPINT
HDPINT 2
G@ RG6
1 4.7K_0402_5% 8
G@ RG7
1 1K_0402_5%
9
10
< HDD LED >
P3_5/SSCK/SCL/CMP1_2
P1_6/CLK0/SSI01
P3_7/CNTR0#/SSO/TXD1
P1_5/RXD0/CNTR01/INT11#
RESET#
P1_4/TXD0
11
G@
12
RG9
47K_0402_5%
1
VDD
6,19,34 EC_SMB_CK2
34
13
HDPLOC
34
G@ UG2
17inch@ U34
APX9132ATI-TRL_SOT23-3
GND
+3VALW
Vf=2.0V (typ), 2.4 V (max), If = 30mA (max)
HDPACT
XOUT/P4_7
P1_3/KI3#/AN11/TZOUT
VSS/AVSS
P1_2/KI2#/AN10/CMP0_2
XIN/P4_6
P4_2/VREF
VCC/AVCC
14
G@
VOUTZ
15
RG10
47K_0402_5%
1
2N7002_SOT23-3
Q20
16
+3VS_HDP
1
VOUTX G@
17
2
MODE
P4_5/INT0#/RXD1
P3_3/TCIN/INT3#/SSI00/CMP1_0
P1_7/CNTR00/INT10#
P3_4/SCS#/SDA/CMP1_1
CG6
0.1U_0402_16V4Z
VOUTY
18
19
20
EC_SMB_DA2 6,19,34
R5F211B4D31SP-PLSP0020JB-A
SATA_LED# 22
R546
1 10K_0402_5%
6
5
+3VS
+3VS
R548
2 120_0402_5% 2
D46
< Touch/B Connector >
< EMI reserve >
1
Q18A
2N7002DW-T/R7_SOT363-6
+5VALW
4
Q18B
2N7002DW-T/R7_SOT363-6
< WL&BT LED >
C199 1
2 0.22U_0603_16V4Z
C200 1
2 0.22U_0603_16V4Z
C201 1
2 0.22U_0603_16V4Z
C202 1
2 0.22U_0603_16V4Z
C203 1
2 0.22U_0603_16V4Z
1.C199 : U19
2.C200 : PU5
3.Top side of PU12 for noise bounce.
4.C202 : U25
5.C203 : PU9
1.U25
2.Botton side of JWLAN for keep noise return path.
5.U19
WLAN@ D50
+3VS
WLAN@ 1
R550
2 120_0402_5%
WL_BT_LED# 34
HT-110UD_1204_AMBER
< BATT CHARGE/FULL LED >

D70
< POWER-ON & SUSPEND LED >
+3VALW
R773
2 120_0402_5%
< Ultra Bright Amber >
+3VALW
R770 1
2 120_0402_5%
BATT_LOW_LED# 34
< Ultra Bright Amber >
PWR_ON_LED#
PWR_SUSP_LED#
< Ultra Bright Yellow Green >
34
HT-210UD/UYG_AMB/GRN
Vf=1.9V(typ),2.4V(max) for amber

Vf=2.0V(typ),2.4V(max) for green
If=30mA(max)
< Ultra Bright Yellow Green >
34
34
1
2
3
4
TP_CLK
TP_DATA
1
2
3
4
< SW/B Connector >

JPOWER
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
GND
12
GND
C686
2 220P_0402_50V7K
EC_REVBTN#
C699
2 220P_0402_50V7K
EC_FRDBTN#
C702
2 220P_0402_50V7K
EC_PLAYBTN# @
C705
2 220P_0402_50V7K
EC_MUTEBTN# @
C708
2 220P_0402_50V7K
JPWR1
ON/OFFBTN#
KSO0
EC_PLAYBTN#
EC_REVBTN#
EC_FRDBTN#
EC_MUTEBTN#
KSO0
KSI1
KSI3
KSI5
KSI2
2009-09-25
Deciphered Date
C
ACES_85201-0405N_4P
@ ACES_85201-1005N_10P
2008-09-25
Issued Date
ON/OFFBTN#
JTOUCH
1
2
3
4
5
6
7
8
9
10
GND
GND
33,34
33,34
33,34
33,34
33,34
1
2
3
4
5
6
7
8
9
10
11
12
ON/OFFBTN#
KSO0
EC_PLAYBTN#
EC_REVBTN#
EC_FRDBTN#
EC_MUTEBTN#
4
@ ACES_88514-104N
Compal Secret Data
34
HT-210UD/UYG_AMB/GRN
BATT_FULL_LED# 34
D68
< For EMI >
+5VS
Title

LED/LID/PB/FB/SCREW HOLE

Custom
Date:
Rev
1.0
LA-4971P
Sheet
E
35
of
45
< +5VALW TO +5VS >
< close to PQ20, must EMI confirm >
< +1.8V TO +1.8VS >
+5VALW
+1.8V
+5VALW
8
7
6
5
C864
1
2
3
4
S
S
S
G
C833
C835
Q4
IRF8736TRPBF_SO8
C204
8
7
6
5
0.1U_0402_16V7K
RUNON
2
SI4800BDY_SO8
1U_0402_6.3V4Z
4.7U_0805_10V4Z
+3VS
2
4.7U_0805_10V4Z
Inrush current = 0A
1
2
3
C842
C848
1U_0402_6.3V4Z
C841
10U_0805_10V4Z
4.7U_0805_10V4Z
1.8VS_ENABLE
R138
750K_0402_1%
+VSB
R809
10M_0402_5%
C849
SUSP
2
G
Q13
2N7002_SOT23-3
0.01U_0402_25V7K
S
< close to PQ20, must EMI confirm >
< +3VALW TO +3VS >
D
D
D
D
Inrush current = 0A
Q35
+1.8VS
+5VS
+3VS
+3VS
Q14
8
7
6
5
1
C840
4.7U_0805_10V4Z
D
D
D
D
S
S
S
G
Inrush current = 0A
1
2
3
4
SI4800BDY_SO8
C839
1U_0402_6.3V4Z
C197
< +1.2VALW TO +1.2V_HT >
0.1U_0402_16V7K
C838
+1.2VALW
4.7U_0805_10V4Z
RUNON
R152
1 750K_0402_1%
8
7
6
5
+VSB
10M_0402_5%
3
0.01U_0402_25V7K
2
G
Q17
2N7002_SOT23-3
C847
SUSP
1
1
C862
4.7U_0805_10V4Z
1K_0402_5%
2
1
R808
10M_0402_5%
< +3VALW TO +3V_LAN >

+3VALW
1U_0402_6.3V4Z
C876
470U_D2E_2.5VM_R9M
R367
4.7U_0805_10V4Z
+3VALW
C846
R233
330K_0402_5%
+VSB
R556
C834
Inrush current = 0A
1
2
3
1
1
+1.2V_HT
Q11
IRF8736TRPBF_SO8
+3V_LAN
+3VALW
C837
0.01U_0402_25V7K
Q12A
2N7002DW-T/R7_SOT363-6
Vgs=-4.5V, Id=3A
VLDT_EN#
Rds<97m ohm
2
< Inversion of SYSON, SUSP#, VLDT_EN, EC_ON >

R17
SUSP
SUSP
Q142A
2N7002DW-7-F_SOT363-6
2
SUSP#
VLDT_EN#
42
EC_ON#
6
Q142B
2N7002DW-7-F_SOT363-6
5
27,34,42 SYSON
1
2
SYSON#
SYSON#
1U_0402_6.3V4Z
34
VLDT_EN
19,27,30,34,39,41
VLDT_EN 2
Q143A
2N7002DW-7-F_SOT363-6
42
C680
Q143B
2N7002DW-7-F_SOT363-6
5
EC_ON
34,35
Inrush current = 0A
4.7U_0805_10V4Z
R598
100K_0402_5%
R597
100K_0402_5%
100K_0402_5%
C679
R596
+5VL
1
@
+5VL
1
R595
100K_0402_5%
Q38
AO3413_SOT23
0.01U_0402_25V7K
C182
+5VL
PJ29
JUMP_43X79
2
1
+5VL
2
@
R19
2 47K_0402_5%
WOL_EN#
WOL_EN#
34
C194
0.1U_0402_16V7K
100K_0402_5%
+1.5VS
+1.1VS
R293
R294
470_0805_5%
470_0805_5%
470_0805_5%
2N7002_SOT23-3
EC_ON#
SUSP
Q42
2N7002_SOT23-3
SYSON#
Q47
2
G
2N7002_SOT23-3
Q49
2
G
2N7002_SOT23-3
SUSP
1
D
2
G
SUSP
Q50
2
G
Q41
2
G
SYSON#
1
2N7002DW-T/R7_SOT363-6
R292
470_0805_5%
VLDT_EN#
R288
2N7002_SOT23-3
R368
470_0805_5%
Q48
2
G
Q12B
2N7002_SOT23-3
3 1
1
SUSP
Q46
1
1
2
G
+0.9V
@
470_0805_5%
470_0805_5%
R280
470_0805_5%
R279
470_0805_5%
R239
R284
SUSP
+3VS
+1.2VALW
+1.8V
+1.2V_HT
2
+1.8VS
+5VS
< Discharge circuit >
Q52
2
G
2N7002_SOT23-3
2N7002_SOT23-3
Compal Secret Data
2008-09-25
Issued Date
2009-09-25
Deciphered Date
A
Title

DC/DC Circuits

Custom
Date:
Rev
1.0
LA-4971P
Sheet
E
36
of
45
VS
VIN
SMB3025500YA_2P
PR2
5.6K_0402_5%
2
+
39
LM393DG_SO8
PD1
GLZ4.3B_LL34-2
PR7
10K_0402_1%
1
PR8
10K_0402_1%
RTCVREF
Vin Detector
3.3V
VIN
PC6
.1U_0402_16V7K
PR6
20K_0402_1%
22,34,35
PACIN
PACIN
1
1
PC5
0.068U_0402_10V6K
ACIN
PU1A
@ SINGA_2DW-0005-B03
PR4
10K_0402_1%
1
2
PR5
22K_0402_1%
1
2
PC4
100P_0402_50V8J
PC3
1000P_0402_50V7K
PC2
100P_0402_50V8J
PC1
1000P_0402_50V7K
N1
PR3
84.5K_0402_1%
2
2
10A_125V_451010MRL
DC_IN_S2
DC_IN_S1
PJP1
PR1
1M_0402_1%
1
2
VIN
PL1
PF1
DC301001M80
High 18.384 17.901 17.430

Low 17.728 17.257 16.976
1
PR9
68_1206_5%
PQ1
TP0610K-T1-E3_SOT23-3
PR11
200_0603_5%
1
2
N1
VS
CHGRTCP
PR10
68_1206_5%
1
RLS4148_LL34-2
BATT+
PD2
RLS4148_LL34-2
PD3
PR12 1K_1206_5%
1
2
PD4
VIN
2
PR15
22K_0402_1%
PR14 1K_1206_5%
1
2
N3
RLS4148_LL34-2
B+
PR16 1K_1206_5%
1
2
RTC Battery
PR18
200_0603_5%
PR17
499K_0402_1%
5
2
RTCVREF
@ PR25
66.5K_0402_1%
PC13
1000P_0402_50V7K
PR23
10K_0402_1%
PR24
499K_0402_1%
PR26
191K_0402_1%
PC11
1000P_0402_50V7K
PC12
1000P_0402_50V7K
LM393DG_SO8
PU1B
ACON
39
SP093MX0000
EN0
1U_0805_25V4Z
6,40
PD5
RB715F_SOT323-3
2
1
3
@ MAXEL_ML1220T10
PC10
N2
PR20
2.2M_0402_5%
2
1
PR19
100K_0402_1%
1
2
VL
+RTCBATT
IN
GND
+RTCBATT
OUT
PC9
10U_0805_10V4Z
PBJ1
2
2
3.3V
G920AT24U_SOT89-3
PU2
PR22
560_0603_5%
1
2
+CHGRTC
PR21
560_0603_5%
1
2
RTCVREF
51_ON#
35
PC7
0.22U_1206_25V7K
PC8
0.1U_0603_25V7K
PR13
100K_0402_1%
PR27
47K_0402_1%
2
1
D
PJ2
+3VALW
+1.8VP
@ JUMP_43X118
OCP(min) = 8.87A
+5VALW
+NB_COREP
+NB_CORE
( 7A, 280mils , Via NO.=14 )
OCP(min) = 7.9A
OCP(min) = 8.45A
+VSB
+1.2VALWP
1
2
1
@ JUMP_43X118
+1.2VALW
+VDDNBP
1
1
+VDDNB
@ JUMP_43X79
(3A, 120mils, Via NO.= 6)
+5VALWP
PQ3
DTC115EUA_SC70-3
+5VL
Precharge detector
15.97V/14.84V FOR
ADAPTOR
+2.5VS
(0.5A,20mils ,Via NO.= 1)
OCP(min) = 8.51A
+1.5VSP
+1.5VS
Issued Date
Compal Secret Data
1
@ JUMP_43X79
1
2
1
@ JUMP_43X39
+2.5VSP
(5A,200mils ,Via NO.=10)
+0.9V
(2A,80mils ,Via NO.= 4)
+3VL
(100mA,40mils ,Via NO.= 2)
PJ12
@ JUMP_43X79
PJ7
PJ11
VL
PJ9
1
2
1
@ JUMP_43X39
PJ10
@ JUMP_43X39
PACIN
2
G
PQ2
SSM3K7002FU_SC70-3
PJ4
@ JUMP_43X118
+0.9VP
PJ6
PJ8
+VSBP
OCP(min) = 7.7A
+3VLP
@ JUMP_43X39
@ JUMP_43X118
+1.8V
@ JUMP_43X118
PJ5
+5VALWP
S
PJ23
PJ1
+3VALWP
1
2
1
@ JUMP_43X118
PJ3
2
1
2
1
2008/9/25
Deciphered Date
2009/9/25
(2A,80mils ,Via NO.=4)

B
Title
DCIN & DETECTOR

Size
Document Number
Rev
0.1
LA-4971P
Date:
Sheet

D
37
of
46
PH1 under CPU botten side :

CPU thermal protection at 92 degree C
Recovery at 56 degree C
VMB
Liverpool
PF2
15A_65V_451015MRL
1
2
PJP2
VL
PL2
SMB3025500YA_2P
1
2
PR31
47K_0402_1%
1
2
40
8
P
PD6
ENTRIP2
6,40
RLS4148_LL34-2
VL
PQ5
SSM3K7002FU_SC70-3
2
G
PR38
100K_0402_1%
1
2
PC18
1000P_0402_50V7K
PR36
13.7K_0402_1%
1
2
PQ4
SSM3K7002FU_SC70-3
LM393DG_SO8
PR40
100K_0402_1%
+3VLP
PR37
6.49K_0402_1%
2
1
PU3A
PC17
0.22U_0805_16V7K
BATT_S1
2
PJP3
BATT_P3
BATT_P4
BATT_P5
EC_SMDA
EC_SMCA
TM_REF1
PR35
100_0402_1%
Sunderland
PR33
13.7K_0402_1%
1
2
2
G
PC16
0.1U_0603_25V7K
PR30
47K_0402_1%
PH1
100K_0603_1%_TH11-4H104FT
PC15
0.01U_0402_25V7K
PC14
1000P_0402_50V7K
+3VLP
2
PR29
47K_0402_1%
PR32
1K_0402_1%
1
1
2
2
3
3
4
4
5
5
10
6
GND
6
11
7
GND
7
12
8
GND
8
13
9
GND
9
OCTEK_BTJ-09HA1G_9P
@
ENTRIP1
2
PR28
1K_0402_1%
BATT_P3
BATT_P4
BATT_P5
EC_SMDA
EC_SMCA
PR34
100_0402_1%
PR39
1K_0402_1%
VL
VL
BATT+
1
2
3
4
5
10
GND
6
11
GND
7
12
GND
8
13
GND
9
OCTEK_BTJ-09HA1G_9P
@
BATT_S1
1
2
3
4
5
6
7
8
9
BATT_TEMPA 34
EC_SMB_DA1 18,34
EC_SMB_CK1 18,34
PH2 near main Battery CONN :

BAT. thermal protection at 92 degree C
Recovery at 56 degree C
VL
1
2
8
+
-
PU3B
PD7
5
TM_REF1
PR46
15.4K_0402_1%
PC21
0.22U_0805_16V7K
1
RLS4148_LL34-2
LM393DG_SO8
2
1
PR48
0_0402_5%
2
PQ7
SSM3K7002FU_SC70-3
2
G
@ PC22
.1U_0402_16V7K
1
POK
PR42
47K_0402_1%
1
2
PR44
13.7K_0402_1%
1
2
PR47
100K_0402_1%
40,41
PR41
47K_0402_1%
PH2
100K_0603_1%_TH11-4H104FT
1
2
@ PC19
0.22U_1206_25V7K
1
2
2
1
PR43
100K_0402_1%
PR45
22K_0402_1%
1
2
VL
+VSBP
1
@ PC20
0.1U_0603_25V7K
B+
3
VL
PQ6
TP0610K-T1-E3_SOT23-3
Issued Date
Compal Secret Data
2008/9/25
Deciphered Date
2009/9/25
A
Title
BATTERY CONN / OTP

Size
Document Number
Rev
0.1
LA-4971P
Date:
Sheet
D
38
of
46
1
2
3
B+
CHG_B+
PL17
HCB4532KF-800T90_1812
1
2
PR49
0.015_2512_1%
1
4
CSIN
PQ11
CSIN
VCOMP
CSIP
ICM
PHASE
2
1
1
1SS355_SOD323-2
20
19
10
VREF
UGATE
CHLIM
BOOT
ACLIM
VDDP
PR69
2.2_0603_5%
BST_CHG 1
2
16
11
PR73
20K_0402_1%
12
VADJ
LGATE
GND
PGND
PQ20
AO4466_SO8
DL_CHG
14
13
26251VDD
2CHG 1
PR66
0.02_2512_1%
4
PR170
4.7_1206_5%
PC39
0.1U_0603_25V7K
BST_CHGA 2
1
2 PACIN
G
PQ17
SSM3K7002FU_SC70-3
2
PL3
10U_LF919AS-100M-P3_4.5A_20%
PD12
RB751V-40TE17_SOD323-2
6251VDDP
15
DH_CHG
17
3
PQ18
AO4466_SO8
PR64
2.2_0603_5%
LX_CHG
18
D
PC31
0.1U_0603_25V7K
CSOP
21
5
6
7
8
CSON
1 2
9
PR70
53.6K_0402_1%
6251VREF 1
6251aclim
2
BATT+
PC129
680P_0603_50V7K
PR60
20_0603_5%
1
2
PC32
0.047U_0603_16V7K
1
2
PR61
20_0603_5%
2
1
PR62
PC35
20_0603_5%
0.1U_0603_25V7K
1
2
PR72
4.7_0603_5%
PC43
4.7U_0805_6.3V6K
ICOMP
22
PR71
100K_0402_1%
CSOP
VIN
PD11
3
2
1
ADP_I
PC42
0.01U_0402_25V7K
2
1
ACOFF
CELLS
PR55
200K_0402_1%
1
2
23
5
6
7
8
CSON
PQ14
DTC115EUA_SC70-3
PR68
34
154K_0402_1%
2
1
IREF
ACOFF
PC41
10U_1206_25V6M
2
1
PR65
47K_0402_1%
1
2
PC38 .1U_0402_16V7K
34
PD8
1SS355_SOD323-2
PC40
10U_1206_25V6M
2
1
6251VREF
ACOFF
VIN
6.81K_0402_1%
2
EN
@ PC30
0.1U_0603_25V7K
2
1
3
2
1
ACSET ACPRN
DCIN
24
6800P_0402_25V7K
2
1
2
PC37
@ 100P_0402_50V8J
1
2
PR52
10K_0402_1%
SUSP# 19,27,30,34,36,41
3
3
DCIN
PR63
0.01U_0402_25V7K
2
6251_EN
VDD
PC36
1
2
PU4
PQ19
SSM3K7002FU_SC70-3
3
34
1
3
PR67
22K_0402_5%
1
2
PQ21
DTC115EUA_SC70-3
PR51
47K_0402_1%
1
2
2 FSTCHG
2
2
PC34
1
ACON
@ PQ45
AO4407A_SO8
8
7
6
5
RB715F_SOT323-3
PC33
@ 680P_0402_50V7K
1
2
2
G
PR59
100K_0402_1%
PC29
.1U_0402_16V7K
PR58
150K_0402_1%
FSTCHG
CSON
37
PQ13
DTC115EUA_SC70-3
6251VDD
PR57
10K_0402_1%
2
1
PC28
2.2U_0603_6.3V6K
2
1
1
3
34
PQ16
SSM3K7002FU_SC70-3
PACIN
DCIN
PR56
100K_0402_1%
2
1
2
1
PD10
1SS355_SOD323-2
1
2
PACIN
PR203
10_0603_5%
2
90W 4407A*1
120W 4407A*2
PD9
PQ15
DTC115EUA_SC70-3
2
G
P3
PR54
100K_0402_1%
37
TP0610K-T1-E3_SOT23-3
3
1
PC26
5600P_0402_25V7K
PC27
0.1U_0603_25V7K
2
PR53
47K_0402_1%
PR50
200K_0402_1%
PQ12
DTA144EUA_SC70-3
1
2
3
CSIP
PQ10
AO4407A_SO8
8
7
6
5
1
2
3
P3
1
2
3
VIN
PQ9
AO4407A_SO8
8
7
6
5
PC23
10U_1206_25V6M
2
1
P2
PQ8
AO4407A_SO8
8
7
6
5
PC24
10U_1206_25V6M
2
1
ISL6251AHAZ-T_QSOP24
34 CHGVADJ
PR74
287K_0402_1%
1
2
PR49=0.02, PR70=75k, PR73=20k
Iada=0~3.947A(75W)
CP=3.63A
PR49=0.02, PR70=24k, PR73=20k
Iada=0~4.737A(90W)
CP=4.36A
PR49=0.015, PR70=53.6k, PR73=20k
Iada=0~6.316A(120W)
CP=5.81A
PR49=0.015, PR70=8.25k, PR73=26.7k
PR75
499K_0402_1%
VIN
CP=3.15A
Iada=0~3.421A(65W)
CP= 92%*Iada
PR171
309K_0402_1%
PR202
10K_0402_1%
1
2
PR172
47K_0402_1%
IREF=1.016*Icharge
Vcell
IREF=0.254V~3.048V
4V
VCHLIM need over 95mV
4.2V
1.882V
4.35V
3.2935V
CELLS
CELL number
PC130
.1U_0402_16V7K
CHGVADJ=(Vcell-4)/0.10627
CC=0.25A~3A
ADP_V 34
@ PD14
GLZ4.3B_LL34-2
Iinput=(1/PR49)((0.05*Vaclm)/2.39+0.05)
where Vaclm=1.09986V, Iinput=3.65A
Vaclm=0.7717V, Iinput=4.41A
Vaclm=0.4204V, Iinput=5.88A
CP mode
Vaclim=2.39*(Rb//152K/(Rt//152K+Rb//152K))
VDD
GND
CHGVADJ
0V
4
Float
Issued Date
Compal Secret Data
2008/9/25
Deciphered Date
2009/9/25
A
Title
CHARGER
Custom
Date:
Rev
0.1
LA-4971P

D
Sheet
39
of
46
AO4712 Rds(on) = 15/18
2VREF_51125
5VALWP
Imax = 5A
Ipeak = 7A
Iocp = 8.59A
PC44
0.22U_0603_10V7K
3.3VALWP
Imax = 5A
Ipeak = 7A
Iocp = 8.59A
OCP = 7.94A
5
6
7
8
PC47
4.7U_1206_25V6K
2
1
1
2
LX_5V
f = 245kHz
3
2
1
TPS51125RGER_QFN24_4X4
1
+
1 2
PQ25
AO4712_SO8
4
@ PC57
680P_0603_50V7K
PC55
220U_6.3VM_R15
LG_5V
@ PR85
4.7_1206_5%
19
+5VALWP
1
20
PL6
4.7U_LF919AS-4R7M-P3_5.2A_20%
1
2
VCLK
VREG5
ESR=15m
VL
1
PR88
@ 0_0402_5%
2VREF_51125
VL
21
22
PR86
499K_0402_1%
1
2
PQ27
SSM3K7002FU_SC70-3
18
17
VIN
16
14
GND
DRVL1
2
G
3
2
1
LL1
PC53
PR83 0.1U_0402_16V7K
BST_5V 1
2 1
2
0_0603_1%
UG_5V
23
5
6
7
8
DRVH1
2
1
PC59
0.1U_0603_25V7K
1
2
G
2
VFB1
DRVH2
B++
D
PQ26
SSM3K7002FU_SC70-3
ENTRIP1
VBST1
13
EN0
6,38
VBST2
ENTRIP2
VREF
PGOOD
EN0
38
TONSEL
VO1
VREG3
DRVL2
38,41
24
PC58
4.7U_0805_10V6K
ENTRIP1
POK
LL2
12
PQ22
AO4466_SO8
6,37
B+
11
ESR=15m
10
LX_3V
LG_3V
UG_3V
f = 305kHz
PR87
100K_0402_1%
@ PC56
680P_0603_50V7K
1
2
3
PR81
150K_0402_1%
2
VO2
8
BST_3V
15
1
1
1 2
PC54
220U_6.3VM_R15
PQ24
AO4712_SO8
@ PR84
4.7_1206_5%
ENTRIP1
ENTRIP2
1
2
3
PC52
0.1U_0402_16V7K PR82
1
21
2
0_0603_1%
8
7
6
5
+3VALWP
P PAD
VFB2
25
ENTRIP2
PL5
4.7U_LF919AS-4R7M-P3_5.2A_20%
1
2
PU5
SKIPSEL
PR80
150K_0402_1%
1
2
B++
PC51
4.7U_0805_10V6K
8
7
6
5
PC49
4.7U_1206_25V6K
2
1
PC50
4.7U_1206_25V6K
2
1
+3VLP
PQ23
AO4466_SO8
PR79
20K_0402_1%
1
2
PC45
2200P_0402_50V7K
PR78
20K_0402_1%
1
2
B++
PL18
HCB4532KF-800T90_1812
1
2
B+
PC48
2200P_0402_50V7K
2
1
PR77
30K_0402_1%
1
2
PC46
4.7U_1206_25V6K
2
1
PR76
13K_0402_1%
1
2
1
VS
PR89
100K_0402_1%
PQ28
SSM3K7002FU_SC70-3
2
G
1
PR90
100K_0402_1%
PR91
49.9K_0402_1%
A
Compal Secret Data
2008/9/25
Issued Date
Deciphered Date
2009/9/25
Title
3VALWP/5VALWP

Custom
Date:
Rev
0.1
LA-4971P
Sheet
1
40
of
46
PL19
HCB4532KF-800T90_1812
1
2
PR94
0_0603_1%
1
2
V5DRV
10
2
PR97
15.4K_0402_1%
DL_NB
+5VALW
PQ30
AO4712_SO8
11
4
2
1
TPS51117RGYR_QFN14_3.5x3.5
@ PC68
47P_0402_50V8J
1
2
DRVL
PGND
PGOOD
GND
6
PC65
1U_0603_10V6K
LX_NB
12
PC67
4.7U_0805_10V6K
PR98
9.53K_0402_1%
1
2
1
+
2
1
2
+NB_COREP
PC64
220U_6.3VM_R15
VFB
13
TRIP
5
6
7
8
DRVH
LL
V5FILT
PR95
4.7_1206_5%
14
15
VOUT
TON
3
2
1
0.1U_0603_25V7K
BST_NB
DH_NB
+1.1V
PL7
1.8UH_SIL104R-1R8PF_9.5A_30%
1
2
PC63
VBST
2
PR96
422_0603_1%
1
2
+5VALW
TP
PU6
EN_PSV
PC62
.1U_0402_16V7K
PC66
680P_0603_50V7K
PR93
33K_0402_1%
1
2
3
2
1
SUSP#
19,27,30,34,36,39
B+
PC61
4.7U_1206_25V6K
1
2
5
6
7
8
PQ29
AO4466_SO8
PR92
255K_0402_1%
1
2
PC60
4.7U_1206_25V6K
NB_B+
PR99
20.5K_0402_1%
PL20
HCB4532KF-800T90_1812
1
2
PR100
255K_0402_1%
1
2
VFB
V5DRV
11
10
PR105
15.4K_0402_1%
DRVL
DL_1.2V
+5VALW
PC173
100U_25V_M
PQ32
AO4712_SO8
PR103
4.7_1206_5%
4
1
PGND
8
GND
@ PC77
47P_0402_50V8J
1
2
PC74
1U_0603_10V6K
PGOOD
TRIP
0.1U_0603_25V7K
LX_1.2V
12
PC76
4.7U_0805_10V6K
1
+
2
PR106
12.1K_0402_1%
1
2
V5FILT
DH_1.2V
13
LL
5
6
7
8
DRVH
+1.2VALWP
PC73
220U_6.3VM_R15
14
VBST
15
VOUT
TON
PC75
680P_0603_50V7K
3
2
1
PL8
2.2UH_PCMC063T-2R2MN_8A_20%
1
2
PC72
BST_1.2V
PR104
422_0603_1%
1
2
PU7
+5VALW
@PC71
@PC71
.1U_0402_16V7K
TP
0_0402_5%
+
2
3
2
1
EN_PSV
POK
B+
4
PR102
0_0603_1%
1
2
PR101
38,40
PC70
4.7U_0805_25V6-K
1
2
5
6
7
8
PQ31
AO4466_SO8
PC69
4.7U_0805_25V6-K
1.2V_B+
PR107
20.5K_0402_1%
Compal Secret Data
2008/9/25
Issued Date
2009/9/25
Deciphered Date
5
Title

NB_COREP/1.2VALWP
Size
Document Number
Rev
0.1
LA-4971P
Date:
Sheet
1
41
of
46
PL21
HCB4532KF-800T90_1812
1
2
V5DRV
10
2
PR113
15.4K_0402_1%
DRVL
DL_1.8VP
1
5
6
7
8
PQ34
AO4712_SO8
4
1
PGND
2
@ PC85
47P_0402_50V8J
1
2
PC83
1U_0603_10V6K
PGOOD
GND
+5VALW
PC86
4.7U_0805_10V6K
+1.8VP
PC82
220U_6.3VM_R15
11
TRIP
VFB
LX_1.8VP
V5FILT
12
PR111
4.7_1206_5%
14
15
VBST
LL
DRVH
VOUT
0.1U_0603_25V7K
TON
DH_1.8VP
+5VALW
PL9
1.8UH_SIL104R-1R8PF_9.5A_30%
1
2
PC81
BST_1.8VP
13
3
2
1
PR112
422_0603_1%
1
2
TP
PU8
EN_PSV
@ PC80
.1U_0402_16V7K
3
2
1
PR110
0_0603_1%
1
2
1
27,34,36 SYSON
PR109
0_0402_5%
1
2
PC84
680P_0603_50V7K
B+
PC79
4.7U_1206_25V6K
1
2
5
6
7
8
PQ33
AO4466_SO8
PR108
255K_0402_1%
1
2
PC78
4.7U_1206_25V6K
51117_B+
+
2
PR114
28.7K_0402_1%
1
2
PR115
20.5K_0402_1%
+1.8V
1
1
PJ17
@ JUMP_43X79
PJ18
@ JUMP_43X79
PR116
1.2K_0402_1%
NC
TP
PC88
1U_0603_6.3V6M
PC89
4.7U_0805_6.3V6K
VIN
VCNTL
GND
NC
+3VALW
VOUT
7
2
PU10
1
3
PR117
1K_0402_1%
VREF
NC
VOUT
NC
APL5331KAC-TRL_SO8
7
2
NC
+5VALW
VREF
NC
VCNTL
GND
VIN
6
1
PU9
1
PC87
4.7U_0805_6.3V6K
+3VS
TP
PC90
1U_0603_6.3V6M
8
9
PC91
.1U_0402_16V7K
S PQ36
SSM3K7002FU_SC70-3
IN
PC94
10U_0805_6.3V6M
OUT
+2.5VSP
GND
1
2
PC97
1U_0603_10V6K
PC98
4.7U_0805_6.3V6K
Compal Secret Data
2008/9/25
Issued Date
2009/9/25
Deciphered Date
5
1
2
G
@ PC96
.1U_0402_16V7K
SYSON#
+0.9VP
36
PC93
10U_0805_6.3V6M
PR119
1K_0402_1%
PC92
PQ35
.1U_0402_16V7K
SSM3K7002FU_SC70-3
PU11
APL5508-25DC-TRL_SOT89-3
2
@ JUMP_43X39
PR121
0_0402_5%
1
2
2
G
PJ19
+3VS
+1.5VSP
@ PC95
.1U_0402_16V7K
SUSP
SUSP
36
PR118
D 1K_0402_1%
APL5331KAC-TRL_SO8
PR120
0_0402_5%
1
2
Title

1.8VP/0.9VP/1.5VSP2.5VSP
Size
Document Number
Rev
0.1
LA-4971P
Date:
Sheet
1
42
of
46
PC109
0.1U_0603_25V7K
UGATE1
25
BOOT1
COMP0
PC122
180P_0402_50V8J
PC127
2
1
PC136
0.1U_0402_25V6
2
1
PC135
0.1U_0402_25V4K
2
1
PC134
0.1U_0402_25V4K
2
1
PC133
0.1U_0402_25V4K
2
1
PC132
0.1U_0402_25V4K
2
1
PC170
4.7U_0805_25V6-K
2
1
COMP1
PC125
180P_0402_50V8J
2
1
PC172
4.7U_0805_25V6-K
2
1
UGATE1
@ JUMP_43X118
+CPU_CORE_0
+CPU_CORE_1
PJ21
2
1
3
@ JUMP_43X118
3
2
1
PL13
0.36UH_PCMC104T-R36MN1R17_30A_20%
4
PR155
4.7_1206_5%
PR156
3.65K_0402_1%
PC119
680P_0603_50V7K
1 2
+CPU_CORE_1
1
5
PC118
0.22U_0603_10V7K
PC120
2
1
0.1U_0603_16V7K
2
LGATE1
2
PR166
PR159
47K_0402_1%
PC126
1000P_0402_50V7K
PR167
6.81K_0402_1%
2
1
PC128
2
1
54.9K_0402_1% 1200P_0402_50V7K
PR168
@ 36.5K_0402_1%
PR169
@ 36.5K_0402_1%
Compal Secret Data
2008/9/25
Issued Date
2009/9/25
Deciphered Date
A
PC169
4.7U_0805_25V6-K
2
1
PC111
4.7U_0805_25V6-K
2
1
1
1 2
2
49
PQ42
TPCA8023-H_SO8
VW1
PR165
1K_0402_5%
2
1
54.9K_0402_1% 1200P_0402_50V7K
3
2
1
PJ20
PC123
1000P_0402_50V7K
PR164
6.81K_0402_1%
2
1
PR163
PR147
47K_0402_1%
PR157
0_0402_5%
1 VSEN1
DIFF_1
PHASE1
PR161
PC124
255_0402_1% 4700P_0402_25V7K
FB_1
2
1 2
1
PC114
2
1
ISP1
VW0
PR143
3.65K_0402_1%
CPU_B+
3
2
1
DIFF_0
+CPU_CORE_0
0.1U_0603_16V7K
LGATE0
PR152
0_0603_1%
BOOT1 1
2 1
ISN0
26
PC115
1U_0603_10V6K
ISN1
PHASE1
PC113
680P_0603_50V7K
ISP0
27
28
PQ41
TPCA8028-H_SOP-ADVANCE8-5
LGATE1
29
3
2
1
30
PR141
4.7_1206_5%
6 CPU_VDD1_RUN_FB_H
3
2
1
LGATE0
31
3
2
1
+1.8V
+5VS
0_0402_5%
PHASE0
32
@ PQ40
UGATE0
33
PC112
0.22U_0603_10V7K
TP
ISN1
ISP1
24
23
ISP1
34
ISN1
VW1
COMP1
22
FB1
21
14
BOOT1
BOOT0
PC171
4.7U_0805_25V6-K
2
1
UGATE1
35
PL12
0.36UH_PCMC104T-R36MN1R17_30A_20%
PC117
4.7U_0805_25V6-K
2
1
COMP0
BOOT_NB
PC116
4.7U_0805_25V6-K
2
1
PHASE1
VW0
PR138
0_0603_1%
BOOT0 1
2 1
PQ43
PR151
PR162
1K_0402_5%
2
1
PC101
220U_25V_M
PQ39
TPCA8023-H_SO8
PC110
4.7U_0805_25V6-K
2
1
37
PGND1
FB0
36
1RTN1
6 CPU_VDD1_RUN_FB_L
38
LGATE1
VDIFF0
13
6 CPU_VDD0_RUN_FB_L
PR160
PC121
255_0402_1% 4700P_0402_25V7K
FB_0
2
1 2
1
PC100
220U_25V_M
5
CPU_VDDNB_RUN_FB_L
@ PR173
10K_0402_1%
1
2
6 CPU_VDD0_RUN_FB_H
UGATE_NB
39
OCSET
ISP0
ISN0
PR149
0_0402_5%
2
1 VSEN0
0_0402_5%
2 PR150 1 RTN0
PHASE_NB
40
42
43
44
41
PGND_NB
OCSET_NB
RTN_NB
VSEN_NB
45
FB_NB
FSET_NB
LGATE_NB
PVCC
ISL6265HRTZ-T_QFN48_6X6
ISP0
12
RBIAS
20
11
LGATE0
VDIFF1
9
10
ENABLE
VSEN1
PGND0
19
SVC
18
PHASE0
RTN1
PR146
4.02K_0402_1%
2
1
UGATE0
SVD
RTN0
PR144
0_0402_5%
PWROK
VSEN0
17
34 VR_ON
BOOT_NB
BOOT0
16
PC107
220U_D2_4VM
PHASE0
PGOOD
ISN0
1
PR142
0_0402_5% 2
OFS/VFIXEN
15
ISL6265_PWROK
2
COMP_NB
VCC
46
47
48
VIN
CPU_SVD
CPU_SVC
PR145
113K_0402_1%
2
1
CPU_B+
PU12
2
6
6
3
2
1
2
21,34 SB_PWRGD
PC108
680P_0603_50V7K
LGATE_NB
UGATE0
1
2
@ PR139 0_0402_5%
1
2
PR140 0_0402_5%
UGATE_NB
1
PR133
0_0402_5%
EMC
+VDDNBP
PHASE_NB
PR132
@ 105K_0402_1%
PR137
@ 105K_0402_1%
6,20 H_PWRGD
PR125
4.7_1206_5%
PR135
@ 10K_0402_1%
PR134
105K_0402_1%
VGATE
PQ38
AO4712_SO8
34
B+
PHASE_NB
1
PR131
0_0402_5%
PR130
9.09K_0402_1%
2
1
PL11
4.7U_LF919AS-4R7M-P3_5.2A_20%
1
2
PC106
0.22U_0603_10V7K
4
CPU_VDDNB_RUN_FB_H
+3VS
+5VS
PR128
2_0603_5%
2
CPU_B+
PR129
0_0402_5%
2
1
PR124
2.2_0603_1%
BOOT_NB 1
2 1
PQ37
AO4466_SO8
PHASE_NB
PR126
22K_0402_1%
2
1
LGATE_NB
1
PC103
10U_1206_25V6M
2
1
UGATE_NB
PC104
1000P_0402_50V7K
2
1
PC105
0.1U_0603_16V7K
+5VS
1 2
PC102
1000P_0402_50V7K
3
2
1
5
6
7
8
PR122
44.2K_0402_1%
PR123
2_0603_5%
1
2
5
6
7
8
PC99
33P_0402_50V8K
2
1
PL10
HCB4532KF-800T90_1812
1
2
PC138
0.1U_0402_25V6
2
1
CPU_B+
PC137
0.1U_0402_25V6
2
1
PC131
0.1U_0402_25V4K
2
1
PQ44
@ TPCA8028-H_SOP-ADVANCE8-5
Title

+CPU_CORE

Custom
Date:
Rev
0.1
LA-4971P
Sheet
E
43
of
46
Version Change List ( P. I. R. List ) for Circuit

Item Page# Title
1
Request
Owner
Date
Issue Description
Rev.
Solution Description
1. 2009/02/23 --> change R70, R77 from 4.7K to 2.2K
2. 2009/02/23 --> change R178 from 4.7K to 47K

3. 2009/02/26 --> change SPI ROM from SST to MXIC
4. 2009/02/26 --> change D36 from ROHM to PANJI
5. 2009/02/27 --> change the footprint of T9, T10, T11, T12, T19, T20 from TPC12 to TPC24
6. 2009/02/27 --> change 5V power of LCD connector
7. 2009/03/02 --> unmount R556
8. 2009/03/04 --> change RA16 from 5% to 1%
9. 2009/03/10 --> change R146 from 100k ohm to 10k ohm
10. 2009/03/10 --> change Y2 from SJ114P3M730 to SJ114P3MG00
11. 2009/03/11 --> change C686, C699, C702, C705, C706, C708, CA27 from SE074221K00SE
to SE074221K80 for Green part
12. 2009/03/11 --> change LAN_WAKE# & EC_SWI#
13. 2009/03/11 --> unmount USB sleep & charge, add R97 & R98
14. 2009/03/11 --> unmount HDMI CEC controller and related components.
15. 2009/03/11 --> connect USB_OC#0 to LAN_WAKE# through 0 ohm
2
16. 2009/03/12 --> change H42 from NPH to PH
17. 2009/03/12 --> add PR203 10Ohm

18. 2009/03/24 --> change F2 footprint to F_MINISMDC110F-2
19. 2009/03/24 --> Add R370 & R381
20. 2009/03/24 --> change R557s BOM structure from H@ to @
21. 2009/03/24 --> change R440 from 0 ohm to 100k ohm
22. 2009/03/31 --> Replace PJ13, PJ30, PJ14, PJ15, PJ16 by PL17, PL18, PL19, PL20, PL21
23. 2009/04/02 --> Add R969 on E51_TXD
24. 2009/04/02 --> Modify +HDMI_5V_OUT Circuit
Remove Q159, R160, Q26, R557, C876 and add D19
25. 2009/04/02 --> Change R440 from 100k to 0 for Askey BT Reset
26. 2009/04/02 --> Change C480's BOM Stuucture from BT@ to @
27. 2009/04/06 --> Change SW5's BOM Stuucture to @ for MP
28. 2009/04/06 --> Add C876 for Power noise issue
29. 2009/04/06 --> Add D20 for Power issue
30. 2009/04/17 --> Change D12's BOM Stuucture to @
31. 2009/04/22 --> Change C876 & C234 from 330u to 470u (SGA00001U00) for Power noise issue
3
Compal Secret Data
2008/9/25
Issued Date
2009/9/25
Deciphered Date
A
12
52
VGA_CORE
1/2
Compal
Title

List History

Custom
Date:
Rev
1.0
LA-4971P
Sheet
44
of
45
for EMI requset
Add PR7
HW4 Product Improvement Record (P.I.R.)

D
< Liverpool & Sunderland >

< R1 for customer BOM STRUCTURE >
< R3 for mass production BOM STRUCTURE >
U3
RS780MN
< Tigris >

< R1 for customer BOM STRUCTURE >
U3
< R3 for mass production BOM STRUCTURE >
U3
RS780MN
RS780MNR1@ RS780MN R1
RS880MN
RS780MNR3@
RS780MN R3
RS880MNR1@
U3
RS880MN
RS880MN R1
U3
RS780MC
RS880MC
RS780MCR1@ RS780MC R1
RS880MCR1@
U3
RX781
U3
RS880MC
RS880MC R1
U3
RX781
RX881
RX881
RX781R1@
RX781 R1
RX781R3@
RX781 R3
RX881R1@
U15
RX881 R1
U15
SB700
SB710
SB700R1@
SB700R1
SB710
SB710R1@
SB710 R1
< DC Jack >

Use MEMO : change UG1 R5F211B4D31SP (SA000037Y60) to R5F211B4D34SP (SA00003A600)
PJP1
DC-IN
16inch_45@
PJP1
PJP1
DC-IN
17inch_45@
PJP1
< PCB >

ZZZ
PCB
PCB 075 LA-4971P LS-4971P/4972P/4973P REV1.0 M/B
2008-09-25
Issued Date
Compal Secret Data
2009-09-25
Deciphered Date
5
Title
PIR
Size
Date:
Document Number
Rev
1.0
Sheet
1
45
of
45

Toshiba Satellite L500D (Compal LA-4971P KSWAE Liverpool 10AR - 10ARG) PDF

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A

KSWAE LA-4971P Schematics Document

2009-04-22 Rev. 1.0

Compal Secret Data

Compal Electronics, Inc.

Size Document Number

Wednesday, April 22, 2009

PCI BUS 3.3V 33 MHz

SATA port 0 page 25

SATA port 3 page 25

LPC BUS 3.3V 33 MHz

USB Port 0,1

Compal Secret Data

Compal Electronics, Inc.

Size Document Number

Wednesday, April 22, 2009

@ : just reserve , no build

DEBUG@ : reserve for debug.

UMA@: means for RS780M.

Express card / PCMCIA

CAMERA & MIC

S5 S4/ Battery only

S5 S4/AC & Battery

I2C / SMBUS ADDRESSING

CLOCK GENERATOR (EXT.)

SMBUS Control Table

Compal Secret Data

Compal Electronics, Inc.

Size Document Number

Wednesday, April 22, 2009

Near CPU Socket

< From NB >

< VLDT_A & VLDT_B : HyperTransport I/O ring power >

< FAN Control Circuit : Vout = 1.6 x Vset >

< From EC >

Compal Secret Data

Compal Electronics, Inc.

Size Document Number

Wednesday, April 22, 2009

< DDR2 VREF is 0.5 ratio >

< PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH >

< Processor DDR2 Memory Interface >

Place them close to CPU within 1"

< To SO_DIMMA >

< To SO_DIMMA >

< To SO_DIMMA >

< To SO_DIMMA >

< To SO_DIMMA >

< To SO_DIMMA >

< To SO_DIMMA >

< VTT regulator voltage >

< From/To SO_DIMMB >

< To SO_DIMMB >

< To SO_DIMMB >

< To SO_DIMMB >

< To SO_DIMMB >

< To SO_DIMMB >

< To SO_DIMMB >

< To SO_DIMMB >

< To SO_DIMMB >

< From/To SO_DIMMB >

< From/To SO_DIMMA >