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KISHOR HASYAGAR

2827 Orchard Avenue,LA,CA-90007, (213) 587 3047, Email:hasyagar@usc.edu,14kishorgh@gmail.com


Objective
To secure summer internship in field of VLSI and Computer Architecture.
Education
University of Southern California
MS in EE(VLSI)

May 2015(expected)

Pune Institute of Computer Technology


BE in E&TC (GPA-3.7/4)

July 2012
Courses

Undergraduate: VLSI, Integrated Circuits and Applications, Solid State Devices and Circuits, Electromagnetics,
Computer Organization and Architecture.
Current: MOS VLSI Circuit Design(EE 477), Computer Systems Organization(EE 457).
Prospective: Computer Systems Architecture, VLSI System Design, Advanced Topics in Microarchitecture.
Graduate Projects
RCA: Entire design of 4 bit ripple carry adder upto layout implemented in Cadence Virtuoso. Main objectives included
estimation of critical paths and the associated delays.
ALU: 4 bit ALU implemented in Modelsim SE Verilog supporting a variety of operations including signed and unsigned
addition. Overflow detection logic was implemented. Testbenches executed for a variety of input pattern vectors.
Undergraduate Projects
Space Diversity Receiver:
Used two antennas to receive the same signal, one the original(reference)signal and other delayed signal,added them both
to increase the resultant SNR to combat multipath fading. It was implemented for band of FM(88-108 MHz). Generalized
cross correlation method to estimate delay was implemented on DSP320C6713. An increase of 6 db was found in
resultant signal level. The system was simulated on Advanced Design System(ADS) by Agilent.
Traffic Light Controller :
Designed a traffic light controller using Finite State Machine on Spartan 2 kit in VHDL using Xilinx tool.
Additional Projects
Full duplex intercom, FM receiver,8051 microcontroller based temperature sensor.
Technical Skills
EDA Tools: Cadence Virtuoso, Xilinx FPGA Suites, Multisim, Matlab.
HDL: Verilog, VHDL.
Programming Languages: C,C++.
DBMS Technologies: PL/SQL.
Scripting: Unix shell.
Professional Experience
Software Engineer, HSBC GLT India
Primary responsibilities included Software development
in PL/SQL and Unix Technologies for accounting rules.

2012-2013

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