ZXC10-BSSB System Unit 2

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 Outline

¾ ZXC10-BSCB Overview
‰ Control Subsystem
‰ Primary Switching Subsystem
‰ Resource Subsystem

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 ZXC10-BSCB Overview

BSC

PCFS PDSN
MSC
PBS

CPS
CPS PSN

DTS
DTS

SDU MSC
MSC

......

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 ZXC10-BSCB Overview (Cont.)
ƒ DTS (Digital Trunk Subsystem) terminates low-
speed links (like E1) on the Abis interface and A
interfaces.
ƒ CPS (Call Processing Subsystem) performs CDMA
call control.
ƒ PCF (Packet Data Control Subsystem) performs data
service processing.
ƒ SDU (Selector Digital Subsystem) is in charge of
reverse frame selection and the corresponding
protocol processing.
ƒ VCS (VoCoder Subsystem) performs voice
encoding/decoding.
ƒ PSN (Packet Switching Network) performs media
stream switching.

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 BSC Physical Architecture

‹ Three subsystems
– Primary Switching Subsystem
– Control Subsystem.
– Resource Subsystem

‹ One BSC rack/cabinet has 4

shelves, each of which has 17 front
and rear slots. Every front/rear slot
is for one front/rear board

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 BSCB Physical Architecture (Cont.)

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 BSCB Physical Architecture(Cont.)
„ Primary Switching Subsystem
– Consisting of one primary switching shelf normally
whose backplane is BPSN so that primary switching
shelf is referred to as BPSN shelf.
• Control Subsystem
– Consisting of one control shelf normally whose
backplane is BCTC so that control shelf is referred to
as BCTC shelf.
„ Resource subsystem
– Consisting of one or more resource shelves whose
backplane is BUSN so that resource shelf is referred to
as BUSN shelf.

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 BSCB Hardware
Architecture-Front View
Primary Switching shelf (BPSN)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
G G G G G G P P G G G G G G U U N
L L L L L L S S L L L L L L I I C
I I I I I I N N I I I I I I M M
Q Q Q Q Q Q 4 4 Q Q Q Q Q Q C C
V V V V V V V V V V V V V V

Control shelf (BCTC)

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
U U O O C C C C N
M M M M M M M M I I M M L L H H C
P P P P P P P P M M P P K K U U
C C G G B B
Resource shelf (BUSN)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
D D D S I I A A U U U U S S S S S
T T T D P P B B I I P P D D D D D
B B B U C C P P M M C C U U U U U
F F M M U U F F
G G
C C
M M

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 BSCB Hardware
Architecture -Back View
Primary Switching shelf (BPSN)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
N N N N N N N N N N N N N N R R N
C C C C C C C C C C C C C C U U C
I I
M M
2 3
Control shelf (BCTC)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
N N N N N N N N R R R R R R R R N
C C C C C C C C U U M M C C C C C
I I P P K K H H
M M B B G G B B
2 3 1 2 1 2
Resource shelf (BUSN)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
R R R N R R R R R R N N N N N N N
D D D C M M M M U U C C C C C C C
T T T N N N N I I
B B B I I I I M M
C C C C 1 1
G G
C C
M M
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 Outline

‰ BSC Overview
¾ Control Subsystem
‰ Resource Subsystem
‰ Primary Switching Subsystem

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 Control Subsystem (Cont’d)

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 MP and MP Boards

ƒƒ

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 MP and MP Boards (Cont’d)

CPU2

CPU1

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 Rear Board of OMP (RMPB)

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 Clock Generator (CLKG)

ƒ Clock Generator (CLKG) uses 8KHz clock reference from

DTB or GCM (GPS Clock Module); or 2MHz/2Mbits from
the BITS system; and PP2S, 16CHIP from the GCM to
generate system clock.

ƒ Adopting phase-locked loop system, which supports four

working modes: CATCH, TRACE, HOLD and FREE.

ƒ One CLKG board can only provides 15 sets of system clocks

for 15 shelves respectively.

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 CLKG and its Rear Boards

CLKG

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 Clock Distributor Board (CLKD)

ƒ When the number of shelves exceeds 15, a Clock

Distributor Board (CLKD) should be configurated.

ƒ CLKD receives one set of system clock distributed by

CLKG and then replicates at most 15 sets of system
clocks for use.

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 GPS Clock Board (GCM )

ƒ GCM extracts 1PPS signals from the received

GPS signals, which is used as reference to further
generate the PP2S, 16CHIPS (19.6608MHz) and
Time of Date (TOD) messages.
ƒ Very high phase accuracy and frequency accuracy
ƒ Very good GCM holding capability when there is
no GPS signals
ƒ GCM is in active/standby mode, and suitable for
both GPS and GLONASS receiver module

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 Rear board of GCM

——Connect to OMP’ GPS485

RS 248
——Output 16chip/pp2s clock signals to CLKG
GCM CLK0

GCM CLK1

——GLONASS
GNS
——Output 8k Clock Signals to CLKG

GCM 8k
——Not used

DSM 8k

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 Universal Interface Module (UIM)
ƒ Two types of UIM boards: UIMC and UIMU,
both of which have UIM mother board.
ƒ UIMU employs GXS subcard, while UIMC
employs GCS subcard. UIMC is used in BCTC
and BPSN shelves, while BUSN is used in
UIMU.
ƒ UIMC/UIMU is the control center of within each
shelf.
ƒ UIMC provides switch of control stream within
BCTC shelf and BPSN shelf, while UIMU
provides switch of control and media stream
within BUSN shelf.
ƒ UIM provides interfaces between different
shelves to exchange control and media data.
ƒ Getting system clock from CLKG and
distributing it to other boards with the shelf.
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 Rear Boards of UIMC

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 Control Hub (CHUB)

ƒ CHUB acts like a switch to connect the control

streams of all the shelves including BPSN shelves,
BUSN shelves and BCTC shelves, when the
number of shelves is large.
ƒ Externally providing 46 100Mbps Ethernet
interfaces
ƒ Internally providing 1G Ethernet interface for the
interconnection with the UIMC board in the same
shelf

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 Rear Boards of CHUB

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 BCTC Shelf Configuration

ƒ A BSC is only equipped with one pair of OMP boards

(1+1 active/backup) in slots 11 and 12 of BCTC shelf.
Other MP boards need be configured according to the
requirements.
ƒ The CLKG/CLKD must plugged in in slots 13 and 14
of the BCTC shelf in active/standby mode.
ƒ UIMC can only reside in slots 9 and 10, and CHUB in
slots 15 and 16.

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 BCTC Typical Configuration
Control shelf (BCTC): Front boards
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
C C D D R R H H U U O O C C C C N
M M S S M M M M I I M M L L H H C
P P M M P P P P M M P P K K U U
P P C C G G B B

Control shelf (BCTC): Rear boards

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
N N N N N N N N R R R R R R R R N
C C C C C C C C U U M M C C C C C
I I P P K K H H
M M B B G G B B
2 3 1 2 1 2

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 Control Subsystem Principle

CHUB UIMC CLKG

IBB UIM CLKG

FE

OMC FE
CMP OMP
CMP OMP

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 Outline

‰ BSC Overview
‰ Control Subsystem
¾ Resource Subsystem
‰ Primary Switching Subsystem

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 Resource Subsystem
ƒ Resource Subsystem processes relevant bottom-layer protocols
as well as provides various access interfaces and various
resources processing modules.

ƒ It includes front boards:

¾ UIMU, DTB/DTEC, ABPM, SDU, VTC, IWFB, HGM, IBB, IPCF,
UPCF
ƒ rear boards:
¾ RDTB, RMNIC, RUIM1

ƒ Backplane of Resource Subsystem is an universal service

backplane BUSN, on which various service data processing
modules and control subsystem boards can be plugged in
together.

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 Resource Subsystem (Cont’d)

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 Universal Interface Module (UIMU)

ƒ Control center of BUSN

ƒ Providing switches for control and media stream
transmission within BUSN shelf.
ƒ Getting system clock from CLKG and distributing it
to other boards with the shelf.
ƒ Providing interfaces between different shelves to
exchange control and service data: 2 FE ports for
control data exchange and 2 optical GE ports for
service data exchange.

UIMC

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 UIMU Board Panel

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 Rear Board of UIMU

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 Digital Trunk Board (DTB/DTEC)

ƒ DTB multiplexes data on 32 E1s to 8 HWs of 8Mbps.

After this, the data will be distributed to the
corresponding processing boards through the UIMU.
ƒ The only difference between DTB and DTEC lies in
the EC function. DTEC can be configured w/o the EC
function.
ƒ Providing 32 E1s physical interfaces, and leading out
E1 connection lines from the back board RDTB.
ƒ Providing 8K clock reference for CLKG use.

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 DIP Switches & Jumpers of DTB

ƒ DTB/DTEC has 12 4-bit DIP switches.

a) Eight 4-bit DIP switches (including S1-S6, S9 and S12)

are used to set the impedance of each E1 cable to 75Ω
or 120 Ω.
9 “ON”----75Ω “OFF”----120Ω
b) Two 4-bit DIP switches (S7 and S8) indicate the
receiving match impedance of each E1 chip.
9 “ON”----75Ω “OFF”----120Ω
c) Two 4-bit DIP switches (S10 and S11) are used to
indicate the long/short haul working status of each E1
chip

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 DTB and RDTB

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 Abis Processing Module (ABPM)

ƒ Designed for protocol processing for the Abis

interface
ƒ Providing cUDP/PPP/PPPmux/ML-PPP processing
capability of 63 E1s, i.e., 63×2Mbps. The
maximum number of ML-PPP (MP) bundles
supported is 42 MP, each of which contains at most
8 E1s.
ƒ Supporting at least 256 HDLC
ƒ Being equipped with rear board RMNIC if
debugging is needed.

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 Selector Digital Unit (SDU)

ƒ SDU serves as a selector to process radio voice and data

protocols.

ƒ Selecting and separating voice and packet data.

ƒ Processing data for A8 interface.

ƒ With four sets of CPU, which are mutually independent.

ƒ Providing 480 selector unit (SE).

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 Voice Transcoder Card (VTC)

ƒ VTC, including VTCD and VTCA, providing voice

coding/decoding of the circuit switched domain.

9VTCD is a voice transcoder board based on the DSP array

9VTCA is a voice transcoder board based on the ASIC array.

ƒ Providing 480 voice coding/decoding elements (VE) of QCELP8K,

QCELP13K, or EVRC and echo canceller function.

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 Internetworking Functional Board
(IWFB)
ƒ IWFB implements the asynchronous data service defined by
service option 4100 and 12 and G3 fax service defined by 4101,
13.

ƒ Adopting sub-card mode for the MODEM pool. Each sub-card

has 60 channels and at most four sub-cards can be inserted. I.e.,
the MODEM pool can be flexibly configured with
60/120/180/240 channels.

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 PCF User Data Processing Board (UPCF)

ƒ UPCF supports the processing of PCF user data caching,

sequencing as well as the processing of some special
protocols.

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 PCF Interface Module (IPCF)

ƒ The IPCF module provides PCF subsystem with interfaces to

BSC and PDSN. It receives IP data, differentiates the data
and distributes them to corresponding internal functional
modules, such as SPCF and UPCF.

ƒ Providing 4 external FE interfaces for the connection with

PDSN and AN AAA.

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 Narrowband Signaling Process Board
(SPB)
ƒ The narrowband signaling process board is designed
to process lower layers of NO.7 signaling.

ƒ SPB provides 16 channels of E1, four CPUs which

constitute a communication processing unit.

ƒ SPB supports 120Ω and 75Ω impedance E1

configurations.

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 SPB DIP Switches & Jumpers

ƒ SPB has six 4-bit DIP switches S1~S6.

9 S3~S6 are used to set the impedance-matching resistance

of various E1s to 75Ω or 120Ω .
“ON” indicates 120ohm while “OFF” indicates 75ohm.

9 S1 and S2 are used to indicate the long/short haul status

and the receiving match resistance of various E1 chips
respectively.

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 HIRS Gateway Module (HGM)

ƒ The HGM module is a HIRS gateway compatible with ZTE

IS95 and CDMA20001x HIRS BTS and BSC.

ƒ Supporting HIRS protocol processing capability of 32 E1s for

protocol conversion between HIRS and IP

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 BSC Interconnection Module (IBB)

ƒ IBB provides standard A3/A7 and A13 interfaces.

9 IBBA-----providing the standard soft handoff interface between ATM

BSC and IP BSC.

9 IBBH-----providing the soft handoff interface between IP BSC and ZTE

IS-95/CDMA2000 1x HIRS BSC

9 IBBE-----providing the soft handoff interface between IP BSCs with

physical link network cable.

9 IBBC-----providing the soft handoff interface between IP BSCs with E1.

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 BUSN Typical Configuration
Resource shelf (BUSN) front boards
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
D D D S I I A A U U U U S
T T T D P P B B I I P P
B B B U C C P P M M C C
F F M M U U F F

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 Principle of Resource Subsystem

IBB/SDU/ABPM/
UPCF

DTB IPCF
DTB IPCF

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 Outline

‰ BSC Overview
‰ Control Subsystem
‰ Resource Subsystem
¾ Primary Switching Subsystem

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 Primary Switching Subsystem

ƒ The primary switching subsystem serves as the media

stream switching center of BSC

ƒ It includes front boards:

9 PSN, GLI and UIMC

ƒ It includes Rear board

9 RUIM2,RUIM3

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 Packet Switching Network (PSN)
ƒ As the switch of media stream, PSN performs the packet
data switching between various line cards, i.e., BUSN
shelves.

ƒ There 3 types of PSN

9 PSN1V, PSN4V and PSN8V, which provide switching capacities
10G, 40G and 80G respectively.

ƒ PSN4V is usually used in our equipment and 1+1 load

sharing mode is employed.

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 GE Line Interface Board (GLIQV)

ƒ Providing 8 GE ports configured in 1+1 backup mode.

GE ports in adjacent GLIQV boards provide GE port
backup.

ƒ Providing 1×100M FE as the communication channel

between active and standby GLI.

ƒ Providing 1×100M FE as the control channel.

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 GLIQV External Ports

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 Typical Configuration

ƒ The typical primary switching subsystem consists of one or

more primary switching shelves, which contain three modules:
UIM, PSN and GLI.

9 UIM, in active/standby mode, is invariably inserted in slots 15 and 16.

9 PSN, also in active/standby mode, is invariably inserted in slots 7 and 8.

9 To configure the primary switching shelf, UIM and PSN are required, and
two GLIs must be configured at least.

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 BPSN Typical Configuration
Primary switching shelf (BPSN): front boards
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
G G G G G G P P G G G G G G U U N
L L L L L L S S L L L L L L I I C
I I I I I I N N I I I I I I M M
Q Q Q Q Q Q 4 4 Q Q Q Q Q Q C C
V V V V V V V V V V V V V V

Primary switching shelf (BPSN): rear boards

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
N N N N N N N N N N N N N N R R N
C C C C C C C C C C C C C C U U C
I I
M M
2 3

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 Primary Switching Subsystem(Cont.)

ControlStream FE FE ControlCenter
(CHUB)
PSN UIM
PSN UIM

Clock CLKG
CLKG
GLI GLI
GLI GLI

Master Slave Master Slave

BUSN BUSN

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 Flexible Configuration of BSC

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 ZTE University univ
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