CHAITANYA BHARATHI INSTITUTE OF TECHNOLOGY, HYD-075

Department of Electrical & Electronics Engineering

B.E. EEE 4/4, I Semester
Course: Elective I, EC405 VLSI Design
Assignment 1

Date: 13-08-2007
Due Date: 20-08-2007

1. A particular layer of MOS circuit has a resistivity = 1 Ohm-cm. A section of this

layer is 100 m long and 5 m wide and has a thickness of 1 m. Calculate the value
of sheet resistance Rs. Also calculate the resistance of this section along the length,
using the concept of sheet resistance.
2. Explain Latch-up. How will you prevent latch-up?
3. Draw CMOS implementation of clocked NOR-based SR latch.
4. Explain how conductive layers are separated from each other in an IC? Also explain
the other uses of this material.

CHAITANYA BHARATHI INSTITUTE OF TECHNOLOGY, HYD-075

Department of Electrical & Electronics Engineering
B.E. EEE 4/4, I Semester
Course: Elective I, EC405 VLSI Design
Assignment 1

Date: 13-08-2007
Due Date: 20-08-2007

1. A particular layer of MOS circuit has a resistivity = 1 Ohm-cm. A section of this

layer is 100 m long and 5 m wide and has a thickness of 1 m. Calculate the value
of sheet resistance Rs. Also calculate the resistance of this section along the length,
using the concept of sheet resistance.
2. Explain Latch-up. How will you prevent latch-up?
3. Draw CMOS implementation of clocked NOR-based SR latch.
4. Explain how conductive layers are separated from each other in an IC? Also explain
the other uses of this material.