EC6411 Circuit & Devices Lab Manual

EC 6211
EC 6211
CIRCUITS AND DEVICES LABORATORY MANUAL
2015
CIRCUITS AND DEVICES LABORATORY
1. Characteristics of PN Junction Diode

2. Zener diode Characteristics & Regulator using Zener diode
3. Common Emitter input-output Characteristics
4. Common Base input-output Characteristics
5. FET Characteristics
6. SCR Characteristics
7. Clipper and Clamper & FWR
8. Verifications of Thevinin & Norton theorem
9. Verifications of KVL & KCL
10. Verifications of Super Position Theorem
11. verifications of maximum power transfer & reciprocity theorem
12. Determination of Resonance Frequency of Series & Parallel RLC Circuits
13. Transient analysis of RL and RC circuits
Content beyond the syllabus
14. Half wave rectifier
15.Bridge wave rectifier
Ms B.KALAIMATHI AP/ECE
EC 6211
2015
CIRCUIT DIAGRAM:
FORWARD BIAS:
REVERSE BIAS:
EC 6211
2015
Ex.No:
CHARACTERISTICS OF PN DIODE
Date:
AIM:
To study the PN junction diode characteristics under Forward & Reverse bias conditions.
APPARATUS REQUIRED:
S.No. Name of the Component

1
RPS
Range
Quantity Required
(0-30)V
(030)mA
(0100)A
(010)V
(01)V
Ammeter
Voltmeter
Resistor
Diode
1K , 10K
IN4007
Each 1
1
EC 6211
2015
TABULAR COLUMN:
FORWARD BIAS:
S.No.
REVERSE BIAS:
VOLTAGE
CURRENT
(In Volts)
(In mA)
S..No.
VOLTAGE
CURRENT
(In Volts)
(In A)
MODEL GRAPH
EC 6211
2015
PROCEDURE:
FORWARD BIAS:
1.
2.
3.
4.
Connect the circuit as per the diagram.

Vary the applied voltage V in steps of 0.1V.
Note down the corresponding Ammeter readings I.
Plot a graph between V & I
OBSERVATIONS
1. Find the d.c (static) resistance = V/I.
2. Find the a.c (dynamic) resistance r = V / I (r = V/ I) =
V2 V1
.
I 2 I1
3. Find the forward voltage drop = [Hint: it is equal to 0.7 for Si and 0.3 for Ge]
REVERSE BIAS:
1. Connect the circuit as per the diagram.
2. Vary the applied voltage V in steps of 1.0V.
3. Note down the corresponding Ammeter readings I.
4. Plot a graph between V & I
5. Find the dynamic resistance r = V / I.
Specification for 1N4001: Silicon Diode

Peak Inverse Voltage: 50V
Idc = 1A.
Maximum forward voltage drop at 1 Amp is 1.1 volts
The maximum reverse current @50 volts is 5 A
EC 6211
Performance
Observation
Viva
Total
2015
RESULT:
Forward and Reverse bias characteristics of the PN junction diode was studied and
Dynamic Resistance = --------------------Static Resistance = -------------------------Cut in Voltage = ----------------------------
EC 6211
2015
VIVA QESTIONS:1. Define depletion region of a diode?

2. What is meant by transition & space charge capacitance of a diode?
3. Is the V-I relationship of a diode Linear or Exponential?
4. Define cut-in voltage of a diode and specify the values for Si and Ge diodes?
5. What are the applications of a p-n diode?
6. Draw the ideal characteristics of P-N junction diode?
7. What is the diode equation?
8. What is PIV?
9. What is the break down voltage?
10. What is the effect of temperature on PN junction diodes?
EC 6211
2015
CIRCUIT DIAGRAM (ZENER DIODE)

FORWARD BIAS:
REVERSE BIAS:
EC 6211
2015
Ex.No:
CHARACTERISTICS OF ZENER DIODE
Date:
AIM:
To study the Zener diode characteristics under Forward & Reverse bias conditions.
APPARATUS REQUIRED:
S.No. Name of the Component
Range
Quantity Required
(0-30)V
RPS
Ammeter
(030) mA
Voltmeter
(030)V
Zener diode
FZ5.1
Resistor
1K
EC 6211
2015
MODEL GRAPH
EC 6211
2015
PROCEDURE:
FORWARD BIAS:
1. Connect the circuit as per the circuit diagram.
2. Vary the power supply in such a way that the readings are taken in steps of 0.1V in the
voltmeter till the needle of power supply shows 30V.
3. Note down the corresponding ammeter readings.
4. Plot the graph :V (vs) I.
REVERSE BIAS:
1. Connect the circuit as per the diagram.
2. Vary the power supply in such a way that the readings are taken in steps of 0.1V in the
voltmeter till the needle of power supply shows 30V.
3. Note down the corresponding Ammeter readings I.
4. Plot a graph between V & I
6. Find the reverse voltage Vr at Iz=20 mA.
RESULT:
Forward and Reverse bias characteristics of the Zener diode was studied and
Forward bias dynamic resistance = --------------------Zener breakdown voltage= -----------------------------
EC 6211
2015
EC 6211
2015
VIVAQUESTIONS:1. What type of temperature Coefficient does the zener diode have?
2. If the impurity concentration is increased, how the depletion width effected?
3. Does the dynamic impendence of a zener diode vary?
4. Explain briefly about avalanche and zener breakdowns?
5. Draw the zener equivalent circuit?
6. Differentiate between line regulation & load regulation?
7. In which region zener diode can be used as a regulator?
8. How the breakdown voltage of a particular diode can be controlled?
9. What type of temperature coefficient does the Avalanche breakdown has?
10. By what type of charge carriers the current flows in zener and avalanche breakdown
diodes?
EC 6211
2015
CIRCUIT DIAGRAM:
TABULAR COLUMN:
Input characteristics: VCE constant
VCE =
VBE
(Volts)
IB
( A)
VCE =
VBE
(Volts)
IB
( A)
VCE =
VBE
(Volts)
IB
( A)
EC 6211
2015
Ex.No:
CHARACTERISTICS OF CE CONFIGURATION OF BJT
Date:
AIM:
To plot the transistor characteristic of common-emitter configuration and to find the hparameters for the same.
EQUIPMENT REQUIRED:
S.No Name of the component
Range
Quantity
Power supply
(0-30)V
Ammeter
(0-10)mA,
Each 1
(0-1)mA
3
Voltmeter
(0-30)V,(0-2)V
Each 1
PROCEDURE:
i. Input characteristic:
1. Rig up the circuit as per the circuit diagram.

2. Set VCE = 5V (say), vary VBE insteps of 0.1V till the power supply VBB shows
20V and note down the corresponding IB. Repeat the above procedure for
10V, 15V etc.,
3. Plot the graph: VBE vs IB for a constant VCE.
4. Find the h-parameters: a. hrc : reverse voltage gain
b. hfc: input impedance
EC 6211
2015
MODEL GRAPH:
Input Characteristics
TABULATION:
Output characteristics: IB constant
IB =
VCE
(Volts)
IC
(mA)
IB =
VCE
(Volts)
IC
(mA)
IB =
VCE
(Volts)
IC
(mA)
EC 6211
2015
ii. Output characteristic:

2. Set IB = 20 A (say), vary VCE insteps of 1V and note down the corresponding
IC. Repeat the above procedure for 80 A, 200 A, 600 A etc.,
3. Plot the graph: VCE Vs IC for a constant IB.
4. Find the h-parameters: a. hoc : output admittance
b. hfc: forward current gain
EC 6211
2015
MODEL GRAPH:
Output Characteristics
EC 6211
Performance
Observation
Viva
Total
2015
Result:
Thus the input and output characteristics of BJT under CE configuration are obtained.
Parameters
Practical readings
hfc
hic
hrc
hoc
EC 6211
2015
EC 6211
2015
VIVA QUESTIONS:
1.
What is the range of
for the transistor?
2.
What are the input and output impedances of CE configuration?
3.
Identify various regions in the output characteristics?
4.
what is the relation between
5.
Define current gain in CE configuration?
6.
Why CE configuration is preferred for amplification?
7.
What is the phase relation between input and output?
8.
Draw diagram of CE configuration for PNP transistor?
and
EC 6211
2015
CIRCUIT DIAGRAM:
TABULAR COLUMN:
Input characteristics: VCB constant
VCB =
VEB
(Volts)
IE
(mA)
VCB =
VEB
(Volts)
IE
(mA)
VCB =
VEB
(Volts)
IE
(mA)
EC 6211
2015
Ex.No:
CHARACTERISTICS OF CB CONFIGURATION
Date:
AIM:
To plot the transistor characteristic of common-base configuration and to find the hparameters for the same.
APPARATUS REQUIRED:
S.No
Name of the component
Range
Quantity
Power supply
(0-30) V
Ammeter
(0-20)mA,
Voltmeter
(0-20)V
PROCEDURE:
i. Input characteristic:
2. Set VCB = 5V (say), vary VEB in a regular steps 0.1V till the power supply V EE
shows 20V and note down the corresponding IE. Repeat the above procedure
for 10V, 15V etc.,
3. Plot the graph: VEB Vs IE for a constant VCB.
4. Find the h-parameters: a. hrb : reverse voltage gain
b. hfb: input impedance
ii. Output characteristic:
6. Set IE = 1mA (say), vary VCB insteps of 1V and note down the corresponding
IC. Repeat the above procedure for 3mA, 6mA, 10mA etc.,
7. Plot the graph: VCB Vs IC for a constant IE.
8. Find the h-parameters: a. hob : output admittance
b. hfb: forward current gain
EC 6211
2015
MODEL GRAPH:
Input characteristics
Output characteristics: IE constant

IE =
VCB
(Volts)
IC
(mA)
IE =
VCB
(Volts)
IC
(mA)
IE =
VCB
(Volts)
IC
(mA)
EC 6211
2015
MODEL GRAPH:
Performance
Observation
Viva
Total
RESULT:
Thus the input and output characteristics of BJT under CB configuration are obtained.
Parameters
Practical readings
hfb
hib
hrb
hob
EC 6211
2015
CIRCUIT DIAGRAM:
PIN DIAGRAM:
BOTTOM VIEW OF BFW10:
SPECIFICATION:
Voltage : 30V, IDSS > 8mA.
EC 6211
2015
Ex.No:
CHARACTERISTICS OF JUNCTION FIELD EFFECT TRANSISTOR
Date:
AIM:
To Plot the characteristics of given FET & determine r d, gm, , IDSS,VP.
APPARATUS REQUIRED:
S.No.
Range
Quantity
RPS
(0-30)V
Ammeter
(030)mA
Voltmeter
(030)V
FET
BFW10
4
5
Resistor
Bread Board
1
One Each
1k ,68K
PROCEDURE:
DRAIN CHARACTERISTICS:
2. Set the gate voltage VGS = 0V.
3. Vary VDS in steps of 1 V & note down the corresponding I D.
4. Repeat the same procedure for VGS = -1V.
5. Plot the graph VDS Vs ID for constant VGS.
EC 6211
2015
MODEL GRAPH:
TRANSFER CHARACTERISTICS:
EC 6211
2015
OBSERVATIONS
1. d.c (static) drain resistance, rD = VDS/ID.
2. a.c (dynamic) drain resistance, rd = VDS/ ID.
3. Open source impedance, YOS = 1/ rd.
2. Set the drain voltage VDS = 5 V.
3. Vary the gate voltage VGS in steps of 1V & note down the corresponding I D.
4. Repeat the same procedure for VDS = 10V.
5. Plot the graph VGS Vs ID for constant VDS.
FET PARAMETER CALCULATION:

Drain Resistancd rd =
VDS
VGS
ID
Transconductance gm =
ID
VDS
VGS
Amplification factor =rd . gm
EC 6211
2015
TABULAR COLUMN:
VGS = 0V
VDS (V)
ID(mA)
VGS = -1V
VDS (V)
ID(mA)
VDS =5volts
VGS (V)
ID(mA)
VDS = 10volts
VGS (V)
ID(mA)
EC 6211
Performance
Observation
Viva
Total
2015
RESULT:
Thus the Drain & Transfer characteristics of given FET is Plotted.
Rd =
gm =
=
IDSS =
Pinch off voltage VP =
EC 6211
2015
EC 6211
2015
VIVA QUESTIONS:
1. What are the advantages of FET?
2. Different between FET and BJT?
3. Explain different regions of V-I characteristics of FET?
4. What are the applications of FET?
5. What are the types of FET?
6. Draw the symbol of FET.
7. What are the disadvantages of FET?
8. What are the parameters of FET?
EC 6211
2015
SCR CIRCUIT DIAGRAM:
MODEL GRAPH:
IA
(mA)
IL
Negative resistance region
IH
VBO
VAK (VOLTS)
TABULAR COLUMN:
VAK (volts)
IA (mA)
EC 6211
2015
Ex.No:
CHARACTERISTICS OF SCR
Date:
AIM:
To find the latching and holding current for a given SCR.
APPARATUS REQUIRED:
S.No Name of the component
Range
Quantity
(0-30)V
1.
Power supply
2.
SCR
3.
Resistor
1K
4.
Ammeter
(0-30)mA
5.
Voltmeter
(0-30)V
6.
Bread Board
PROCEDURE FOR SCR:

2. Set gate current IG equal to firing current, vary anode to cathode voltage V AK in steps
of 0.5V and note down the corresponding anode current IA.
3. VBO is the point where the SCR voltage (VAK) suddenly drops and sudden increase
anode current IA.
4. Note down the current at that point called latching current.
5. Increase the VAK insteps of 1V till its maximum.
6. Open the gate terminal and decrease the anode voltage VAK.
7. Holding current is the current below, which the deflection in both voltmeter (V AK)
and an ammeter (IA) suddenly reduces to zero.
8. Holding current is the minimum current that a SCR can maintain its condition.
Holding current always less than latching current.
EC 6211
2015
EC 6211
Performance
Observation
Viva
Total
2015
RESULT:
Thus the characteristics of SCR verified and graph were drawn.
Parameters
Practical readings
Peak voltage
Valley voltage
EC 6211
2015
Clipper Circuit Diagram
EC 6211
2015
Ex.No:
CLIPPER AND CLAMPER
Date:
AIM:
To design and construct the clipper, clamper, integrator, differentiator circuits and draw
the waveforms.
APPARATUS REQUIRED:
S.No
APPARATUS REQUIRED
Resistors
RANGE
Diode
QUANTITY
1K
1N4007
Power supply
0-30V
Capacitors
0.1 F
CRO
(0 -30)MHz
Bread board
CRO Probes
8.
Signal generator
(0-2)MHz
9.
Bread Board
Procedure:
1.Ring up the circuit as per the circuit diagram.
2. Set input signal voltage (say 5V, 1 k Hz) using signal generator.
3. Observe the output waveform using CRO (DC mode).
4. Sketch the observed waveform on the graph sheet.
EC 6211
2015
EC 6211
2015
EC 6211
2015
Clamper circuit diagram
Tabulation:
Amplitude (volts)
Time(sec)
EC 6211
Performance
Observation
Viva
Total
2015
RESULT:
Thus Clipper and Clamper circuits were constructed and their output was obtained.
EC 6211
2015
Circuit diagram:
Without Filter:-
With Filter:-
EC 6211
2015
Ex.No:
FULL WAVE RECTIFIER
Date:
Aim:
To construct a full wave rectifier and to measure DC voltage under load and to calculate
the ripple factor.
Apparatus Required:
S.No.
Name of the Component / Apparatus
1
2
Transformer
Diode
Resistor
4
5
6
7
Capacitor
CRO
Bread Board
Connecting wires
Specification / Range Quantity

(9 0 9 ) V
1N4007
2
2
1k
47F
(0-30)MHz
-
1
1
1
EC 6211
2015
Model Graph:
EC 6211
2015
Procedure:
Connections are given as per the circuit diagram without filter.
Note the amplitude and time period of the input signal at the secondary winding of the
transformer and rectified output.
Repeat the same steps with the filter and measure Vdc.
Calculate the ripple factor.
Draw the graph for voltage versus time.
as no such means is provided.
EC 6211
2015
Tabulation:
Input Signal
S.No
Output Signal
Condition
Amplitude
Without Filter
With Filter
Time
Amplitude
Time
EC 6211
Performance
Observation
Viva
Total
2015
RESULT:
Thus the full wave rectifier was constructed and its input and output waveforms are
drawn.
Theoretical
Practical
DC Voltage
Ripple Factor
EC 6211
2015
EC 6211
2015
VIVA QUESTIONS:1. Define regulation of the full wave rectifier?

2. Define peak inverse voltage (PIV)? And write its value for Full-wave rectifier?
3. If one of the diode is changed in its polarities what wave form would you get?
4. Does the process of rectification alter the frequency of the waveform?
5. What is ripple factor of the Full-wave rectifier?
6. What is the necessity of the transformer in the rectifier circuit?
7. What are the applications of a rectifier?
8. What is ment by ripple and define Ripple factor?
9. Explain how capacitor helps to improve the ripple factor?
10. Can a rectifier made in INDIA (V=230v, f=50Hz) be used in USA (V=110v, f=60Hz)?
EC 6211
2015
Circuit diagram:
Thevenins Voltage Experiment set up:
Thevenins Resistance Experiment set up:
Thevenins circuit:
EC 6211
Ex.No:
2015
VERIFICATION OF THEVENIN AND NORTON THEOREMS
Date:
AIM:
To verify the Thevenin and Norton theorem for the given circuit diagram
APPARATUS REQUIRED:
S.No
Range
Quantity
Voltmeter
(0-10)V
Ammeter
(0-10)V
Power supply
(0 30)V
Resister
1K
500,50
Each 1
PROCEDURE:
THEVENIN THEOREM
2. Measure the voltage across the load using voltmeter.
To find Thevenins voltage:
2. Remove the load resistance and measure the open circuited voltage across the output
terminal using voltmeter (Vth).
To find thevenins resistance:
2. Replace the supply by its internal resistance and open circuit the load.
EC 6211
2015
3. Using multimeter in resistance mode measure the resistance across the output
terminal (Rth).
TABULAR COLUMN: THEVENIN THEOREM
Voltage (volts)
Open circuit
Thevenins
Voltage (fig 2d)
voltage (volts)
resistance ( )
(volts)
Circuit Diagram:
Nortons Voltage Experiment Set up:
EC 6211
2015
Thevenins circuit:
1. Connect the power supply (Vth) & resistance (Rth) in series.
2. Connect the load resistance (1K ).
3. Switch on the power supply & measure the voltage drop across load resistance using
voltmeter.
4. Voltage measured should be equal to the voltage measured.
NORTON THEOREM
2. Measure the voltage across the load using voltmeter.
To find Nortons voltage:
2. Short-circuit the load resistance and measure the short-circuited current using
ammeter (INO).
To find Nortons resistance:
2. Replace the supply by its internal resistance and open circuit the load.
3. Using multimeter in resistance mode measure the resistance across the output
terminal (Rth).
To find Nortons circuit:
1. Connect the current source (INOR) and Rth in parallel.
2. Connect the load resistance (1K ).
3. Switch on the current source & measure the voltage drop across load resistance using
voltmeter.
4. Voltage measured should be equal to the voltage measured.
EC 6211
2015
Nortons Resistance Experiment Set up:
Nortons Circuit:
TABULAR COLUMN:
I1(mA)
I2(mA)
I1 + I2 (mA)
I (mA)
EC 6211
Performance
Observation
Viva
Total
2015
RESULT:
Thus the Thevenin and Notron theorem was verified.
EC 6211
2015
CIRCUIT DIAGRAM:
Circuit diagram for verification of KCL
Fig.1a Circuit diagram for verification of KCL
Circuit diagram for verification of KVL
Fig.1b Circuit diagram for verification of KVL
EC 6211
2015
VERIFICATION OF KIRCHOFFS CURRENT AND VOLTAGE LAWS
Ex.No:
Date:
AIM:
To verify Kirchhoffs Current law (KCL) and Kirchhoffs Voltage law (KVL).
APPARATUS REQUIRED:
S.No
Range
Quantity
Required
Resistor
270, 330, 3560
1 each
Ammeter
(0-10)mA
Regulated power supply(RPS)
(0-30)V
Voltmeter
(0-30)V
Bread board
PROCEDURE (KCL):
1. Connect the circuit as shown in Fig (1).
2. Switch ON the Regulated Power Supply (RPS) and set the RPS to a particular value of
voltage say 5V.
3. Record the readings of three ammeters namely I 1,I2,I3 with proper sign by taking current
entering the node as positive and leaving the node as negative in the observation
Table(1).
4. Add I2 and I3 and verify whether the added value is equal to I1. (As per KCL, I1=I2+I3).
5. Increase the RPS settings in steps of 5V up to a maximum of 25V.
6. Repeat the steps 3 to 5 by incrementing the RPS settings in terms of 5V.
EC 6211
2015
TABULAR COLUMN (KCL)
SL.NO RPS VOLTAGE (Volts)
I1 (mA)
I2 (mA)
I3 (mA)
I1= I2+I3(mA)
1
2
3
4
5
TABULAR COLUMN (KVL)
SL.NO RPS Voltage (Volts)
V1(Volts) V2 (Volts)
V3
(Volts)
V=V1+ V2 + V3
(Volts)
1
2
3
4
5
EC 6211
2015
PROCEDURE (KVL):
1. Connect the circuit as shown in Fig (2).
2. Switch ON the Regulated Power Supply (RPS) and set the RPS to a particular value of
voltage (V) say 5V.
3. Record the readings of two voltmeters namely V1, V2 and RPS Voltage in the observation
table (2).
4. Add V1 and V2 and verify whether the added value is equal to V. (as per KVL V =
V1+V2).
5. Increase the RPS settings in steps of 5V up to a maximum of 25V.
Repeat the steps 2 to 5 for each value of RPS setting.
Performance
Observation
Viva
Total
RESULT
Thus the verification of Kirchhoffs current law and Kirchhoffs voltage law is done.
EC 6211
2015
TABULAR COLUMN:
I1(m
A)
I2(m
A)
I1 + I2
(mA)
I
(mA
)
EC 6211
2015
Ex.No:
VERIFICATION OF SUPERPOSITION THEOREM
Date:
AIM:
To verify the superposition theorem
APPARATUS REQUIRED:
S.No
Range
Quantity
Ammeter
(0-10)mA
Power supply
(0-30)V
Resister
10K, 50
3,1
Bread board
PROCEDURE:
1. Connect the circuit as per the circuit diagram [fig4a]
2. Switch on the DC power supplies (10V & 5V) and note down the corresponding
ammeter readings (say I A).
3. Replace the second power supply by its internal resistance [fig4b].
4. Switch on the power supply (10V) and note down the corresponding ammeter reading
(say I1).
5. Connect back the second power supply (5V) and replace the first power supply by its
internal resistance [fig4c].
6. Switch on the power supply (5V) and note down the corresponding ammeter reading
(say I2).
7. Verify the following condition:
I = I1 + I2
EC 6211
2015
EC 6211
Performance
Observation
Viva
Total
2015
RESULT:
Thus the superposition theorem was verified.
EC 6211
2015
MAXIMUM POWER TRANSFER CIRCUIT DIAGRAM:
TABULAR COLUMN:
S.No.
Resistance RL ()
Current IL (mA)
Power P=IL2 RL
EC 6211
2015
Ex.No:
VERIFICATION OF MAXIMUM POWER TRANSFER AND
RECIPROCITY THEOREM
Date:
AIM:
To verify the maximum power transfer theorem for the given circuit diagram
APPARATUS REQUIRED:
S.No
Range
Quantity
Signal generator
(0-1)MHz
Voltmeter
(0-10)V
Ammeter
(0-100)mA
PROCEDURE:
1. The circuit connections are given as per the circuit diagram.
2. Switch ON the power supply.
3. Initially set 5V as input voltage from RPS.
4. The ammeter reading is noted for various values of load resistance and the values are
tabulated.
5. The load resistance for the maximum power is obtained from the table
EC 6211
2015
Maximum Power Transfer Model Graph:
Reciprocity Theorem Circuit Diagram
Voltage & Current
Before interchanging
After interchanging
Voltage (Volts)
Current (mA)
EC 6211
Performance
Observation
Viva
Total
2015
RESULT:
Thus the maximum power transfer theorem and reciprocity theorem were verified.
EC 6211
2015
CIRCUIT DIAGRAM:
Series resonance
Calculation:
R = 600
L = 101.4mH
C = 0.01F
Tabulation:
S.No.
Frequency (KHz)
Output voltage (Volts) I = V / R (mA)
EC 6211
Ex.No:
2015
FREQUENCY RESPONSES OF SERIES AND PARALLEL
Date:
RESONANCE CIRCUITS
AIM:
To design a RLC series and parallel resonance circuit and to obtain the frequency
response.
APPARATUS REQUIRED:
S.No
Range
Quantity
Signal generator
(0-1)MHz
Voltmeter
(0-10)V
Ammeter
(0-10)mA
Resistor
1K
Capacitor
1F
Inductor
1mH
Bread board
PROCEDURE (Series Resonance):

1. The circuit connections are given as per the circuit diagram.
2. Switch ON the power supply.
3. The input is given in the form of sin wave by function generator.
4. The amplitude of the response across the resistor is noted for various frequency ranges.
5. The current is calculated and tabulated
To measure the resonance frequency:
1. Plot the graph: Current Vs frequencies.
EC 6211
2015
Model Graph :
Parallel Resonance:
Calculation:
R= 600
L = 101.4mH
C = 0.01F
EC 6211
1. Draw a horizontal line, which intersects the curve at
2015
1
times the maximum current
2
reading.
2. Lower intersected point and upper intersected point are respectively called lower cutoff frequency and upper cut-off frequency on frequency axis.
Bandwidth, BW = f2 f1
Selectivity = Bandwidth/f0 = (f2 f1)/ f0
PROCEDURE (Parallel Resonance):

2. Set input voltage, VI = 5V using signal generator and vary the frequency from (0-1M)
Hz in a regular steps.
3. Note down the corresponding output voltage and current.
Z
4. Plot the graph: Normalized impedance
Vs frequencies
Z0
To measure the resonance frequency:

1. Plot the graph: Normalized impedance
Z
Vs frequencies
Z0
2. Draw a horizontal line, which intersects the curve at
1
times the maximum current
2
reading.
3. Lower intersected point and upper intersected point are respectively called lower cutoff frequency and upper cut-off frequency on frequency axis.
Quality factor:
EC 6211
2015
Resistnace
C
R
=
=R
L
Reactance 0 L
Q0 =
MODEL GRAPH:
Tabulation:
S.No.
Frequency (KHz)
Output voltage (Volts) I = V / R (mA)
Bandwidth & selectivity:

In parallel resonance circuit, the specified points are the one at which normalized impedance
1
falls to
of its value at resonance.
2
Bandwidth, BW = f2 f1
EC 6211
2015
Selectivity = Bandwidth/f0 =(f2 f1)/ f0
Performance
Observation
Viva
Total
RESULT:
Thus the parallel and series RLC circuit was designed and the frequency response curves
were drawn.
EC 6211
2015
CIRCUIT DIAGRAM:
RC circuit diagram:
RL circuit diagram:
EC 6211
Ex.No:
2015
TRANSIENT ANALYSIS OF RL AND RC CIRCUITS
Date:
AIM:
To design a RL and RC circuit and to obtain the Steady state response.
APPARATUS REQUIRED:
S.No
Range
Quantity
Power supply
(0-10)V
Voltmeter
(0-10)V
Ammeter
(0-10)mA
Resistor
12K
Capacitor
1000F
Inductor
1mH
Bread board
PROCEDURE (Series Resonance):

2. Switch over the contact to position 1.
3. Switch on the power supply and stopwatch simultaneously.
4. Take the ammeter and voltmeter reading in a regular time interval.
5. Switch over the contact to position 2 and simultaneously reverse the polarity of ammeter.
6. Note down the reading from the ammeter and voltmeter at regular time intervals.
7. Plot the graph: voltage vs time (charging and discharging)
Current vs time (charging and discharging)
EC 6211
2015
MODEL GRAPH:
Charging graph:
Tabulation: Charging
Voltage(volts)
Time( sec)
EC 6211
2015
EC 6211
2015
Discharging graph:
Tabulation: Discharging
Voltage(volts)
Time( sec)
EC 6211
Performance
Observation
Viva
Total
2015
RESULT:
Thus the RL & RC circuit was designed and the Steady state response curves were
drawn.
EC 6211
2015
CIRCUIT DIAGRAM:
WITHOUT FILTER:
WITH FILTER:
EC 6211
2015
Ex.No:
HALF WAVE RECTIFIER
Date:
Aim:
To construct a half wave rectifier and to measure DC voltage under load and to calculate
the ripple factor.
Apparatus Required:
S.No.
1
2
Transformer
Diode
Resistor
4
5
6
7
Capacitor
CRO
Bread Board
Connecting wires

(9 0 9 ) V
1N4007
2
1
1k
100F
(0-30)MHz
-
1
1
1
EC 6211
2015
Model Graph:
Tabulation:
Input Signal
S.No
Output Signal
Condition
Amplitude
Without Filter
With Filter
Frequency
Amplitude
Frequency
EC 6211
2015
Procedure:
Performance
Observation
Viva
Total
RESULT:
Thus the half wave rectifier was constructed and its input and output waveforms are
drawn.
Theoretical
Practical
DC Voltage
Ripple Factor
EC 6211
2015
EC 6211
2015
Viva Questions and answers:

1.
In
half-wave
rectifier,
the
load
current
flows
for
only
the
.. of the input signal.

2. A half-wave rectifier is equivalent to a circuit.
3. The output of a half-wave rectifier is suitable for running ........... motors.
4. The DC output polarity from a half-wave rectifier can be reversed by reversing the
.
5. In a half wave rectifier if a resistance equal to load resistance is connected in parallel with
the diode then the circuit will .
6. The efficiency and ripple factor of a half-wave rectifier is and
..
7. The main job of a voltage regulator is to provide a nearly . output voltage.
8. In a Zener diode voltage regulator, the diode regulates so long as it is kept in
.. bias condition.
9. In Zener diode regulator, the maximum load current which can be supplied to load resistor is
limited in between .. and .
10. The percentage voltage regulation of voltage supply providing 100 V unloaded and 95 V at
full load is
EC 6211
2015
CIRCUIT DIAGRAM:
WITHOUT FILTER:
WITH FILTER:
EC 6211
2015
Ex.No:
BRIDGE WAVE RECTIFIER
Date:
Aim:
To construct a bridge wave rectifier and to measure DC voltage under load and to
calculate the ripple factor.
Apparatus Required:
S.No.
1
2
Transformer
Diode
Resistor
4
5
6
7
Capacitor
CRO
Bread Board
Connecting wires

(9 0 9 ) V
1N4007
2
4
1k
100F
(0-30)MHz
-
1
1
1
EC 6211
2015
Model Graph:
Tabulation:
Input Signal
S.No
Output Signal
Condition
Amplitude
Without Filter
With Filter
Frequency
Amplitude
Frequency
EC 6211
2015
Procedure:
Performance
Observation
Viva
Total
RESULT:
Thus the bridge wave rectifier was constructed and its input and output waveforms are
drawn.
Theoretical
Practical
DC Voltage
Ripple Factor
EC 6211
2015
EC 6211
2015
VIVAQUESTIONS:1. What is the PIV of Bridge rectifier?

2. What is the efficiency of Bridge rectifier?
3. What are the advantages of Bridge rectifier?
4. What is the difference between the Bridge rectifier and fullwaverectifier?
5. What is the o/p frequency of Bridge Rectifier?
6. What is the disadvantage of Bridge Rectifier?
7. What is the maximum secondary voltage of a transformer?
8. What are the different types of the filters?
9. What is the difference between the Bridge rectifier and half wave Rectifier?
10. What is the maximum DC power delivered to the load?

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EC 6211

CIRCUITS AND DEVICES LABORATORY MANUAL

CIRCUITS AND DEVICES LABORATORY

1. Characteristics of PN Junction Diode

CIRCUITS AND DEVICES LABORATORY MANUAL

CIRCUITS AND DEVICES LABORATORY MANUAL

S.No. Name of the Component

CIRCUITS AND DEVICES LABORATORY MANUAL

CIRCUITS AND DEVICES LABORATORY MANUAL

Connect the circuit as per the diagram.

Specification for 1N4001: Silicon Diode

CIRCUITS AND DEVICES LABORATORY MANUAL

CIRCUITS AND DEVICES LABORATORY MANUAL

VIVA QESTIONS:1. Define depletion region of a diode?

CIRCUITS AND DEVICES LABORATORY MANUAL

CIRCUIT DIAGRAM (ZENER DIODE)

CIRCUITS AND DEVICES LABORATORY MANUAL

CIRCUITS AND DEVICES LABORATORY MANUAL

CIRCUITS AND DEVICES LABORATORY MANUAL

CIRCUITS AND DEVICES LABORATORY MANUAL

CIRCUITS AND DEVICES LABORATORY MANUAL

CIRCUITS AND DEVICES LABORATORY MANUAL

CIRCUITS AND DEVICES LABORATORY MANUAL

S.No Name of the component

1. Rig up the circuit as per the circuit diagram.

CIRCUITS AND DEVICES LABORATORY MANUAL

CIRCUITS AND DEVICES LABORATORY MANUAL

ii. Output characteristic:

CIRCUITS AND DEVICES LABORATORY MANUAL

CIRCUITS AND DEVICES LABORATORY MANUAL

CIRCUITS AND DEVICES LABORATORY MANUAL

CIRCUITS AND DEVICES LABORATORY MANUAL

What is the range of

for the transistor?

What are the input and output impedances of CE configuration?

Identify various regions in the output characteristics?

what is the relation between

Define current gain in CE configuration?

Why CE configuration is preferred for amplification?

What is the phase relation between input and output?

Draw diagram of CE configuration for PNP transistor?

CIRCUITS AND DEVICES LABORATORY MANUAL

CIRCUITS AND DEVICES LABORATORY MANUAL

Name of the component

CIRCUITS AND DEVICES LABORATORY MANUAL

Output characteristics: IE constant

CIRCUITS AND DEVICES LABORATORY MANUAL

CIRCUITS AND DEVICES LABORATORY MANUAL

CIRCUITS AND DEVICES LABORATORY MANUAL

Name of the component

CIRCUITS AND DEVICES LABORATORY MANUAL

CIRCUITS AND DEVICES LABORATORY MANUAL

FET PARAMETER CALCULATION:

Amplification factor =rd . gm

CIRCUITS AND DEVICES LABORATORY MANUAL

CIRCUITS AND DEVICES LABORATORY MANUAL

CIRCUITS AND DEVICES LABORATORY MANUAL

CIRCUITS AND DEVICES LABORATORY MANUAL

CIRCUITS AND DEVICES LABORATORY MANUAL

SCR CIRCUIT DIAGRAM:

Negative resistance region

CIRCUITS AND DEVICES LABORATORY MANUAL

S.No Name of the component

PROCEDURE FOR SCR:

EC6411 Circuit & Devices Lab Manual

EC6411 Circuit & Devices Lab Manual