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Part A is Compulsory, Part B Answer Any Three

Part A
A. Draw and Explain PAL Logic.
B. Explain shift and add multipliers.
C. Write note on State reduction.
D. Write short note on Binary divider.
Part B
1. Explain The Finite State Model with neat diagram.
2. How to perform Simplification of incompletely specified machines.
3. How Array multiplier used in logic design.
4. Explain Capabilities and limitations of FSM.
5. Draw and Explain 32 bit adder for a Logic Design.

4 x 4=16

3 x 8=24

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