PIC16F877A

225/05

. -

[ PIC16F877A]

1.
(CPU),
- (ALU) .
()
, / .
.
. ,
.
. ,
() :
, , A/D .

. .

,
.

1.1. ,
Von Neumann- .
1.1.
,
, .
. ,
, ,
/.
,
/. ,

.

[ PIC16F877A] .

ALU

1.1. Von Neumann-

( Von Neumann- ), :

(CPU Central Processing Unit)

/ (I/O Input/Output Ports)

ALU

1.2. Von Neumann-

Harvard Von Neumann-,

.
. CPU
.
, 8- . ,
.

. -

[ PIC16F877A]

ALU

1.3. Harvard-

( Harvard ), :

(CPU Central Processing Unit)

/ (I/O Input/Output Ports)

ALU

1.4. Von Neumann-

, 14 ,
. Harvard
Von Neumann- .
Harvard RISC .
RISC Reduced Instruction Set Computer

[ PIC16F877A] .
/ . Von Neumann-
CISC .
Complex Instruction Set Computer .

1.2.
().
.

.
() :

CPU

, ,
.

.

1.3. /
:

A/D

D/A .

. CPU ,
.

1.4.
, n
. , .
, .

. -

[ PIC16F877A]

. ,
8 128 ,
. 8 16 .
. () 4096
(=212) 8196 (213) . 4 8 4K
8K, . 1, 2, .

. , ,
,
. ,
; .
,
, RAM (Random Access Memory).
.
, RAM .
,
, , ROM (Read Only Memory).
,
, .
, ;
ROM . ROM
, , ROM
ROM- PROM.

1.5. (CPU)
CPU , ;
, ,
, . CPU
. (
) .
, .. FSM
(Finite State Machine), CPU. ,
. , FSM
. ,
, CPU .
CPU :

- (ALU)

[ PIC16F877A] .

1.5. CPU 3 .

1. -
ALU CPU
. ,
ALU CPU. ALU
CPU CPU
(ACC). , , ALU
. , ALU ,
, 0. ,
ALU
8 , .. 8-
9- . , ALU (flg),
, .
1

8 ALU

FLAG-

1.6. (ALU)

. -

[ PIC16F877A]

2.
CPU.
ACC (),
W (Work ). ,
8- 16-. . ,
,
CPU. E . ,
(ACC).
ACC
CPU. , ACC.
ACC,
ACC , ACC
. , ACC
CPU, CPU
.
ACC,
, (PC Program Counter),
- (SP Stack Pointer), (PSW) .
PC 16-, ,
SP PSW 8- 16-.

3.
,
:

(CPU)

I/O

.
1.6 .

[ PIC16F877A] .

1.7. ,

8
CPU, I/O .
16 , CPU I/O ;
I/O .
, CPU I/O .
, I/O
CPU. CPU I/O
, . :

I/O
I/O
.

:
,
, . ,
,
.

. -

[ PIC16F877A]

1.8. CPU

4.
CPU- ,
(, ) ( 8 ), (OP
Code Operation Code). 8 256(=28) , 8-
256 . ,
1 3 , 256.
,
, 14 , 30 40
.
(IRD Instruction Register an Decoder)
CPU ,
. CPU
15. (CPU)
00000000 00001111 (=1510) +
/ . 15
01001000. /
01001000 ( ). CPU
01001000 , ,
, / (IRD). IRD
, ,
, ()
CPU .

[ PIC16F877A] .

2. PIC16F877A

2.1.
PIC 16F877A 8- RISC .
.
(FLASH) .
FLASH ,
, .
EEPROM .
,
. .
, ,
,
.
RAM .
RAM
.
PORTA, PORTB, PORTC, PORTD PORTE
. PORTA 6 , B, C D 8, PORTE 3 .
8
. , 1 (
) (255), 0.
,
, .

. CPU
.

10

. -

[ PIC16F877A]

2.1. PIC16F877A

11

[ PIC16F877A] .
2.2. CISK RISC
PIC16F877A RISC .
. Harvard
Von Neumann- ,
. Harvard , .
CPU, .
, ,
8- . PIC16F877A 14- ,
. Harvard
Von Neumann-, .
Harvard RISC .
RISC Reduced Instruction Set Computer
/ . Von Neumann-
CISC .
Complex Instruction Set Computer .
PIC16F877A RISC , , 35
( Intel- Motorola 100 ),
, .
, PIC16F877A 2:1 4:1
8 .

CPU
8

CPU

14

2.2. CISC RISC

2.3. PIC16F877A
PIC16F877A ,
, ,
. smart ,
.
EEPROM
( , ,
). ,
PIC16F877A ,
(: ,
).

12

. -

[ PIC16F877A]

2.4.

. ,
Clock. / .
OSCI,
4 Q1, Q2, Q3 Q4
. 4 (
) .

Q1 Q4.
Q1 Q4 .
(OSCI) Q1-Q4. PC
(Program Counter) .

clock

(PC)

(PC-1)

(PC+1)

(PC)

(PC+2)

(PC+1)

2.3.

2.5. (. PIPLINING - Pipelining -

, ...)
Q1, Q2, Q3 Q4.

, . , Pipelining ,
.
, .. (
),
, .

13

[ PIC16F877A] .
Q1,
(IR), Q2, Q3, Q4 ( .)
TCY0

TCY1

1. MOVlW 55h
2. MOVWF PORTB

TCY2

TCY3

TCY4

TCY5

1
2

2
3

3. CALL SUB_1
4. BSF PORTA,
NIR3 (Forced NOP)

3
4

Instruction @
address SUB_1

. SUB_1

. SUB_1
.
SUB_1+1

* ,
** ,

2.4.

TCY0
TCY1
TCY2
TCY3

TCY4
TCY5

() MOVLW 55h ( ,
)
MOVLW 55h MOVWF PORTB
MOVWF PORTB, CALL SUB_1
CALL SUB_1 BSF PORTA, BIT3.
, .. SUB_1
, .

SUB_1
SUB_1

2.1. Pipelining PIC 16F877A

2.6.
PIC16F877A 40 ( 2.5). DIP 40,
SMD DIP. DIP
Dual In Package . SMD
Surface Mount Devices
, ,
,
. / , ,
.

14

. -

[ PIC16F877A]

2.5. ( )

15

[ PIC16F877A] .
2.7.
.
, .
2.7.1.
PIC16F877A .
- (RC) , .
, XT, ,
(RC). , ,
.
XT

. 30pF,
( 2.6).

2.6. (XT)

.
.

2.7.

RC
, RC
. RC
, R, C .
,

16

. -

[ PIC16F877A]

R C . Takt/4 .
R 2.2k, ,
, , R ( : 1)
. 3k 100k.
(C=0pF),
20pF .
, 4,
. , 4,
OSC2/CLKOUT, (
A/D )

2.8.

, ,
, , . ( 2.9)

2.9.

17

[ PIC16F877A] .
,
, .

2.8. RESET
(
). ,
. , ,
.
,

.
MCLR,
(+5V). 5k
10k. ,
pull up .

2.10.

PIC16F877A :

18

, POR Power-On Reset

, MCLR
SLEEP
(WDT)
(WDT) SLEEP

. -

[ PIC16F877A]

2.11.

.
,
MCLR
. .
, RAM- ,
. SFR
() .
(PC) (0000h)
.

(Brown-out Reset)
( ),
Vdd ( 1.2V 1.8V).
72ms, . 72ms
PWRT RC .

19

[ PIC16F877A] .

VDD

VDD

VDD

2.12.

PWRT . ,
, 0V
() .
,
. ,
.
,
,
.
. ,
MCLR , ,
.

2.9.
, CPU.
Central Processing Unit,
CPU. CPU .
, .

20

. -

[ PIC16F877A]

RAM
File (f)

RAM-
.

Addr Mux

FSR .
W .

2.13.

CPU .
. ,
, :
MOVLW 0x20
, .
( . Opcode).
,
(Asembler). , CPU ,

.
, ,
CPU .
.

2.10.
(Arithmetic Logic Unit ALU)
: , ( ) .
.
shift . ,
. PIC16F877A 8- 8- .

21

[ PIC16F877A] .
, (W registar),
.
, GPR SPR. GPR
General Purposes Registers, a SPR Special Function Registers.
, W .
, ALU ( STATUS ).

. , ALU Carry (C), Digit
Carry (DC) Zero (Z) .

2.11.
Port
..
. ,
.
,
. CPU
.
. ,
. ,
.

2.14. A-

( )
, .
, TRIS
. TRIS 1, ,
. TRIS .

22

. -

[ PIC16F877A]

2.12.
PIC16F877A , , .
EEPROM GPR RAM , FLASH
.

FLASH ,
, ,
.
1024 14 ,
.

EEPROM RAM .
EEPROM 64
. EEPROM , EEADR
EEDATA . EEPROM (:
) EEPROM
.
RAM , 0x0C 0x4F,
68 . RAM GPR (
General Purpose Registers) . GPR
.

23

[ PIC16F877A] .

2.15. (4 )

24

. -

[ PIC16F877A]

2.13.
(PC) 13-
. ( )
.
2.14.
PIC16F877A 13- (Stack) 8 , 8
13 , .
, .
() ,
. ,
( CALL), a
RETURN, RETLW RETFIE ,
,
.
, PUSH POP,
, .

2.15. IN SYSTEM PROGRAMIG

,
, MCLR 13.5V,
4.5V 5.5V.
, <<data/clock>> ,
, .

25

[ PIC16F877A] .

3.

PIC16FXX
35 .
RISC ,
,
.
35 .

3.1. : 1

26

. -

[ PIC16F877A]

Flag

CLK

()

kW
Wf
fd
0W
0f

MOVLW
MOVWF
MOVF
CLRW
CLRF
SWAPF

k
f
f, d
f
f, d

W
W f
f d
0 W
0 f
f d

ADDLW
ADDWF
SUBLW
SUBWF
ANDLW
ANDWF
IORLW
IORWF
XORWF
XORLW
INCF
DECF
RLF
RRF
COMF

k
f, d
k
f, d
k
f, d
k
f, d
f, d
k
f, d
f, d
f, d
f, d
f, d

W
W f
W
W f
, W
, W f
, W
, W f
, W f
, W
( 1) f
( 1) f
f, Carry
f, Carry
f

BCF
BSF

f, b
f, b

BTFSC
BTFSS
DECFSZ

f, b
f, b
f, d

f(7:4),(3:0) f(3:0),(7:4)

W + k W
W+fd
WkW
Wfd
W .AND. k W
W .AND. f d
W .OR. k W
W .OR. f d
W .XOR. f d
W .XOR. k W
f+1f
f1f

f d

C, DC, Z
C, DC, Z
C, DC, Z
C, DC, Z
Z
Z
Z
Z
Z
Z
Z
Z
C
C
Z

b f
0 f(b)
b f
1 f(b)

b f, -0 f(b)=0
b f, -1 f(b)=1
f 1 d,
f, - 0

f, d

f, - 0

GOTO
CALL
RETURN
RETLW
RETFIE

k
k
k
-

k PC

PC TOS, k PC

TOS PC
W
k W, TOS PC
(Interrupt)
TOS PC, 1 GIE

( )
0WDT, 1TO, 1PD
Watchdog Timer
0WDT, 1TO, 0PD
Standby mode

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

Z=1
f + 1 d,
Z=1

INCFSZ

NOP
CLRWDT
SLEEP

Z
Z
Z

1
1
1
1
1
1

1, 2
2
1, 2

1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2

1 (2)
1 (2)
1 (2)

3
3
1, 2, 3

1 (2)

1, 2, 3

2
2
2
2
2

TO, PD
TO, PD

1
1
1

* I/O ,
* TMR d=1,

* PC =1,
3.2. : 2

27

[ PIC16F877A] .
3.1.
, :

(W ) f
RAM (
).
, () W
(MOVLW MOVe Literal to W), W RAM
RAM- W ( RAM-,
Z ). CLRF 0 f , CLRW 0
W . SWAPF ()
.

, PIC ,
. C, DC, Z ,
: , C
, .. ,
.
PIC- , , ,
(COMF) (RLF RRF).
,
C, ( 7) ( 0).
, C ,
.

BCF BSF, , .
, CPU ,
.

28

. -

[ PIC16F877A]

GOTO, CALL, RETURN ,
RAM 8 .
RETLW k RETURN ,
, W
. Lookup . Lookup
, ,
( ,
) .
RETLW k ,
k ( 3.3)
Lookup
Main movlw 2
call Lookup
Lookup addwf PCL, f
retlw k
retlw k1
retlw k2
retlw k3
:
:
retlw kn

3.3. Lookup

W CALL
Lookup .
addwf PCL, f, W
PCL .
W .
, W k2.

f
W
B
D
label
TOS
[]
<>

8 (
)
(Top Of Stack)

29

[ PIC16F877A] .

PIC16F877A
MOVLW
:
:
:
:
Flag ():
:
:
1:
2:

[labela] MOVLW k
8 k W
k => (W)
0 k 255
/
1
1
MOVLW 0x5A
: W=0x5A
MOVLW REGISTAR
: W=0x10 REGISTAR=0x40
: W=0x40

MOVWF

W f

:
:
:
:
Flag ():
:
:
1:

[labela] MOVWF f
W f
(W) => f
0 f 127
/
1
1
MOVWF OPTION_REG=0x20
: OPTION_REG=0x20 W=0x40
: OPTION_REG=0x40 W=0x40
MOVWF INDF
:
W=0x17, FSR=0xC2, 0xC2=0x00
:
W=0x17, FSR=0xC2, 0xC2=0x17

2:

30

. -

MOVF

[ PIC16F877A]
f d

: [labela] MOVF f,d

: f

:
:
Flag ():
:
:
1:
2:

CLRW
:
:
:
:
Flag ():
:
:
1:

CLRF

d.
d=0, W
d=1, f
d=1 f ,
Z STATUS
(f) => d
0 f 127
d =[0,1]
Z
1
1
MOVF FSR, 0
: FSR=0xC2 W=0x00
: W=0xC2 Z=0
MOVF INDF, 0
: W=0x17, FSR=0xC2
0xC2=0x00
: W=0x17, FSR=0xC2,
0xC2=0x00, Z=1

0 W
[labela] CLRW
W 0, Z STATUS 1
0 => W
Z
1
1
CLRW
: W=0x55
: W=0x00 Z=1

0 f

: [labela] CLRF f
: f 0, Z STATUS
:
:
Flag ():
:
:
1:
2:

1
0 => f
Z
1
1
CLRF STATUS
: STATUS=0xC2
: STATUS=0x00 Z=1
CLRF INDF
: FSR=0xC2, 0xC2=0x33
: FSR=0xC2, 0xC2=0x00, Z=1

31

[ PIC16F877A] .

SWAPF

(
)

: [labela] CLRF f, d
: f
:
:
Flag ():
:
:
1:
2:

ADDLW

d=0, W
d=1, f
f <0:3> => d <4:7>, f <4:7> => d <0:3>
0 f 127
d = [0,1]
/
1
1
SWAPF REG, 0
: REG=0xF3
: REG=0x3F, W=0x3F
SWAPF REG, 1
: REG=0xF3
: REG=0x3F

: [labela] ADDLW k
: W 8 k
:
:
Flag ():
:
:
1:
2:

32

W
(W) + k => W
0 k 255
C, DC, Z
1
1
ADDLW 0x15
: W=0x10
: W=0x25
ADDLW REG
: W=0x10, REG=0x37
: W=0x47

. -

ADDWF

[ PIC16F877A]
W f

: [labela] ADDWF f, d
: W f
:
:
Flag ():
:
:
1:
2:

SUBLW

d=0 W
d=1 f
(W) + f => d
0 f 127
d = [0,1]
C, DC, Z
1
1
ADDWF FSR, 0
: W=0x17, FSR=0xC2
: W=0xD9, FSR=0xC2
ADDWF INDF, 1
: W=0x17, FSR=0xC2,
0xC2=0x20
: W=0x17, FSR=0xC2,
0xC2=0x37

: [labela] SUBLW k
: W k
:
:
Flag ():
:
:
1:

W
k (W) => W
0 k 255
C, DC, Z
1
1
SUBLW 0x03
: W=0x01, C=x, Z=x
: W=0x02, C=1, Z=0
: W=0x03, C=x, Z=x
: W=0x00, C=1, Z=1

2:

: W=0x04, C=x, Z=x

: W=0xFF, C=0, Z=0
SUBLW REG
: W=0x10, REG=0x37
: W=0x27, C=1

33

[ PIC16F877A] .

SUBWF

W f

: [labela] SUBWF f, d
: W f
:
:
Flag ():
:
:
1:

d=0 W
d=1 f
(f) (W) => d
0 f 127
d=[0,1]
C, DC, Z
1
1
SUBWF REG, 1
: REG=3, W=2, C=x, Z=x
: REG=1, W=2, C=1, Z=0
: REG=2, W=2, C=x, Z=x
: REG=0, W=2, C=1, Z=1
: REG=1, W=2, C=x, Z=x
: REG=0xFF, W=2, C=0, Z=0

ANDLW

, W

: [labela] ANDLW k
: , , W k.
:
:
Flag ():
:
:
1:

2:

34

W
(W) .AND. k => W
0 k 255
Z
1
1
ANDLW 0x5F
: W=0xA3 ; 0101 1111 (0x5F)
: W=0x03 ; 1010 0011 (0xA3)
; 0000 0011
ANDLW REG
: W=0xA3 ; 1010 0011 (0xA3)
REG=0x37; 0011 0111 (0x37)
: W=0x23 ; 0010 0011 (0x23)

. -

ANDWF

[ PIC16F877A]
, W f

: [labela] ANDLW f, d
: , , W f
:
:
Flag ():
:
:
1:

2:

IORLW

d=0 W
d=1 f
(W) .AND. (f) => d
0 f 127
d=[0,1]
Z
1
1
ANDWF FSR, 1
: W=0x17, FSR=0xC2; 0001 0111 (0x17)
: W=0x17, FSR=0x02 ; 1100 0010 (0xC2)
; 0000 0010 (0xC2)
ANDWF FSR, 0
: W=0x17, FSR=0xC2; 0001 0111 (0x17)
: W=0x17, FSR=0x02 ; 1100 0010 (0xC2)
; 0000 0010 (0xC2)

, W

: [labela] IORLW k
: W 8 k ,
:
:
Flag ():
:
:
1:
2:

W
(W) .OR. k => W
0 k 255
Z
1
1
IORLW 0x35
: W=0x9A
: W=0xBF, Z=0
IORLW REG
: W=0x9A, REG=0x37
: W=0xBF, Z=0

35

[ PIC16F877A] .

IORWF

, W f

: [labela] IORLW f, d
: W f ,
:
:
Flag ():
:
:
1:
2:

XORLW

d=0 W
d=1 f
(W) .OR. (f) => d
0 f 127
d=[0,1]
Z
1
1
IORLW REG, 0
: REG=0x13, W=0x91
: REG=0x13, W=0x93, Z=0
IORLW REG, 1
: REG=0x13, W=0x91
: REG=0x93, W=0x91, Z=0

, W

: [labela] XORLW k
: W k ,
:
:
Flag ():
:
:
1:

2:

36

W
(W) .XOR. k => W
0 k 255
Z
1
1
XORLW 0xAF
: W=0xB5; 1010 1111 (0xAF)
: W=0x1A ; 1011 0101 (0xB5)
; 0001 1010 (0x1A)
XORLW REG
: W=0xAF; 1010 1111 (0xAF)
REG=0x37; 0011 0111 (0x37)
: W=0x98 ; 1001 1000 (0x98), Z=0

. -

XORWF

[ PIC16F877A]
, W f

: [labela] XORWF f, d
: W f ,
:
:
Flag ():
:
:
1:
2:

INCF

d=0 W
d=1 f
(W) .XOR. (f) => d
0 f 127
d=[0,1]
Z
1
1

( 1) f

: [labela] INCF f, d
: f 1
:
:
Flag ():
:
:
1:
2:

DECF

d=0 W
d=1 f
(f) + 1 => d
0 f 127
d=[0,1]
Z
1
1
INCF REG, 1
: REG=0xFF, Z=0
: REG=0x00, Z=1
INCF REG, 0
: REG=0x10, W=x, Z=0
: REG=0x10, W=0x11, Z=0

( 1) f

: [labela] DECF f, d
: f 1
:
:
Flag ():
:
:
1:
2:

d=0 W
d=1 f
(f) - 1 => d
0 f 127
d=[0,1]
Z
1
1
DECF REG, 1
: REG=0x01, Z=0
: REG=0x00, Z=1
INCF REG, 0
: REG=0x13, W=x, Z=0
: REG=0x10, W=0x12, Z=0

37

[ PIC16F877A] .

RLF

f, Carry

: [labela] RLF f, d
: f C (Carry)
:
:
Flag ():
:
:
1:
2:

RRF

d=0 W
d=1 f
(f<n>) => d <n+1>, (f<7>) => C, C => d<0>
0 f 127
d=[0,1]
C
1
1
RLF REG, 0
: REG=1110 0110, C=0
: REG= 1110 0110, W=11001100, C=1
RLF REG, 1
: REG=1110 0110, C=0
: REG=1100 1100, C=1

f, Carry

: [labela] RRF f, d
: f C (Carry)
:
:
Flag ():
:
:
1:
2:

38

d=0 W
d=1 f
(f<n>) => d <n-1>, (f<0>) => C, C => d<7>
0 f 127
d=[0,1]
C
1
1
RLF REG, 0
: REG=1110 0110, W=x, C=0
: REG= 1110 0110, W=0111 0011, C=0
RLF REG, 1
: REG=1110 0110, C=0
: REG=0111 0011, C=0

. -

COMF

[ PIC16F877A]
f

: [labela] COMF f, d
: f
d=0 W
d=1 f

:
:
Flag ():
:
:
1:

2:

BCF
:
:
:
:
Flag ():
:
:
1:
2:

(f) d
0 f 127
d=[0,1]
Z
1
1
COMF REG, 0
: REG=0x13; 0001 0011 (0x13)
;
: REG=0x13;----------------------------W=0xEC; 1110 1100 (0xEC)
COMF INDF, 1
: FSR=0xC2,
(FSR)=0x
: FSR=0xC2, (FSR)=0x55

b f
[labela] BCF f, b
b f
(0)=> f<b>
0 f 127
0b7
/
1
1
BCF REG, 7
: REG=0xC7; 1100 0111 (0xC7)
: REG=0x47; 0100 0111 (0x47)
BCF INDF, 3
: W=0x17. FSR=0xC2,
(FSR)=0x2F
: W=0x17, FSR=0xC2,
(FSR)=0x27

39

[ PIC16F877A] .

BSF
:
:
:
:
Flag ():
:
:
1:
2:

BTFSC

b f
[labela] BSF f, b
b f
(1)=>f<b>
0 f 127
0b7
/
1
1
BSF REG, 7
: REG=0x07; 0000 0111 (0x07)
: REG=0x87; 1000 0111 (0x87)
BSF INDF, 3
: W=0x17, FSR=0xC2,
(FSR)=0x20
: W=0x17, FSR=0xC2,
(FSR)=0x28

b f, =0

: [labela] BTFSC f, b
: b f, 0,

:
:
Flag ():
:
:
1:

40

. b ,
, ,
NOP ,
,
(f<b>)=0
0 f 127
0b7
/
1
1 2, b
LAB_01 BTFSC REG, 1 ; REG
LAB_02
; , =0
LAB_03 ........
; =0
, LAB_01
, REG 0,
LAB_03
REG , LAB_02

. -

BTFSS

[ PIC16F877A]
b f, =1

: [labela] BTFSS f, b
: b f, 1,

:
:
Flag ():
:
:
1:

DECFSZ

. b ,
, ,
NOP ,
,
(f<b>)=1
0 f 127
0b7
/
1
1 2, b
LAB_01 BTFSS REG, 1 ; REG
LAB_02
; , =1
LAB_03 ........
; =1
, LAB_01
, REG 1,
LAB_03
REG , LAB_02

f, 0

: [labela] DECFSZ f, d
: f

:
:
Flag ():
:
:
1:

d=0 W
d=1 f
=0, NOP,

(f) 1=>d
0 f 127
0b7
/
1
1 2,
LAB_01 DECFSZ CNT, 1 ; 1
LAB_02
; , =0
LAB_03 ........
; =0
, PC= LAB_01
CNT , CNT=CNT+1,
CNT=0, LAB_03.
,
.. LAB_02

41

[ PIC16F877A] .

INCFSZ

f, 0

: [labela] INCFSZ f, d
: f

:
:
Flag ():
:
:
1:

GOTO
:
:
:
:
Flag ():
:
:
1:

42

d=0 W
d=1 f
=0, NOP,

(f) + 1=>d
0 f 127
0b7
/
1
1 2,
LAB_01 INCFSZ REG, 1 ; 1
LAB_02
; , =0
LAB_03 ........
; =0
, PC= LAB_01
REG , REG=REG+1,
REG=0, LAB_03.
,
.. LAB_02

[labela] GOTO k
k
(k)=>PC <10:0> (PCLATCH <4:3>)=>PC <12:11>
0 k 2048
/
1
2
LAB_00 GOTO LAB_01 ; LAB_01
:
:
LAB_01
PC= LAB_00
PC= LAB_01

. -

CALL

[ PIC16F877A]

: [labela] CALL k
: . , (PC+1)
:
:
Flag ():
:
:
1:

RETURN
:
:
:
:
Flag ():
:
:
1:

RETLW

, 11 k,
,
(PC)+1=> (. Top Of Stack TOS)
k=>PC <10:0>, (PCLATCH <4:3>) => PC <12:11>
0 k 2048
/
1
2
LAB_01 CALL LAB_02; LAB_02
:
:
LAB_02
: PC= LAB_01, TOS ( )=x
: PC= LAB_02, TOS ( )=LAB_01

[labela] RETURN
(PC)
TOS => PC
/
/
1
2
RETURN
: PC=x, TOS=x
: PC=TOS, TOS=TOS-1

: [labela] RETLW k
: 8 k W ,
:
:
Flag ():
:
:
1:

(k)=>W; (TOS)=> PC
0 k 255
/
1
2
RETLW 0x43
: W=x, PC=x, TOS=x
: W=0x43, PC=TOS, TOS=TOS-1

43

[ PIC16F877A] .

RETFIE

(Interrupt)

: [labela] RETIE
: . TOS
:
:
Flag ():
:
:
1:

NOP

PC. (Interrupt) GIE . (. Global

Interrupt Enable GIE)
(TOS)=> PC; 1=>GIE
/
/
1
2
RETFIE
: PC=x, GIE (
STATUS = 0
: PC=TOS ( ), GIE=1

( )

:
:
:
:
Flag ():
:
:
1:

[labela] NOP
,
/
/
/
1
1
NOP
: PC=x,
: PC=x+1

CLRWDT

Watchdog Timer-

: [labela] CLRWDT
: Watchdog Timer-. Watchdog
:

:
Flag ():
:
:
1:

44

Timer-, TO PD
0=>WDT
0=>WDT
1=>TO
1=>PD
/
TO, PD
1
1
CLRWDT
: WDT =x, WDT =1:128
: WDT =0x00, WDT =0, TO=1,
PD=1, WDT =1:128

. -

SLEEP

[ PIC16F877A]
Standby mode

: [labela] SLEEP
: . . PD
:

:
Flag ():
:
:
1:

(Power Down) . TO (Time Out) . WDT

(Watchdog Timer) .
0=>WDT
0=>WDT
1=>TO
1=>PD
/
TO, PD
1
1
SLEEP
: WDT =x, WDT =x
: WDT =0x00, WDT =0, TO=1,
PD=0

45