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Internal Use Only

North/Latin America
Europe/Africa
Asia/Oceania

http://aic.lgservice.com
http://eic.lgservice.com
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LCD TV
SERVICE MANUAL
CHASSIS : LA2AF

MODEL : 32LT670H

32LT670H-UA

CAUTION

BEFORE SERVICING THE CHASSIS,


READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

P/NO : MFL67449109 (1207-REV00)

Printed in Korea

CONTENTS

CONTENTS . ............................................................................................. 2
PRODUCT SAFETY ................................................................................. 3
SPECIFICATION........................................................................................ 4
ADJUSTMENT INSTRUCTION................................................................. 6
TROUBLESHOOTING.............................................................................. 16
BLOCK DIAGRAM................................................................................... 22
EXPLODED VIEW .................................................................................. 23
SCHEMATIC CIRCUIT DIAGRAM ..............................................................

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

-2-

LGE Internal Use Only

SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by
in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

General Guidance

Leakage Current Hot Check (See below Figure)


Plug the AC cord directly into the AC outlet.

An isolation Transformer should always be used during the


servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.
Keep wires away from high voltage or high temperature parts.

Do not use a line Isolation Transformer during this check.


Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.

Leakage Current Hot Check circuit

Before returning the receiver to the customer,


always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.

Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an


electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 M and 5.2 M.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

-3-

LGE Internal Use Only

SPECIFICATION

NOTE : Specifications and others are subject to change without notice for improvement.

1. Application range

This spec sheet is applied Commercial LCD TV with LA2AE/F


chassis

2. Test condition

3. Test method

1) Performance: LGE TV test method followed


2) Demanded other specification
- Safety : UL, CSA, IEC specification
- EMC: FCC, ICES, IEC specification

Each part is tested as below without special notice.


1) Temperature : 25 C 5 C (77 F 9 F), CST : 40 C5 C
2) Relative Humidity: 65 % 10 %
3) Power Voltage
: Standard input voltage (AC 110-240 V~, 50/60 Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 5 minutes prior to
the adjustment.

4. General Specification
No

Item

Specification

Receiving System

1) ATSC / NTSC-M, 64 & 256 QAM

Available Channel

1) VHF : 02~13

Remark

2) UHF : 14~69
3) DTV : 02-69
4) CATV : 01~135
5) CADTV : 01~135
3

Input Voltage

1) AC 100 ~ 240V 50/60Hz

Market

NORTH AMERICA

Screen Size

32 inch Wide (1366 X 768)

Aspect Ratio

16:9

Tuning System

FS

Module

T320XVN01.1

Operating
Environment

1) Temp : 0 ~ 40 deg
2) Humidity : ~ 80 %

10

Storage
Environment

1) Temp : -20 ~ 60 deg


2) Humidity : ~ 85 %

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

-4-

Mark : 110V, 60Hz (N.America)


HD +60Hz

32LT670H-UA

LGD

32LT670H-UA

LGE Internal Use Only

5. RGB (PC)
No

Resolution

H-freq(kHz)

V-freq.(Hz)

Pixel clock(MHz)

Proposed

DDC

640*350

31.468

70.09

25.17

EGA

720*400

31.469

70.08

28.32

DOS

640*480

31.469

59.94

25.17

VESA(VGA)

800*600

37.879

60.31

40.00

VESA(SVGA)

1024*768

48.363

60.00

65.00

VESA(XGA)

1280*768

47.776

59.870

79.5

CVT(WXGA)

1360*768

47.712

60.015

85.50

VESA (WXGA)

6. HDMI Input
No.

Resolution

H-freq(kHz)

V-freq.(kHz)

Pixel clock(MHz)

PC

Proposed
DDC

640*350

31.468

70.09

25.17

EGA

720*400

31.469

70.08

28.32

DOS

640*480

31.469

59.94

25.17

VESA(VGA)

800*600

37.879

60.31

40.00

VESA(SVGA)

1024*768

48.363

60.00

65.00

VESA(XGA)

1280*768

47.776

59.870

79.5

CVT(WXGA)

1360*768

47.712

60.015

85.50

VESA (WXGA)

DTV
1

720*480

31.47

60

27.027

SDTV 480P

720*480

31.47

59.94

27.00

SDTV 480P

1280*720

45.00

60.00

74.25

HDTV 720P

1280*720

44.96

59.94

74.176

HDTV 720P

1920*1080

33.75

60.00

74.25

HDTV 1080I

1920*1080

33.72

59.94

74.176

HDTV 1080I

1920*1080

67.500

60

148.50

HDTV 1080P

1920*1080

67.432

59.939

148.352

HDTV 1080P

1920*1080

27.000

24.000

74.25

HDTV 1080P

10

1920*1080

26.97

23.976

74.176

HDTV 1080P

11

1920*1080

33.75

30.000

74.25

HDTV 1080P

12

1920*1080

33.71

29.97

74.176

HDTV 1080P

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

-5-

LGE Internal Use Only

ADJUSTMENT INSTRUCTION
1. Application Range

This spec. sheet applies to LA2E/F Chassis applied LCD TV


all models manufactured in TV factory

4. Board Level Adjustment


4.1. ADC Adjustment
4.1.1. Overview

ADC adjustment is needed to find the optimum black level


and gain in Analog-to-Digital device and to compensate RGB
deviation.

2. Specification

(1) Because this is not a hot chassis, it is not necessary to


use an isolation transformer. However, the use of isolation
transformer will help protect test instrument.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of
25 5 C of temperature and 6510% of relative humidity if
there is no specific designation.
(4) The input voltage of the receiver must keep 100~240V,
50/60Hz.
(5) At first Worker must turn on the SET by using Power Only
key.
(6) The receiver must be operated for about 5 minutes prior to
the adjustment when module is in the circumstance of over
15 C
In case of keeping module is in the circumstance of 0C, it
should be placed in the circumstance of above 15C for 2
hours
In case of keeping module is in the circumstance of below
-20C, it should be placed in the circumstance of above
15C for 3 hours.

4.1.2. Equipment & Condition

(1) Protocol: RS-232C


(2) Inner Pattern
- Resolution : 1080p (Inner Pattern)
- Resolution : 1024*768 RGB (Inner Pattern)
- Pattern : Horizontal 100% Color Bar Pattern
- Pattern level : 0.70.1 Vp-p

4.1.3. Adjustment

4.1.3.1. Adjustment method


- Using RS-232, adjust items listed in 3.1 in the other shown
in 4.1.3.3
4.1.3.2. Adj. protocol

[Caution]
When still image is displayed for a period of 20 minutes or
longer (especially where W/B scale is strong.
Digital pattern 13ch and/or Cross hatch pattern 09ch), there
can some afterimage in the black level area

Protocol

Command

Set ACK

Enter adj. mode

aa 00 00

a 00 OK00x

Source change

xb 00 40
xb 00 40

Begin adj.

3.1 Board Level Adjustment


(1) Adjust RGB (ADC)
(2) EDID/DDC download

3.2. Final assembly adjustment


(1) White Balance adjustment
(2) RS-232C functionality check
(3) Factory Option setting per destination
(4) Shipment mode setting (In-Stop)

OKx (Case of Success)


NGx (Case of Fail)
(main)
ad 00 20

(main)
000000000000000000000000007c007b006dx

(sub )
ad 00 21

(Sub)
000000070000000000000000007c00830077x

Confirm adj.

ad 00 99

NG 03 00x (Fail)
NG 03 01x (Fail)
NG 03 02x (Fail)
OK 03 03x (Success)

End adj.

aa 00 90

a 00 OK90x

3. Adjustment items

Above adjustment items can be also performed in Final


Assembly if needed. Both Board-level and Final assembly
adjustment items can be check using In-Start Menu 1.
ADJUST CHECK.
RGB-PC Adjust will be calculated by 480i adjust value.

ad 00 10

Return adj. result


Read adj. data

b 00 OK40x (Adjust 1080i Comp1 )


b 00 OK60x (Adjust 1024*768 RGB)

Ref.) ADC Adj. RS232C Protocol_Ver1.0


4.1.3.3. Adj. order
aa 00 00 [Enter ADC adj. mode]
xb 00 40 [Change input source to Component1(1080i)]
ad 00 10 [Adjust 480i Comp1]
xb 00 60 [Change input source to RGB(1024*768)]
ad 00 10 [Adjust 1024*768 RGB]
ad 00 90 End adj.

3.3. Etc

(1) Shipment conditions


(2) Service Option Default
(3) USB Download (S/W Update, Option and Service only)
(4) ISP Download (Optional)

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

-6-

LGE Internal Use Only

5. Manual Adjustment

5.2.4. EDID DATA

5.2.4.1. North America


(1) FHD Model - 8Bit

5.1. ADC Adjustment


5.1.1. Overview

ADC adjustment is needed to find the optimum black level


and gain in Analog-to-Digital device and to compensate RGB
deviation

5.1.2. Equipment & Condition

HDMI 1-FHD-10BIT (C/S : 989B)


EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------------0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 | 0F 50 54 A1 08 00 81 80 61 40 45 40 31 40 01 01
30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 39
60 | 3F 1F 52 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 98

(1) Adjust Remocon


(2) 8 01GF(802B, 802F, 802R) or MSPG925FA Pattern
Generator
- Resolution : 4 80i Comp1 (MSPG-925FA: model-209,
pattern-65)
- Resolution : 1024*768 RGB (Inner Pattern)
- Pattern : Horizontal 100% Color Bar Pattern
- Pattern level: 0.70.1 Vp-p
- Image

EDID Block 1, Bytes 128-255 [80H-FFH]

- or Inner pattern
(3) Must use standard cable

0 1 2 3 4 5 6 7 8 9 A B C D E F
------------------------------------------------------------------------------0 | 02 03 1C F1 47 90 22 20 05 04 03 02 23 09 57 07
10 | 67 03 0C 00 10 00 B8 2D E3 05 03 01 02 3A 80 18
20 | 71 38 2D 40 58 2C 04 05 40 84 63 00 00 1E 01 1D
30 | 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E
40 | 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00
50 | 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84
60 | 63 00 00 18 26 36 80 A0 70 38 1F 40 30 20 25 00
70 | 40 84 63 00 00 1A 00 00 00 00 00 00 00 00 00 9B

5.1.3. Adjust method

5.1.3.1. ADC RGB


(1) Press the In-start Key on the ADJ remote after at least 1
min of signal reception. Then, select ADC Calibration. And
Press OK Button on the menu Start. The adjustment will
start automatically.
(2) I f ADC RGB is successful, ADC RGB Success is
displayed and ADC RGB is completed.
If ADC calibration is failure, ADC RGB Fail is displayed.
(3) If ADC calibration is failure, after rechecking ADC pattern
or condition, retry calibration

5.2. EDID/DDC Download(EDID PCM)

HDMI 2-FHD-10BIT (C/S : 988B)


EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------------0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 | 0F 50 54 A1 08 00 81 80 61 40 45 40 31 40 01 01
30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 39
60 | 3F 1F 52 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 98

EDID Block 1, Bytes 128-255 [80H-FFH]

5.2.1. Overview

- I t is a VESA regulation. A PC or a MNT will display an


optimal resolution through information sharing without any
necessity of user input. It is a realization of Plug and Play.

5.2.2. Equipment

(1) Adjust remocon.


(2) Since embedded EDID data is used, EDID download JIG,
HDMI cable and D-sub cable are not need

5.2.3. Download method

0 1 2 3 4 5 6 7 8 9 A B C D E F
------------------------------------------------------------------------------02 03 1C F1 47 90 22 20 05 04 03 02 23 09 57 07
10 | 67 03 0C 00 20 00 B8 2D E3 05 03 01 02 3A 80 18
20 | 71 38 2D 40 58 2C 04 05 40 84 63 00 00 1E 01 1D
30 | 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E
40 | 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00
50 | 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84
60 | 63 00 00 18 26 36 80 A0 70 38 1F 40 30 20 25 00
70 | 40 84 63 00 00 1A 00 00 00 00 00 00 00 00 00 8B

(1) Press Adj. key on the Adj. R/C.


(2) Select EDID D/L menu.
(3) By pressing Enter key, EDID download will begin
(4) If Download is successful, OK is display, but If Download is
failure, NG is displayed.
(5) If Download is failure, Re-try downloads.
[Caution] : When EDID Download, must remove RGB/HDMI
Cable.

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

-7-

LGE Internal Use Only

HDMI 3-FHD-10BIT (C/S : 987B)


EDID Block 0, Bytes 0-127 [00H-7FH]

EDID Block 1, Bytes 128-255 [80H-FFH]

0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------------0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 | 0F 50 54 A1 08 00 81 80 61 40 45 40 31 40 01 01
30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 39
60 | 3F 1F 52 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 98

0 1 2 3 4 5 6 7 8 9 A B C D E F
------------------------------------------------------------------------------0 | 02 03 1C F1 47 90 22 20 05 04 03 02 23 09 57 07
10 | 67 03 0C 00 10 00 80 1E E3 05 03 01 02 3A 80 18
20 | 71 38 2D 40 58 2C 04 05 40 84 63 00 00 1E 01 1D
30 | 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E
40 | 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00
50 | 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84
60 | 63 00 00 18 26 36 80 A0 70 38 1F 40 30 20 25 00
70 | 40 84 63 00 00 1A 00 00 00 00 00 00 00 00 00 E2

EDID Block 1, Bytes 128-255 [80H-FFH]

HDMI 2-FHD-8BIT (C/S : 98D2)


EDID Block 0, Bytes 0-127 [00H-7FH]

0 1 2 3 4 5 6 7 8 9 A B C D E F
------------------------------------------------------------------------------0 | 02 03 1C F1 47 90 22 20 05 04 03 02 23 09 57 07
10 | 67 03 0C 00 30 00 B8 2D E3 05 03 01 02 3A 80 18
20 | 71 38 2D 40 58 2C 04 05 40 84 63 00 00 1E 01 1D
30 | 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E
40 | 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00
50 | 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84
60 | 63 00 00 18 26 36 80 A0 70 38 1F 40 30 20 25 00
70 | 40 84 63 00 00 1A 00 00 00 00 00 00 00 00 00 7B

0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 | 0F 50 54 A1 08 00 81 80 61 40 45 40 31 40 01 01
30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 39
60 | 3F 1F 52 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 98

EDID Block 1, Bytes 128-255 [80H-FFH]

RGB-FHD (C/S : B1)


EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 16 01 03 68 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 | 0F 50 54 A1 08 00 81 80 61 40 45 40 31 40 01 01
30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 00 B1

(2) 8Bit
HDMI 1-FHD-8BIT (C/S : 98E2)
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------------0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 | 0F 50 54 A1 08 00 81 80 61 40 45 40 31 40 01 01
30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 39
60 | 3F 1F 52 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 98

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

-8-

0 1 2 3 4 5 6 7 8 9 A B C D E F
-------------------------------------------------------------------------------0 | 02 03 1C F1 47 90 22 20 05 04 03 02 23 09 57 07
10 | 67 03 0C 00 20 00 80 1E E3 05 03 01 02 3A 80 18
20 | 71 38 2D 40 58 2C 04 05 40 84 63 00 00 1E 01 1D
30 | 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E
40 | 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00
50 | 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84
60 | 63 00 00 18 26 36 80 A0 70 38 1F 40 30 20 25 00
70 | 40 84 63 00 00 1A 00 00 00 00 00 00 00 00 00 D2

HDMI 3-FHD-8BIT (C/S : 98C2)


EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
------------------------------------------------------------------------------------0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 | 0F 50 54 A1 08 00 81 80 61 40 45 40 31 40 01 01
30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 39
60 | 3F 1F 52 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 98

EDID Block 1, Bytes 128-255 [80H-FFH]


0 1 2 3 4 5 6 7 8 9 A B C D E F
------------------------------------------------------------------------------------0 | 02 03 1C F1 47 90 22 20 05 04 03 02 23 09 57 07
10 | 67 03 0C 00 30 00 80 1E E3 05 03 01 02 3A 80 18
20 | 71 38 2D 40 58 2C 04 05 40 84 63 00 00 1E 01 1D
30 | 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E
40 | 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00
50 | 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84
60 | 63 00 00 18 26 36 80 A0 70 38 1F 40 30 20 25 00
70 | 40 84 63 00 00 1A 00 00 00 00 00 00 00 00 00 C2

LGE Internal Use Only

RGB-FHD (C/S : B1)


EDID Block 0, Bytes 0-127 [00H-7FH]

EDID Block 1, Bytes 128-255 [80H-FFH]

0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------------0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 16 01 03 68 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 | 0F 50 54 A1 08 00 81 80 61 40 45 40 31 40 01 01
30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 00 B1

(3) HD Model
HDMI 1-HD (C/S : 1AE2)
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------------0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 16 01 03 80 A0 5A 78 0A CF 74 A3 57 4C B0 23
20 | 09 48 4C A1 08 00 81 C0 01 01 01 01 01 01 01 01
30 | 01 01 01 01 01 01 66 21 50 B0 51 00 1B 30 40 70
40 | 36 00 40 84 63 00 00 1E 01 1D 00 72 51 D0 1E 20
50 | 6E 28 55 00 40 84 63 00 00 1E 00 00 00 FD 00 39
60 | 3F 1F 3C 09 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 1A

EDID Block 1, Bytes 128-255 [80H-FFH]


0 1 2 3 4 5 6 7 8 9 A B C D E F
------------------------------------------------------------------------------0 | 02 03 1C F1 47 10 22 20 05 84 03 02 23 09 57 07
10 | 67 03 0C 00 10 00 80 1E E3 05 03 01 02 3A 80 18
20 | 71 38 2D 40 58 2C 04 05 40 84 63 00 00 1E 01 1D
30 | 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E
40 | 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00
50 | 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84
60 | 63 00 00 18 26 36 80 A0 70 38 1F 40 30 20 25 00
70 | 40 84 63 00 00 1A 00 00 00 00 00 00 00 00 00 E2

HDMI 2-HD (C/S : 1AD2)


EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 16 01 03 80 A0 5A 78 0A CF 74 A3 57 4C B0 23
20 | 09 48 4C A1 08 00 81 C0 01 01 01 01 01 01 01 01
30 | 01 01 01 01 01 01 66 21 50 B0 51 00 1B 30 40 70
40 | 36 00 40 84 63 00 00 1E 01 1D 00 72 51 D0 1E 20
50 | 6E 28 55 00 40 84 63 00 00 1E 00 00 00 FD 00 39
60 | 3F 1F 3C 09 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 1A

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

-9-

0 1 2 3 4 5 6 7 8 9 A B C D E F
-------------------------------------------------------------------------------0 | 02 03 1C F1 47 10 22 20 05 84 03 02 23 09 57 07
10 | 67 03 0C 00 20 00 80 1E E3 05 03 01 02 3A 80 18
20 | 71 38 2D 40 58 2C 04 05 40 84 63 00 00 1E 01 1D
30 | 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E
40 | 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00
50 | 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84
60 | 63 00 00 18 26 36 80 A0 70 38 1F 40 30 20 25 00
70 | 40 84 63 00 00 1A 00 00 00 00 00 00 00 00 00 D2

HDMI 3-HD (C/S : 1AC2)


EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
------------------------------------------------------------------------------------0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 16 01 03 80 A0 5A 78 0A CF 74 A3 57 4C B0 23
20 | 09 48 4C A1 08 00 81 C0 01 01 01 01 01 01 01 01
30 | 01 01 01 01 01 01 66 21 50 B0 51 00 1B 30 40 70
40 | 36 00 40 84 63 00 00 1E 01 1D 00 72 51 D0 1E 20
50 | 6E 28 55 00 40 84 63 00 00 1E 00 00 00 FD 00 39
60 | 3F 1F 3C 09 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 1A

EDID Block 1, Bytes 128-255 [80H-FFH]


0 1 2 3 4 5 6 7 8 9 A B C D E F
------------------------------------------------------------------------------------0 | 02 03 1C F1 47 10 22 20 05 84 03 02 23 09 57 07
10 | 67 03 0C 00 30 00 80 1E E3 05 03 01 02 3A 80 18
20 | 71 38 2D 40 58 2C 04 05 40 84 63 00 00 1E 01 1D
30 | 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E
40 | 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00
50 | 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84
60 | 63 00 00 18 26 36 80 A0 70 38 1F 40 30 20 25 00
70 | 40 84 63 00 00 1A 00 00 00 00 00 00 00 00 00 C2

RGB-HD (C/S : 6E)


EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
------------------------------------------------------------------------------------0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 16 01 03 68 A0 5A 78 0A CF 30 A3 57 4C B0 23
20 | 09 50 4E A1 08 00 81 C0 01 01 01 01 01 00 01 01
30 | 01 01 01 01 01 01 66 21 50 B0 51 00 1B 30 40 70
40 | 36 00 40 84 63 00 00 1E 01 1D 00 72 51 D0 1E 20
50 | 6E 28 55 00 40 84 63 00 00 1E 00 00 00 FD 00 39
60 | 3F 1F 3C 09 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 00 6E

LGE Internal Use Only

6. Final Assembly Adjustment

6.1.4. Adjustment Command (Protocol)


(1) RS-232C Command used during auto-adj

6.1. White Balance Adjustment

RS-232C COMMAND

6.1.1. Overview

6.1.1.1. W/B adj. Objective & How-it-works


(1) Objective: To reduce each Panels W/B deviation
(2) How-it-works: When R/G/B gain in the OSD is at 192, it
means the panel is at its Full Dynamic Range. In order to
prevent saturation of Full Dynamic range and data, one of
R/G/B is fixed at 192, and the other two is lowered to find
the desired value.
(3) Adj. condition: normal temperature
- Surrounding Temperature: 255 C
- Warm-up time: About 5 Min
- Surrounding Humidity: 20% ~ 80%
Before White balance adjustment, Keep power on status,
dont power off
6.1.1.2. Adj. condition and cautionary items
(1) Lighting condition in surrounding area surrounding lighting
should be lower 10 lux. Try to isolate adj. area into dark
surrounding.
(2) Probe location: Color Analyzer (CA-210) probe should be
within 10cm and perpendicular of the module surface
(80~ 100)
(3) Aging time
- A fter Aging Start, Keep the Power ON status during 5
Minutes.
- In case of LCD, Back-light on should be checked using no
signal or Full-white pattern.

DATA

ID

Wb

00

00

Begin White Balance adj.

Wb

00

ff

End White Balance adj.


(internal pattern disappears )

Ex) wb 00 00 -> Begin white balance auto-adj.


wb 00 10 -> Gain adj.
ja 00 ff -> Adj. data
jb 00 c0
...
...
wb 00 1f -> Gain adj. complete
*(wb 00 20(start), wb 00 2f(end)) -> Off-set adj.
wb 00 ff ->End white balance auto adj
(2) Adjustment Map
Applied Model : 26/32/37/42LT670H-UA

Medium

Warm

6.1.3. Equipment connection MAP


Color Analyzer
Probe

Adj. item

Command
(lower case ASCII)

R Gain

00

G Gain

00

C0

192

B Gain

00

C0

64

CMD1
Cool

6.1.2. Equipment

(1) Color Analyzer: CA-210 (NCG: CH 9 / WCG: CH12 / LED:


CH14)
(2) A dj. Computer(During auto adj., RS-232C protocol is
needed)
(3) Adjust Remocon
(4) V ideo Signal Generator MSPG-925F 720p/204-Gray
(Model:217, Pattern:49)
Only when internal pattern is not available
C olor Analyzer Matrix should be calibrated using
CS-1000

Explanation

CMD

RS-232C

CMD2

Data Range
(Hex.)

Default
(Decimal)

MIN

MAX

172

C0

172

R Cut

64

G Cut

64

B Cut

192

R Gain

00

C0

192

G Gain

00

C0

192

B Gain

00

C0

64

R Cut

64

G Cut

64

B Cut

192

R Gain

00

C0

192

G Gain

00

C0

172

B Gain

00

C0

64

R Cut

64

G Cut

64

Computer
RS-232C

RS-232C

Pattern Generator

Signal Source
If TV internal pattern is used, not needed

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 10 -

LGE Internal Use Only

6.1.5. Adjustment method

6.1.5.1 Auto adj. method


(1) Set TV in adj. mode using POWER ONLY (P-ONLY) key
(2) Zero calibrate probe then place it on the center of the
Display
(3) Connect Cable(RS-232C)
(4) Select mode in adj. Program and begin adj.
(5) When adj. is completed (OK Sing), check adj. status of pre
mode (Cool, Medium, Warm)
(6) Remove probe and RS-232C cable to complete adj.

6.1.6. Reference (White Balance Adj. coordinate and


color temperature)

W/B Adj. must begin as start command wb 00 00 , and


finish as end command wb 00 ff, and Adj. offset if need
6.1.5.2. Manual adj. method
(1) Set TV in Adj. mode using POWER ON
(2) Zero Calibrate the probe of Color Analyzer, then place it on
the center of LCD module within 10cm of the surface..
(3) Press ADJ key -> EZ adjust using adj. R/C -> 6. WhiteBalance then press the cursor to the right (KEY).
( When KEY() is pressed 204 Gray(80IRE) internal
pattern will be displayed)
(4) One of R Gain / G Gain / B Gain should be fixed at 192,
and the rest will be lowered to meet the desired value.
(5) Adj. is performed in COOL, MEDIUM, WARM 3 modes of
color temperature.
If internal pattern is not available, use RF input. In EZ Adj.
menu 6.White Balance, you can select one of 2 Test-pattern:
ON, OFF. Default is inner(ON). By selecting OFF, you can
adjust using RF signal in 204 Gray pattern.
Adj. condition and cautionary items
(1) Lighting condition in surrounding area
S
 urrounding lighting should be lower 10 lux. Try to isolate
adj. area into dark surrounding.
(2) Probe location : Color Analyzer (CA-210) probe should be
within 10cm and perpendicular of the module surface (80~
100)
(3) Aging time
- A fter Aging Start, Keep the Power ON status during 5
Minutes.
- In case of LCD, Back-light on should be checked using no
signal or Full-white pattern.

Luminance: 204 Gray, 80IRE


** LGD Module (over 26inch)
S tandard color coordinate and temperature using
CA-210(CH 14)

Mode

Coordinate

Temp

uv

0.2730.002

13,000K

0.0000

0.2850.002

0.2930.002

9,300K

0.0000

0.3130.002

0.3290.002

6,500K

0.0000

Cool

0.2690.002

Medium
Warm

Remark
26/32/37/
42LT670H-UA

S tandard color coordinate and temperature using


CA-210(CH 14)
Mode

Coordinate

Temp

uv

0.2730.002

13,000K

0.0000

0.2850.002

0.2930.002

9,300K

0.0000

0.3130.002

0.3290.002

6,500K

0.0000

Cool

0.2690.002

Medium
Warm

S tandard color coordinate and temperature using


CA-210(CH 14) by aging time
(1) Edge LED models (applied only LGD Module) in LGERS
GP3

Aging time
(Min)

0-2

2
3

Cool

Medium

Warm

269

273

285

293

313

329

279

288

295

308

319

338

3-5

278

286

294

306

318

336

6-9

277

285

293

305

317

335

10-19

276

283

292

303

316

333

20-35

274

280

290

300

314

330

36-49

272

277

288

297

312

327

50-79

271

275

287

295

311

325

80-149

270

274

286

294

310

324

Over 150

269

273

285

293

309

323

(2) Edge LED models (applied only LGD Module) in LGEKR


(GUMI) (wintertime)
GP3

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 11 -

Aging time
(Min)

Cool

Medium

Warm

269

273

285

293

313

329

0-2

281

293

297

313

321

343

3-5

280

290

296

310

320

340

6-9

279

289

295

309

319

339

10-19

277

286

293

306

317

333

20-35

275

282

291

302

315

332

36-49

273

278

289

298

313

328

50-79

271

276

287

296

311

326

80-149

270

274

286

294

310

324

Over 150

269

273

285

293

309

323

LGE Internal Use Only

8. AUDIO output check

6.2. Option selection per country


6.2.1. Overview

(1) O
 ption selection is only done for models in Non-USA North
America due to rating
(2) Applied model: LA2AE/F Chassis is applied in USA

6.2.2. Method

(1) P
 ress ADJ key on the Adj. R/C, and then select Country
Group Menu
(2) D
 epending on destination, select KR or US, then on the
lower Country option, select US, CA, MX.
Selection is done using +, - KEY

8.1. Audio input condition

(1) RF input: Mono, 1KHz sine wave signal, 100% Modulation


(2) CVBS, Component: 1KHz sine wave signal (0.4Vrms)
(3) RGB PC: 1KHz sine wave signal (0.7Vrms)

8.2. Specification

6.2.3. Tool Option inspection

Press Adj. key on the Adj. R/C, then select Tool option.
Model

Tool 1

Tool 2

Tool 3

Tool 4

Tool 5

COMMERCIAL
OPTION

37LT670H-UA

16389

2338

9489

17324

36

1618

LGD

42LT670H-UA

16390

2338

9489

21420

36

1618

LGD

32LT670H-UA

16388

2321

9489

17324

36

1618

LGD

26LT670H-UA

16387

290

9489

17324

36

1618

LGD

Measurement condition:
(1) RF input: Mono, 1KHz sine wave signal, 100% Modulation
(2) CVBS, Component: 1KHz sine wave signal 0.4Vrms
(3) RGB PC: 1KHz sine wave signal 0.7Vrms

6.2.4. Ship-out mode check (In-stop)

After final inspection, press In-Stop key of the Adj. R/C and
check that the unit goes to Stand-by mode

7. GND and HI-POT Test

7.1. GND & HI-POT auto-check preparation

(1) C
 heck the POWER CABLE and SIGNAL CABE insertion
condition

7.2. GND & HI-POT auto-check

(1) P
 allet moves in the station. (POWER CORD / AV CORD is
tightly inserted)
(2) Connect the AV JACK Tester.
(3) Controller (GWS103-4) on.
(4) GND Test (Auto)
- If Test is failed, Buzzer operates.
- If Test is passed, execute next process (Hi-pot test).
(Remove A/V CORD from A/V JACK BOX)
(5) HI-POT test (Auto)
- If Test is failed, Buzzer operates.
- If Test is passed, GOOD Lamp on and move to next process
automatically.

7.3. Checkpoint

(1) Test voltage


- GND: 1.5KV/min at 100mA
- SIGNAL: 3KV/min at 100mA
(2) TEST time: 1 second
(3) TEST POINT
- GND Test = POWER CORD GND and SIGNAL CABLE GND.
- Hi-pot Test = POWER CORD GND and LIVE & NEUTRAL.
(4) LEAKAGE CURRENT: At 0.5mArms

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 12 -

LGE Internal Use Only

9. USB S/W Download


(optional, Service only)

(1) Put the USB Stick to the USB socket


(2) Automatically detecting update file in USB Stick
- If your downloaded program version in USB Stick is lower
than that of TV set, it didnt work. Otherwise USB data is
automatically detected.
(3) Show the message Copying files from memory

10. Conditions ST_BY Consumption


Power
- Have to turn-off ST_BY Light
- USA 110V / 60Hz, KOREA 220V / 60Hz
(Menu -> Option -> Power Indicator -> ST_BY Light : OFF)

11. Test factor for commercial model


11.1. RJP TEST

(4) Updating is staring.

(5) Updating Completed, The TV will restart automatically


(6) If your TV is turned on, check your updated version and
Tool option.
* If downloading version is more high than your TV have, TV
can lost all channel data. In this case, you have to channel
recover. If all channel data is cleared, you didnt have a DTV/
ATV test on production line.
* After downloading, TOOL OPTION setting is needed again.
(1) Push "IN-START" key in service remote controller.
(2) Select "Tool Option 1" and Push OK button.
(3) Punch in the number. (Each model has their number.)

{Picture1}

11.1.1. Overview

Jig(Commercial Check JIG)


Power only mode

11.1.2. Test sequence

(1) C onnect the adapter to the Commercial check Jig for


supplying voltage
(2) Turn on the TV and fix the channel to 96-1
(3) Adjust each switch on left side to; adapter and 5V
(4) Turn on JIG pin No. 5. as picture 1
(5) Press the P-ONLY key for Encryption channel check
(6) Press the EXIT key
(7) Check to confirm the encryption channel
(8) Connect the LAN Cable
(9) Check RJP TEST : OK message.

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 13 -

LGE Internal Use Only

12. External Speaker Out

13. LAN Main board Check


13.1. Overview

It is LNET RF modem & FTG card

13.2. Equipment

(1) b_LAN Checker: UTC-1000 (with Cable accessory)


(2) Computer(for test result monitoring)
(3) Connection JIG

13.3. E
 quipment connection map & b_LAN
Check
Recommended Input Signal
: RF, 1kHz, Sine wave

(1) C
 onnect external speaker to speaker out port with phone
jack on TV side as below
(2) C
 heck the Max. speaker output is 1W or not. Sine wave
with 1KHz will be displayed
(3) Check Both of the signal in speaker.
(only Power -> Fived 1W Default)
-> C
 heck the input signal(1KHZ, Sine wave) and the wave
of output by utilizing oscilloscope.

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 14 -

LGE Internal Use Only

14. Serial number download

13.4. Check

13.4.1. Setting Procedure

13.4.1.1. Setting JIG


(1) C
 onnect UTC-1000 Equipment to JIG device as a like left
picture
- Connection Line:
UTC-1000 TOP1<- ->Game port(RJ21)
-> TV-LINK CFG (Phone Jack)
UTC-1000 TOP2<- ->JIG 11pin Connection
UTC-1000 RF1<- ->b_LAN RF IN
UTC-1000 LAN<- ->PC LAN Port

Connect Bar Code scan equipment and TV set by RS-232C


cable
(1) E2PROM Data Write

(2) E2PROM Data Read

13.4.1.2. Working procedure


(1) C
 onnection
UTC-1000 LAN <- -> PC LAN Port
UTC-1000 TOP1 <- -> Game port(RJ21)
-> TV-LINK CFG (Phone Jack)
UTC-1000 RF1 <- -> b_LAN RF IN
(2) Power on JIG : Switch on front of the JIG
(3) Test Start
UTC-1000 TOP2 <- -> JIG 11pin Connection
(4) Checking b-LAN MAC Address
Check whether it is same their address numbers or not
between B-LAN Label and on the pc address numbers.

Checking JIG contents


(1) C
 heck whether displaying all Pass or not at the number
3.4.6.7.9 contents of UTC-1000 on the PC
(2) Check Version 6.0 of the 1. b_LAN Application version
(3) C
 heck whether it is same their address numbers or not
between B-LAN Label and
(4) MAC Address on the pc.

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 15 -

LGE Internal Use Only

TROUBLESHOOTING
Power-Up Boot Fail Trouble Shooting guide
Check P401 All
Voltage Level (3.5V, 12V, 24V)

Check power connector and


RL_ON signal OK ?

Replace Power Board

Y
Check Q409 output Voltage(12V)

Check Q409 application circuit


Or replace Q409

Y
Check LVDS Cable

Replace Cable

Y
Check LCD Module
Control board

No OSD Trouble Shooting guide


Check P401 All
Voltage Level (3.5V, 12V, 24V)

Check power connector and


RL_ON signal OK ?

Replace Power Board

Y
Check IC5002 RESET and
UPDATE pin

Check switch SW5000, SW5001

Y
Check X5000 Clock
32.768MHz

Check X5000 application circuit


or Replace X5000

Y
Check IC5002 IIC
Communication status

Check IIC line or replace IC5002

Y
Check IR input state of IC5002
57pin

Check IR board

Y
Re-download PTC Micom

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 16 -

LGE Internal Use Only

Analog RF Video Trouble Shooting guide


Check RF cable & signal
Y
Check TU3001 Pin7
(Video output)

Y
Check tuner 5V power L3000

Replace Tuner.

Check IC5000

Replace IC5000

Y
Check tuner 3.3V power L3001

Replace L3001

Y
Check tuner 1.8V power IC3000
2pin : 1.8V

Replace IC3000

Y
Check Mstar LVDS output

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

Replace IC101

- 17 -

LGE Internal Use Only

Digital RF Trouble Shooting guide


Check RF cable & signal
Y
Check tuner 5V power L3000

Check IC5000

Replace IC5000

Y
Check IIC Signal
TU3001 Pin#3,4

Replace TU3001

Y
Check DIF Signal
TU3001 Pin#10,11

Replace TU3001

Y
Check X201
and application circuit

Replace X201

Replace IC101

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 18 -

LGE Internal Use Only

Composite Video Trouble Shooting guide


Check input signal format.
Is it supported?
Y
Check AC cable for damage
For damage or open conductor
Y
Check JK1700
Can you see the normal waveform?

Replace JK1700

Y
Check the input of Mstar(IC101).
Measure waveform at C217 because its more easy to check.
Can you see the normal waveform?
Y
This board has big problem because Main chip (Mstar) have some troubles.
After checking thoroughly all path once again, You should decide to replace Mstar or not.

HDMI Video Trouble Shooting guide


Check input signal format.
Is it supported?
Y
Check AC cable for damage
For damage or open conductor
Y
Check JK800/JK801/JK802
Can you see the normal waveform?

Replace JK800, JK801, JK802

Y
Check HDCP key NVRAM(IC103)
Power & I2C signal

Replace IC103

Y
Check the input of Mstar(IC101).
Measure waveform at R4024, R4025 because its more easy to check.
Can you see the normal waveform?
Y
This board has big problem because Main chip (Mstar) have some troubles.
After checking thoroughly all path once again, You should decide to replace Mstar or not.
Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 19 -

LGE Internal Use Only

RGB-PC Video Trouble Shooting guide


Check input signal format.
Is it supported?
Y
Check AC cable for damage
For damage or open conductor
Y
N

Check P900
Can you see the normal waveform?

Replace P900

Y
Check the input of Mstar(IC101).
Measure waveform at R4025, R4042 because its more easy to check.
Can you see the normal waveform?
Y
This board has big problem because Main chip (Mstar) have some troubles.
After checking thoroughly all path once again, You should decide to replace Mstar or not.

Analog RF Audio Trouble Shooting guide


Check RF cable & signal

Check TU3001 Pin1


(SIF output)

Replace Tuner

Y
Check Audio AMP output
L503,L504,L505,L506

Replace L503,L504,L505,L506

Y
Check IC501

Replace IC501

Y
Check C250
(SIF signal to IC101)
Y
Replace IC101
Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 20 -

LGE Internal Use Only

Composite / RGB-PC Audio in Trouble Shooting guide


Check input signal format.
Is it supported?
Y
Check AC cable for damage
For damage or open conductor
Y
N

Check JK1700, P800


Can you see the normal waveform?

Replace JK1700, P800

Y
Check the input of Mstar(IC101).
Measure waveform at C236, C237, C244, C245 because its more easy to check.
Can you see the normal waveform?
Y
Check Audio AMP output
L503,L504,L505,L506

Replace L503,L504,L505,L506

Y
This board has big problem because Main chip (Mstar) have some troubles.
After checking thoroughly all path once again, You should decide to replace Mstar or not.

HDMI Audio in Trouble Shooting guide


Check input signal format.
Is it supported?
Y
Check AC cable for damage
For damage or open conductor
Y
N

Check JK800, JK801, JK802


Can you see the normal waveform?

Replace JK800, JK801, JK802

Y
Check Audio AMP output
L503,L504,L505,L506

Replace L503,L504,L505,L506

Y
This board has big problem because Main chip (Mstar) have some troubles.
After checking thoroughly all path once again, You should decide to replace Mstar or not.
Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 21 -

LGE Internal Use Only

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

JACK PACK
at REAR

JACK PACK
at Side

RF

TMMB
-H002F
B-LAN

- 22 -

RS-232C
(SVC)

HDMI 1

HDMI 2

AV

PC Audio

RGB PC

USB

HDMI 3

SIF

TU_CVBS

IF N/P

TV-link CFG

Game control

JK1700

JK700

RX/TX

CVBS, L/R

Audio L/R

RGB/H/V

SIDE_USB_DP/DM/ +5V

Reset / IF_AGC

SDA/SCL_5V

S7LR(LGE2111A-TE)
IC101

24MHz

S/W Reset

RJP_CTRL

JK1800

Digital AMP
NTP7500L
IC1600

X-tal

JK5000

Power AMP
TPA6011A4PWPRG4
IC1800

S_FLASH (8M bit)


MX25L8006EM2I-12G
IC200

DDR2 (1 G bit)
H5TQ1G63DFR-H9C
IC1202
NAND Flash(2 G bit)
HY27UF082G2B-TPCB
IC102

DDR2 (2 G bit)
H5TQ2G63BFR-H9C
IC1201

Pro:Idom
LGDT1001
IC1209

Micom
(MSP430F5419IPZR)
IC5002

Reset Switch

I2C(SCL/SDA)

I2S

EXT_OUT

SCL, SDA_3.3V

CS ,RE,WE

PCM_A [0 7]

B_Data[0:15],

Addr.[ ], ctrl, DQS, DM

A_Data[0:15],

PM_TS_CLK,VALID,SYNC,0~7

TS_CLK,VALID,SYNC,0~7

JK1801

BLOCK DIAGRAM

LGE Internal Use Only

EXPLODED VIEW
IMPORTANT SAFETY NOTICE

900

550

A2

300

A7

120

A10

* Set + Stand
* Stand Base + Body

500

510

200

530

LV1

910

540

810

800

521

400

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by
in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 23 -

LGE Internal Use Only

IC102
NAND01GW3B2CN6E
+3.3V_Normal

+3.3V_Normal

VSS_1
NC_9

R105
1K

NC_10

OPT

CL
OPT
R104
10K

/PF_CE1
AL
PF_ALE
W
/PF_WE
WP

3.3K

R102

Q101
KRC103S
OPT

NC_11

R106
1K

C
B

/PF_WP

NC_12
NC_13
NC_14
NC_15

42

41

40

10

39

11

38
37

12

36

13

35

14
15

34

16

33

17

32

18

31

19

30

20

29

21

28

22

27

23

26

24

25

PCM_D[0-7]

I/O7

PCM_A[7]

I/O6

PCM_A[6]

I/O5

PCM_A[5]

<CHIP Config>
(I2S_OUT_BCK,I2S_OUT_MCK,PAD_PWM1PAD_PWM0)
B51_no_EJ
SB51_WOS
SB51_WS
MIPS_SPE_NO_EJ
MIPS_SPI_EJ_1
MIPS_SPI_EJ_2
MIPS_WOS
MIPS_WS

PCM_A[4]

I/O4
NC_25
NC_24
C102
10uF

NC_23

S7LR_DIVX_MS10

PCM_D[0]

W21

PCM_D[1]

AA18

PCM_D[2]

: 4b0000 Boot from 8051 with SPI flash


: 4b0001 Secure B51 without scramble
: 4b0010 Secure B51 with scramble
: 4b0100 Boot from MIPS with SPI flash
: 4b0101 Boot from MIPS with SPI flash
: 4b0110 Boot from MIPS with SPI flash
: 4b1001 Secure MIPS without scramble
: 4b1010 Scerur MIPS with SCRAMBLE

AB22

PCM_D[3]

AE20

PCM_D[4]

AA15

PCM_D[5]
PCM_D[6]

AB21

AE21

PCM_D[7]

Y15

PCM_A[0]

W20

PCM_A[0-14]

PCM_A[1]

VDD_2

V20

PCM_A[2]
+3.3V_Normal

C103
0.1uF

VSS_2

PCM_A[3]

NC_22
NC_21
NC_20

AR102

I/O3

PCM_A[3]
PCM_A[2]

I/O2

R148

AUD_MASTER_CLK

PCM_A[1]

I/O1

C112
100pF
50V

PCM_A[0]

I/O0

56

NC_18
NC_17

AB18

PCM_A[4]

AA20

PCM_A[5]

AA21

PCM_A[6]

Y19

PCM_A[7]

AB17
Y16

PCM_A[9]

AB19

AUD_SCK

PCM_A[10]

AB20

AUD_MASTER_CLK_0

PCM_A[11]

AA16

PCM_A[12]

AA19

PWM1
PWM0

22

NC_19

W22

PCM_A[8]

LED_R/BUZZ

R153

VDD_1

43

IC101
LGE2112-T8

PCM_A[13]

AC21

PCM_A[14]

AA17
Y20

/PCM_REG

1K

NC_8
C101
0.1uF

6
7

NC_26

R165
1K

NC_7
OPT

R108 1K

/PF_CE0

44

R123
OPT1K
R152
OPT1K

45

R124

/PF_OE

1b0
1b1

22
AR101

R121
1K OPT

46

PCM_A[0-7]

NC_27

1K

RB

<CHIP Config(LED_R/BUZZ)>
Boot from SPI CS1N(EXT_FLASH)
Boot from SPI_CS0N(INT_FLASH)

NC_28

R115
OPT1K
R117
OPT 1K

NC_6

47

NC_29

R118

NC_5

R109

R107

/F_RB

NC_4

3.9K

1K

NC_3

48

R116

NC_2

+3.3V_Normal
1
NAND_FLASH_1G_NUMONYX
EAN60762401
2

1K

NC_1

1K

NAND FLASH MEMORY

AB15

/PCM_OE
NC_16
+5V_Normal
R132
10K
R133
10K

AA22

/PCM_WE
/PCM_IORD

AD22
AD20

/PCM_IOWR

AD21

/PCM_CE
/PCM_IRQA

AC20
Y18

/PCM_CD

Y21

/PCM_WAIT

Y22

PCM_RST
NAND_FLASH_1G_TOSHIBA

EAN61857001
IC102-*2
K9F1G08U0D-SCB0

EAN61508001
IC102-*3
TC58NVG0S3ETA0BBBH

OPT
/CI_CD1
/CI_CD2

22

NC_2
NC_3
NC_4
NC_5
NC_6
R/B
RE
CE
NC_7
NC_8
VCC_1
VSS_1
NC_9
NC_10
CLE
ALE
WE
WP
NC_11
NC_12
NC_13
NC_14
NC_15

48

47

46

45

44

43

42

41

40

10

39

11

38

12

37

13

36

14
15
16
17

35
34
33
32

18

31

19

30

20

29

21

28

22
23
24

27
26
25

NC_29
NC_2
NC_28
NC_3
NC_27
NC_4
NC_26
NC_5
I/O7
NC_6
I/O6
R/B
I/O5
RE
I/O4
CE
NC_25
NC_7
NC_24
NC_8
NC_23
VCC_1
VCC_2
VSS_1
VSS_2
NC_9
NC_22
NC_10
NC_21
CLE
NC_20
ALE
I/O3
WE
I/O2
WP
I/O1
NC_11
I/O0
NC_12
NC_19
NC_13
NC_18
NC_14
NC_17
NC_15
NC_16

48

47

3
4

46
45

44

43

42

41

40

10

39

11

38

12

37

13

36

14
15
16
17
18
19
20
21
22
23
24

35
34
33
32
31
30
29
28
27
26
25

NC_1

NC_28

NC_2

NC_27

NC_3

NC_26

NC_4

I/O7

NC_5

I/O6

NC_6

I/O5

RY/BY

I/O4

RE

NC_25

CE

NC_24

NC_7

NC_23

NC_8

VCC_2

VCC_1

VSS_2

VSS_1

NC_22

NC_9

NC_21
NC_20
I/O3
I/O2
I/O1
I/O0
NC_19
NC_18
NC_17
NC_16

48

47
46

3
4

45

44

43

42

41

40

10

39

11

38

12

37

13

36
35

14

NC_10

34

15

CLE

33

16

ALE

32

17

WE

18

WP

31

19

NC_11

30

20

NC_12

29
28

21

NC_13

27

22

NC_14

26

23

NC_15

24

25

OPT

NC_29

USB1_OCD

U21

USB1_CTL

V21

R122

R20
T20

PCM_5V_CTL

U22

ERROR_OUT

NC_28

t o d e l e t e C I o r g a t e RJP_CTRL0
for

D4

RJP_CTRL1
PM_TXD

N25

NC_27
NC_26

PM_RXD
I/O8

MODEL_OPT_6

E4
22

R130

N24

22

R131

B8
A8

MODEL_OPT_7

I/O7

for SYSTEM/HDCP
EEPROM&URSA3

I/O6

I2C_SCL

I/O5

I2C_SDA

NC_25

RGB_DDC_SDA

NC_24

RGB_DDC_SCL

R136

22

P23

R137

22

P24

R138

22

D2

R139

22

D1

PCMDATA[1]/GPIO127
PCMDATA[2]/GPIO128
PCMDATA[3]/GPIO120
PCMDATA[4]/GPIO119

VCC_2

AR103
22

PCMDATA[5]/GPIO118
PCMDATA[6]/GPIO117

NF_CE1Z/GPIO138

PCMDATA[7]/GPIO116

NF_WPZ/GPIO198
NF_CEZ/GPIO137

PCMADR[0]/GPIO125

NF_CLE/GPIO136

PCMADR[1]/GPIO124

NF_REZ/GPIO139

PCMADR[2]/GPIO122

NF_WEZ/GPIO140

PCMADR[3]/GPIO121

NF_ALE/GPIO141

PCMADR[4]/GPIO99

NF_RBZ/GPIO142

DIMMING

VSS_2

P21

PWM1

N23
P22

PWM2

NC_22

R21

LED_B/LG_LOGO

+3.5V_ST

P20

RJP_CTRL2
NC_21

R156
A_DIM

NC_20

R157

PWM_DIM

I/O4
I/O3

10K
100

PWM0

LED_R/BUZZ
TOUCH_KEY

PWM2

C111
2.2uF

I/O2

F6

AC17

/PF_WP

AD18

/PF_CE0

AC18

/PF_CE1

AC19

/PF_OE

AD17

/PF_WE

AE17

PF_ALE

AD19

/F_RB
AR104
22

PCMADR[6]/GPIO102
PCMADR[7]/GPIO103
PCMADR[8]/GPIO108
PCMADR[9]/GPIO110
PCMADR[10]/GPIO114

GPIO_PM[0]/GPIO6
PM_UART_TX/GPIO_PM[1]/GPIO7

PCMADR[11]/GPIO112

GPIO_PM[2]/GPIO8

PCMADR[12]/GPIO104

GPIO_PM[3]/GPIO9

PCMADR[13]/GPIO107
PCMADR[14]/GPIO106

GPIO_PM[4]/GPIO10
PM_UART_RX/GPIO_PM[5]/GPIO11
PM_SPI_SCZ1/GPIO_PM[6]/GPIO12
GPIO_PM[7]/GPIO13

PCMREG_N/GPIO123

GPIO_PM[8]/GPIO14
GPIO_PM[9]/GPIO15

PCMOE_N/GPIO113
PCMWE_N/GPIO197

PM_SPI_SCZ2/GPIO_PM[10]/GPIO16
GPIO_PM[11]/GPIO17

PCMIORD_N/GPIO111
PCMIOWR_N/GPIO109

PM_SPI_SCK/GPIO1
PCMCE_N/GPIO115

PM_SPI_CZ0/GPIO_PM[12]/GPIO0

PCMIRQA_N/GPIO105
PCMCD_N/GPIO130

PM_SPI_SDI/GPIO2
PM_SPI_SDO/GPIO3

H5
POWER_DET

K6
K5

22

R134

22

R135

PM_TXD
INV_CTL
RL_ON

J6
K4

POWER_ON/OFF_1

L6

PM_RXD

C2
L5

/FLASH_WP

M6

22

R110

M5

22

R114

SUB_AMP_MUTE
PANEL_CTL

C1

PM_MODEL_OPT_0

M4
22

R142

33

R147

R154 33

R146

A2
D3 22
B2

AMP_MUTE
SPI_SCK
/SPI_CS

OPT

B1

SPI_SDI
33

R151

SPI_SDO

for SERIAL FLASH

PCMWAIT_N/GPIO100
PCM_RESET/GPIO129
TS0CLK/GPIO87
PCM2_CE_N/GPIO131
PCM2_IRQA_N/GPIO132

TS0VALID/GPIO85
TS0SYNC/GPIO86

PCM2_CD_N/GPIO135
PCM2_WAIT_N/GPIO133

TS0DATA_[0]/GPIO77

PCM2_RESET/GPIO134

TS0DATA_[1]/GPIO78
TS0DATA_[2]/GPIO79

UART1_TX/GPIO43

TS0DATA_[3]/GPIO80

UART1_RX/GPIO44

TS0DATA_[4]/GPIO81

UART2_TX/GPIO65

TS0DATA_[5]/GPIO82

UART2_RX/GPIO64

TS0DATA_[6]/GPIO83

UART3_TX/GPIO47

TS0DATA_[7]/GPIO84

UART3_RX/GPIO48
TS1CLK/GPIO98
I2C_SCKM2/DDCR_CK/GPIO72
I2C_SDAM2/DDCR_DA/GPIO71

TS1VALID/GPI96
TS1SYNC/GPIO97

DDCA_DA/UART0_TX

TS1DATA_[0]/GPIO88

DDCA_CK/UART0_RX

TS1DATA_[1]/GPIO89
TS1DATA_[2]/GPIO90

PWM0

AE18

PCMADR[5]/GPIO101

NC_23

R149
4.7K

NC_1

NC_29

C109
0.1uF

R120

22
NC_1

R143
4.7K

NAND_FLASH_1G_SS
NAND_FLASH_1G_HYNIX
EAN35669102
IC102-*1
H27U1G8F2BTR-BC

C108
0.1uF
OPT

PCMDATA[0]/GPIO126

TS1DATA_[3]/GPIO91
PWM0/GPIO66

TS1DATA_[4]/GPIO92

PWM1/GPIO67

TS1DATA_[5]/GPIO93

PWM2/GPIO68

TS1DATA_[6]/GPIO94

PWM3/GPIO69

TS1DATA_[7]/GPIO95

CI_TS_CLK
CI_TS_VAL
CI_TS_SYNC

Y14
AA10
Y12

CI_TS_DATA[0-7]

Y13

CI_TS_DATA[0]

Y11

CI_TS_DATA[1]

AA12

CI_TS_DATA[2]

AB12

CI_TS_DATA[3]

AA14

CI_TS_DATA[4]

AB14

CI_TS_DATA[5]

AA13

CI_TS_DATA[6]

AB11

CI_TS_DATA[7]

from CI SLOT

FE_TS_CLK
FE_TS_VAL_ERR
FE_TS_SYNC

AC15
AD15

FE_TS_DATA[0-7]

AC16
AD16

FE_TS_DATA[0]

AE15

FE_TS_DATA[1]

AE14

FE_TS_DATA[2]

AC13

FE_TS_DATA[3]

AC14

FE_TS_DATA[4]

AD12

FE_TS_DATA[5]

AD13

FE_TS_DATA[6]

AD14

FE_TS_DATA[7]

Internal demod out


S7LR_DIVX

IC101-*1
LGE2111-TE

C7
E6
F5
B6

PWM4/GPIO70

E5

PWM_PM/GPIO199

D5
B7

TOUCH_KEY

E7

H6
KEY1
KEY2

G5
G4

S/T_SDA
S/T_SCL

I/O1

SCART1_MUTE

22

R101

J5

22

R163

J4

22

R164

F7
AB5

SAR0/GPIO31

AB3

SAR1/GPIO32

A9

SAR2/GPIO33

F4
AB1

SAR3/GPIO34

N6

SAR4/GPIO35

AB2
AC2

NC_19

GPIO36

LVA0P

GPIO37

LVA0N

GPIO38

LVA1P

GPIO39

LVA1N

GPIO40

LVA2P

GPIO41

LVA2N

GPIO42

LVA3P

GPIO45

LVA3N

GPIO46

LVA4P

GPIO49

LVA4N

GPIO50
GPIO51

LVB0P

GPIO52

LVB0N

I2C_SCKM0/GPIO53

LVB1P

I2C_SDAM0/GPIO54

LVB1N

GPIO73

LVB2P

GPIO74

LVB2N
LVB3P

R166

NC_18
NC_17

22

R24

R168

22

R25

R169

22

T21

22

T22

R167

NC_16
SENSOR_SCL
SENSOR_SDA

I2C

22

R23

R170

LVB3N

VSYNC_LIKE/GPIO145

LVB4P
LVB4N

SPI1_CK/GPIO201

LVACKP

SPI1_DI/GPIO202

LVACKN
LVBCKP

SPI2_CK/GPIO203

LVBCKN

SPI2_DI/GPIO204
GPIO196

+3.3V_Normal

GPIO193
GPIO194

AMP_RESET

SENSOR_SCL

5V_DET_HDMI_1
5V_DET_HDMI_2
5V_DET_HDMI_4
AV_CVBS_DET
DSUB_DET
SC1/COMP1_DET
EXT_SPK_DET
RJP_CTRL3
TUNER_RESET
R171
10K
OPT

PM MODEL OPTION

MODEL_OPT_0

+3.5V_ST

MODEL_OPT_2

A0

R174
10K
TOUCH_KEY

GND

F5
B6
E5
D5
B7
E7
F7
AB5
AB3
A9
AB1
N6
AB2
AC2

GPIO36

LVA0P

GPIO37

LVA0N

GPIO38

LVA1P

GPIO39

LVA1N

GPIO40

LVA2P

GPIO41

LVA2N

GPIO42

LVA3P

GPIO45

LVA3N

GPIO46

LVA4P

GPIO49

LVA4N

GPIO50
GPIO51

LVB0P

GPIO52

LVB0N

I2C_SCKM0/GPIO53

LVB1P

I2C_SDAM0/GPIO54

LVB1N

GPIO73

LVB2P

GPIO74

LVB2N

R177
10K
PWM_BUZZ/IIC_LED

LVB3N
LVB4P
LVB4N

R178OPT 100

VCC

PM_MODEL_OPT_0
LVACKP

WP

PM_MODEL_OPT_1

A0h
A2

E6

LVB3P

R179 OPT 100


A1

C7

F4
MODEL_OPT_1
EXT12V_CTRL
EXT_PWR_DET

EEPROM
IC104
AT24C256C-SSHL-T

SCL

SDA

C104
8pF
OPT

R111

22

R112

22

I2C_SCL

R175
10K
TACT_KEY

LVACKN
LVBCKP

R176
10K
PWM_LED

LVBCKN

I2C_SDA

GPIO196
GPIO193

C106
8pF
OPT

GPIO194
GPIO195

AB25

Copyright 2012 LG Electronics. Inc. All right reserved.


Only for training and service purposes

AD25
AC24
AE23
AC23
AC22
AD23
V23
U24
V25
V24
W25
W23
AA23
Y24
AA25
AA24
AE24
AD24
Y23
W24
T25
U23
T24
T23

RXA0-

AB23

RXA0+

AC25

RXA1-

AB24

RXA1+

AD25

RXA2-

AC24

RXA2+

AE23

RXA3-

AC23

RXA3+

AC22

RXA4-

AD23

RXA4+

V23

RXB0-

U24

RXB0+

V25

RXB1-

V24

RXB1+

W25

RXB2-

W23

RXB2+

AA23

RXB3-

Y24

RXB3+

AA25

RXB4-

AA24

RXB4+

AE24

RXACK-

AD24

RXACK+

Y23

RXBCK-

W24

RXBCK+

T25

MODEL_OPT_3

U23

MODEL_OPT_4

T24

MODEL_OPT_5

T23

OLP

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

AB24

NEED TO SWAP LVDS POLARITY

I2C_SCL
SENSOR_SDA

C105
0.1uF

AC25

S7LR_DIVX_MS10
IC101
LGE2112-T8

AMP_SDA
AMP_SCL
I2C_SDA

+3.3V_Normal

AB23

R145
2.2K

2.7K

R144
2.2K

2.7K

R161

R141
1K

R160

R140
1K

GPIO195

AB25

OLP

applied on only SMALL PCB

GP3_S7LR
FLASH/EEPROM/GPIO

20110511
1
LGE Internal Use Only

TP100

MODEL OPTION

MODEL_OPT_3

OPT

0.1uF

READY

OPT

C4024

READY

OPT

0.1uF

A8

OPT

0.1uF

MODEL_OPT_7

0.1uF

READEY

0.1uF

DVB_S

READY

0.1uF

NON_DVB_S

B8

0.1uF

T24

MODEL_OPT_6

0.1uF

MODEL_OPT_5

MODEL_OPT_2

0.1uF

MODEL_OPT_7

OLED

C4019

MODEL_OPT_6

100

NON_OLED

C4013

OPT

3D

U23

0.1uF

100

R4039

MODEL_OPT_1

C4011

R4040

OPT

MODEL_OPT_5

NON_3D

MODEL_OPT_4

NON_DVB_T2 DVB_T2

C4006

MODEL_OPT_4

100

T25

C299

100

OPT

MODEL_OPT_3
MODEL_OPT_0

C292

100

OPT

R4032

AB2

C283

OPT

R4031

MODEL_OPT_2

+1.10V_VDDC

VDDC 1.05V

C280

R204

PHM_ON

C277

100

F4

PHM_OFF

10uF

R203

OPT

HD

MODEL_OPT_1

10uF

OPT

100
100

+1.10V_VDDC

FHD

C276

OPT

HIGH

LOW

AB3

C275

R201
R202

PIN NO.

10uF

MODEL_OPT_0

C228

1K

PIN NAME

HD
R226

PHM_ON
R211
1K

1K

DVB_T2
R208
1K

3D
R206

R4027 OLED 1K

1K
R291

OPT
R290

OPT

1K

MODEL OPTION

DVB_S
R4028
1K

+3.3V_Normal

VDDC : 2026mA

IC101
LGE2112-T8

G9
L204
BLM18PG121SN1D

J2
J3

CK-_HDMI1

K3

D0+_HDMI1

J1

D0-_HDMI1
D1+_HDMI1

K2
K1

D1-_HDMI1

L2

D2+_HDMI1

L3

D2-_HDMI1

R4033

DDC_SDA_1

R4034

22

T5

22

T4

DDC_SCL_1

V5

HPD1

RXACKP
RXACKN

VIFP
VIFM

RXA0P
RXA0N

IP

RXA1P

IM

RXA1N
RXA2P
RXA2N

SIFP
SIFM

AC4

ANALOG SIF
Close to MSTAR

AD3

0.1uF

0.1uF

0.1uF

0.1uF

K11
L10
M12

C232

C265

C267

M13

C4031

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

C4025

OPT

C4020

47

C4014

0 . 1 u F R4003

TU_SIF

C4012

47
1000pF

C251

S7LR_DIVX_MS10
CK+_HDMI1

0 . 1 u F R4002

OPT
C264

C250

C4043

IC101
LGE2112-T8

C4007

0.1uF

C4069
100pF

K10
C4001 10uF

IF_N_MSTAR

10uF

0.1uF

H9

C293

C258

K12

N12
P14
P15
R10
R14

AC3

R15

AVDD_AU33
+3.3V_Normal

AE3

T10
L208
BLM18PG121SN1D

L227
BLM18PG121SN1D

AD4

C240
0.1uF
C4064
0.1uF

DDCDA_CK/GPIO23

P10

C241
0.1uF

P19

FB_CORE

R4019
10K

R16
L11

HOTPLUGA/GPIO19
IF_AGC
RF_AGC

AD2

R4004

AE2

R4001

I2C_SCKM1/GPIO75
I2C_SDAM1/GPIO76

M14

MIUVDDC

R4020
0

TUNER_I2C

C4065
0.047uF
25V

W9

AVDD2P5

W10
W11
W12

TU_SDA

Close to MSTAR
Y17

HDMI

AE9

CK+_HDMI4

AC9

CK-_HDMI4

AC10

D0+_HDMI4

AD9

D0-_HDMI4
D1+_HDMI4

AC11
AD10

D1-_HDMI4

AE11

D2+_HDMI4

AD11

D2-_HDMI4

R4035

DDC_SDA_4

22

R4036

AE8

22

AD8

DDC_SCL_4

AC8

HPD4

F2

CK+_HDMI2

F3

CK-_HDMI2

G3

D0+_HDMI2

F1

D0-_HDMI2
D1+_HDMI2

G2
G1

D1-_HDMI2
D2+_HDMI2

H3

D2-_HDMI2

R4038

22

DDC_SDA_2

R6

R4037

22

U6

DDC_SCL_2

P5

HPD2

R4

CEC_REMOTE_S7

HOTPLUGB/GPIO20
RXCCKP
RXCCKN

SPDIF_IN/GPIO152
SPDIF_OUT/GPIO153

RXC1P
RXC1N

USB0_DM
USB0_DP

RXC2P
RXC2N
DDCDC_DA/GPIO28

USB1_DM
USB1_DP

DSUB_VSYNC

DSUB

DSUB_R+
DSUB_G+

R3

R228

33

C204

0.047uF

N2

R229

68

C205

0.047uF

P3

R230

33

C206

0.047uF

N3

R231

68

C207

0.047uF

N1

R232

33

C208

0.047uF

M3

R233

68

C209

0.047uF

M2

C210

1000pF

M1

2.4K

10K

R4023

SCART1_RGB/COMP1

R4026

DSUB_B+

P2

V2

SC1_ID

V3

SC1_FB
SC1_R+/COMP1_Pr+
SC1_G+/COMP1_Y+
SC1_B+/COMP1_Pb+

R253

33

C211

0.047uF

U3

R254

68

C212

0.047uF

U2

R255

33

C213

0.047uF

T1

R256

C214
C215

0.047uF
0.047uF

T2

R257

68
33

R2

R258

68

C216

0.047uF

R1

1000pF

T3

C217

SC1_SOG_IN

D6

I2S_IN_WS/GPIO149

RXD0P
RXD0N

I2S_OUT_BCK/GPIO156

RXD1P

I2S_OUT_MCK/GPIO154

RXD1N

I2S_OUT_SD/GPIO157

+2.5V_Normal

I2S_OUT_WS/GPIO155

AUR0
HSYNC0

AUL1

VSYNC0

AUR1

RIN0P

AUL2

RIN0M

AUR2

GIN0P

AUL3

GIN0M

AUR3

BIN0P

AUL4

BIN0M

AUR4

AE12

P7
R7

SIDE USB
C269
10uF

C8

C270
0.1uF

C271
0.1uF

C273
0.1uF

C274
0.1uF

C4045

D9

AVDD_AU33

B10

AUD_SCK

C9

AVDD25_PGA:13mA

AUD_MASTER_CLK_0

B9

C10

VDD33

L229
BLM18PG121SN1D

AUD_LRCH

AUD_LRCK

C236

2.2uF

R242

VDD33

AA11

C237

Y9

C238

2.2uF
2.2uF

AA9

C239

AA7

C4059

AB8

C4060

Y8

C242

2 . 2 u F OPT
2 . 2 u F OPT

Y10

C243

2.2uF

AC7

C244

2.2uF

AD7

C245

2.2uF

AVDD_MIU

SC1/COMP1_R_IN
AV_L_IN

2.2uF
2 . 2 u F OPT

L219
BLM18PG121SN1D

AV_R_IN

OPT

C4027
0.1uF

L17

L223

M17

AVSS_PGA
BLM18SG121TN1D

L16

HSYNC1
AUOUTL0
AUOUTL2

RIN1M

AUOUTL3

GIN1P

AUOUTR0

GIN1M

AUOUTR2

BIN1P

AUOUTR3

68

C223
OPT C224

0 . 0 4 7 u F W3
1000pF

W1

V6

A23

SCART1_Lout

V4

B17

EXT_L_AMP

Y7

DDR3 1.5V

TP208

W5

C23
A5

SCART1_Rout

U5

C11

EXT_R_AMP

C19
+1.5V_DDR

AVDD_DDR0:55mA

C22

SOGIN1

D14

CVBS In/OUT

SC1_CVBS_IN
AV_CVBS_IN

R244

33

C225

0 . 0 4 7 u F AA8

R245

33

C226

0.047uF

R246

33

C227

0 . 0 4 7 u F W4

OPT R4016

Y4

33 OPT C4057 0 . 0 4 7 u F AA5


Y5

R249

AV_CVBS_IN2

33

C230

0 . 0 4 7 u F AA4

TP210

Y6
AA1

DTV/MNT_VOUT
C203
1000pF
OPT

R252

68

C233

0.047uF

AB4

Close to MSTAR

BIN2P

AUVAG

BIN2M

AUVRP

SOGIN2
EARPHONE_OUTR

AE5

0.1uF

C4009

OPT

E19
E22
F8
F17

AC6

F18

AVDD_DDR1:55mA
AA6 L203
AB6 L205

10uH OPT

F19

10uH OPT

G8
H8
N22

CVBS1
CVBS2

ET_RXD[0]/RP/GPIO60

CVBS3

ET_TXD[0]/TP/GPIO57

CVBS4
CVBS5
CVBSOUT0

ET_RXD[1]/RN/GPIO63
ET_TXD[1]/LED1/GPIO56

CVBSOUT1
ET_TX_CLK/TN/GPIO59
VCOM

ET_TX_EN/GPIO58
ET_MDC/GPIO61
ET_MDIO/GPIO62

C6

N21

C5

N20
M22

A6

M21

C4

M20

SOC_RESET

F10
+3.5V_ST

B5

V15
SW200
TMUE312GAB

C3
A3
B3

ARC0
HWRESET

W16
V8
T18

RSDS Power OPT

B4
1

IRIN/GPIO4

C200
4.7uF
10V

N4
T6
N5

R210

33

C231

0.047uF

IR
HDMI_ARC
SOC_RESET

R205
100

R217
10

D200
KDS181

+1.10V_VDDC

STby 3.5V
AVDD_NODIE:7.362mA

SOC_RESET
+3.5V_ST

R200
62K

C201
0.1uF

AVDD_NODIE
L206
BLM18PG121SN1D
C286
0.1uF

Copyright 2012 LG Electronics. Inc. All right reserved.


Only for training and service purposes

E18

CVBS0

TP211

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

0.1uF

C263
10uF

C4038

C256
0.1uF

0.1uF

C253
1uF

C4036

GIN2M

C249
4.7uF

C290

AUVRM

AD5

OPT

0.1uF

E17

L202
BLM18SG121TN1D

RIN2M

D19

C281

RIN2P

ET_COL/LED0/GPIO55

AV_CVBS_IN2

D18

L209
BLM18PG121SN1D

HSYNC2

EARPHONE_OUTL
TU_CVBS

VDDC_7

GND_40

VDDC_8

GND_41

VDDC_9

GND_42

VDDC_10

GND_43

VDDC_11

GND_44

VDDC_12

GND_45

VDDC_13

GND_46

VDDC_14

GND_47
GND_49

AVDD1P0

GND_50

FB_CORE

GND_51

AVDDL_MOD

GND_52

AVDD10_LAN

GND_53

DVDD_DDR

GND_54
GND_56

AVDD2P5_ADC_1

GND_57

AVDD2P5_ADC_2

GND_58

AVDD2P5_ADC_3

GND_59

AVDD25_REF

GND_60
GND_61

AVDD25_LAN

GND_62
GND_63

AVDD_MOD_1

GND_64

AVDD_MOD_2

GND_65
GND_67

AVDD25_PGA

GND_68

AVSS_PGA

GND_69
GND_70

AVDD_NODIE

GND_71
GND_72

AVDD_DVI_USB_1

GND_73

AVDD_DVI_USB_2

GND_74

AVDD3P3_MPLL

GND_75

AVDD_DMPLL

GND_76
GND_77

DVDD_NODIE

GND_78
GND_79

AVDD_AU33

GND_80

AVDD_EAR33

GND_81
GND_82

VDDP_1

GND_83

VDDP_2

GND_84
GND_85

AVDD_LPLL_1

GND_86

AVDD_LPLL_2

GND_87
GND_88
GND_89

VDDP_NAND

GND_91
AVDD_DDR0_D_1

GND_92

AVDD_DDR0_D_2

GND_93

AVDD_DDR0_D_3

GND_94

AVDD_DDR0_C

GND_95
GND_96

AVDD_DDR1_D_1

GND_97

AVDD_DDR1_D_2

GND_98

AVDD_DDR1_D_3

GND_99
GND_100

AVDD_DDR1_C

GND_102
GND_EFUSE

GND_103
GND_104

0.1uF

V1

GND_39

EXTERNAL SPEAKER

W6

C4042

0.047uF

VDDC_6

GND_101
E9

BIN1M

GIN2P

GND_38

Close to IC with width trace

10uF

68
C221
33 OPT C222

K15

K17

C278

0 . 0 4 7 u F W2
0 . 0 4 7 u F Y3

J17

L15

10uF

33 OPT C220

V19

K16

0.1uF

0 . 0 4 7 u F AA3

GND_37

VDDC_5

AVDD25_PGA

C4046

C219

R19

W19

OPT R241

68

Y2

W7

W18

OPT R239
R240

0.047uF

V7

T19

C4070
0.1uF
16V

SC1/COMP1_L_IN

R238

33 OPT C218

VDDC_4

GND_90

AB9

COMP2

OPT R237

M19

AVDD2P5_MOD

AVDD_MIU
AA2

1uF

D8

SCART OUT
RIN1P

M7

SIDE_USB_DP

SOGIN0

VSYNC1

L7

AVDD2P5:172mA

L211
BLM18PG121SN1D

SIDE_USB_DM

HOTPLUGD/GPIO22
CEC/GPIO5

GND_36

AVDD2P5
VDD33

AC12

RXD2N
DDCDD_CK/GPIO29

U7

AVDD_NODIE

E2

RXD2P
DDCDD_DA/GPIO30

W15

AVSS_PGA

E3

HOTPLUGC/GPIO21

RXDCKN

W14

AVDD25_PGA

AMP_SDA

I2S_IN_SD/GPIO151

GND_35

VDDC_3

GND_66

AMP_SCL

I2S_IN_BCK/GPIO150

U19

CI_DET

DDCDC_CK/GPIO27

RXDCKP

VDDC_2

R297OPT 0

D7

AUDIO IN

R4024 510
R4025 510

AVDD2P5_MOD

Normal 2.5V

RXC0N

V18

22pF

RXC0P

AUL0
DSUB_HSYNC

X201
24MHzC262

22pF

I2S_I/F

H2

XOUT

AC1

1M

R5

PM_MODEL_OPT_1

AD1
R287

XIN

C261

GND_34

GND_55

TU_SCL

AD6

VDDC_1

IF_AGC_MAIN

OPT
AE6

GND_33

GND_48

AC5

DDCDA_DA/GPIO24

GND_32

AVDDLV_USB

VDD33

+3.3V_Normal

C4068
100pF

10uF

100

Normal Power 3.3V

IF_P_MSTAR
C4067
OPT

R289

S7LR_DIVX_MS10

DTV_IF

0.1uF

C284

C257

0.1uF

100

C4044

1K

Close to MSTAR
R288

FHD
R227

PHM_OFF
R212
1K

NON_DVB_T2
R209
1K

NON_3D
R207
1K

NON_OLED
R4029
1K

1K

NON_DVB_S
R4030
1K

R294

R293

1K

+1.10V_VDDC

GND_105
GND_1

GND_106

GND_2

GND_107

GND_3

GND_108

GND_4

GND_109

GND_5

GND_110

GND_6

GND_111

GND_7

GND_112

GND_8

GND_113

GND_9

GND_114

GND_10

GND_115

GND_11

GND_116

GND_12

GND_117

GND_13

GND_118

GND_14

GND_119

GND_15

GND_120

GND_16

GND_121

GND_17

GND_122

GND_18

GND_123

GND_19

GND_124

GND_20

GND_125

GND_21

GND_126

GND_22

GND_127

GND_23

GND_128

GND_24

GND_129

GND_25

GND_130

GND_26

GND_131

GND_27

GND_132

GND_28

GND_133

GND_29

GND_134

GND_30

GND_135

GND_31

GND_136

G10
G11
G12
G13
G14
G17
G18
G19
G24
H11
H12
H13
H14
H15
H16
H17
H18
H19
J9
J10
J11
J12
J13
J14
J15
J16
J18
J19
J25
K9
K13
K14
H10
K18
K19
K22
L8
L9
J8
L12
L13
L18
L19
M8
K8
M10
M11
L14
M15
M16
M18
M25
N10
N11
N13
N14
N15
N16
N17
N19
K7
P8
P9
M9
P11
P13
P16
P17
P18
P12
R8
R9
R11
R12
R13
R17
T8
T9
N7
T11
T12
T13
T14
T15
T16
T17
U8
U9
U10
U11
U12
U13
U14
U15
U16
U17
R18
V9
V10
V11
V12
V14
V17
T7
E8
R298

MIUVDDC

L228
BLM18PG121SN1D

C4071
10uF

C4062
0.1uF

C252
0.1uF

GP3_S7LR
MAIN2, HW OPT

20110511
2
LGE Internal Use Only

ST_3.5V--> 3.375V --> 3.46V


20V-->3.51V --> 3.76V (3.59V)

3.5V

10

3.5V

11

12

3.5V

13

14

GND

GND

15

16

GND/V-sync

12V

17

18

INV ON

12V

19

20

A.DIM

12V

21

22

P.DIM1

GND/P.DIM2

23

24

Err OUT

+12V/+15V
L402
MLB-201209-0120P-N2
C407
0.1uF
16V
OPT
R476
0

L402-*1
CIS21J121

25
SLIM_32~52
P401
SMAW200-H24S2

OPT
1:AK10

R440
5.6K
B

Q406
2SC3052

OPT

R489
10K

R419
1K

POWER_18_INV_CTL
R415
100

+1.5V_DDR

R426
10K

R425
100
C
R418
POWER_24_INV_CTL
6.8K

R480
100

R450
0

R448
2.7K

PD_+12V
1%
1/10W
1%
PD_+12V

1
GND

PD_+12V_PWR_DET_ON_SEMI

Power_DET

+3.5V_ST

R427
10K
OPT

POWER_18_A_DIM
0
R451

IC407
AP7173-SPG-13 HF(DIODES)

L420

Q403
RSR025P03

IN

A_DIM

PG

PWM_DIM

780 mA

0.1uF
16V

OUT

R438
22K

R434
10K

FB

R457
4.3K

SS

1/16W
R1
1%

GND

C467
560pF
50V

C475

+1.5V_DDR

C472
22uF
10V

1.5A

L403
BLM18PG121SN1D

C423
4.7uF
16V

16V

R446
10K
OPT

C445
0.1uF
16V
OPT

C437
22uF
16V

OPT

R445
C476
0.1uF
16V

2.2K
R443
10K

POWER_ON/OFF_1

R2
OPT
R490
10K

C
B

Q400
2SC3052
E

OPT

R486
4.7K

POWER_24_ERROR_OUT

EN

16V
0.1uF

C461
10uF
10V

POWER_20_ERROR_OUT
100

VCC
+3.3V_Normal
R433
10K

R606-*1
1K
PWM_PULL-DOWN_1K

[EP]

BLM18PG121SN1D

R484
0

R437

+3.3V_Normal

Max 1000mA

INV_CTL

+3.3V_Normal

ERROR_OUT

100

R420

Vout=0.8*(1+R1/R2)=1.5319

<MODULE PIN MAP>


LGD(PSU)
or LIPS

20

PD_+12V
RESET

+3.3V_Normal

R421
10K

Q405
2SC3052

R471 0
PWM_PULL-DOWN_3.9K
POWER_22_PWM_DIM
R606
3.9K
C416
OPT
0.1uF
16V

INV_ON

POWER_+24V

+3.5V_ST

OPT

POWER_20_A_DIM
0
R453

18

C412
0.1uF
16V
PD_+12V

+3.5V_ST

POWER_20_PWM_DIM

GND

OPT
OPT

VCC

+3.3V_Normal

POWER_24_PWM_DIM
R472 0

16

PD_+12V

NCP803SN293

R407
2.2K

R405
2.2K

C455
0.1uF
16V

OPT

POWER_22_A_DIM
R485
0

PIN No

Q407
2SC3052

OPT
R435
22K

R429
47K B

PANEL_CTL

POWER_24_GND
R475
0

C404
0.1uF
16V

POWER_23_GND

OPT
C402
100uF
16V

R439
33K

3.5V
GND

C408
0.1uF
16V
OPT

POWER_+24V

R430
10K

OPT
C426
68uF
35V

C418
0.1uF
50V

C474
0.1uF

PWR_DET_ON_SEMI

C425

GND

POWER_DET

0.1uF

GND

R402
100

RESET

100K
IC409
1%

24V

R482
8.2K

R404

C435

C406
0.1uF
16V

GND

1%

OPT
C401
100uF
16V

24V
GND
GND

2
1

+24V

C451
0.1uF
OPT

R403
1.5K

L404
MLB-201209-0120P-N2

C411
0.1uF
16V

4.7K
R456

24V

L407
MLB-201209-0120P-N2

R447
1.21K

S
2

R431
22K

IC408
NCP803SN293
VCC

PANEL_VCC
C443
10uF
25V

1%
1/16W

+24V

PWR ON

L407-*1
CIS21J121

THERMAL

+3.5V_ST

L404-*1
CIS21J121

NORMAL_32
P404
FM20020-24

R462
10K

NORMAL_EXPEPT_32
P403
FW20020-24S

2
Q401
2SC3052

R412

C
B

POWER_16_GND

OPT
R401
10K

RL_ON

R407-*1
3K

R488
100K

PANEL_DISCHARGE_RES
PANEL_DISCHARGE_RES

New item

Q402
R406
4.7K

+3.5V_ST

Q409
AO3407A

RT1P141C-T112

+3.5V_ST

R461
10K

R405-*1
3K

C442
10uF
16V
OPT

C438
0.1uF
16V

0.01uF
C409
C436
0.015uF
0.01uF
50V
25V

+3.5V_ST -> 3.375V

+3.5V_ST

12V -->3.58V --> 3.82V (3.68V)


18.5V-->3.5V --> 3.75V (3.59V)

0.015uF
+3.5V_ST

+12V/+15V

24V-->3.78V --> 3.92V (3.79V)

OPT
R463
10K

L412

FROM LIPS & POWER B/D

PANEL_POWER

PD_+3.5V
5%

+12V/+15V

CMO10"Lamp

AUO 10"Lamp

(PSU)

(PSU)

GND

GND

A-DIM INV_ON

VBR-A

IPS-@
(PSU)

GND

GND

INV_ON

+2.5V/+1.8V

INV_ON
+3.3V_Normal

52/60:ERROR

Err_out

NC

SHARP
(PSU)

IC402

Err_out

26/32HD:NC

+2.5V_Normal

TJ3940S-2.5V-3L

26/32/52:PWM

GND

PWM_DIM

24
23

NC

NC
NC
PWM_DIM
err_out
err_out
PWM_DIM
--> NC PWM_DIM
--> NC
NC

NC

NC

S7LR core 1.2V volt

NC

LGD edge led error-out use or not? checking is necessary...

+3.3V_Normal
10K
R428

0.1uF
16V

+3.5V_ST

C430
10uF
10V

2000 mA

VFB

1%
C489
100pF

R423
12K
1%

R2

VREG5

SS
C494
1uF
10V

3A

VBST

GND_2

C413
0.1uF
50V

SW

+5V_USB

+5V_Normal

L406
3.6uH

L425
BLM18PG121SN1D

NR8040T3R6N

NON_5V_TUNER

GND

C493
3300pF
50V

C420
22uF
16V

C492
22uF
16V
OPT

2
3

EN
15

11

PH_2

10
IC403
TPS54319TRE
9

PH_1

R410
10K

VIN

GND_1

AGND

1%

R607
11K

R1
R416
56K

THERMAL

EN

VIN_2
C431
0.1uF
16V

PH_3

THERMAL
17

[EP]GND

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2012 LG Electronics. Inc. All right reserved.
Only for training and service purposes

SS/TR

L415
3.6uH
NR8040T3R6N

C488

C453
22uF
10V

C456
22uF
10V

C444
0.1uF
16VOPT
R400
0

3300pF

R1
R432
1/16W 330K 5%
R436
15K

$ 0.165

FB_CORE

50V
100pF
C439

C448
3300pF
50V

4A
Vout=(1+R1/R2)*0.765=5.03V

16V

12

VSENSE

VIN_1

+1.10V_VDDC
C441
0.1uF

EP[GND]

L413

C405
10uF
25V

IC401
TPS54327DDAR

C447

VIN_3

L401

+5V_USB

16

+12V/+15V

22

err_out err_out
--> NC --> NC

R608

NC

NC
INV_ON

27K
R442

20

NC

NC

INV_ON INV_ON

1%
1/16W

INV_ON

<--> MAIN
<--> #24
<--> #18
<--> #20
<--> #22

56K
R441

NC

18

INV
#11
#12
#13
#14

(PSU)

1%
1/16W

16

(PSU)

C440
0.1uF
16V

<Module Inv to Main Pin Connection>

32LE5300-TA
LGD 10"LED

BOOT

32LE4500-TA
AUO 10"LED

PWRGD

32LE5300-TA

LGD LPB/ CMO10"LED


(PSU)
OS LPB

1
C403
10uF
10V

<LED MODULE PIN MAP -> latest update 20100618>


PIN No

R473

C432
0.1uF
16V

300 mA

GND

13

GND

GND

14

GND

VOUT

GND

3 Vd=550mV2

24
23

VIN

NC

60:NC

26/32/52:GND
60:PWM
PWM_DIM

E r r _ o u t INV_ON PWM_DIM

COMP

NC

PWM_DIMPWM_DIM

RT/CLK

22

R2

Vout=0.827*(1+R1/R2)=1.225V

GP3_S7LR
POWER_LARGE

20110324
4
LGE Internal Use Only

CONTROL
IR & LED

+3.5V_ST

R2404
10K
1%

EYEQ/TOUCH_KEY
R2411
100

R2405
10K
1%

EYEQ/TOUCH_KEY

OLD_SUB

SENSOR_SCL
C2408
18pF
50V
OPT

L2401
BLM18PG121SN1D

R2401
100
KEY1

EYEQ/TOUCH_KEY
100

L2402
BLM18PG121SN1D

R2402
100
KEY2

C2401
0.1uF

C2402
0.1uF

R2412

D2401
5.6V
AMOTECH

P2402
12507WR-15L

D2403
1

EYEQ/TOUCH_KEY

SENSOR_SDA

D2402
5.6V
AMOTECH

NEW_SUB

P2401
12507WR-12L
5.6V

C2409
18pF
50V
OPT

5.6V
D2404
3

JP2407

JP2408

+3.5V_ST
+3.5V_ST
L2403
BLM18PG121SN1D

R2428
22

+3.5V_ST

R2425
47K
OPT

IR
Q2406
2SC3052
OPT

R2430
10K

+3.5V_ST

R2429
47K
OPT

B
E

OPT

R2431
47K

C2403
0.1uF
16V

C2404
1000pF
50V

R2413
LED_B/LG_LOGO

1.5K
OPT
C2410
0.1uF
16V

R2426
47K

JP2409

JP2410

10

10

11

11

B
Q2405 E
2SC3052
OPT

OPT
+3.3V_Normal
L2404
BLM18PG121SN1D

C2407
100pF
50V

D2405
5.6V

JP2411

R2427
0
R2414
C2405
0.1uF
16V

LED_R/BUZZ
C2406
1000pF
50V

1.5K

12
OPT
R2416
10K

12
13

13

14

IR OUT

15
+3.5V_ST
16
R37
1K

+3.5V_ST
IR_OUT_EU_ASIA
S/T_SCL

R36
22
IR_OUT

IR_OUT_EU_ASIA

IR_OUT
Q30
2SC3052
IR_OUT_EU_ASIA

R38
10K

R39
1K
IR_OUT

NEW_SUB

R40
47K

C
B
Q31 E
2SC3052
IR_OUT

R41

C906
18pF
50V
OPT

IR_OUT

D902
CDS3C05HDMI1
5.6V

S/T_SDA

C907
18pF
50V
OPT

NEW_SUB
D903
CDS3C05HDMI1
5.6V

IR_OUT_Brazil_USA

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2012 LG Electronics. Inc. All right reserved.
Only for training and service purposes

GP3_S7LR
IR/CONTROL-L

20110324
6
LGE Internal Use Only

USB_DIODES
EAN61849601

IC1450
AP2191DSG

L1451-*1
CIS21J121
NC
L1451
MLB-201209-0120P-N2 OUT_2

8
$0.077
7

GND

+5V_USB

IN_1

120-ohm
R1458
2K
1/8W
1%

R1459
2K
1/8W
1%

OUT_1

C1452
10uF
10V

IN_2

C1451
22uF
16V

FLG

C1453
0.1uF
+3.3V_Normal

EN

R1451 47

USB1_OCD

SIDE_USB_DM

JK1450

SIDE_USB_DP

1
2
3
4
5

R1454
10K

USB DOWN STREAM

USB DOWN STREAM

3AU04S-345-ZC-H-LG

JK1450-*1

USB1_CTL

USB_JACK

USB_JACK_LV3400

3AU04S-305-ZC-(LG)

R1455
4.7K
OPT

D1451
RCLAMP0502BA
OPT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2012 LG Electronics. Inc. All right reserved.
Only for training and service purposes

GP2R
USB_OCP_DIODE

20101023
7
LGE Internal Use Only

HDMI EEPROM

A2

A1

5V_HDMI_1 +5V_Normal

ENKMC2838-T112
D821
5V_HDMI_1

HDMI_1

5V_DET_HDMI_1
R806
10K

SHIELD
R896

20

1K
19

1.8K

17

3.3K

18

R802

R804

Q802
2SC3052

C802
0.1uF
16V

R830
HPD1

C806

R884

R888

0.1uF

2.7K

2.7K

10K
E

DDC_SCL_1
DDC_SDA_1

DDC_SDA_1

16
DDC_SCL_1

15

R805

OPT
R824

HDMI_ARC

5V_HDMI_2 +5V_Normal

HDMI_CEC

A2

CK-_HDMI1

12

9
8
7
6
5
4
3
2

CK+_HDMI1

D0-

D0-_HDMI1

D0_GND
D0+

D0+_HDMI1

D1-

D1-_HDMI1

D1_GND
D1+

D1+_HDMI1

D2-

D2+

R889

2.7K

2.7K

D2-_HDMI1

DDC_SCL_2

D2+_HDMI1

DDC_SDA_2

SIDE_HDMI5V_HDMI_4

5V_DET_HDMI_2

5V_HDMI_4 +5V_Normal

5V_DET_HDMI_4

R807

R808

10K

A1

5V_HDMI_2

A2

HDMI_2

10K

ENKMC2838-T112
D824

R895

16

DDC_SCL_2

15

DDC_SCL_4
14

8
7
6
5
4
3
2

D0-_HDMI2

D0_GND

D0+
D1-

D0+_HDMI2

D1-_HDMI2

D1_GND

D1+
D2-

D1+_HDMI2

D2-_HDMI2

D2_GND

D2+

D2+_HDMI2

JK801

JK803

2.7K
DDC_SCL_4

DDC_SDA_4

CK-_HDMI4

12

OPT
D801

CK+_HDMI2

D0-

R891

2.7K

CK+
CK+_HDMI4
D0D0-_HDMI4
D0_GND
D0+

D0+_HDMI4

+3.5V_ST

D1-

OPT
68K

D1-_HDMI4
D1_GND
D1+
D1+_HDMI4

R854

For CEC

D2D2-_HDMI4
D2_GND
D2+
D2+_HDMI4

R855
100

OPT

R887

HDMI_CEC

13

11
10

C809
0.1uF

R856
10K

R857
68K
OPT

OPT

HDMI_CEC

12

HDMI_SIDE

CK-_HDMI2

R841

HDMI_CEC

13

CK+

JP806

HPD4
10K

JP805

OPT
D804

R815

R862

DDC_SDA_4

DDC_SDA_2

OPT
D811

15

11
10

1.8K

Q803
2SC3052

C803
0.1uF
16V

R837

18
17

16

14

1K
19

HPD2

EAG62611201

17

R828
10K

3.3K

1.8K

R801

18

Q801
2SC3052

C801
0.1uF
16V

R803

3.3K

1K

19

R897

20

R835

20

BODY_SHIELD

SHIELD

HDMI_2

R885

D2_GND

JK802

EAG59023302

C807
0.1uF

OPT
D802

ENKMC2838-T112
D822

CK+

11
10

A1

13

D803
AVRL161A1R1NT

HDMI_1

EAG59023302

14

CEC_REMOTE_S7

Q806
SI1012CR-T1-GE3

OPT
C805
0.1uF
16V
OPT

GND

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2012 LG Electronics. Inc. All right reserved.
Only for training and service purposes

GND

GP3_S7LR
HDMI

20110324
8
LGE Internal Use Only

RGB

RGB PC

+5V_Normal
D1115
ENKMC2838-T112
A1
C
A2

R1140
2.2K

R1139
2.2K

C1129
0.1uF
16V

RGB_DDC_SCL
RGB_DDC_SDA
C1127
18pF
50V

C1128
18pF
50V

R1141
22

R1143
22

DSUB_VSYNC

DSUB_HSYNC
C1122
68pF
50V
OPT

C1126
68pF
50V
OPT

D1109
30V

D1113

D1116

D1114

5.6V
OPT

5.6V
OPT

30V

DSUB_B+
R1133
75

D1110
30V

DSUB_G+
R1135
75

D1111
30V
+3.3V_Normal

R1146
10K
DSUB_DET
R1147
1K

DSUB_R+
R1137
75

D1112
30V

D1117
5.6V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2012 LG Electronics. Inc. All right reserved.
Only for training and service purposes

16

SHILED

DDC_GND

DDC_CLOCK

SYNC_GND

15

GND_1

V_SYNC

10

BLUE

NC

14

H_SYNC

GREEN

BLUE_GND

13
3

GREEN_GND

DDC_DATA

8
2

12

RED

GND_2

11
6
1

SPG09-DB-010

JK1104

RED_GND

OPT

GP3_S7LR
RGB/SPDIF/HP

20110324
9
LGE Internal Use Only

RS232C
10
5
9
IR_OUT

4
8

R1123
100

JP1121

R1124
100

JP1122

3
+3.5V_ST

7
2

D1107
CDS3C30GTH
30V
OPT

D1108
CDS3C30GTH
30V
OPT

1
EXT_12V

C1101 0 . 3 3 u F

SPG09-DB-009
IC1101

JK1101

C1106
0.1uF

MAX3232CDR

+3.5V_ST
C1+
C1102
0.1uF
C1103
0.1uF

V+

C1-

C2+
C1104
0.1uF

C2-

VC1105
0 . 1 u FDOUT2

RIN2

16

15

14

13

12

11

10

VCC
D1100
BAP70-02

R1100
1K

GND
50V
DOUT1

RIN1

ROUT1
PM_RXD
DIN1
PM_TXD
DIN2

ROUT2

EAN41348201

DC DC CONVERTER +12V_ONLY PSU

12V EXT PowerOut

(For External power)


POWER_OUT
R65
43
IC52
MP5000DQ

PSU_POWER_OUT
R52
100K
POWER_OUT

COMP

C50
150pF
50V

FB

3
8
PSU_POWER_OUT
4

$0.21

VIN_2

L50
22UH
PSU_POWER_OUT

ENABLE/FAULT

C54
3.3uF
50V

R53
200K

I-LIMIT

+12V
PSU_POWER_OUT
C55
0.1uF
50V
PSU_POWER_OUT

GND

10

SOURCE_5

EXT_12V

SOURCE_4

POWER_OUT
L54
CB3216PA501E

SOURCE_3

POWER_OUT

VIN_1

FREQ

1
POWER_OUT

EXT12V_CTRL
PSU_POWER_OUT

1/8W
1%PSU_POWER_OUT
PSU_POWER_OUT

PSU_POWER_OUT
R51
150K

18K
R50

PSU_POWER_OUT

PSU_POWER_OUT

GND

DV/DT

NC

C65
0.1uF
50V
POWER_OUT

C64
22uF
16V
POWER_OUT
SOURCE_1
SOURCE_2

11

R56
270K

PSU_POWER_OUT
R57
10K

1/16W
1%

1/16W
1%

+12V

VCC

+12V/+15V

L51
CB3216PA501E

LIPS_POWER_OUT

PSU_POWER_OUT
C52
22uF
25V

PSU_POWER_OUT
C53
0.1uF
50V

POWER_OUT
+3.5V_ST

C62
1uF
16V

R64
4.7K
POWER_OUT
EXT_PWR_DET

R68
10K

C
Q51
2SC3875S(ALY)
POWER_OUT

C63
22uF
16V
POWER_OUT
+3.5V_ST

R66
1K
POWER_OUT

R67
4.7K
POWER_OUT

EN

BST

R63
1K

1/16W
1%

D50

10

+24V

R55
20K

SW_2

1
11

SW_1

THERMAL

PSU_POWER_OUT

EP_GND

C61
470pF
50V

POWER_OUT

IC50

R54
22

0.1uF

50V

MP4460DQ-LF-Z

MBRA340T3G
close to pin

PSU_POWER_OUT

Switching noise reducing [MPS recommend]

PSU_POWER_OUT
C51

Q50
2SC3875S(ALY)
POWER_OUT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2012 LG Electronics. Inc. All right reserved.
Only for training and service purposes

GP3_S7LR
RS232C_9PIN

20110324
10
LGE Internal Use Only

[51Pin LVDS Connector]


(For FHD 60/120Hz)
PANEL_VCC

[30Pin LVDS Connector]


(For HD 60Hz_Normal)

L702
120-ohm
WAFER_FHD

P705

P703

FF10001-30

FI-RE51S-HF-J-R1500
WAFER_FHD

HD
C700
10uF
16V
OPT

C709
1000pF
50V
OPT

C710
0.1uF
16V
WAFER_FHD

1
OPT
2

0 R713

5
6
7

RXA3-

RXA3+

8
9
10

RXACK-

10

RXACK+

11

11

RXA4-

12

RXA4+

13

RXA3-

14

RXA3+

12

RXA2-

13

RXA2+

14

15
16

RXACK-

17

RXACK+

15

RXA1-

16

RXA1+

17

18
19

RXA2-

20

RXA2+

LVDS_SEL
+3.3V_Normal

18

RXA0-

19

RXA0+

R712
3.3K
OPT

20
21

21

RXA1-

22

RXA1+

R711
10K
OPT

22
23

23

RXA0-

24

RXA0+

PANEL_VCC
24

BIT_SEL

L701

25

25

120-ohm
26

26
27

RXB4-

28

RXB4+

29

RXB3-

30

RXB3+

R709
10K
BIT_SEL_LOW

HD

27
28
29

C701
10uF
16V
OPT

OPT
C702
1000pF
50V

HD
C703
0.1uF
16V

30
31

31
32

RXBCK-

33

RXBCK+

34
35

RXB2-

36

RXB2+

37

RXB1-

38

RXB1+

39

RXB0-

40

RXB0+

41
42

LVDS_SEL
+3.3V_Normal

43
44
45
46
47

R705
3.3K
OPT
R710
10K
OPT

48
49
50
51
52

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2012 LG Electronics. Inc. All right reserved.
Only for training and service purposes

GP3_S7LR
LVDS_LARGE

20110324
11
LGE Internal Use Only

CLose to Saturn7M IC

L7
R7
T3

A-MA1

R1203

L8

A5
ZQ

240
1%

A7
B2
D9
G7
K2
K8
N1
N9
R1

AVDD_DDR0

A6

R9

A8
VDD_1

A9

VDD_2

A10/AP

VDD_3

A11

VDD_4
VDD_5

A12/BC
A13

VDD_6
VDD_7

NC_5

VDD_8
VDD_9

BA0
BA1

A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
J9
L1
L9
A-MA14

T7

BA2
VDDQ_1
VDDQ_2

CK

VDDQ_3

CK

VDDQ_4

CKE

VDDQ_5
VDDQ_6

CS

VDDQ_7

ODT

VDDQ_8

RAS

VDDQ_9

CAS
WE

NC_1
NC_2

RESET

B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

NC_4
NC_6

DQSL

VSS_1

DQSU

VSS_2

DQSU

VSS_3
VSS_4

DML

VSS_5

DMU

VSS_6
VSS_7

DQL0

VSS_8

DQL1

VSS_9

DQL2

VSS_10

DQL3

VSS_11

DQL4

VSS_12

DQL5
DQL6

B1
B9
D1
D8
E2
E8
F9
G1
G9

R8
R2
T8
R3
L7
R7
N7
T3

A-MA3

A-MA7

A-MA4

A-MA8

A-MA5

A-MA9

A-MA6

A-MA10

A-MA7

A-MA11

A-MA8

A-MA12

A-MA9

A-MA13

A-MA10

A-MA14

A-MA11
A-MA13

A-MBA0
A-MBA1
A-MBA2

N8
M3

A-MBA0
A-MBA1
A-MBA2

J7
K7
K9

A-MCK

J3
K3
L3
T2

DQL7
VSSQ_1
VSSQ_2

DQU0

VSSQ_3

DQU1

VSSQ_4

DQU2

VSSQ_5

DQU3

VSSQ_6

DQU4

VSSQ_7

DQU5

VSSQ_8

DQU6

VSSQ_9

DQU7

F3
G3
C7
B7
E7
D3
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3

D12
C16
C13
A15
E11
B13

A_DDR3_A[3]

B_DDR3_A[3]

A_DDR3_A[4]

B_DDR3_A[4]

A_DDR3_A[5]

B_DDR3_A[5]

A_DDR3_A[6]

B_DDR3_A[6]

A_DDR3_A[7]

B_DDR3_A[7]

A_DDR3_A[8]

B_DDR3_A[8]

A_DDR3_A[9]

B_DDR3_A[9]

A_DDR3_A[10]

B_DDR3_A[10]

A_DDR3_A[11]

B_DDR3_A[11]

A_DDR3_A[12]

B_DDR3_A[12]

A_DDR3_A[13]

B_DDR3_A[13]

A_DDR3_A[14]

B_DDR3_A[14]

F22

K9

G22
E24
F21
E23
D22
D24
D21
C24
C25
F23
E21
D23

B-MA3

B-MA6

R8

B-MA6

B-MA7

B-MA7

B-MA8
B-MA10

L7

B-MA10

B-MA11

R7

B-MA11

B-MA12

N7

B-MA12

B-MA13

T3

B-MA13

B-MA14

A-MCKB

A-MRASB
A-MCASB
A-MWEB

A-MRASB

AVDD_DDR0

F13
B15
E13
C17
A17
B16

A_DDR3_BA[0]

B_DDR3_BA[0]

A_DDR3_BA[1]

B_DDR3_BA[1]

A_DDR3_BA[2]
A_DDR3_MCLK

B_DDR3_BA[2]
B_DDR3_MCLK

A_DDR3_MCLKZ

B_DDR3_MCLKZ

A_DDR3_MCLKE

B_DDR3_MCLKE

G20
F24
F20
G25
G23
F25

B-MBA0
B-MBA1
B-MBA2
C1240
B-MCK
B-MCKB

A-MDQSL
A-MDQSLB
A-MDQSU
A-MDQSUB
A-MDML
A-MDMU
A-MDQL0
A-MDQL1
A-MDQL2
A-MDQL3
A-MDQL4
A-MDQL5
A-MDQL6
A-MDQL7
A-MDQU0
A-MDQU1
A-MDQU2
A-MDQU3
A-MDQU4

0.01uF
25V

B-MCKE

A-MRESETB

E14
B12
A12
C12
F11

A_DDR3_ODT

B_DDR3_ODT

A_DDR3_RASZ

B_DDR3_RASZ

A_DDR3_CASZ

B_DDR3_CASZ

A_DDR3_WEZ
A_DDR3_RESET

B_DDR3_WEZ
B_DDR3_RESET

D20
B25
B24
A24
E20

B-MODT
B-MRASB
B-MCASB
B-MWEB
B-MRESETB

AVDD_DDR1

K3
L3

VDD_7
VDD_9

A-MDQSL
A-MDQSLB
A-MDQSU
A-MDQSUB
A-MDML
A-MDMU
A-MDQL0
A-MDQL1
A-MDQL2
A-MDQL3
A-MDQL4
A-MDQL5
A-MDQL6
A-MDQL7
A-MDQU0
A-MDQU1
A-MDQU2
A-MDQU3
A-MDQU4
A-MDQU5
A-MDQU6
A-MDQU7

C18
B18
A18
E15
A21
D17
G15
B21
F15
B22
F14
A22
D15
G16
B20
F16
C21
E16
A20
D16
C20

A_DDR3_DQSL
A_DDR3_DQSLB
A_DDR3_DQSU
A_DDR3_DQSUB

B_DDR3_DQSL
B_DDR3_DQSLB
B_DDR3_DQSU
B_DDR3_DQSUB

A_DDR3_DQML

B_DDR3_DQML

A_DDR3_DQMU

B_DDR3_DQMU

A_DDR3_DQL[0]

B_DDR3_DQL[0]

A_DDR3_DQL[1]

B_DDR3_DQL[1]

A_DDR3_DQL[2]

B_DDR3_DQL[2]

A_DDR3_DQL[3]

B_DDR3_DQL[3]

A_DDR3_DQL[4]

B_DDR3_DQL[4]

A_DDR3_DQL[5]

B_DDR3_DQL[5]

A_DDR3_DQL[6]

B_DDR3_DQL[6]

A_DDR3_DQL[7]

B_DDR3_DQL[7]

A_DDR3_DQU[0]

B_DDR3_DQU[0]

A_DDR3_DQU[1]

B_DDR3_DQU[1]

A_DDR3_DQU[2]

B_DDR3_DQU[2]

A_DDR3_DQU[3]

B_DDR3_DQU[3]

A_DDR3_DQU[4]

B_DDR3_DQU[4]

A_DDR3_DQU[5]

B_DDR3_DQU[5]

A_DDR3_DQU[6]

B_DDR3_DQU[6]

A_DDR3_DQU[7]

B_DDR3_DQU[7]

K24
K25
J21
J20
H24
L20
L23
J24
L24
J23
M24
H23
M23
K23
G21
L22
H22
K20
H20
L21
H21
K21

B-MDQSL

CK

VDDQ_2

CK

VDDQ_3

CKE

VDDQ_4

B-MDQSLB

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

B-MDQSU
B-MDQSUB
B-MDML
B-MDMU
B-MDQL0
B-MDQL1
B-MDQL2
B-MDQL3
B-MDQL4
B-MDQL5
B-MDQL6
B-MDQL7
B-MDQU0
B-MDQU1
B-MDQU2
B-MDQU3
B-MDQU4
B-MDQU5
B-MDQU6
B-MDQU7

F7
F2

B-MDQL2

F8

B-MDQL3

H3

B-MDQL4

H8

B-MDQL5

G2

B-MDQL6

H7

B-MDQL7

C3

B-MDQU1

C8

B-MDQU2

C2

B-MDQU3

A7

B-MDQU4

A2

B-MDQU5

B8

B-MDQU6

A3

B-MDQU7

DQSU

VSS_1

DQSU

VSS_2

DML

VSS_4

DMU

VSS_5

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

F2

N9

F8

R1

H3

R9

H8

AVDD_DDR1

G2

C8

C1

C2

C9

A7

D2

A2
B8
A3

N3

L9

P7

T7

P3

B-MA14

N2

VSS_12

A9

R8

B3

R2

E1

T8
R3

G8

L7

J2

R7

J8
M1
M9

N7
T3
M7

P1
P9
T1

M2
N8
M3

T9
J7
K7
K9

DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B1
B9

L2

D1

K1

D8

J3

E2

K3
L3

E8
F9

T2

DDR_DVB_T2_2G

IC1201-*3
K4B2G1646C

P8

IC1202-*3
K4B2G1646C

P2
R8
R2
T8
R3
L7
R7
N7
T3
M7
M2
N8
M3
J7
K7
K9
L2
K1
J3
K3
L3
T2

F3

C7
B7
E7
D3
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2012 LG Electronics. Inc. All right reserved.
Only for training and service purposes

P7

VREFDQ

H1

P2

A5
ZQ

L8

T8

A8
VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4

A13

VDD_5
VDD_6

NC_5

VDD_7
VDD_8

BA0

VDD_9

B2
D9
G7
K2
K8

VDDQ_1
VDDQ_2

CK

VDDQ_3

CKE

VDDQ_4

CS

VDDQ_6

VDDQ_5
ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1
NC_2
NC_4
DQSL

DQSU

NC_6

VSS_1
VSS_2
VSS_3

DML

VSS_4

DMU

VSS_5
VSS_6

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4
DQL5

T3

M2
N8

A1
A8

J7

C1

K7

C9

K9

D2
E9

L2

F1

K1

H2

J3

H9

K3
L3

J1
J9

VSS_11
VSS_12

T2

L1
F3
G3
A9

C7
B7

E1
G8

E7

J2

D3

J8
M1

E3

M9

F7

P1

F2

P9

F8

T1

H3

T9

H8
G2
H7

VSSQ_1
DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

VDDQ_9

B1
B9

D7

D1

C3

D8

C8

E2

VREFCA

C2

E8

A7

F9

A2

G1

B8

G9

A3

M8

A1
A2
A3

VREFDQ

H1

F3
G3

E3

A6

ZQ

L8

A7
A8
A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4

A13

VDD_5
VDD_6

NC_5

VDD_7
VDD_8

BA0

VDD_9

B2

VDDQ_1
CK

VDDQ_2

CK

VDDQ_3

CKE

VDDQ_4

CS

VDDQ_6

VDDQ_5
ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1
RESET

NC_2
NC_4

DQSL

NC_6

K7

C9

VSS_1

DQSU

VSS_2

DML

VSS_4

K9

E9

L2

F1

K1

H2

J3

H9

K3

DMU

VSS_5

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

R1227

1%

R1228
N9
R1
R9

VDD_9

CK

VDDQ_2

CK

VDDQ_3

A1

CKE

VDDQ_4

A8
C1

CS

VDDQ_6

C9

ODT

VDDQ_7

D2

RAS

VDDQ_8

CAS

VDDQ_9

E9
F1
H2
H9

WE

J1

NC_1

T2

J9

NC_2

RESET

L1

NC_3

A9

C7

B3

B7

DQSL

D3

J8
M9

F7

P1

F2

P9

F8

T1

H3

T9

H8

D7
C3

D8

C8

E2

C2

E8

A7

F9

A2

G1

B8

G9

A3

VSS_2

A9

DML

VSS_4

B3

DMU

VSS_5

E1
G8

DQL0

VSS_7

J2

DQL1

VSS_8

J8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

M1
M9
P1
P9
T1
T9

DQL6
DQL7

B1
D1

VSS_1

DQSU

VSS_6

G2

B9

DQSU

VSS_3

E7

E3

T7

NC_6

DQSL

E1

M1

L9

NC_4

F3

H7

DQU0

N1

VDDQ_5

G3

J2

K8

VDD_7

L9

G8

K2

VDDQ_1

L1

NC_6

DQSU

A0

B1

VSSQ_1
DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B9
D1
D8
E2
E8
F9
G1
G9

H3
G2
H7

D9
K2
K8
N1
N9
R1
R9

D7
C3
C8
C2

A1
A8
C1
C9
D2
E9
F1
H2
H9

IC1202-*2
NT5CB64M16DP-CF
DDR_1333_NANYA_NEW

EAN61857201 VREFCA

A7
A2
B8
A3

M8

P3

A2
A3

VREFDQ

H1

P2

A5
ZQ

L8

T8

A8
A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12

VDD_4

NC_6

VDD_5
VDD_6
VDD_7
VDD_8

BA0

VDD_9

B2

L7

G7

R7

K2

N7

K8

T3

N1
N9

M7

R1
R9

M2
N8
M3

BA2
VDDQ_1
CK

VDDQ_2

CK

VDDQ_3

CKE

VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1

DQSL

R3

D9

BA1

RESET

R8
R2

A7

NC_5

N2
P8

A4
A6

N3
P7

A1

NC_2

NC_7

A1
A8

J7

C1

K7

C9

K9

D2
E9

L2

F1

K1

H2

J3

H9

DQSU

VSS_1

DQSU

VSS_2
VSS_3

DML

VSS_4

DMU

VSS_5
VSS_6

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

K3
L3

J1
J9

T2

L1
T7

F3

A9

C7

B3

B7

E1
G8

E7

J2

D3

J8
M1

E3

M9

F7

P1

F2

P9

F8

T1

H3

T9

H8
G2
H7

VSSQ_1
DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B1
B9

D7

D1

C3

D8

C8

E2

C2

E8

A7

F9

A2

G1

B8

G9

A3

M8

A1
A2
VREFDQ

A3

H1

A4
A5
ZQ

A6

L8

A7
A8
A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12

VDD_4

NC_6

VDD_5
VDD_6

NC_5

VDD_7
VDD_8
VDD_9

BA0

B2
D9
G7
K2
K8
N1
N9
R1
R9

BA1
BA2
VDDQ_1
CK

VDDQ_2

CK

VDDQ_3

CKE

VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
NC_1
RESET

NC_2
NC_3

G3

DQL6
DQL7

EAN61857201 VREFCA

A0

L9

DQSL

G7

BA1
BA2

F8
H8

A4
A5

J7

C1

T7

G7

BA2

A8

J9

D9

BA1

J1

NC_2

VDD_5

BA0

L3

NC_4

F7

NC_3

B3

DQL6
DQL7

A0

L9
T7

DQSL
DQSU

L7
R7
N7

M7

R1
R9

M3

BA2

RESET

R3

N1
N9

BA1

CK

R8
R2

A7
A9

N2
P8

A4
A6

N3
P3

NC_3

G3

M8

A1
A3

CAS

G9

F2

N2

VDDQ_8

NC_3

D3

A2

RAS

G1

E7

P3

VDDQ_7

A13

DDR_1333_NANYA_NEW

L1

B7

VREFCA

ODT

VDD_4

J9

A-MDQU7

DDR_DVB_T2_2G

M2

IC1201-*2
NT5CB64M16DP-CF

J1

C7

A0

VDDQ_6

VSSQ_1

C3

A-MDQU6

P7

CS

A12/BC

B2

VDD_8

D2

DQL7

D7

DQL7

A-MDQU5

N3

VDDQ_4

VDD_3

NC_5

A1

DQL6

H7

DQL6
VSSQ_1

D7

B-MDQU0

N1

P2

VSS_6

E3

B-MDQL1

F7

P8

VSS_3

E7

B-MDQL0

CKE

VDD_2

A11

VDD_6

M7

N8

VSS_6

E3

K8

DQSL

D3

B-MDMU

VDDQ_3

VDD_1

A10/AP

H9

NC_6

DQSL

B7

B-MDML

VDDQ_2

CK

A9

H2

NC_4

C7

B-MDQSU
B-MDQSUB

K2

F1

NC_2

RESET

G3

B-MDQSLB

D3

G7

E9

NC_1

F3

B-MDQSL

R9

VSS_3

E7

A8

NC_3
B19

D9

T3

DQSL

B7

A1

WE

T2

B-MRESETB

VDD_5

VDDQ_5

J3

B-MWEB

VDD_4

VDDQ_1

K1

B-MRASB

A12/BC

BA2

K9

B-MCASB
R1232
10K

CK

DQSL

C7

B2

K8

R1

NC_4

G3

BA1

K7

B-MODT

VDD_3

VDD_8

J7

B-MCKE

VDD_2

A11

BA0

M3

B-MBA2

A10/AP

NC_5

N8

B-MBA1

VDD_1

VDD_6

L2

R1231
10K

A-MRESETB

B-MCK

A9

A13

M2

B-MBA0

R1226

A8

M3

RESET

F3

240
1%

A8

R3

B-MA9

L8

A7

T8

B-MA8

B-MA9

ZQ

A6

R2

VDD_7

NC_3

A5

N7

L8

A7

L7
R7

K2

ZQ

A6

R3

G7

N9

NC_1

B-MVREFDQ

A5

N1

VDD_9

A4

P2

B-MA5

VDD_5

WE

T2

H1

VREFDQ

A3

P8

B-MA4

B-MA5

A2

N2

B-MA3

B-MA4

K3
L3

A1

P3

B-MA2

J3

B-MVREFCA

A13

VDDQ_5

K1

M8

VDD_4

D9

VDDQ_1

J7

VREFCA

A0

P7

B-MA1

B-MA2

B-MCKB
A-MODT

A-MODT
A-MCASB

A-MCKE

0.01uF
25V

A-MCKE

A-MWEB

A-MCK
A-MCKB

C1209

L2
K1

B14

B_DDR3_A[2]

B-MA1

A-MA12

M7
M2

D11

A_DDR3_A[2]

N3

B-MA0

M7

NC_3

DQSL
A9

P2

A-MA6

E12
A14

B_DDR3_A[1]

B-MA0

1%

A4

P8

A-MA5

A-MA2

C15

A_DDR3_A[1]

D25

56
R1237

A3

A-MA1

F12

B_DDR3_A[0]

1%

VREFDQ

N2

A-MA4

B11

A_DDR3_A[0]

A12/BC

B2

BA2

K7

A4

R2

BA1

L2

56
R1238

A-MVREFDQ

P3

A-MA3

A-MA0

1%

H1

A2

P7

R1235
56

A1

N3

1%

A0

R1236
56

VREFCA

A-MA2

C14

VDD_3

BA0

N8

A-MA0

VDD_2

A11

VDD_8

M3

DDR_1333_HYNIX

VDD_1

A10/AP

NC_5

M2

B23

A9

H1

VREFDQ

A3

T8

VDD_6

M7

S7LR_DIVX_MS10

ZQ

A8

R3

A11

R8

A7

N7

EAN61828901

N2

L8

A2

P2

A6

T8

A1

P8

A5

R2

IC1202
H5TQ1G63DFR-H9C

H1

A4

P2

EAN61828901

VREFDQ

A3

P8
R8

M8

VREFCA

A0

P3

A2

N2

N3
P7

A1

P3

IC101
LGE2112-T8

DDR_1333_SS_NEW
M8

VREFCA

A0

P7

M8

1K

IC1202-*1
K4B1G1646G-BCH9

DDR_1333_SS_NEW
N3

A-MVREFCA

C1250

1000pF

CLose to DDR3

IC1201-*1
K4B1G1646G-BCH9

DDR_1333_HYNIX

C1249

Close to DDR Power Pin

Close to DDR Power Pin


CLose to Saturn7M IC

IC1201
H5TQ1G63DFR-H9C

0.1uF

1K 1%

R1224

1K 1%
1%

R1225

C1248

1000pF

C1247

OPT
C1252
10uF
10V

C1246

10uF

0.1uF

C1245

0.1uF

C1244

0.1uF

C1243

0.1uF

C1242

0.1uF

C1241

0.1uF

C1239

0.1uF

C1238

0.1uF

C1237

C1236

C1235
0.1uF

0.1uF

C1234
0.1uF

0.1uF

C1233

0.1uF

C1232

0.1uF

C1231

0.1uF

C1230

0.1uF

C1229

0.1uF

C1228

0.1uF

C1227

0.1uF

0.1uF

C1224

0.1uF

C1223

0.1uF

C1222

0.1uF

C1221

0.1uF

C1220

0.1uF

C1219

0.1uF

C1218

0.1uF
C1217

0.1uF
C1216

0.1uF

C1215

0.1uF

C1214

0.1uF

C1213

0.1uF

C1212

0.1uF

C1211

0.1uF

C1210

0.1uF

C1208

0.1uF

C1207

C1206

10uF

10uF
C1205

0.1uF

B-MVREFDQ

B-MVREFCA
OPT
C1251

0.1uF

+1.5V_DDR

L1203
BLM18PG121SN1D

1K

AVDD_DDR1

DDR3 1.5V By CAP - Place these Caps near Memory

A-MVREFCA

1000pF

C1204

1%

R1205

1K

DDR3 1.5V By CAP - Place these Caps near Memory

AVDD_DDR0

L1202
BLM18PG121SN1D

C1203

1000pF

0.1uF
C1202

+1.5V_DDR

A-MVREFDQ

CLose to DDR3

AVDD_DDR1

AVDD_DDR1

1K 1%

R1204

AVDD_DDR0

1K 1%
1%

R1202

1K

C1201

R1201

AVDD_DDR0

NC_4
DQSL

NC_7

A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
J9
L1
L9
T7

DQSL
DQSU

VSS_1

DQSU

VSS_2
VSS_3

DML

VSS_4

DMU

VSS_5
VSS_6

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

DQL6
DQL7
VSSQ_1
DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B1
B9
D1
D8
E2
E8
F9
G1
G9

J1
J9
L1
L9
T7

DQSL
DQSU
DQSU

VSS_1
VSS_2
VSS_3

DML

VSS_4

DMU

VSS_5
VSS_6

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4
DQL5

VSS_11
VSS_12

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

DQL6
DQL7
VSSQ_1
DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B1
B9
D1
D8
E2
E8
F9
G1
G9

GP3_S7LR
DDR_256

20110511
12
LGE Internal Use Only

+3.5V_ST

+3.5V_ST

4.7K

OPT

+3.5V_ST

R1404

S_FLASH_MAIN_MACRONIX

IC1401
MX25L8006EM2I-12G

R1403
10K

OPT

CS#
/SPI_CS

VCC

C1401
0.1uF

SO/SIO1
SPI_SDO
WP#

/FLASH_WP
GND

C
R1401

HOLD#

SCLK
SPI_SCK
R1405
S I / S I O 0 33
SPI_SDI

Q1401
KRC103S

OPT 0
E

OPT

S_FLASH_MAIN_WINBOND

IC1401-*1
W25Q80BVSSIG
CS

DO[IO1]

%WP[IO2]

GND

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2012 LG Electronics. Inc. All right reserved.
Only for training and service purposes

VCC

HOLD[IO3]

CLK

DI[IO0]

GP3_S7LR
SFLASH

20110324
13
LGE Internal Use Only

P4R_GLOBAL_TUNER_BLOCK

TU3700
TDSS-G101D
SI2176_DVB_1INPUT_H

SI2176_ATSC_1INPUT_H

TU3700-*1
TDSS-H101F

1
2
3
4
5
6
7
8
9
10
11

NC
RESET
SCL
SDA
+B1[3.3V]

+3.3V_TU

SIF
+B2[1.8V]
CVBS
IF_AGC

+3.3V_BUFFER
R3776
0

DIF[P]
DIF[N]

12

R3755
470

SHIELD

BUFFER

NON_BUFFER
R3772
0

R3758
82
TU_SIF

1
2
3
4
5
6
7
8
9
10
11

NC

TU_IIC_ATSC_SANYO
R3740
1.2K
33 R3735
TU_I2C_NON_FILTER

SCL
SDA

TU_IIC_NON_ATSC_SANYO

+3.3V_TU

R3740-*1
1K

RESET

+3.3V_TU

R3741-*1
1K

BUFFER
ISA1530AC1
C

R3753
4.7K

Q3705

BUFFER

+3.3V_BUFFER
R3774
0

TU_IIC_ATSC_SANYO
R3741
1.2K
TU_SCL

TU_I2C_NON_FILTER

+3.3V

TU_I2C_NON_FILTER

SIF
C3702

+1.8V

TU_IIC_NON_ATSC_SANYO

0.1uF

close to TUNER

C3713
18pF
50V

C3742
20pF
50V
TU_I2C_FILTER

C3743
20pF
50V
TU_I2C_FILTER

C3711-*1
20pF
50V
TU_I2C_FILTER

+3.3V_TU

IF_AGC

+1.2V/+1.8V_TU

DIF[P]
C3738
0.1uF
16V

OPT
C3705
100uF
16V

OPT
C3739
10uF
6.3V

C3707
100pF
50V

C3708
0.1uF
16V
R3732
100

R3733
100K
TUNER_RESET

close to the tuner pin, add,09029

C3710
0.1uF
16V

TU_I2C_FILTER
R3735-*1
MLG1005SR27JT

12

R3704

C3713-*1
20pF
50V
TU_I2C_FILTER

R3752
220
BUFFER

NON_BUFFER
R3773

0
TU_CVBS

BUFFER
R3749
0

+3.3V_TU

C3737
100pF
50V

R3751
220
BUFFER

TU_SDA

16V

CVBS

DIF[N]

C3711
18pF
50V

33 R3736
TU_I2C_NON_FILTER

E
B

R3750
1K
OPT

BUFFER
Q3703
ISA1530AC1

TU_I2C_FILTER
R3736-*1
MLG1005SR27JT

100

IF_AGC_MAIN
HALF_NIM

SHIELD

should be guarded by ground


C3716
0.1uF
16V

IC3703-*2
AZ1117BH-1.8TRE1
IN

OUT

HALF_NIM_1.8V
R3767-*1
0

1
HALF_NIM
R3760
0

ADJ/GND

IF_N_MSTAR

+3.3V_TU

HALF_NIM_1.8V

HALF_NIM_1.2V_BCD
IC3703
AZ1117BH-ADJTRE1
INPUT

IF_P_MSTAR
R3761 0
HALF_NIM

ADJ/GND

R2
HALF_NIM_1.2V
R3767
10

+1.2V/+1.8V_TU

1. should be guarded by ground


2. No via on both of them
3. Signal Width >= 12mils
Signal to Signal Width = 12mils
Ground Width >= 24mils

IC3703-*1
AP1117EG-13
IN

OUTPUT

HALF_NIM_1.2V
R3768
1.2K
R1

OUT

HALF_NIM
R3766
1
1/10W

ADJ/GND

Close to the tuner

R3703
150
OPT

HALF_NIM_1.2V_DIODES
C3740
0.1uF
16V
HALF_NIM

Please, check Multi Item! 10/12

C3741
10uF
10V
HALF_NIM
add,0929

C3717
0.1uF
16V

+3.3V_TU

+3.3V_Normal

Size change,0929
L3703
MLB-201209-0120P-N2
60mA
C3723
22uF
10V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2012 LG Electronics. Inc. All right reserved.
Only for training and service purposes

GP3_S7LR
TUNER_L

C3725
0.1uF
16V

C3715
22uF
10V

C3727
0.1uF
16V

20110511
14
LGE Internal Use Only

AMP_RESET
C516
1000pF
50V
50V

R521
10K

AVDD_PLL

DVDD_PLL

LF

GND_1

PVDD1_2

PVDD1_3

OUT1A_1

PGND1A

BST1A

/RESET

AD

38

39

40

41

42

43

44

45

46

37

BST1B

32

VDR1

31

VCC_5

11

26

OUT2A_2

SDA

12

25

OUT2A_1

R508
12

R515
12

C530
390pF
50V

L505
10.0uH
L506
10.0uH

C537
0.1uF
50V

C531
390pF
50V

D502
1N4148W
100V
OPT

R509
12

R516
4.7K

C535
0.47uF
50V

SPEAKER_L
C538
0.1uF
50V

R513
12

R517
4.7K
SPK_L-

C526
22000pF
50V

WAFER-ANGLE

SPK_L+

SPK_L-

SPK_R+

C528
1uF
25V

C529
1uF
25V

C534
1uF
25V

SPK_R-

C527
22000pF
50V

1
P501

24

BCK

23

PGND2A

22

27

21

10

20

WCK

19

BST2A

18

28

17

C518
22000pF
50V

PVDD2_3

PVDD2_2

PVDD2_1

SPK_R+

OUT2B_2

Q501
2SC3052

10K

33

SDATA

OUT2B_1

AMP_MUTE

C505
1000pF
50V

PGND1B

VDR2

PGND2B

R501

100

34

GND_2

BST2B

R506

OUT1B_1

29

SCL

R502
10K

R520
10K

C509
33pF
50V

35

30

MONITOR2

C507
33pF
50V

+3.5V_ST

OUT1B_2

16

100

SPK_L+

15

AMP_SCL

100

OPT
C525
0.01uF
50V

D501
1N4148W
100V
OPT

DVDD

AUD_SCK

R504

C523
10uF
35V

C521
0.1uF
50V

DGND

AUD_LRCK

R503

IC501
NTP-7400L

MONITOR1

C513
0.1uF
16V

THERMAL
49

DGND_PLL

AUD_LRCH

AMP_SDA

C519
0.1uF
50V

36

MONITOR0

3.3K

47

AGND_PLL

R505

OPT
C511
10uF
10V

OPT
R507
3.3

C512
0.1uF
16V

48

OPT
C510
10uF
10V

14

100pF
50V

C508
0.1uF
16V

13

C503

C504
1000pF
50V

OPT
C506
10uF
10V

/FAULT

C502
0.1uF
50V

C501
0.1uF
50V

GND_IO

16V

CLK_I

0.1uF

L501
MLB-201209-0120P-N2

C515
10uF
10V

[EP]

C514

VDD_IO

+24V_AMP

+24V

+24V_AMP

OUT1A_2

C517

AUD_MASTER_CLK

22000pF

L502
BLM18PG121SN1D

PVDD1_1

+3.3V_Normal

+24V_AMP

D503
1N4148W
100V
OPT

C520

C522

C524

0.1uF
50V

0.1uF
50V

10uF
35V

D504
1N4148W
100V
OPT

R510
12

R514
12

C532
390pF
50V

L504
10.0uH

C533
390pF
50V
R511
12

L503
10.0uH

R512
12

C536
0.47uF
50V

C539

R518

0.1uF
50V

4.7K

C540

R519

0.1uF
50V

4.7K

SPEAKER_R

SPK_R-

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2012 LG Electronics. Inc. All right reserved.
Only for training and service purposes

GP3_S7LR
NTP7400

20110324
16
LGE Internal Use Only

IC1601-*1
SN324

OUT1

14

OUT4

OP_AMP_AUK
INV_IN1

Rear AV

NON_INV_IN1
REAR_AV
D1619
R1654
30V
75
REAR_AV

C1643
47pF
50V
REAR_AV

C1648
220pF
50V
OPT

VCC

+3.3V_Normal

NON_INV_IN2
R1660
10K
REAR_AV

JK1604
PPJ233-01

4C

[RD]O-SPRING

3C

[RD]CONTACT
L-MONO

4B

[WH]C-LUG

3A

[YL]CONTACT

4A

[YL]O-SPRING

5A

D1624
5.6V
OPT

C1646
0.1uF
16V
REAR_AV

INV_IN2

AV_CVBS_DET

R1666
1K
REAR_AV

[RD]E-LUG

OUT2

13

12

11

10

D1625
5.6V
REAR_AV

R1671
470K
REAR_AV

L1609
120-ohm
REAR_AV

C1663
330pF
50V
REAR_AV

R1689
12K

REAR_AV
R1685
10K

INV_IN4

EU_OPT
R1656
2.2K

CLOSE TO MSTAR

REAR_AV
D1626
5.6V

REAR_AV
R1684
10K

C1664
330pF
+12V/+15V

EU_OPT
C1644
10uF
16V

R4218
220K

C1662
330pF
50V
REAR_AV

470K
REAR_AV

R1688
12K
REAR_AV

R4219

EU_OPT
R1664
33K

OPT
R1662
470K
EU_OPT
R1657
5.6K

REAR_AV
R1672

OUT1

DTV/MNT_L_OUT

AV_L_IN

REAR_AV

GND

NON_INV_IN3

INV_IN3

OUT3

IC1601
AS324MTR-E1

[YL]E-LUG
L1610
120-ohm

NON_INV_IN4

OP_AMP_BCD
AV_R_IN

REAR_AV

5C

AV_CVBS_IN

EU_OPT
C1654
33pF

IN1EU_OPT
R1667
10K IN1+

SCART1_Lout
C1642
0.1uF
SCART1_Rout
50V

VCC

R4216

EU_OPT
R1658
5.6K

C1665
330pF

IN2+
EU_OPT
R1665
33K

R4217
220K

EU_OPT

R1668
10K OUT2

EU_OPT
R1655
2.2K

C1655
33pF

DTV/MNT_R_OUT
OPT
R1661
470K

C1645
10uF
16V
EU_OPT

IN2-

14

13

12

11

10

EXT_SPK
R16
2.2K

OUT4

IN4-

IN4+

EXT_SPK
R11
10K

EXT_SPK
C13
EXT_L_AMP_IN

EXT_SPK
R10
33K

1uF
50V

CLOSE TO MSTAR

EXT_SPK
R15
470K
R20
22K

EXT_SPK
R18
5.6K

EXT_SPK
C10
33pF

C14
0.01uF

100
R23

GND
EXT_SPK
R19
5.6K

IN3+

OUT3

100
R22
EXT_R_AMP

EXT_SPK
R13
33K

IN3EXT_SPK
R12
10K

EXT_SPK
C11
33pF

R21
22K
EXT_SPK
R17
2.2K

EXT_L_AMP

C15
0.01uF

EXT_SPK
C12
EXT_R_AMP_IN

EU_OPT
EU_OPT

EXT_SPK
R14
470K

1uF
50V

+3.3V_Normal

R1613
10K
SC1/COMP1_DET
D1611
5.6V
OPT

C1607
0.1uF
16V

R1614
1K

IN CASE OF SMALL= 15V


EU_OPT
L1606

EU_OPT
R4210
0
SC1_SOG_IN EU_OPT
E
ISA1530AC1
Q1601

EU_OPT
R1609
75

AV_DET
22

EU_OPT
C1604
47pF
50V

C1608
220pF
50V
OPT

EU_OPT
R4211
390

D1602
30V
OPT

COM_GND
21
SYNC_IN

EU_OPT
R1635
390

20
SYNC_OUT
19
SYNC_GND2
18

D1603
30V
OPT

SYNC_GND1
17
RGB_IO

EU_OPT
R1628
75

D1610
30V
OPT

16
R_OUT
15

D1604
30V

RGB_GND
14

EU_OPT
R1640
470

EU_OPT
R1616
75

SC1_R+/COMP1_Pr+
R1608
75

+12V/+15V

EU_OPT
C1625
0.1uF
50V

SC1_CVBS_IN

EU_OPT

EU_OPT
C1623
0.1uF
50V

EU_OPT
C1620
100uF
16V

EU_OPT
R1627
22

Rf

EU_OPT
Q1602
2SC3052
B

EU_OPT
R1641
47K
EU_OPT
C1621
47uF
16V
DTV/MNT_VOUT

Rg

Gain=1+Rf/Rg

EU_OPT
R1639
180

EU_OPT
R1642
15K

SC1_FB

R_GND
13
D2B_OUT
12

R4221
0
EU_OPT

G_OUT
11
D2B_IN
10

SC1_G+/COMP1_Y+
D1605
30V

R1604
75

G_GND
9
ID
8
B_OUT

SC1_B+/COMP1_Pb+

7
AUDIO_L_IN
6

D1606
30V

B_GND

OPT
EU_OPT
D1618 R1623
30V
15K

R1605
75

SC1_ID
EU_OPT
R1629
3.9K

5
AUDIO_GND
4
AUDIO_L_OUT

R1617
10K

3
AUDIO_R_IN
2
AUDIO_R_OUT
1

SC1/COMP1_L_IN
D1607
5.6V
OPT

R1606
470K

L1604
120-ohm

C1611
330pF
50V

PSC008-01
JK1602

R1630
12K

R1618
10K
SC1/COMP1_R_IN

Full Scart

D1609
5.6V
OPT

L1603
120-ohm
R1607
470K

C1612
330pF
50V

R1631
12K

[SCART AUDIO MUTE]


+3.5V_ST
DTV/MNT_L_OUT
D1608
5.6V
OPT

EU_OPT
L1601
BLM18PG121SN1D

EU_OPT
C1609
1000pF
50V

EU_OPT
C1618
4700pF

DTV/MNT_L_OUT
EU_OPT
Q1607
2SC3052

EU_OPT
R1648
2K

EU_OPT
R1652
10K

EU_OPT
RT1P141C-T112
Q1610

DTV/MNT_R_OUT
D1601
5.6V
OPT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2012 LG Electronics. Inc. All right reserved.
Only for training and service purposes

EU_OPT
L1602
BLM18PG121SN1D

EU_OPT
C1610
1000pF
50V

EU_OPT
C1619
4700pF

SCART1_MUTE
3

DTV/MNT_R_OUT
EU_OPT
Q1608
2SC3052

1
2

EU_OPT
R1650
2K

EU_OPT
C1636
0.1uF

GP3_S7LR
REAR_JACK

20110324
17
LGE Internal Use Only

RJP
+12V/+15V

R1800
10K

Q1800
AO3407A

L1800
MLB-201209-0120P-N2

C1803
47uF
25V

C1800
2.2uF
G
16V

R1801
10K

R1802
10K

C1801
1uF
25V
OPT

JK1800
MJ-657PT-8-SD

R1805

510

R1807

RJP_CTRL0

RJP_CTRL1

RJP_CTRL2

510
RJP_CTRL3

R1812
3.9K

R1811
3.9K

R1809
3.9K

C1807

R1810
3.9K

5.1V

0.01uF

ZD1804

5.1V

0.01uF

ZD1803

C1806

5.1V

510

0.01uF

R1804

C1805

ZD1802

510

5.1V

R1806

0.01uF

C1804

ZD1801

EXT_SPEAKER_AMP
SPEAKER OUT JACK

12V==>5V AMP POWER


EXT_SPK
IC1801
AP1117EG-13
OUT

330
R1830
EXT_SPK

PEJ027-04

C1839
1uF
16V
EXT_SPK

3
EXT_SPK

R1835
4:C14
SUB_AMP_MUTE

ADJ/GND

C1830
0.1uF
50V
EXT_SPK

47K

R1832
1
EXT_SPK
5%
110
R1831
EXT_SPK

C1831
0.1uF
16V
OPT

R1834
4.7K
EXT_SPK

E EXT_SPK
Q1801
PNP
C

EXT_SPK

IC1800
TS4962

EXT_SPK
R1836

STBY

4.7K

C1832
10uF
10V
EXT_SPK
EXT_L_AMP_IN
11:U22

C470 Close to LDO

24K
R1841
OPT

EXT_SPK
R1839
1.5K

EXT_SPK
C1835
1uF
C1833
15pF
50V
EXT_SPK

R1837
15
EXT_SPK

EXT_SPK
R1840
1.5K
EXT_R_AMP_IN
11:U22
R1838
15
EXT_SPK

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2012 LG Electronics. Inc. All right reserved.
Only for training and service purposes

EXT_SPK
C1837
0.1uF
16V
R1842

NC

IN+

R1827
51K

E_SPRING

6A

T_TERMINAL1

7A

B_TERMINAL1

[EP]GND

R_SPRING

OUT-

T_SPRING

EXT_SPK
R1828
100
EXT_SPK_DET

7B

B_TERMINAL2

6B

T_TERMINAL2

GND

EXT_OUT_L

3:AF8

EXT_OUT_R

3:AF9

C1812
39pF
OPT

EXT_OUT_L
17:Y27

IN

+5V_SUB_AMP

THERMAL

+12V/+15V

JK1801
C1838
0.1uF
EXT_SPK

EXT_SPK

R1833
10K
EXT_SPK

+3.3V_Normal

EXT_SPK

+5V_Normal

L1801

EXT_SPK
BLM18PG121SN1D

+5V_SUB_AMP

C1813
39pF
OPT

VCC

EXT_SPK
R1843

IN-

OUT+
EXT_OUT_R

EXT_SPK
17:Y26

EXT_SPK
C1836
1uF

C1834
15pF
50V
EXT_SPK

GP3_S7LR
SIDE_JACK

20110324
18
LGE Internal Use Only

* Option name of this page : CI_SLOT


(because of Hong Kong)
CI Region
CI SLOT

+5V_CI_ON

CI TS INPUT

CI_DATA[0-7]

CI_DATA[0-7]

+5V_Normal

EAG41860102
P1901
P1902
10067972-000LF
10067972-050LF

C1903
0.1uF
16V

CI_SLOT_JACK

35
R1908

100

CI_DATA[3]

37

38

CI_DATA[4]
CI_DATA[5]

CI_TS_DATA[5]

39

CI_DATA[6]

CI_TS_DATA[6]
CI_TS_DATA[7]

40

CI_DATA[7]

41

42

43

33

R1905

10K

R1919

47

CI_ADDR[10]

44

10

45

11

CI_ADDR[9]

46

12

CI_ADDR[8]

CI_MDI[0]

47

13

CI_ADDR[13]

CI_MDI[1]

48

14

CI_ADDR[14]

49

15

50

16

51

17

52

18

53

19

CI_MDI[5]

54

20

CI_MDI[6]

55

21

CI_ADDR[12]

56

22

CI_ADDR[7]

57

23

CI_ADDR[6]

58

24

CI_ADDR[5]

59

25

CI_ADDR[4]

60

26

CI_ADDR[3]

61

27

CI_ADDR[2]

R1926

33
33

62

28

R1927

33

63

29

64

30

CI_DATA[0]

65

31

CI_DATA[1]

66

32

CI_DATA[2]

67

33

0.1uF
0

R1910
GND

OPT

CI_MDI[4]

CI_MDI[7]
R1906
R1902
R1901

REG

R1925

CI_TS_CLK
CI_TS_VAL

47

47

CI_TS_SYNC

CI_TS_DATA[0]

33

CI_TS_DATA[1]
CI_TS_DATA[2]
CI_TS_DATA[3]

68

R1907

/CI_CD2

R1909

AR1903
100

+5V_Normal

OPT

PCM_RST
/PCM_WAIT

10K

33

R1920
R1916 0

FE_TS_DATA[2]
FE_TS_DATA[1]

CI_MDI[1]

FE_TS_DATA[0]

FE_TS_DATA[0-7]

CI_MIVAL_ERR

/PCM_CE

FE_TS_CLK

CI_MCLKI

CI_OE

CI_WE

100

/PCM_IRQA

C1909
0.1uF

OPT

GND

CI HOST I/F

CI_ADDR[1]
CI_ADDR[0]

CI_ADDR[0-14]

34
69

G2
2

G1
1
CI_DET

IC1902

GND
GND

CLOSE TO MSTAR

1A1
R1904
10K

33
FE_TS_SYNC
FE_TS_VAL_ERR

1OE
C1914
12pF
50V

FE_TS_DATA[3]

CI_MDI[2]

AR1904

CI_IOWR

C1905

FE_TS_DATA[4]
AR1906

CI_MISTRT

CI_IORD

CI_MDI[3]

FE_TS_DATA[5]

CI_MDI[0]

CI_ADDR[11]

CI_MDI[2]

FE_TS_DATA[6]

CI_MDI[5]

PCM_A[0]

GND

TOSHIBA

+3.3V_CI
C1913
0.1uF
16V

VCC

2OE

0ITO742440D

C1904
0.1uF
16V

2Y4
CI_ADDR[7]
1A2
PCM_A[1]

CI_MISTRT
CI_MIVAL_ERR

2Y3
CI_ADDR[6]

18

17

CI_MCLKI
1A3
PCM_A[2]
2Y2
CI_ADDR[5]
1A4
PCM_A[3]
2Y1

CI DETECT

CI_ADDR[4]
GND

+3.3V_Normal

20

19

TC74LCX244FT

AR1901
CI_TS_DATA[4]

FE_TS_DATA[7]

CI_MDI[4]

36

AR1905

CI_MDI[6]

CI_MDI[3]

CI_DATA[0-7]

/CI_CD1

33

CI_MDI[7]

R1921
10K

10K

R1903

C1906
10uF
10V

+3.3V_CI

+3.3V_CI

16

15

14

13

12

10

11

1Y1
CI_ADDR[0]
2A4
PCM_A[7]
1Y2
CI_ADDR[1]
2A3
PCM_A[6]
1Y3
CI_ADDR[2]
2A2
PCM_A[5]
1Y4
CI_ADDR[3]
2A1
PCM_A[4]

+3.3V_CI

CI_SLOT_OR_GATE_NXP

GND

C1902

0.1uF

0.1uF

VCC

OPT
GND

CI_DATA[0]

R1915
CI_DET

CI_DATA[0-7]

C1901

47
R1918

OPT

/PCM_CD
47

CI POWER ENABLE CONTROL

AR1907
33

PCM_D[0]

CI_DATA[1]

PCM_D[1]

CI_DATA[2]

PCM_D[2]

CI_DATA[3]

PCM_D[3]

CI_DATA[4]

AR1908
33

PCM_D[4]

CI_DATA[5]

PCM_D[5]

CI_DATA[6]

PCM_D[6]

CI_DATA[7]

PCM_D[7]

PCM_D[0-7]

10K

/CI_CD1

0.1uF
16V

/CI_CD2

C1908

L1901
BLM18PG121SN1D

R1917

IC1901
74LVC1G32GW

PCM_D[0-7]
CI_DATA[0-7]

+5V_CI_ON
+5V_Normal

Q1902
RSR025P03
S

L1902
BLM18PG121SN1D

CI_ADDR[8]

33

AR1912
PCM_A[8]

R1914
22K

R1912
10K
OPT

C1911
4.7uF
16V

C1910

0.1uF
16V

0.1uF

C1907

CI_ADDR[9]

16V

R1923
10K
OPT

C1912
0.1uF
16V
OPT

PCM_A[10]

CI_ADDR[11]

PCM_A[11]

CI_ADDR[12]

R1922

PCM_A[9]

CI_ADDR[10]

33

AR1913
PCM_A[12]

CI_ADDR[13]

PCM_A[13]

CI_ADDR[14]

PCM_A[14]
/PCM_REG

REG

2.2K
R1913
10K
PCM_5V_CTL

C
B
R1924
10K

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2012 LG Electronics. Inc. All right reserved.
Only for training and service purposes

Q1901
2SC3052
E

CI_OE
CI_WE

AR1909
33

/PCM_OE
/PCM_WE

CI_IORD

/PCM_IORD

CI_IOWR

/PCM_IOWR

GP3_S7LR
PCMCI

20110324
20
LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2012 LG Electronics. Inc. All right reserved.
Only for training and service purposes

GAS7

MDL61930001

6.5T_GAS7

GAS6

MDL61930001

6.5T_GAS6

GAS5

MDL61930001

6.5T_GAS5

GAS4

MDL61930001

6.5T_GAS4

GAS3

MDL61930001

6.5T_GAS3

GAS2

MDL61930001

GAS1

6.5T_GAS2

MDL61930001

6.5T_GAS1

SMD GASKET

GP3_S7LR
SMD_GAS

20110324
20
LGE Internal Use Only

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