Professional Documents
Culture Documents
BITS-GOA
EEE/instr F341
Anita Agrawal
Overview
PSpice
Simulation Program with Integrated
Circuit Emphasis
BITS-GOA
EEE/instr F341
Anita Agrawal
.cir
File
User CKT
Definition
file
.sch
File
User schematic
file
.op
Text file
SPICE
Compile
and
RUN
.print
Text file
.plot
Text file
.probe
Graphics file
BITS-GOA
EEE/instr F341
Anita Agrawal
Circuit Elements
Components
B GaAs MES field-effect transistor
C Capacitor
D Diode
J Junction field-effect transistor
K Mutual inductors (transformer)
L Inductor
M MOS field-effect transistor
Q Bipolar junction transistor
R Resistor
T Transmission line
Source
E Voltage-controlled voltage source
F Current-controlled current source
G Voltage-controlled current source
H Current-controlled voltage source
I Independent current source
V Independent voltage source
Switch
S Voltage-controlled switch
W Current-controlled switch
BITS-GOA
EEE/instr F341
Anita Agrawal
File
.CIR extension
Circuit description
Analysis description
Output description
.END
(end -of-file statement)
BITS-GOA
EEE/instr F341
Anita Agrawal
Notes
1. The first line is the title line, and it may contain
any type of text.
2. The last line must be the .END command.
3. A continuation line is identified by a plus sign
(+) in the first column of the next line. The
continuation lines must follow one another in
the proper order.
6
BITS-GOA
EEE/instr F341
Anita Agrawal
Notes contd
4. A comment line may be included anywhere,
preceded by a semicolon ;
5. The number of blanks between items is not
significant (except in the title line). Tabs and
commas are equivalent to blanks.
BITS-GOA
EEE/instr F341
Anita Agrawal
Notes contd
6. PSpice statements or comments can be in either
upper- or lowercase
7. SPICE / PSpice is user-friendly software; it gives
an error message in the output file that identifies
a problem.
8. The symbols in PSpice are represented without
subscripts.
8
BITS-GOA
EEE/instr F341
Anita Agrawal
Types of Analysis
DC Analysis
Transient Analysis
AC Analysis
BITS-GOA
EEE/instr F341
Anita Agrawal
Example:
Compute the node voltages and source currents
Independent DC Voltage source
VS 1 0 DC 20V
R1 1 2 500
R2 2 5 800
R3 2 3 1K
R4 4 0 200
VX 3 0 DC 0V
VY 5 4 DC 0V
IDC 0 4 DC 50m
.end
13
BITS-GOA
EEE/instr F341
Anita Agrawal
NODE
VOLTAGE
( 1) 20.0000 (
2)
12.5000 ( 3)
0.0000 ( 4)
10.5000
( 5)
10.5000
.TF (transfer)
Purpose: causes the DC gain to be calculated by
linearizing the circuit around the bias point.
.TF <output variable> <input source name>
e.g.
.TF V(5) VIN
.TF I(VDRIV) ICNTRL
In our Case:
.TF V(4) Vs
18
BITS-GOA
EEE/instr F341
Anita Agrawal
19
BITS-GOA
NODE
VOLTAGE
( 1)
20.0000
2)
12.5000 (
0.0000 ( 4)
10.5000
( 5)
10.5000
(
3)
****
SMALL-SIGNAL CHARACTERISTICS
V(4)/VS = 1.000E-01
INPUT RESISTANCE AT VS = 1.000E+03
OUTPUT RESISTANCE AT V(4) = 1.700E+02
EEE/instr F341
Anita Agrawal
Dependent Sources
20
BITS-GOA
EEE/instr F341
Anita Agrawal
BITS-GOA
n+
17
3
3
1
1
12
n8
1
1
3
3
0
nc+
42
11
0
11
0
20
nc- gain
18
0
11
0
11
41
EEE/instr F341
24.0;
20.0
-20.0;
-20.0;
20.0;
16.0
gain is 24
same as above
same as above
same as above
Anita Agrawal
22
*Name n+
Glab 23
G1
12
Grad 19
Grad 19
Grad 40
BITS-GOA EEE/instr
nnc+
17
8
9
1
40
6
40
99
19
99
F341
nc3
0
99
6
6
transconductance
2.5
4E-2
0.65
-0.65 ; same as above
0.65 ; etc.
Anita Agrawal
23
Anita Agrawal
*Name
Ftrn
Vclt
Fcur
Vx
F3
V1
24
BITS-GOA
n+
81
23
63
33
2
3
n19
12
48
71
0
1
EEE/instr F341
Vmonitor
Vclt
DC
Vx
DC
V1
DC
Gain
50.0
0V ; controls Ftrn
20.0
0V ; controls Fcur
15.0
0V ; controls F3
Anita Agrawal
25
BITS-GOA
EEE/instr F341
Anita Agrawal
.TF (transfer)
Purpose The .TF command/statement causes the
DC gain to be calculated by linearizing the circuit
around the bias point.
.TF <output variable> <input source name>
e.g.
.TF V(5) VIN
.TF I(VDRIV) ICNTRL
In our Case:
.TF V(1,0) Vs
The results of the .TF command are only available in the output file. They
cannot be viewed in Probe.
26
BITS-GOA
EEE/instr F341
Anita Agrawal
100V
Vc 2 3 DC
Fx 6 7 Vc
0V; controls Fx
4.0; gain = 4
4
7
4
0
6
0
5.0
5.0
4.0
4.8
1.0
1MEG
* out_var input_source
.TF V(1,0) Vs
.END
27
BITS-GOA
EEE/instr F341
Anita Agrawal
NODE
VOLTAGE
(
1) 180.0000
(
5) -160.0000
NODE
VOLTAGE
(
2) -60.0010
(
6) -176.0000
****
4.00E+02
NODE
VOLTAGE
(
4) -80.0010
WATTS
SMALL-SIGNAL CHARACTERISTICS
V(1,0)/Vs =
1.800E+00
INPUT RESISTANCE AT Vs =
2.500E+01
28
NODE
VOLTAGE
(
3) -60.0010
(
7)-864.0E-06
BITS-GOA
EEE/instr F341
5.000E+00
Anita Agrawal
.DC LIN
General form
.DC [LIN] <sweep variable name> + <start value> <end
value> <increment value> +<nested sweep specification>
Examples
.DC VIN -.25 .25 .05
.DC LIN I2 5mA -2mA 0.1mA
.DC VCE 0V 10V .5V IB 0mA 1mA 50uA
29
BITS-GOA
EEE/instr F341
2/2/2016
Anita Agrawal
Examples
.DC DEC NPN QFAST(IS) 1E-18 1E-14 5
30
BITS-GOA
EEE/instr F341
2/2/2016
Anita Agrawal
.PRINT
General form
.PRINT <analysis type> [output variable]*
Examples
.PRINT DC V(3) V(2,3) V(R1) I(VIN) I(R2) IB(Q13)
VBE(Q13)
.PRINT AC VM(2) VP(2) VM(3,4) VG(5) VDB(5) IR(6)
II(7)
31
BITS-GOA
EEE/instr F341
2/2/2016
Anita Agrawal
Previous Example
.dc VS list 10 15 20
.print DC I(r1) i(r2) I(r3) i(r4)
.end
32
BITS-GOA
EEE/instr F341
2/2/2016
Anita Agrawal
NODE
VOLTAGE
( 1)
20.0000
2)
12.5000 (
0.0000 ( 4)
10.5000
( 5)
10.5000
(
3)
VS
I(r1)
I(r2)
I(r3)
I(r4)
1.000E+01 -5.000E-03
2.500E-03 -7.500E-03 -4.750E-02
1.500E+01 -1.000E-02 -1.500E-12 -1.000E-02 -5.000E-02
2.000E+01 -1.500E-02 -2.500E-03 -1.250E-02 -5.250E-02
33
BITS-GOA
EEE/instr F341
Anita Agrawal
.PROBE
General form
.PROBE [output variable]*
Examples
.PROBE V(3) V(2,3) V(R1) I(VIN) I(R2) IB(Q13)
VBE(Q13)
.PROBE D(QBAR)
34
BITS-GOA
EEE/instr F341
2/2/2016
Anita Agrawal
.PLOT
General form
.PLOT <analysis type> [output variable]*
+ ( [<lower limit value> , <upper limit value>] )*
Examples
.PLOT DC V(3) V(2,3) V(R1) I(VIN) I(R2) IB(Q13)
VBE(Q13)
.PLOT AC VM(2) VP(2) VM(3,4) VG(5) VDB(5) IR(D4)
.PLOT TRAN V(3) V(2,3) (0,5V) ID(M2) I(VCC) (50mA,50mA)
35
BITS-GOA
EEE/instr F341
2/2/2016
Anita Agrawal
.OP
Helps to give more details about the bias points in
the output file
36
BITS-GOA
EEE/instr F341
2/2/2016
Anita Agrawal