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Serial Synchronous Interface

T. Revathi
trevathi@vit.ac.in
TIFAC-CORE in Automotive Infotronics

Course outline

Preliminary
Concepts

SSI
Features In
ARM

SSI
Implementation

Preliminary Concepts

Why SPI ?
Master and Slave Concept.
High Data Rate.

Data synchronization.
Cost Effective (No Driver Support).

What - SPI ?
SPI is a synchronous serial protocol proposed by Motorola
to be used as standard for interfacing peripheral chips to a

microcontroller.
It is a synchronous serial data link that operates in full
duplex (signals carrying data go in both directions
simultaneously).
Data is clocked along with the clock signal (SCK).

Clock signal controls when data is changed and when the


data should be read.

SPI
Devices are classified into the master or slaves.

The SPI protocol uses four wires to carry out the task of
data communication:
MOSI: Master out slave in
MISO: Master in slave out

SCK: Serial clock


SS: Slave select

An SPI data transfer is initiated by the master device.

A master is responsible for generating the SCK signal to


synchronize the data transfer.

Applications

SPI protocol is mainly used to interface with


LED/LCD drivers.

Shift registers.
Phase locked loop chips.
Memory components with SPI interface, or
A/D or D/A converter chips.

SPI Working modes

SPI Working modes

Synchronous Serial
Interface in Cortex

About
Stellaris microcontroller includes Four Synchronous Serial Interface (SSI) modules.
Each SSI module is a master or slave interface for synchronous serial communication
with peripheral devices that have either Freescale SPI, MICROWIRE, or Texas

Instruments synchronous serial interfaces.


Stellaris LM4F120H5QR SSI modules have the following features:
Programmable interface operation for Freescale SPI, MICROWIRE, or Texas
Instruments

synchronous serial interfaces


Master or slave operation
Programmable clock bit rate and prescaler
Separate transmit and receive FIFOs, each 16 bits wide and 8 locations deep

About
Programmable data frame size from 4 to 16 bits
Internal loopback test mode for diagnostic/debug testing
Standard FIFO-based interrupts and End-of-Transmission interrupt
Efficient transfers using Micro Direct Memory Access Controller (DMA)
Separate channels for transmit and receive

Receive single request asserted when data is in the FIFO; burst request
asserted when FIFO contains 4 entries
Transmit single request asserted when there is space in the FIFO; burst
request asserted when four or more entries are available to be written in

the FIFO

SSI Block Diagram

SSI Signals

Texas Instruments SSI Frame Format

Interrupts in SSI

SSI Modules Base Address

Implementation using APIs

Implementation Steps
Step 1 : Set the Clock Source
Step 2 : Select the peripheral and port associated with the
peripheral
Step 3 : Select the alternate function of the Pin
Step 4 : Configure IO Pins to use as SSI Pins
Step 5 : Configure SSI
Step 6 : Check if there is any data in the receive FIFO
Step 7 : Put the data to FIFO for transmit
Step 8 : Wait until data is transferred to the transmit FIFO

Step 1: Set the Clock Base - SysCtlClockSet


Sets the clocking of the device.

Prototype:
void SysCtlClockSet(unsigned long ulConfig)

Parameters:
ulConfig is the required configuration of the device
clocking.

Description:
This function configures the clocking of the device.
The input crystal frequency, oscillator to be used, use of the
PLL, and the system clock divider are all configured with
this function.

Step 2 : Select the peripheral and port associated with the


peripheral - SysCtlPeripheralEnable

Enables a peripheral.

Prototype:
void SysCtlPeripheralEnable(unsigned long
ulPeripheral)

Parameters:
ulPeripheral is the peripheral to enable.

Description:
Peripherals are enabled with this function.
At power-up, all peripherals are disabled; they must
be enabled in order to operate or respond to register
reads/writes.

Step 3: Select the alternate function of the Pin-GPIOPinConfigure


Configures the alternate function of a GPIO pin.

Prototype:
void GPIOPinConfigure(unsigned long ulPinConfig)

Parameters:
ulPinConfig is the pin configuration value, specified as only one of the
GPIO_P??_??? values.

Description:
This function configures the pin mux that selects the peripheral function
associated with a particular GPIO pin.
Only one peripheral function at a time can be associated with a GPIO pin,
and each peripheral function should only be associated with a single GPIO
pin at a time .
To fully configure a pin, a GPIOPinType() function should also be called.

Step 4: Configure IO Pins to use as SSI Pins-GPIOPinTypeSSI


Configures pin(s) for use by the SSI peripheral.
Prototype:
void GPIOPinTypeSSI(unsigned long ulPort, unsigned char ucPins)
Parameters:
ulPort is the base address of the GPIO port.
ucPins is the bit-packed representation of the pin(s).
Description:

The SSI pins must be properly configured for the SSI peripheral to
function correctly.
This function provides a typical configuration for those pin(s); other
configurations may work as well depending upon the board setup
(for example, using the on-chip pull-ups).
The pin(s) are specified using a bit-packed byte, where each bit that
is set identifies the pin to be accessed.

Step 5: Configure SSI -SSIConfigSetExpClk


Configures the synchronous serial interface.

Prototype:
void SSIConfigSetExpClk(unsigned long ulBase,unsigned long
ulSSIClk, unsigned long ulProtocol, unsigned long
ulMode,unsigned long ulBitRate, unsigned long ulDataWidth)

Parameters:

ulBase specifies the SSI module base address.


ulSSIClk is the rate of the clock supplied to the SSI module.
ulProtocol specifies the data transfer protocol.
ulMode specifies the mode of operation.
ulBitRate specifies the clock rate.
ulDataWidth specifies number of bits transferred per frame.

Step 5: Configure SSI -SSIConfigSetExpClk

Description:

This function configures the synchronous serial


interface.
It sets the SSI protocol, mode of operation, bit
rate, and data width.

Modes of operation

Polarity
0
0
1
1

Phase
0
1
0
1

Mode
SSI_FRF_MOTO_MODE_0
SSI_FRF_MOTO_MODE_1
SSI_FRF_MOTO_MODE_2
SSI_FRF_MOTO_MODE_3

Mode 0

Mode 1

Mode 2

Mode 3

Step 6: Check if there is any data in the receive FIFOSSIDataGetNonBlocking


Gets a data element from the SSI receive FIFO.

Prototype:
long SSIDataGetNonBlocking(unsigned long ulBase,
unsigned long *pulData)

Parameters:
ulBase specifies the SSI module base address.

pulData is a pointer to a storage location for data that was


received over the SSI interface.

Step 7: Put the data to FIFO for transmit - SSIDataPut


Puts a data element into the SSI transmit FIFO.

Prototype:
void SSIDataPut(unsigned long ulBase,unsigned long
ulData)

Parameters:
ulBase specifies the SSI module base address.
ulData is the data to be transmitted over the SSI
interface.

Description:
This function places the supplied data into the transmit
FIFO of the specified SSI module.
If there is no space available in the transmit FIFO, this
function waits until there is space available before
returning.

Step 8:Wait until data is transferred to the transmit FIFOSSIBusy


Determines whether the SSI transmitter is busy or not.

Prototype:
tBoolean SSIBusy(unsigned long ulBase)

Parameters:
ulBase is the base address of the SSI port.

Description:
This function allows the caller to determine whether
all transmitted bytes have cleared the transmitter
hardware.
If false is returned, then the transmit FIFO is empty
and all bits of the last transmitted word have left the
hardware shift register.

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