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A New Algorithm to Determine the Magnitudes of dc

Voltage Sources in Asymmetric Cascaded Multilevel


Converters Capable of Using Charge Balance Control
Methods
Sara Laali1, Karim Abbaszadeh2, Hamid Lesani3
1

Member of Young Researchers Club, Islamic Azad University, Tabriz Branch, Tabriz, Iran
2
Islamic Azad University, South Tehran Branch, Tehran, Iran
2
Department of Electrical Engineering, K. N. Toosi University of Technology, Tehran, Iran
3
School of Electrical & Computer Engineering, University of Tehran, Tehran, Iran
E-mails: 1s.laali@yahoo.com, 2Abbaszadeh@eetd.kntu.ac.ir, 3lesani@ut.ac.ir

Abstract In this paper, a new algorithm is proposed to


determine the magnitudes of dc voltage sources used in
asymmetric cascaded multilevel converters. Using this
algorithm, it is possible to generate the maximum number of
output voltage levels and maximum output voltage amplitude
using the minimum number of dc voltage sources. The
magnitudes of dc voltage sources are determined in a way
considering which it is possible to use charge balance control
methods to all dc sources except the minimum amplitude dc
voltage source (first bridge). Therefore, the lifetime of dc voltage
sources used in different bridges of cascaded asymmetric
multilevel converter except the first bridge are the same,
considering which the systems low maintenance cost can be
noted as a result. The simulation results in PSCAD/EMTDC
confirm the abilities of the proposed method.
Keywords Multilevel converter, Symmetric cascaded
multilevel converter, Asymmetric cascaded multilevel converter,
Charge balance control methods

I. INTRODUCTION
The multilevel converters were first introduced in 1975.
The interest of using multilevel converters is increased due to
the growing demand for high power, high voltage converters
and considering the limitations; exist in the voltage and
current ranges of semiconductor-based switches. High
efficiency, low electromagnetic interference, providing
desirable output waveform, possessing lower harmonic
components and ability of using low speed semiconductor
switches are some of other advantages of this kind of
converters, which results in paying more attentions to these
converters in recent years. In these converters, some smallscale dc voltage sources considered as the input sources
generate the desired voltage. As the number of dc voltage
sources increases in input side, the sinusoidal like waveform
can be generated at the output of converter. The power
switches suffer lower dv / dt stress due to low dc voltage
source amplitude [1]-[4].

Several topologies have been presented for multilevel


converters. Fig. 1 shows the basic topologies of multilevel
converters. Among these several topologies, the cascaded
multilevel converter is under more attention due to its
structure simplicity. There are several methods for controlling
multilevel converters that are summarized in Fig. 2 [5]. One
of the most practical control methods of the multilevel
converters is fundamental frequency control method. This is
due to considerably low switching losses in this control
method in compare with the other control methods. In
fundamental frequency control method, the power extracted
from dc voltage sources in each bridge, differs from other
bridges during a single cycle. In other words, the power
extracted from the dc voltage sources in bridges becomes
time variable and therefore dc voltage sources would possess
different charges [1]. In result, the lifetime of used dc voltage
sources will differ and the maintenance cost of system will
increase.
In this paper, the cascaded multilevel converters are
briefly reviewed initially and a new algorithm is proposed in
continuous to determine the value of dc voltage sources used
in cascaded multilevel converters in a way that the charge
balance control methods [6] can be applied to control the
converter. Finally, the capability of the proposed method
would be confirmed by presenting the simulation results in
PSCAD/EMTDC and comparing them to the results of
method presented in [1], which is almost one of the last
activities accomplished in this field.
Multilevel
Converters
Isolated
DC Sources

Common
DC Sources

Cascaded
Diode Clamped Flying Capacitor
Converters
Converters
Converters
Fig. 1. The basic topologies of multilevel converters

IGBT and an anti-parallel connected diode. There is no need


for diode application if the load of converter is pure
resistance. Each used bridge in this converter is able to
generate three voltage levels ( Vdc , 0 and +Vdc ) at its output
terminals. Fig. 4 shows an example of output voltage of a
symmetric 7-level cascaded converter. As illustrated in Fig.4,
switching frequency of each switch exists in each level of
converter equals to the frequency of related output voltage
and in result the switching losses considerably decreases. This
switching method is known as fundamental frequency
method. As shown in Fig. 4, the operation interval of each
voltage source differs from others and consequently, the dc
voltage sources charge will not be similar. Since the energy
values provided for load by different sources is not the same,
the lifetime of sources would not be similar which leads to an
increase in maintenance costs.

Multilevel Modulation Techniques

PWM

Fundamental Frequency

Sinusoidal PWM
Space Vector PWM
Fig. 2. Different control methods of multilevel converters

II. A REVIEW ON CASCADED MULTILEVEL


CONVERTERS

As shown in Fig. 3 the single-phase cascaded multilevel


converter consists of a few numbers of series connected full
bridge levels. The output voltage of converter equals to sum
of the output voltages of all bridges and is mentioned as
follows:

vo (t ) = vo ,1 (t ) + vo, 2 (t ) + " + vo, N (t )

(1)

where N is the number of bridges used in cascaded


converter.
In cascaded multilevel converters, each bridge requires an
independent dc source which can be batteries, super
capacitors and renewable energy sources such as fuel cells,
solar cells and etc [3], [8]. The similarity of required control
method and protection devices, which enables packing each
bridge in a single package, is the advantageous of such
topology [1].

S1,1

S 2,1
io

vo,1
+

idc , N

idc , 2

idc ,1

Vdc ,1
S 3,1

S1, 2

S 4 ,1

S 2, 2

Vdc, 2

Vdc , N

S 3, 2

S1, N

S 3, N

S 4, 2

S 2,N

S 4, N

vo, 2
vo

Fig. 4. The output waveform of different levels for a 7-level cascaded


converter

High number of switches utilized in cascaded multilevel


converter is one of the disadvantageous of this converter, in
which the losses, required space for installation, cost and
converter control complexity, increase as the number of
switches and dc voltage sources increase.
According to the fact that the industrial loads are generally
resistance-inductance loads and they show low pass filter
behavior, the output current can be considered as follows:

io = I max sin(t + )

vo , N

(2)

Fig. 3. Cascaded Multilevel Converter

Cascaded multilevel converters are classified in two


Symmetric and Asymmetric groups. The converter is called
symmetric if the magnitudes of dc sources in all bridges are
similar. The converter is called asymmetric if at least the
magnitude of one of the dc sources differs from others [7].
Each bridge used in a cascaded multilevel converter is
comprised of 4 power switches and a dc voltage source in a
way that provides a squared shaped waveform with different
duty cycles. In this converter, each switch is comprised of an

where I max is the output current peak value and is the


angle between output voltage and output current of cascaded
converter.
If the value of all dc voltage sources of Fig. 3 equals to
Vdc , the number of output voltage levels (nsetp ) can be
expressed as follows in terms of the number of used bridges
(N ) :
nstep = 2 N + 1

(3)

The maximum amplitude of generated output voltage


(Vo,max ) for this kind of converters is as follows:
Vo ,max = N Vdc

(4)

The asymmetric cascaded multilevel converter is proposed


to create more levels at output without any increase in the
number of bridges. In [10, 11], the dc voltages sources are
proposed to be chosen according to a geometric progression
with a factor of 2 or 3 In this case, the number of output
voltage levels for N series connected bridge is as follows:
nstep = 2 N +1 1
nstep = 3 N

if Vdc , j = 2 j 1Vdc j = 1, 2 , , N
if Vdc , j = 3 j 1Vdc j = 1, 2, , N

(5)
(6)

If the number of levels and the maximum amplitude of


generated voltage in this given algorithm are compared to the
similar parameters of symmetric cascaded converters, it is
obvious that, for the similar number of bridges, in compare to
the symmetric cascaded multilevel converter, the number of
levels and the maximum amplitude of generated voltage at the
output of converter are considerably increased in algorithm
presented in [1]. It is important to note that the reason for
which the algorithm presented in [1] is compared to the
symmetric cascaded multilevel converter is the fact that it is
possible to apply charge balance control methods in both of
them.
In this paper, a new algorithm is proposed to determine
the magnitudes of dc voltage sources in order to develop the
number of generated levels at the output of converter and
increase the maximum amplitude of generated voltage. It
should be noted that it is possible to use charge balance
control methods in proposed algorithm. It is recommended to
choose the magnitudes of dc voltage sources as follows:

For these cases, the maximum generated output voltage


equals with follows:

Vdc ,1 = Vdc

Vo ,max = (2 N 1)Vdc if Vdc , j = 2 j 1 Vdc j = 1, 2,", N

(7)

Vdc , j = 3Vdc

3N 1
Vdc if Vdc , j = 3 j 1 Vdc j = 1, 2,", N
Vo ,max =
2

(8)

Here, the maximum number of generated levels at output


voltage is calculated as follows:

Comparing (3), (4), (7) and (8), it can be seen that the
asymmetrical multilevel converters can generate more voltage
levels and higher maximum output voltage with the same
number of bridges.

III. PROPOSED ALGORITHM

Vdc , j = 2Vdc

(9)
j = 2, 3, , N

(10)

(15)

In the proposed algorithm, the maximum amplitude of


generated output voltage (Vo ,Max ) is given by:
(16)

Comparing (11), (12), (15) and (16), it is obvious that, for


the similar number of bridges, the proposed algorithm is able
to provide more number of levels and higher maximum
voltage amplitude in comparison the algorithm presented in
[1]. Figs. 5 and 6 show the variation of the maximum number
of levels and maximum amplitude of generated voltage (in
per unit) in terms of similar used number of bridges for
proposed algorithm and the one presented in [1], respectively.
60

40

(11)

The maximum amplitude of generated output voltage


(Vo ,Max ) is as follows:
(12)

proposed

n step
20

[1]
0

Vo ,Max = (2 N 1)Vdc

(14)

n step = 6 N 3

Here, the maximum generated level at output voltage


(nstep ) is as follows:
nstep = 4 N 1

j = 2, 3, , N

Vo ,max = (3N 2)Vdc

In [1], a new algorithm has been presented to determine


the amplitude of dc voltage sources of asymmetric cascaded
multilevel converters. In this given algorithm, the amplitudes
of dc sources are determined as follows:
Vdc ,1 = Vdc

(13)

10

N
Fig. 5. Variation of maximum number of levels versus number of bridges

30

20

proposed

Vo ,max
Vdc
10

[1]
0

10

N
Fig. 5. Variation of maximum amplitude of generated voltage versus number
of bridges

IV. SIMULATION RESULTS

The simulation results in PSCAD/EMTDC are used to


prove the correct operation of proposed algorithm in desirable
output voltage waveform generation and implementation of
charge balance control methods. The control method used in
this paper is fundamental frequency method. The reason is the
fact that the switching frequency of this switching method is
less than the other methods and as a result, the switching
losses are considerably low. The simulation results are
presented for classic control method and full wave and half
wave charge balance control methods.
Fig.7 shows the simulated asymmetric cascaded 15-level
converter which consists of three H-Bridge stages. The value
of used dc voltage sources are Vdc ,1 = 100V and
Vdc , 2 = Vdc ,3 = 300 V .

This converter is able to generate 15 levels at its output


with maximum voltage of 700 V and it is designed based on
the proposed algorithm. It is necessary to mention that the
converter could just provide 10 levels at its output with
maximum voltage of 500V if it was designed on the method
presented in [1]. Compared to the method presented in [1], the
proposed method shows great advantageous due to more
number of levels and maximum amplitude of generated
output voltage. It is important to mention that the other
capabilities of both methods are the same. The load connected
to the converter is a R L load with R = 100 and
L = 55 mH .
Figs. 8 and 9 show the voltage and current waveforms,
respectively. As shown in Fig. 8, this converter is able to
generate step waveform at its output with 15 levels and
700 V maximum voltage. Comparing current waveform with
the voltage waveform shows that the current waveform is
closer to ideal sinusoidal waveform. This is due to application
of resistive-inductive load, which behaves as a low-pass filter.
Considering the above comparison, it is obvious that there is a
phase difference between voltage and current waveform,
which is due to inductive characteristics of the load.
800

Vo

-800
0.000

0.020

0.040

0.060

0.080

Fig. 8. The output voltage waveform of a 15-level asymmetric cascaded


converter in classic control method

S1,1

8.0

S3,1

Io

vo,1

100V
S 4,1

S 2,1

-8.0
0.000

0.020

0.040

0.060

0.080

Fig. 9. The output current waveform of a 15-level asymmetric cascaded


converter in classic control method

S1, 2

S 3, 2
+

vo , 2

300V
S 4, 2

S 2, 2

S1,3

S 3,3

vo , 3

300V
S 4, 3

S 2, 3

Fig. 7. 15-level asymmetric cascaded converter

vo

The output voltages of different levels of converter using


classic control method are illustrated in Fig. 10. The output
waveform of each level is in pulse waveform in a way that the
sums of output waveforms of different levels regenerate the
semi-sinusoidal waveform at load side. As shown in Fig. 10,
the width of generated pulses differs in different levels. In
result, the operation time of different dc voltage sources
differs from each other. The currents passing through
different bridges are similar due to series connection of
bridges outputs. Therefore, the energy extracted from dc
voltage sources of different bridges would differ.
Consequently, the dc voltage sources of different bridges
would possess different charges and their lifetime would not
be the same.
In full-wave and half-wave charge balance control
methods, the load voltage and current waveforms are the

same as the waveforms of classic method (Figs. 8 and 9).


However, the output waveforms of different bridges differ
from each other. For full-wave charge balance control
method, the output voltage waveforms of different bridges are
illustrated in Fig. 11. In this converter, the full-wave charge
balance control method is not used for the first bridge while it
is used to control the second and third bridges. As shown in
Fig. 11, the output voltages of second and third bridges are
substituted between these bridges in a way that the operation
period of them are equalized after two periods and in result,
the sources used in these two bridges are charged or
discharged equally and their lifetime would be similar if their
initial charges are equal.
For full-wave charge balance control method, the output
voltage waveforms of different bridges are illustrated in Fig.
12. In this converter, the full-wave charge balance control
method is not used for the first bridge while it is used to
control the second and third bridges. As this figure shows, the
output voltages of second and third bridges are substituted
between these bridges in a way that the operation period of
them are equalized after two periods and in result, the sources
used in these two bridges are charged or discharged equally
and their lifetime would be similar if their initial charges are
equal. It is necessary to mention that the operation period of
the dc voltage source used in the first bridge differs from
others in both full-wave and half-wave charge balance control
methods. In result, the charge balance control methods are not
applicable for the first bridge.

150

150
100
50
0
-50
-100
-150
0.000

0.040

0.060

0.080

Vo2

300
200
100
0
-100
-200
-300
-400
0.000

0.020

0.040

0.060

0.080

Charge Balance (15-Level)


400

Vo3

300
200
100
0
-100
-200
-300
-400
0.000

0.020

0.040

0.060

0.080

Fig. 11. The output voltage waveforms of different bridges of a 15-level


asymmetric cascaded converter in full-wave charge balance control method
Vo1

100

100

50

50

-50

-50

-100

-100

-150

-150
0.000

0.020

0.040

0.060

0.080

0.000

0.020

0.040

0.060

0.080

Charge Balance (15-Level)

Charge Balance (15-Level)


400

0.020

Charge Balance (15-Level)


400

150

Vo1

Vo1

Vo2

400

Vo2

300
200

200

100
0

-100
-200

-200

-300
-400

-400

0.000

0.020

0.040

0.060

0.080

0.000

Charge Balance (15-Level)


400

0.040

0.060

0.080

Charge Balance (15-Level)

Vo3

400

200

Vo3

200

-200

-200

-400
0.000

0.020

0.020

0.040

0.060

0.080

Fig. 10. The output voltage waveforms of different bridges of a 15-level


asymmetric cascaded converter in classic method

-400
0.000

0.020

0.040

0.060

0.080

Fig. 12. The output voltage waveforms of different bridges of a 15-level


asymmetric cascaded converter in half-wave charge balance control method

V. CONCLUSION

In this paper, the advantageous of asymmetric cascaded


multilevel inverters were clarified by a brief review on
cascaded multilevel converters. However, in spite of their
advantageous, it is not possible to use charge balance control
methods to control them properly. Therefore, a new
mathematical algorithm is proposed initially to determine the
magnitudes of dc voltage sources used in asymmetric
multilevel converters in a way that the maximum number of
levels and the maximum amplitude can be provided for the
output voltage using the minimum number of dc voltage
sources and there would be the possibility of using charge
balance control methods. The results of the proposed method
are compared to the results of [1], which is the one of the last
activities accomplished in this field, doing which the better
capabilities of proposed method are proved in compare to the
conventional methods. The simulation results in
PSCAD/EMTDC reconfirm the abilities of proposed method.

REFERENCES
[1]

[2]

[3]

[4]

[5]

[6]

[7]

[8]

[9]
[10]

E. Babaei and S. H. Hosseini, Charge balance control methods


for asymmetrical cascade multilevel converters, International
Conference on Electrical Machines and Systems, Korea, 2007,
pp. 74-79.
H. D. Fuches, Development and implementation of a 1.5MW
inverter and active power filter system for the injection of
regenerated energy in spoernet traction substation, MSc Thesis,
University of Stellenbosch, Stellenbosch, South-Africa, Dec.
2005
E. Babaei, A caccade multilevel converter topology with
reduced number of switches, IEEE Trans. Power Electron.,
Vol. 23, No. 6, pp. 2657-2664, Nov. 2008
Z. Du, L. M. Tolbert, and J. N. Chiassen, Harmonic
elimination for multilevel converter with programmed PWM
method, IEEE Industry Application Society Annual Meeting,
Seattle, Washington, 2004, pp. 2210-2215.
E. Babaei, S. H. Hosseini, G. B. Gharehpetian, M. Tarafdar
Haque and M. Sabahi, Reduction of dc voltage sources and
switches in asymmetrical multilevel converters using a novel
topology, Elsevier Journal of Electrical Power System
Research, Vol. 77, No. 8, pp. 1073-1085, Jun. 2007.
M. L. Tolbert, F. Z. Peng, T. Cunnyngham, and J. N. Chiasson,
Charge balance control schemes for cascade multilevel
converter in hybrid electric vehicles, IEEE Trans. Ind.
Electron., Vol. 49, No. 5, pp. 1058-1064, Oct. 2002.
E. Babaei and S. H. Hosseini, New cascaded multilevel
inverter topology with minimum number of switches, Elsevier
Journal of Energy Conversion and Management, Vol. 50, No.
11, pp. 2761-2767, Nov. 2009.
A. K. Al-othman and T. H. Abdelhamid, Elimination of
harmonics in multilevel inverters with non-equal dc source
using PSO, Elsevier Journal of Energy Conversion and
Management, Vol. 50, pp. 756-764, 2009.
M. Manjrekar, T. A. Lipo, A hybrid multilevel inverter
topology for drive application, APEC, 1998, pp. 523-529.
A. Rufer, M. Veenstra, A. Gopakumar Asymmetric multilevel
converter for high resolution voltage phasor generation,
European Conference on Power Electronics and Applications,
Switzerland, 1999.

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