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Reg. No. :
J 3907
B.E./B.Tech. DEGREE EXAMINATION, MAY/JUNE 2009.
Second Semester
Civil Engineering
GE 2151 BASIC ELECTRICAL AND ELECTRONICS ENGINEERING
(Common to Aeronautical Engineering, Automobile Engineering,
Mechanical Engineering, Production Engineering, Marine Engineering,
Petroleum Engineering, Biotechnology, Chemical Engineering, Fashion Technology,
Polymer Technology, Rubber and Plastics Technology and Textile Technology)
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(Regulation 2008)
1.
2.
3.
4.
5.
6.
What are the bias conditions of the base-emitter and base-collector junction for
a transistor to operate as an amplifier?
7.
8.
Draw the symbol for OR gate and write its truth table.
9.
10.
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PART B (5 16 = 80 marks)
11.
(a)
(i)
(8)
Fig. 1
(ii)
(8)
Or
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(b)
(i)
phase, three wire, 350 volts ABC system. Find the line currents. (8)
12.
(a)
(ii)
(i)
(ii)
(8)
Or
(b)
13.
(a)
(i)
(ii)
(i)
(ii)
Draw the circuit diagram for full-wave rectifier and explain its
working.
(8)
Or
(b)
(i)
(ii)
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J 3907
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14.
(a)
(i)
Draw the logic diagram of a clocked master slave JK flip flop and
explain its working.
(8)
(ii)
Full adder
(2)
Half-adder.
Or
(b)
15.
(a)
(i)
Draw the logic diagram of a 4 bit buffer register and explain its
working.
(8)
(ii)
(i)
(4)
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(ii)
(b)
(i)
(ii)
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J 3907