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applications. The power converter includes two full bridge converters (one serving as
inverter and other as rectifier). This Bidirectional dcdc converter is best for electrical
vehicle applications. The topology proposed in the thesis has advantages of simple
circuit topology with soft switching implementation without additional devices, high
This advantages make the converter promising for medium and high power
applications especially for auxiliary power supply in fuel cell vehicles and power
generation where the high power density, low cost, lightweight and high reliability
technique for making MOSFETS devices to operate and control. PWM technique is
1
CHAPTER-1
INTRODUCTION
2
1.1 PROJECT OVERVIEW
Until the fuel cell voltage raises to a level high enough to hold the
high-voltage bus, the excess load from the battery will be released. The
regenerated braking energy can also be fed back and stored in the battery
using the dcdc converter.
3
1.2 INTRODUCTION TO DC-DC CONVERTER:
DC-DC converters are devices which change one level of direct current voltage
to another (either higher or lower) level. They are primarily of use in battery-powered
appliances and machines which possess numerous sub circuits, each requiring
different levels of voltage. A DC-DC converter enables such equipment to be
powered by batteries of a single level of voltage, preventing the need to use numerous
batteries with varying voltages to power each individual component.
In this circuit the transistor turning ON will put voltage Vin on one end of the
inductor. This voltage will tend to cause the inductor current to rise. When the
transistor is OFF, the current will continue flowing through the inductor but now
flowing through the diode. We initially assume that the current through the inductor
does not reach zero, thus the voltage at Vx will now be only the voltage across the
conducting diode during the full OFF time. The average voltage at Vx will depend on
the average ON time of the transistor provided the inductor current is continuous.
4
To analyse the voltages of this circuit let us consider the changes in the inductor
current over one cycle. From the relation
Vx Vo = L (di/dt)
For steady state operation the current at the start and end of a period T will not
change. To get a simple relation between voltages we assume no voltage drop across
transistor or diode while ON and a perfect switch change. Thus during the ON time
Vx= Vin and in the OFF Vx=0. Thus
Which simplifies to
Or
the voltage relationship becomes Vo=D Vin Since the circuit is lossless and the input
and output powers must match on the average Vo* Io = Vin* Iin. Thus the average input
and output current must satisfy Iin =D Io These relations are based on the assumption
that the inductor current does not reach zero.
5
1.2.1.1Transition between continuous and discontinuous
When the current in the inductor L remains always positive then either the transistor
T1 or the diode D1 must be conducting. For continuous conduction the voltage Vx is
either Vin or 0. If the inductor current ever goes to zero then the output voltage will
not be forced to either of these conditions. At this transition point the current just
reaches zero as seen in Figure 3. During the ON time Vin-Vout is across the inductor
thus
(1)
The average current which must match the output current satisfies
(2)
If the input voltage is constant the output current at the transition point satisfies
(3)
As for the continuous conduction analysis we use the fact that the integral of voltage
across the inductor is zero over a cycle of switching T. The transistor OFF time is
now divided into segments of diode conduction ddT and zero conduction doT. The
inductor average voltage thus gives
6
(Vin - Vo ) DT + (-Vo) dT = 0 (4)
(5)
for the case . To resolve the value of consider the output current which is
(6)
(7)
(8)
(9)
7
(10)
(11)
defining k* = 2L/ (Vin T), we can see the effect of discontinuous current on the
voltage ratio of the converter.
As seen in the figure, once the output current is high enough, the voltage ratio
depends only on the duty ratio "d". At low currents the discontinuous operation tends
to increase the output voltage of the converter towards Vin.
The schematic in Fig. 6 shows the basic boost converter. This circuit is used when a
higher output voltage than input is required.
8
Fig. 6: Boost Converter Circuit
While the transistor is ON Vx =Vin, and the OFF state the inductor current flows
through the diode giving Vx =Vo. For this analysis it is assumed that the inductor
current always remains flowing (continuous conduction). The voltage across the
inductor is shown in Fig. 7 and the average must be zero for the average current to
remain in steady state
9
Since the duty ratio "D" is between 0 and 1 the output voltage must always be higher
than the input voltage in magnitude. The negative sign indicates a reversal of sense of
the output voltage.
With continuous conduction for the Buck-Boost converter Vx =Vin when the transistor
is ON and Vx =Vo when the transistor is OFF. For zero net current change over a
period the average voltage across the inductor is zero
10
and the corresponding current
Since the duty ratio "D" is between 0 and 1 the output voltage can vary between
lower or higher than the input voltage in magnitude. The negative sign indicates a
reversal of sense of the output voltage.
CONVERTER COMPARISON
The buck, boost and buck-boost converters all transferred energy between input and
output using the inductor, analysis is based of voltage balance across the inductor.
The CUK converter uses capacitive energy transfer and analysis is based on current
balance of the capacitor. The circuit in Fig. 11 is derived from DUALITY principle
on the buck-boost converter.
11
Fig. 11: CUK Converter
If we assume that the current through the inductors is essentially ripple free we can
examine the charge balance for the capacitor C1. For the transistor ON the circuit
becomes
and the current in C1 is IL1. When the transistor is OFF, the diode conducts and the
current in C1 becomes IL2.
Since the steady state assumes no net capacitor voltage rise, the net current is zero
which implies
12
The inductor currents match the input and output currents, thus using the power
conservation rule
Thus the voltage ratio is the same as the buck-boost converter. The advantage of the
CUK converter is that the input and output inductors create a smooth current at both
sides of the converter while the buck, boost and buck-boost have at least one side
with pulsed current.
13
Fig. 14(a): Buck-Boost Converter
The concept behind the forward converter is that of the ideal transformer converting
the input AC voltage to an isolated secondary output voltage. For the circuit in Fig.
15, when the transistor is ON, Vin appears across the primary and then generates
14
The diode D1 on the secondary ensures that only positive voltages are applied to the
output circuit while D2 provides a circulating path for inductor current if the
transformer voltage is zero or negative.
The problem with the operation of the circuit in Fig 15 is that only positive
voltage is applied across the core, thus flux can only increase with the application of
the supply. The flux will increase until the core saturates when the magnetizing
current increases significantly and circuit failure occurs. The transformer can only
sustain operation when there is no significant DC component to the input voltage.
While the switch is ON there is positive voltage across the core and the flux
increases. When the switch turns OFF we need to supply negative voltage to reset the
core flux. The circuit in Fig. 16 shows a tertiary winding with a diode connection to
permit reverse current. Note that the "dot" convention for the tertiary winding is
opposite those of the other windings. When the switch turns OFF current was flowing
in a "dot" terminal. The core inductance act to continue current in a dotted terminal,
thus
15
Fig. 16: Forward converter with tertiary winding
DC-DC converters are used to fill the gaps left by the limitations of direct and
alternating currents. Direct current (DC) is a steady flow of electric energy in the
16
same direction, while alternating current (AC) is a flow of energy which frequently
changes in direction and intensity. Alternating current is used for the vast majority of
electric transmission, because it is far easier to harness and dispense, and because it
can be easily stepped up or down in intensity by use of transformers, devices which
produce higher or lower levels of voltage by transferring currents into windings of
varying lengths. Because transformers work by means of time delays, they are unable
to work with direct current, due to direct current's constant rate of flow.
Alternating current has thus become far more commonly used simply because it is
far more flexible, and it is the preferred form of current for all forms of transmission
save one: batteries, which are unable to alternate their electrical flow and thus work
on direct current alone. For this reason, the DC-DC converter has become an
important electrical component, acting as the direct current equivalent of a
transformer for battery-operated devices, enhancing or reducing intensity as needed.
17
1.3.2.1 NON-ISOLATED BIDIRECTIONAL DC/DC CONVERTER:
18
1.4 SEMICONDUCTOR SWITCHING:
Semi conductor switching types are 1. Hard Switching and 2. Soft Switching
1.4.1Hard Switching
Traditional high frequency switch-mode supplies, which rely on generating
an AC waveform in the range of 100 kHz to 200 kHz to drive the main power
transformer, have used power transistors to hard-switch the unregulated input
voltage at this rate. This means that a transistor turning on will have the whole raw
input voltage, typically in the range of 350 V, across it as it changes state. During the
actual switching interval (less than 0.5US) there is a finite period as the transistor
begins to conduct where the voltage begins to fall at the same time as current begins
to flow. This simultaneous presence of voltage across the transistor and current
through it means that, during this period, power is being dissipated within the device.
A similar event occurs as the transistor turns off, with the full current flowing through
it.
Designers that use a hard-switching topology are in a no-win situation
when they try to reduce wasted power, and still meet the European EMC directive. As
the switching period is reduced through the use of improved driving circuitry, the
faster rise and fall times generate more high frequency energy that is radiated and
conducted out of the unit as unacceptable radio frequency interference (RFI). If the
rise and fall times are intentionally slowed to reduce the radio frequency interference,
the power losses in the transistor increase proportionally, increasing the thermal stress
on the part, thus reducing its lifespan. In this way, older hard switching topologies are
a compromise between electrical efficiency reduction and EMC noise trade-offs.
More recently, new power conversion topologies have been developed which
dramatically reduce the power dissipated by the main power transistors during the
switching interval, while at the same time nearly eliminating much of the generated
radio frequency energy, or high frequency noise. The most common technique
employed has been a constant frequency resonant switching scheme, which ensures
19
that the actual energy being dissipated by the active device is reduced to nearly zero.
This method, commonly called Zero Voltage Switching (ZVS) or Soft Switching
uses the parasitic output capacitance of the power transistors (typically MOSFETs)
and the parasitic leakage inductance of the power transformer as a resonant circuit.
Using this resonant circuit, the output inductance, the parasitic drain-source body
diodes of the MOSFETs, and an appropriate switching sequence allows the voltage
across each transistor to swing to zero before the device turns on and current flows.
Likewise, at turn-off, the voltage differential across the transistor swings to zero
before it is driven to a non-conductive state. With this scheme, current is only fl
owing through the transistors when they are fully on, and doing useful work
transferring energy to the output of the supply. The power dissipation within the
transistor that would normally occur during the switching interval has effectively
been eliminated. Unwanted high-frequency voltage and current transients during the
switching period the culprits that supply much of the RF noise radiated and conducted
out of the power supply are also dramatically reduced due to the smooth resonant
transition. With the noise effectively reduced at its source, enhancing filtering at the
input and output of the unit ensures that the unit is well within the noise limits set by
international standards.
With soft switching techniques, reduction in wasted power will often improve
the efficiency of a unit by more than 2%. While this does not sound significant, it can
account for a saving of more than 20 W in a 1000 W power supply. This 20 W is
power that would have been dissipated by the main power transistors, the most
critical and most heavily stressed semi-conductors in any switch mode power supply.
Reducing the power here lowers their junction temperature, giving increased thermal
operating margins and, hence, a longer life for the power supply. Not only does a
soft switching power supply generate significantly less electrical noise, it achieves
greater efficiency, longer mean time between failures (MTBF), and higher immunity
to the effects of other equipment operating nearby.
It is desirable for power converters to have high efficiencies and high power
densities. Packaging and cost limitations require that the converter have a small
physical size and weight. Power density and electrical performance are dependent on
the switching frequency as it determines the values of the reactive components in the
converter. Thus, high frequency operation of the converter is highly desired.
20
However, operation at high frequency results in higher switching losses and higher
switching stresses caused by the circuit parasitics (stray inductance, junction
capacitance).
The main factors that contribute to the high-frequency switching losses are:
1) Semiconductor devices have non-zero turn-on and turn-off times and thus
there is a finite time during the transitions wherein the devices are conducting
a significant current while a large voltage is applied across it. This results in
large energy dissipation. This energy loss increases with increasing frequency.
2) At high frequencies, high dv/dt and di/dt induce voltage and current
oscillations in parasitic capacitors and inductors during switching transitions.
These oscillations result in higher peak current and voltage in the devices and
thus the switching loss increases. Furthermore, these oscillations create EMI
noise, which can interfere with other parts of the circuit or surrounding
electronic equipment.
3) When a device is turned on while having a voltage across it, the energy stored
in the parasitic capacitance across the switch is dissipated in it. This loss
increases with the frequency and is proportional to the square of the voltage
across the device before turn-on. Soft-switching techniques force the switch
voltage or current to zero before the device switching, thus avoiding current
and voltage overlap during the switching transition.
The advantages of soft switching are as follows:
Lower switching losses due to smaller overlap of switch voltage and
current.
Lower dv/dt and di/dt and thus lower voltage spike and EMI
emissions.
Higher reliability due to reduced stresses on the switching
components.
Reduced voltage and current ratings for the devices.
Smaller reactive elements.
Soft switching for the power devices can be achieved by either zero-voltage
switching (ZVS) or zero-current switching (ZCS). ZVS consists of turning on the
21
switches while the voltage across them is zero. ZCS consists of turning off the
switches when the current through them is zero.
Soft switching has been proven to be an effective means of reducing switching losses
and for attaining higher overall efficiencies. Various soft-switching techniques have
been developed in the recent years.
SOFT SWITCHING
Fig19 (a)
HARD SWITCHING
Fig19 (b)
22
I S a fe O p e ra tin g A r e a
On H a r d - s w it c h in g
s n u b b e re d
S o f t - s w i t c h in g
O ff V
23
one PWM period to another PWM period according to the same modulating signal.
The frequency of a PWM signal must be much higher than that of the modulating
signal, the fundamental frequency, such that the energy delivered to the motor and its
load depends mostly on the modulating signal.
24
So as to feed the stator windings with a 3-phase sinusoidal voltage
through an inverter, a first solution is to use a sine table to generate three sine waves
with 120 degrees phase shift to each other. For this, the stator pulsation s is used to
feed three discrete-time integrators, which compute the instantaneous phase of each
stator voltage,
With 1[0]=0, 2[0]= -2 /3, 3[0]= - 4/3, Ts, being the sampling period of the
control algorithm. When one of these angles becomes higher than 2, 2 is subtracted
to it to keep it between 0 and 2.
A sine table is the used to compute the three voltages that should be
applied to the stator, Va[k] = Vsm( s[k]) sita ( 1[k])
25
control applications. Taking the first phase as an example, the duty cycle stored in the
compare register of the corresponding PSCs will be proportional to
CHAPTER-2
HARDWARE
26
2.1 PRINTED CIRCUIT BOARD DESIGN
MANUFACTURING
The manufacturing process consists of two methods; print and etch, and print,
plate and etch. The single sided PCBs are usually made using the print and etch
method. The double sided plate through hole (PTH) boards are made by the print
27
plate and etch method. The production of multi layer boards uses the methods. The
inner layers are printed and etch while the outer layers are produced by print, plate
and etch after pressing the inner layers.
SOFTWARE:
The software used in our project for obtaining schematic layout is ORCAD.
PATTERNING (ETCHING)
The vast majority of printed circuit boards are made by bonding a layer of
copper over the entire substrate, sometimes on both sides, (creating a "blank PCB")
then removing unwanted copper after applying a temporary mask (eg. by etching),
leaving only the desired copper traces. A few PCBs are made by adding traces to the
bare substrate (or a substrate with a very thin layer of copper) usually by a complex
process of multiple electroplating steps.
DRILLING
Holes, or vias, through a PCB are typically drilled with tiny drill bits made of
solid tungsten carbide. The drilling is performed by automated drilling machines with
placement controlled by a drill tape or drill file. These computer-generated files are
also called numerically controlled drill (NCD) files or "Excellon files". The drill file
describes the location and size of each drilled hole.
The places to which components will be mounted are typically plated, because
bare copper oxidizes quickly, and therefore is not readily solderable. Traditionally,
any exposed copper was plated with solder by hot air solder leveling (HASL). This
solder was a tin-lead alloy, however new solder compounds are now used to achieve
compliance with the RoHS directive in the EU, which restricts the use of lead. Other
plantings used are OSP (organic surface protectant), immersion silver (IAg),
immersion tin, electroless nickel with immersion gold coating (ENIG), and direct
gold. Edge connectors, placed along one edge of some boards, are often gold plated.
28
SOLDER RESIST
SCREEN PRINTING
Screen print is also known as the silk screen, or, in one sided PCBs, the red
print. Lately some digital printing solutions have been developed to substitute the
traditional screen printing process. This technology allows printing variable data onto
the PCB, including serialization and barcode information for traceability purposes.
POPULATING
After the printed circuit board (PCB) is completed, electronic components must
be attached to form a functional printed circuit assembly, or PCA(sometimes called a
"printed circuit board assembly" PCBA). In through-hole construction, component
leads are inserted in holes. In surface-mount construction, the components are placed
on pads or lands on the outer surfaces of the PCB. In both kinds of construction,
component leads are electrically and mechanically fixed to the board with a molten
metal solder.
29
also remains the same dc value even the dc voltage varies some what, or the load
connected to the output dc voltages changes.
30
Fig 26: Schematic Of A Diode Bridge Rectifier
The essential feature of this arrangement is that for both polarities of the voltage at
the bridge input, the polarity of the output is constant.
When the input connected at the left corner of the diamond is positive with
respect to the one connected at the right hand corner, current flows to the right along
the upper colored path to the output, and returns to the input supply via the lower one.
When the right hand corner is positive relative to the left hand corner, current flows
along the upper colored path and returns to the supply via the lower colored path.
31
Fig 28: AC, half-wave and full wave rectified signals
In each case, the upper right output remains positive with respect to the lower
right one. Since this is true whether the input is AC or DC, this circuit not only
produces DC power when supplied with AC power: it also can provide what is
sometimes called "reverse polarity protection". That is, it permits normal functioning
when batteries are installed backwards or DC input-power supply wiring "has its
wires crossed" (and protects the circuitry it powers against damage that might occur
without this circuit in place).
32
step down transformer to providing a necessary supply for the electronic circuits. Here
we step down a 230v ac into 12v ac.
2.2.3 RECTIFIER: A dc level obtained from a sinusoidal input can be improved 100%
using a process called full wave rectification. Here in our project for full wave
rectification we use bridge rectifier. From the basic bridge configuration we see that two
diodes(say D2 & D3) are conducting while the other two diodes (D1 & D4) are in off
state during the period t = 0 to T/2.Accordingly for the negative cycle of the input the
conducting diodes are D1 & D4 .Thus the polarity across the load is the same.
In the bridge rectifier the diodes may be of variable types like 1N4001, 1N4003,
1N4004, 1N4005, IN4007 etc can be used . But here we use 1N4007, because it can
withstand up to 1000v.
2.2.4 FILTERS: In order to obtain a dc voltage of 0 Hz, we have to use a low pass filter.
so that a capacitive filter circuit is used where a capacitor is connected at the rectifier
output& a dc is obtained across it. The filtered waveform is essentially a dc voltage with
negligible ripples & it is ultimately fed to the load.
2.2.5 REGULATORS: The output voltage from the capacitor is more filtered & finally
regulated. The voltage regulator is a device, which maintains the output voltage constant
irrespective of the change in supply variations, load variations & temperature changes.
Here we use fixed voltage regulator namely LM7805.The IC LM7805 is a +5v regulator
which is used for microcontroller.
D 1
2
J1 U 2
L M 7 8 0 5 C /T O R1 D 2
2 4 - + 1 1 3
1 IN OU T J1
220 ohm LE D
CON1 1
2
GND
C 1
C 3 C 4
3
470 100 0 .0 1 C ON 1
2
33
2.2.7 FEATURES & DESCRIPTION OF REGULATORS
Output Current up to 1A
U 1
D 1 N 1 1 9 0
R 1 R 3
R 4 Q 2
1K
1 k
O P - 0 7 C / 3 0 1 / T I Q 3
Q 1 100 230/12V
MCT2E R 2
R 5
500mA
100 B D X 3 7
G C 1
1 n
100
R 8
1 k
R 6
1 k
S
0
Fig 30
The buffer IC used here IC 4050 is used for pulse generation to generate triggering
pulse. There are pull up resistors to provide a resistance in series with the
34
microcontroller which acts as a current source here. This IC acts as an impedance
improvement buffer IC. Voltage follower concept is used and the signal is getting
inverted. Now it is given to the isolator.
2.4 OPTOCOUPLER
35
With a photodiode as the detector, the output current is proportional to the
amount of incident light supplied by the emitter. The diode can be used in a
photovoltaic mode or a photoconductive mode.
In photovoltaic mode, the diode acts like a current source in parallel with a
forward-biased diode. The output current and voltage are dependent on the load
impedance and light intensity. In photoconductive mode, the diode is connected to a
supply voltage, and the magnitude of the current conducted is directly proportional to
the intensity of light.
The optical path may be air or a dielectric waveguide. The transmitting and
receiving elements of an optical isolator may be contained within a single compact
module, for mounting, for example, on a circuit board; in this case, the module is
often called an optoisolator or opto-isolator. The photo sensor may be a photocell,
phototransistor, or an optically triggered SCR or Triac. Occasionally, this device will
in turn operate a power relay or contactor.
Here the LED glows and current flows through the base of the transistor, so
the signal will be got across a resistance and given to another transistor CK 100
which is a PNP transistor to provide inversion again. In order to improve the voltage
and the current gain we go for the Darlington amplifier, which amplifies the voltage.
36
2.5 DARLINGTON AMPLIFIER
37
Semiconductor is defined as the material whose conductivity depends
on the energy (light, heat, etc.,) falling on it. They dont conduct at absolute zero
temperature. But, as the temperature increases, the current conducted by the semi
conductor increases as it gets energy in the form of heat. The increase in current is
proportional to the temperature rise. Semiconductor switches are diodes, SCR,
MOSFET, IGBT, BJT, TRIAC etc.,
2.6.2 MOSFET
The component that is used as the switch in the inverter unit is the
MOSFET which is a voltage controlled device. They are the power semi conductor
devices that have a fast switching property with a simple drive requirement.
Vdss= 500 V
Rds (on) = 0.27 ohm
Id= 20 A
38
This MOSFET provide the designer with the best combination of fast switching,
ruggedixed device design, low on-resistance and cost-effectiveness. This package is
preferred for commercial and industrial applications where higher power levels are to
be handled.
2.6.3. MOSFET OPERATING PRINCIPLE
CONSTRUCTION
N Channel depletion type N Channel enhancement type
N CHANNEL DEPLETION
The N channel depletion type of MOSFET is constructed with p -Substrate. it
has two n doped regions , which forms the drain and source. It has sio2 insulating
layer between the channel and the metal layer. Thus it has three terminals namely
drain source and gate.
When negative voltage applied between the gate and source (VGS) , The
positive charge induced in the channel and the channel is depleted of electrons. Thus
there is no flow of current through this terminal.
When appositive voltage is applied between the gate and source, more electros
are induced in the channel by capacitor action. So there is a flow of current from
drain to source. As the gate source voltage increases, the channel gets wider by
accumulation of more negative charges and resistance to the channel decreases. Thus
more current from drain to source. As there is a current flow through device for zero
Gate Source Voltage, it is called as normally ON MOSFET.
39
N CHANNEL ENHANCEMENT
The N channel enhancement MOSFET is similar to the depletion type in the
construction except that there is no physical existence of the channel when it is
unbiased.
When the positive voltage is applied between the gate and the source, the
electron get accumulated in the channel by capacitive induction in the channel formed
out of electrons allowing the flow of current. This channel gets widened as more
positive voltage is applied between gate and source. There will not be any condition
through the device if the gate source voltage is negative.
Setting VGS to a constant value, varying VDS and nothing the corresponding
changes into give the drain characteristic. VGS 0, the device does not conduct drain
current and the device is considered to be in the off state. In this state, the entire
voltage drop across the device i.e., between drain and source.
In the ON state of the device, gate source voltage is positive and the drain
current is increased with the increase in the gate source voltage. It is understood
clearly in the transfer characteristics. As the enhancement type mosfet conduct only
after applying positive gate voltage, it is also called as normally OFF MOSFET. For
this reason it becomes easily controllable and is used in power electronics as a switch.
MICROCONTROLLER
40
2.7.1 MICROCONTROLLER
The main controlling unit of the proposed system is the microcontroller. The
main features of microcontroller and particularly PIC Microcontroller is discussed
here.
A microcontroller consists of a powerful CPU tightly coupled with memory
[RAM,ROM or EPROM],various I/O features such as serial ports, parallel ports
,timer/counters, interrupt controller ,data requisition interface , Analog to digital
converter[ADC],digital to analog converter, everything integrated into a single
silicon chip.
It does not mean that any microcontroller should have all the above said
features on a single chip, depending on the need and area of application for which it is
designed, the on chip features present in it may or may not include all the individual
section said above.
Any microcomputer systems requires memory to store a sequence of
instructions making up a program ,parallel port or serial port for communicating with
an external system timer/counter for control purpose like generating time delay.
The PIC micro was originally designed around 1980 by General Instrument
as a small, fast, inexpensive embedded microcontroller with strong I/O capabilities.
PIC stands for "Peripheral Interface Controller". General Instrument recognized the
potential for the little PIC and eventually spun off Microchip, headquartered in
Chandler, AZ to fabricate and market the PICmicro.
The PICmicro has some advantages in many applications over the older chips
such as the Intel 8048/8051/8052 and its derivatives, the Motorola MC6805/6hHC11,
and many others. Its unusual architecture is ideally suited for embedded control.
Nearly all instructions execute in the same number of clock cycles, which makes
timing control much easier. The PICmicro is a RISC (Reduced Instruction Set
Computer) design, with only thirty-odd instructions to remember; its code is
extremely efficient, allowing the PIC to run with typically less program memory than
its larger competitors.
41
Very important, though, is the low cost, high available clock speeds, small
size, and incredible ease of use of the tiny PIC. For timing-insensitive designs, the
oscillator can consist of a cheap RC network. Clock speeds can range from low speed
to 20MHz. Versions of the various PICmicro families are available that are equipped
with various combinations ROM, EPROM, OTP (One-Time Programmable)
EPROM, EEPROM, and FLASH program and data memory. An 18-pin PICmicro
typically devotes 13 of those pins to I/O, giving the designer two full 8-bit I/O ports
and an interrupt. In many cases, designing with a PICmicro is much simpler and
more efficient than using an older, larger embedded microprocessor.
42
Processor read/write access to program memory
Wide operating voltage range: 2.0V to 5.5V
High Sink/Source Current: 25 mA
Commercial, Industrial and Extended temperature ranges
Low-power consumption:
These controllers also have an higher erase cycle of 10,000 and for the
EEPROM its 1 lakh number of time. This controllers other advantage is its a
RISC computing system.
43
2.7.2 PIN DIAGRAM OF 16F877A PIC CONTROLLER
Some pins for these I/O ports are multiplexed with an alternate function for the
peripheral features on the device. In general, when a peripheral is enabled, that pin
may not be used as a general purpose I/O pin. Additional information on I/O ports
may be found in the PICmicro Mid-Range Reference Manual, (DS33023).
44
a TRISA bit (= 0) will make the corresponding PORTA pin an output (i.e., put the
contents of the output latch on the selected pin). Reading the PORTA register reads
the status of the pins, whereas writing to it will write to the port latch. All write
operations are read-modify-write operations. Therefore, a write to a port implies that
the port pins are read, the value is modified and then written to the port data latch. Pin
RA4 is multiplexed with the Timer0 module clock input to become the RA4/T0CKI
pin. The RA4/T0CKI pin is a Schmitt Trigger input and an open drain output. All
other PORTA pins have TTL input levels and full CMOS output drivers. Other
PORTA pins are multiplexed with analog inputs and analog VREF input. The
operation of each pin is selected by clearing/setting the control bits in the ADCON1
register (A/D Control Register1).
45
PORTC is an 8-bit wide, bi-directional port. The corresponding data direction
register is TRISC. Setting a TRISC bit (= 1) will make the corresponding PORTC pin
an input (i.e., put the corresponding output driver in a Hi-Impedance mode). Clearing
a TRISC bit (= 0) will make the corresponding PORTC pin an output (i.e., put the
contents of the output latch on the selected pin). PORTC is multiplexed with several
peripheral functions (Table 3-5). PORTC pins have Schmitt Trigger input buffers.
When the I2C module is enabled, the PORTC<4:3> pins can be configured with
normal I2C levels or with SMBus levels by using the CKE bit (SSPSTAT<6>). When
enabling peripheral functions, care should be taken in defining TRIS bits for each
PORTC pin. Some peripherals override the TRIS bit to make a pin an output, while
other peripherals override the TRIS bit to make a pin an input. Since the TRIS bit
override is in effect while the peripheral is enabled, read-modify write instructions
(BSF, BCF, XORWF) with TRISC as destination, should be avoided. The user should
refer to the corresponding peripheral section for the correct TRIS bit settings.
46
the RE pins, even when they are being used as analog inputs. The user must make
sure to keep the pins configured as inputs when using them as analog inputs.
The Data EEPROM and FLASH Program Memory are readable and writable during
normal operation over the entire VDD range. These operations take place on a single
byte for Data EEPROM memory and a single word for Program memory. A write
operation causes an erase-then-write operation to take place on the specified byte or
word. A bulk erase operation may not be issued from user code (which includes
removing code protection). Access to program memory allows for checksum
calculation. The values written to program memory do not need to be valid
instructions. Therefore, up to 14-bit numbers can be stored in memory for use as
calibration parameters, serial numbers, packed 7-bit ASCII, etc. Executing a program
memory location containing data that form an invalid instruction, results in the
execution of a NOP instruction. The EEPROM Data memory is rated for high erase/
writes cycles (specification D120). The FLASH program memory is rated much
lower (specification D130), because EEPROM data memory can be used to store
frequently updated values. An on-chip timer controls the write time and it will vary
with voltage and temperature, as well as from chip to chip. Please refer to the
specifications for exact limits (specifications D122 and D133). A byte or word write
automatically erases the location and writes the new value (erase before write).
Writing to EEPROM data memory does not impact the operation of the device.
Writing to program memory will cease the execution of instructions until the write is
complete. The program memory cannot be accessed during the write. During the
write operation, the oscillator continues to run, the peripherals continue to function
and interrupt events will be detected and essentially queued until the write is
complete. When the write completes, the next instruction in the pipeline is executed
and the branch to the interrupt vector will take place, if the interrupt is enabled and
occurred during the write. Read and write access to both memories take place
indirectly through a set of Special Function Registers (SFR). The six SFRs used are:
EEDATA
EEDATH
47
EEADR
EEADRH
EECON1
EECON2
TIMER0 MODULE
TIMER1 MODULE
As a timer
As a counter
48
The operating mode is determined by the clock select bit, TMR1CS (T1CON<1>). In
Timer mode, Timer1 increments every instruction cycle. In Counter mode, it
increments on every rising edge of the external clock input. Timer1 can be
enabled/disabled by setting/clearing control bit, TMR1ON (T1CON<0>). Timer1 also
has an internal Reset input. This Reset can be generated by either of the two CCP
modules. Register 6-1 shows the Timer1 Control register. When the Timer1 oscillator
is enabled (T1OSCEN is set), the RC1/T1OSI/CCP2 and RC0/T1OSO/T1CKI pins
become inputs. That is, the TRISC<1:0> value is ignored and these pins read as 0.
TIMER2 MODULE
Timer2 is an 8-bit timer with a prescaler and a postscaler. It can be used as the
PWM time-base for the PWM mode of the CCP module(s). The TMR2 register is
readable and writable, and is cleared on any device RESET. The input clock
(FOSC/4) has a prescale option of 1:1,1:4, or 1:16, selected by control bits
T2CKPS1:T2CKPS0 (T2CON<1:0>). The Timer2 module has an 8-bit period
register, PR2. Timer2 increments from 00h until it matches PR2 and then resets to
00h on the next increment cycle. PR2 is a readable and writable register. The PR2
register is initialized to FFh upon RESET. The match output of TMR2 goes through a
4-bit postscaler (which gives a 1:1 to 1:16 scaling inclusive) to generate a TMR2
interrupt (latched in flag bit TMR2IF, (PIR1<1>)). Timer2 can be shut-off by clearing
control bit TMR2ON (T2CON<2>), to minimize power consumption.
Every PIC needs a clock. The PIC uses four clock cycles to complete one
instruction cycle. Since the PIC is fully static, the clock rate can vary from DC
(nothing) to the maximum rated speed, which is currently around 20MHz for some
parts. What do we mean by "fully static"? Some microprocessors use some dynamic
circuitry internally, which operate similar to dynamic RAM. These processors have a
certain specified minimum clock frequency which must be maintained, just like a
minimum power supply voltage. The PIC has no such limitation; the processor clock
can be completely stopped. In fact, the SLEEP instruction does just that - shuts down
49
the clock oscillator! This leads to enormous power savings. A PIC in sleep mode
will draw just a few microamperes.
We are using crystal oscillator in our project. The first three methods use either
a parallel-cut crystal or a ceramic resonator. LP mode is generally used for low-
power applications using watch-type crystals or ceramic resonators in the 32 kHz to
200 kHz range. XT mode is used from typically 455 kHz to 4MHz, and HS mode is
usually used above 4MHz. The modes are very similar except for the amount of drive
supplied to the crystal. In these three modes, an external clock source can also be
used instead of a crystal or resonator. If you have an existing clock signal of the
desired frequency in your circuit, you can connect this signal to the OSC1 pin and
leave the OSC2 pin open.
The last mode is RC mode. If your application is not at all timing sensitive, RC
mode is simple and inexpensive. To use this mode, you simply connect and external
resistor ranging from 5K to 100K Ohms from Vdd to OCS1, and an external capacitor
from OSC1 to Vss. The external capacitor can be eliminated, but Microchip warns
that the frequency can vary widely and change often. They recommend at least 20pF
of external capacitance for anything resembling stable operation. Of course, RC
mode will be affected much more than any of the crystal or resonator modes by
temperature, part to part variations, etc.
50
2.7 LEAD ACID BATTERY
Battery specifications
51
Lead-acid batteries are the oldest type of rechargeable battery. Despite having
the second lowest energy-to-weight ratio (next to the nickel-iron battery) and a
correspondingly low energy-to-volume ratio, their ability to supply high surge
currents means that the cells maintain a relatively large power-to-weight ratio. These
features, along with their low cost, makes them attractive for use in cars, as they can
provide the high current required by automobile starter motors. They are also used in
vehicles such as forklifts, in which the low energy-to-weight ratio may in fact be
considered a benefit since the battery can be used as a counterweight. Large arrays of
lead-acid cells are used as standby power sources for telecommunications facilities,
generating stations, and computer data centers. They are also used to power the
electric motors in diesel-electric (conventional) submarines.
Electrochemistry
Each cell contains (in the charged state) electrodes of lead metal (Pb) and lead (IV)
oxide (PbO2) in an electrolyte of about 37% w/w (5.99 Molar) sulfuric acid (H2SO4).
In the discharged state both electrodes turn into lead (II) sulfate (PbSO 4) and the
electrolyte loses its dissolved sulfuric acid and becomes primarily water. Due to the
freezing-point depression of water, as the battery discharges and the concentration of
sulfuric acid decreases, the electrolyte is more likely to freeze.
Anode (oxidation):
Cathode (reduction):
Because of the open cells with liquid electrolyte in most lead-acid batteries,
overcharging with excessive charging voltages will generate oxygen and hydrogen
gas by electrolysis of water, forming an explosive mix. This should be avoided.
Caution must also be observed because of the extremely corrosive nature of sulfuric
acid.
52
Practical cells are usually not made with pure lead but have small amounts of
antimony, tin, or calcium alloyed in the plate material. These are general voltage
ranges for six-cell lead-acid batteries:
CONSTRUCTION OF BATTERY
Plates
The principle of the lead acid cell can be demonstrated with simple sheet lead
plates for the two electrodes. However such a construction would only produce
around an amp for roughly postcard sized plates, and it would not produce such a
current for more than a few minutes.
53
Gaston Plant realized that a plate construction was required that gave a much
larger effective surface area. Plant's method of producing the plates has been largely
unchanged and is still used in stationary applications.
One of the problems with the plates in a lead-acid battery is that the plates
change size as the battery charges and discharges, the plates increasing in size as the
active material absorbs sulfate from the acid during discharge, and decreasing as they
give up the sulfate during charging. This causes the plates to gradually shed the paste
during their life. It is important that there is plenty of room underneath the plates to
catch this shed material. If this material reaches the plates a shorted cell will occur.
Separators
Separators are used between the positive and negative plates of a lead acid
battery to prevent short circuit through physical contact, mostly through dendrites
(treeing), but also through shedding of the active material. Separators obstruct the
flow of ions between the plates and increase the internal resistance of the cell.
Various materials have been used to make separators:
54
wood
rubber
glass fiber mat
cellulose
sintered PVC
Microporous PVC/polyethylene.
BY APPLICATION
55
CHAPTER-3
SOFTWARE CODING
56
CODING FOR PIC CONTROLLER:
The following is the code used for PIC controller for giving delay time to switches,
#include<pic.h>
#include<stdio.h>
#include "delay.c"
__CONFIG(0x3f71);
while(1)
{
if(RB0==0)
n=1;
if(RB1==0)
n=2;
if(n==1)
{
PORTC=0x09;
DelayMs(10);
PORTC=0x06;
DelayMs(10);
}
else if(n==2)
{
PORTC=0x90;
DelayMs(10);
PORTC=0x60;
DelayMs(10);
57
}
}
}
CHAPTER-4
CIRCUIT DIAGRAM
58
FULL BRIDGE BIDIRECTIONAL DC-DCCONVERER:
59
Fig38: driver circuit
PIC CONTROLLER:
60
Fig40: Boost operation of bidirectional dc-dc converter
61
CHAPTER-4
CIRCUIT OPERATION
62
The circuit topology of the proposed bidirectional isolated converter is shown
in Fig. . According to the power ow directions, there are two operation modes for
the proposed converter. When power ows from the low-voltage side (LVS) to the
high-voltage side (HVS), the circuit operates in boost mode to draw energy from the
battery. In the other power ow direction, the circuit operates in buck mode to
recharge the battery from the high-voltage dc bus. Based on the symbols and signal
polarities introduced in Fig. 2, the theoretical waveforms of the two operation modes
are shown in Fig. (a) and (b), respectively.
63
Fig42: Theoretical waveform under (a) boost and (b) buck operation
A. Boost Mode (Discharging Mode) Operation
When the dc bus voltage in the HVS is not at the desired high level, such as
during a cold start, the power drawn from the low-voltage battery flows into the high-
voltage dc bus. During this mode, the proposed converter is operated as a current-fed
circuit to boost the HVS bus voltage. The LVS switches Q1, Q4 and Q2, Q3 operate
at asymmetrical duty ratios and 1- which require a short overlapping conduction
interval. Referring to the equivalent circuits for the boost mode operation in Fig. 43,
the detailed operating principle can be explained as follows.
64
Fig43: modes of operation in boost mode
Stage 1 (t0t1): At t0, the LVS switch Q2, Q3 is turned off and the HVS switch Q5,
Q8 is turned on. The current from the inductor L1 flows through Q1, Q4 and the
transformer LVS winding, closing the loop via the battery. Therefore, the transformer
LVS winding carries only IL1. The voltage amplitude across the transformer HVS
winding, V2 can be clamped to the dc voltage. Thus, the voltage across the
transformer LVS winding, V1 is clamped to (-VA/n). The n is the transformer turn
ratio.
65
Stage 2 (t1t2): At t1, the LVS switch Q2, Q3 is turned on and the HVS switch Q5,
Q8 is turned off. During this interval, the switches Q1, Q4 and Q2, Q3 are on
simultaneously. The voltage across the transformer winding become zero
Stage 3 (t2t3): The voltage Vds6 & Vds8 across the HVS switch, Q6, Q7 continues
to decrease to zero at t3.
Stage 4 (t3t4): At t3, as long as the switch Q6, Q7 is turned on at t4, zero-voltage
switching can be assured.
Stage 5 (t4t5): At t4, the LVS switch Q1, Q4 is turned off and the HVS switch Q6,
Q7 is turned on. The current from the inductor L1 flows through Q2, Q3 and the
transformer LVS winding, closing the loop via the battery. Therefore, the transformer
LVS winding carries only IL1. The voltage amplitude across the transformer HVS
winding, V2 can be clamped to (VBus-VA). Thus, the voltage across the transformer
LVS winding, V1 is clamped to (VBus-VA) /n.
Stage 6 (t5t6): At t5, the LVS switch Q1, Q4 is turned on and the HVS switch Q6,
Q7 is turned off. During this interval, the switches Q1, Q4 and Q2, Q3 are
simultaneously on. The voltage across L1 also becomes negative and its amplitude
equals the battery voltage. The inductance current, IL1 decreases linearly. The
voltage across the transformer winding become zero.
Stage 7 (t6t7): The voltage Vds5 & Vds8 across the HVS switch, Q5,Q8 continues
to decrease to zero at t7.
Stage 8 (t7t8): At t7, as long as the switch Q5, Q8 is turned on at t8, zero-voltage
switching can be assured. The circuit will then proceed back to stage 1 after
completing one operating cycle T8.
Although the LVS switches subject to higher voltage stress, this is an advantage
because the battery voltage is low. Because the overlapping interval for the LVS
switches Q1, Q4 and Q2, Q3 is very short, the LVS transformer current flows through
66
only one LVS switch at most time. Thus, the conduction losses for Q1, Q4 and Q2,
Q4 can be greatly reduced to improve the conversion efficiency. Moreover, the LVS
circuit produces a relatively ripple free battery current that is desirable for the low
voltage battery. The voltage transfer ratio Mboost for the boost mode operation for the
proposed dcdc converter can be derived from the volt-second balance condition
across the inductor L1 represented by (7). The current stresses of the inductor
windings can be also determined as (6).The inductances of the power inductor L1 can
be determined for their given peak-to-peak current ripples, I1
67
Fig44: modes of operation in buck mode
Stage 1(t0t1): At t0, the HVS switch Q6, Q7 and the LVS switch Q2, Q3 stay on.
The inductance current is equal to IL1/n. The current from the inductor L1 flows
through Q2, Q3 and the transformer LVS winding, closing the loop via the battery.
Therefore, the transformer LVS winding carries only IL1. The current IL1
increases. Since the recharging current, -IBat.
Stage 2 (t1t2): At t1, the LVS switch Q1, Q4 is turned on and the HVS switch Q6,
Q7 is turned off. During this interval, the switches Q1, Q4 and Q2, Q3 are
simultaneously on. The recharging current, -IBat , freewheels through both the
switches, Q1, Q4 and Q2, Q3. The voltage across L1 also becomes negative and
68
equals the battery voltage. Therefore, the inductance current IL1 decreases. The
voltage across the transformer winding becomes zero. The voltage Vds5 & Vds8
across the switch, Q5, Q8 continues to decrease to zero at t2.
Stage 3 (t2t3): At t2, as long as the HVS switch Q5, Q8 is turned on before the
inductor current changes its direction at t3, zero voltage switching can be assured.
Stage 4 (t3t4): While the HVS switch, Q5, Q8 is zero-voltage turned on, the LVS
switch, Q2, Q3 is turned off.
The stages 58 are similar to stages 14, respectively.
The circuit will then proceed back to stage 1 after completing one operating cycle
TS.
While the LVS switches, Q1, Q4 and Q2, Q3, share unequal voltage and current
stresses, the HVS switches, Q5, Q8 and Q6, Q7, share equal voltage stresses as (8).
Then the current stresses of the HVS switches can be found as
A. Power Switches
The power switch voltage and current ratings are very important converter
design topics. When the duty ratio is chosen in the operating range of from 0.2 to
0.5, the LVS device rating can be calculated by using (1)(4) as follows:
69
Based on (5), the turn-ratio selection of transformer can be calculated as (15). The
HVS device ratings can then be calculated using (8)(10) as follows:
B. Power Inductors
Let the peak-to-peak current ripples be 20% of the inductor currents under full
power. The current rating and the inductance of the power inductor L1 can be
determined using (6) (7) as follows:
Because of the ripple cancellation on the battery current, a larger ripple current in
inductor L1 and can be allowed in practical applications. Thus, the inductance and the
size of the inductors L1 might be smaller.
70
CHAPTER-5
SIMULATION &
RESULTS
71
To verify the theoretical operating principles, a 2-kW design example was
simulated by using MATLAB. There is a good agreement between the simulation
results and theoretical analysis. In this research, a 2-kW laboratory prototype was
implemented and tested to evaluate the performance of the proposed bidirectional
isolated dcdc converter. Fig47, 48, 49 shows the waveforms in the boost mode
operations for the laboratory prototype & Fig 49, 50, 51 shows the waveforms for
buck mode operation. The gating signals for the LVS switches Q1, Q4, & Q2, Q3 and
HVS switches Q5,Q8 & Q6, Q7 are shown in Fig. . The ripple cancellation between
two inductor currents can be observed. This is desirable for a low-voltage battery. In
Fig 48 and 50, the zero-voltage turn-on details of the LVS switch Q3 and HVS switch
Q5 shown. For the full-bridge topology, the peak voltage across the LVS switches is
around 45 V, allowing 75-V MOSFET to be used.
72
Fig45
5.1.1SUBCIRCUIT:
Fig46
73
5.2.1SUBCIRCUIT:
Fig 47
74
Output waveform:
Fig48
ZVS Waveform:
75
Fig49
Fig50
76
Fig 51
Fig 52
77
Fig53
Fig54
78
Fig55
Fig 56
79
CHAPTER-6
CONCLUSION
80
A soft-switched isolated bidirectional dcdc converter has been
the 200W, 20 kHz prototype was shown as per principle. It is shown that
and inversion) provided by the low voltage side half bridge, current
results, advantages of the new circuit including ZVS with full load range,
rated power), and low cost as well as less control and accessory power
needs, make the proposed converter very promising for medium power
81
FUTURE SCOPE
82
BIBILOGRAPHY
The bibliography used fro the project A BIDIRECTIONAL DC-DC
CONVERTER USED FOR ELECTRICAL VEHICLE DRIVING SYSTEM is as
follows.
ARTICLES:
1. A Bidirectional DCDC Converter for Fuel Cell Electric Vehicle
Driving System
By Huang-Jen Chiu, Member, IEEE, and Li-Wei Lin,
IEEE Transactions on Power Electronics, Vol. 21, No. 4, July 2006
BOOKS:
WEBSITE:
1. GOOGLE
2. Wikipedia
3. Other Websites
83
APPENDIX:
Description:
Fifth Generation HEXFETs from International Rectifier utilize advanced
processing techniques to achieve extremely low on-resistance per silicon
area. This benefit, Combined with the fast switching speed and ruggedized
device design thatHEXFET Power MOSFETs.The TO-247 package is
preferred for commercial-industrial applications where Higher power levels
preclude the use of TO-220 devices.
84
85
PIC CONTROLLER 16F877A:
PIC BLOCK DIAGRAM
86
Fig 57
87
88
89
90