IP for

AVC, AVS p2 and

p7
rd/wr/sk rd/wr/sk RAM
…
ctrl ctrl

MB level
buf buf
… Top Buf SRAM Buffer Left Buf
ctrl ctrl

alu
IP ALU
ctrl Block level

Merger IP/DCT
Block level
iDCT/MC
DB
rd/wr/sk rd/wr/sk RAM
…
ctrl ctrl

MB level
buf buf
… Top Buf Left Buf
ctrl ctrl

alu
ALU
ctrl Block level

Merger IP/DCT
Block level
iDCT/MC
DB
 Row Buffer

rd alu wr
ram ctrl ctrl ctrl ram
alu

central buffer
Y: Cb: Cr:
in memory

0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7

in buffer

2 3 8 9 0 1 5 4 7 6

MB finish
in memory prefetch order

0 1 2 3 4 5 6 7 8 9 10 11

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

in buffer

2 3 8 9 0 1 5 12 4 7 14 6
0 1 2 5 6 7 8 9 10 11
MB finish
 Note
 mb_type semantics: 7.4.5
 IP ALU

Shift
FIR #1
Incr
Shift
Add
Incr
Shift
FIR #2
Incr

: (((A+2B+C+2) >>2) + ((C+2D+E+2) >>2 )) >>1 => (X + Y )>>1 @ P2 (2 ca

: ( (A+2B+C+2) + (C+2D+E+2) ) >>3 => (X+Y+4) >>3 @P7 (2 cases) H.264 (

ral control pair is (shift_amount, do_rounding)

>>3 + result(2) , P2: >>1
IP ALU

Shift
FIR #1
Incr

Shift
FIR #2
Incr

Shift
FIR #1
Incr

Shift
FIR #2
Incr