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ERBE

ICC 200
ICC 300 H-E
Service manual
ICC 350

09.2004
ICC 200, ICC 300 H-E, ICC 350
SERVICE MANUAL
10128-002, 10128-009, 10128-010, 10128-015, 10128-016
10128-023, 10128-025, 10128-027, 10128-028, 10128-036
10128-051, 10128-054, 10128-055, 10128-056, 10128-058
10128-061, 10128-064, 10128-065, 10128-066, 10128-070
10128-071, 10128-072, 10128-073, 10128-074, 10128-075
10128-076, 10128-077, 10128-078, 10128-080, 10128-081
10128-082, 10128-083, 10128-200, 10128-202, 10128-204
10128-205, 10128-206, 10128-213, 10128-214, 10128-300
10128-301, 10128-303, 10128-304, 10128-305, 10128-306
10128-307,10128-310, 10128-403

09.2004
This service manual was created by

Michael Grosse
Dipl.-Phys. (Physicist)
Tel (+49) 70 71 / 755–254
Fax (+49) 70 71 / 755–5254
E-Mail mgrosse@erbe-med.de
Net http://www.erbe-med.de

Please contact me directly with your


suggestions, criticism or information
regarding this manual. Your feedback
helps me design this document
according to your requirements and to
constantly improve it.

All rights to this service manual, particularly the right to reproduction, distribution and translation,
are reserved. No part of this service manual may be reproduced in any form (including photocopying,
microfilm or other means), or processed, reproduced or distributed by means of electronic systems
without prior written permission from ERBE Elektromedizin GmbH.
The information contained in this service manual may be revised or extended without prior notice
and represents no obligation on the part of ERBE Elektromedizin GmbH.

Copyright © ERBE Elektromedizin GmbH, Tübingen 2004

Printed by: ERBE Elektromedizin GmbH, Tübingen Art. No.: 80116-201


Printed in Germany
Contents

Chapter Title Page

0 Table of contents ................................................................................... 5

1 Test programs and adjustments .......................................................... 7


Calling up Test program mode ....................................................................... 10
Basic settings of the SETUP parameters ........................................................ 11
Front panel of the ICC 200 (INT) after starting up the unit ......................... 12
Front panel of the ICC 200 (UL) after starting up the unit .......................... 13
Front panel of the ICC 300 after starting up the unit ................................... 15
Front panel of the ICC 350 after starting up the unit ................................... 16
Test programs 1–8 ........................................................................................... 17
Test program 9 (Display programs 1–12) ..................................................... 28
Test programs 10–15 ....................................................................................... 39
Test program 16 (Adjustments, measuring equipment, jumper) ................. 45
Adjustment of ZMK Neurotest and TUR Neurotest ................................... 105
Adjustment of remote control for Neurotest ............................................... 111
Adjustment of activation and instrument detection .................................... 115
Test program 17, 23 ....................................................................................... 123

2 ERROR list ......................................................................................... 127

3 Circuit description ............................................................................. 137

4 Block diagrams .................................................................................. 169

5 Circuit diagrams ................................................................................. 175

A Appendix A (Part numbers, PCB arrangement) .............................. 241


Art. No.: 80116-201

B Appendix B (Abbreviations, notes, addresses) .............................. 263


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6 / 266
Chapter 1
Test programs
and
adjustments
Test programs
ERBOTOM ICC 350, 300, 200
Version 4.0 / 3.0 / 2.0

No. Test program function V 4.0 / 3.0 / V 2.0

1 Basic front panel setting (only ICC 300 and 200) x

2 Calls up the Error list x

3 Test of all D-flipflop circuit memories x

4 Test of all front panel visual signals x

5 Test of all acoustic signals x

6 Test of all relays x

7 NESSY: Version number setting x

8 Display of software version no. and option no. x

9 Activation of display programs x

10 Time limit setup x

Measurement and display of extra-low voltages +15 volts, –15 volts,


11 x
+24 volts and the temperature
12 Setting the FORCED voltage (2.0: 3 x forced; 4.0: 4 x forced) x

13 not assigned

14 not assigned

15 not assigned

16 Test and setting help for all unit calibration functions x

17 Brightness setting for the seven-segment displays x

18 not assigned

19 not assigned

20 not assigned

21 not assigned
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22 not assigned
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23 AUTO START start delay setup x

1 TEST PROGRAMS AND ADJUSTMENTS 9 / 266


Calling up the
TEST PROGRAM mode

, , ,,
, ,
,,, ,, ,
, ,
, , ,, ,

1 2

3 4 5 7 8 9 11 12 14 15 16

Note regarding the drawing


The front panel shown of the ICC 350 applies to the ICC 200 and ICC 300 in such a way that only the
AUTO CUT and AUTO COAG control panels apply to the ICC 300, and the AUTO CUT, AUTO COAG
and AUTO BIPOLAR control panels apply to the ICC 300.

Calling up
Press key 3 (Roll) when switching on the power and hold it down.

Setting the test program number


Using keys 8 (Up) or 9 (Down), set the required program number.

Starting and finishing test programs


By pressing key 3 (Roll), start or finish a test program.

Exiting the test program mode


Exit the TEST PROGRAM MODE by switching off the power or setting TEST PROGRAM no. 0 using key 9
(Down).

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Basic settings of the SETUP
parameters
ERBOTOM ICC 350, 300 and 200

AUTO START delay Autostart stage Basic settings Remarks


ICC 350, ICC 300

adjustable using
0 0s
Test program 23

1 0.5 s

2 1s

AUTO START delay


no stepping 0.5 s
ICC 200

Time limit setting


output max. time limit
ICC 350 Test program 10

Auto Cut 90 s
Auto Coag 1 90 s
Auto Coag 2 90 s
Auto Bipolar 90 s
adjustable using
NESSY version no. NE 1 | || *)
Test program 7
adjustable using
FORCED voltage version 1
Test program 12
Brightness of the adjustable using
10
seven-segment display Test program 17

*) || means a split NE electrode,


| means a non-split NE electrode,
| || means both split and non-split NE electrode are possible.
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1 TEST PROGRAMS AND ADJUSTMENTS 11 / 266


Front panel of the ICC 200 (INT)
After starting up the unit
Factory setting

B asic setting IC C 200 w ithout


EN D O C U T option

AUTO C UT Effe ct 3 120 watts max.

AUTO C OAG FORC ED 60 watts max.

AUTO C OAG (with ARGON option) Spray 60 watts max.

Footswitch se tting ye llow = AUTO C UT blue = AUTO C OAG

Basic setting ICC 200 with


ENDO CUT option

AUTO C UT Effe ct 3 120 watts max.

AUTO C OAG FORC ED 60 watts max.

AUTO C OAG (with ARGON option) Spray 60 watts max.

Footswitch se tting ye llow = AUTO C UT blue = AUTO C OAG

END O C UT ON

Pulse le ngth tON = 50 ms

Pause le ngth tOFF = 750 ms

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Front panel of the ICC 200 (UL)
After starting up the unit
Factory programming

Basic programming
ICC 200 without ENDO CUT option

AUTO C UT Effe ct 3 120 watts max.

AUTO C OAG FORC ED 60 watts max.

Footswitch se tting ye llow = AUTO C UT blue = AUTO C OAG


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1 TEST PROGRAMS AND ADJUSTMENTS 13 / 266


NOTE
If the settings are reset, the factory programming of the ICC 200 E and ICC 200 E/A units is lost.
It can be restored using the following table.

Basic programming
ICC 200 E and ICC 200 E/A

AUTO C UT Effe ct 3 200 watts max.

AUTO C OAG FORC ED 25 watts max.

AUTO C OAG SOFT 65 watts max.

AUTO C OAG BIPOLAR 20 watts max.

AUTO C OAG (for IC C 200 E/A only) Spray 60 watts max.

Footswitch se tting ye llow = AUTO C UT blue = AUTO C OAG

END O C UT ON

Pulse le ngth tON = 50 ms

Pause le ngth tOFF = 750 ms

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Front panel of the ICC 300
After starting up the unit
Factory setting

Basic setting ICC 300

AUTO CUT Effect 3 150 watts max.

AUTO COAG SOFT 60 watts max.

AUTO BIPOLAR AUTO START = off 60 watts max.

Footswitch setting yellow = AUTO CUT blue = AUTO COAG


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Front panel of the ICC 350
After starting up the unit
Factory setting

Basic setting ICC 350

AUTO CUT Effect 3 150 watts max.

HIGH CUT switched off –

AUTO COAG 1 SOFT 60 watts max.

AUTO COAG 2 FORCED 60 watts max.

AUTO START = off


AUTO BIPOLAR 40 watts max.
AUTO STOP = off
Footswitch setting yellow = AUTO CUT blue = AUTO COAG 2

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Test program no. 1
ICC 200, 300 only

General description
Using this test program, any front panel setting can be made. This setting is known as the basic setting.
After termination, the basic setting is stored internally. Only completely saved channels are stored. The
basic setting display flashes. Acknowledge by pressing any key.

Termination
Using “Power off”.

Switch off a channel


Using the “Down” key (8), set the lowest intensity. Once the lowest display is set, the seven-segment
display changes to “---”. This means that the channel has been switched off.
Basic setting and brief power failure
For a brief power failure of 15 seconds max., the front panel setting last set is displayed.
Activation of a channel is blocked if a channel has not been completely set or the basic setting was not
acknowledged.
The basic setting set at the factory corresponds to the FIXE basic setting.

FIXE basic setting


A FIXE basic setting is stored in the program. This basic setting is accepted and displayed if:
• the stored front panel setting is invalid, e.g. through failure of the circuit memory or through battery
memory lost,
• in Test program 1, the “All off” setting has been accepted.
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1 TEST PROGRAMS AND ADJUSTMENTS 17 / 266


Test program no. 2
Call up and display of the error memory

General description
The ICC units are equipped with a system for error detection, error indication and error memory. Every error
receives an error number (ERROR no.). The unit stores the last 10 ERROR numbers. Test program 2 displays
the stored ERROR numbers. The most recent error occurring chronologically is in memory location 1.

Display

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

Err. 1 ... 10 xxx

xxx: Display of the error number


By pressing keys 8 (Up) or 9 (Down), you can call up the memory locations one after another. By pressing
key 7, you delete the error numbers at all memory locations.

Example
After starting the test program with key 3, for example, Error no. 2 appears at memory location 1 with the
following display:

Display

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

Err. 1 2

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Test program no. 3
Test of all D-flipflop circuit memories

General description
Test of all D-flipflop (D-FF) circuit memories. After starting the test with key 3, you will see the following display:

Display
(ICC 350, ICC 300)

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR


*)
buS 0 d0 ... d7 alternating

Display
(ICC 200)

buS d0 ... d7 alternating

buS*) (D-FF-Test Nr. 0) tests the external control bus for signal lines d0–d7. The signal lines d0–d7 are
switched on and off one after another. The switching statuses can be displayed on the bar graph (adapter
board 30183-102).
Using the keys 8 (Up) or 9 (Down), you can call up D-FF tests 1-11. You will see the following display:

Display
(ICC 350, ICC 300)

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

dFF 1 ... 11 d0 ... d7 alternating

Display
(ICC 200)

dFF 1 ... 9 d0 ... d7 alternating

The D-FF signal lines d0-d7 are switched on and off one after another. The signals can be measured at the
D-FF outputs. There is an error if
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• there is more than one output status at the same time,


• there is constantly an output signal in spite of switching over,
09 / 2004

• there is no output signal in spite of D-FF activation.

*)
buS is the seven-segment display for the word „BUS“.

1 TEST PROGRAMS AND ADJUSTMENTS 19 / 266


Test program no. 3
Test of all D-flipflop circuit memories

Overview of the D-flipflop tests

Test no. D-FF description Position Remarks

0 external control bus Motherboard

1 D-FF IC 2 Motherboard

2 D-FF IC 3 Motherboard

3 D-FF IC 9 Extra-low voltage and tone

4 D-FF IC 19 Control board

5 D-FF IC 20 Control board

6 D-FF IC 6 ST power stage

7 D-FF IC 10 Senso-board

8 D-FF IC 8 Relay board not ICC 200

9 Extension motherboard slot J9 not ICC 200

10 Extension motherboard slot J9 not ICC 200

11 Extension motherboard slot J9 not ICC 200

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Test program no. 4
Check of the optical signals on the front
panel

General description
Using this program, you can test the optical displays on the front panel. After starting the test program, you
will see the following display:
All optical signals on the front panel are switched on. The 7-segment displays show “8.” for all numbers.
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Test program no. 5
Sound control for all available sounds

General description
Using this program, you can test and set all available sounds. After starting the program, you will see the
following display:

Display

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

ton 0 ... 4

Using the keys 8 (Up) or 9 (Down), you can set a test number from 0 to 4. The following correspondence
applies between the test numbers and the sounds:

Test no. Tones switched on Tone variants Remarks

Tone generation
0
switched off
1 Basic tone 1 Volume adjustable

2 Basic tone 2 Volume adjustable

3 Basic tone 3 Volume adjustable

4 Basic tone 4 Volume adjustable

Basic tone 1 to 3 Volume adjustable

Mixed tone: Basic tone 1 and 2 Volume adjustable

Mixed tone: Basic tone 1 and 3 Volume adjustable

Mixed tone: Basic tone 2 and 3 Volume adjustable

Basic tone 1 to 3 Alarm volume

Mixed tone: Basic tone 1 and 2 Alarm volume

Mixed tone: Basic tone 1 and 3 Alarm volume

Mixed tone: Basic tone 2 and 3 Alarm volume

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Test program no. 5
Sound control for all available sounds

Frequency adjustment for warning tones


The warning tone frequency setting can be adjusted independently of other assemblies on the low-voltage
power supply (jumper J2) with Test program no. 5.
• Activate Test program no. 5. MP 4 is GND for frequency counter.
• Call »Tone 1«: Set frequency at MP 1 with TP 2 to 493 Hz (±2 Hz) with frequency counter.
• Call »Tone 2«: Set frequency at MP 2 with TP 3 to 414 Hz (±2 Hz) with frequency counter.
• Call »Tone 3«: Set frequency at MP 3 with TP 4 to 329 Hz (±2 Hz) with frequency counter.
• To check settings the various tones and mixed tones are generated one after the other by calling
»Tone 4«. Here, take especial care that the operating and warning tones have different volumes.
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Test program no. 6
Relay test

General description
Using this program, all relays can be actuated. The NESSY measurement monitor is switched off. After
ending the test program, relay no. 1 is switched on for the power starting current limitation.
Test program no. 6 is also intended for safety testing of the unit. With this test, there may be a brief
failure of the power supply due to the external intervention. If the test program is activated, the test
program is automatically called up again after a brief power failure of up to approx. 15 seconds. However,
if the power failure is longer than 15 seconds, this will not occur.
After starting the test program, you will see the following display:

Display

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

rEL 0 ... 1

Designation of the PCBs with their assigned relays

PCB Slot Relay function Remarks

Motherboard ICC 350 – see lines 3 and 4


Motherboard ICC 200 – see lines 3 and 4
Motherboard – Rel. 1: Power starting current limitation
Motherboard – Rel. 2: Capacitance ground only for ICC 350
Power module J5 Rel. 1: Switchover ST generator: HF
ST power stage J6 Rel. 1: Output HF: UE1 to NE
ST power stage J6 Rel. 2: Output HF: Rel. 3 to AE
ST power stage J6 Rel. 3: Output HF: UE1 to AE
ST power stage J6 Rel. 19: Connection to power supply
Senso-board J7 Rel. 1: Output NE - NESSY
Senso-board J7 Rel. 2: Output AE
Senso-board J7 Rel. 3: Output NE
Relay board J8 Rel. 1: Output AE 1 only ICC 300 / 350
Relay board J8 Rel. 2: Output AE 2 only ICC 300 / 350
ICC 200: Mono output
J8 Rel. 1: Output AE 1 only ICC 200
board

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Test program no. 6
Relay test

Overview of the relay test options

Test no. 0
Switch off all relays

Test object Relay status Remarks

Power starting
Rel. 1, motherboard switched off
current limitation

all other relays switched off

Test no. 1
Switch on all relays

Test object Relay status Remarks

Power starting
Rel. 1, motherboard switched on
current limitation
depending on
dongle installed
switched on
Rel. 2, motherboard capacitance
or off
grounded
(only ICC 350)

all other relays switched on

All relays on PCBs additionally required for the ERBOTOM ICC 350 MIC are switched on.
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Test program no. 7
Setting the NESSY version

General description
Using this program, you can set four NESSY versions. After starting the test program, you will see the
following displays when you activate key 3:

Display

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

NE.1 || or |

In the AUTO COAG field:


|| means a split neutral electrode,
| means of non-split neutral electrode.
Using the keys 8 (Up) or 9 (Down), you can set four different NESSY versions:

No. AUTO CUT AUTO COAG 1 Remarks

1 NE.1 || or | for split and non-split electrodes

2 NE.2 | only for non-split electrodes

only for split electrodes; acoustic (3 times) and


3 NE.3 ||
visual alarm
only for split electrodes; acoustic (continuous
4 NE.4 ||
tone) and visual alarm

At the end of the test, the NESSY version number is stored. Version number 1 is the standard version set
when the unit is delivered. In case of memory failure, version no. 1 is automatically set. When switching on
the power, version no. 2, 3 or 4 is displayed briefly if this is set. The standard version no. 1 is not displayed.

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Test program no. 8
Display of the software version and any
options

General description
Using this program, you can display the software version, while on the ICC 350 and ICC 300, you can also
see the display of an option identification number.
After starting the program, you will see the following display:

Display

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

Snr x.xx y

Explanation:
x.xx Software version no. (e.g. 2.0)
y Option code no. (e.g. 8).

Code
no. means

0 Unit without option

1 ICC 350: Neurotest ZMK

2 ICC 350: Neurotest TUR

8 ICC 350: ENDO CUT function

16

32

64

128
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256

The code number is based on a binary code:


09 / 2004

Example
Code no. 2 means ICC 350 Neurotest TUR
Code no. 9 means ICC 350 Neurotest ZMK + Endocut
1 + 8

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Test program no. 9
Activating display programs to display
measurement values

General description
This program activates displays in the standby mode or during activation. With key 3, Test program no. 9 is
started.
After starting, you will see the following display:

Display

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

nr. 0

Within Test program no. 9, 22 subprograms for displaying specific data can be called up, while subprograms
16 to 22 are intended only for use by the manufacturer.
These subprograms can now be set using keys 8 (Up) or 9 (Down). Once the required display program has
been selected, it is reactivated using key 3. The selected display program remains activated until the power
is switched off.

Display

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

nr. 0 ... 22

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Display programs nos. 1–3

The selected display program now displays the required data during regular operation of the unit. To do
this, the appropriate operating modes must be set and the accessories activated.
The display program remains activated until the power is switched off. To return to normal operation, the
unit must be switched off for a short time and switched back on again.

Display program no. 1: not assigned

Display program no. 2: not assigned

Display program no. 3:


ST generator time control with activation of SPRAY or FORCED.
Display for ICC 350 and ICC 300:

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

ttt P2 P3 tst

ttt Difference between set frequency and actual frequency


P2 Set power [W]
P3 Set power [W]
tst Abbreviation of the test title (Time-ST stage)
Display program no. 3:
ST generator time control with activation of FORCED.
Display on ICC 200:

AUTO CUT AUTO COAG

ttt tst
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ttt Difference between set frequency and actual frequency


tst Abbreviation of the test title (Time-ST stage)
09 / 2004

1 TEST PROGRAMS AND ADJUSTMENTS 29 / 266


Display programs nos. 4–5

Display program no. 4:


ST generator measurement values with ST generator activation.
Output measurement values U st, Ist
Display for ICC 350 and ICC 300:

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

uuu iii P3 UI

uuu Measurement value of the output voltage sensor


iii Measurement value of the output current sensor
P3 Set power [W]
UI Abbreviation of the test title (Voltage and current measurement)
Display program no. 4:
ST generator measurement values with ST generator activation.
FORCED activation
Display for ICC 200:

AUTO CUT AUTO COAG

uuu USt

uuu Measurement value of the output voltage sensor


Display program no. 5:
Power supply unit measurement values for ST generator activation.
Measurement values Unt, Int
Display for ICC 350 and ICC 300:

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

uuu iii P3 UI

uuu Measurement value of the power supply unit voltage


iii Measurement value of the power supply unit current
P3 Set power
UI Abbreviation of the test title (Voltage, current measurement)

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Display program nos. 5–7

Display program no. 5:


Power supply measurement values with ST generator activation, FORCED activation.
Measurement values Unt, Int
Display for ICC 200:

AUTO CUT AUTO COAG

uuu Unt

uuu Measurement value of the power supply unit voltage


Display program no. 6:
ST generator measurement values for ST generator activation, FORCED activation.
Measurement value Ist
Display for ICC 200:

AUTO CUT AUTO COAG

iii Ist

iii Measurement value of the output current sensor


Display program no. 7:
Power supply unit measurement values for ST generator activation, FORCED activation.
Measurement value Int
Display for ICC 200:

AUTO CUT AUTO COAG

iii Int

iii Measurement value of the power supply unit current


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Display program no. 8

Display program no. 8:


Measurement values for activation of the sine-wave generator.
AUTO CUT, AUTO COAG 1 and 2 in SOFT mode, AUTO BIPOLAR
Output measurement value U act
Display for ICC 350 and ICC 300:

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

ppp uuu cos PU

ppp HF power output [W], present power output


uuu HF output voltage [V], present output voltage
cos cos-j-value from the table (ICC 350 only)
PU Abbreviation of the test title (Power and voltage measurement)

Display program no. 8:


Measurement values for activation of the sine-wave generator.
AUTO CUT, AUTO COAG 1 and 2 in SOFT mode, AUTO BIPOLAR
Output measurement value Uact
Display for ICC 200:

AUTO CUT AUTO COAG

ppp P

ppp HF power output [W]


P Abbreviation of the test title (Power measurement)

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Display program no. 9

Display program no. 9:


Measurement values for activation of the sine-wave generator.
AUTO CUT, AUTO COAG 1 and 2 in SOFT mode, AUTO BIPOLAR
Output measurement values I real, cos j (Real part of the current and cos j between voltage and current)
Display for ICC 350 and ICC 300:

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

iii cos ppp IC

iii Real part of the measurement value from the HF output current
cos cos-j value from the table (ICC 350 only)
ppp HF power output [W] for ICC 350
IC Abbreviation of the test title (Current measurement and cos j measurement)

Display program no. 9:


Measurement values for activation of the sine-wave generator.
AUTO CUT, AUTO COAG 1 and 2 in SOFT mode, AUTO BIPOLAR
Output measurement value: Measurement value of the real part of the HF output current
Display for the ICC 200:

AUTO CUT AUTO COAG

iii I

iii Measurement value of the real part of the HF output current


I Abbreviation of the test title (Current measurement)
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Display programs nos. 10–11

Display program no. 10:


Measurement values for activation of the sine-wave generator.
AUTO CUT, AUTO COAG 1 and 2 in SOFT mode, AUTO BIPOLAR
Output measurement value U act
Display for the ICC 200:

AUTO CUT AUTO COAG

uuu U

uuu HF output voltage [V]


U Abbreviation of the test title (Voltage measurement)

Display program no. 11:


Measurement values for activation of the sine-wave generator.
AUTO CUT, AUTO COAG 1 and 2 in SOFT mode, AUTO BIPOLAR
Output measurement value cos j
Display for the ICC 200:

AUTO CUT AUTO COAG

cos Cos

cos cos-j value from the table


Cos Abbreviation of the test title (cos-j measurement)

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Display program no. 12 (Start)

Display program no. 12:


Contact resistance at AUTO START, in standby operation.
Only valid for AUTO START 0, 1, 2 and in standby operation.
Display for ICC 350 and ICC 300:

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

uuu P2 P3 br

uuu Measurement value of the contact monitor voltage measurement


P2 Set power for AUTO COAG 1 [W]
P3 Set power for AUTO COAG 2 [W]
br Contact monitor

Display program no. 12:


Contact resistance for AUTO START, in active condition.
Only valid for AUTO START 0, 1, 2 and in active condition.
Display for ICC 350 and ICC 300:

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

rda P2 P3 br

rda Calculated value of the contact resistance [ohms]


P2 Set power for AUTO COAG 1 [W]
P3 Set power for AUTO COAG 2 [W]
br Contact monitor
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1 TEST PROGRAMS AND ADJUSTMENTS 35 / 266


Display program no. 12 (continued)

Display program no. 12:


Contact resistance for AUTO START, in standby operation.
Display for ICC 200:

AUTO CUT AUTO COAG

uuu br

uuu Measurement value of the contact monitor voltage measurement


br Contact monitor

Display program no. 12:


Contact resistance for AUTO START, in active condition.
Display for ICC 200:

AUTO CUT AUTO COAG

rda br

rda Calculated value of the contact resistance [ohms]


br Contact monitor

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Display program no. 15

Display program no. 15:


NESSY transition resistance in stand-by-operation and on activation.
Display for ICC 350 and ICC 300:

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

rtr P2 P3 br

rtr calculated NESSY transition resistance [Ohm]


P2 set power for AUTO COAG 1 [W]
P3 set power for AUTO COAG 2 [W]
br AUTO START monitor

Display program no. 15:


NESSY transition resistance in stand-by-operation and on activation.
Display for ICC 200:

AUTO CUT AUTO COAG

rtr r

rtr calculated NESSY transition resistance [Ohm]


r AUTO START monitor
Art. No.: 80116-201
09 / 2004

1 TEST PROGRAMS AND ADJUSTMENTS 37 / 266


Display programs nos. 13–22

NOTE
Display programs nos. 13 and 14 are not assigned. The program nos. 17–22 are only intended for internal
use by the manufacturer.

38 / 266 1 TEST PROGRAMS AND ADJUSTMENTS


Test program no. 10
Changing the maximum time limit

General description
Using this program, you can change the time limit for the ICC 200, 300 and 350. The setting range varies
from 3 to 960 seconds.
Using the appropriate “Up” or “Down” keys, the time limit restriction for every current quality can be set
individually.
For the ICC 350, various time limit settings can be stored in the individual program memories for each user.
This occurs after selecting the program number with program memory key 2 and then changing the respective
current qualities using the appropriate “Up” or “Down” key.
After termination of Test program 10 using key 3, the settings made are stored.
In case of memory failure, as well as in the delivery condition, the max. time limit for all programs and
current qualities (CUT, COAG 1, COAG 2, BIPOLAR) is set at 90 seconds.
After starting Test program 10 with key 3, you will see the following display:

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

t1 t2 t3 t4

• t1: Time limit restriction for AUTO CUT in seconds


• t2: Time limit restriction for AUTO COAG 1 in seconds
• t3: Time limit restriction for AUTO COAG 2 in seconds
• t4: Time limit restriction for AUTO BIPOPLAR in seconds.

Using the following keys, you can adjust the max. time limit (see page 1-4):

• AUTO CUT : Keys 4 and 5


• AUTO COAG 1 : Keys 8 and 9
• AUTO COAG 2 : Keys 11 and 12
• AUTO BIPOLAR : Keys 15 and 16
Art. No.: 80116-201
09 / 2004

1 TEST PROGRAMS AND ADJUSTMENTS 39 / 266


Test program no. 11
Measurement value output for the
measurement channels

Using this program, you can measure the internal supply voltages and the temperature of the unit. In addition,
you can display all analog direct measurement channels 1, 2, 3 and 4 as well as analog multiplex measurement
channels.
After starting the test program, you will see the following display:

Display ICC 350 / 300

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

U 0 XX.X

U– 1 XX.X

U 2 XX.X

tPt ttt xxx

Ch 4 … 22 yyy

• XX.X Voltage value [V]


• ttt Temperature [°C]
• xxx ADC measurement value in the range 0 … 255
• yyy ADC measurement value in the range 0 … 255

Using the keys “Up” (8) or “Down” (9), call up the subprograms U, U-, tPt and Ch 4 … 22.
U0 is the low voltage controlled to +15 volts ±10%
U–1 is the low voltage controlled to –15 volts ±10%
U2 is the low voltage controlled to 24 volts ±10%
tPt is the temperature display of the output stage ±15%
Ch4 … 22 are the analog measurement channels according to the following table:

Display ICC 200

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

U.15 XX.X

–15 XX.X

U.24 XX.X

tPt ttt

C.aa yyy

40 / 266 1 TEST PROGRAMS AND ADJUSTMENTS


Test program no. 11
Measurement value output of the
measurement channels

• XX.X Voltage rating [ V ]


• ttt Temperature [°C ]
• C.aa Channel number
• yyy ADC measurement value in the range 0 ... 255

Using the “Up” (8) or “Down” (9) keys, call up the subprograms U, U-, tPt und C. 4-22.
U0 is the supply voltage controlled to +15 volts
U–1 is the supply voltage controlled to –15 volts
U2 is the supply voltage controlled to +24 volts
tPt is the temperature display of the output stage
C. 4 … 22 are the analog measurement channels according to the following table.

Voltage test U 0 or U.15


Measurement and display of the supply voltage controlled to +15 volts
Display XX.X: e.g. 14.6 equals 14.6 volts

Voltage test U–1 or –15


Measurement and display of the supply voltage controlled to –15 volts
Display XX.X: e.g. 14.6 equals –14.6 volts

Voltage test U 2 or U.24


Measurement and display of the supply voltage controlled to +24 volts
Display XX.X: e.g. 23.6 equals +23.6 volts

Measurement of the output stage temperature


Display tPt 25 means that the temperature inside the unit is 25 °C.
Art. No.: 80116-201

Test of the analog measurement channels (Subtest 4 … 22)


09 / 2004

Measurement and display of 19 analog measurement channels inside the unit.


(Intended for internal use by the manufacturer only).

1 TEST PROGRAMS AND ADJUSTMENTS 41 / 266


42 / 266 1 TEST PROGRAMS AND ADJUSTMENTS
Test program no. 12
Setting the FORCED voltage

General description
When this program is called up, the set FORCED version is displayed. Using the “Up” (8) or “Down” (9)
keys, you can set one of three (V2.0) or four (V4.0) FORCED versions.
With FORCED coagulation, the ST pulse generator produces short pulses with a high no-load voltage. The
high no-load voltage has both advantages and disadvantages which are described in this section with the
features.
Using Test program 12, the no-load voltage can be changed relative to the set power limitation.
After starting the test program, you will see the following display:

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

For. vs nr

For. Voltage limitation for FORCED coagulation


vs nr: FORCED version nos. 1…3 (V2.0) or 1…4 (V4.0)
Call up the version number using the “Up” (8) or “Down” (9) keys.

Forced version vs nr 1
A power limitation of 1 to 30 watts increases the no-load voltage constantly up to approx. 1,300 Vp.
Above 30 watts power limitation, the no-load voltage is limited to approx. 1,300 Vp.

Characteristics of the version vs nr 1


• Minimal image interference on monitors.
• Danger of burns from contact with a terminal.
• Good coagulation via a terminal without heavy spark formation.
• No heavy spark formation even at a high power setting.
• To direct power into the tissue, the tissue must be contacted (No power transmission via spark).

FORCED version vs nr 2
Art. No.: 80116-201

A power limitation of 1 to 30 watts increases the no-load voltage constantly up to approx. 1,300 Vp. Above
30 watts power limitation, the no-load voltage continues to increase:
09 / 2004

No-load voltage at 40 watts: approx. 1,500 Vp


No-load voltage at 50 watts: approx. 1,700 Vp
No-load voltage at 60 watts: approx. 1,900 Vp
No-load voltage from 80 to 120 watts: approx. 2,300 Vp.

1 TEST PROGRAMS AND ADJUSTMENTS 43 / 266


Test program no. 12
Setting the FORCED voltage

Characteristics of version vs nr 2
The characteristics are between those of the vs nr 1 and those of the vs nr 3.

FORCED voltage version vs nr 3


A power limitation of 1 to 30 watts increases the no-load voltage constantly up to approx. 2,300 V p. Above
30 watts power limitation, the no-load voltage is limited to approx. 2,300 Vp.

Characteristics of version vs nr 3
• Image interferences on monitors possible.
• Danger of burns from contact with a terminal possible.
• Heavy spark formation with coagulation via a terminal.
• Heavy spark formation also at a 30 watts power setting.
To direct high-frequency power into the tissue, the tissue must not necessarily be contacted (current flow or
powered transmission [see vs nr 2] possible via arc).

FORCED voltage version vs nr 4


A power limitation of 1 to 30 watts increases the no-load voltage constantly up to approx. 2,600 Vp. Above
30 watts power limitation, the no-load voltage is limited to approx. 2,600 Vp.

Characteristics of version vs nr 4
• Image interference on monitors possible.
• Danger of burns from contact with a terminal possible.
• Heavy spark formation with coagulation via a terminal.
• Heavy spark formation also at a 30 watts power setting.
To direct high-frequency power into the tissue, the tissue must not necessarily be contacted (current flow or
powered transmission [see vs nr 2] possible via arc).

Important notes
• The vs no set only applies to FORCED AUTO COAG 1, FORCED AUTO COAG 2 and for programs
0 to 11.
• For the MIC program, vs nr 1 is automatically set.
• In case of memory failure, vs nr 1 is automatically set.
When switching on the power supply, vs nr 2, vs nr 3 or vs nr 4 (V4.0) is briefly displayed. The standard vs
nr 1 is not displayed.

44 / 266 1 TEST PROGRAMS AND ADJUSTMENTS


Test program no. 16
Pre-information:
Recommended measuring equipment

Measuring equipment
To service equipment from the ICC series, various meters are necessary. The following list summarizes
recommended measuring equipment for a quick overview.

ATTENTION !
Individual parts and boards are at supply voltage potential. After removing the housing cover, there is risk of
electrical shock due to unintentional contact with the power plug connected.

The HF power meter, the oscilloscope and the frequency counter must be operated as floating.

The unit contains a lithium battery which must only be discarded in battery collection containers in completely
discharged condition (i.e. after use). Otherwise, care must be taken to prevent shorting in accordance with
the battery regulations.

EE order no. EE order no.


Measuring equipment
(230 V; 50/60 Hz) (120 V; 50/60 Hz)

Testbox 2 20183-040 20183-041

70 V testbox for spark monitor ICC 20100-019 20100-028

HF power meter —

Isolating transformer for APM 600 20100-013

Adapter cable for NESSY monitor 20100-003

Bipolar adapter cable 20100-004

Measurement cable for LF patient leakage current 20100-009 (standard)

Measurement cable for LF patient leakage current 20100-012 (international)

2-channel oscilloscope (> 40 MHz) —


Art. No.: 80116-201

Frequency counter —
09 / 2004

Multimeter with µA range —

Bipolar testbox automatic starter ICC 20100-017

Extension board 30183-106

1 TEST PROGRAMS AND ADJUSTMENTS 45 / 266


Test program no. 16
Pre-information:
Jumper on the display board

General information
On the display board, there are slots for jumper which, by plugging in so-called “jumpers”, can activate
special software by which our HF surgical units from the ICC series can be adapted to prescribed special
conditions (such as are necessary in various countries) or by means of which specific tests can be performed
by the testing department and service.

WARNING
These jumpers are already positioned during production and must never be changed randomly. For a software
update, make certain that the jumpers are correctly plugged in. Back-up plugs are in the bag with the spare
fuses.

Where are the slots for the jumpers?


If you look at the display board inside the open unit from the perspective of the rear panel, the following
stylized image can be seen:

J3–J6
3 6

Connector
to the CPU
LED display LED display LED display LED display

J7–J10 J7–J10
7 10 7 10

Only at right on
ICC 300

Two blocks are available to receive jumpers: At the top right is a block with the slots J3–J6, at the bottom
left (ICC 300: bottom right) is the block with the slots J7–J10.

46 / 266 1 TEST PROGRAMS AND ADJUSTMENTS


Test program no. 16
Pre-information:
Jumper on the display board

Block 1

Pos. Function Jumper plugged in Jumper not plugged in

Only ICC 350:


Switchover of neutral Output circuitry with Output circuitry is "floating
J3
electrode to "capacitance capacitance ground. output".
grounded" or "floating output".
Maximum temperature of
Only for test purposes. The unit is delivered with this
J4 generator is displayed
Temperature display. setting.
(ERROR 11).

J5 J5 functions together with J6. (see following explanation) (see following explanation)

J6 J6 functions together with J5. (see following explanation) (see following explanation)

The J5 and J6 slots are read by the CPU as a binary number. In this way four different functioning methods,
independent from one another, are programmable by plugging in these jumpers:

J5 J6 Description of the set function

free free None of the following 3 programs is selected.

plugged free Contact monitor is blocked and AUTO START display is "off".

During activation, another activation signal from some other source has switched off
free plugged
the unit activation (Spanish regulation).
F leakage current > 150 mA, but < 300 mA:
Triple visual and acoustic alarm is triggered.
plugged plugged
HF leakage current > 300 mA:
Art. No.: 80116-201

The HF generator is switched off. Visual and acoustic alarm is triggered.


09 / 2004

1 TEST PROGRAMS AND ADJUSTMENTS 47 / 266


Test program no. 16
Pre-information:
Jumper on the display board

Block 2 (as of Version 1.06)

Pos. Function Jumper plugged in Jumper not plugged in

J7 (not in use) (not applicable) (not applicable)

Deactivation of ERROR 30
Low-resistance load operation possible for BIPOLAR COAG
< 5 ohms triggers ERROR 30 (as of V 2.00):
ERROR 30 warning appears
to protect accessories and - after 4 s red LED (output
due to delivery status
J8 generator. error)
(not USA, ERROR 30
ERROR 30 can be - Output current max. 1.5 A
deactivated here).
deactivated here when - no ERROR indication
activating AUTO BIPOLAR. (This specification especially
applies to the USA.)

Regardless of the selection, special settings are necessary for specific countries. These can be found in the
following matrix. Explanation:
1 Jumper must be plugged in,
o Jumper must not be plugged in,
x (according to the description for Block 1).

Country J5 J6 J7 J8

Germany o o no function per above table

European countries
(excepted: o o no function per above table
see below)

Great Britain 1 o no function per above table

Spain o 1 no function per above table

Japan 1 1 no function per above table

USA x x no function 1

48 / 266 1 TEST PROGRAMS AND ADJUSTMENTS


Test program no. 16
Pre-information:
Jumper on the display board

Note regarding ERROR 30


With bipolar coagulation, it may happen that, over a longer period of time, a short circuit occurs on one of
the bipolar forceps. Particularly for thin forceps, there is a danger with a short circuit that the forceps begin
to glow due to the high current and the HF generator is damaged due to a mismatch.
Since tissue resistance quickly reaches values above 50 ohms during a coagulation process with conventional
bipolar instruments, normally after starting the coagulation by desiccating the tissue, it is assumed that,
with a continuously low resistance of less than 50 ohms, an error status results which is indicated by
ERROR 30.
In addition, there are large-area coagulation forceps for which a resistance less than 50 ohms is set, insofar
as the legs are only open to a small degree. If the operating surgeon activates such an instrument with a
small leg opening, ERROR 30 is indicated after approx. 5 seconds and activation is switched off. This error
message is felt to be a nuisance by some operating surgeons. In these particular cases, the ERROR 30 error
message can be switched off on units above Version 2.00 by means of the jumper in position J8. In this case,
at a resistance less than 50 ohms, the output current of the ICC is limited to 1.5 A.

WARNING
For a power setting greater than 20 W, there is a danger of destroying the HF generator after approx. 1
minute during short-circuit operation. There is no warning if the ERROR 30 error message is switched off.
Art. No.: 80116-201
09 / 2004

1 TEST PROGRAMS AND ADJUSTMENTS 49 / 266


Test program no. 16
General description

General description
All adjustment work is performed solely with the help of this test program. Here the sequence from
Adjustment 1 to Adjustment 13 must be followed.
Ending the test is only possible at the setting Adjustment 0 (as of 0 in the display).
If Test program 16 is activated, the test program is automatically called up again if there is a brief power
failure lasting up to approx. 15 seconds. If the power failure lasts longer than 15 seconds, the test program
is no longer automatically called up.
This text describes only the function of the program. The unit is adjusted according to the adjustment
instructions. These adjustment instructions are a component of the service documents.
After starting the test program with key 3, you will see the following display:

Display ICC 350 / 300

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

Ab xx (0 … 13)

xx Adjustment test number (beginning with 0)

Display ICC 200

AUTO CUT AUTO COAG

Ab xx

xx Adjustment test number (beginning with 0)


Adjustment 0 permits entry and exit from Test program 16.

50 / 266 1 TEST PROGRAMS AND ADJUSTMENTS


Test program no. 16
List of individual adjustments

Test program 16: List of individual adjustments

Adjustment Function of the adjustment

1 Phase relationship of the power supply unit

2 Current/voltage setting of the power supply unit

3 Setting of the actuation pulse length for the HF generator

4 Phase relationship of the HF generator

5 Current/voltage setting of the HF generator

6 Current/voltage setting of the amplified measurement values of the HF generator

7 Phase angle setting (cos Phi)

8 Adjustment of the function monitor sensor

9 NESSY adjustment: Contact resistance

10 HF leakage current monitor

11 Starting threshold of the contact monitor

12 Length of actuation pulse and frequency setting of the ST generator

13 LF leakage current measurement and setting help for CF

Using the “Up” (8) and “Down” (9) keys, call up an adjustment test number. Start the adjustment test with
key 3.
Art. No.: 80116-201
09 / 2004

1 TEST PROGRAMS AND ADJUSTMENTS 51 / 266


52 / 266 1 TEST PROGRAMS AND ADJUSTMENTS
Adjustment 1
Art. No.: 80116-201
09 / 2004

1 TEST PROGRAMS AND ADJUSTMENTS 53 / 266


Adjustment 1
Power supply unit phase relationship

Procedure
• Unplug power cable from the ERBOTOM ICC.
• Pull off the black lines on the bridge-connected rectifier BR 1 on the motherboard and connect an
adjustable isolating transformer to BR 1 in its place, the output voltage of which is adjusted to 0 V.
With well prebalanced boards, a transformer with a fixed voltage of approx. 155 V AC can also be
used.

ATTENTION !
For units which are set to 120 V, you must absolutely make certain that the Erbotom ICC is operated via an
isolated transformer. In addition, the connection between J15 and J20 on the motherboard must be removed
from J15.

• Connect 200 ohms load resistance (e.g. APM 600) to MP1 = GND and MP2 on the power module
(slot J5).
• Connect the oscilloscope to MP1 = GND and MP2 = probe on QC power stage end stage (slot J4).
• Plug the power cable for the Erbotom ICC back in and activate Test program 16, Adjustment 1.
• Activate using the yellow pedal on the footswitch (AUTO CUT).
• Slowly increase the output voltage on the isolating transformer. With a correct setting, the voltage
characteristic corresponds to the graph illustrated below, whereby the small dip (approx. 20 V) next
to the square-wave edges represent a good criterion of evaluation for this.
• Set the phase angle using TP13 (control board, slot J3). For the final setting, the square-wave voltage
must be increased to approx. ±100 V. (Display in AUTO CUT approx. 205).
• After the setting is complete, disconnect the ERBOTOM ICC from the power, remove the cable from
the isolating transformer to BR1 and connect the two black lines again to the bridge-connected
rectifier.

Fig.: Voltage characteristic of supply unit power

T
1>

1) Ch 1: 50 Volt 500 ns

54 / 266 1 TEST PROGRAMS AND ADJUSTMENTS


Adjustment 1
Power supply unit phase relationship

ICC 350
ICC 300

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

Ab nPh before activation

U NTG nPh during activation


Art. No.: 80116-201

ICC 200
09 / 2004

AUTO CUT AUTO COAG

Ab nPh before activation

U NTG nPh after activation

• U NTG Power supply unit voltage [V]


• nPh Adjustment of the phase relationship for the power supply unit generator

1 TEST PROGRAMS AND ADJUSTMENTS 55 / 266


56 / 266 1 TEST PROGRAMS AND ADJUSTMENTS
Adjustment 2
Art. No.: 80116-201
09 / 2004

1 TEST PROGRAMS AND ADJUSTMENTS 57 / 266


Adjustment 2
Power supply unit output parameters

Procedure
• Connect 500 ohms load resistance (APM 600) to MP1 = GND and MP2 = +U on “Power Module”
board (slot J5).
• Plug in the power cable on the ICC.
• Call up Test program 16, Adjustment 2.
• Activate ERBOTOM ICC using the yellow footswitch pedal (AUTO CUT).
• Set TP2 on the control board (slot J3) in such a way that 100 W (tolerance +0% / –7%) can be
measured at the HF power meter and a power supply current of 447 mA (tolerance 444...455 mA) is
displayed in the AUTO COAG 1 display. In the AUTO CUT display, a power supply voltage of 223
V (tolerance 223…227 V) is displayed.
• Disconnect the ICC from the power and remove the connecting cable from MP1 and MP2.

ICC 350
ICC 300

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

Ab 2 nUI before activation

U NTG I NTG I NTG V1 nUI during activation

• U NTG Power supply voltage [V]; Set value = 223 V


• I NTG Power supply current [mA]; Set value = 447 mA
• I NTG V1 Amplified power supply current [mA]
• nUI Adjustment of the current voltage setting of the power supply generator

ICC 200

AUTO CUT AUTO COAG

nUI before activation

U NTG I NTG after activation

• U NTG Power supply voltage [V]; Set value = 223 V


• I NTG Power supply current [mA]; Set value = 447 mA

58 / 266 1 TEST PROGRAMS AND ADJUSTMENTS


Adjustment 2
Power supply unit output parameters
Art. No.: 80116-201
09 / 2004

1 TEST PROGRAMS AND ADJUSTMENTS 59 / 266


60 / 266 1 TEST PROGRAMS AND ADJUSTMENTS
Adjustment 3
Art. No.: 80116-201
09 / 2004

1 TEST PROGRAMS AND ADJUSTMENTS 61 / 266


Adjustment 3
Actuation pulse length HF generator

Procedure
• Measure the actuation pulse TS1 on the control board (slot J3) with an oscilloscope at measuring
point MP6 = GND and MP2 = probe tip.
• Switch on the ICC and call up Test program 16, Adjustment 3.
• Using TP14 on the control board (slot J3), set a pulse length of 350 ns.
ATTENTION: Pulse is inverted.
• Disconnect the ICC from the power.
• Remove the probe from MP6 and MP2.

ICC 350
ICC 300

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

Ab 3 thF auto. activated

• thF Pulse length of the HF generator [ms]; Set value = 350 ns

ICC 200

AUTO CUT AUTO COAG

thF auto. activated

• thF Pulse length of the HF generator [ms]; Set value = 350 ns

62 / 266 1 TEST PROGRAMS AND ADJUSTMENTS


Adjustment 3
Actuation pulse length HF generator

5 V/Div

100 ns/Div
Art. No.: 80116-201

Fig.: Transistor switching pulse


09 / 2004

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64 / 266 1 TEST PROGRAMS AND ADJUSTMENTS
Adjustment 4
Art. No.: 80116-201
09 / 2004

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Adjustment 4
Phase relationship HF generator

Procedure
• Switch the ICC back on and call up Test program 16, Adjustment 4.
• With probe 100 : 1, the no-load HF output voltage between the active and neutral electrode must be
measured; for 2 monopolar outputs: Output CUT / COAG 2.
• Activate the ICC using the yellow footswitch pedal (AUTO CUT).
• Observing the output voltage form, increase the power supply voltage in the CUT field (AUTO CUT
display corresponds to the set power supply voltage; AUTO COAG 1 display corresponds to the
actual power supply voltage). Using TP15 on the control board (slot J3), a symmetrical sine-wave
characteristic must be set.
• At a maximum power supply voltage (= 250 V), make the final adjustment. At the same time, set a
good symmetrical sine-wave shape and a minimum power supply current (= display in AUTO BIPO-
LAR field), which means a minimal no-load power loss (see Fig.). CAUTION: The best possible
sine-wave characteristic has priority over the absolute current minimum.

ICC 350
ICC 300

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

U SOLL = 30 V 4 Ph before activation

U SOLL U NTG I NTG V1 I NTG during activation

• U SOLL Set power supply voltage [V]


• U NTG Power supply unit voltage [V]
• I NTG V1 Amplified power supply current [mA]
• I NTG Power supply current [mA]

ICC 200

AUTO CUT AUTO COAG

U SOLL (Start = 30 V) nPh before activation

U SOLL U NTG after activation

• U SOLL Set power supply voltage [V]


• U NTG Power supply unit voltage [V]

66 / 266 1 TEST PROGRAMS AND ADJUSTMENTS


Adjustment 4
Phase relationship HF generator

300 V/Div

500 ns/Div
Art. No.: 80116-201

Fig.: HF no-load voltage


09 / 2004

1 TEST PROGRAMS AND ADJUSTMENTS 67 / 266


68 / 266 1 TEST PROGRAMS AND ADJUSTMENTS
Adjustment 5
Art. No.: 80116-201
09 / 2004

1 TEST PROGRAMS AND ADJUSTMENTS 69 / 266


Adjustment 5
HF generator output parameters

Procedure
• Call up Test program 16, Adjustment 5.
• Connect the HF power meter, e.g. APM 600 (set to 500 ohms) via active cable to active and neutral
electrode output sockets on the ICC; for 2 monopolar outputs: CUT / COAG 2 output and NE socket.
• Activate the unit with the yellow pedal of the footswitch (AUTO CUT).
• Using TP3 on the control board (slot J3), the HF output voltage is set in such a way that a power of
100 watts is indicated on the HF power meter and a value of 223 volts HF effective voltage (tolerance
220…223 volts) in the display on the AUTO CUT field.
• Under certain conditions, TP 4 (HF current limitation) must be turned back far enough before this
setting so that no current limitation is effective.
• Using TP4 on the control board (slot J3), the HF current limitation is set in such a way that a value of
447 mA effective HF current (tolerance 439…447 mA) with constant power output appears in the
AUTO COAG 1 field.
• Insofar as the measurement of the phase angle between HF voltage and HF current produces a value
greater than 98 (which is 100 · cos j) at this setting in the AUTO COAG 2 field, a value of 100 watts
HF power output is displayed (tolerance 97...100 watts) in the AUTO BIPOLAR field after correct
adjustment of voltage and current.
• For the voltage characteristic at a 500 ohms load, see Fig.

ICC 350
ICC 300

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

Ab 5 UI before activation

U HF I HF cos Phi P during activation

ICC 200

AUTO CUT AUTO COAG

UI before activation

U HF I HF after activation

• U HF HF voltage [V]; Set value = 223 V


• I HF Real part of HF current [mA]; Set value = 447 mA

70 / 266 1 TEST PROGRAMS AND ADJUSTMENTS


Adjustment 5
HF generator output parameters

100 V/Div

Fig.: HF voltage at
R = 500 ohms
Art. No.: 80116-201

500 ns/Div
09 / 2004

• cos Phi Phase angle 0…100*) Set value = 100


•P Emitted active power [W]; Set value = 100 watts at 500 R
cos-j display, when the “Up” (8) key is pressed.
P display, when the“Down” (9) key is pressed.

*)To avoid decimal places, the value of the table value of cos j is indicated times 100, such that 100 means cos j = 1.

1 TEST PROGRAMS AND ADJUSTMENTS 71 / 266


72 / 266 1 TEST PROGRAMS AND ADJUSTMENTS
Adjustment 6
Art. No.: 80116-201
09 / 2004

1 TEST PROGRAMS AND ADJUSTMENTS 73 / 266


Adjustment 6
HF generator output parameters amplified

Procedure
• Call up Test program 16, Adjustment 6.
• With the same setup as for Adjustment 5, the unit is activated. At the same time, 5 watts (tolerance
4.5…5.5 watts) should be output at the HF power meter.
• Using TP 5 on the control board (slot J 3), the amplified HF voltage measurement is set in such a way
that a value of 50 volts HF output voltage is displayed in the AUTO CUT field.
• Using TP 6 on the control board, the amplified HF current measurement is set. The value 100 mA Hf
output current is displayed in the AUTO COAG 1 field when set correctly.
• In the Auto Bipolar field, the emitted active power is displayed.
• In the Auto Coag 2 field, the phase angle cos j is displayed.

ICC 350
ICC 300

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

Ab 6 UI before activation

U HF I HF cos Phi P during activation

ICC 200

AUTO CUT AUTO COAG

UI before activation

U HF I HF after activation

• U HF HF voltage amplified [V]; Set value = 50 V


• I HF Real part of the amplified HF current [mA]; Set value = 100 mA
• cos Phi Phase angle 0…100 from the table Set value = 100
•P Emitted active power [W]; Set value = 5 watts at 500 R
ICC 200:
cos-j display appears when the “Up” (8) key is pressed.
P-display appears when the “Down” (9) key is pressed.

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Adjustment 6
HF generator output parameters amplified
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Adjustment 7
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Adjustment 7
Phase angle (cos j)

Procedure
• Call up Test program 16, Adjustment 7.
• Using ERBE original cable, connect the APM 600 (set at 500 ohms) to the ICC; with 2 monopolar
connections: Connect active output socket: CUT / COAG 2 (ICC 300 / 350) and NE socket.
• Connect a capacitor with 1 nF (e.g. ERBE component no. EE 51103-026) with short lines across the
active electrode and NE sockets on the HF power meter.
This produces a phase shift between voltage and current of 45° at a frequency of 340 kHz.
• Activate the cut footswitch.
• Using TP 7 on the control board (slot J3), the unit is set in such a way a value of 73 (display is
100 · cos j) is displayed in the AUTO CUT field and a value of 120 (analog / digital converter
measured value) is displayed in the AUTO COAG 1 field.

ICC 350
ICC 300

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

Ab 7 PHI before activation

COS xxx PHI during activation

ICC 200

AUTO CUT AUTO COAG

PHI before activation

COS xxx after activation

• COS cos-j values from table; Set value = 73


0 means phase shifting = 90°
100 means phase shifting = 0°
• xxx Analog cos-j measurement value; Range 0…255
• Veff HF output voltage;
200 mA output current limitation

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Adjustment 7
Phase angle (cos j)
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Adjustment 8
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Adjustment 8
Spark monitor

Procedure (also applies to the units without HIGH CUT or ENDO CUT)
• On the ICC 300 and ICC 200 without ENDOCUT, TP8 should be set to the upper limit (to do this,
turn TP8 clockwise).
• Call up Test program 16, Adjustment 8.
• A DC voltage of 70 volts is fed into the patient circuit between the center control for the active AE
socket (with 2 monopolar outputs: Output CUT / COAG 2) and the neutral electrode NE socket (AE =
+, NE = –). To do this, the ERBE TESTBOX 70 volts is recommended (ERBE Order no. 20100-019).
• Adjust TP8 on the control board (slot J3) is set in such a way that a measurement value of 77 is
indicated for the A/D converter, and a value of 70 volts DC is displayed in the AUTO COAG 1 field.
On the ICC 200 ENDOCUT, this value appears in the AUTO CUT field, while the A/D converter
value is not shown.

ICC 350

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

xxx yyy FU Standby

ICC 200 ENDO CUT

AUTO CUT AUTO COAG

yyy FU Standby

• yyy Fed-in DC voltage for the spark measurement value (70 V)


• xxx Analog spark measurement value
The input for applying the test DC voltage is the CUT / COAG 2 socket.

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Adjustment 8
Spark monitor
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Adjustment 9
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Adjustment 9
NESSY resistance measurement

Procedure
• Call up Test program 16, Adjustment 9.
• Connect an NE cable to the NE input receptacle on the ICC system.
• Connect the other end of the NE cable between 120 ohms of resistance.
• Set TP9 on the control board (slot J3) in such a way that a measurement value of 200 for the A/D
converter is displayed in the AUTO CUT field and a resistance of 120 ohms is displayed in the AUTO
COAG 1 field.
• Now exchange the terminating resistor for a resistance value of 40 ohms. Now verify the measurement
at this resistance; a resistance of 40 ohms (tolerance 37...43 ohms) must be displayed in the AUTO
COAG 1 field.

ICC 350
ICC 300

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

xxx R üb r Standby

ICC 200

AUTO CUT AUTO COAG

xxx R üb Standby

• R üb Contact resistance at the neutral electrode [W]


• xxx Analog measurement value of the contact resistance.
For resistance values outside the measurement accurary, the display --- appears.

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Adjustment 9
NESSY resistance measurement
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Adjustment 10
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Adjustment 10
HF leakage current measurement

Procedure (This adjustment only applies to the ICC 350)


• Call up Test program 16, Adjustment 10.
• Connect the HF power meter (set to 350 ohms load resistance) between the active electrode of the
CUT / COAG 2 (center) socket and the potential equalization.
• Jumper J3 must be plugged into the display board for this adjustment (earthed reference).
• Short together the NE-ERBE original adapter cable. Activate the ICC 350 using the blue footswitch
pedal (AUTO COAG 1).
• Using the power setting in the AUTO COAG 1 field, set the leakage current flowing to ground to a
value of 150 mAeff (tolerance 131…169 mA) (use an HF effective current meter or set a power of 7.9
watts at a HF power meter with a load resistance of 350 ohms [tolerance 6.0…10 watts (from P = I² · R
with P = 7.9 watts and R = 350 ohms is a current I = 150 mA)]).
• Set TP10 on the control board (slot J3) in such a way that the HF leakage alarm is thus displayed
visually (the LED in the safety field flashes in the display indicates the value 50 in the Auto Cut
field).
• Increase the leakage current by changing the power setting until an audible alarm is also emitted.
This should occur at 300…350 mA (accordingly 31.5…43 watts on a HF power meter at the above
setting).

ICC 350

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

xxx ppp HFL Standby

• ppp Set SOFT COAG power which can be changed during activation.
• xxx Measurement value of the HF leakage current measurement.
Using the power setting in the AUTO COAG 1 field, set the HF leakage current flowing to ground at
Ieff = 150 mA. This is not assigned for the ICC 200 and 300 since no HF leakage current monitor is
available there.

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Adjustment 10
HF leakage current measurement

ICC APM 600


AE NE
AE
Potential equalization
NE cable with pin NE
short-circuit

I
3 m cable HF leakage
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Adjustment 11
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Adjustment 11
Contact monitor

Procedure
• Call up Test program 16, Adjustment 11.
• At the BIPOLAR output of the ICC, the ERBE bipolar Testbox for the bipolar automatic starter (EE
20100-017 ) or appropriate fixed resistors (1.2 kOhm and 2.5 kOhm with a capacity of 15 watts as
well as 18 kOhm, 1 watt) is connected via the EE bipolar original cable.
• With a resistance of 2.5 kOhm (socket 1–2), a value of 25 must be displayed in the AUTO CUT field.
(Display = resistance divided by 100). The setting of the switch-on threshold with PT11 on the PCB
control board (slot J3) proceeds in such a way that, at a load resistance of 2.5 kOhm, the display in
the AUTO COAG 2 field changes from “OFF” to “ON”.
• Now the short-circuiting monitor is set by connecting a 6 ohm resistor (capacity = 0.5 watts) to the
BIPOLAR outlet. Then, the display »rLo« appears on the AUTO COAG 1 display. Using TP12 on the
PCB control board J3, the display is set to a measurement value of 100 in the AUTO CUT display.
• Testing the shutdown response: To do this, exit Test program 16 briefly by selecting Test program 0.
The ICC operates in the normal mode. Switch on AUTO START 1. Set the bipolar power to 1 watt.
The BIPOLAR outlet is connected to sockets 1 and 3 on the ERBE Testbox and thereby charged with
1.2 kOhm. The BIPOLAR generator must automatically be activated after the delay time. Now press
pushbutton 1 on the Testbox. This raises the capacity resistance to 18 kOhm. The BIPOLAR generator
must now shut down.
• This test must be repeated at the power settings 20 watts, 40 watts, 50 watts (or without AAMI
standard up to 120 watts).

ICC 350
ICC 300

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

uuu OFF br open output

rda ON br loaded output

iii rLo br loaded output

ICC 200

AUTO CUT AUTO COAG

uuu OFF open output

rda ON loaded output

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Adjustment 11
Contact monitor
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09 / 2004

• uuu Standby measurement value of the contact monitor at a preset bipolar power of 10 watts
• rda Calculated contact resistance at activation [W/100]
• iii Amplified output current at contact resistance < 1 kW
• rLo Display if resistance measured at activation < 1 kW

1 TEST PROGRAMS AND ADJUSTMENTS 95 / 266


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Adjustment 12
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Adjustment 12
Pulse/pause length ST output stage

Procedure
• Call up Test program 16, Adjustment 12.
• Measure actuation impulse TSI_STE at measuring point MP 3 on ST output stage (slot J6) with the
oscilloscope (measuring point MP1 = GND).
• Using TP16, set this to a pulse length of 200 ns (±50 ns).
IMPORTANT! The pulse time is measured at average amplitude, i.e. at approx. 7.5 volts level.
ATTENTION! The pulse is inverted.
• The repetition frequency at TP17 is set in such a way that the value 0 (tolerance 0...4) is displayed in
the AUTO CUT field.
• Now exit the test program and return the ICC to normal operating condition.
• To check the performance, connect the HF output to the HF power meter, setting 500 ohms.
• Activate the ICC using the blue footswitch pedal at the SPRAY and FORCED normal settings. The
power output in watts should correspond to the display in the AUTO COAG 2 field.
• Check whether the maximum emitted output power with SPRAY and FORCED is within the tolerance
limits (120 W ± 15 %). If necessary, conform the pulse length to the PCB control board using TP16.
TP17 must no longer be changed.

ICC 350
ICC 300

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

xxx ppp tSt Standby

ICC 200

AUTO CUT AUTO COAG

xxx tSt Standby

• ppp Set AUTO COAG 2 FORCED power


• xxx Difference = Set frequency minus actual frequency

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Adjustment 12
Pulse/pause length ST output stage

5 V/Div

50 ns/Div
Fig. : Transistor switching pulse ST
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output stage
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Adjustment 13
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Adjustment 13
LF leakage current monitor (ICC 350 only)

Procedure
• Call up Test program 16, Adjustment 13.
• Set the jumper to the “capacitance grounded” operating mode (place jumper J3 on display board).
• Perform adjustment using ERBE TESTBOX 2 or another 50 Hz sine-wave current source.
• Between the neutral electrode output and the potential equalization, feed a 50 Hz sine-wave current
of 45 µA (see Figure).
• Using TP1 on the motherboard, set the leakage current monitor in such a way that the display in the
AUTO CUT field changes just from 0 to 1 at 45 µAeff.
Reset jumper to previous condition.

ICC 350

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

x I nF Standby

•x x = 0 for LF leakage current < 50 µA


x = 1 for LF leakage current > 50 µA.
For adjustment, the test current must be fed according to the instructions.
Adjustment 13 is not assigned on the ICC 300 and ICC 200.

Measurement setup

Battery-powered
measurement unit
only!

INF
+

ICC ERBE
Power
Testbox 2 18
AE NE N supply
LI
110 V
PE 115 V
19 230 V

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Adjustment 13
LF leakage current monitor
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TP1

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104 / 266 1 TEST PROGRAMS AND ADJUSTMENTS
Adjustment of
ICC 350 ZMK Neurotest
Version V2.00
ICC 350 TUR Neurotest
Version V2.00
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1 TEST PROGRAMS AND ADJUSTMENTS 105 / 266


Adjustment of Neurotest
board
Neurotest board
EE 30128-070
Jumper JP4 on the front panel is used to activate the display of the feedback frequency of output current
measurement and display of the feedback frequency of the remote control are activated.

ATTENTION
On the ZMK version, there is a display only during activation and if the Neurotest circuit is closed. On the
TUR version there is a display as soon as the NT LED lights up on the remote control.

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

SPH Intensity no. Frequency measurement Current measurement

SPH: The Neurotest program is activated.


Intensity no. Set intensity number is 1…5. It corresponds to the intensity number which has been set
on the remote control.
Frequency measurement Measurement of feedback frequency of the remote control.
Current measurement Measurement of feedback frequency of the output current measurement.

Setting the feedback frequency of output current measurement


(trimming potentiometer TP 1: Setting the feedback frequency)
The Neurotest board is isolated and actuated via optocoupler. The feedback frequency of the output current
measurement also takes place via an optocoupler. The output current pulse is converted into a frequency.
This frequency can be measured at test point MP7. Test point MP6 is reference ground. Test points MP6 and
MP7 relate to the electronic circuitry of the ICC unit. Without activation, the feedback frequency is 0 Hz.
After the pulse time, the feedback frequency is only available at MP7 for a brief period.

Test setup
At the Neurotest output, connect up a test resistor of 1 kOhm, 0.5 W and 1%. On the TUR version, the
Neurotest output is between the neutral electrode and the CUT/COAG 2 output. The TUR version is activated
with the yellow pedal of the dual-pedal footswitch. On the ZMK version the Neurotest output is between the
neutral electrode and the Neurotest output. The ZMK version is activated with the ZMK fingerswitch.

The setting is performed at intensity 3. For this setting the set feedback frequency must be adjusted to 73. If
the electronic fuse trips, the display of feedback frequency is approx. 40.

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Adjustment of Neurotest
board
Neurotest board
EE 30128-070

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

Current measurement

Set Min. Max.

SPH 1 52 42 75

SPH 2 91 81 100

3
SPH 73 63 83
(Set value 73)

SPH 4 64 54 74

SPH 5 59 49 69

ATTENTION!
Don't forget to remove the jumper!

Check the fusible link for correct rating


F1: Microfuse FF 1/16 /125 V (62 mA), Wickmann Type 19278K

High-voltage test
The high-voltage test is conducted according to the specifications in the test record.
Testing the activation signals
The TUR version is activated with the yellow pedal of the double-pedal footswitch. The ZMK version is
activated with the ZMK fingerswitch.

Performance test on the constant-current circuit


A test resistor of 1k, 0.5W and 1% and a rotary potentiometer of 50k 0.3W are connected in series at the
Art. No.: 80116-201

Neurotest output. Measure the square-wave voltage on the 1k test resistor. (1mA corresponds to 1V) The
tolerance range of output currents is +25% to –25%. Larger deviations generate an output error display.
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Adjustment of Neurotest
board
Neurotest board
EE 30128-070

Square-wave output peak current Control range of constant-current source

SPH 1: 5 mA 0R…approx. 20 kOhm

SPH 2: 10 mA 0R…approx. 10 kOhm

SPH 3: 15 mA 0R…approx. 6 kOhm

SPH 4: 20 mA 0R…approx. 5 kOhm

SPH 5: 25 mA 0R…approx. 4 kOhm

Testing the constant-current source


Slowly set the rotary potentiometer higher from 0R. At a total resistance of approx. 6 kOhm, there is an
output error display. At approx. 6 kOhm, the output current is constant.

Performance test on output error monitoring.


• At the Neurotest output connect a test resistor of 1 kOhm, 0.5 W and 1%.
• Set SPH 1.
• Activate the unit. When the circuit is interrupted there will be an output error message.

Performance test on the electronic fuse


The output current is monitored constantly. In the event of an excess dose, the electronic fuse trips and via
longitudinal transistor T3 switches off the constant-current source supply voltage. The electronic fuse is
monitored in the interval between the pulses. If the electronic fuse has tripped, this is indicated by the
message ERROR 90 or ERROR 84.
• To trip the electronic fuse: Activate the Neurotest function and briefly connect test point MP9 to MP2.
The electronic fuse should respond. The microfuse must not trip.

General information about the self-check


Before activation, or when setting the intensity on the remote control, there is a check on the electronic fuse
in two steps.
1. Briefly switch on transistor T1 and thus trip the electronic fuse. There is a message ERROR 90 or
ERROR 84 if the electronic fuse has tripped.
2. Briefly switch on transistor T2 and thus reset the electronic fuse. There is a message if the electronic
fuse has not been reset.

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Adjustment of Neurotest
board
Neurotest board
EE 30128-070
Activation test
Activation of the HF LED on the remote control takes place at intensity setting 0 using the rotary switch on
PC board EE 30121-442. At an intensity setting of 1 to 5 the NT LED is actuated by the CPU and the HF
LED must not light up. On the TUR version a check must be performed as to whether activation of the HF
is inhibited when intensity of 1 ... 5 is set. On the ZMK version, activation of the HF is possible even if
intensity 1 ... 5 has been set.
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Adjustment of
remote control for
Neurotest
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Adjustment of
remote control for Neurotest
Neurotest board
EE 30121-442
Setting the remote control for Neurotest board EE 30121-442
Jumper JP4 on the front panel is used to activate the display of the feedback frequency of output current
measurement and display of the feedback frequency of the remote control are activated.

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

SPH Intensity no. Frequency measurement Current measurement

ATTENTION!
On the ZMK version, there is a display only during activation and if the Neurotest circuit is closed. On the
TUR version there is a display as soon as the NT LED lights up on the remote control.

SPH: The Neurotest program is activated.


Intensity no. Set intensity number is 1…5. Corresponds to the intensity number
which has been set on the remote control.
Frequency measurement Measurement of feedback frequency of the remote control.
Current measurement Measurement of feedback frequency of the output current measurement.

Setting the feedback frequency for intensity setting


(trimming potentiometer TP 1: Setting feedback frequency)
The intensity setting is converted to a frequency. This frequency can be measured at Pin 1 AD654 on IC1.
Test point MP6 is reference ground. Frequency is measured using a frequency meter. The setting takes
place at intensity 5 - for this setting the set feedback frequency is adjusted to 38.0 Hz (–0.5 Hz, +0.0 Hz) on
the frequency meter.

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

Frequency measurement Currency [Hz]

Set Min. Max. Set Min. Max.

SPH 1 7 5 10 200 180 215

SPH 2 14 11 20 105 80 120

3
SPH 24 21 28 62 57 67
(Set value 73)

SPH 4 32 29 36 45 43 49

SPH 5 38 37 60 38 37 40

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Adjustment of
remote control for Neurotest
Neurotest board
EE 30121-442
ATTENTION!
Don’t forget to remove the jumper.

Setting the feedback frequency for intensity adjustment can also be performed without the ICC unit by
supplying +15 V to the remote control and measuring the feedback frequency using the frequency meter.

High-voltage test
The high-voltage test is performed using the specifications in the test record.

Testing the LED display


Actuation of the HF LED is conducted at intensity setting 0 using the rotary switch PC board on EE 30121-
442. At an intensity setting of 1 to 5, the NT LED is actuated by the CPU and the HF LED must not light up.
The NT LED only lights up when the feedback frequency is in the valid range. Check intensity setting 1…5.
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114 / 266 1 TEST PROGRAMS AND ADJUSTMENTS
Adjustment of
activation
and instrument detection
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1 TEST PROGRAMS AND ADJUSTMENTS 115 / 266


Adjustment of activation
and instrument detection
MIC board 30128-200 (V4.0)

List of units involved


ICC 350 MIC-MIEN V4.0 EE 10128-080
ICC 350 MIC-MIEN-DOKU V4.0 EE 10128-081
ICC 350 MIC-MIEN F V4.0 EE 10128-082
ICC 350 MIC-MIEN Int. V4.0 EE 10128-083
ICC 350 MIC-MIEN Int UL V4.0 EE 10128-215
ICC 350 MIC-MIEN Japan, 100V V4.0 EE 10128-310
Identification of the trimming potentiometers:
Trimming potentiometer TP 1: setting the instrument detection.
Trimming potentiometer TP 2: setting the activation detection.

Valid instrument number

Program no. Instrument Resistance Instrument no.

12 MIC TEM instrument EE 20191-275 10 Ohm ± 1 %; 0,2 W 1

13 MIEN Probe EE 20191-356 30 Ohm ± 1 %; 0,2 W 2

13 MIEN Probe EE 20191-357 30 Ohm ± 1 %; 0,2 W 2

The probes of no. 2 are only suitable for coagulation and CUT remains inhibited.

Display of instrument number

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

Inr. Nr. p3 nd

Inr. Instrument recognized


No. Instrument number
p3 Power setting AUTO COAG 2
–nd Compressed air valve for needle control is actuated (only MIC)
nd Compressed air valve for needle control is not actuated (only MIC)

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Adjustment of activation
and instrument detection
MIC board 30128-200

Setting the instrument detection


• The setting takes place in program 12 MIC.
• Connect a resistor of 51 R, ± 1% and 0.2W to the test line.

ATTENTION!
The original ERBE TEM connecting cable EE 20192-086 has a cable impedance of 1 Ohm per cable, which
produces a series resistance of 2 Ohms for the instrument detection. In the line to and from the unit the
instrument test line must have a series resistance of < 0.5 Ohm. Since on the V4.00 version only the TEM
instrument no. 1 and MIEN probe no. 1 are connected up, it is sufficient to perform the balance only for
these instruments.

With jumper JP4 on the front panel the measurement display is activated.

Measurement display

AUTO CUT AUTO COAG 1

I measurement I no.

I-measurement Measurement of instrument detection 0…255


I-No. Instrument number
Using trimming potentiometer TP 1, set I measurement to 52 (resistance of 51 R ± 1%; 0.2 W).

Testing the instrument detection

Detection resistance Instrument no. Valid range

0R 0 0…2

10 R 1 3…20
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30 R 2 21…45
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51 R 3 set value 52

62 R 4 70…91

1 TEST PROGRAMS AND ADJUSTMENTS 117 / 266


Adjustment of activation
and instrument detection
MIC board 30128-200

Setting of activation detection


Set the trimming potentiometer TP 2 to approximately the center position.

ATTENTION!
Never forget to remove jumper JP4.

Test instructions for program 12 MIC


• Assignment of MIC output socket for the MIC program:
Pin 1: NE 1
Pin 2: NE 2 not assigned
Pin 3: CUT cutting function
Pin 4: Instrument detection between Pin 1 and Pin 4
Pin 5: Activation detection between Pin 1 and Pin 5
• Set and test instrument detection and activation detection:
Test instrument detection together with the TEM instrument EE 20191-275 and connecting cable EE
20192-086 in the MIC program.
• Connect up the compressed air supply:
The MIC output socket is active in the MIC program. Connect up to the compressed air supply (max.
5 bar). Connect up 10 Ohm detection resistor corresponding to TEM instrument no. 1.
• Test CUT function:
The CUT function is activated with the yellow footswitch.

MIC socket AUTO CUT APM P [Watt]

NE1 Effect 3
500 Ohm 40 ± 15 %
CUT 40 W

ATTENTION!
The measuring system will be damaged beyond repair if the HF lines are connected up to the APM incorrectly.

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Adjustment of activation
and instrument detection
MIC board 30128-200

The output error display is activated at 40 W and 500 Ohm. Activation of the BIPOLAR CUT function
is also possible without the neutral electrode.
• Compressed air control
At instrument 1 the compressed air valve is opened during CUT activation. The compressed air valve
controls the needle of the TEM instrument. After activation the needle reset time elapses. After needle
reset time has elapsed the compressed air valve closes and the needle is reset. Needle reset time is
indicated in test program 23. Check the compressed air valve to make sure that it operates properly
and to ensure there are no leaks.
• Check monopolar coagulation
Activation of the SOFT function and the FORCED function is performed using the blue footswitch.

MIC socket AUTO COAG 2 APM P [Watt]

SOFT 120 Watt 75 Ohm 120 ± 15 %


NE1
ICC 350 NE Electrode
FORCED 60 Watt 350 Ohm 60 ± 15 %

Test instructions for program 13 MIEN


• Assignment of the MIC output socket for the MIEN program
Pin 1: NE 1 bipolar
Pin 2: CUT and COAG function bipolar. (MIEN protective circuit).
Pin 3: not assigned
Pin 4: Instrument detection between Pin 1 and Pin 4
Pin 5: Activation detection between Pin 1 and Pin 5

• Test instrument detection.


Test instrument detection together with the MIEN probe EE 20191-305/308 and handlepiece EE
20191-306 in the MIEN program.
Art. No.: 80116-201

• Test bipolar CUT function


09 / 2004

The CUT function is activated using the yellow footswitch.

ATTENTION!
The measuring system will be damaged beyond repair if the HF lines are connected up to the APM incorrectly.

1 TEST PROGRAMS AND ADJUSTMENTS 119 / 266


Adjustment of activation
and instrument detection
MIC board 30128-200

MIC socket AUTO COAG 2 APM P [Watt]

Effect 3
NE1 CUT 500 Ohm 15 ± 3 (W)
15 Watt

The output error display is activated at 40 W and 500 Ohms. Activation of the bipolar CUT function is also
possible without the neutral electrode.
• Test bipolar SOFT coagulation
The SOFT function is activated with the blue footswitch.

MIC socket AUTO COAG 2 APM P [Watt]

500 Ohm
NE1 CUT SOFT 15 Watt 7 ± 2 (W)
No-load voltage 84 ± 5 Vp

• Test the protective circuit with test program 18


In the event of an error, the protective circuit in the MIEN program prevents an overdose of HF
voltage and HF current. If the output current is too high, the fusible link in the protective circuit trips.
The test checks whether the correct fuse is inserted. The manufacturer of the fuse and the fuse rating
can be found in the parts list.
• Testing the voltage limitation with no load
Activate test program 18.
In the AUTO CUT display panel the set value of HF output voltage is displayed. With the CUT “Up/
Down” buttons, the HF output voltage can be adjusted in the range from 260Vp to 500 Vp (±50Vp).
Connect oscilloscope to the MIC output socket NE1 and CUT.
The highest HF peak voltage at the AUTO CUT Effect 3 (15 W) setting is 340 Vp. At this voltage the
protective circuit must not yet impose any limitation.
The protective circuit limits the output voltage from 360 Vp upward. Range in which the limitation
must be activated: 360–450 Vp.
At the setting of 499 Vp the fuse will not trip and the operability of the protective circuit remains
intact.

ATTENTION!
As soon as the voltage limitation is activated, current flows through the protective diodes and the diodes heat
up. The duration of the test from the moment of voltage limitation must not exceed 5 seconds or else the
protective diodes break down and the circuit will have to be repaired.

120 / 266 1 TEST PROGRAMS AND ADJUSTMENTS


Adjustment of activation
and instrument detection
MIC board 30128-200

Voltage limitation at setting of 415 V p.


ATTENTION! The test duration must
not exceed 5 seconds!

Voltage limitation at setting of 499 V p.


ATTENTION! The test duration must
not exceed 5 seconds!
Art. No.: 80116-201
09 / 2004

1 TEST PROGRAMS AND ADJUSTMENTS 121 / 266


122 / 266 1 TEST PROGRAMS AND ADJUSTMENTS
Test program no. 17
Brightness setting of the 7-segment displays

General description
Using this program, you can adapt the brightness of the 7-segment displays in 10 stages to the lighting
conditions of the room.
After starting the test program, you will see the following display:

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

Int xx

• Int Intensity (brightness) of the displays


• xx Present intensity, adjustable from 1...10.
You can make the intensity brighter using the “Up” (8) key or darker using the “Down” (9) key.
After termination of the test program, store the brightness setting with key 3.
Art. No.: 80116-201
09 / 2004

1 TEST PROGRAMS AND ADJUSTMENTS 123 / 266


Test program no. 23
Changing the delay time with
AUTO START

General description
Using this program, you can change the specifications for the delay time when activating AUTO START.
The delay time is the time which passes after the forceps contacted the tissue and the HF generator is
actuated.
So that the operating surgeon can know whether the forceps have contacted the tissue, the AUTO BIPO-
LAR activation display (blue triangle in the AUTO-BIPOLAR field) switches on at contact. Then the delay
time starts. After the delay time has passed, the HF generator and the activation tone are switched on.
In case of error in the memory medium, the following basic settings have been preset:
ICC 350 and ICC 300: AUTO START 0: 0 seconds,
AUTO START 1: 0.5 seconds,
AUTO START 2: 1 second;
ICC 200: AUTO START: 0.5 seconds.
After starting Test program 23, you will see the following display:

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

SEt Up tt.t

Time setting
Possible from 0.1 to 10 seconds in the following time steps:

from 0.1 to 2.0 seconds in 0.1 seconds steps


from 2.0 to 10.0 seconds in 0.5 seconds steps.

Procedure for ICC 350

AUTO START Setting range

0 0 greater than/equal to t greater than/equal to 1

1 1 greater than/equal to t greater than/equal to 2

2 2 greater than/equal to t greater than/equal to 10 seconds

You can set and store the delay time for every user-specific program 0 to 9 and for every AUTO-START
time (0, 1 and 2).
Since the AUTO-START time 0 can be no longer than AUTO-START time 1, it is best to proceed from the
longest time for AUTO START 2 and then set the times for AUTO START 1 and AUTO START 0.

124 / 266 1 TEST PROGRAMS AND ADJUSTMENTS


Test program no. 23
Changing the delay time for
AUTO START

NOTE
You will find the assignment of keys with the numbers given below on pages 1-4 (Calling up of the test
program mode) of this Service Manual.

1. Using key 2 Set program number


2. Using key 14 Set AUTO START 2
3. Using “Up” or “Down” key Set the required time
4. Using key 14 Set AUTO START 1
5. Using “Up” or “Down” key Set the required time
6. Using key 14 Set AUTO START 0
7. Using the “Up” or “Down” key Set the required time
8. Using key 1 Store the set values.
Steps 1 to 8 can be repeated individually for every required program.
Then exit the test program using key 3.

Procedure for ICC 300

AUTO START Setting range

0 0 greater than/equal to t greater than/equal to 1

1 1 greater than/equal to t greater than/equal to 2

2 2 greater than/equal to t greater than/equal to 10 seconds

For every AUTO START time (0, 1 and 2), you can set and store a delay time. Since the AUTO-START time
0 cannot be any longer than the AUTO-START time 1, it is best to proceed from the longest time for AUTO
START 2 and then set the times for AUTO START 1 and AUTO START 0.
1. Using key 14 Set AUTO START 2
Art. No.: 80116-201

2. Using the “Up” or “Down” key Set the required time


09 / 2004

3. Using key 14 Set AUTO START 1


4. Using the “Up” or “Down” key Set the required time
5. Using key 14 Set AUTO START 0
6. Using the “Up” or “Down” key Set the required time
7. Using key 3 Exit the test program and the set values
are stored.

1 TEST PROGRAMS AND ADJUSTMENTS 125 / 266


Test program no. 23
Changing the delay time for
AUTO START

Procedure for ICC 200

AUTO CUT AUTO COAG 1 AUTO COAG 2 AUTO BIPOLAR

SEt Up tt.t

For the AUTO START function, you can set and store a delay time.
1. Using the “Up” or “Down” key Set the required time
2. Using key 3 The set values are stored and the test program is
exited.

126 / 266 1 TEST PROGRAMS AND ADJUSTMENTS


Chapter 2
ERROR list
ERROR list V 4.X
ERBOTOM ICC 350 (V4.0, V2.0), ICC 300 (V3.0),
ICC 200 (V2.0)

Automatic error detection, indication and documentation


ERBOTOM ICC series high-frequency surgical units are equipped with a device for automatic error detection,
indication and documentation (ERROR monitor).
Error detection, indication, documentation
For ERBOTOM ICC series equipment as of software version 2.0 / 4.0, the ERROR monitor can, depending
on the type of equipment and its outfit, detect up to 91 currently occurring errors (ERROR) and indicate them
on the display.
Error numbers (ERROR nos.) are assigned to the various errors. If an error is detected, it is immediately
reported. The error report is both visual and audible.
The error numbers of detected errors are automatically stored chronologically. Since only 10 memory locations
are available, only the last 10 error messages are displayed. If the same error is detected several times in a row,
the corresponding error number is then saved only once in consideration of the limited number of available
memory locations. The error numbers documented in memory can be displayed via Test program 2 and
deleted.

Troubleshooting for ICC family equipment


The ICC unit family is equipped with an error detection system which detects and stores the last 10 errors
detected in an ERROR list. This error memory can be called up via Test program no. 2. The user should thus
be capable of localizing errors himself and deciding whether this is an operating error or an error in the
accessories, which he can possibly eliminate himself, or whether it is necessary to make use of the technical
service.
If there is a complete failure of the system and no display is visible, the power supply may have been
interrupted or the voltage supply inside the unit is defective. In such a case, first check whether the outlet
used is live or a fuse in the house power supply has been tripped (Does a different unit function at this
outlet?). If the outlet used is live, check the powerline to the unit and replace if necessary. The equipment
fuses on the rear panel should also be checked and replaced if necessary.

ATTENTION!
Only use original fuses of the same specification.

If these efforts bring no results, there is probably an error within the unit. You should then contact the
Art. No.: 80116-201

technical service.
For a malfunction with a properly functioning display but with no indication of an ERROR number in the
09 / 2004

display, the error may be located in defective accessories. It is possible, for example, that there may be a
defect in the fingerswitch or footswitch, or a disruption in the associated connecting cable. The cause of the
error may be determined by exchanging the accessories used.
To determine other causes of errors, an ERROR number in the unit display indicates the course of further
action according to the following table.

2 ERROR LIST 129 / 266


ERROR no. 1–13

Error
no. Designation and remedies

No HF voltage present at the HF voltage sensor. Error in the HF generator.


1 Short circuit in accessories: Replace accessories.
Other equipment error: Technical Service.
HF output voltage too high, error in the HF generator.
2
Equipment error: Technical Service.
The switched-mode power supply unit supplies no voltage during activation, error in the
3 switched-mode power supply unit.
Equipment error: Technical Service.
The switched-mode power supply unit supplies too high a voltage upon activation of the ST
4 generator, error in the switched-mode power supply unit.
Equipment error: Technical Service.
LF leakage current is > 50 µA and flows into the unit via the neutral electrode.
Check positioning of the patient, whether there is contact with the infusion stand or the like.
5
Other defective equipment connected to the patient?
Are the potential equalization and grounded conductor OK?
During the activation phase, the safety shutoff feature output reports "ON".
6
Equipment error: Technical Service.
During the activation phase, the safety shutoff feature output reports "OFF".
7
Equipment error: Technical Service.
8 not assigned
Maximum continuous time limit exceeded.
9 Only activate the unit if necessary. The time limit monitor is a safety feature and should
generally only be increased with a strict indication using Test program 10 in the setup.
Error during activation of the AUTO CUT, no valid front panel setting.
10
Confirm control panel by pressing a key. Select required power setting.
Error during activation of AUTO COAG 1 or AUTO COAG 2, no valid front panel setting.
11
Confirm control panel by pressing a key. Select required power setting.
Error during activation of AUTO BIPOLAR, no valid front panel setting.
12
Confirm control panel by pressing a key. Select required power setting.
Error during activation of AUTO CUT:
- NESSY: measured NE impedance is > 120 ohms.
- Using Test program no. 7, split electrodes were set: NE impedance < 10 ohms.
13
Check NE cable.
Check NE contact surface: Short circuit? Is NE stuck to metal?
If necessary, set required neutral electrode using Test program 7.

130 / 266 2 ERROR LIST


ERROR no. 14–22

Error
no. Designation and remedies

14 (not assigned)

15 (not assigned)

16 (not assigned

Error during activation. HF leakage current > 300 mA.


17 Check position of the patient: Contact points with infusion stand or the like.
Otherwise equipment defect: Technical Service.
Error during activation. 150 mA < HF leakage current < 300 mA.
18 Check position of the patient . Eliminate contact points with infusion stand or the like.
Otherwise equipment defect: Technical Service.
Error during activation of AUTO CUT and AUTO COAG: NESSY current density error.
Check NE cable for interruption.
19
Check contact surface and application point of the NE.
Otherwise equipment defect: Technical Service.
For AUTO CUT and AUTO COAG: NESSY current symmetry error.
Variably high current flowing into the joint phases of the NE.
20
Check cable to the NE (interruption).
Check NE contact surface.
Current symmetry error.
21
Art. No.: 80116-201

See ERROR 20.


When switching on the power, AUTO CUT is switched on.
09 / 2004

Activate unit only after switching on power. Check fingerswitch and footswitch as to whether a
22
key or pedal is stuck or the switch is defective.
Otherwise equipment defect: Technical Service.

2 ERROR LIST 131 / 266


ERROR no. 23–33

Error
no. Designation and remedies

Switch on the power, AUTO COAG 1 is switched on.


Activate unit only after switching on power. Check fingerswitch and footswitch as to whether
23
key or pedal is stuck or switch is defective.
Otherwise equipment defect: Technical Service.
When switching on the power, AUTO COAG 2 is switched on.
Activate unit only after switching on power. Check fingerswitch and footswitch as to whether
24
key or pedal is stuck or switch is defective.
Otherwise equipment defect: Technical Service.
When switching on the power, AUTO BIPOLAR is switched on by footswitch.
Activate unit only after switching on power. Check footswitch as to whether key or pedal is
25
stuck or switch is defective.
Otherwise equipment defect: Technical Service.
Contact is detected when switching on the power. Contact monitor is active.
Check the forceps connecting cable or check forceps for a short circuit. The forceps tips are
26
touching or lying on a conductive base: Isolate forceps.
Otherwise equipment defect: Technical Service.
Overheating! Internal unit temperature > 100°C. Permissible output power is reduced.
Unit generated max. power for a longer period of time.
27 Allow unit to cool down.
Coagulation electrode too large?
Short circuit or error in accessories?
Activation signal for the blue footswitch button already on.
Is the blue footswitch button depressed? Is the button or switch stuck? If necessary, briefly
28
unplug the footswitch as a test.
First preselect footswitch on the front panel and then switch on.
For Spanish version:
29 During activation, a further activation signal is detected.
Double activation not permissible.
Mismatch! Over a time period > 5 sec , the load resistance is < 50 ohms.
30
Check accessories for short circuit.
Mismatch! The output power is > 100 watts. During activation, the load resistance remains
31 constant and < 300 ohms. After a prescribed time, ERROR 31 appears.
Check accessories for short circuit.
Multiple activation detected.
32 No simultaneous activation via several sources.
If unsuccessful, unit is then defective. Technical Service.
At the end of activation, a new activation signal immediately appears.
33
No simultaneous activation via several sources.

132 / 266 2 ERROR LIST


ERROR no. 34–48

Error
no. Designation and remedies

Multiple activation detected during AUTO BIPOLAR .


34
No simultaneous activation via several sources.
There is already a new activation signal during AUTO BIPOLAR with AUTO STOP or AUTO
35 START.
No simultaneous activation via several sources.
When pressing the BIPOLAR AUTO START key, there is already an AUTO START signal .
The contact monitor is activated.
36
see ERROR no. 26.
Otherwise equipment defect: Technical Service.
Error during activation.
37 At the point in time of activation, the power supply unit voltage has not yet dissipated. Power
supply discharge faulty. Equipment defect: Technical Service.
During AUTO START activation, the contact resistance is < 6 ohms.
38
Inspection of the forceps and supply cable for short circuit.
39 not assigned
Monitor ST generator time control. Output error: ST time control for FORCE and SPRAY.
40
Actual value > set value plus 20%: Technical Service necessary.
Like Error 40, but
41
Actual value < set value minus 20%: Technical Service necessary.
Like Error 41, but
42
Actual value > set value minus 40%: Technical Service necessary.
Monitor of ST generator time control.
43
Output error. No frequency feedback: Equipment defect: Technical Service.
Monitor of the ST generator output voltage.
44
Output error: Equipment defect: Technical Service.
HF generator error during self-check.
45
HF output voltage too low : Equipment defect: Technical Service.
Art. No.: 80116-201

Self-check.
46 Error within the permissible limits during comparison of the power supply unit voltage with the
09 / 2004

HF output voltage. Equipment defect: Technical Service.


HF generator error during self-check.
47 Like Error 46, but error outside permissible limits.
Equipment defect: Technical Service.
Patient current.
48 No signal from the output current monitor.
Equipment defect: Technical Service.

2 ERROR LIST 133 / 266


ERROR no. 49–82

Error
no. Designation and remedies

49 not assigned
A key on the front panel is depressed.
50
Operating field key is depressed or defective during the power start-up phase. If it cannot be
to 70
corrected, then equipment defect: Technical Service.
Interface error for ICC 350 DOKU: Start or stop bit error or number of bits incorrect.
71
Equipment defect: Technical Service.
Interface error for ICC 350 DOKU: Signal in receiving register has not been read out.
72
Equipment defect: Technical Service.
Interface error for ICC 350 DOKU: Parity sign placed incorrectly.
73
Equipment defect: Technical Service.
Interface error for ICC 350 DOKU: No connection to PC available.
74
Equipment defect: Technical Service.
Interface error for ICC 350 DOKU: Sign stays in transmitter buffer. SIO module not transmitting.
75
Equipment defect: Technical Service.
Interface error for ICC 350 DOKU: Interface storage takes too long; hard disk is too slow.
76
Equipment defect: Technical Service.
77
not assigned
to 79
ICC 350 NEUROTEST: No valid frequency for the 5-stage intensity setting.
80 Replace remote control.
Otherwise equipment defect: Technical Service.
ICC 350 NEUROTEST: The intensity setting was set to 0 during activation.
81 Do not set anything during activation.
Otherwise equipment defect: Technical Service.
ICC 350 NEUROTEST: NESSY measurement: NE impedance > 120 ohms.
82 Test the neutral electrode and supply line or position of the NE on the patient.
Otherwise equipment defect: Technical Service.

134 / 266 2 ERROR LIST


ERROR no. 83–91

Error
no. Designation and remedies

ICC 350 NEUROTEST: Output current too high, but still within the permissible limits.
83
Equipment defect: Technical Service.
ICC 350 NEUROTEST: Output current too high; outside permissible limits.
84
Equipment defect: Technical Service.
ICC 350 NEUROTEST: No output current. Interruption of the circuit or failure of the frequency
feedback system.
85 Check the neurotest cable supply lines or the handle, NE and cable and replace if
necessary.
Otherwise equipment defect: Technical Service.
ICC 350 NEUROTEST: Output current too low, but within the permissible limits.
Check the neurotest cable supply lines, or the handle, NE and cable, and replace if
86
necessary.
Otherwise equipment defect: Technical Service.
ICC 350 NEUROTEST: Output current too low; current is below the permissible limit.
87 Check neurotest cable.
Otherwise equipment defect: Technical Service.
ICC 350 NEUROTEST: Max. time limit has run out. The time limit monitor is a safety measure.
88
Only activate unit if necessary.
ICC 350 NEUROTEST: When switching on the power, already a neurotest activation signal.
89
Equipment defect: Technical Service.
ICC 350 NEUROTEST: Electronic fuse triggered or frequency feedback system has failed.
90
Equipment defect: Technical Service.
ICC 350 NEUROTEST: After switching on the neurotest function using the intensity adjuster, a
test determined that the electronic fuse was not triggered or the frequency feedback system
91
has failed.
Equipment defect: Technical Service.
Art. No.: 80116-201
09 / 2004

2 ERROR LIST 135/ 266


136 / 266 2 ERROR LIST
Chapter 3
Circuit description
Motherboard

The following functions are also found on the motherboard:


• Starting current limitation
• Supply voltage changeover and power rectification
• Power transformer for low voltage supply
• Rectifier for low voltage
• Chipselect generation and level adaptation of TTL level to 15 volt level for CMOS components.
• Generation of the external control bus and of signal lines from the data from PIO outputs
• HF leakage current measurement
• HF leakage current limitation
• Changeover between floating and capacitance-grounded output
• Input circuit for the footswitch
• Various level adaptations.
The motherboard detects the other PCBs via connectors and contacts them.

Starting current limitation


The supply voltage moves from the power supply to the motherboard via the connector J 11.
Immediately after switching on the ICC, the supply unit capacitors are charged which causes a heavy
power surge by which, without protective measures, the fuses for the in-house electrical system would be
triggered.
Therefore a starting current limitation has been realized on the motherboard which limits the current peak
to noncritical values after switching on.
The corresponding power current first flows into the ICC via the resistor R5 and the fuse F1. The relay
contacts REL 1 are still briefly opened. Power current is therefore temporarily limited to noncritical values
due to resistor R5.
As soon as the 24 volt supply voltage is available, relay REL 1 can pick up, bridges resistor R5 and fuse F1
with its relay contacts, and relieves both of them. This short span of time is sufficient to effectively limit the
starting power surge.
Art. No.: 80116-201

LED D2 lights red when the relay REL 1 is actuated and thus serves as a control.
09 / 2004

Supply voltage switchover and power rectification


The unit can be changed over either to the 230 volt or 115 volt supply voltage range. The remaining voltage
deviations within the specification are offset by the controlled power supply units.
The supply voltage can be switched over by shifting the connectors J 16 to J 22.
In the 230 volt range, the bridge-connected rectifier BR1 functions as intended as a true bridge circuit. The
wire bridges must be connected as follows:

3 CIRCUIT DESCRIPTION 139 / 266


Motherboard

J 15 free
J 16–J 20 grey
J 17–J 21 brown
J 18–J 22 yellow
J 19 free
In the 115 volt range, the bridge-connected rectifier BR1 operates with the electrolyte capacitors C6, C7 as
a voltage doubler. The wire bridges must be connected as follows:
J 15–J 20 grey
J 16 free
J 17 free
J 18–J 21 brown
J 19–J 22 yellow
For the low voltage supply, there is a transformer TR 1 with rectifier BR2 and filter capacitor C15 on the
motherboard. Here an unregulated DC voltage is provided in the 24 volt range.
Since data are present on the databus for all parts of the circuit simultaneously, it is necessary to separately
determine for which part of the circuit the currently output data is intended. This is realized by the “Chipselect
method” by which the chip to be addressed is selected and addressed using a special “Chipselect signal.”
This signal activates only one among a number of addressable modules. These signals are generated within
the Multiplexer IC 4 and converted in the transistor arrays IC10 and IC11 to 15 volt CMOS level.
The PIO (Parallel Input Output module) produces data in a brief period of time for many different target
assemblies. While the data are only present briefly at the PIOs, the data for target assemblies should be
present longer. For this an independent external control bus and independent control lines are used. The
data for the signal lines are stored in the D-flipflops IC2 and IC3 and brought to the 15 volt CMOS level in
the transistor arrays IC8 and IC9.
For the external control bus, the PIO data only need to be brought to the 15 volt CMOS level in IC7.

Limitation of the high frequency leakage currents


High frequency leakage currents are effectively limited in the ICC. The transformer UE1 is used for limitation.
All lines which lead to a high-frequency output socket on the ICC are directed via transformer UE1. If no
high frequency leakage currents occur, the HF current flows from the generator via the patient to the neutral
electrode and via the transformer UE1 back to the generator completely.
Therefore ideally, the current flowing away is equal to the current flowing back. The windings of the
transformer UE1 are switched in such a way that the resulting magnetic field is canceled by the current
flowing back and forth. Thus the windings of this transformer have no inductivity; the current can flow
unimpeded.
However, if high-frequency leakage currents do occur within the patient circuit, the current flowing back
and forth is generally not equal. The magnetic fields in the transformer UE1 do not cancel each other out;

140 / 266 3 CIRCUIT DESCRIPTION


Motherboard

an inductivity of the coils results which limits the high-frequency leakage current with this inductive
impedance.

Monitoring the high-frequency leakage currents


As intended, the high-frequency current should only be used for cutting or coagulating tissue. To do this, it
must flow to the active electrode in a small area and with a high current density, and flow back again from
the neutral electrode over a large area and with a low current density.
However, if the body of the patient is in contact with another electrically conductive object, the current may
also take an undesirable path and, for example, cause a burn there. These undesirable currents are known as
“leakage currents”. It is therefore important to know whether such a leakage current is flowing and how
large it is.
Such leakage current cannot simply disappear, but must instead always flow back to the generator. The
largest proportion of these high-frequency leakage currents flow back to the generator via the power cable
and the grounded conductor.
Since all power lines and the grounded conductor are directed through the ring core of the coil L1, a
corresponding high frequency voltage is induced if HF leakage current is present in the coil L1, which is
rectified with diode D1, restricted with D6, D7 and smoothed in capacitor C13. For further processing, this
DC voltage is fed to the processor system via the isolation amplifier IC12.

Changeover between flowing and capacitance-grounded output


High-frequency surgical units are generally available either in “capacitance ground of the neutral electrode”
or “floating neutral electrode” connection systems, whereby no components are integrated between the
connection to the neutral electrode and chassis in the latter connection system.
Both connection systems have advantages and disadvantages.
The advantage of capacitance ground is that the feed line from the neutral electrode to the patient is grounded
at a high frequency via the capacitor and the risk of burns is reduced. However, it is a disadvantage that
impermissible low-frequency leakage currents may flow through this capacitor during cardiac operations.
If the neutral electrode is operated as floating, on the other hand, the low-frequency leakage currents can be
kept very easily below the limit value of 10 or 50 mA during cardiac operations, but the risk of burns is
increased in this connection system since the line from the neutral electrode is about half the high frequency
voltage of the generator.
Art. No.: 80116-201

With the ICC high-frequency surgical units, the low-frequency leakage current to the patient is measured.
At the first malfunction, this must not exceed 50 mA. Once this condition is ensured, the unit is permitted
to carry the CF designation (Cardiac Floating). If the possible low-frequency leakage current is under 500
09 / 2004

mA in the first case of malfunction, the unit is therefore not suitable for operations on the heart and has the
designation BF (Body Floating).
Initially the ICC is capacitance-grounded via capacitors C30 and C31 and the relay contact REL 2. The
advantages of capacitance ground are fully exploited. The low-frequency leakage current is measured via
the prescribed simulation R25, C28. If for any reason a low-frequency leakage current should appear, it is
then evaluated. If it exceeds the limit of 50 mA, the relay contacts REL 2 are then opened and thus a low-
frequency leakage current can no longer flow. The ICC thus fulfills the CF requirement for cardiac surgery

3 CIRCUIT DESCRIPTION 141 / 266


Motherboard

in every situation.
The voltage occurring in the simulation is proportional to the current and is compared in the operation
amplifier IC14 functioning as a comparator to the maximum permissible value that is prescribed and
adjustable via the resistor divider R22 and TP1. The signal for switching over the relay REL 2 is present at
the BF / CF output.

Footswitch input circuit


The footswitch is operated at a DC voltage of 15 volts via a multipole line. Since the footswitch connection,
due to its length of up to several meters, can also function as a receiving antenna and absorb interferences,
an RC low-pass is connected directly to the input sockets of the ICC which severely dampens high interference
frequencies. The footswitch signals are then regenerated using the buffer IC 13.
For further processing in the processor, the output signals from IC 13 are adapted to the TTL level of the
processor. To do this, the noninverting buffer IC5 is used.
Further signals are converted in the same manner from 15 volt CMOS level to the TTL level in the buffers
IC1 and IC6.

142 / 266 3 CIRCUIT DESCRIPTION


CPU board
Slot J1

The following functions are located on the PCB:


• The CPU with RAM and EPROM
• The clock generator
• The voltage supply monitor
• The digital input and output via Parallel Input/Output modules (PIO)
• Analog inputs via an A/D converter
• The Chipselect generation
• The safety interlock signal for controlling the activation signals.
As the central processing unit (CPU), the CMOS microprocessor Z84 C00 (IC1) is used together with the
EPROM 27 C 512 as the program memory (IC3) and the battery-buffered RAM 5864 as the main memory
and constant memory (IC2)
The clock pulse for operation of the computer is produced in the quartz clock generator IC16 and then processed
in the two D-flipflops IC13 to a half-frequency, counterphase clock.
In case of a breakdown of the supply voltage, the current computer data must still be “saved” and stored in the
battery-buffered RAM. All these tasks are supported by the supervisor circuit IC10 (MAX 691).
The supply voltage is monitored via the resistor voltage divider R3, R4 and the “Powerfail” input (Pin 9,
IC10). The data are buffered by a 3 volt lithium battery BT1 which is connected at Pin 1 of the IC10. The
circuit also monitors the voltage of this buffer battery. When switching on, the circuit affects a reset of the
computer system to a specific initial status and provides the monitoring and functional capability through an
integrated “watchdog” circuit.
In addition, the +5 volt supply voltage is also monitored in a separate circuit via resistor R9, diode D1, buffer
capacitor C13 and resistor R7 via the PIO IC6, Pin 27.
The digital inputs and outputs of the computer are taken care of by the Parallel Input/Output circuits (PIOs,
IC4 to IC7). The input and output ports are specified and connected by the program.
Analog dimensions, processed by the processor, move via the level adaptation (resistor network RN1, resistors
R15 to R18) and simultaneous low-pass (capacitors C16 to C19) to the 4-channel analog-digital converter
IC14, from whence the data are available to the processor.
Since all system data are present together at the databus, the system must be able to address the target modules
to which the data apply. This occurs in a processor system by means of the Chipselect lines by which very
Art. No.: 80116-201

specific modules can be addressed via the assistance of “selection signals”.


The Chipselect signals are created in the decoder IC9 from the addresses A3, A4 and A5. Depending on the
09 / 2004

address, only one output line each is switched to logical low.


All signals from the various fingerswitches and footswitches are summarized and verified in a safety interlock
signal as to whether any impermissible overlappings or impermissible conditions are produced. If no
impermissible overlappings are determined, the safety interlock signal generates a signal which identifies the
passed on data as save. This logic is accepted by the programmable controller IC17.

3 CIRCUIT DESCRIPTION 143 / 266


Low voltage supply
Slot J2

The following assemblies are located on the PCB:


• Voltage regulator for +24 volts
• Voltage regulator for +15 volts
• Voltage regulator for +5 volts
• Voltage regulator for –15 volts
• Three sound generators for the acoustic signals
• Circuit for tone selection
• Tone output amplifier with volume control.

Voltage regulator for +24 volts


The unstabilized DC voltage, gained on the motherboard via transformer TR1 and bridge-connected rectifier
BR2, moves to the input of a switched-mode power supply unit. This consists of the integrated switching
controller IC3, the memory choke L1 and the free-wheeling diode D1 with the necessary wiring. The
output voltage is adjusted via the voltage divider R22, R23.
At the output of the switching controller, a stabilized DC voltage of +24 volts is available. The presence of
this voltage is indicated by the LED6.
This voltage is mainly used to operate the relays in the surgical unit.

Voltage regulation for +15 volts


The instable input voltage, the presence of which is indicated by LED 4, moves to the switching
controller IC 1. The circuit extensively corresponds to the +24 volt regulation, however the transformer
UE 1 is used here as the memory choke which simultaneously taps a part of the connector voltage
occurring there for the operation of the – 15 volt regulation.
The output voltage of 15 volts prescribed by the divider ratio of the resistors R30 and R31 is used to
operate the CMOS circuits and the operation amplifier. Its proper presence is signaled by the LED 2.

Voltage regulation for – 15 volts


The negative operation voltage of – 15 volts is mainly required for the negative voltage supply of the
operation amplifier. Since the capacity of this voltage source is just minimal due to the circuit, a simple
regulating circuit could be used. The principle of analog regulation is thus sufficient, and the resulting
losses are minimal.
The switched-mode voltage tapped from the switched-mode power unit for + 15 volts at transformer UE 1
is rectified through the diode D6 such that a negative DC voltage is present at the input of the analog
regulator IC10. This voltage is stabilized by the fixed voltage controller IC10 to –15 volts. The proper
presence of this voltage is indicated by the LED1.

144/ 266 3 CIRCUIT DESCRIPTION


Low voltage supply
Slot J2

Voltage regulation for +5 volts


A controlled voltage of +5 volts is mainly required to operate the CPU, the TTL logic modules and the light
displays on the front panel. Since the capacity of this voltage source is relatively high, a switched-mode
power supply unit was used.
The circuit corresponds extensively to that of the +24 volt regulator: The instable input voltage is stabilized
to +5 volts by means of the regulator IC6. The proper presence of the output voltage is indicated by the
LED3.
From Pin 3 of the integrated switching controller IC1 of the +15 volt voltage regulation, a connection leads
to the transistor T2 of the +5 volt control. In this way it is possible to block the function of the +5 volt power
supply unit as long as the +15 volt supply is not available. This measure is used to increase the functional
security of the unit.

Tone generators for the signal tones


The tone generators are used to audibly signal all operating and danger conditions when operating the
surgical unit. To do this, three tone generators are available, the signals of which may be mixed with one
another to produce pleasant and differing tones in this way.
The timer IC4 produces the tone frequency for the first tone, which can be adjusted using the trim
potentiometer TP2 at 493 Hz.
Timer IC5 produces the tone frequency for the second tone, which can be adjusted using the trim
potentiometer TP3 at 414 Hz.
Timer IC7 produces the tone frequency for the third tone, which can be adjusted using the trim potentiometer
TP4 at 329 Hz.
The generated tone frequencies can now be switched on selectively using the analog switches on the IC8
and mixed with one another. The combination of individual tones is prescribed by the program and is
selected using the D-flipflops of the IC9 as a target memory and switched through using the analog switches
of the IC8. Via resistors R5, R7, R9, R24, R10 and R16, the tone frequencies are combined so that one
sound can result from several individual frequencies.
The volume of the operating tones can be adjusted using a potentiometer which is connected in parallel to
resistor R11.
The volume of the alarms must not be reduced. For this reason, the reduction of amplitudes by means of the
integrated analog switch IC8, Pin 10-11, which is also controlled by the CPU, can be passed by so that the
Art. No.: 80116-201

tone signal in this case is reproduced with the maximum amplitude at the tone output amplifier IC 2.
The R37, C9, C10, C11, R39 network is used for sound shaping, so that a pleasant sound results in the
09 / 2004

loudspeaker which follows the tone amplifier.

3 CIRCUIT DESCRIPTION 145 / 266


Control board
Slot J3

The following assemblies are found on the PCB:


• Measured value acquisition and adjustment
• The contact monitor
• Actuation and power setting of the ST output stage
• Actuation of the power module
• Synchronization of the QK output stage
• Hardware electronic safety circuits
• Spark control
• Actuation of the QK output stage.

Measured value acquisition and adjustment


The measurement signals, which are triggered mainly to the Senso-board as well as to other parts of the
entire unit, move first to the control board where they usually must still be adjusted in order to finally move
on to the processor.
For most inputs, an input circuit consists of a variable voltage divider with which the signal voltages can be adjusted.
Various signal voltages, the values of which are needed very quickly by the processor system, proceed via
the amplifiers IC1 and IC2 directly to the processor. (See diagram page 2/3).
Other signals which are not required for fast processing can be fed to the processor system in multiplex
operation. (Circuit diagram page 3/3). These signals are fed to the 16-channel multiplex IC 3, scanned in
chronological order, then amplified in the operation amplifier IC1 and only then fed one after another to the
processor system (output ANALOG 4).
The individual operating voltages, for example, are determined in this way:
The +15 volt operating voltage is fed via the resistor divider R39, R40 to the multiplexer.
The +24 volt operating voltage is fed via the resistor divider R41, R42 to the multiplexer.
The –15 volt operating voltage is first fed via R31 to the operation amplifier IC2 by inverting it. Now the
voltage can also be processed as a positive parameter via the multiplexer which only switches through
positive signals.
The multiplexer IC3 receives its address actuation A0 to A3 from the control bus via the target memory (D-
flipflop) IC19.

The contact monitor


In the bipolar operating mode, it is necessary that the generator be switched on via the forceps when
biological tissue is found between the forceps tips. This is the purpose of the contact monitor. It should
switch on the generator at a tissue impedance of 2.5 kOhm.
In principle, two starting points can be specified and adjusted. The appropriate valid area is prescribed by
the control bus, stored in target memory IC20 and switched through there according to the activated output
(BER_1 or BER_2).

146 / 266 3 CIRCUIT DESCRIPTION


Control board
Slot J3

For example, if area 1 is activated, the emitter from transistor T2 is set high and gives its output voltage via
the trim potentiometer TP 11, resistor R45 and diode D2 to the measurement line U_NETZT, which also
leads at the power module to the sensor line of the switched-mode power supply's output voltage, but at the
same time also to the measurement system of the processor (trim potentiometer TP1 on the control board).
Transistor T2 can therefore be regarded as an extra-low voltage power supply, the output voltage of which
the HF generator of the power module uses to produce a minimal HF voltage and emit this as a test voltage
to the bipolar socket.
The internal impedance of this mini power supply unit is adjusted via the trim potentiometer TP11.
If the generator is now loaded with the tissue in the forceps (or with a 2.5 kOhm impedance), the supply
voltage at the internal impedance of the mini power supply unit collapses by a specific amount.
This voltage collapse is measured by the processor system and compared with the prescribed set values. If
they agree, the main power supply unit is switched on and the HF generator supplies the preset power.
The mini power supply unit cannot be fed in reverse due to the diode D2 (protective diode).
Since the internal impedance can be changed via the trim potentiometer TP11, the starting point of the
contact monitor can be adjusted here relative to the loaded impedance of the generator (tissue impendance).

Actuation and power setting of the ST output stage


The instruction to actuate the ST output stage arrives as a digital word from the control bus. From this, in
the digital-analog converter IC8, a DC voltage results which is transformed into a specific frequency in the
voltage frequency converter IC15, which can be adjusted using the trim potentiometer TP17.
The clock pulse generated in this way is the repetition frequency of the ST output stage actuation.
The pulse length of each individual actuation pulse is taken from the repetition frequency. Using the EXOR
of the IC12, a monoflop is realized with which the pulse length of the actuation pulse can be adjusted using
the trim potentiometer TP16. After a steepening of the edge, the actuation pulse TSI_STE is available at
output 11 of the EXOR IC12.
The generator power can be adjusted via the repetition frequency.

Actuation of the power module


The power generator of the power module is a feedback generator in principle which receives its actuation
pulse from the control board. The generator, however, does not begin to oscillate itself, but must instead be
started by a pulse.
Art. No.: 80116-201

The circuit receives the start-up signal and thus the necessary starting pulse from the processor via its PIO
on the CPU board and the transistor array IC8 on the motherboard.
09 / 2004

The HF_EIN signal is directed to the comparator IC14 on the control board, the output of which remains at
logical HIGH during activation.
When starting up, the ascending signal is differentiated via the RC element R19, C73 and moves to the gate
of the transistor T4 which then briefly connects through and triggers the monoflop IC16. This is the starting
pulse at which the generator begins to operate. Using the trim potentiometer TP15, the pulse length of the
first monoflop in the IC16 can be set and resulting in a symmetrical sine-wave characteristic for the generator
signal (adaptation to the parallel oscillating circuit).

3 CIRCUIT DESCRIPTION 147 / 266


Control board
Slot J3

The resetting of the first monoflop IC16 triggers a secondary pulse in the second monoflop IC16 which
represents the true actuation pulse for the output stage driver. The length of this actuation pulse is adjustable
using the trim potentiometer TP14.
The power module generator is therefore always only initiated at the start of a half oscillation through the
actuation pulse. Due to the oscillating circuit as load resistance, the oscillation is extended into a complete
sine wave.
For all further oscillations during an activation phase, the generator is fed back via the resulting sinus
signal. A part of the output voltage U_PRIM of the parallel circuit is directed to the comparator IC14, the
output pulses of which now trigger the monoflops IC16.
The power module generator therefore continues to oscillate as a feedback generator until the activation
signal HF_EIN is reaccepted by the processor.
In this way, it is ensured that the generator always oscillates exactly at the resonance frequency of the
oscillating circuit and the operating frequency need not be manually adapted to the production-related
tolerances of the oscillating circuit elements.

Synchronization of the QK output stage


The quasi-complementary output stage operates at a serial oscillating circuit (on the power module) to
produce the required sine-wave current. This serial circuit affects the current in the QK output stage like a
flywheel and forces the temporal characteristic of the current to a certain extent.
Due to the improved efficiency and to protect the QK output stage, the transistors should always be switched
over at the same time that the current in the serial circuit has just made a zero crossing. This then reduces
the losses in the transistors.
This requirement can best be met according to the principle of feedback. Such a circuit principle has
already been realized in the actuation of the power module. There too, the advantages of digital control
signals with their low electrical power consumption and its versatility could be combined with the feedback
for a generator of high efficiency.
The generator cannot start by itself; it needs a starting circuit. The digital oscillator IC18 is a free-wheeling
oscillator, the frequency of which should be as close as possible to the frequency of the serial circuit. Its
output signal is directed to the priority encoder IC11. As long as no current flows in the QK output stage,
the measurement signal of the current U_IHP is zero (measurement point MP1). The comparator IC9
detects no current at input 9, therefore its output signal is low and the monoflop IC13 produces no pulses.
Its output is then continuously low and thus also the selector S1 of the priority encoder IC11. As a result,
the inputs IA2 and IA3 are switched through to the output. In this way, the signal for the starting circui IC18
or actuating the QK output stage is switched at the start.
Once the QK output stage has “started up”, a current is produced there which, at sufficient level, exceeds
the threshold of the comparator IC9, Pin 10. Since the current in the QK output stage is half-wave-shaped,
a pulse results at the output of the comparator with the frequency of the QK output stage. This pulse
triggers the monoflop IC13 at input 4. The ON time has been selected somewhat longer than the period
length of the HF signal of the QK output stage, so that the monoflop does not drop out as long as pulses
from the generated HF retrigger this monoflop (principle of the watchdog circuit). The monoflop increases
the selector input of the priority encoder IC11 to high-level. In this way, the signal from the start generator

148 / 266 3 CIRCUIT DESCRIPTION


Control board
Slot J3

is no longer switched through for actuation of the QK output stage, but instead the output signal of the
comparator IC9, PIN 12.
This comparator detects the zero crossings of the high frequency current of the QK output stage and provides
a pulse at the rate of the HF at the priority encoder which switches this rate through to the actuation with
sufficient current flow of the output stage. In this way, the actuation has now been switched over from free-
wheeling by means of the start generator in a no-load case to feedback current control in a load case.

Hardware electronic safety circuits


The current from the QK output stage is measured one more time:
First the measurement voltage is divided by means of the divider R57, R61, then rectified using diode D10
and an average is generated using the time constants from the resistor R50 and the capacitor C10. As a
result, the comparison voltage from the divider is present at the input of the comparator IC4, on the one
hand, and on the other, the average of a voltage which corresponds to the average current of the output
stage. If the average output stage current exceeds the set threshold, the comparator tilts. Its output signal
blocks actuation of the output stage via the AND gate IC7, Pin 4, and the QK output stage is blocked for a
specific minimum time prescribed by the monoflop IC10, part 2. In this way, the circuit is provided with a
recovery time and a pump effect is avoided.
This is therefore an electronic fuse for the QK output stage.
In a similar manner, further measurement dimensions are monitored not only through software, but also
through hardware:
Voltage and current of the patient circuit are directed via their parameters UP_HF and IP_HF from the
Senso-board on the comparator IC6. This also applies to the voltage from the power supply unit U_NETZT
and its current U_INT from the power module.
The integrated module IC6 is a comparator, the threshold voltage of which can be preset as a digital word
via the control bus. In this way, the threshold voltage can be adapted to current requirements prescribed by
the processor. The comparator compares the analog instantaneous values with those limit values set by the
processor and passes its Yes/No decisions on to the NOR circuit IC5. There the signals are summarized and
directed to gate IC7. If one single parameter has exceeded its limit value, the QK output stage actuation is
blocked by the AND circuit IC7. At the same time, the monoflop IC10, Part 1, is triggered, maintaining the
blockade for a specific minimum time, so that a pump effect caused by switching off and back on again too
quickly is avoided.
Via the second part of the AND circuit IC7, further important enable signals are controlled for the QK
Art. No.: 80116-201

output stage:
• Is there an enable signal from the processor?
09 / 2004

• Is the safety interlock signal giving its enable?


• Is there currently no reset of the processor?
If any of these questions can be answered with NO, the QK output stage is blocked.

The spark control


Several ICC units offer both a control of the HF output voltage as well as optionally a control of the

3 CIRCUIT DESCRIPTION 149 / 266


Control board
Slot J3

sparking which occurs during the cutting and coagulation process at the active electrode. Both control
principles have concrete applications.
The control of spark intensity can be activated via the “HIGH CUT” key.
On the Senso-board, the DC voltage U_FUNKE occurring during a spark is gathered via an isolation
amplifier (description there) and directed to the control-board.
The required set value of the spark intensity is transmitted via the control bus to the digital analog converter
IC8. Its analog output signal is combined and compared at the comparator IC4 with the actual value of the
spark U_FUNKE. If the actual value is greater than the set value, output 12 tilts to frame potential and
illuminates the red LED D1. In addition, the output signal moves to the input Pin 2 of the NOR circuit IC5.
The gate IC7 with the monoflop IC10 switches off the QK output stage for a minimum period of time. In
this way, the supply voltage for the HF generator is reduced and therefore also the intensity of the spark.

Actuation of the QK output stage


The MOS field effect transistors of the quasi-complementary output stage require brief start or stop pulses
for their actuation during the zero crossing of the sinusoidal output current.
As is known from the section “Synchronization of the QK output stage”, there is a pulse at the output of the
priority encoder IC11 which is already synchronous to the zero crossings of the output current. This pulse
must now be prepared in such a way that a start or stop pulse is produced for each of the two output stage
transistors at the right point in time respectively.
If one assumes that neither of the two QK transistors are switched conductively after a pause, Transistor A
first requires a start pulse. The transistor then switches on and produces a sinusoidal half-wave within the
oscillating circuit of the QK output. At the end of this half-wave, this Transistor A must be switched back
off using a brief pulse. Then Transistor B should take over the second half-wave and be conductive. Therefore
Transistor B requires its short start pulse after Transistor A has switched off. It remains conductive until the
zero crossing of the second half-wave and must be shut off again at its end using a pulse.
In this way, a complete sine-wave oscillation has resulted and the process repeats itself constantly until the
QK output stage is switched off.
The output of the circuit IC11 produces a pulse with every zero crossing on the sinus current. However, the
actuation requires, as described, two pulses during a half-wave, specifically a start and a stop pulse. It is
therefore necessary to double the frequency of the available pulse. This occurs in the EXOR gate IC12
together with the RC low-pass R67, C15. Using this low pass, the signal at input 1 of gate IC12 is slightly
delayed compared to input 2, which leads to an output pulse with the length of the delay time for every
change in the input signal. The input frequency is thus doubled. The resulting pulses are extremely short.
By means of small, though non-negligible running times in the circuit, the signal received in the meantime
is no longer completely synchronous to the current zero crossings of the output signal. Using the monoflop
IC13, the correct phase relationship of the actuation pulses to the output current can be re-established by
specifically extending the pulses. The necessary delay time can be adjusted using the trim potentiometer
TP13.
By halving the previously double frequency in D-flipflop IC21, Part 2, the original operating frequency of
the QK output stage is recreated with a pulse duty factor of 1:1. Output pin 13 has a HIGH level, while
Transistor A is addressed. The inverted output 12 has a HIGH level, while Transistor B of the QK output

150 / 266 3 CIRCUIT DESCRIPTION


Control board
Slot J3

stage is addressed. The output signals A and B thus serve in the selection of currently active transistors.
From the previously doubled frequency, the short start and stop pulses are produced for the respectively
active transistor.
The first part of the monoflop IC17 produces the start pulse, the second part the stop pulse.
The first part of the D-flipflop IC21 is additionally actuated by an ON_OFF signal for the safety circuits. In
this way, all start pulses can be suppressed on the one hand, while on the other, it is ensured that the
transistors can still be shut off in any case.
The arrangement of selection pulses for the individual transistors with the on/off pulses is made in the
NAND gate IC1 on the QK output stage.
Art. No.: 80116-201
09 / 2004

3 CIRCUIT DESCRIPTION 151 / 266


QC power stage
Slot J4

The QC output stage (30128- 528)


The following functions are located on the PCB:
• Decoding of the switch signals
• Power-on time-delay circuit
• Preamplifier, driver and electrical isolation of actuation
• Clamping circuit
• Push-pull output stage.
The output stage acts as a power amplifier for high-frequency signals, as is required, for example, in switched-
mode power supply units and high-frequency surgical units. This output stage is designed for push-pull
operation on account of the greater efficiency and larger possible output power. As there are frequently
problems in procuring and storing identical P and N channel transistors - which are required for a push-pull
output stage - it is advantageous to be able to use two transistors of the same type. This circuit is then called
a quasi complementary output stage, or QC output stage for short.
The aim of the development was to produce an output stage with the highest possible efficiency and a
sinusoidal output signal with the smallest possible proportion of harmonic frequencies. Actuation should
require as low a power as possible and preferably be possible in digital mode so that the transistors can be
used in switching operation with low power loss.
All the stated requirements led to the present circuit.

Circuit principle
The complementary output stage consists of two N channel MOS-FET transistors, T1 and T2, which are
operated alternately as switches. The amplified digital output signal is present at the source of transistor T1
and simultaneously at the drain of transistor T2, since these connections are conductively connected to each
other. However, since a sinusoidal output signal is a required condition, the output of the output stage is
switched to an oscillating circuit (which is located on the next PCB).
The QC output stage is actuated between the gate and source of the respective transistor, which always
leads to electric potential problems with this circuit logic, since the actuation signal has to be superimposed
on the output signal.
This problem can be solved by actuating the relevant transistor via a transformer. If this method is used for
both output stage transistors, it has the advantage that the actuation circuit can be completely isolated from
the output circuit and the high output voltages occurring in the event of a defect cannot damage the actuation
circuit.
The disadvantage, however, is that the transformer cannot transmit any DC signals.
This is where the gate-source capacitance of the MOS-FETs proves useful. Since this capacitance is of high
quality, the gate-source capacitance can maintain an applied charge for a sufficient length of time. The
clamping circuit consisting of diodes D8, D9, D10 and D5, D6, D7 has the effect that the gate-source
capacitance can be charged with a short positive pulse. This positive pulse is fed via diode D8 to the gate of
transistor T1 and charges the GS capacitance sufficiently for the transistor to be switched to a conducting
state.

152 / 266 3 CIRCUIT DESCRIPTION


QC power stage
Slot J4

This charge cannot then flow back into the actuation circuit after the actuation pulse has ended, since diode
D8 acts as a block and diode D9 also permits no reverse current due to its Z-diode characteristic. The result
is that the transistor remains in a conducting state as long as its GS capacitance has sufficient charge.
If, on the other hand, a sufficiently large negative pulse comes from the actuation circuit, the Z-diode
voltage at diode D9 is exceeded and the GS capacitance can be discharged again. Transistor T1 thereby acts
as a block.
It can thus be seen that a MOS-FET transistor can be operated in switching mode via such a clamping
circuit by means of a pulse transformer with short start and stop pulses.
Capacitors C4 and C5 are connected in parallel to the GS capacitance and support the effect described.
Since their capacitance is significantly higher than the corresponding gate-source capacitances, the circuit
becomes largely independent of parameter scatter of the gate-source capacitances of different production
batches.
It is the task of actuation to time the actuation process in such a way that each of the two power transistors
receives a short start pulse and, after a defined pause, a stop pulse at the right time. It must be ensured that
the two transistors are never switched to a conducting state simultaneously, since a short circuit of the
supply voltage would result!

Circuit description
The actuation signals are generated on the control board (30128-357). These signals are short pulses for
starting and stopping the output stage transistors and two additional pulses, one for selecting the upper
output stage transistor and the other for selecting the lower output stage transistor.
These pulses come via connector J1 to the NAND gates ½ IC1 and IC4 on the QC board. There the "Start"
and "Transistor A" pulses, for example, are brought together (as are "Stop" and "Transistor A"). The following
pulse sequences are thus present at the outputs of IC 1:
• Start transistor A
• Stop transistor A
• Start transistor B
• Stop transistor B.
These pulses are each preamplified in the triply parallel gates of the NOR circuits IC 2 and IC3. The outputs
of IC2 and IC3 actuate the driver stages, each consisting of two parallel transistors T3 to T10. The output
Art. No.: 80116-201

signal of the four parallel drivers is then amplified to such a level that the pulse transformers UE1 and UE2
can be operated with sufficient energy.
09 / 2004

In the case of a complementary output stage, it must be strictly ensured that the two output stage transistors
are not simultaneously in the activated state, as this would cause a short circuit across the two transistors
and damage the output stage beyond repair.
Therefore, the stop pulses generally have the highest priority. They ensure a safe state of the output stage
during undefined operation. The start pulses are separated in the actuation logic to ensure that only one
output stage transistor is actuated at any one time.
An undefined state could, however, occur in rare cases if the +15 V operating voltage is too low at any point

3 CIRCUIT DESCRIPTION 153 / 266


QC power stage
Slot J4

in time. For this possibility, in which the logic might operate undefined, a "Power-on time-delay circuit"
avoids undefined starting of the output stage transistor.
With transistor T11, the supply voltage VDD = + 15 V is monitored. If this voltage is missing, capacitor C10
is quickly discharged via diode D12. This logical LO signal is sent to the two NAND gates ½ IC 1 and
blocks the starting pulses. If the supply voltage is present, capacitor C10 is charged to 15 V via transistor
T11 and resistor R8 in a predefined delay time. This HI signal reaches the two NAND gates again (see
above) and enables the start pulses for the output stage.
On the secondary side of the driver transformers, short, steep spikes occur, initially a positive pulse for
starting, then a negative pulse for stopping the corresponding output stage transistor.
These spikes reach the gates of the MOS-FET transistors via the clamping circuit described above, and
switch the gates.
The amplified output signal is tapped at the two mutual connection points of the transistors.

154 / 266 3 CIRCUIT DESCRIPTION


Power module
Slot J5

Power module UL
Slot J5
The following assemblies are found on the PCB:
• Serial oscillating circuit for the QC power stage
• Generation of the operating voltage for the HF generator
• Driver and output stage of the HF generator
• Output circuit of the HF generator
• Measurement of various operating parameters

Serial oscillating circuit for the QC power stage


The QC power stage has the task of generating a sine-wave current as free of distortion as possible. The QC
power stage is not used in the ICC to generate high-frequency power for cutting or coagulating, but instead
functions here as a switched-mode power supply unit with a high switching frequency and efficiency. The
QC transistors are always switched over in the zero crossing of the current. The current is forced at the
same time through the serial circuit from coil L2 and capacitor C17 into a sinusoidal shape.

Generation of the operating voltage of the HF generator


The high-frequency power is tapped via the transformer UE2 and rectified by means of the diodes D3, D4.
The capacitors C4, C10 are filter capacitors. With 22 µF, they can be measured relatively minimally and the
ripple of the output voltage is nevertheless small due to the high operating frequency. In this way, this
switched-mode power supply unit can also be stabilized very quickly.
The output DC voltage of the power supply unit is available at the cathode of diode D3 and is
a) directed via the U–NT–STE connection to supply the ST output stage,
b) used to operate the HF output stage via relay REL1.
The negative pole of the capacitor C10 leads to the chassis via the resistor R5. R5 is used as a shunt to
measure the output current taken from this power supply unit. The voltage alloted to R5 if used for
measurement by U–INT.
In the activation pauses, the power supply unit can be discharged via NTE (power supply enable). To do
this, the transistor T3 is switched conductively and discharges the stored power supply voltage via the
resistor R12.
The power supply output voltage is divided into smaller values via the resistor divider R7, R8 and lead to
Art. No.: 80116-201

the measuring device (U-NETZT).


Via the relay REL1, the transformer UE2 can be switched over. With an activated relay, a higher output
09 / 2004

voltage can be taken from the transformer. This is required to operate the ST output stage to generate
especially high voltage peaks. This high voltage is switched off to protect the HF output stage by means of
the second contact from relay REL1.

3 CIRCUIT DESCRIPTION 155 / 266


Power module
Slot J5

Power module UL
Slot J5
Driver and output stage of the HF generator
The actuation signal for the HF output stage is generated on the control board (IC16) and fed to the power
module driver IC1 via the motherboard.
Due to the high-gate source capacitance of the output stage transistors T1 and T2, the driver must be able to
emit and accept high reactive currents when transferring this capacitance. That is why two drivers are
switched in parallel. The output current of the driver is restricted by the resistors R1 and R19 to protect the
driver.
The output stage transistors T1 and T2 are switched in parallel due to the necessary high current and
operate on output transformer UE1.

Output circuit of the HF generator


The output circuit of the output stage consists of the transformer UE1 on the primary side and the two
capacitors C5 and C7 switched in parallel. This parallel circuit is designed for the operating frequency of
the HF generator and forms a sine-wave voltage in a no-load case.
At the secondary side, there is a serial circuit made up of coil L1 and the capacitor C1. This serial circuit is
also designed for the operating frequency of the HF generator and produces a sine-wave current in the
output circuit.
In this way, in every load state of the generator, both the voltage and the current are sinusoidal.

Measurement of various operating parameters


The output current in the QC power stage flows via the transformer UE3 which is secondarily loaded with
the resistors R13, R14 and R15 and is used as a current transformer.
The voltage at these resistors corresponds to the output voltage of the QC power stage (half-cycle current)
and is routed as U-IHP to the control board.
The current in the power supply unit is measured at shunt R5 and routed as U-INT (voltage as a function of
the power supply current) to the control board.
The output voltage of the power supply unit is divided via the resistors R7, R8 and routed as U-NETZT to
the control board (IC14).
The HF primary voltage of the output stage is picked up at the oscillating circuit capacitor C5 and routed as
U-PRIM to the control board (IC14).
The output stage temperature is recorded by the thermistor NTC1 and routed as voltage from the divider
R2, NTC1 with the designation TEMP to the control board (IC2).

156 / 266 3 CIRCUIT DESCRIPTION


ST power stage
Slot J6

The following assemblies are located on the PCB:


• Output stage with driver for high HF voltage pulses
• Relay with relay control
• Feedback of actuation frequency for the CPU

ST power stage
The ST power stage is used to generate high pulses for coagulation without a cutting effect, particularly for
quick superficial coagulation.
The designation “ST” output stage is derived from the abbreviation of spray generator for TUR.
The power control and the generation of actuation pulses are found on the control board.
The actuation pulses (TSI-STE) move to the driver IC4 and then to the ST output stage transistor T1. This
operates on the output transformer UE1, the secondary side of which emits the high frequency via the
capacitors C1 and C2 as well as the relays REL1, REL2 and REL3 at the connections AE and NE. The
emitted high frequency is fed to the outputs via the Senso-board.
The capacitors C1 and C2 serve as a high-pass for suppression of faradic effects and are also an additional
protection in isolating the patient circuit from the equipment circuit. Due to the necessary high electric
strength, two relay contacts each are switched in series.
The output relay is actuated via the relay driver IC7 which receives its actuation signals via the bus and the
target memory IC6 (D-flipflop).
The ST power stage is supplied with voltage that is switched with relay REL19 from the power module via
the connectors J2 and J3.
The integrated counter IC1 subdivides the frequency of the actuation signal of the ST output stage to a low
frequency, so that the frequency in the CPU can be determined by means of a counting loop.
Since the processor prescribes the actuation frequency, it receives feedback in this way as to whether the set
and actual values agree. This is important since the output power of the ST power stage is controlled via the
repetition frequency of the individual pulses.
Art. No.: 80116-201
09 / 2004

3 CIRCUIT DESCRIPTION 157 / 266


Senso-board
Slot J7

The following assemblies are located on the PCB:


• Current monitor for the patient circuit
• Voltage monitor for the patient circuit
• Phase monitor for the patient circuit
• Spark monitor for monitoring the sparking at the electrodes
• Safety system for the neutral electrode (NESSY)
• Relay control

Current monitor for the patient circuit


The high-frequency current moves from the generator to the Senso-board via the connectors J1 and J2. On
the way to the electrodes, the current is directed by the transformer UE1, the load resistors R11 and R12 of
which are transformed at a ratio of 2500:1 to the primary side and thus serve as a shunt for current
measurement.
The output voltage of the secondary winding is also proportionate to the high-frequency output current.
This voltage now moves to one of the operation amplifiers IC7 and IC8, which represent an »ideal rectifier«
together with the diodes D27, the capacitor C30 feedback resistor R30.
The rectified voltage IP_PAT is lead via the control board to the processor and, after further amplification
in the operation amplifier IC8, is also lead as voltage IP_PAT A for adjustment at the trim potentiometer
TP6 also to the processor.
The output voltage of the transformer UE1, on the other hand, moves after a restriction through the diodes
D16, D17 to the comparator IC3, the open collector of which operates at the resistor R23. There the zero
crossings of the HF current are detected, together with the second part of the comparator IC3, at the output
of which a signal according to the zero crossing of the HF voltage is present. Using the common load
resistor R23, this circuit represents a “WIRED OR”. There is a digital signal at the output the pulse length
of which corresponds to the phase relationship between voltage and current of the HF signal.

The voltage monitor for the patient circuit


Parallel to the lines which lead to the active electrode AE and the neutral electrode NE, the high-frequency
voltage is picked up and led via the capacitor C1 to the transformer UE2, which transforms the voltage by
a factor of 12.5 weakened to the secondary winding.
After a further halving of the measurement voltage in the resistor divider R15, R16, it moves, similar to the
situation in a current monitor, to an active, ideal rectifier, consisting of the operation amplifiers IC4, IC8 as
well as the diode D23, the capacitor C33 and the negative feedback resistor R52. The parameter for the
high-frequency patient voltage UP_HF is then led to the processor via the control board, as is also the
amplified signal UP_HF A.
At the same time, the output voltage of the transformer UE2 is directed to the comparator IC3 which emits
a digital signal to the “WIRED OR” during its positive phase. (See above for description).

158 / 266 3 CIRCUIT DESCRIPTION


Senso-board
Slot J7

Phase monitor for the patient circuit


The phase monitor determines the phase angle between the voltage and current in a high-frequency patient
circuit. In this way not only the apparent power, but also the active power emitted to the patient can be
calculated.
As already described in the current monitor and voltage monitor sections, the zero crossings of the voltage
and current characteristics are evaluated in the comparators of the open collector operation amplifier IC3
and summarized as “WIRED OR” in the load resistor R23. There is therefore a digital signal at the output
7 of the IC3, the pulse length of which corresponds to the phase relationship between the current and
voltage.
This signal is smoothed using the diodes D20 and D21, the resistor R40 and the capacitor C13 (averaging),
then amplified and decoupled via the operation amplifier IC9.
The voltage U_PHASE corresponding to the phase between the HF current and HF voltage is directed to
the control board and can be adjusted there using the trim potentiometer TP 7. The result is fed to the
processor.

The spark monitor for monitoring the spark cycle at the electrodes
During the cutting process, for example, there is sparking at the active electrode. To maintain a consistant
quality for the cut, the spark must be recorded and controlled in its intensity.
Our generators produce sine-wave output voltages with a very low distortion factor. If a spark occurs in a
patient circuit, harmonic frequencies of the output signal are thus produced by the nonlinear characteristic
of the spark channel. Harmonics can be either harmonics or DC voltage. This is why one can also say
“rectifier effect of the spark”.
The DC voltage resulting in this way moves from the patient circuit to the spark monitor of the ICC. It
moves via the resistors R1, R2, R4 and R5 to the Z-diodes D1 and D2, switched antiserially, which limit the
signal to 15 volts. Then follows the operation amplifier IC2, switched as an isolation amplifier, which
makes the DC voltage signal durable.
The DC voltage proportional to the spark intensity in the patient circuit must now be evaluated by the unit
and fed isolated to the unit circuit. The remainder of the circuit is in principle an isolation amplifier: DC
voltage signal is chopped, fed isolated via a transformer to the unit circuit and then rectified again.
The oscillator module IC1 produces a square-wave signal with a pulse duty factor of 1:1, present at outputs
10 and 11 of the IC1. This is the chopper frequency which actuates the transistor T1 and T2 in push-pull
Art. No.: 80116-201

operation. This push-pull amplifier functions on the output transformer UE5, which is operated via the
isolation amplifier IC1 using the spark voltage as the operating voltage.
09 / 2004

In this way, the spark voltage is chopped from the transistors T1,T2 and fed via the transformer UE5 as an
isolation at the secondary side to the unit circuit as AC voltage.
Diode D15 then follows on the secondary side, which again rectifies the alternating signal thus resulting
and smoothes this by means of the capacitor C22.

3 CIRCUIT DESCRIPTION 159 / 266


Senso-board
Slot J7

In this way there is another DC voltage, proportional to the spark intensity, which is reduced via the resistor
divider R32, R33 and then fed to the isolation amplifier IC9. The output signal U_FUNKE moves from
there via the control board to control the processor.
The electronic components of this isolation amplifier within the patient circuit require an isolated voltage
supply to function. For this, a DC/DC converter is used which consists of a Colpitts oscillator (circuit
around Transistor T6), the alternating signal of which is transferred from the transformer UE6 to the secondary
side and rectified by diodes D4 and D6. The DC voltages thus resulting are limited to 9.1 volts by the Z-
diodes D3 and D5 respectively.
In this way, voltages of +9.1 volts and –9,1 volts are available to the electronic circuit within the patient
circuit which is identified with I+9 and I–9.

Safety system for the neutral electrode (NESSY)


Problem description: The line for the neutral electrode must be monitored for wire break according to the
standard since there is risk of topical burns for the patient with an incorrect supply line.
In the ICC, correct application of the neutral electrode on the patient is also checked, as well as the uniform
distribution of the HF current to the two electrode surfaces (symmetry).
To monitor the connecting line, the cable is designed as a two-wire connection, the loop resistance of which
is measured. If the resistance value determined in this way is below a specific limit value, one can assume
that the neutral electrode line has no wire break. With conventional single-surface neutral electrodes,
monitoring is performed in this way.
However, such monitoring cannot determine whether the neutral electrode is actually applied to the patient
or whether it is lying around somewhere else.
To also check the correct application to the patient, the contacts of the neutral electrode must be divided,
whereby a control current must flow over the electrode halves and the patient. This control current permits
resistance measurement of the tissue impedance of the patient and thus information as to whether
• the electrode is not connected or has a wire break (impedance > 120 ohms),
• is lying directly on the operating table (impedance < 5 ohms),
• or, most probably, is correctly applied to the patient (impedance between 5 and 120 ohms).
If the high-frequency current is not flowing regularly over both surfaces of a divided neutral electrode, this
can lead to burns due to current concentration under the electrode. It is therefore also necessary to check the
symmetrical current distribution on both halves of the electrode.
The NESSY system, a neutral electrode safety system patented by ERBE, takes care of all the tasks
mentioned.

Principle of the NESSY measurement system


The electric resistance of the neutral electrode is measured via an oscillator, the amplitude of which is
dampened by the resistance from the patient and measured by the system. With a correct circuit design, a
sufficiently precise resistance measurement is possible in this way.

160 / 266 3 CIRCUIT DESCRIPTION


Senso-board
Slot J7

The symmetry of HF current on the halves of the neutral electrode is measured by a symmetrical transformer,
the output voltage of which is a function of current symmetry.
Implementation: The circuitry is found on the Senso-board. The oscillator is designed as a frequency-
selective feedback amplifier: The amplifier IC6 actuates the push-pull stage, consisting of the transistors T4
and T5, and passes the amplified output signal to the frequency-selective serial circuit made of capacitor
C20, coil L1 and the inductivity from the primary side of transformer UE4.
One part of the output signal at the transformer UE4 is picked up via the resistor R18 and fed to the active
bandpass from the operation amplifier IC5 and its wiring. The center frequency is equal to the resonance
frequency of the previously mentioned serial circuit.
One part of the output signal from the active bandpass is fed again in proper phase to the amplifier IC6,
such that the entire arrangement fulfills the oscillation condition and oscillates at the resonance frequency
as an oscillator.
The oscillator can be switched off via the transistors T7 and T8 by means of the disable signal OSZI_DIS
from the processor.
The resistance of the neutral electrode is determined by loading this oscillator with the resistance to be
measured. The voltage collapses on the internal impedance of the oscillator according to the load. Thus
every oscillator voltage can be assigned an appropriate resistance value.
The oscillator voltage is present at the input of the active bandpass and can be picked up at the output of the
operation amplifier IC6.
After peak rectification by diode D30 and capacitor C34, the measurement voltage U_NESSY can be
picked up at the isolation amplifier IC9 and moves via the adjustment on the control board (trim potentiometer
TP9 ) to the processor to determine the resistance of the neutral electrode.
The high-frequency output voltage for the neutral electrode is balanced by the capacitors C2 and C3 on
both lines to the neutral electrode, i.e. divided equally.
Whether the current on both lines to the neutral electrode is now of equal size, depends on whether the two
electrode halves of the split neutral electrode are applied with the same surfaces to the patient. By measuring
the symmetry of the current and the resistance, it is therefore possible to receive information as to whether
the electrode is applied well to the patient with this entire surface.
The high-frequency current flows via the two primary windings 1 and 2 of the transformer UE3 in such a
manner that the resulting magnetic flow is cancelled out by equally strong currents. Thus in this case, no
voltage is induced at winding 3 of the transformer UE3. The reverse is true: The more unsymmetrical the
Art. No.: 80116-201

current flow is, the greater the voltage induced in winding 3.


The high-frequency output voltage, which is a measure for the unsymmetry of the current flow, is rectified
09 / 2004

using diode D9 and filtered with capacitor C57, then amplified using the operation amplifier IC9, so that a
signal U_SYM is available which moves via the control board to the processor for evaluation.
The current density is calculated mathematically from the following dimensions, now known:
• High-frequency current,
• Symmetry of the high-frequency current at the neutral electrode,
• Contact resistance of the neutral electrode to the body of the patient.

3 CIRCUIT DESCRIPTION 161 / 266


Senso-board
Slot J7

The relay control


The relays REL1, REL2 and REL3 are used to switch on the required output sockets. The relays are controlled
by the control bus via the target memory D-flipflops IC10 and the transistors T9, T10 and T11.

162 / 266 3 CIRCUIT DESCRIPTION


Relay board
Slot J8 (for ICC 300, 350)

The following assemblies are located on the PCB:


• Fingerswitch monitor 1
• Fingerswitch monitor 2
• Relays and their actuation for optional, separate connection of high-frequency to the required output
sockets.
The fingerswitch monitors are used to activate the surgical unit from the surgeon's handle. The monitor can
detect which output sockets carry high frequency and which current quality (cutting or coagulating) should
be switched on.
Since the handles are within the patient current circuit electrically, the monitor circuits must be designed
isolated from the unit circuit and from the chassis.
The monitor circuits must therefore be supplied with current from a floating voltage source. These voltage
sources must however also be well isolated at high frequencies, such as are used in high-frequency surgery.
This means that monitors with their voltage sources must be designed as low capacity compared to the rest
of the unit.
The voltage supply for the monitors is realized by two push-pull converters.
The voltage converter for monitor 1 essentially consists of the transistors T1, T2 and the transformer UE 1.
The voltage converter for monitor 2 essentially consists of the transistors T5, T6 and the transformer UE 2.
The transistors of this converter are monitored via the oscillator IC 6, which supplies a symmetrical, square-
wave signal, that is shortened in the monoflop IC5, in such a way that it is ensured that the two transistors
of a converter are not switched on at the same time.
The NAND circuits of the IC 4 create an appropriate push-pull signal that is directly suitable for actuation
of the converter transistors.
Since both fingerswitch monitors have identical circuits, the circuitry of only one of the two monitors is
explained in the following:
On the secondary side of the converter transformer UE 1, a needle-shaped output signal forms in the mid-
frequency range which is directed both to the diode bridge D1 to D5 with the transmitter diode from IC 1 as
well as via the RC low-pass C3, R2, C1, R1 on the handle's selection keys.
Due to the bridge circuit for diodes D1 to D5, the transmitter diode for optocoupler IC 1 may be illuminated
during both half-waves and connect through the receiving transistor for the optocoupler IC 1 by pulses.
Art. No.: 80116-201

If, on the other hand, a key on the handle is pressed, a voltage needle for the converter voltage is dampened
by the Si diode integrated into the handle, so that the transmitter diode for the coupler IC1 can no longer be
09 / 2004

illuminated for the affected voltage needle and the appropriate transistor is no longer connected through at
exactly this voltage needle.
The output signal from the receiving transistor is directed to the two data inputs for the D-flipflops of the
IC3. These two D-flipflops additionally receive the actuation signals for the converter transistors, so that a
definite assignment is possible here between the dampened voltage needle and the actuation signal. The
two D-flipflops therefore function as a scanning circuit in proper phase, the output signal of which can be
assigned to the switched key in the handle.

3 CIRCUIT DESCRIPTION 163 / 266


Relay board
Slot J8 (for ICC 300, 350)

Since a diode is switched in series for each of the two pushbuttons on the handle, although both diodes have
a definite and opposite polarity, this circuitry can be detected exactly via the dampened half-wave after
pressing a pushbutton, as to whether and which button was activated. Outputs 2 or 12 on the IC3 therefore
provide reliable information as to whether the “cutting ” or “coagulating” key was pressed. The information
that no key was pressed is just as possible as the information that both keys were pressed simultaneously.
Isolation of the fingerswitch monitor is complete via the transformer UE1 and via the optocoupler IC1.
The function of the second fingerswitch monitor is equivalent.
The two relays REL 1 and REL 2 are also found on the same PCB which safely separate the two output
sockets for the active electrodes from the generator circuit when the unit is not activated, while connecting
only the activated output socket to the generator when the unit is activated.
Due to the higher electrical strength that can be achieved, two relay contacts are switched in series.
The two relays are activated from the CPU via the target memory D-flipflops IC8 and the transistors T3,
T4.

164 / 266 3 CIRCUIT DESCRIPTION


Display board

The following assemblies are found on the PCB:


• 7-segment displays and their actuation
• Keyboard and LED matrix for light fields
• Operating board bus and keyboard treatment
• Target memory and driver for rows and columns of the display matrix
• Jumpers for activation of special software

7-segment displays and their actuation


All settings on the ICC are, insofar as this concerns numerical values, shown on the display board with 7-
segment displays.
The data to be displayed come from the operating board bus system B1BUS via the target memory (8-fold
D-flipflops) IC5 and IC7 on the segment driver IC6. This results in the bus for the segment actuation
identified as S1BUS.
The segment bus S1BUS controls the series resistors necessary for current limitation in the LEDs the
segments A to F and decimal point DP for the displays LED1 and LED2.
The columns are selected by the target memory IC5 via column driver transistors, which are depicted in the
circuit diagram each directly over the 7-segment displays.
In this way, every individual segment within the matrix is addressable via the column selection and the
segment control.

Keyboard and LED matrix for light fields


All keys for entering operating parameters are designed as membrane buttons and switched electrically in
the form of a matrix with columns and rows.
In addition, all visual displays with the exception of numerical displays are designed in the form of LED
displays or LED fields which are electrically switched as a matrix.

Operating board bus and keyboard treatment


To control the operating and display board, an independent bus system is required that is derived from the
address bus (A0 to A7). To do this, the addresses A0 to A7 are inverted in the transistor array IC12 and
Art. No.: 80116-201

through the transistor T21 and forming the operating board bus B1BUS, which now addresses the target
memory of the display board in conjunction with the corresponding independent chipselect signal from the
inverter IC8 and the required assemblies.
09 / 2004

The rows of the keyboard are multiplexed via the target memory IC1; this produces the row actuation
pulses TZ1 to TZ4 (keyboard row).
If a specific key is now activated, this sends its answer during its activation time via the row actuation pulse
as an output signal via a line for the keyboard columns TS2 to TS3 to the keyboard encoder IC11, which
forms a 4 bit binary number from this and directs it via its output to the CPU for evaluation.

3 CIRCUIT DESCRIPTION 165 / 266


Display board

Target memory and drivers for rows and columns of the display matrix
The LED matrix is actuated by the already described internal bus system B1BUS of the display board.
The 8-fold D-flipflops IC2, IC3 and IC12 are used as target memories for columns (IC2) and rows (IC3).
The columns of the lamp matrix LS1 to LS6 are activated via the driver transistors T2, T20, T11, T10, T4
and T9 switched as emitter followers in a multiplex method and each switched for a brief time to +5 volts.
The current is then led via the appropriate LED and directed via the necessary current limitation resistors as
well as the transistor array IC4 to chassis.
The blue LEDs D36 and D37 for display of the coagulation channels are an exception, the anodes of which
are permanently at +5 volts via the current limitation resistors and are switched on via the transistor array
IC13.

Jumpers for activation of special software


Jumpers J3 to J10 are intended for software specialities available for tests and for switching on special
features in certain countries. The corresponding jumpers are already placed during production and must not
be changed arbitrarily.

166 / 266 3 CIRCUIT DESCRIPTION


Upper wiring module

The “upper wiring module” PCB directs the rectified supply voltage from the motherboard via the plug J14
as a supply voltage to the QC power stage. In addition, this PCB is used as a connection between the QC
power stage and the power module, since currents of this dimension cannot be directed via the motherboard.
The lines between the QC power stage and the motherboard are directed through a ferrite core to reduce
interferences from the QC power stage into the network.

CAUTION
This PCB is at supply voltage potential
Art. No.: 80116-201
09 / 2004

3 CIRCUIT DESCRIPTION 167 / 266


Chapter 4
Block diagrams
ICC 200
Block diagram

Gezeich. = Drawn

Geprüft = Checked

V 2.0 / V 4.0
Freigabe = Approv.

Datum = Date*

Name = Name

Maßstab = Scale

Datei = File

Projekt = Project

Benennung = Title

Nummer = Number

Ers. für = Replaces

Ers. durch = Repl. by


Art. No. 80116-201
09 / 2004

4 BLOCK DIAGRAMS 171 / 266


ICC 300
Block diagram

V 2.0 / V 4.0

Gezeich. = Drawn

Geprüft = Checked

Freigabe = Approv.

Datum = Date*

Name = Name

Maßstab = Scale

Datei = File

Projekt = Project

Benennung = Title

Nummer = Number

Ers. für = Replaces

Ers. durch = Repl. by

172 / 266 4 BLOCK DIAGRAMS


ICC 350
Block diagram

V 2.0 / V 4.0

Gezeich. = Drawn

Geprüft = Checked

Freigabe = Approv.

Datum = Date*

Name = Name
Art. No. 80116-201

Maßstab = Scale

Datei = File
09 / 2004

Projekt = Project

Benennung = Title

Nummer = Number

Ers. für = Replaces

Ers. durch = Repl. by

4 BLOCK DIAGRAMS 173 / 266


Chapter 5
Circuit diagrams
PCBs for
ICC 200, 300, 350
Vcc
+5V
ABUS

DBUS
A13

178 / 266
VNOT
IC1 IC2 IC3

C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
A0-A15 A14 1 D0-D7

68nF
68nF
68nF
68nF
68nF
68nF
68nF
68nF
68nF
68nF
N.C.
30 28 A0-A15 10 11 D0-D7
M1
27 M1 A0 VCC 11 A0 D0
D0 9 12
A1 31 12 A1 D1
A0-A15 10 D1 8 13
19 MREQ A2 32 A0 13 A3 D2
GND MREQ D2
33 9 7 15
IORQ
20 IORQ A3 A1 15 A2 D3
8 D3 6 16
21 RD A4 34 A2 16 A4 D4
RD D4 VNOT
CPU PCB
Vcc VNOT Vcc Vcc Vcc Vcc Vcc 35 7 5
A5 17
C11 +5V WR
22 WR A5 A3 17 D5 30128-052
+24V +5V +5V +5V +5V +5V 6 D5 4 18
A6 36 A4 18 A6 D6
R14 5 D6 3 19
GND 28 RFSH A7 37 A5 19 JP1 A7 D7
68nF 4 D7 25
5k6 A8 38 A6 A8

R3
R12
R11
R10
R6
R13
39 3 24 20

8k2
5k6
5k6
5k6
5k6
5k6
IC10 WAIT
18 HALT A9 A7 A9 CE
2 40 25 21
A10 A8 20 A10 OE 22
VNOT R5 24 CE1 CE_OUT 23
3 5 24 WAIT A11 1 A9 26 A11
VCC BAT ON CE2
1 15 2 21 2
VBAT RES RES 5k6 A12 A10 22 A12
23 OE 26
16 RES 16 INT A13 3 A11 27 A13
RES INT R/W
10 4 2 27
PFD 17 NMI A14 A12 A14
9 C15 1

R1
PF1 14 A15 5 5864 A15

2k2
WD0
11 WDI 26 RESET
WD1 RES 27C512
13 10nF CE_IN Vcc D0 14
CE IN WR
+5V 25 15
BUSREQ D1
23 BUSACK D2 12
7 IC8 Vcc IC11

+
OSC D3 8
CE OUT 12 CE_OUT +5V 4

3V
6 CLK D4 7 DMUX 15 6

BT1
8 LOW LINE 6 CLK A13 1 0 5 &
OSC SEL D5 9 0 14
GND 4 A14 2 0 1
D6 10 G 13 74HC00
MAX691 A15 3 7 2
D7 13 2 12
Vcc 3

R4
D2
+5V 4 11

1k
6 &

1N4148
Z84C00 D0-D7 10
GND GND GND GND GND 4 5
GND 9 IC15
5 6 CE_IN
MREQ 7 4
7 6
PIC-CLK 5 &
74HC138 IC15
SIO-CLK
1 74HC00
IC12 3
R21 2 &
CLK 10 9
CLK Q1
220R 7 IC9 74HC00
Q4
Q5 5 DMUX 15 CS4
Vcc Vcc A3 1 0
IC13 4 0 14

R20
+5V IC13 +5V Q6 A4 2 0 1 CS5

220R
Vcc IC16 10 6 G 13
4 S 9 Q7 A5 3 7 2 CS6
+5V S 2
ICC 200, 300, 350

G 5 11 13 12 CS7
1 EN OUT 5 3 C Q8 3
C 12 12 11
2 D 8 Q9 6 & 4 CS8
D 6 13 14 M1 10
1 R Q10 4 5 CS9
SG531P R 15 GND 9
Q11 R19 5 6 CS10
74HC74 1 7
74HC74 Q12 J2/7C 7 CS11
IORQ
2 220R
Q13
11 3 74HC138
RES R Q14
74HC4020

5
Vcc Vcc Vcc
Diese Zeichnung ist urheber-
+5V IC11 +5V IC15 +5V IC15 B Datum Name rechtlich gesch tzt, daher
Gert/UNIT
1 9 12 Weitergabe und Vervielfltigung ICC
3 8 11 Gezeich. 29.07.92 M.Fritz ohne unsere Genehmigung
2 & 10 & 13 & unzulssig
Gepr ft Benennung/Title
74HC00 74HC00 74HC00
LP un.: 40128-026 CPU
LP bs.: 30128-052
Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 1 von 3 30128-052

CIRCUIT DIAGRAMS
Art. No. 80116-201
09 / 2004

ABUS

5
DBUS

IC4 IC5 IC6 IC7

D0-D7 19 15 D0-D7 19 15 J1/28 D0-D7 19 15 J2/20C D0-D7 19 15 J2/31C


D0 A0 J1/12 D0 A0 D0 A0 D0 A0
20 14 20 14 J1/29 20 14 SICHER 20 14 J2/30A
D1 A1 J1/13 D1 A1 D1 A1 D1 A1
1 13 1 13 J1/30 1 13 J2/19C 1 13 J2/30C
D2 A2 J1/14 D2 A2 D2 A2 D2 A2
40 12 40 12 J1/31 40 12 FISCH-B1 40 12 J2/29A
D3 A3 J1/15 D3 A3 D3 A3 D3 A3
39 10 39 10 J1/32 39 10 J2/18C 39 10 J2/29C
D4 A4 J1/16 D4 A4 D4 A4 D4 A4
38 9 38 9 J1/33 38 9 FISCH-A1 38 9 J2/28A
D5 A5 J1/17 D5 A5 D5 A5 D5 A5
3 8 3 8 J1/34 3 8 FISCH-A3 3 8 J2/28C
J1/18 D6 A6 D6 A6 D6 A6
CPU PCB
D6 A6
2 7 2 7 J1/35 2 7 FUSS-B2 2 7 J2/27A
J1/19 D7 A7 D7 A7 D7 A7
30128-052
D7 A7
18 18 18
ARDY 18 ARDY ARDY ARDY
A0 ASTB 16 A0 6 ASTB 16 A0 6 ASTB 16 A0 6 ASTB 16
6 B/A SEL B/A SEL B/A SEL
B/A SEL A1 A1 A1
A1 5 27 5 27 J1/27 5 27 5 27 J2/23A
C/D SEL B0 J1/11 C/D SEL B0 C/D SEL B0 C/D SEL B0
28 28 J1/26 28 J2/13C 28 J2/24C
B1 J1/10 4 B1 4 B1 4 B1
4 CS5 CE 29 CS6 CE 29 CS7 CE 29
CS4 CE 29 B2 J1/25 B2 FUSS-A1 B2 J2/24A
37 B2 J1/9 37 37 37
M1_PIO M1 M1_PIO M1 30 M1_PIO M1 30 M1_PIO M1 30
30 J1/8 36 B3 J1/24 36 B3 FISCH-A2 36 B3 J2/25C
36 B3 IORQ IORQ IORQ IORQ IORQ IORQ

CIRCUIT DIAGRAMS
IORQ IORQ 31 31 PIC-RTCC 31 FUSS-B1 31 J2/25A
B4 MC-FREI B4 B4 B4
35 32 35 32 J1/22 35 32 FISCH-B2 35 32 J2/26C
RD RD B5 J2/7C RD RD B5 RD RD B5 RD RD B5
33 33 J1/21 33 FUSS-A2 33 J2/26A
B6 WDI 25 B6 25 B6 25 B6
25 CLK CLK 34 CLK CLK 34 CLK CLK 34
CLK CLK 34 B7 J2/8C B7 FISCH-B3 B7 J2/27C
B7 J2/6C
23 23 23 23
INT INT INT INT INT INT INT INT
24 BRDY 21 24 BRDY 21 24 BRDY 21

Vcc
+5V
24 BRDY 21 IEI_5 IEI IEI_6 IEI IEI_7 IEI
IEI BSTB 17 BSTB 17 BSTB 17
22 BSTB 17 22 22 22
IEI_5 IEO IEI_6 IEO IEI_7 IEO IEO

Z80PIO Z80PIO Z80PIO Z80PIO

Vcc
+5V Vcc
+5V
DBUS IC14
R18 IC11 IC11
6 J2/9A
D0-D7 D0 9 12

+
1k RES 8 11
7 10 & 13 & M1_PIO
D1 AIN1 4 R17 M1

C20
C14
8

R9
R7
J2/8A

68nF
15uF
D2

22k
680k
9 3 74HC00 74HC00
D3 AIN2 1k
17 R16 D1
D4 GND GND
18 J2/7A
D5 AIN3 2 1k 1N4148
19
D6 R15
20

+
ABUS D7 D AIN4 1 J2/6A
A0 22 A 1k

R8
C13
A0

5M6
15uF
A1 21
ICC 200, 300, 350

A1
Vcc
+5V GND GND

5
4
3
2
9
8
7
6
10
RD RD VREF+ 14
15

C16
C17
C18
C19
WAIT RDY

180nF
180nF
180nF
1nF
16 13

RN1
8*1k
CS8 CS VREF-
GND
AD7824

1
GND GND GND GND GND

Diese Zeichnung ist urheber-


B Datum Name rechtlich gesch tzt, daher
Gert/UNIT
Weitergabe und Vervielfltigung ICC
Gezeich. 29.07.92 M.Fritz ohne unsere Genehmigung
unzulssig
Gepr ft Benennung/Title

LP un.: 40128-026 CPU


LP bs.: 30128-052
Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 2 von 3 30128-052

179 / 266
R24
J1/8 J1-8
2k2 VNOT J3
J1 Vcc 1 2
R23 R26 R25 +5V J2 CS9
J1-9 1 2 3 4
J1/9 C1 A1 CS10 M1_PIO
GND Vcc

180 / 266
2k2 2k2 3 4 2k2 5 6
+5V C2 A2 RES WR
R22 5 6 A10 7 8 A9 ABUS
F-GND C3 A3 ABUS
J1/10 J1-10 7 8 J1-8 A8 9 10 A7
C4 A4 GND
2k2 9 10 J1-10 A6 11 12 A5
J1-9 C5 A5
11 12 J1-12 A4 13 14 A3
J1-11 C6 A6
13 14 J2/6C J2/6A
J1-13 J1-14 A2 15 16 A1
C7 A7 J2/7A
15 16 J2/7C A0
J1-15 J1-16 C8 A8 17 18 RD
17 18 J2/8C J2/8A
CPU PCB
J1-17 J1-18 A11 19 20 A12
C9 A9 J2/9A
30128-052
19 20 A13 21 22 A14
J1-19 C10 A10
21 22 J1-22 A15 23 24
J1-21 C11 A11 SIO-CLK
8*2k2 23 24
J1/11 J1-11 J1-24 D4 25 26 D3 DBUS
8 9 C12 A12 DBUS
J1-12 25 26 J1-26 D5 27 28 D6
J1/12 7 10 J1-25 C13 A13
27 28 J2/13C FUSS-A1
J1/13 J1-13 J1-27 J1-28 D2 29 30 D7
6 11 C14 A14 FUSS-B1
29 30 FISCH-A2 D0 D1
J1/14 J1-14 J1-29 J1-30 C15 A15 31 32
5 12 FISCH-B2 FUSS-A2
J1-15 31 32 J1-32 33 34
J1/15 4 13 J1-31 C16 A16 INT CS11
33 34 FISCH-B3 FUSS-B2
J1/16 J1-16 J1-33 J1-34 C17 A17 35 36 IORQ
3 14 FISCH-A3 FISCH-A1 MREQ
J1-17 35 36 F-GND 37 38
J1/17 2 15 J1-35 C18 A18
37 38 J2/18C FISCH-B1
J1/18 J1-18 F-GND C19 A19 39 40
1 16 J2/19C
39 40

Vcc
+5V
+5V
Vcc
RA3 J1-40 C20 A20 GND GND
J2/20C
8*2k2 C21 A21
J1/19 J1-19 Vcc
8 9
J1-21 +5V C22 A22
J1/21 7 10
J1-22 C23 A23 J2/23A
J1/22 6 11 SICHER
J1-24 C24 A24 J2/24A
J1/24 5 12 J2/24C
C25 A25

C12
J1/25 J1-25 J2/25C J2/25A

68nF
4 13
J1-26 C26 A26 J2/26A
J1/26 3 14 J2/26C
GND C27 A27
J1/27 J1-27 J2/27C J2/27A
2 15
J1-28 IC17 C28 A28 J2/28A
J1/28 1 16 J2/28C
RA2 17 RA0 RB0 6 FISCH-A1 C29 A29 J2/29A
MC-FREI J2/29C
8*2k2 18 RA1 RB1 7 FISCH-B3 C30 A30 J2/30A
FISCH-B1 J2/30C
J1/29 J1-29 1 8 C31 A31
8 9 FUSS-B2 RA2 RB2 FISCH-B2
J1-30 +24V J2/31C
J1/30 7 10 2 9 C32 A32
Vcc SICHER RA3 RB3 FISCH-A2 RES
J1/31 J1-31 +5V R2 10
6 11 RB4 FUSS-A1
J1/32 J1-32 11
5 12 15 OSC2 RB5 FUSS-B1
J1/33 J1-33 2k2 12
4 13 PIC-CLK
16 OSC1 RB6 FUSS-A2
J1/34 J1-34 3 13
3 14 PIC-RTCC RTCC RB7 FISCH-A3
J1/35 J1-35 4
2 15 RES MCLR
RES J1-40
1 16
RA1 PIC16C54
ICC 200, 300, 350

5
Diese Zeichnung ist urheber-
B Datum Name rechtlich gesch tzt, daher
Gert/UNIT
Weitergabe und Vervielfltigung ICC
Gezeich. 29.07.92 M.Fritz ohne unsere Genehmigung
unzulssig
Gepr ft Benennung/Title

LP un.: 40128-026 CPU


LP bs.: 30128-052
Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 3 von 3 30128-052

CIRCUIT DIAGRAMS
ICC 200, 300, 350
CPU PCB (bare)
40128-026
Art. No. 80116-201
09 / 2004

5 CIRCUIT DIAGRAMS 181 / 266


CIRCUIT DIAGRAMS 5 182 / 266
U_IN
U_IN

C47 C32
ec380_17
+ ec380_17
+
GND
GND

1000uF 1000uF
R34 R33 R26 R25
$plname $plname $plname $plname
GND
GND

10k 30k 10k 30k


C51 C36
EN_5V

ec50r25
+ ec50r25
+
GND
GND

D7 2u2 2u2
$plname C37
2

GND

5V6
$plname

ec50r25
+
GND

R42
4

2u2
14

$plname C35
3
1

GND
T2

100R 13
ec50r25
+
SOFT

GND

C52
BC557

2u2
PFAIL

C34
VSTART

11
+ 2
ec50r25
VREF RD

+
GND

ec50r25
4

2u2
GND

14

C50 2u2
5 10
13
+ 6
GND

ec50r25 C38
INP SYNCIN

SOFT

GND
$rpname
$plname

2u2 15
PFAIL
GND

C49
IC1

VSTART

11
$plname
2 16
GND

VREF RD

330pF
L4972

ec50r25
+
GND

2u2 R27 C39


5 10 7 3
$plname
$plname
RESOUT

6
FCOMP

GND
GND

C53 22k
INP SYNCIN

22nF
$rpname
$plname

15 R28
GND
IC6

17 1
$plname
16 $plname
GND

330pF
L4972
GND

36k
BOOTS

R35 C54 C40


7 3 18
R OSC C

$plname
FEEDB
OUT

$plname $plname
RESOUT

FCOMP

GND
GND

22k 22nF 2n2


9

R36
20

17 1
$plname
D2
GND

36k
BOOTS

C55 $plname
GND
U_IN

18 SB340
R OSC C
FEEDB

OUT

$plname
C41 C42
GND

2n2 R29
9

$plname
C17
20

$plname $plname
GND

D3 470R 1nF 100nF ec380_17


+
GND

$plname 1000uF
UE1
GND

SB340 11 5 LED4 R49


R14 C56 C57
GND

$plname $plname
GND

$plname rot 5k6


Nr.

$plname $plname
GND

470R 1nF 100nF 2 1


C12
5
$plname

$plname
L3

2 8
GND

U_NEG
7

$plname 2n2
200uH
8

30121-037 R17
R12
INP

$plname
OSC
14

$plname
GND

R38 R44 R30 R31 R48 4k3


11

nderung

15k
4
F.COMP

$plname $plname $plname $plname $plname


C13
5
IC3

GND
GND

4k7 1k 4k7 9k1 4k7


$rpname
$plname

GND

GND

$plname
L4962
GND

C58 C43 C14 22nF


12 13

EN_5V

c100 c100
10

+
FEEDB

ec50r25
Datum
15
SOFT

GND
GND
GND

1uF 1uF 2u2


OUT 2

C59 C46
D1
ec130r50
+ ec130r50
+
GND
GND

$plname
Name 100uF 100uF
GND

SB340
C60 C45
A

R13 C26
ec130r50
+ ec130r50
+
$plname
GND
GND

$plname
0.7
0.7

100uF 100uF
GND

100R 1nF
L1A

Blatt
Gepr ft
C61 C44
5
$plname

LP un.:
L1

ec130r50
+ ec130r50
+
GND
GND
100uH

100uF 100uF
8

13-09-95Datum LED3 R18 LED2 R20

20-07-94
Gezeich. 20-07-94
$plname $plname
$plname $plname R22 R23
GND
GND

rot 470R rot 2k2

1 von 2
+5V
Vcc

$plname $plname
Vdd
+15V

40121-060
GND

4k7 18k
L1B

Name
1.0

LP bs.: 30128-410
40121-060
M.Fritz
C28

J.Beller
c100
U_NEG
GND

1uF
C29

unzulssig
ec130r50
+
GND

Diese Zeichnung
$plname

100uF
2n2
C67

D6

C30
MUR120

rechtlich gesch tzt,


$plname

GND
MP4
C63

ohne unsere Genehmigung


ec130r50
+
GND
0.7

100uF
$plname

+ ec130r50

daher
GND
220R
R50

220uF C31

ist urheber-

Weitergabe und Vervielfltigung


C64
ec130r50
+
GND

$plname 100uF
2

GND

100nF
I

LED6 R15
$plname

ICC
$plname
$plname

to220l
GND

1 rot 3k3
G
D5

79xx
-15V
IC10
+24V

Gert/UNIT
GND
1N4148

C62

30128-410
Benennung/Title
3

+ $plname

GND
1uF
Vee

LED1 R19

Zeichnungsnummer/DWG.NO
-15V

$plname $plname

GND
rot 2k2

Kleinsp.Netzteil
0.7

Kleinsp.-Netzteil
30128-410
Low Voltage Supply
ICC 200, 300, 350
Art. No. 80116-201
09 / 2004

Vdd

5
IC4
+15V MP1
4
R1 RES IC8
7
DCH R5 R10
6 2 1 1 1
10k TP2 R4 THD OUT 3
2 10k 5k1
TRG

10
200k 100k 5 13
CV 4066 1
n.best

1
2 J2

4066
NE555 BS170
1

n.best
T1

IC8
R11

12
2

51k
TP1

C3
C4
3

1
3

10nF
10nF
GND GND 4

11
IC5 5

R16
100k
4 MP2 Vdd
R2 RES IC8 +15V
30128-410
7
DCH R7
6 3 1 1 4
10k TP3 R6 THD OUT 3 IC2 1
2 J3
TRG 10k GND +
C10 TDA7052 5 1
200k 100k 5 5
CV 4066 2 2
NE555 8 3
6n8
GND 4

+
Vdd
3 6 +15V

C5
C6
R37
C11
R39

C9
n.best

CIRCUIT DIAGRAMS
1uF

10nF
10nF
2k2
68nF
5k1
+
GND GND
GND GND GND GND GND GND

C16
IC7

3u3
4 MP3 J1
R3 RES GND
7
IC8
DCH A1
Low Voltage Supply

9 8 R9
10k TP4 6
THD OUT 3
1 1 A2
R8
2 10k A3
TRG GND
200k 100k 5 6 A4
CV 4066 +24V
A5
NE555 Vee
-15V Vdd A6
+15V A7

C1
C7
C8
Vcc A8

68nF
10nF
10nF
GND GND GND
+5V
A9
IC9 A10
TON1
R24 A11
1 TON2
RESET R TON-CPU
9 A12
CS-TON C1 10k TON3
A13
ALARM
3 2 A14
TON1 1D TIMEROFF
4 5 A15
TON2 RESERVE
6 7 A16
TON3
11 10 A17
ALARM
13 12 A18
TIMEROFF CS-TON
14 15 A19
RESERVE RESET
A20
40174 TON-CPU
A21
ICC 200, 300, 350

A22
RN1 A23
2
RESET
3 A24
CS-TON Vdd
9 A25
TON1 +15V
8 +24V A26
TON2 1
7 A27
TON3
6 A28
ALARM
5 A29

C2
R21

TIMEROFF
A30

68nF
n.best

4 MUR120
RESERVE GND
8*10k A31
U_IN
D4 A32

Vdd Diese Zeichnung ist urheber-


A Datum Name rechtlich gesch tzt, daher
Gert/UNIT
+15V
Weitergabe und Vervielfltigung
Gezeich. 20-07-94 M.Fritz ohne unsere Genehmigung ICC
unzulssig
Gepr ft 20-07-94 J.Beller Benennung/Title

C18
C65
C66

68nF
68nF
68nF
LP un.: 40121-060 Kleinsp.Netzteil
GND
LP bs.: 30128-410
Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 2 von 2 30128-410

183 / 266
Vdd IC4
+15V MP1
4
R1 RES IC8
7
DCH R5 R10
6 2 1 1 1
10k TP2 R4 THD OUT 3

184 / 266
2 10k 5k1
TRG

10
200k 100k 5 13
CV 4066 1
n.best

1
2 J2

4066
NE555 BS170
1

n.best
T1

IC8
R11

12
2

51k
TP1

C3
C4
3

1
3

10nF
10nF
GND GND 4

11
IC5 5

R16
40121-060

100k
4 MP2 Vdd
R2 RES IC8 +15V
7
DCH R7
6 3 1 1 4
10k TP3 R6 THD OUT 3 IC2 1
2 J3
TRG 10k GND +
C10 TDA7052 5 1
200k 100k 5 5
CV 4066 2 2
NE555 8 3
6n8
GND 4

+
Vdd
3 6 +15V

C5
C6
R37
C11
R39

C9
n.best

10nF
10nF
2k2
1uF
68nF
5k1
+
GND GND
GND GND GND GND GND GND

C16
IC7

3u3
4 MP3 J1
R3 RES GND
7
IC8
DCH R9 A1
6 9 1 1 8
10k TP4 R8 THD OUT 3 A2
2 10k A3
TRG GND
200k 100k 5 6 A4
CV 4066 +24V
A5
Vee
Low Voltage Supply (bare)

NE555
-15V Vdd A6
+15V A7

C1
C7
C8
Vcc A8

68nF
10nF
10nF
GND GND GND
+5V
A9
IC9 A10
TON1
R24 A11
1 TON2
RESET R TON-CPU
9 A12
CS-TON C1 10k TON3
A13
ALARM
3 2 A14
TON1 1D TIMEROFF
4 5 A15
TON2 RESERVE
ICC 200, 300, 350

6 7 A16
TON3
11 10 A17
ALARM
13 12 A18
TIMEROFF CS-TON
14 15 A19
RESERVE RESET
A20
40174 TON-CPU
A21
A22
RN1 A23
2
RESET

5
3 A24
CS-TON Vdd
9 A25
TON1 +15V
8 +24V A26
TON2 1
7 A27
TON3
6 A28
ALARM
5 A29
R21

C2
TIMEROFF
A30
n.best

68nF
4 MUR120
RESERVE GND
8*10k A31
U_IN
D4 A32

Vdd Diese Zeichnung ist urheber-


A Datum Name rechtlich gesch tzt, daher
Gert/UNIT
+15V
Weitergabe und Vervielfltigung
Gezeich. 20-07-94 M.Fritz ohne unsere Genehmigung ICC
unzulssig
Gepr ft 20-07-94 J.Beller Benennung/Title

C18
C65
C66

68nF
68nF
68nF
LP un.: 40121-060 Kleinsp.Netzteil
GND
LP bs.: 30128-410
Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 2 von 2 30128-410

CIRCUIT DIAGRAMS
Art. No. 80116-201
09 / 2004

+15V

5
U_INP
MP1

C20

NT_EIN
Vdd IC12

68nF
+15V R67
Vdd Vdd IC18 1 GND IC13
+15V +15V =1 3
5 2
AST 1k 11
4
AST 12 &
6 4030
-TRIG 10

C15

R51
R58
8 10

R52
100pF
Q

7k5
560R
+TRIG 13

1k
5 12
G GND R
- GND RTRIG 15 9
IC9 9 Q 11 CX
12 MR

20k
LM319 GND 2
RX

C21
4 13 14

TP13
33pF
+ OSC OUT RX/ CX
3 1 GND
CX
4528
1

D11
D12
R53
R88
30128-357
IC11

C28

10R
8k2
R65

1N4148
100pF
3

43k
GND GND GND GND RCX EA
6
4047 IA0
5
Vdd Vdd Vdd IA1
OA 7 IC21 IC21
Control board

+15V +15V +15V 4


IA2
3 6 8
IA3 S 1 S 13
3 11 A
C C
14 5 9
S0

R59
R69
EIN_AUS D 2 D 12
2 B

4k7
1k

CIRCUIT DIAGRAMS
IC13 S1 4
R 10
R
10
- 5
IC9 10 GND GND
7 4 & IB0 4013 4013
LM319 GND 11
R56 6 IB1
9 12 OB 9
+ 3 IB2 AN
8 R 13
1k 1 7 IB3 Vdd
CX IC17 +15V IC17
EB

R60
5 11

180R
4539

R68
C16
15 Vdd 4 12

9k1
GND GND 2 GND & &

2n2
RX/ CX +15V GND 6 10 AUS
4528 3 13
R R
1 7 15 9

Vdd
CX CX

+15V
R77
R86

C31
C32

5k6
5k6
2 14

33pF
33pF
Vdd Vdd RX/ CX RX/ CX
+15V +15V
4528 4528

R49
R54
R57 D10 Vdd Vdd Vdd

2k2
4k7
10 +15V +15V C30 +15V
-
10k 1N4148 IC4 7
GND
IPB Vdd
LM319 68nF
+15V

R78
9 + GND

1k
8 IC16 IC16
5 11

R70

R61
R50
R48
4 12

C10
4k7
& & MP2

820R
10k
560R

2n2
5 6 10
GND GND GND GND GND - 3
IC14 3 13
12 R R
ICC 200, 300, 350

LM319 GND 1 7 15 9 TSI

D16
D15
T4 CX CX
4 2

1N4148
1N4148
+ BS170
3

TP15
TP14

5k
C22
5k
C29

1
2 14

100pF
100pF

GND RX/ CX RX/ CX

D14
3V6

R72
R71
R73
D17

D13
3V6

33k
100R
1k
1N4148
4528 4528
U_PRIM GND GND GND Vdd GND GND GND
+15V

R81
R80

470R
1k

R76
C19
Vdd

1k
220pF
Vdd Vdd Vdd +15V
+15V C12 +15V C9 +15V C18

GND GND GND

R74
68nF 68nF 68nF

10k
11 11 11 Diese Zeichnung ist urheber-
10 C Datum Name rechtlich gesch tzt, daher
Gert/UNIT
+ + + HF_EIN -
Weitergabe und Vervielfltigung
IC9 IC4 IC14 IC14 7 Gezeich. 15.02.94 Fritz ohne unsere Genehmigung ICC
LM319 LM319 LM319 LM319 GND unzulssig
Gepr ft 28-11-94 Hagg Benennung/Title
- - - 9 +
6 C11 6 C8 6 C17 8
C 3584 C37,C38=330pF 30-1-96 Fritz
LP un.: 40128-095 CONTROL-BOARD
GND GND GND

R75
68nF 68nF 68nF

10k
Vee Vee Vee B 3371 R12=10R 11-94 Fritz LP bs.: 30128-357 Zeichnungsnummer/DWG.NO
-15V -15V -15V GND GND
Nr. nderung Datum Name Blatt 1 von 3 30128-357

185 / 266
Vdd
+15V C3

4
68nF GND Vdd Vdd Vdd
+ +15V +15V +15V
IC1 C26 R83 C25

186 / 266
TL084 GND MP5
- GND
1k

STEUERBUS
C1 IC8 68nF 8 IC12 68nF IC12
5 18 GND

11
IC15 6 8
+ =1 4 =1
GND
D0-D7 13
D0 VOUT 2 4 Vin Fout
1 5 1N4148 9
Vee 68nF
-15V 12 Vdd 3 RT
D1 U
11 +15V 7 4030 D18 4030
D2 CT F
10 6 CT DGND
2
D3

C23

C24
R47
R82
R12 9 -

R79
33pF

1nF
1k
1k
D4

4k7
U_FUNKE U_FUNKE/2 AD654 3 GND
8 5 10k
D5
10R 7
D C7 GND
30128-357

R38
R84
C27
5

5k
D6

4k7
2k
1nF
6 - T5
D7 IC4 2 TP16

TP8
A 2n2 12 BS170
LM319 GND 1
GND R36 GND
Vcc 4

20k

R43
Control board

+5V +

4k7
16 3

R85
2k LDAC

TP17
10k

FUNKE_AUS
15 GND MP3
13 CS_DAC2 WR GND GND GND
R11 - 14

D1
CS IC12

rot
IC1 Vdd

D7
U_PHASE 14 17

3
ANALOG_3 RESET RES +15V 13

1N4148
3k3 R10 TL084 =1 11 TSI_STE
12

5k
R44
12 +

10k
3 1 4
2

STE_EIN
AD7224

TP7
10k GND T1 4030
BC547

R35
1
Vcc GND

2k
+5V GND
IC10
GND GND
5
Vdd 4 &
Vdd IC5 +15V GND

+
R23 6 IC7
Vcc +15V 2

R55
3 2

C6
+5V

1k
3 R

3u3
2k GND GND
1 7 3
4 CX 1
6 4 & EIN_AUS
R4 - GND 5

R62

STEUERBUS
13 5

C13
IC1 19 3

D5
4k7
UP_HF 7 IC6 9 1 2

2n2
ANALOG_1 RX/ CX

1N4148
3k3 R5 TL084 10 4082

5k
D0-D7 18

REF
VCC
5 +
D0 11 4528
17

TP3
10k D1 12
16 C0 2
D2

C37
R24
15

330pF
2k
D3 4078
GND GND GND 14 C1 1
D4
R22 13 IPB
Vcc D5 D
+5V 12
D6 A IC10
2k 11 C2 24
D7 11
2 10
R6 - DAC_A0 A0 Vdd 12 &
IC1 9 +15V GND

D6
IP_PAT 1 DAC_A1 A1 C3 23 10
ANALOG_2

1N4148
3k3 R7 TL084 13 IC7

5k
3 + R
8 15 9 9
CS_DAC1 WR CX

TP4
10k 10
ICC 200, 300, 350

7 13
CS

R66
11 &

C38
R21
C14
3k9
14

330pF
2k
2n2

ANA0
ANA1
ANA2
ANA3
RX/ CX 12
GND
GND GND GND MAX516 5 4 21 20
R3 4528 4082
U_NETZT
5k6

n.best
U_NETZT/2
R25 U_INT_A

R1

TP1
5k1
GND GND
68k
R26
RESET

5
U_INT
NT_EIN
SICHER

-
3k3 IC2 1
LM324

D9
1N4148
+
3 +

5k
Diese Zeichnung ist urheber-
C Datum Name rechtlich gesch tzt, daher
Gert/UNIT

C36

TP2
15uF
Weitergabe und Vervielfltigung
Gezeich. 15.02.94 Fritz ohne unsere Genehmigung ICC
GND GND
GND unzulssig
Gepr ft 28-11-94 Hagg Benennung/Title

C 3584 C37,C38=330pF 30-1-96 Fritz


LP un.: 40128-095 CONTROL-BOARD
B 3371 R12=10R 11-94 Fritz LP bs.: 30128-357 Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 2 von 3 30128-357

CIRCUIT DIAGRAMS
Art. No. 80116-201
09 / 2004

5
1
R MP6
RESET
9
CS_DFF1 C1
Vdd
U_FUNKE/2 0.6
+15V
D0 3 2
1D DAC_A0
U_NETZT/2 Vdd D1 3u3 3u3
C5 4 5 DAC_A1
+15V + +
U_INT_A D2 6 7 MUX_A0
R28 GND D3 11 10 C33 C34
468nF MUX_A1 Vee
D4 13 12 GND
+ MUX_A2 0.6 -15V
6k8 IC2 D5 14 15
6 MUX_A3
- LM324

STEUERBUS
0.8
IC2 - 40174
7
11C4 J1
LM324 IC20
5 + A1 B1
1
Vee GND RESET R A2 B2
68nF 9
C1
IC3 -15V CS_DFF2 A3 B3
GND
30128-357

R27
4067 10 +24V A4 B4 +24V

750R
A0 MUX_A0 D0 3 2
1D BER_1 A5 B5
GND 11 MUX_A1 D1 4 5
A1 BER_2
14 Vee Vdd A6 B6 Vdd
A2 MUX_A2 D2 6 7
R8 FUNKE_AUS -15V +15V A7 B7 +15V
Control board

13 MUX_A3 D3 11 10
UP_HF_A A3
15 Vcc A8 B8 Vcc
INH D4 13 12
3k3 +5V A9 B9 +5V

5k
GND D5 14 15
D0 A10 B10
9 ANALOG_1

STEUERBUS

TP5
Y0

CIRCUIT DIAGRAMS
40174 D1 A11 B11
GND
8 ANALOG_2
Y1 D2
7 Vcc A12 B12 ANALOG_3
R9 Y2 R33
+5V D3 A13 B13
6 ANALOG_4
IP_PAT_A Y3 MP4 D4
5 2k A14 B14
3k3 Y4 9 D5

STEUERBUS
A15 B15

5k
4 -
Y5

D8
IC1 D6 A16 B16
3 8

TP6
ANALOG_4

1N4148
Y6 D7
GND 2 R37 TL084 A17 B17 SICHER
Y7 1

C35
10 + A18 B18
23 Z NT_EIN

180nF
R17 Y8 RESET
GND 22 1k A19 B19 HF_EIN
U_NESSY Y9 CS_DAC1
100R 21 A20 B20 STE_EIN
CS_DAC2

R34
Y10

5k
C2
A21 B21

2k
20 TEMP

1nF
Y11 CS_DFF1
GND GND A22 B22

TP9
19 CS_DFF2 TSI
Y12
GND 18 A23 B23 A
Y13 Vdd U_PRIM
R13 17 +15V A24 B24 B
Y14 TSI_STE
U_SYM 16 A25 B25 AN
Y15 I_HFL
3k3 A26 B26 AUS
RES_ANA2
A27 B27 U_INP

R14
RES_ANA1

5k1
D4
8V2
A28 B28 U_INT
IP_PAT
GND A29 B29 U_NETZT

3
IP_PAT_A
R18 A30 B30
UP_HF U_FUNKE
I_HFL R64
2 A31 B31 U_SYM
3k3 BER_1 UP_HF_A
T2 A32 B32

5k
10k U_PHASE U_NESSY
BC547

R2
3

TP10
n.best
1
GND GND Vdd R63 TP11 R45 D2
2 T3
R15 +15V +24V BER_2 BC338
10k 500R 100R 1N4148
ICC 200, 300, 350

RES_ANA1
TP12 U_NETZT
3k3 1 R46 D3

R39
R41
STEUERBUS

RN2

10k
10k

R16
500R 68R 1N4148 2

3k3
RESET
3 RN1
GND CS_DAC1 D0 2
R19 4 Vdd D1 3
CS_DAC2

R40
R42
5 +15V

2k
2k
RES_ANA2 CS_DFF1 D2 4 Vdd
1
3k3 GND GND 6 D3 5 +15V
CS_DFF2
7 1
D4 6

R20
NT_EIN

3k3
R32 8 D5 7
HF_EIN
GND 9
SICHER D6 8
R29 R31 2k 8x10k D7 9
13
- 10k 8x10k
4k7 12k IC2 14 STE_EIN
9
- LM324 R87
IC2 8 12 +
LM324 Diese Zeichnung ist urheber-
C Datum Name rechtlich gesch tzt, daher
Gert/UNIT
10 + GND
TEMP Weitergabe und Vervielfltigung
Vee Gezeich. 15.02.94 Fritz ohne unsere Genehmigung ICC
-15V unzulssig
Gepr ft 28-11-94 Hagg Benennung/Title

R89
R30
10k
4k7
GND GND
C 3584 C37,C38=330pF 30-1-96 Fritz
LP un.: 40128-095 CONTROL-BOARD
B 3371 R12=10R 11-94 Fritz LP bs.: 30128-357
Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 3 von 3 30128-357

187 / 266
ICC 200, 300, 350
Control board (bare)
40128-095

188 / 266 5 CIRCUIT DIAGRAMS


Art. No. 80116-201
09 / 2004

+15V +15V

5
J1

C7
C6

68nF
68nF
A1
A2 GND GND
A3
GND
A4 IC2 Vdd

3u3
+15V

C12
+
A5 Vdd 11 12

D1
+15V 1
A6

1
MUR860
A7 4049
IC1
A8 IC2

1
2 T3 D8
A9 3 9 10 2 T1
1 & 1 VN10KM
A10

3
MUR120 J2
A11 4011 4049 T4 UE1 D10 D9
30128-528
2 1

D3
C2
A12 IC2 VN10KM

MUR860
u68
2

3
14 15 1 MUR120 1N5346 IRFP460

R3
A13 1

150R
GND GND
A14 3
4049

R2
C5
A15

2k2
22nF
2

R5
A16

150R
A17 IC2
A18 7 6 30128-539
1

CIRCUIT DIAGRAMS
A19
QC Power Stage

IC4 4049
A20 IC1
2 IC2
A21 3 8

1
T7

+
C1
C3
1 & 10 5 4 2

1uF
1uF
A22 9 & 1 VN10KM

3
C8
A23 4081

3u3
4011 4049 T8
A24 IC2 2 MP1
VN10KM
A25

3
3 2
1 J3
A26 GND GND GND
A27 1
4049
A28 2
A29
A30 IC3 Vdd
+15V
A31 3 2 MP2

D2
1

1
A32

MUR860
4049
IC1
IC3

1
12 T10 D7
11 5 4 2 T2
13 & 1 VN10KM

3
MUR120
4011 4049 T9 UE2 D5 D6
2

D4
IC3 VN10KM

MUR860

3
7 6 1 MUR120 1N5346 IRFP460

R4
1

150R
GND GND
3
4049

R1
C4
2k2
22nF
2

R6
150R
IC3
9 10 30128-539
1

1
ICC 200, 300, 350

IC4 4049
IC1 IC3
5
4 6

1
T6

+
6 & 4 11
1 12 2
5 & VN10KM

3
C9
4081

3u3
4011 4049 T5
IC3 2
VN10KM

3
14 15

9
6
8
4
2
3
7
5
1
Vdd GND GND GND
+15V 4049

RN1
8*10k

1
Vdd
GND 1 +15V

R7
100k
D11
BC557
2 T11 1N4148
11V Diese Zeichnung ist urheber-
B Datum Name Gert/UNIT

C11
rechtlich gesch tzt, daher

68nF
3 D12 Weitergabe und Vervielfltigung
Gezeich. 11-12-95 M. Hagg ohne unsere Genehmigung ICC
R8 GND
unzulssig
IC4 IC4 Gepr ft Benennung/Title
8 12 100k

+
10 11
9 & 13 & LP un.: 40128-127 QC Power Stage

R9
C10

1k
1uF
4081 4081 LP bs.: 30128-528
GND GND GND GND Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 1 von 1 30128-528

189 / 266
ICC 200, 300, 350
QC Power Stage (bare)
40128-127

190 / 266 5 CIRCUIT DIAGRAMS


Art. No. 80116-201
09 / 2004

U-NT-STE

5
MP4
UE2 REL1
3 7 C1
$rpname $plname D3 UE1 L1
2 U-HF-AE $plname

d50b10skk
$plname $rpname $plname c225_6
9 MUR860 5
1n5

+
1 158uH

+
10 REL1 4
QKE1 1 2

C4
R4
MP3

C14
C7
C5
C17 3 3

ec150r
22uF
$plname
47k
C2
$plname

ec130r
10uF
c380
68nF
c225_11
10nF
L2

c100
150pF
4 12 2
2 $plname c430 $plname

C6
1

c225_11
0.47uF
52uH 9n5

+
+
1 $plname
U-HF-NE
GND
J2
J4 GND
30128-044

C10
R6
C11

ec150r
22uF
$plname
47k
ec130r
10uF
QKE2 D4 R5
d50b10skk r200

MUR860 0R47
GND GND-STE

30128-492
30128-478

C12
c100
150pF
T1 T2

T2_TSI
$plname $plname
UE3
R1
2 IC1 7

R11
$plname

R13
R14
R15
7667

$plname
2k
Power Module

1 2 Vdd $plname IRFP450 IRFP450

r150
1k
r150
1k
r150
1k
$rpname
3R3
+15V

R19
$plname

$plname
3R3

CIRCUIT DIAGRAMS
30121-073 GND

R12
D2
R7
4 IC1 5

r150
330R
BA159
$plname
470k

$plname
J14
7667 $plname Vdd

R9
1
m3schraub
$rpname

$plname
10k
1.0 +15V
J1 T3
Power Module (UL)

+
A1
$plname

C28
A2 R10

C8

C9
22nF
c150

3u3
68nF

$plname
$plname
A3 GND $plname

C16
C13
R8
10k BUZ74

u68
1nF
$plname
200k

c150
$plname
A4

+
A5 Vdd GND

C18
A6 +15V

1uF
$plname
GND GND GND GND GND

R3
R16
A7

$plname
51k
$plname
1k
A8
A9 GND
A10
A11
A12

NTE
TSI
A13

U-INP
U-INT
U-PRIM
A14

$plname
$rpname
U-NETZT
A15 TEMP

D5

REL1
A16

1N4148
$plname
A17
A18 NTE
Vdd MP2 2.0
A19 NTC1
+15V R2 1206
J3
A20 Vdd
+15V 0.8 $plname 1
A21 U-NT-STE
ICC 200, 300, 350

TEMP 30k 10k 2


A22 C3 3
A23 TSI MP1
4
$plname
A24
68nF 5

+
A25 U-PRIM GND-STE $plname
D1
A26

C15
3u3
$plname
$plname
A27 U-INP 9V1
A28 U-INT GND GND
A29 U-NETZT
A30
A31
A32
Diese Zeichnung ist urheber-
19-11-97 D Datum Name rechtlich gesch tzt, daher
Gert/UNIT
Weitergabe und Vervielfltigung ICC
Gezeich. 31-05-95 M.Fritz ohne unsere Genehmigung
unzulssig
Gepr ft 40128-117
31-05-95 M. Hagg Benennung/Title Power-Module

D 3696 s.Anderungsmitt. 22-1-96 Fritz


LP un.: 40128-117 Power-Module
C 3570 s.Anderungsmitt. 17-7-95 Fritz LP bs.: 30128-478 Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 1 von 1 30128-478

2 IC2 7
7667 $plname

$rpname

R17 R18
4 IC2 5 T2_TSI
TSI $plname $plname
7667 $plname
$wert $rpname
$wert

191 / 266
ICC 200, 300, 350
Power Module (bare)
Power Module UL (bare)
40128-117

192 / 266 5 CIRCUIT DIAGRAMS


Art. No. 80116-201
09 / 2004

MP3 MP1

5
GND

IC1
10 9
SG CLK Q1
7
TSI-STE Q4
5
Q5
4
Q6
6
Q7
13
Q8
Q9 12 F-ST REL3 REL3
3
AE
30128-555
14
Q10 2
Q11 15 REL19
C1 R1 1
1 UE1
Q12 J4
J1 2 1
Q13 4k7
11 3 J3 1nF
A1 AUS R Q14 R2
GND

C4
C3
D1
A2 1 2

u33
150pF
4020

MUR860
A3 REL19 4k7
C2

CIRCUIT DIAGRAMS
ST Power Stage

+24V L1 REL2 REL2 J5


A4 Vdd
1 3 1
A5 +15V
J2 2 1nF
A6 RN2
D0 1 GND
A7 BUS 2 GND J14
D1 3
A8

C6
D2 4

68nF
A9 Vdd REL1 REL1 J6
D0 GND D3 5 1
A10 BUS 1 +15V
D1 D4 6
A11
D5 7 D4
A12 D2 2 IC4 7
D3 D6 8 7667
A13 1N4148
D7 9 T1 J7
A14 D4
SG 1
A15 D5 8x10k NE
R3 2
A16 D6 4 IC4 5
IC6 3
A17 D7 REL1 +24V 7667 11N80
1 10R
A18 RESET R
CS3 9 AUS

C5
A19 CS5 C1
RESET Vdd

6n8
A20 CS5 +15V
BUS D0 3 2 GND GND
A21 1D IC7 REL2
D1 4 5 3 14

+
A22 F-ST D2 14 15 4 ULN2004A 13

C9
C10
A23

68nF
3u3
D3 13 12 1 16
A24
D4 11 10 2 15 GND GND
A25 REL3
D5 6 7 5 12
A26 TSI-STE 6 11
A27 40174
7 10
ICC 200, 300, 350

A28
A29 REL19
8 9
A30
RN1
A31 2 GND
CS3
A32 4
CS5
3 Vdd
RESET
5 +15V
1
6
7
8
9 Diese Zeichnung ist urheber-
B Datum Name rechtlich gesch tzt, daher
Gert/UNIT
8x4k7 Weitergabe und Vervielfltigung
Gezeich. 15-03-96 M.Fritz ohne unsere Genehmigung
ICC
unzulssig
0.8 0.6
Gepr ft Benennung/Title

LP un.: 40128-129 ST-Power-Stage


GND B R1,R2 neu hinzu 12-8-96 Fritz LP bs.: 30128-555
Zeichnungsnummer/DWG.NO

Vdd
+15V
Nr. nderung Datum Name Blatt 1 von 1 30128-555

193 / 266
ICC 200, 300, 350
ST Power Stage (bare)
40128-129

194 / 266 5 CIRCUIT DIAGRAMS


Art. No. 80116-201
09 / 2004

R36

5
D26
7k5
1N4148
Vdd
+15V C28

GND
68nF
7
R21 R47
2 1 13
-+ 8 -
7k5 2k IC7 D27 R48 IC8
OFF 6 14 IP_PAT
BIPOLAR MONO AD844 TZ TL084
1N4148 1k
NE AE AE 3 +
- 5
12 + R50

C30

R49
4

C27
D31
D32
1nF
R61
C29

1M
10k

220pF
4k7

1N4148

NE_NESSY
J5
J3
30128-561
GND GND GND GND GND GND GND GND

5
4
3
2
1
1
2
3
Vee 3 +
68nF
-15V TL084 IP_PAT_A
1
IC8
Senso-board

-
2
R62 R63

REL1
REL3
REL2
GND 750R 6k8

TEILER
Vdd

CIRCUIT DIAGRAMS
+15V
R52

REL1
REL3
REL2
D10
7k5
NE 1N4148
Vdd
+15V C14

J9
J7

R25
GND

R23
D22
2k

D33
15V
1:50 R20

560R
J8 68nF

1N4148
5 7
AE - 3
J10 18k IC3 2 1 6
12 -+ 8 -
1 2 LM319 GND IC4 D23 R54 IC8
T3 OFF 6 7 UP_HF

R11
4 2 TZ

R12
D16
D17
R74
+ AD844 TL084

1k
BS170

1k
3M3
3 1N4148 1k

1N4148
UE1 1 3 + 5 + R51
- 5

C33

R53
R64

Vee 4

R67
R38
R24
D28
D29
1nF
C15

1M
4k7

10k

10k
470R
2k
GND GND GND GND -15V GND GND

1N4148
GND GND GND GND GND GND GND GND GND
R17 Vee 10 +
Vee 68nF
-15V -15V TL084 UP_HF_A
8
7k5 Vdd IC8
-
+15V 9
R37 R39
C1 UE2

R14
GND 750R 6k8

10k
150pF 10
- 3 +
1 2 IC3 D20 D21

R15
7 TL084 U_PHASE

2k
LM319 GND 1
R22 1N4148 1N4148 IC9
9 + -
8 2
ICC 200, 300, 350

10k R55
100:8

1k3
4k7

R13
C13

D19
D18

R16
R40

10R
u22

2k
1N4148
R65

3
2
1
3
2
1
4k7
GND GND GND GND

J2
J1
GND GND GND GND

NE AE Vdd Vdd
+15V +15V
C11 C32
FROM GENERATOR
68nF GND 68nF GND
4
11
+ +
IC3 IC8
Diese Zeichnung ist urheber-
LM319 TL084 B Datum Name rechtlich gesch tzt, daher
Gert/UNIT
- - Weitergabe und Vervielfltigung
MP1 6 Gezeich. 12.08.96 Fritz ohne unsere Genehmigung ICC
C12 11 C31
unzulssig
Gepr ft 12.08.96 Fritz Benennung/Title
GND GND
68nF 68nF LP un.: 40128-130 SENSO-BOARD
Vee Vee
GND -15V -15V B 4343 C39 neu hinzu 12-1-98 Fritz LP bs.: 30128-561
Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 1 von 3 30128-561

195 / 266
R10 6
-
1k IC9 7 U_FUNKE
2 UE5 D15 R32 TL084

I+9
- 5 +

196 / 266
IC2 1 1
1 1N4148 0R
R1 R2 R6 R7 TL082 14
AE
3 +
2 T1 3
IC1

C4
VN10KM

C22
750k 750k 10k 10k

220pF
R33

10nF
R58
5 3 2

22k
4k7
I+9 AST
4

D2
15V
AST 1
6 8:8:8 GND GND GND GND

C5
-TRIG

R8
10nF
8 10

150k
+TRIG Q T2

D1
12
G 2

15V
RTRIG VN10KM
R4 R5 9 11 3
Q
NE IMAS
2
MR
30128-561
750k 750k RX Vdd
13 +15V
OSC OUT
1
CX 4
Senso-board

R3
C8
IC9

1k

IMAS
1nF
3 TL084
RCX
-
4047 11
7

I+9
Vee
-15V

8 6
-

IMAS
IMAS
+
IC2 IC2 7
TL082 TL082
- 5 +
4

I-9
IMAS
Vdd Vdd
+15V +15V R9 D4
I+9
10R 1N4148
1N4148

C24
UE6 I-9

10nF
D6

+
1 2

1uF
C7
D3

C23
9V1
C6

R34
2n2
1uF
D5
9V1

1k
3
12:16
IMAS
ICC 200, 300, 350

+
2
T6

C26
3u3
BC547

C9
1

18pF

C25
C10

R35

D25
3V
1uF
18pF

56R
GND GND GND GND GND

Diese Zeichnung ist urheber-


B Datum Name rechtlich gesch tzt, daher
Gert/UNIT

5
Weitergabe und Vervielfltigung
Gezeich. 12.08.96 Fritz ohne unsere Genehmigung ICC
unzulssig
Gepr ft 12.08.96 Fritz Benennung/Title

LP un.: 40128-130 SENSO-BOARD


B 4343 C39 neu hinzu 12-1-98 Fritz LP bs.: 30128-561
Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 2 von 3 30128-561

CIRCUIT DIAGRAMS
Art. No. 80116-201
09 / 2004

J4

5
1
NE_NESSY 2 Vdd
NE +15V
3

C36
3u3
D9 10 +

+
C20 GND
UE4 UE3 TL084 U_SYM

C35
1N4148 8
IC9

3u3
1 -
2n2 9 Vee

R72
L2
R27 R56

C2
-15V

10k
100uH

u1
1 2 3

R73

L1
1k 3k

100R

3m3
2

C3
R71
u1
C38
C57

10k
R26
R57

68nF
1uF

10k
3k
30128-561
9:7 2:2:15 GND
GND GND GND GND J6
R28 A1
A2
Senso-board

Vdd GND
2k4 C18 A3
+15V
+24V A4
GND

R42
A5

C39
7 68nF

R29
12k
Vee

10nF
150R
2 1 -15V Vdd A6
-+ 8

CIRCUIT DIAGRAMS
C16 R60 D30 +15V A7

R18
R19 IC5 B/C1 C2 6

2k4
LM318 B/C3 12 + A8
1k 1N4148 Vcc
2k4 1nF 3 + TL084 U_NESSY +5V A9
- 5 14
IC9 D0 A10

C34
4

R59
-

68nF
C21 D1 A11

30k
13

C19
C17
R41
R43

1nF
220pF
D2 A12

4k7
10k
R66
4k7
GND GND GND GND
Vee GND D3 A13
-15V 68nF GND GND GND
D4 A14
D5 A15
D6 A16
D7 A17
STEUERBUS
A18
A19
A20
A21
U_FUNKE
A22
Vdd U_SYM
+15V Vdd A23
U_NESSY
+15V A24
3 U_PHASE
Vdd A25
UP_HF_A
2 +15V A26

R31
R44
UP_HF
T4 Vdd

5k6
5k6
8 A27
BC547 +15V IP_PAT_A
R30 + A28

+
1
1 7 IC6 IP_PAT
3 A29

C37
1 -
10k +24V

3u3
BC557 LM311 A30

RN1
T5 2 IC10 A31

8x10k
1 +

2
3
4
5
6
7
8
9
2 1
GND R A32
B B/S -
ICC 200, 300, 350

9
C1

D0
D1
D2
D3
D4
D5
D6
D7
3 5 6 4

D24

1N4148
Vee STEUERBUS
D13
D14
D7

D0 3 2
REL2
REL3
REL1

-15V Vee Vee 1D TEILER


1N4148
1N4148
1N4148

-15V D1 4 5
-15V OSZI_DIS
3 3 D2 6 7 3 3 3
D3 11 10 R70
T7 T8 D4 13 12 2 2 2
2 2 T11 T9 T10
BS170 BS170 D5 14 15 10k
1 1 BC547 BC547 BC547
R69 1 1 1
OSZI_DIS 40174
GND GND GND
10k

R46
R45
R68

10k
1k
GND GND GND
10k
Diese Zeichnung ist urheber-
B Datum Name rechtlich gesch tzt, daher
Gert/UNIT
Weitergabe und Vervielfltigung
Gezeich. 12.08.96 Fritz ohne unsere Genehmigung ICC
unzulssig
Gepr ft 12.08.96 Fritz Benennung/Title

LP un.: 40128-130 SENSO-BOARD


B 4343 C39 neu hinzu 12-1-98 Fritz LP bs.: 30128-561
Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 3 von 3 30128-561

197 / 266
ICC 200, 300, 350
Senso-board (bare)
40128-130

198 / 266 5 CIRCUIT DIAGRAMS


Art. No. 80116-201
09 / 2004

5
J5
2

J4
Power-Module
Mainboard 1
J3

J6
30128-479

CIRCUIT DIAGRAMS
J2
1
Upper Wiring Module

2
QK-Endstufe
J1
1
2
ICC 200, 300, 350

Diese Zeichnung ist urheber-


A Datum Name rechtlich gesch tzt, daher
Gert/UNIT
Weitergabe und Vervielfltigung ICC
Gezeich. 17-05-95 M.Fritz ohne unsere Genehmigung
unzulssig
Gepr ft 17-05-95 M.Hagg Benennung/Title

LP un.: 40128-118 Upper Wiring Module


LP bs.: 30128-479
Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 1 von 1 30128-479

199 / 266
ICC 200, 300, 350
Upper Wiring Module (bare)
40128-118

200 / 266 5 CIRCUIT DIAGRAMS


PCBs
only for ICC 200
202 / 266 5 CIRCUIT DIAGRAMS
Art. No. 80116-201
09 / 2004

5
CPU Kleinspannung+Ton Control-Board QK-Endstufe Leistungsteil ST-Endstufe

J1 Vcc J2 J3 J4 J5 J6
A1 C1
+5V A1 A1 B1 A1 A1 A1

A2 C2 A2 A2 B2 A2 A2 A2
GND GND GND GND GND GND
A3 C3 A3 A3 B3 A3 A3 A3
GND
A4 C4 A4 +24V A4 B4 A4 A4 A4
+24V +24V +24V +24V +24V
A5 C5 A5 A5 B5 A5 A5 A5

A6 C6 A6
Vee Vee A6 B6
Vee A6
Vee A6
Vee A6
Vee
CS Vdd
ANALOG-1 Vdd -15V Vdd -15V Vdd -15V Vdd -15V Vdd -15V
A7 C7 A7 +15V -15V A7 B7 A7 A7 A7
ANALOG-2 +15V +15V +15V +15V +15V
A8 C8 A8 A8 B8 A8 A8 A8
ANALOG-3 SET Vcc Vcc Vcc Vcc Vcc Vcc
A9 C9 A9 A9 B9 A9 A9 A9
30128-033
+5V +5V +5V +5V +5V +5V
ANALOG-4
A10 C10 A10 A10 B10 A10 A10 A10
ESD0 ESD0 ANALOG-1 ESD0 ESD0 ESD0
A11 C11 A11 A11 B11 A11 A11 A11
ESD1 ESD1 ANALOG-2 ESD1 ESD1 ESD1
Motherboard

A12 C12 A12 A12 B12 A12 A12 A12


ESD2 ESD2 ANALOG-3 ESD2 ESD2 ESD2
A13 C13 A13 A13 B13 A13 A13 A13
EIN1 EIN12 ESD3 ESD3 ANALOG-4 ESD3 ESD3 ESD3
A14 C14 A14 A14 B14 A14 A14 A14
EIN2 EIN13 ESD4 ESD4 ESD4 ESD4 ESD4
A15 C15 A15 A15 B15 A15 A15 A15
EIN3 EIN14 ESD5 ESD5 ESD5 ESD5 ESD5
ICC 200

A16 C16 A16 A16 B16 A16 A16 A16

CIRCUIT DIAGRAMS
EIN4 EIN15 ESD6 ESD6 ESD6 ESD6 ESD6
A17 C17 A17 A17 B17 A17 A17 A17
EIN5 EIN16 ESD7 ESD7 SICHER ESD7 ESD7 ESD7
A18 C18 A18 A18 B18 A18 A18 A18
EIN6 EIN17 CS1 RESET NT-EIN NTE CS6
A19 C19 A19 A19 B19 A19 A19 A19
EIN7 EIN18 RESET CS2 HF-EIN REL-NT RESET
A20 C20 A20 A20 B20 A20 A20 A20
EIN19 CS3 STE-EIN CS7
A21 C21 A21 A21 B21 A21 A21 A21
CS4 TEMP TEMP
A22 C22 A22 A22 B22 A22 A22 A22
CS5 TSI F-ST
A23 C23 A23 A23 B23 A23 A23 A23
EIN8 SICHER U-PRIM A A TSI
A24 C24 A24 A24 B24 A24 A24 A24
EIN9 EIN20 TSI-STE B B
A25 C25 A25 A25 B25 A25 A25 A25
EIN10 EIN21 I-HFL AN AN U-PRIM
A26 C26 A26 A26 B26 A26 A26 A26
EIN11 EIN22 RES-ANA2 AUS AUS TSI-STE
A27 C27 A27 A27 B27 A27 A27 A27
PSD7 EIN23 RES-ANA1 U-INP U-INP
A28 C28 A28 A28 B28 A28 A28 A28
PSD5 PSD6 IP-PAT U-INT U-INT
A29 C29 A29 A29 B29 A29 A29 A29
PSD3 PSD4 IP-PAT-A U-NETZT U-NETZT
A30 C30 A30 A30 B30 A30 A30 A30
PSD1 PSD2 UP-HF U-FUNKE
A31 C31 A31 A31 B31 A31 A31 A31
PSD0 UP-HF-A U-SYM
A32 C32 A32 A32 B32 A32 A32 A32
RESET U-PHASE U-NESSY
24V-TR

24V-TR

I-HFL

GND

Diese Zeichnung ist urheber-


B Datum Name rechtlich gesch tzt, daher
Gert/UNIT
Weitergabe und Vervielfltigung ICC 200
Gezeich. 25-05-92 M.Fritz ohne unsere Genehmigung
unzulssig
Gepr ft Benennung/Title

LP un.: 40128-025 Motherboard 200


RN18=2k2 8-93 MF LP bs.: 30128-033
Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 1 von 5 30128-033

203 / 266
Senso-Board Mono-Output-Board Vcc Vcc Vcc Vdd Vdd
+5V +5V +5V +15V +15V

1
1
J7

C24
A1 J8

68nF

204 / 266
1 2
A2

C3
C4
FING-A1

RN8
RN15
GND RELAIS

68nF
68nF
3 4

8*10k
8*10k
A3 FING-B1 GND

2
3
4
5
6
7
8
9
2
3
4
5
6
7
8
9
A4 5 6
+24V Vdd GND GND
A5 +24V 7 8 +15V
A6
Vee 9 10
A7
Vdd -15V RESET
+15V
A8
A9
Vcc GND
+5V IC4
A10 IC10
ESD0
A11 DMUX 11 1 16
RESET
30128-033
ESD1 0 ULN2004A
A12 9 2 15
ESD2 1 CS1 Ton J2
A13
Vcc R1 10 3 14
Motherboard

ESD3 +5V 2 CS2


A14 8 4 13
ESD4 3 CS3
A15
10k 1 7 5 12
ESD5 CS C20 4 CS4
A16 6 6 11
ESD6 5 CS5
A17 2 5 7 10
ESD7 PSD0 20D 0 6 CS6
ICC 200

A18 3 0 4
CS8 PSD1 7
A19 21 G 18 8 9
RESET PSD2 15 8 Vdd
A20 22 17 +15V
PSD3 3 9 GND
A21 20
U-FUNKE 10
A22 23 19

1
U-SYM SET EN 11
A23 14
U-NESSY 12
A24 Vcc R2 13

RN16
U-PHASE 13
+5V

8*10k
A25 16
UP-HF-A 14

2
3
4
5
6
7
8
9
A26 10k 15 15 IC11
UP-HF 4514 1 16
A27 CS7
IP-PAT-A 2 ULN2004A 15
A28 CS8
IP-PAT 3 14
A29 CS9
A30 4 13
CS10
A31 5 12
CS11
A32 6 11
CS12
7 10

8 9

GND

GND
J9 GND
1 2

Vcc Vdd -15V 3 4 -15V Vdd Vcc


+5V +15V Vee +24V 5 6 +24V Vee +15V +5V
CS13
7 8
CS14
9 10

8
9
7
6
5
4
3
2
11 12
13 14
ESD0 FING-A3
15

RN9
16 FING-B3

8*10k
ESD1
17

1
18 RES-B1
ESD2
19 20
ESD3 RES-B2
21 22 Vcc
ESD4 RES-B3
23 24 +5V
ESD5 RES-B4
25 26
ESD6 RES-B5
27 28
ESD7 RES-B6

5
29 30
RESET RES-F1
31 32
CS11 RES-F2 Diese Zeichnung ist urheber-
33
B Datum Name rechtlich gesch tzt, daher
Gert/UNIT
34 RES-F3
CS12 Weitergabe und Vervielfltigung ICC 200
35 36 Gezeich. 25-05-92 M.Fritz ohne unsere Genehmigung
RES-F4
37 unzulssig
38 RES-F5 Gepr ft Benennung/Title
RES-ANA1
39 40
RES-ANA2
LP un.: 40128-025 Motherboard 200
RN18=2k2 8-93 MF LP bs.: 30128-033
Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 2 von 5 30128-033

CIRCUIT DIAGRAMS
Art. No. 80116-201
09 / 2004

5
+24V
REL1

RLV
REL1
D1
J11
1

2 REL1 1N4148
5 R3 D2
6
3k6 $wert
R5 F1

~
100R BR1 Vdd Vcc
T200mA
30128-033
+15V +24V +5V
- + Vee
-15V 0.5 0.5
BH37933 Leistungsteil

~
+
Motherboard

J20 J16

C6
R6
1 1

680uF
22k
J15
1 6

3 0.5
ICC 200

CIRCUIT DIAGRAMS
C11
C22
C9
C23
C8
C10
2

68nF
68nF
68nF
68nF
68nF
68nF

+
J14
GND GND GND GND GND GND

C7
R9
C5

680uF
22k
u68
Vdd Vcc Frontplatte
Gehuse J19
1 +15V +5V J10
TR1 1
2

~
1 J22 J18 BR2 3
1 1

Prim.1
J12
24V-TR MASSE

Sek.
- +

+
J13

~
B250C5000

Prim.2
1

C32
C33
C15

u022
u022
1000uF
24V GND
GND
GND
J21 J17
1 1

Diese Zeichnung ist urheber-


B Datum Name rechtlich gesch tzt, daher
Gert/UNIT
Weitergabe und Vervielfltigung ICC 200
Gezeich. 25-05-92 M.Fritz ohne unsere Genehmigung
unzulssig
Gepr ft Benennung/Title

LP un.: 40128-025 Motherboard 200


RN18=2k2 8-93 MF LP bs.: 30128-033
Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 3 von 5 30128-033

205 / 266
GND Vdd
+15V

1
1

206 / 266
RN5
RN12

8*4k7
8*10k

2
3
4
5
6
7
8
9
2
3
4
5
6
7
8
9
IC7
1 16
PSD0 ESD0
2 ULN2004A 15
PSD1 ESD1
3 14
PSD2 ESD2
4 13
PSD3 ESD3
5 12
PSD4 ESD4
6 11
PSD5 ESD5
30128-033
7 10
PSD6 ESD6
ESD7

PIO-Ausgnge
PSD7
Motherboard

D8 8 9
R10 Vdd Vcc

ext. Steuerbus
+15V +5V
GND
$wert 2k2

1
D3
ICC 200

RESET Vdd

RN6
1N4148 +15V

8*10k

2
8
7
6
5
4
3
9
1
IC2
1
R

RN13
9

8*10k
CS13 C1 IC8
1 16

3
4
5
6
7
8
2
9
3 2 2 ULN2004A 15
1D HF-EIN
4 5 3 14
NT-EIN
6 7 4 13
RES-F1
11 10 5 12
RES-F2
13 12 6 11
NTE
14 15 7 10
RES-F3
40174
Vcc 8 9
+5V
GND

1
D4
Vdd

RN7
1N4148 +15V

8*10k

2
8
7
6
5
4
3
9
1
IC3
1
R

RN14
Signalleitungen

8*10k
CS14 C1

2
3
4
5
6
7
8
9
IC9
3 2 1 16
1D RES-F4
4 5 2 ULN2004A 15
RES-F5
6 7 3 14
REL-NT
11 10 4 13
RELAIS
13 12 5 12
RLV
14 15 6 11
STE-EIN

5
7 10
40174 SICHER

8 9

SICHER
GND

Vcc Vcc
+5V +5V
Diese Zeichnung ist urheber-
B Datum Name rechtlich gesch tzt, daher
Gert/UNIT
Weitergabe und Vervielfltigung ICC 200
Gezeich. 25-05-92 M.Fritz ohne unsere Genehmigung
unzulssig

C1
C2
Gepr ft Benennung/Title

68nF
68nF
GND GND
LP un.: 40128-025 Motherboard 200
RN18=2k2 8-93 MF LP bs.: 30128-033
Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 4 von 5 30128-033

CIRCUIT DIAGRAMS
Art. No. 80116-201
09 / 2004

GND

5
Vdd Vcc
GND +15V +5V

1
1

1
1
RN10
RN3

8*10k
8*10k
FuÆschalter 1

RN18
RN17
Vdd

2k2
8*10k
2
3
4
5
6
7
8
9
2
3
4
5
6
7
8
9
J23 R12 +15V

5
3
7
6
8
9
4
2
2
3
5
4
6
7
8
9
1 EIN19
2 680R R15 IC13 IC5 EIN20
3 R14 3 2 14 15
680R 1 FUSS-B1 FUSS-A1 1 EIN1

680R 4050 4050


IC13 IC5

C17
C16
14 15 3 2

68nF
68nF
FuÆschalter 2 1 FUSS-A1 FUSS-B1 1 EIN2
30128-033
Vdd
R11 +15V GND GND
J24 4050 4050
1
R17 IC13 IC5
Motherboard

2 680R 11 12 5 4
3 R16 1 FUSS-B2 FUSS-A2 1 EIN3
680R
4050 4050
680R
IC13 IC5
5 4 11 12
ICC 200

FUSS-A2 EIN4

CIRCUIT DIAGRAMS
C19
C18
1 FUSS-B2 1

68nF
68nF
Vdd
R13 +15V GND GND 4050 4050
J25
1 IC13 IC5
2 680R R18 7 6 7 6
FING-B3 1 FUFI-B3 RES-B5 1 EIN17
3 R19
680R FING-A3
4050 4050
680R IC13 IC5
9 10 9 10
1 FUFI-A3 RES-B6 1 EIN18

C20
C21
68nF
68nF
4050 4050
GND GND

Vdd Vcc GND


Vcc
+15V +5V +5V

1
1
1
1

RN2
RN1
RN11
RN4

8*10k
8*10k
8*10k
8*10k

9
7
3
5
8
6
2
4
3
4
5
7
9
2
8
6
2
3
4
5
6
7
8
9
2
3
4
5
6
7
8
9

EIN21
IC1 EIN22 IC6 EIN23
14 15 14 15
1 EIN7 FING-A1 1 EIN5

4050 4050
IC1 IC6
5 4 3 2
F-ST 1 EIN8 FING-B1 1 EIN6

4050 4050
IC1 IC6
11 12 5 4
1 EIN9 1 EIN13

4050 4050
IC1 IC6
7 6 11 12
RES-B1 1 EIN10 1 EIN14

4050 4050
IC1 IC6
9 10 7 6
RES-B2 1 EIN11 FUFI-B3 1 EIN15

4050 4050
IC1 IC6
3 2 9 10
RES-B3 1 EIN12 FUFI-A3 1 EIN16

4050 4050
Diese Zeichnung ist urheber-
B Datum Name rechtlich gesch tzt, daher
Gert/UNIT
Weitergabe und Vervielfltigung ICC 200
Gezeich. 25-05-92 M.Fritz ohne unsere Genehmigung
unzulssig
Gepr ft Benennung/Title

LP un.: 40128-025 Motherboard 200


RN18=2k2 8-93 MF LP bs.: 30128-033
Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 5 von 5 30128-033

207 / 266
ICC 200
Motherboard (bare)
40128-025

208 / 266 5 CIRCUIT DIAGRAMS


Art. No. 80116-201
09 / 2004

J1 J3

5
+24V 1 1
J5
1 2 2 2
RELAIS FING_A1
3 4 3 3
FING_B1

C11
5 6

10nF
7 8
Vdd

D8
+24V +15V REL1 REL1

REL1
1N4148
9 3

3
4
10
2

+
UE1
1

1
2

C8
RELAIS J2

3u3
R2 R1 J4
GND GND 1
Vdd D2 2
+15V 150R 56R
3

D3

R4
D6
IC1 BA159

680R
UE2 11V

1N4148
1N4148
30128-358
D1

C2
C1

10nF
10nF
C4 1 D5
SFH450 BA159

D7
+ 3

C3
R3
D4
Mono Output

GND

1nF
510R
3u3

1N4148
1N4148
2
3 3
10:10:32

D10
D9
ICC 200

SD101A
SD101A

CIRCUIT DIAGRAMS
2 T2 2 T1
BC517 BC517

R11
R10
1 1

4k7
4k7
GND GND

B
Vdd
+15V

T1
T2
C
E

IC1
Vdd

R9
+15V

5k1

SFH350
GND
Vdd
Vdd

R7
+15V IC3

4k7
+15V
Vdd 5 IC4
IC2 IC5
+15V 4 & 6 6
5 6
R8 4 S 1
AST 5 & T1 3
4 C
AST 3 1k 5
R 4011 D
6 1 7 2 FING_A1
-TRIG CX 4
8 Q 10 IC5 R
+TRIG

C9
12
G 1

100pF
4013

C7
RTRIG 3
GND 2 T2

6n8
9
MR Q 11 RX/ CX GND 2 &
2
RX 4528 IC5 4011
13
OSC OUT IC4
1 R6 8
CX 10
9 & 8
S
5k1 13
11

R5
C6
4011 C

10k
Vdd

68nF
+15V
3 9
RCX IC5 D 12
10 FING_B1
4047 12 R
11
13 & 4013
4011 GND
IC3
11
Vdd
+15V 12 & Diese Zeichnung ist urheber-
10
C Datum Name rechtlich gesch tzt, daher
Gert/UNIT
Weitergabe und Vervielfltigung ICC 200
13 Gezeich. 17-02-94 Fritz ohne unsere Genehmigung
R unzulssig
0.6 Vdd Vdd 9
15 Gepr ft 14-07-94 Hagg Benennung/Title
+15V +15V CX
0.9 LP un.: 40128-096
14 C 3252 s.Aenderungsmit. 14.7.94 Fritz Mono-Output-Board
RX/ CX

C5
C10
68nF
68nF
B 3192 C11=10nF 22.6.94 Fritz LP bs.: 30128-358 Zeichnungsnummer/DWG.NO
GND GND GND GND 4528
Nr. nderung Datum Name Blatt 1 von 1 30128-358

209 / 266
ICC 200
Mono Output (bare)
40128-096

210 / 266 5 CIRCUIT DIAGRAMS


PCBs
only for ICC 300
212 / 266 5 CIRCUIT DIAGRAMS
Art. No. 80116-201
09 / 2004

5
CPU Kleinspannung+Ton Control-Board QK-Endstufe Leistungsteil ST-Endstufe

J1 Vcc J2 J3 J4 J5 J6
+5V
A1 C1 A1 A1 B1 A1 A1 A1
A2 C2 A2 GND GND
A2 B2 GND
A2 GND
A2 GND
A2 GND

GND
A3 C3 A3 A3 B3 A3 A3 A3
A4 C4 A4 +24V +24V A4 B4 +24V A4 +24V A4 +24V A4 +24V
A5 C5 A5 A5 B5 A5 A5 A5
Vee Vee Vee Vee Vee Vee
A6 C6 CS A6 Vdd A6 B6 A6 A6 A6
ANALOG-1 Vdd -15V Vdd -15V Vdd -15V Vdd -15V Vdd -15V
A7 C7 A7 +15V -15V A7 B7 A7 A7 A7
ANALOG-2 +15V +15V +15V +15V +15V
A8 C8 SET A8 Vcc A8 B8 A8 A8 A8
ANALOG-3 Vcc Vcc Vcc Vcc Vcc
30128-394
A9 C9 A9 +5V +5V A9 B9 +5V A9 +5V A9 +5V A9 +5V
ANALOG-4
A10 C10 A10 ESD0 A10 B10 ANALOG-1 A10 ESD0 A10 ESD0 A10 ESD0
ESD0
A11 C11 A11 ESD1 A11 B11 ANALOG-2 A11 ESD1 A11 ESD1 A11 ESD1
Motherboard

ESD1
A12 C12 A12 ESD2 A12 B12 ANALOG-3 A12 ESD2 A12 ESD2 A12 ESD2
ESD2
A13 C13 EIN12 A13 ESD3 A13 B13 ANALOG-4 A13 ESD3 A13 ESD3 A13 ESD3
EIN1 ESD3
A14 C14 EIN13 A14 ESD4 A14 B14 A14 ESD4 A14 ESD4 A14 ESD4
EIN2 ESD4
A15 C15 EIN14 A15 ESD5 A15 B15 A15 ESD5 A15 ESD5 A15 ESD5
EIN3 ESD5
ICC 300

CIRCUIT DIAGRAMS
A16 C16 EIN15 A16 ESD6 A16 B16 A16 ESD6 A16 ESD6 A16 ESD6
EIN4 ESD6
A17 C17 EIN16 A17 ESD7 A17 B17 SICHER A17 ESD7 A17 ESD7 A17 ESD7
EIN5 ESD7
A18 C18 EIN17 A18 CS1 A18 B18 NT-EIN A18 A18 NTE A18 CS6
EIN6 RESET
A19 C19 EIN18 A19 RESET A19 B19 HF-EIN A19 A19 REL-NT A19 RESET
EIN7 CS2
A20 C20 EIN19 A20 A20 B20 STE-EIN A20 A20 A20 CS7
CS3
A21 C21 A21 A21 B21 TEMP A21 A21 TEMP A21
CS4
A22 C22 A22 A22 B22 TSI A22 A22 A22 F-ST
CS5
A23 C23 SICHER A23 A23 B23 A A23 A A23 TSI A23
EIN8 U-PRIM
A24 C24 EIN20 A24 A24 B24 B A24 B A24 A24
EIN9 TSI-STE
A25 C25 EIN21 A25 A25 B25 AN A25 AN A25 U-PRIM A25
EIN10 I-HFL
A26 C26 EIN22 A26 A26 B26 AUS A26 AUS A26 A26 TSI-STE
EIN11 RES-ANA2
A27 C27 EIN23 A27 A27 B27 U-INP A27 A27 U-INP A27
PSD7 RES-ANA1
A28 C28 PSD6 A28 A28 B28 U-INT A28 A28 U-INT A28
PSD5 IP-PAT
A29 C29 PSD4 A29 A29 B29 U-NETZT A29 A29 U-NETZT A29
PSD3 IP-PAT-A
A30 C30 PSD2 A30 A30 B30 U-FUNKE A30 A30 A30
PSD1 UP-HF
A31 C31 PSD0 A31 A31 B31 U-SYM A31 A31 A31
UP-HF-A
A32 C32 A32 A32 B32 U-NESSY A32 A32 A32
RESET U-PHASE
24V-TR

24V-TR

Diese Zeichnung ist urheber-


A Datum Name rechtlich gesch tzt, daher
Gert/UNIT
Weitergabe und Vervielfltigung ICC300
Gezeich. 20-07-94 M.Fritz ohne unsere Genehmigung
unzulssig
Gepr ft 20-07-94 M.Hagg Benennung/Title

LP un.: 40128-092 Motherboard


LP bs.: 30128-394
Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 1 von 5 30128-394

213 / 266
Senso-Board Refi-Board Vcc Vcc Vcc Vdd Vdd
+5V +5V +5V +15V +15V

1
1
J7 J8

C24
A1 A1

68nF

214 / 266
C3
C4
A2 A2

RN8
RN15
GND GND

68nF
68nF

8*10k
8*10k
A3 A3 GND

2
3
4
5
6
7
8
9
2
3
4
5
6
7
8
9
A4 +24V A4 +24V GND GND
A5 A5
Vee Vee
A6 A6
Vdd -15V Vdd -15V RESET
A7 +15V A7 +15V
A8 A8
Vcc Vcc
A9 +5V A9 +5V IC4
A10 ESD0 A10 ESD0 IC10 30128-394
A11 A11 DMUX 11 1 16 RESET
ESD1 ESD1 0
A12 A12 9 2 ULN2004A 15
CS1 Ton J2
ESD2 ESD2 1
Vcc R1 10 3 14
A13 ESD3 A13 ESD3 +5V 2 CS2
Motherboard

A14 A14 8 4 13 CS3


ESD4 ESD4 3
10k 1 7 5 12
A15 ESD5 A15 ESD5 CS C20 4 CS4
A16 A16 6 6 11 CS5
ESD6 ESD6 5
A17 A17 2 5 7 10 CS6
ESD7 ESD7 PSD0 20D 0 6
A18 A18 3 0 4
ICC 300

CS8 CS9 PSD1 7


21 G 18 8 9
A19 RESET A19 RESET PSD2 15 8 Vdd
A20 A20 22 17 +15V
CS10 PSD3 3 9 GND
A21 A21 20
U-FUNKE CS11 10

1
A22 A22 23 19
U-SYM SET EN 11
A23 A23 14
U-NESSY FING-A1 12
A24 A24 Vcc R2 13

RN16
U-PHASE FING-B1 13
+5V

$wert
A25 A25 16

2
3
4
5
6
7
8
9
UP-HF-A FING-A2 14
A26 A26 10k 15 15 IC11
UP-HF FING-B2 4514
A27 A27 1 16 CS7
IP-PAT-A
A28 A28 2 ULN2004A 15
CS8
IP-PAT
A29 A29 3 14 CS9
A30 A30 4 13 CS10
A31 A31 5 12 CS11 J10 Res.
A32 A32 6 11 CS12 J10 Res.
7 10 CS13

8 9

GND

J28 J57
1 1 CS13
D24
AE1 Gen. 2 2 CS14
AE1 Bu.
3 BA159 3

8
9
7
6
5
4
3
2
D25

RN9
BA159

8*10k

1
J29 J58
1 1
D26 Vcc
AE2 Gen. 2 2 AE2 Bu. +5V
3 BA159 3

4
5
6
D27

UE1
1
2
3
BA159
Diese Zeichnung ist urheber-

5
A Datum Name rechtlich gesch tzt, daher
Gert/UNIT
J26 J27
Weitergabe und Vervielfltigung ICC300
1 1 Gezeich. 20-07-94 M.Fritz ohne unsere Genehmigung
2 2 unzulssig
NE Nessy NE Bu. Gepr ft 20-07-94 M.Hagg Benennung/Title
3 3
LP un.: 40128-092 Motherboard
LP bs.: 30128-394
Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 2 von 5 30128-394

CIRCUIT DIAGRAMS
Art. No. 80116-201
09 / 2004

5
+24V
REL1

RLV
REL1
D1
J11
1
REL1 1N4148
2
5 R3 D2
6
3k6 rot
R5 F1

~
100R BR1 Vdd Vcc
T200mA
30128-394
+15V +24V +5V
- + Vee
-15V 0.5 0.5
BH37933 Leistungsteil

~
+
Motherboard

J20 J16

C6
R6
680uF
22k
1 1
J15
6
1
3
0.5
ICC 300

C11
C22
C9
C23
C8
C10
2

CIRCUIT DIAGRAMS
68nF
68nF
68nF
68nF
68nF
68nF

+
J14
GND GND GND GND GND GND

C7
R9
C5

680uF
22k
u68
Vdd Vcc Frontplatte
Gehuse J19
1 +15V +5V J10
TR1 1
2

~
1 J22 J18 BR2 3

Prim.1
J12 1 1
24V-TR MASSE

Sek.
- +

+
J13

~
B250C5000

Prim.2

C32
C33
1

C15

u022
u022
1000uF
24V GND
GND
GND
J21 J17
1 1

Diese Zeichnung ist urheber-


A Datum Name rechtlich gesch tzt, daher
Gert/UNIT
Weitergabe und Vervielfltigung ICC300
Gezeich. 20-07-94 M.Fritz ohne unsere Genehmigung
unzulssig
Gepr ft 20-07-94 M.Hagg Benennung/Title

LP un.: 40128-092 Motherboard


LP bs.: 30128-394
Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 3 von 5 30128-394

215 / 266
GND Vdd
+15V

1
1

216 / 266
RN5
RN12

8*4k7
8*10k

2
3
4
5
6
7
8
9
2
3
4
5
6
7
8
9
IC7
1 16 ESD0
PSD0
2 ULN2004A 15
ESD1
PSD1
3 14 ESD2
PSD2
4 13 ESD3
PSD3
5 12 ESD4
PSD4
6 11 ESD5
PSD5
7 10
30128-394
PSD6 ESD6
ESD7

PIO-Ausgnge
PSD7
Motherboard

D8 R10 Vdd Vcc 8 9

ext. Steuerbus
+15V +5V
GND
2k2

1
rot
D3
ICC 300

RESET Vdd

RN6
1N4148 +15V

8*10k

2
8
7
6
5
4
3
9
1
IC2
1
R

RN13
9

8*10k
CS13 C1 IC8

3
4
5
6
7
8
2
9
1 16
3 2 2 ULN2004A 15
HF-EIN
1D
4 5 3 14 NT-EIN
6 7 4 13 RES-F1
11 10 5 12 RES-F2
13 12 6 11 NTE
14 15 7 10 RES-F3
40174
Vcc 8 9
+5V
GND

1
D4
Vdd

RN7
1N4148 +15V

8*10k

2
8
7
6
5
4
3
9
1
IC3
1
R

RN14
Signalleitungen

8*10k
CS14 C1

2
3
4
5
6
7
8
9
IC9
3 2 1 16 RES-F4
1D
4 5 2 ULN2004A 15
RES-F5
6 7 3 14 REL-NT
11 10 4 13 R-BF/CF
13 12 5 12 RLV
14 15 6 11 STE-EIN
7 10 SICHER

5
40174

8 9
SICHER
GND

Vcc Vcc
+5V +5V
Diese Zeichnung ist urheber-
A Datum Name rechtlich gesch tzt, daher
Gert/UNIT
Weitergabe und Vervielfltigung ICC300
Gezeich. 20-07-94 M.Fritz ohne unsere Genehmigung
unzulssig

C1
C2
Gepr ft 20-07-94 M.Hagg Benennung/Title

68nF
68nF
GND GND
LP un.: 40128-092 Motherboard
LP bs.: 30128-394 Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 4 von 5 30128-394

CIRCUIT DIAGRAMS
Art. No. 80116-201
09 / 2004

GND

5
Vdd Vcc
GND +15V +5V

1
1

1
1
RN10
RN3

8*10k
8*10k
FuÆschalter 1

RN18
RN17
Vdd

2
3
4
5
6
7
8
9
2
3
4
5
6
7
8
9

8*2k2
8*10k
R12 +15V

5
3
7
6
8
9
4
2
2
3
5
4
6
7
8
9
J23
1 EIN19
680R R15 IC13 IC5
2 EIN20
3 R14 3 2 FUSS-B1 14 15 EIN1
680R 1 FUSS-A1 1
680R 4050 4050
IC13 IC5

C17
C16
14 15 3 2

68nF
68nF
FuÆschalter 2 1 FUSS-A1 FUSS-B1 1 EIN2
Vdd
GND GND
30128-394
J24 R11 +15V 4050
4050
1 IC13 IC5
680R R17
2 11 12 5 4
1 FUSS-B2 FUSS-A2 1 EIN3
Motherboard

3 R16
680R
4050 4050
680R
IC13 IC5
5 4 FUSS-A2 11 12 EIN4

C19
C18
1 FUSS-B2 1

68nF
68nF
Vdd
ICC 300

CIRCUIT DIAGRAMS
R13 +15V GND GND 4050 4050
J25
1 IC13 IC5
680R R18 7 6 7 6
2 FING-B3 1 FUFI-B3 RES-B5 1 EIN17
3 R19
680R FING-A3
4050 4050
680R IC13 IC5
9 10 FUFI-A3 9 10 EIN18
1 RES-B6 1

C20
C21
68nF
68nF
4050 4050
GND GND

Vdd Vcc GND


Vcc
+15V +5V +5V

1
1
1
1

RN2
RN1
RN11
RN4

8*10k
8*10k
8*10k
8*10k

9
7
3
5
8
6
2
4
3
4
5
7
9
2
8
6
2
3
4
5
6
7
8
9
2
3
4
5
6
7
8
9

EIN21
IC1 EIN22 IC6 EIN23
14 15 EIN7 14 15 EIN5
1 FING-A1 1
4050 4050
IC1 IC6
5 4 EIN8 3 2 EIN6
F-ST 1 FING-B1 1
4050 4050
IC1 IC6
BF/CF 11 12 EIN9 5 4 EIN13
BF/CF 1 FING-A2 1
4050 4050
IC1 IC6

R20
7 6 11 12

0R
RES-B1 1 EIN10 FING-B2 1 EIN14

4050 4050
IC1 IC6
GND 9 10 EIN11 7 6 EIN15
RES-B2 1 FUFI-B3 1
4050 4050
IC1 IC6
3 2 EIN12 9 10 EIN16
RES-B3 1 FUFI-A3 1
4050 4050
Diese Zeichnung ist urheber-
A Datum Name rechtlich gesch tzt, daher
Gert/UNIT
Weitergabe und Vervielfltigung ICC300
Gezeich. 20-07-94 M.Fritz ohne unsere Genehmigung
unzulssig
Gepr ft 20-07-94 M.Hagg Benennung/Title

LP un.: 40128-092 Motherboard


LP bs.: 30128-394
Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 5 von 5 30128-394

217 / 266
ICC 300
Motherboard (bare)
40128-092

218 / 266 5 CIRCUIT DIAGRAMS


Art. No. 80116-201
09 / 2004

5
R2 R1 J3
1
Vdd 2
REL1 REL1 +15V 150R 56R
3

D1

R8
D4
IC1

680R
UE1 11V

1N4148
1N4148
3

C3
C1

10nF
10nF
2
C9 1 D5
SFH450

D3
D7
1 + 3

R7
R3

C4
D2
D6
J2 GND

510R
0R

1nF
n.best
REL2 REL2 3u3

1N4148
1N4148
n.best
2
3 3
10:10:32

D17
D18

SD101A
SD101A
2 T1 2 T2
BC517 BC517
30128-352
+24V +24V

R13
R17
1 1

4k7
4k7
Relay Board

GND GND

D15
D16

REL1
REL2
R6 R5 J4

1N4148
1N4148
1
Vdd

3
3
IC8 2

T1
T2
+15V 150R 56R
1
R R14 2 2
3
ICC 300

CIRCUIT DIAGRAMS
R10
D10
D12
9 T3 T4 IC2

680R
C1 UE2 11V

1N4148
1N4148
10k BC547 BC547

C2
C6

1
1
D0 11 10

10nF
10nF
1D R15 C8 1 D14
D1 6 7 GND GND SFH450

D8
+ 3

R9
R4
D9

C5
D11
D13
D2 13 12 10k

510R
0R
n.best

1nF
3u3

1N4148
1N4148
n.best
D3 4 5 GND 2
D4 3 2
D5 14 15 10:10:32
3 3

B
B
Vdd Vdd

D19
D20
40174

STEUERBUS
+15V +15V

SD101A
SD101A
2 T5 2 T6
STEUERBUS 2
RN1
D0
BC517 BC517

C
E
C
E
D1 3
Vdd
4

R16
R18
D2 +15V 1 1

IC1
IC2

4k7
4k7
D3 5
GND GND

R20
R23
MP1 1

5k1

SFH350
SFH350
5k1
D4 6
J1 D5 7 GND GND
A1 8
D6

T1
T2
A2 9

R19
R25
D7

4k7
n.best.
A3 GND
8x10k Vdd
A4 +24V +15V Vdd
IC5 +15V
A5
Vdd 11 IC3 IC7
A6 IC4
Vdd Vee +15V IC6 12
A7 +15V -15V 5
& R21 8
10
6
S 1
6
S 1
10 T1
AST 9 & 3 3
A8 Vcc 4 C C
AST 13 1k 5 5
A9 +5V R 4011 D D
6 15 9 2 2
-TRIG CX 4 4
A10 D0 STEUERBUS 8 10 R R
+TRIG Q IC4

C11
A11 D1 12
G 13

100pF
4013 4013

C7
RTRIG 11
A12 GND 14 T2

6n8
D2 9 11 RX/ CX GND 12 &
MR Q
A13 D3 2
RX 4528 IC4 4011
A14 13
FING_A1
FING_A2

D4 OSC OUT
1 R22 5 IC3 IC7
A15 D5 CX 4
A16 D6
6 & 8
S 8
S
5k1 13 13
11 11

R24
A17

C13
D7 4011 C C

10k
Vdd
+15V

68nF
A18
3 9 9
RCX IC4 D 12 D 12
A19
10 10
2 R R
4047 3
A20 1 & 4013 4013
A21
4011 GND GND
A22
IC5
FING_B1
FING_B2

A23
FING_A1 5
A24
FING_B1 4 &
A25 Diese Zeichnung ist urheber-
FING_A2 6 B Datum Name rechtlich gesch tzt, daher
Gert/UNIT
A26 Weitergabe und Vervielfltigung
FING_B2 3
R Gezeich. 10-02-94 M.Fritz ohne unsere Genehmigung ICC
A27 Vdd Vdd Vdd 1 7 unzulssig
A28 +15V +15V +15V CX Gepr ft 14-07-94 M.Hagg Benennung/Title
A29 Vdd

+
+15V +24V 0.8 LP un.: 40128-093
A30 2
RX/ CX
RELAIS-BOARD

C14
C10
C12
A31

3u3
68nF
68nF
4528 B 3251 s.Anderungsmit. 14-7-94 Fritz LP bs.: 30128-352
A32 0.6 0.6 GND GND GND GND GND Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 1 von 1 30128-352

219 / 266
ICC 300
Relay Board (bare)
40128-093

220 / 266 5 CIRCUIT DIAGRAMS


PCBs
only for ICC 350
222 / 266 5 CIRCUIT DIAGRAMS
Art. No. 80116-201
09 / 2004

5
CPU Kleinspannung+Ton Control-Board QK-Endstufe Leistungsteil ST-Endstufe

J1 Vcc J2 J3 J4 J5 J6
+5V
A1 C1 A1 A1 B1 A1 A1 A1
A2 C2 A2 GND GND
A2 B2 GND
A2 GND
A2 GND
A2 GND

GND
A3 C3 A3 A3 B3 A3 A3 A3
A4 C4 A4 +24V +24V A4 B4 +24V A4 +24V A4 +24V A4 +24V
A5 C5 A5 A5 B5 A5 A5 A5
Vee Vee Vee Vee Vee Vee
A6 C6 CS A6 Vdd A6 B6 A6 A6 A6
ANALOG-1 Vdd -15V Vdd -15V Vdd -15V Vdd -15V Vdd -15V
A7 C7 A7 +15V -15V A7 B7 A7 A7 A7
ANALOG-2 +15V +15V +15V +15V +15V
A8 C8 SET A8 Vcc A8 B8 A8 A8 A8
ANALOG-3 Vcc Vcc Vcc Vcc Vcc
A9 C9 A9 +5V A9 B9 A9 A9 A9
30128-351
ANALOG-4 +5V +5V +5V +5V +5V
A10 C10 A10 ESD0 A10 B10 ANALOG-1 A10 ESD0 A10 ESD0 A10 ESD0
ESD0
A11 C11 A11 ESD1 A11 B11 ANALOG-2 A11 ESD1 A11 ESD1 A11 ESD1
ESD1
Motherboard

A12 C12 A12 ESD2 A12 B12 ANALOG-3 A12 ESD2 A12 ESD2 A12 ESD2
ESD2
A13 C13 EIN12 A13 ESD3 A13 B13 ANALOG-4 A13 ESD3 A13 ESD3 A13 ESD3
EIN1 ESD3
A14 C14 EIN13 A14 ESD4 A14 B14 A14 ESD4 A14 ESD4 A14 ESD4
EIN2 ESD4
A15 C15 EIN14 A15 ESD5 A15 B15 A15 ESD5 A15 ESD5 A15 ESD5
EIN3 ESD5
A16 C16 A16 A16 B16 A16 A16 A16
ICC 350

EIN4 EIN15 ESD6 ESD6 ESD6 ESD6 ESD6

CIRCUIT DIAGRAMS
A17 C17 EIN16 A17 ESD7 A17 B17 SICHER A17 ESD7 A17 ESD7 A17 ESD7
EIN5 ESD7
A18 C18 EIN17 A18 CS1 A18 B18 NT-EIN A18 A18 NTE A18 CS6
EIN6 RESET
A19 C19 EIN18 A19 RESET A19 B19 HF-EIN A19 A19 REL-NT A19 RESET
EIN7 CS2
A20 C20 EIN19 A20 A20 B20 STE-EIN A20 A20 A20 CS7
CS3
A21 C21 A21 A21 B21 TEMP A21 A21 TEMP A21
CS4
A22 C22 A22 A22 B22 TSI A22 A22 A22 F-ST
CS5
A23 C23 SICHER A23 A23 B23 A A23 A A23 TSI A23
EIN8 U-PRIM
A24 C24 EIN20 A24 A24 B24 B A24 B A24 A24
EIN9 TSI-STE
A25 C25 EIN21 A25 A25 B25 AN A25 AN A25 U-PRIM A25
EIN10 I-HFL
A26 C26 EIN22 A26 A26 B26 AUS A26 AUS A26 A26 TSI-STE
EIN11 RES-ANA2
A27 C27 EIN23 A27 A27 B27 U-INP A27 A27 U-INP A27
PSD7 RES-ANA1
A28 C28 PSD6 A28 A28 B28 U-INT A28 A28 U-INT A28
PSD5 IP-PAT
A29 C29 PSD4 A29 A29 B29 U-NETZT A29 A29 U-NETZT A29
PSD3 IP-PAT-A
A30 C30 PSD2 A30 A30 B30 U-FUNKE A30 A30 A30
PSD1 UP-HF
A31 C31 PSD0 A31 A31 B31 U-SYM A31 A31 A31
UP-HF-A
A32 C32 A32 A32 B32 U-NESSY A32 A32 A32
RESET U-PHASE
24V-TR
24V-TR

Diese Zeichnung ist urheber-


A Datum Name rechtlich gesch tzt, daher
Gert/UNIT
Weitergabe und Vervielfltigung ICC
Gezeich. 27.01.94 M.Fritz ohne unsere Genehmigung
unzulssig
Gepr ft 20-07-94 M.Hagg Benennung/Title

LP un.: 40128-092 Motherboard


LP bs.: 30128-351
Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 1 von 6 30128-351

223 / 266
Senso-Board Refi-Board Vcc Vcc Vcc Vdd Vdd
+5V +5V +5V +15V +15V

1
1
J7 J8

C24
A1 A1

68nF

224 / 266
C3
C4
A2 A2

RN8
RN15
GND GND

68nF
68nF

8*10k
8*10k
A3 A3 GND

2
3
4
5
6
7
8
9
2
3
4
5
6
7
8
9
A4 +24V A4 +24V GND GND
A5 A5
Vee Vee
A6 A6
Vdd -15V Vdd -15V RESET
A7 +15V A7 +15V
A8 A8
Vcc Vcc
A9 +5V A9 +5V IC4
A10 A10 IC10
ESD0 ESD0
DMUX 11 1 16
30128-351
A11 ESD1 A11 ESD1 0 RESET
A12 A12 9 2 ULN2004A 15
CS1 Ton J2
ESD2 ESD2 1
Vcc
Motherboard

A13 A13 R1 2 10 3 14 CS2


ESD3 ESD3 +5V
A14 A14 8 4 13 CS3
ESD4 ESD4 3
10k 1 7 5 12
A15 ESD5 A15 ESD5 CS C20 4 CS4
A16 A16 6 6 11 CS5
ESD6 ESD6 5
A17 A17 2 5 7 10 CS6
ICC 350

ESD7 ESD7 PSD0 20D 0 6


A18 A18 3 0 4
CS8 CS9 PSD1 7
21 G 18 8 9
A19 RESET A19 RESET PSD2 15 8 Vdd
A20 A20 22 17 +15V
CS10 PSD3 3 9 GND
A21 A21 20
U-FUNKE CS11 10

1
A22 A22 23 19
U-SYM SET EN 11
A23 A23 14
U-NESSY FING-A1 12
A24 A24 Vcc R2 13

RN16
U-PHASE FING-B1 13
+5V

$wert
A25 A25 16

2
3
4
5
6
7
8
9
UP-HF-A FING-A2 14
A26 A26 10k 15 15 IC11
UP-HF FING-B2 4514
A27 A27 1 16 CS7
IP-PAT-A
A28 A28 2 ULN2004A 15
CS8
IP-PAT
A29 A29 3 14 CS9
A30 A30 4 13 CS10
A31 A31 5 12 CS11 J10 Res.
A32 A32 6 11 CS12 J10 Res.
7 10 CS13

8 9

GND

GND
J9 GND
1 2
Vcc Vdd -15V 3 4 -15V Vdd Vcc
+5V +15V Vee +24V 5 6 +24V Vee +15V +5V
CS13
7 8 CS14
9 10

8
9
7
6
5
4
3
2
11 12
13 14 FING-A3
ESD0

RN9
15 16 FING-B3

8*10k
ESD1
17 18

1
ESD2 RES-B1
19 20 RES-B2
ESD3
21 22 RES-B3 Vcc
ESD4
23 24 +5V
ESD5 RES-B4
25 26 RES-B5
ESD6

5
27 28 RES-B6
ESD7
29 30 RES-F1
RESET
31 32 RES-F2 Diese Zeichnung ist urheber-
CS11 A Datum Name Gert/UNIT
33 34 rechtlich gesch tzt, daher
CS12 RES-F3 Weitergabe und Vervielfltigung
35 36 RES-F4
Gezeich. 27.01.94 M.Fritz ohne unsere Genehmigung
ICC
CS13 unzulssig
37 38 Gepr ft 20-07-94 M.Hagg Benennung/Title
RES-ANA1
39 40 RES-F6
RES-ANA2
LP un.: 40128-092 Motherboard
nicht bestueckt LP bs.: 30128-351
Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 2 von 6 30128-351

CIRCUIT DIAGRAMS
Art. No. 80116-201
09 / 2004

5
+24V
REL1

RLV
REL1
D1
J11
1
REL1 1N4148
2
5 R3 D2
6
3k6 rot
R5 F1

~
100R BR1 Vdd Vcc
T200mA
30128-351
+15V +24V +5V
- + Vee
-15V 0.5 0.5
BH37933 Leistungsteil

~
+
Motherboard

J20 J16

C6
R6
680uF
22k
1 1
J15
6
1
3
0.5
ICC 350

CIRCUIT DIAGRAMS
C11
C22
C9
C23
C8
C10
2

68nF
68nF
68nF
68nF
68nF
68nF

+
J14
GND GND GND GND GND GND

C7
R9
C5

680uF
22k
u68
Vdd Vcc Frontplatte
Gehuse J19
1 +15V +5V J10
TR1 1
2

~
1 J22 J18 BR2 3

Prim.1
J12 1 1
24V-TR MASSE

Sek.
- +

+
J13

~
B250C5000

Prim.2

C32
C33
1

C15

u022
u022
1000uF
24V GND
GND
GND
J21 J17
1 1

Diese Zeichnung ist urheber-


A Datum Name rechtlich gesch tzt, daher
Gert/UNIT
Weitergabe und Vervielfltigung ICC
Gezeich. 27.01.94 M.Fritz ohne unsere Genehmigung
unzulssig
Gepr ft 20-07-94 M.Hagg Benennung/Title

LP un.: 40128-092 Motherboard


LP bs.: 30128-351
Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 3 von 6 30128-351

225 / 266
GND Vdd
+15V

1
1

226 / 266
RN5
RN12

8*4k7
8*10k

2
3
4
5
6
7
8
9
2
3
4
5
6
7
8
9
IC7
1 16 ESD0
PSD0
2 ULN2004A 15
ESD1
PSD1
3 14 ESD2
PSD2
4 13 ESD3
PSD3
5 12 ESD4
PSD4 30128-351
6 11 ESD5
PSD5
7 10 ESD6
PSD6
ESD7

PIO-Ausgnge
Motherboard

PSD7
D8 R10 Vdd Vcc 8 9

ext. Steuerbus
+15V +5V
GND
2k2

1
rot
D3
ICC 350

RESET Vdd

RN6
1N4148 +15V

8*10k

2
8
7
6
5
4
3
9
1
IC2
1
R

RN13
9

8*10k
CS13 C1 IC8

3
4
5
6
7
8
2
9
1 16
3 2 2 ULN2004A 15
HF-EIN
1D
4 5 3 14 NT-EIN
6 7 4 13 RES-F1
11 10 5 12 RES-F2
13 12 6 11 NTE
14 15 7 10 RES-F3
40174
Vcc 8 9
+5V
GND

1
D4
Vdd

RN7
1N4148 +15V

8*10k

2
8
7
6
5
4
3
9
1
IC3
1
R

RN14
Signalleitungen

8*10k
CS14 C1

2
3
4
5
6
7
8
9
IC9
3 2 1 16 RES-F4
1D
4 5 2 ULN2004A 15
RES-F5
6 7 3 14 REL-NT
11 10 4 13 R-BF/CF
13 12 5 12 RLV
14 15 6 11

5
STE-EIN
7 10 SICHER
40174

8 9
SICHER
GND

Vcc Vcc
+5V +5V
Diese Zeichnung ist urheber-
A Datum Name rechtlich gesch tzt, daher
Gert/UNIT
Weitergabe und Vervielfltigung ICC
Gezeich. 27.01.94 M.Fritz ohne unsere Genehmigung
unzulssig

C1
C2
Gepr ft 20-07-94 M.Hagg Benennung/Title

68nF
68nF
GND GND
LP un.: 40128-092 Motherboard
LP bs.: 30128-351
Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 4 von 6 30128-351

CIRCUIT DIAGRAMS
Art. No. 80116-201
09 / 2004

GND

5
Vdd Vcc
GND +15V +5V

1
1

1
1
RN10
RN3

8*10k
8*10k
FuÆschalter 1

RN18
RN17
Vdd

2
3
4
5
6
7
8
9
2
3
4
5
6
7
8
9

8*2k2
8*10k
R12 +15V

5
3
7
6
8
9
4
2
2
3
5
4
6
7
8
9
J23
1 EIN19
680R R15 IC13 IC5
2 EIN20
3 R14 3 2 FUSS-B1 14 15 EIN1
680R 1 FUSS-A1 1
680R 4050 4050
IC13 IC5

C17
C16
14 15 3 2

68nF
68nF
FuÆschalter 2 1 FUSS-A1 FUSS-B1 1 EIN2
Vdd
30128-351
R11 +15V GND GND
J24 4050 4050
1 IC13 IC5
680R R17
2
Motherboard

11 12 FUSS-B2 5 4 EIN3
R16 1 FUSS-A2 1
3 680R
4050 4050
680R
IC13 IC5
5 4 FUSS-A2 11 12 EIN4

C19
C18
1 FUSS-B2 1
ICC 350

CIRCUIT DIAGRAMS
68nF
68nF
Vdd
R13 +15V GND GND 4050 4050
J25
1 IC13 IC5
680R R18 7 6 7 6
2 FING-B3 1 FUFI-B3 RES-B5 1 EIN17
3 R19
680R FING-A3
4050 4050
680R IC13 IC5
9 10 FUFI-A3 9 10 EIN18
1 RES-B6 1

C20
C21
68nF
68nF
4050 4050
GND GND

Vdd Vcc GND


Vcc
+15V +5V +5V

1
1
1
1

RN2
RN1
RN11
RN4

8*10k
8*10k
8*10k
8*10k

9
7
3
5
8
6
2
4
3
4
5
7
9
2
8
6
2
3
4
5
6
7
8
9
2
3
4
5
6
7
8
9

EIN21
IC1 EIN22 IC6 EIN23
14 15 EIN7 14 15 EIN5
1 FING-A1 1
4050 4050
IC1 IC6
5 4 EIN8 3 2 EIN6
F-ST 1 FING-B1 1
4050 4050
IC1 IC6
11 12 EIN9 5 4 EIN13
BF/CF 1 FING-A2 1
4050 4050
IC1 IC6
7 6 EIN10 11 12 EIN14
RES-B1 1 FING-B2 1
4050 4050
IC1 IC6
9 10 EIN11 7 6 EIN15
RES-B2 1 FUFI-B3 1
4050 4050
IC1 IC6
3 2 EIN12 9 10 EIN16
RES-B3 1 FUFI-A3 1
4050 4050
Diese Zeichnung ist urheber-
A Datum Name rechtlich gesch tzt, daher
Gert/UNIT
Weitergabe und Vervielfltigung ICC
Gezeich. 27.01.94 M.Fritz ohne unsere Genehmigung
unzulssig
Gepr ft 20-07-94 M.Hagg Benennung/Title

LP un.: 40128-092 Motherboard


LP bs.: 30128-351
Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 5 von 6 30128-351

228 / 266
J28 J57
1 1
D24

228
AE1 Gen. 2 2
AE1 Bu.
3 BA159 3

/ 266
D25

BA159

J29 J58
1 1
D26
AE2 Gen. 2 2 AE2 Bu.
3 BA159 3

4
5
6
D27
30128-351

UE1
1
2
3
BA159
Motherboard

+24V
J26 J27
1 1 REL2
NE Nessy 2 2
ICC 350

NE Bu. R-BF/CF
3 3

D12
Vdd Vdd

C31
C30
u022
u022
+15V +15V 1N4148
R74 D23

3k6 rot

C26

REL2
68nF
GND
D22

R22
10k
2 RES-F5

7
-
2 1N4148

1
IC12 1 -+

5
I-HFL R23 D9

REL2
D5 R7 TL082 IC14 OFF 6 BF/CF
3 +
R24 LF356
2k2 1N4148
1N4148 10k 3 +
-
68R

D6
10V
R25
D10
D11
C28
R21

L1
1k2
BA159
BA159
u15
TP1

R4
C13
R8

1k/1W
C29

10nF
100k
R20
C25

D7
u15
3M3
330k
1uF

10V
220R
GND

C27
GND

68nF
GND GND GND
Vee GND
-15V
Vdd
+15V

5
8

C12
6

68nF
+ -
IC12 IC12 7
TL082 TL082
GND - 5 +
4

C14
68nF
GND

Vee
-15V
Diese Zeichnung ist urheber-
A Datum Name rechtlich gesch tzt, daher
Gert/UNIT
Weitergabe und Vervielfltigung ICC
Gezeich. 27.01.94 M.Fritz ohne unsere Genehmigung
unzulssig
Gepr ft 20-07-94 M.Hagg Benennung/Title

LP un.: 40128-092 Motherboard


LP bs.: 30128-351
Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 6 von 6 30128-351

CIRCUIT DIAGRAMS
ICC 350
Motherboard (bare)
40128-092
Art. No. 80116-201
09 / 2004

5 CIRCUIT DIAGRAMS 229 / 266


R2 R1 J3
1
Vdd 2
REL1 REL1 +15V 150R 56R
3

D1
D4

R8
IC1

680R
UE1 11V

1N4148
1N4148

230 / 266
3

C3
C1

10nF
10nF
2
C9 1 D5
SFH450

D3
D7
1 + 3

C4
D2
D6

R7
R3
J2 GND

1nF
n.best

510R
0R
REL2 REL2 3u3

1N4148
1N4148
n.best
2
3 3
10:10:32

D17
D18

SD101A
SD101A
2 T1 2 T2
BC517 BC517 30128-352
+24V +24V

R13
R17
1 1

4k7
4k7
GND GND
Relay Board

D15
D16

REL1
REL2
R6 R5 J4

1N4148
1N4148
1
Vdd

3
3
IC8 2

T1
T2
+15V 150R 56R
1 R14 2 2 3
R
ICC 350

D10
D12

R10
9 T3 T4 IC2

680R
C1 UE2 11V

1N4148
1N4148
10k BC547 BC547

C2
C6

1
1
D0 11 10

10nF
10nF
1D R15 C8 1 D14
D1 6 7 GND GND SFH450

D8
+ 3

C5
D11
D13
R4
D9

R9
D2 13 12 10k

1nF
0R
n.best

510R
3u3

1N4148
1N4148
n.best
D3 4 5 GND 2
D4 3 2
D5 14 15 10:10:32
3 3

B
B
Vdd Vdd

D19
D20
40174

STEUERBUS
+15V +15V

SD101A
SD101A
2 T5 2 T6
STEUERBUS 2
RN1
D0
BC517 BC517

C
E
C
E
D1 3
Vdd
4

R16
R18
D2 +15V 1 1

IC1
IC2

4k7
4k7
D3 5 GND GND

R20
R23
MP1 1

SFH350
SFH350

5k1
5k1
D4 6
J1 D5 7
GND GND

A1 8
D6

T1
T2
A2 9

R19
R25
D7

4k7
n.best.
A3 GND
8x10k Vdd
A4 +24V +15V Vdd
IC5 +15V
A5
Vdd 11 IC3 IC7
A6 IC4
Vdd Vee +15V IC6 12
A7 +15V -15V 5
& R21 8
10
6
S 1
6
S 1
10 T1
AST 9 & 3 3
A8 Vcc 4 C C
AST 13 1k 5 5
A9 +5V R 4011 D D
6 15 9 2 2
-TRIG CX 4 4
A10 D0 STEUERBUS 8 10 R R
+TRIG Q IC4

C11
A11 D1 12
G 13

100pF
4013 4013

C7
RTRIG 11
A12 GND 14 T2

6n8
D2 9 11 RX/ CX GND 12 &
MR Q
A13 D3 2
RX 4528 IC4 4011
A14 13
FING_A1
FING_A2

D4 OSC OUT
1 R22 5 IC3 IC7
A15 D5 CX 4
A16 D6
6 & 8
S 8
S
5k1 13 13
11 11

R24
A17

C13
D7 4011 C C

Vdd

10k
68nF
+15V
A18
3 9 9
RCX IC4 D 12 D 12
A19
10 10
4047 2 R R
A20
3
1 & 4013 4013

5
A21
4011 GND GND
A22
IC5
FING_B1
FING_B2

A23
FING_A1 5
A24
FING_B1 4 &
A25 Diese Zeichnung ist urheber-
FING_A2 6 B Datum Name rechtlich gesch tzt, daher
Gert/UNIT
A26 Weitergabe und Vervielfltigung
FING_B2 3 Gezeich. 10-02-94 M.Fritz ohne unsere Genehmigung ICC
A27 R
Vdd Vdd Vdd 1 7 unzulssig
A28 +15V +15V +15V CX Gepr ft 14-07-94 M.Hagg Benennung/Title
A29 Vdd

+
+15V +24V 0.8 LP un.: 40128-093
A30 2
RX/ CX
RELAIS-BOARD

C14
C10
C12
A31

3u3
68nF
68nF
4528 B 3251 s.Anderungsmit. 14-7-94 Fritz LP bs.: 30128-352
A32 0.6 0.6 GND GND GND GND GND Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 1 von 1 30128-352

CIRCUIT DIAGRAMS
ICC 350
Relay Board (bare)
40128-093
Art. No. 80116-201
09 / 2004

5 CIRCUIT DIAGRAMS 231 / 266


MP9
MP6 J2-1 J4
1

~
J1 BR1
F1 REL1 REL1 2

T3
BUX84
A1 3
- + 2 3

232 / 266
A2 GND B250C800 62mA

~
A3 AE

NEG15
R38

R1
C8
A4

R39
+24V J2-2

820k
10uF
1k5
A5 R9

3
Vee 6 8k2

2
-

2
A6 D1 R5
Vdd -15V 10k NEG15 IC3 7 2

TY1
A7

R22
+15V R19 TL082 1

D2
R6
220k

1
1

3
A8 1N4148 470R

9V1
27k
FTEST T2

R4
Vcc T1 5 +

220R
A9 +5V 1k BUX84 BUX84 MP4

X0303
3
2

3
A10 NULL
ESD0 T5 NE

R2
R8
R3
R15
A11 ESD1 BC557
30128-070

10k
27k
1k
10k
REL2 REL2 J5

1
A12 ESD2 NULL 1
A13 ESD3 R14
R13 2
A14 ESD4 FRES
3
A15 ESD5 10k 10k
POS15

R12
A16

D13
ESD6

390R
R21 9V1 R23

BA159
A17 2 8
ESD7 CLR - IC4

2
5 + MP1
A18 CS12 1k5 D7 10k IC3 +
Neurotest Board

TL082 1 4 Vin Fout


1 I-FREQ
A19 RESET 7 TL082

D6
IC6 3 RT
1

C13
A20 - U U-STEUER
CS13 3 + T4

0u047
NULL 7

1N4148
6 CT F
A21 BUX84
NULL 6 2

3
A22 CT DGND

R24
-

10k
C14
A23 I-NEURO AD654

0u33
A24 5

R7
A25

390R

10k
A26
NULL

TP1
A27 NULL
A28
A29
A30
A31
A32

J2
1 J2-1
2 J2-2
3
4 NULL
5 J2-5

IC1 MP5
78xx
ICC 350 Neurotest

D11 7815
1 I O 3 POS15
J2-5 POS15
BA159 G
8

+
+
+

2
MP2
IC3

C9
C1
C12
TL082

100uF
100nF
1uF
C3
-

68nF

5
NULL 4
Diese Zeichnung ist urheber-
C Datum Name Gert/UNIT

1
rechtlich gesch tzt, daher

+
+
MP3 NEG15 Weitergabe und Vervielfltigung
G
Gezeich. M.Fritz 14-06-93 ohne unsere Genehmigung
ICC

C10
C2
C11
unzulssig

100uF
100nF
1uF
BA159 Gepr ft Benennung/Title
2 I 79xx O 3 NEG15
J2-5
7915
D12 LP un.: 30128-070 Neurotest-Board
IC2
R36=3k3 14.6.93 MF LP bs.: 40128-027
Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 1 von 2 30128-070

CIRCUIT DIAGRAMS
Art. No. 80116-201
09 / 2004

Vdd

5
+15V POS15

MP7

R36
R29

3k3
1k3
IC7
9 16 2
I-NEURO
-
IC6 D3
8 1 NULL 1 U-STEUER
I-FREQ POS15 TL082
GND
R25 D5 1N4148
CNY66 3 +

IC14 Vdd IC5 16 30k 1N4148

R10
R20
R18
R16
1 +15V + 3 R26 D8

3k3
3k3
3k3
3k3
R11
RESET R R31 IC8 BCD/DEC 0

220k
9 16 9 14
CS12 C1 1 13k 1N4148
IC13 1k3 2 NEG15
2 R27 D9
30128-070
11 10 1 16 1 8 10 15
ESD0 1D ULN2004A 1 3
6 7 2 15 Vdd 13
2 1 7k5 1N4148
ESD1
+15V CNY66 4
13 12 3 14 12 6 R28 D10
ESD2 R32 IC9 4 5
4 5 4 13 16 9 11 7
ESD3 8 6
3 2 5 12 1k3 4 CLR 4k3 1N4148
ESD4 7
14 15 7 10 1 8 9 FRES R17 D4
ESD5 8
40174 6 11 Vdd 9 5 FTEST
+15V CNY66 2k4 1N4148

CIRCUIT DIAGRAMS
Neurotest Board

-
R33 IC10
8 9 16 9 4028 8
GND
1k3 NULL
+24V 1N4148 1 8
Vdd
D15 +15V CNY66
REL1 R34 IC11
16 9 POS15
1k3
1 8
Vdd
+15V CNY66
1N4148
R35 IC12
16 9
D16

R30
REL2 2k2

8k2
1 8 NULL
CNY66

R37
POS15

1k5
Vdd
Diese Zeichnung ist urheber-
8 D14 +15V C Datum Name rechtlich gesch tzt, daher
Gert/UNIT
+ Weitergabe und Vervielfltigung ICC
Gezeich. M.Fritz 14-06-93 ohne unsere Genehmigung
IC6 rot unzulssig
TL082 Gepr ft

C5
C4
C6
C7
Benennung/Title

68nF
68nF
68nF
68nF
-
4 GND
LP un.: 30128-070 Neurotest-Board
NULL NEG15
R36=3k3 14.6.93 MF LP bs.: 40128-027 Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 2 von 2 30128-070
ICC 350 Neurotest

233 / 266
ICC 350 Neurotest
Neurotest Board
40128-027

234 / 266 5 CIRCUIT DIAGRAMS


Art. No. 80116-201
09 / 2004

5
J1 Vdd Vdd
A1 +15V +15V UE1
A2
GND
A3

A4

C2
+24V 1 2

1u5
A5 J3

C4
1

68nF
A6
Vee C3
Vdd -15V 2

R3
A7

C6

1k
+15V 3

u15
A8 10:10 68nF
Vcc

3
A9 R1 IC1 L1
+5V
A10 R2 2
ESD0 T1
A11 100R 1m8
ESD1 1k BC517 SFH450
A12

+
ESD2
30128-071
A13
ESD3 R7

D1
2V7
C5
1
A14

2u2
ESD4
A15 GND GND 100R GND
ESD5
A16
ESD6
A17
ESD7
A18
CS12
A19
RESET
A20

CIRCUIT DIAGRAMS
CS13
A21

A22 Zur Fernbedienungsbuchse


A23
F-IIST J4
A24 Vdd 1
+15V Vdd
A25 GND 2
+15V Vdd
F-INTENS +15V
A26 3

C
A27 4
LED-FERN B
IC2
A28 5
IC1 7 6

R4
R6
A29 1
Motherboard Neurotest

10k
1k
SFH350
A30

E
IC2 4050
A31 IC2
3 2
A32 1 FING-NEU 9 10
1
4050
IC2 4050

C1
R5
1N4148 D3

u47
22k
5 4 IC2
1 GND 11 12
GND GND D2 1
rot
4050
J2 4050
GND 1 GND
2 IC2
Vcc Vdd -15V 3 4 -15V Vdd Vcc 14 15
+5V +15V Vee +24V +24V Vee +15V +5V 1
5 6
GND
7 8 4050
9 10
11 12
13 14
ESD0 FING-A3
15 16
ESD1 FING-B3
17 18
ESD2 F-IIST
19 20
ESD3 FING-NEU
ICC 350 Neurotest

21 22
ESD4 F-INTENS
23 24
ESD5 RES-B4
25 26
ESD6 RES-B5
27 28
ESD7 RES-B6
29 30
RESET LED-FERN
31 32
CS11 RES-F2 Diese Zeichnung ist urheber-
33
B Datum Name rechtlich gesch tzt, daher
Gert/UNIT
34 RES-F3
CS12 Weitergabe und Vervielfltigung ICC
35 36 Gezeich. M.Fritz 15.10.92 ohne unsere Genehmigung
CS13 RES-F4
37 unzulssig
38 Gepr ft Benennung/Title
RES-ANA1
39 40
RES-ANA2 RES-F6 Neurotest-Motherboard
LP un.: 40128-028
ZMK
LP bs.: 30128-071
Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 1 von 1 30128-071

235 / 266
ICC 350 Neurotest
Motherboard Neurotest (bare)
40128-028

236 / 266 5 CIRCUIT DIAGRAMS


Art. No. 80116-201
09 / 2004

U_KENN

5
5k
5k
MASSE AE NE 5 + 3 +

TP1
TP2
J1 TL082 RES-ANA1 TL082 RES-ANA2

J2
J6
7 1
IC1 IC1

1
2
3
1
2
3
A1
- -
A2 6 2
GND J12 Vdd Vdd
A3 +15V +15V R33
J13 R35
A4

R7
R32
R8
R34
+24V

4k7
4k7
4k7
4k7
A5 2k7 2k7
Vee GND GND GND GND
A6

R21
R22
OSZ_OUT

10k
10k
Vdd -15V

REL2
REL3
REL4
REL5

REL1
REL6
A7 MP1
+15V UE2 R9 R26 D9
A8

A9
Vcc 3 +
+5V 2k4 Vdd C7 100R 1N4148 TL084
30128-200
MIC Board

A10 +15V U_KENN


ESD0 1
A11 2 1 IC3

REL2
REL3
REL4
REL5

REL1
REL6
GND

R25
ESD1 -
68nF

15k

D11
2

7
A12

R12
ESD2 C15

P6KE18CA
2

2k4
A13

1
-+

8
ESD3 C1
A14 R11 IC2 B/C1 C2 6
ESD4 J8 15:15 1uF
A15 LM318 B/C3
ESD5 UE1 2k4
A16 J9 1nF 3 +
-

5
ESD6 J10
A17

CIRCUIT DIAGRAMS
4
ESD7 J11 C10
A18

C3
C2
R10
R24
R27
C11
CS12 2 1

220pF
1nF
4k7
12k
20k
22nF
A19
RESET Vee

D10
A20 GND GND GND GND 68nF GND GND GND
C14 -15V

P6KE18CA
CS11
A21

3
2
1
3
2
1
3
2
1
A22 15:15 1uF

J3
J4
J5
A23 3 3
A24

A25 T3 T2
A26
2 2 MP2
A1 BS170 A2 BS170
A27 1 1
A28 GND GND R15
A29
+24V 2k
A30
TRANS_1 R18 C5 R16 R29 R30 R14 R13
A31
RES-ANA1 OSZ_OUT
A32
RES-ANA2 22k 22nF 5k6 2k4 2k4 2k4 390R

IC6 9 6 13
- - -

REL7
REL2
REL3
REL4
REL5

REL1
REL6
1 IC3 IC3 IC3
RESET R 8 7 14
9 TL084 TL084 TL084
CS12 C1
IC4 10 + 5 + 12 +
3 2 1 16 GND GND
ESD0 1D

R17
14 15 2 ULN2004A 15

2k4

R19
ESD1

10k
4 5 3 14
ESD2
13 12 4 13 Vdd
ESD3 +15V Vdd

C4
6 7 5 12 REL7 0.7

1nF
ESD4 +15V
11 10 6 11 +24V
ESD5
7 10

R23
40174

C6
J7

10k

22nF
IC5 1
0.7

C12
R28
8 9 2

1nF
2k4
1

R20
R2
R1
R3
R4
R5
R6
RESET R
GND GND 3

2k
2k
2k
2k
2k
2k
2k
9 GND 3
CS11 C1 +24V 4 Vee
C13
D8

68nF
BA159

5
Ventil -15V
6 7 T1
ESD0 1D 2 REL7
11 10 BS170 OSZI_ON
OSZI_ON 1.0

D7
rot
D1
rot
D2
rot
D3
rot
D4
rot
D5
rot
D6
gelb
ESD1 1
4 5 A1
ESD2
13 12 A2 GND GND
ESD3 GND
3 2
ESD4
14 15 TRANS_1
ESD5 Vdd
40174 +15V
Diese Zeichnung ist urheber-
RN1 D Datum Name rechtlich gesch tzt, daher
Gert/UNIT
2
Weitergabe und Vervielfltigung

4
ESD0 8 Gezeich. 28-05-93 M.Fritz ICC
3 ohne unsere Genehmigung
ESD1 + + unzulssig
4 IC3 IC1 Gepr ft Benennung/Title
ESD2 Vdd
5 TL084 TL082

C9
C8
1
+15V

68nF
68nF
ESD3 - - LP un.: 40128-064 MIC-Board
6 Vdd
ESD4 R31 +15V 4 D 4015 D10,D11 neu 10.12.96 Fritz
7

11
ESD5 CS11 LP bs.: 30128-200
8
C 3107 R17=2k4 30.4.94 Fritz
22k Vee Zeichnungsnummer/DWG.NO
CS12
9 -15V Nr. nderung Datum Name Blatt 1 von 1 30128-200
ICC 350 MIC-MIEN-DOKU

RESET
22k

237 / 266
ICC 350 MIC-MIEN-DOKU
MIC Board (bare)
40128-064

238 / 266 5 CIRCUIT DIAGRAMS


Art. No. 80116-201
09 / 2004

J11

5
F10
1
3
2
2 250mA
3
1
J10

D106
NS2004
NS2004
D109
D104 D105

Bruecke Bruecke

D103
1N5383
30128-661

C100

0.01uF
D102
1N5383
D101

1N5373

D107

CIRCUIT DIAGRAMS
D108
Protection Board

NS2004
NS2004
Diese Zeichnung ist urheber-
A Datum Name rechtlich gesch tzt, daher
Gert/UNIT
Weitergabe und Vervielfltigung ICC 350 MMH Doku
Gezeich. 01-12-97 E.Werner ohne unsere Genehmigung
unzulssig
Gepr ft 01-12-97 E.Werner Benennung/Title

LP un.: 40128-141 Protection-Board


LP bs.: 30128-661
Zeichnungsnummer/DWG.NO
Nr. nderung Datum Name Blatt 1 von 1 30128-661
ICC 350 MIC-MIEN-DOKU

239 / 266
ICC 350 MIC-MIEN-DOKU
Protection Board (bare)
40128-141

240 / 266 5 CIRCUIT DIAGRAMS


Appendix A
Part Numbers
ICC 200 (D)
10128-002/-010/-023

30128-060 50502-059 30121-025 30121-023 30121-195


51501-167 40128-103 30128-065 30128-056 51501-167
Art.-No. 80116-201
09 / 2004

30121-086 51601-056 51611-051


(Fuses)
30128-063 50610-009 51031-043 (Pot.) 51603-000
51501-190 (button) (cpl.)
-191
-192

A APPENDIX A 243 / 266


ICC 200 (UL)
10128-202/-204/-205

30128-458 50502-069 30128-725 30128-727 30128-728


(cpl.)
51501-167 30128-691 30128-065 30128-056 51501-167
(pin)
40128-103

30121-086 51601-056 51611-100 (Fuses)


30128-063 50610-009 51031-043 51603-000 (cpl.)
51501-190
51501-191
51501-192

244 / 266 A APPENDIX A


ICC 200 (INT)
10128-009/-015/-036

30128-458 50502-059 30128-725 30128-727 30128-728


51501-167 30128-691 30128-065 30128-056 51501-167
(pin)
40128-103
Art.-No. 80116-201
09 / 2004

30121-086 51601-056 51611-051 (Fuses)


30128-063 50610-009 51031-043 (Pot.) 51603-000
51501-190 (Button, cpl.)
-191
-192

A APPENDIX A 245 / 266


ICC 200 (F)
10128-051/-054/-056

30128-116 50502-059 30121-025 30121-023 30121-195


51501-167 40128-112 30128-065 30128-056 51501-167

51601-056 51611-051
30128-063 30121-086 50610-009 51031-043 51603-000
51501-190
51501-191
51501-192

246 / 266 A APPENDIX A


ICC 200
Boards

40128-103
40128-112 (F)

Gezeich. = Drawn

Geprüft = Checked

Freigabe = Approv.

Datum = Date*

Name = Name

Maßstab = Scale

Datei = File

Projekt = Project

Benennung = Title

Nummer = Number

Ers. für = Replaces

Ers. durch = Repl. by


Art.-No. 80116-201
09 / 2004

A APPENDIX A 247 / 266


ICC 300 (D)
10128-070, -071

51501-167 30128-313 40128-133 30128-021 30121-390 51501-167


50502-059 30121-025 30121-023 30121-023 30121-195

30121-086 30128-022 50610-009 51031-043 (Pot.) 51603-000


51501-190
30127-011 51601-025 51611-051
-191
(Fuse)
-192

248 / 266 A APPENDIX A


ICC 300 (UL)
10128-213, -214

51501-167 30128-419 30128-725 30128-021 30121-390 51501-167


50502-069 30128-691 40128-133 30128-726 30128-728
(Pin)
Art.-No. 80116-201
09 / 2004

30121-086 30128-022 50610-009 51031-043 51611-100


51501-190 (Fuses)
30127-011 51601-025 51603-000
-191
-192

A APPENDIX A 249 / 266


ICC 300 (INT)
10128-077, -078

51501-167 30128-419 30128-725 30128-021 30121-390 51501-167


50502-059 30128-691 40128-133 30128-726 30128-728

30121-086 30128-022 50610-009 51031-043 51603-000


51501-190
30127-011 51601-025 51611-051
-191
(Fuse)
-192

250 / 266 A APPENDIX A


ICC 300 (F)
10128-072, -073

51501-167 30128-315 40128-134 30128-021 30121-390 51501-167


50502-059 30121-025 30121-023 30121-023 30121-195
0Art.-No. 80116-201
09 / 2004

30121-086 30128-022 50610-009 51031-043 51603-000


51501-190
30127-011 51601-025 51611-051
-191
-192

A APPENDIX A 251 / 266


ICC 300
Boards

40128-133 (D/INT)
40128-134 (F)

Gezeich. = Drawn

Geprüft = Checked

Freigabe = Approv.

Datum = Date*

Name = Name

Maßstab = Scale

Datei = File

Projekt = Project

Benennung = Title

Nummer = Number

Ers. für = Replaces

Ers. durch = Repl. by

252 / 266 A APPENDIX A


ICC 350 (D)
10128-016 (Endo)

50502-059 30121-025 30121-023 30121-023 30121-195


30128-016 30128-021 40128-101 30121-390
Art.-No. 80116-201
09 / 2004

51501-167 30127-011 30128-022 50610-009 51031-043 51611-051 51501-167


51601-025 51501-190
30121-086 51603-000
51501-191
51501-192

A APPENDIX A 253 / 266


ICC 350 (UL)
10128-200, -206 (Endo)

50502-069 30128-725 30128-726 40128-101 30128-728


30128-441 30128-021 30121-390
30128-691

51501-167 30127-011 30128-022 50610-009 51031-043 51611-100 51603-000


51501-190 (Fuses)
30121-086 51601-025
51501-191
51501-192

254 / 266 A APPENDIX A


ICC 350 (INT)
10128-061 (Endo)

50502-059 30128-725 30128-726 40128-101 30128-728


30128-441 30128-021 30121-390
30128-691
Art.-No. 80116-201
09 / 2004

51501-167 30127-011 30128-022 50610-009 51031-043 51611-051 51501-167


51601-025 51501-190
30121-086 51603-000
51501-191
51501-192

A APPENDIX A 255 / 266


ICC 350 (F)
10128-055 (Endo), -082 (MIC)

50502-059 30121-025 30121-023 30121-023 30121-195


30128-080 30128-021 40128-110 30121-390
30128-679 (MIC)
30128-668

30121-431
51708-043

51501-167 30127-011 50610-009 51031-043 51611-051 51501-167


51501-190 (Fuses)
30121-086 30128-022
51501-191
51604-035 30128-680 (MIC) 51603-000
51501-192

256 / 266 A APPENDIX A


ICC 350 M-Doku
10128-081

50502-059 30121-025 30121-023 30121-023 30121-390


30128-533 30128-021 40128-101 30128-668 30121-195
Art.-No. 80116-201
09 / 2004

51501-167 51708-043 51601-025 50610-009 50600-021 51603-000


51031-043
30121-086 30127-011 30128-671 51611-051 51501-167
51501-190
51501-191/-192

A APPENDIX A 257 / 266


ICC 350 Z
10128 -065

50502-059 30121-025 30121-023 30121-023 30121-431 30121-195


30128-083 30128-021 40128-101 30121-390

30121-086 30128-085 50610-009 51031-043 51611-051 51501-167


51501-190
51501-167 30127-011 51604-035 51601-025 51603-000
51501-191
51501-192

258 / 266 A APPENDIX A


ICC 350 T
10128-066

50502-059 30121-025 30121-023 30121-023 30121-195


30128-089 30128-021 40128-101 30121-390
Art.-No. 80116-201
09 / 2004

51501-167 30127-011 30128-085 50610-009 51031-043 51611-051 51501-167


51501-190
30121-086 51604-035 51601-025 51603-000
51501-191
51501-192

A APPENDIX A 259 / 266


ICC 350 M (INT)
10128-083, -310

50502-059 30128-725 30128-726 40128-101 30121-390


30128-606 30128-021 30128-668 30128-728
30128-691

51501-167 51708-043 51601-025 50610-009 51603-000


51031-043
30121-086 30127-011 30128-204 51611-051 51501-167
51501-190
51501-191
51501-192

260 / 266 A APPENDIX A


ICC 350 M
10128-080

50502-059 30121-025 30121-023 30121-023 30121-390


30128-533 30128-021 40128-101 30128-668 30121-195
Art.-No. 80116-201
09 / 2004

51501-167 51708-043 51601-025 50610-009 51603-000


51031-043
30121-086 30127-011 30128-671 51611-051 51501-167
51501-190
51501-191/-192

A APPENDIX A 261 / 266


ICC 350
Boards

40128-101
40128-110 (F)

Gezeich. = Drawn

Geprüft = Checked

Freigabe = Approv.

Datum = Date*

Name = Name

Maßstab = Scale

Datei = File

Projekt = Project

Benennung = Title

Nummer = Number

Ers. für = Replaces

Ers. durch = Repl. by

262 / 266 A APPENDIX A


Appendix
Abbreviations, Notes,
Addresses
B
264 / 266 B APPENDIX B
Appendix
Abbreviations
Notes
Addresses

Abbreviations
The following list summarizes all those abbreviations and symbols which are used in this service manual.

Abbreviation means Abbreviation means

NE neutral electrode ö phase angle

| non-split NE V(p) volts (peak value)

|| split NE A(eff) amperes (r.m.s. value)

Parts lists
This service manual includes no parts lists. However, if you should need to refer to part numbers, please see
Appendix A.

Measuring equipment
For a list of recommended measuring equipment for servicing the units ICC 200, ICC 300 and ICC 350,
please refer to this service manual (Chapter 1, Test program 16).

Diagrams of electrical dimensions


The diagrams of the electrical dimensions are not shown in this service manual. However, you will find
these printed in the instruction manuals for the respective unit.

Any questions?
This service manual has been put together carefully and was subjected to a continuous improvement process
during its creation by the Service Department and/or the Development Department at ERBE Elektromedizin.
Art. No.: 80116-201

Nevertheless, you may still have questions; additionally, this manual cannot assume to be perfect and
completely without error. In such cases, please contact:
09 / 2004

Contents, formulation, structure, technical Technical questions regarding service and the
information units
Dipl.-Phys. Michael Grosse (Development Dept.) Service Manager Roland Bauer (Service Dept.)
Tel.: (+49) 70 71 / 755–254 Tel.: (+49) 70 71 / 755–454
E-mail: mgrosse@erbe-med.de E-mail: techservice@erbe-med.de

B APPENDIX B 265/ 266


Your notes

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