c
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? ? ? average Using Parametric Sweep in the PSPàCE, the values of
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? ? ? ? ? voltage of the rectifier he values of L and C could also be
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output voltage of the full wave rectifiers [4] he design of
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?? (PWM) àn this paper, the different approach of control circuit
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? design is shown using 555 timer and OPAMPS
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? he basic full wave rectifier circuit to be implemented is
shown in Fig 1
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à àRODUCàO
A Design of ànductive Filter Since the average voltage across the inductor in the steady
state is zero, the average output voltage for continuous
Design of inductive filter was made for Į=0, C=0 and R=10 inductor current from eqn (1 2) is,
he value of series inductance is to be calculated for the peak 2r
to peak ripple to be 10% of the average output voltage (v0) ï ö

For the full wave rectifier, sinusoidal voltage across the load Average inductor current must equal the average resistor
can be expressed as a Fourier series consisting of a dc term current because the average capacitor current is zero
and the even harmonics [6]
ï 2r
ö ö ö (1 4)

ï ± ï
2,4
cos( ï ) (1 1) Considering the second harmonics,
2r 1 1
where, 2 72 052ï
2 r
1 3
ï (1 2) Assuming the capacitor is short circuited to ac terms, the
harmonics voltage V2 exists across the inductor
2r 1 1
(1 3) àf V02 be the output voltage at load R for the second harmonic,
1 1 then using voltage division rule,
1
For the given supply voltage, average output voltageV0 is
2
given by
02 72 052
(1 5)
ï
2 r
2 2 120
108 037 ï
1
2
2
0
Average current , ï 10 80 r
Since average voltage across the inductor is zero, the average
For n=2 and 4 , from eqn (1 3) voltage across the resistor is,
2 r 1 1 2r
2 72 025ï ï ö ö 108 03ï
1 3 
For the peak to peak ripple at the load to be 10% of its average
2 1 1
4 r 14 405ï value,
3 5 10
For output voltage ripple to be within 10% of Vo D ö ï ö 10 80ï and
100
´ ´
´
´ D
Dï 1 08r
he current amplitude at each frequency is calculated by
2 And the current in resistor due to the second harmonic voltage
ö ö ö (1 4) is,
±10 2 377
22 144 05
ï 2 2 1 08 02
02
(1 6)
10 2 377 10 2 377
which gives L=0 176H But,
202
B Design of second order filter Vï ö 2 02 ö ö 1 08r
Putting R=10 ,
02 ö 5 4ï 2 ero crossing detection
he zero crossing detectors consists of two parts he first is
Putting the value of in equation (1), and choosing step down transformer and the second is the comparator
ö 110r arbitrarily and solving for C , we get
ransformer is used for down converting the 170 PeakPeak
150 ac voltage to about 17 peakpeak voltage he conversion is
chosen in by selecting the values of L1 and L2 according to
V COROL CàRCUà DESà equation (2 1)[5]
Fig 2: Block diagram of the control circuit
Fig 3: Circuit diagrams for the positive edge zero crossing detection of the
input voltage waveform
1 Reference Signal
he transformer input voltage is the supply voltage which is
he reference signal is the same input supply voltage of 120V 170 volt peak to peak at 60 Hz he transformer inductances
(rms), 60Hz
L1 and L2 are chosen as 260 and 2 henry respectively in half cycle of the input wave he negative edge zero crossing
order to get 17 volt peak to peak at the secondary circuit is shown in fig(8) and the corresponding waveform is
For the simulation of transformer, XFRM_LàEAR of the shown in fig(10)
Analog Library, in pspice is used he coupling factor K is
chosen to be 1 Since the secondary circuit needs a DC
connection to ground, it is done by adding a large resistor of
100M
he ua741OPAMP is used as a comparator he output
voltage of the transformer is directly fed to the Opamp ua741
which is biased to +5volt at +Vcc and and 0Volt to ±Vcc,
produces the output pulses as shown in Fig 4
Fig 6: egative edge zero crossing detection of the input voltage waveform
here are two separate phase control circuits for the two
Fig 4: Positive edge, zero crossing detection of the input voltage waveform thyristors àt consists of 555 timers and MOSFE as a
(out1) switch he MOFE used is the àRF540 he 555 timer is
As shown in Fig 4, the pulse generated by the opamp starts at operated in monostable mode àn the monostable mode of the
the positive edge zero crossing point of the input voltage 555 timer, the output pulse of duration equivalent to 1 1RC
wave hese pulses are later used for the firing of first second is produced at the output pin 2 when a negative edge
hyrisotr(1), which becomes forward biased during the transition occurs at the trigger pin 2
positive half cycle of the input voltage wave
i Operation of phase control circuit
ii egative edge zero crossing detection of the
input voltage waveform àn the monostable mode of operation, pins 6(threshold) and
7(discharge) are shorted and connected to the Vcc(+12V) via a
For the zero crossing detection of the input voltage wave resistor(R) and connected to the ground via a capacitor(C2) as
while going from negative value to positive value (i e for the shown in Fig 7 hese values of R and C determines the period
negative edge zero crossing detection), the signal from the of the output pulse given by 1 1RC sec Pin 5(control) is
transformer is inverted using the an opamp as an inverter grounded via a capacitor(C1) Pin 4(reset output) is connected
whose gain is adjusted to 1 by keeping the values of R1 and to the Vcc Pin2(trigger) input to the 555 timer is connected to
Rf equal his inverted signal is sent to the another opamp as a the source terminal of the MOSFE(M2) which his connected
comparator as shown in Fig 5 to generate the pulse at the to the source via a resistor
negative zero crossing edge
he MOSFE(àRF(540) is used as a switch which is driven by
the pulse generated at the zero crossing of the input voltage
waveform When there is no input pulse at the gate terminal of
the MOSFE, MOSFE behaves as an open circuit thus a
trigger input of the 555 timer remains at the high voltage level
As soon as the gate of the MOSFE receives the input pulse
from the zero crossing detection circuit, it behaves as a short
circuit thus shorting trigger pin of 555 timer his result in the
transition from a high voltage to low( 0 volt) in the trigger
Fig 5: Circuit for the negative zerocrossing detection of the input voltage input of timer, which triggers the timer he output voltage at
wave pin3 of timer remains high for the time interval of 1 1RC
second Fig 7shows the output pulse of the 555 timer used for
his method could detect the zero crossing of the negative firing the Q1 thyristor he O time is 3 3mS as estimated by
edge of input wave(pulse generated starts from the negative 1 1*R*C ( R=500 and C=6µF) Similarly Fig 8 shows the
zero crossing), but it could not detect the positive edge phase control circuit diagram for firing thyristor Q2 Fig 10
crossing of input wave( which is already determined ) shows the output voltage waveform of 555 timer which has
egative edge detection is used for firing the second the O time of 3 3ms as calculated by 1 1RC
thyristor(2) since it gets forward biased only in the negative
Fig 10: Output of the 555 timer for firing the Q2 thyristor
Fig 12: voltage pulse found at n1 Fig 14: Voltage pulse found at m1
Fig 13: Voltage pulse found at n2 Fig 15: Voltage pulse found at m2
ö 0u
r
waveform Vs(source voltage)Fig 19, Vd(Diodes voltage)Fig
20, inductor current (à0)Fig 21, source current (às)Fig 22 and
output voltage (V0)Fig 23 are as shown
2
From eqn (3 2),
Fig 25: Source current (à s)
1 045 2
0 845
120 20 10 28
ow,
2
r 1,2r
c (3 3)
1,2r
But the fundamental source rms current calculated from FF
of current(às) from PSPàCE, Fig 22 is
1, r 0 4895
Fig 26: ànductor current (à0)
Putting the values in eqn(3 3) , we get
 ö 0 4895
Output voltage ripple calculated from the simulation, Fig 23
0,
Dï 100 (3 4)
ï
109 54 99 03
Dï 100 10 16
103 8
Fig 27: Capacitor voltage ( v0)
ö 0
ï ï r
Gm Power factor and HD calculation for case ààà
ïr ö 2 38
2
ö ïr ö 56 56
Again,
32
1r ö ö 2 26
2
56 56
ö ö ö ö 0 198
, r ,r 120 2 2 37 Fig 30: waveform for (Vs) and load voltage(Vo)
ö 30
ï ï r
Fig 28: Source current(às)
m
107 71
2
ïr
Fig 29:FF of source current(às)
From eqn(3 2)
107 71
0 23
170
3 74
2
From eqn(3 3),
2
r i 1,2r
 ö ö 0 619
1,2r
Vàà COCLUàO