EC Lab Manual (08.407)

Electronic Circuit Lab Manual
Expt. No. 1
SERIES VOLTAGE REGULATOR

Objective:
Aim of the experiment is to understand the operation of simple series voltage regulator
Equipments and Components Required:
1. Digital Multimeters (DMM).
2. DC power supply.
3. Project Breadboard.
4. Resistors.
5. BC107 BJT
6. Zener diode.
7. Connection Wires.
Circuit Diagram:
Design:
Given that
Vo = 15V, ILmin = 1mA, ILmax = 100mA, Vin min = 16V, Vin max = 30V, IZ max = 100mA and β = 100
Optimum value of and
Optimum value of and
Department of ECE, VKCET Page 1

Procedure:
1. Test all components
2. Connect the circuit diagram
3. Connect the variable dc power supply as input and turn on.
4. Vary the input voltage from 0 to 30V and note down the corresponding output voltage
using voltmeter for line regulation
5. Turn off the power supply
6. Replace RL with 100k pot in series with RLmin
7. Turn on power supply and set it to 20V
8. Vary the pot from higher position to lower position, note down the output voltage using
voltmeter and load current using ammeter for load regulation
Pre-Lab Assignments:
1. If 15Vpp sinusoidal input voltage is applied to the circuit shown above, sketch the
output waveform.
2. If the input Vin = 10V and R1 = 10kΩ , calculate I1 and IZ, where VZ = 5.2V and β =
50.
3. If R1 reduces what is the improvement of the circuit?
4. Derive the expression for Vo of the circuit shown in fig.1
5. Find optimum value of R1.
6. How does changing RL affect Vo?

Model Characteristics:
Line Regulation: Load Regulation
OBSERVATIONS
Design parameters and components used:
Vo = 15V, ILmin = 1mA, ILmax = 100mA, Vin min = 16V , Vin max = 30V, IZ max = 100mA and β = 100
(For maximum current) (For minimum current)

10Ω to 1.5k Ω
Tabular Column
Line regulation
RLmax=15kΩ, R1max=1.5kΩ
Vin(V) Vo(V)
0 0
1 1.3
2 1.2
3 2.2
4 3.2
5 4.1
6 5.1
7 5.9
8 6.9
9 7.9
10 8.8
11 9.8
12 10.5
14 12.2
15 13.2
16 14
17 14.4
18 14.6
20 14.6
30 14.6

Load regulation
Vin = 30V, RLmin = 150Ω
IL(mA) Vo(V)
0 15
1 14.8
2 14.7
4 14.7
7 14.7
8 14.7
9 14.7
10 14.7
50 14.7
Viva Questions::
1. Define regulation. List out different types of regulators.
2. Define line and load regulation.
3. What is percentage of voltage regulation?
4. Compare different types of regulators.
5. Draw the basic block diagram of series voltage regulator.

Expt. No. 2
POWER AMPLIFIERS
Objective: The aim of the experiment is to study the operation and efficiency of Class B and
Class AB power amplifiers
Components and equipments required:
1. Oscilloscope (Scope/CRO).
2. Function Generators (FG).
3. DC power supply.
5. Resistors.
6. Capacitors.
7. SL100, SK100 BJTs
8. 1N4007 Diodes
10. Oscilloscope Probes.
Circuit diagram:
Class B Power Amplifier:
Fig. 1
Theory:
Class B circuit provides an output signal varying over one-half the input signal cycle, or
for 180° of signal. The dc bias point for class B is therefore at 0 V, with the output then varying
from this bias point for a half cycle. Obviously, the output is not a faithful reproduction of the
input if only one half-cycle is present. Two class B operations—one to provide output on the
positive output half-cycle and another to provide operation on the negative-output half-cycle are
necessary. The combined half-cycles then provide an output for a full 360° of operation. This
type of connection is referred to as push-pull operation.
An amplifier may be biased at a dc level above the zero base current level of class B and
above one-half the supply voltage level of class A; this bias condition is class AB. Class AB
operation still requires a push-pull connection to achieve a full output cycle, but the dc bias level
is usually closer to the zero base current level for better power efficiency. For class AB
operation, the output signal swing occurs between 180° and 360° and is neither class A nor class
B operation.
Following figure shows a diagram for push-pull operation.
An ac input signal is applied to the push-pull circuit, with each half operating on alternate
half-cycles, the load then receiving a signal for the full ac cycle. The power transistors used in
the push-pull circuit are capable of delivering the desired power to the load, and the class B
operation of these transistors provides greater efficiency than was possible using a single
transistor in class A operation.
DC Analysis: The dc power supplied to the load by an amplifier is given by
AC Analysis: Output power is given by
The efficiency of Class B amplifier can be calculated by

Maximum η of Class B operation is given by 78.5%
The power dissipated by the individual output transistor is given by

Design:
Given that
The transistors are as emitter follower.
Output power,
Input power,
Efficiency,
Power dissipation by each transistor,
For R1:
Under dc conditions,
and
To keep transistor at cut-off region under dc biased condition I1 should be low.
And .
For R2:
Class B operation R2 should be negligible. Use the equation .

Choose
For Class AB operation or replace the resistors with diodes
Choose
Note: Try to observe the output for different R2

For coupling capacitors:
Choose and
Procedure:
Steps:
1. Check the components
2. Connect the circuit (use R1 for class B operation)
3. Turn on the power supply and apply input signal vin (1Vpp) from function generator
4. Connect CRO probes channel 1 to input and channel 2 to output
5. Observe the input and output wave forms and measure I dc by setting vin =0V and Io
vin=1Vpp, also measure corresponding Vo
7. Replace R1 for Class AB operation
8. Turn on power supply
9. Observe the input and output wave forms and measure I dc by setting vin =0V and Io
vin=1Vpp, also measure corresponding Vo

Pre-lab Assignments:
1. What is the ideal DC value of the output signal of Class B and Class AB
amplifier if there is no input? Compare this with Class A amplifier.
2. Plot one of the collector current (I ) vs. time, is it full-wave of half-wave?
C
3. Derive expressions for of Class B power amplifier.

4. List out the advantages and disadvantages of Class A, Class B, Class AB power,
Class C and Class D amplifiers.
5. Design the circuits shown in fig.1 for , β =100,
and draw the output wave form for sinusoidal input.
Model Waveforms:
Class B power amplifier:
Class AB power amplifier:

Simulated Results:
Efficiency:
Class B Power Amplifier:
R1=24kΩ (If it is very high, η can be increased to ideal value), R2=100Ω
, RMS current delivered from source during the operation
Class AB Power Amplifier (R2=10k ) :
, RMS current delivered from source during the operation
OBSERVATIONS

Input and Output waveforms:

Class B
Class AB

Efficiency
Class B
(?) Not satisfied. This is due to the lack of true RMS

meter
Class AB
(?) Not satisfied. This is due to the lack of true rms meter
Viva Questions:
1. Differentiate Voltage Amplifiers and Power Amplifiers.
2. Classify Power amplifiers.

3. Define efficiency of Power Amplifiers.

4. Suggest a way (with a diagram) how you might be able to improve the biasing to
eliminate the crossover distortion.
5. How you might reduce distortion by using a negative feedback?
6. What is the practical application of power amplifiers?

Expt. No. 3
DIFFERENTIAL AMPLIFIER USING BJT

Objective: The aim of the experiment is to study the operation of differential amplifiers using
BJT and obtain CMRR and input resistance.
3. DC power supply.
5. Resistors.
6. Capacitors
7. Diodes 1N4007
8. BC 107 or SL100 BJTs
Circuit diagram:
a) Differential Amplifier using BJT:
i) Differential Mode, Balanced Output (for differential gain)
Fig. 1

ii) Common mode, balanced output (for common mode gain)
Fig. 2
Different Modes:
a) Dual input balanced output
The circuit is same as shown in Fig. 1
b) Dual input unbalanced output
The input is same as above, but output is taking across any of the transistor’s collector
and ground.
c) Single input balanced output.
One of the inputs set to ground and output is same as first mode.
d) Single input unbalanced output.
One of the inputs set to ground and output is same as second mode.

Power Supply Arrangement for Dual Voltage Source:
Fig. 3
Note: For unbalanced output use coupling capacitor at the output
Theory:
The differential amplifier, or differential pair, is an essential building block in all

integrated amplifiers. In general, the input stage of any analog integrated circuit with more than
one input consists of a differential pair or differential amplifier. The basic differential pair circuit
consists of two-matched transistors Q1and Q2 , whose emitters are joined together and biased by
the constant current source circuit. Q1, D1, D2, R2 and RE acts as current source, which introduce
constant current IEE to the differential amplifier with high ac source resistance, since ac
equivalent of this dc current source is ideally open circuit.
The important characteristics of the differential amplifier are: the common-mode rejection
ratio CMRR, the input differential resistance R id, and the differential-mode gain Ad.
Differential gain:
, where Vid is differential input voltage, and Vod is differential
output. For a perfectly matched pair transistor differential gain should be infinite.
CMRR: Common Mode Rejection Ratio, , where Ac is common mode gain
and it is , where Vcm is common mode input voltage, and Voc is common
mode output. For perfectly matched pair transistor common mode gain should be zero, and then
CMRR should be infinite.
Differential input resistance: The resistance between the differential input and ideally it
should be infinite.

DC Analysis:
For constant current source circuit:
AC Analysis:
Balanced output Mode:
Differential gain
Common mode gain
CMRR
Differential mode input resistance
Output resistance
Unbalanced output Mode:
Differential gain
Common mode gain
CMRR
Differential mode input resistance
Output resistance
Resistance of current source circuit:
Design:
Given that
From data sheet of BC 107, ,

From the above design: ,
Procedure:
Steps
3. Turn on the power supply and apply differential input signals v 1 and v2 using
function generator
4. Connect CRO probe of channel 1 to one input and channel 2 to unbalanced

output vo1 via a coupling capacitor, observe the differential input and output for
differential gain
5. Repeat the above step for other vo2
6. Connect channel 2 probe across the collector of transistors without coupling

capacitors
7. Observe the balanced output voltage for differential gain
8. Apply same signal to the two inputs as common mode input
9. Repeat step 6 and observe input and output for common mode gain

1. Define CMRR.
2. Draw the basic circuit of differential amplifier using BJT. Give the significance of
RC and REE
3. Design differential amplifier with current source circuit using BJT using the
following specifications
4.
5. Give the use of current mirror circuit in differential amplifier.
6. Give the advantages of MOSFET differential amplifier.
7. Design differential amplifier with current source circuit using MOSFET using the
following specifications
8. Draw the differential amplifier circuit using BJT with active load.
Model Waveforms:
Differential Input and Balanced Output

Differential Input and Unbalanced Output

Common Mode Input Unbalanced Output

Simulated Results:
Differential Gain:
For balanced output:
For unbalanced output:
Common Mode Gain:
OBSERVATIONS
From data sheet of BC 107, ,
Differential Mode:
Input and output wave forms:

i) Balanced output:
ii) Unbalanced output:
Common Mode:
i) Balanced output:
Viva Questions:
1) Define differential amplifier and give its application
2) Draw a current mirror circuit. Differentiate it with constant current source.
3) In a differential amplifier |VCC| ≠ |VEE|, list out the problems
4) Differentiate different configurations of differential amplifiers. Which one is

commonly used?
5) Give the main advantage of constant current bias over emitter bias.

Expt. No. 4
CASCADE AMPLIFIER
Objective: The aim of the experiment is to study the operation of cascade amplifier and obtain
the frequency response and bandwidth
3. DC power supply.
5. Resistors.
6. Capacitors.
7. SL100 BJTs
Circuit diagram:
Fig. 1

Theory:
A single stage of amplification is not enough for a particular application. The overall gain
can be increased by using more than one stage, so when two amplifiers are connected in such a
way that the output signal of the first serves as the input signal to the second, the amplifiers are
said to be connected in cascade. The most common cascade arrangement is the common-emitter
RC coupled cascade amplifier. Common-emitter amplifier exhibit high voltage, high current, and
high power gains, so they are very familiar than other configurations.
Multistage amplifiers can be used either to increase the overall small signal voltage gain,
or to provide an overall voltage gain greater than 1, with a very low output resistance. Figure 1
shows an RC-coupled cascaded amplifier. Capacitors C1 and C2 couple the signal into Q1 and Q2,
respectively. C3 is used for coupling the signal from Q 2 to its load. If the operation of coupled
amplifiers is considered, a complicating factor appears. The addition of a second stage may alter
the characteristics of the first stage and thus affect the level of signal fed to the second stage.
To compute the overall gain of the amplifier, it is easier to calculate unloaded voltage
gain for each stage, then including the loading effect by computing voltage dividers for the
output resistance and input resistance of the following stage. This idea is illustrated in figure 2.
Each transistor is drawn as an amplifier consisting of an input resistance R in , an output
resistance, Rout along with its unloaded gain, AV(NL).
Fig. 2

Then, the overall loaded gain A V , of this amplifier can be found by:
For the RC Coupled (CE - CE) multistage amplifier with CE:
and
Note that if a load resistor was added across the output, an additional voltage divider consisting
of the output resistance of the second stage and the added load resistor is used to compute the
new gain.
If and
DC Analysis:
For 1st stage amplifier:
Where, and
Stability factor
For 2nd stage amplifier the analysis is same.
AC Analysis:
Voltage gain,

Input resistance,
Output resistance,
nd
For 2 stage amplifier:
Voltage gain,
Input resistance,
Output resistance,
Design:
Given that
For 2nd stage amplifier:
For

From the above design , where
For
For capacitors:
Where

Procedure:
Steps
2. Connect the circuit diagram for second stage amplifier
3. Turn on the power supply, apply input signal of voltage 10mVpp (low voltage) to
the input using function generator
4. Connect CRO channel 1 probe to input and channel 2 to output.
5. Adjust the input signal frequency to mid band (10kHz)
6. Observe the input and output signal and measure the mid band gain
7. Vary input signal frequency from 10Hz to 3MHz (in decade roll-off rate), note
down the corresponding output voltage for plotting frequency response
8. Turn off the power supply and construct first stage of amplifier and coupled its
output to second stage.
10. Repeat the steps 4 to 7
1. Find the Q-point of each stage of the circuit shown in fig.1, where R 1 = R3 =
20kΩ, R2 = R4 = 10kΩ, RE1=RE2= 1kΩ, RC1=4kΩ, RC2=1kΩ VCC = 15V, VCE1=
VCE2=0.2V, VBE1= VBE2=0.6V
2. Re-design the components of the circuit shown in fig. 1 for fL=1kHz
3. Define Power gain, Voltage gain and Current gain. How it represent in dB?

4. What is transition frequency of transistor? Give the typical value for the given
transistor.
5. Simulate the circuit given in experiment using SPICE. Compare designed and
simulated dc biasing conditions, show input and its corresponding output wave forms,
plot frequency response and compare it with designed values.
Model Waveforms:
Input Wave form:
Output Waveforms (1st stage and 2nd stage):

Tabular Column:
For Single Stage Amplifier:
Input Output Voltage Av in dB

Signal Voltage, Gain,
Frequency, vo (vpp) Av
f (Hz)
For Two Stage Amplifier:

f (Hz)
Simulated Results:

First Stage
Mid band gain = 21.9dB
Lower cutoff frequency fL = 192Hz
Upper cutoff frequency fH = 4.3MHz
Bandwidth = 4.3MHz
Multi stage
Bandwidth = 4.15MHz
OBSERVATIONS
Input and output waveforms:
Single stage:

Two stage:
Tabular column:
Single stage amplifier
Input Output Voltage Av in

Signal Voltage, Gain, dB
f (Hz)

Two Stage Amplifier:

f (Hz)
Viva Questions:
7. What are the requirements of biasing and coupling circuits in BJT amplifiers?
8. What is the use of CE in RC coupled amplifier and give its influence in frequency
response?
9. Give the advantages and disadvantages of cascade amplifier.
10. What is half-power frequency?
11. In amplifiers, why mid frequency gain is independent to frequency?
12. What is bode-plot?
13. What is the method to increase the output voltage swing of an amplifier?
14. How load resistances influence the gain of BJT amplifiers?
15. What is SPICE?

Expt. No. 5
CASCODE AMPLIFIER
Objectives: a) To study the operation of cascode amplifier using BJT and obtain the frequency
response and bandwidth.
b) To simulate cascode amplifier circuit using SPICE.
3. DC power supply.
5. Resistors.
6. Capacitors.
7. BEL100N BJTs
Circuit diagram:
a) Cascode amplifier using BJT
Fig. 1

Theory:
The bandwidth of CE amplifier is limited due to the Miller capacitance effect at high
frequency operation. This can be overcome by using adding a second stage CB amplifier (direct
coupling with CE stage). This arrangement is called cascode amplifier. This amplifier has high
bandwidth due to the reduction in Miller capacitance effect. The gain of the amplifier is high due
the overall gain of CE and CB stage. The circuit has an input characteristics of CE amplifier and
output characteristics of CB amplifier.
In fig.1 R1, R2, and R3 form biasing network for Q1 and Q2; C1 and C3 for coupling ac
signals; C2 and CE for bypassing resistors R2 and RE, respectively at ac signals. Transistors Q1 and
Q2 should be identical
DC Analysis:
AC Analysis:
Voltage gain,
Current gain, , where
Input resistance,
Output resistance,
Design:
Given that
Find typical value of β from the data sheet of BEL100N.
(To get maximum output swing keeps Q1 collector voltage low)
(To get maximum output swing keeps Q2 collector voltage 50% of VCC)

Procedure:
Steps
7. Vary input signal frequency from 10Hz to 3MHz (in decade roll-off rate), note
down the corresponding output voltage for plotting frequency response

1. Consider the following circuit.
Where
.
Find Voltage gain, Current gain Input impedance and Output impedance of the circuit
2. Simulate the above circuit (use using SPICE and

submit: a) Circuit diagram with dc bias voltages, b) Input and output wave forms
and c) Frequency response curve

Model Waveforms:
Input Wave form:
Output Waveform:
Tabular Column:
Input Output Voltage log10f Av in

f (Hz)

Simulated Results:
Mid band gain =37.2dB

Lower cutoff frequency fL = 752 kHz
Higher cutoff frequency fH = 24MHz
Bandwidth = 25.8MHz
OBSERVATIONS
Given that
Input and output wave forms

Tabular Column:

f (Hz)
Viva Questions:
9. Define miller effect.
10. Say the advantages and disadvantages of CE, CC and CB configuration of BJT.
11. How the bandwidth improved in cascode amplifier?
12. Which multistage amplifier has maximum bandwidth?
13. Give the expression for current gain of cascode amplifier using BJT.
14. What are the applications of cascode amplifier?
15. In an amplifier which factors limits gain at low and high frequencies?

Expt. No. 6
FEED BACK AMPLIFIERS

Objectives: a) To study the operation of voltage series negative feedback amplifier and obtain the
frequency response and bandwidth
b) To study the operation of current series negative feedback amplifier and obtain the
frequency response and bandwidth
3. DC power supply.
5. Resistors.
6. Capacitors.
7. SL100 BJTs / BEL100N/BC107
Circuit diagram:
a) Voltage series negative feedback amplifier
i) Without feed back
Fig.1

ii) With feedback
Fig. 2
b) Current series negative feedback amplifier:
i) Without feedback
Fig. 3

ii) With feedback
Fig. 4
Theory:
A feedback amplifier is one in which the output signal is sampled and fed back to the
input to form an error signal that drives the amplifier. The basic block diagram of feedback
amplifier is shown below.

The input signal, Vs, is applied to a mixer network, where it is combined with a feedback
signal, Vf. The difference of these signals, Vi, is then the input voltage to the amplifier. A portion
of the amplifier output, Vo, is connected to the feedback network of gain k, which provides a
reduced portion of the output as feedback signal to the input mixer network. If the feedback
signal is of opposite polarity to the input signal, negative feedback results otherwise positive
feedback.
The advantages of negative feedback are:
1. Higher input impedance.
2. Better stabilized voltage gain.
3. Improved frequency response.
4. Lower output impedance.
5. Reduced noise.
6. More linear operation.
Four basic types of feedback connections along with the properties are given below:
Series-Shunt (Voltage-Series)
Shunt-Shunt (Voltage-Shunt)
Series-Series (Current-Series)
Shunt-Series (Current-Shunt)
In the list above, voltage refers to connecting the output voltage as input to the feedback
network; current refers to tapping off some output current through the feedback network. Series
refers to connecting the feedback signal in series with the input signal voltage; shunt refers to
connecting the feedback signal in shunt (parallel) with an input current source. Series feedback
connections tend to increase the input resistance, while shunt feedback connections tend to
decrease the input resistance. Voltage feedback tends to decrease the output impedance, while
current feedback tends to increase the output impedance.
The gain and feedback factor of four feedback configurations are given below:

a) Voltage Series Feedback

Figure 2 show two-stage RC coupled amplifier cascaded with voltage series
feedback. The cascade amplifier gain , feedback gain and gain
with feedback . The part of output voltage ( is feedback to the

input loop and it opposes and results voltage series negative feedback. If ,
the amplifier gain is
b) Current Series Feedback
Figure 4 show single stage RC coupled amplifier with current series feedback.
The gain of the amplifier without feedback (with CE) . The feedback
element is RE . The gain of the amplifier with feedback . Here the output
current is fed back to the input ( ) is fed back to the input and it
opposes the input voltage . The feedback gain of the circuit is
Design:
a) Voltage series feedback amplifier:
Given that
For 2nd stage amplifier:
For

For
For capacitors:
Where

For obtaining higher cutoff frequency:
where and (considering first stage)
From datasheet
For feedback network:
Let
From the above design theoretical values of:
Voltage gain with feedback

Lower cutoff frequency without feedback
Lower cutoff frequency with feedback
b) Current series feedback amplifier:
Given that

From the above design theoretical values of:
Voltage gain with feedback,
Conductance Gain without feedback
Conductance Gain with feedback
Lower cutoff frequency without feedback
Lower cutoff frequency with feedback
Procedure:
Steps (Voltage series feedback)
3. Connect the circuit diagram without feedback
4. Turn on the power supply, apply input signal of voltage 2mVpp (low voltage) to the
input using function generator
8. Vary input signal frequency from 10Hz to 3MHz (in decade roll-off rate), note down
the corresponding output voltage for plotting frequency response
9. Turn off the power supply.
10. Connect the feedback circuit
11. Turn on the power supply, apply input signal of voltage 10mVpp to the input using
function generator

Steps (Current series feedback)
2. Connect the circuit diagram without feedback
3. Turn on the power supply, apply input signal of voltage 2mVpp (low voltage) to the
input using function generator
8. Turn off the power supply.
9. Connect the feedback circuit (Remove CE )
10. Turn on the power supply, apply input signal of voltage 10mVpp to the input using
function generator

If
Find a) Feedback factor b) Voltage gain without and with feedback c) Input impedance
without and with feedback d) Output impedance without and with feedback
2. Simulate the circuits shown in fig.1 to fig.2. Submit the following: a) Input and
output waveforms b) Frequency response.

Find bandwidth of the circuit where
Model Waveforms and Frequency Response:
Voltage Series Feedback Amplifier without feedback:
Input Wave form and Output Waveforms:
vin=2mVpp vo = 356mVpp

Frequency response:
Voltage Series Feedback Amplifier with feedback:
vin=20mVpp, vo = 28.8mVpp
Frequency response:

Current Series Feedback Amplifier without feedback:
vin=20mVpp vo = 5Vpp
Frequency response:

Current Series Feedback Amplifier with feedback:
vin=10mVpp, vo 25mVpp
Frequency response:

Tabular Column:
Voltage Series Feedback Amplifier without feedback:
Input Signal Output Voltage Av in dB

Frequency, f Voltage, Gain, Av
(Hz) vo (vpp)

f (Hz)

Current Series Feedback Amplifier without feedback:

f (Hz)

Signal Voltage, Gain, Av dB
Frequency, vo (vpp)
f (Hz)

Simulated Results:
a) Voltage Series feedback without feedback:
Mid band gain = 45dB

Lower cutoff frequency fL = 1.21kHz
Upper cutoff frequency fH =4.33MHz
Bandwidth = 4.32MHz
b) Voltage Series feedback with feedback:

Bandwidth = 5.479MHz
c) Current Series feedback without feedback:

Lower cutoff frequency fL = 1.12kHz
Upper cutoff frequency fH =2.46MHz
Bandwidth = 2.458MHz
d) Currente Series feedback with feedback:

Bandwidth = 12.2MHz
OBSERVATIONS
Voltage Series Feedback:

For feedback network:
i) Without feedback
ii) With feedback
Tabular Column:
i) Without feedback

f (Hz)

ii) With feedback

f (Hz)
Current Series Feedback:


i) Without feedback
ii) With feedback

Tabular Column:
i) Without feedback

f (Hz)
ii) With feedback

f (Hz)

Viva Questions:
1. What are the types of mixing and sampling used in voltage series and current
series feedback?
2. What is the effect of feedback on the input and output resistances in various
feedback?
3. What is the effect of negative feedback?
4. Show that the gain with feedback is independent of amplifier parameters.
5. What is meant by gain de-sensitivity?

Expt. No. 7
MULTIVIBRATORS
Objectives: a) To study the operation of astable, monostable and bistable multivibrators
b) To simulate multivibrator circuits using PSPICE
3. DC power supply.
5. Resistors.
6. Capacitors.
Circuit diagram:
a) Astable multivibrator:
Fig.1

b) Monostable multivibrator:
Fig. 2
c) Bistable multivibrator
Fig. 3

Theory:
Multivibrators are switching circuits and switches between a "HIGH" state and a "LOW"
state producing a continuous output. They can be used as oscillators, timers and flip-flops. The
circuit can be characterized by two amplifying devices (transistors) cross-coupled by resistors or
capacitors. There are basically three types of multivibrator circuits:
Astable - A free-running multivibrator that has NO stable states but switches continuously
between two states this action produces a train of square wave pulses at a fixed frequency.
Monostable - A one-shot multivibrator that has only ONE stable state and is triggered externally
with it returning back to its first stable state.
Bistable - A flip-flop that has TWO stable states that produces a single pulse either positive or
negative in value.
Fig. 1 shows the circuit diagram of astable multivibrator. The circuit has two stable states
that change alternatively with maximum transition rate because of the "accelerating" positive
feedback. It is implemented by the coupling capacitors C1 and C2 that instantly transfer voltage
changes because the voltage across a capacitor cannot suddenly change. In each state, one
transistor is switched on and the other is switched off. Accordingly, one fully charged capacitor
discharges (reverse charges) slowly thus converting the time into an exponentially changing
voltage. At the same time, the other empty capacitor quickly charges thus restoring its charge
(the first capacitor acts as a time-setting capacitor and the second prepares to play this role in the
next state). The circuit operation is based on the fact that the forward-biased base-emitter
junction of the switched-on bipolar transistor can provide a path for the capacitor restoration.
The switching periods of each transistor are . Thus

time period and frequency of square output at collector of transistor is
where
Figure 2 shows the circuit diagram of monostable multivibrator with trigger circuit. In
this one resistive-capacitive network is replaced by a resistive network (just a resistor). The

circuit can be thought as a half astable multivibrator. When triggered by an input pulse, a
monostable multivibrator will switch to its unstable position for a period of time, and then return
to its stable state. The time period monostable multivibrator remains in unstable state is given by
(at collector output of Q2 or at collector of Q1). If repeated

application of the input pulse maintains the circuit in the unstable state, it is called a retriggerable
monostable. If further trigger pulses do not affect the period, the circuit is a non-retriggerable
multivibrator.
In the bistable multivibrator (shown in Figure 3), both the resistive-capacitive network
are replaced by resistive networks (just resistors or direct coupling).This latch circuit is similar to
an astable multivibrator, except that there is no charge or discharge time, due to the absence of
capacitors. Hence, when the circuit is switched on, if Q1 is on, its collector is at 0 V. As a result,
Q2 gets switched off. This results in more than half +V volts being applied to R4 causing current
into the base of Q1, thus keeping it on. Thus, the circuit remains stable in a single state
continuously. Similarly, Q2 remains on continuously, if it happens to get switched on first.
Switching of state can be done via Set (S) and Reset (R) terminals connected to the bases. For
example, if Q1 is on and Set is grounded momentarily, this switches Q 1 off, and makes Q2 on.
Thus, Set is used to "set" Q2 on, and Reset is used to "reset" it to off state.
Design:
1. Astable multivibrator:
i) Symmetry wave:
Given that
For symmetrical wave
We have
Choose
Then

Base current
Collector current
Condition for oscillation and
For that
ii) Asymmetry wave:
Given that
We have
Choose
Then

2. Monostable multivibrator:
Given that and time period of

trigger signal Ti=2ms
Choose
Then
Under stable state
To keep Q1 ON in quasi-stable state
For low current to bias Q1 , R1>>RC2
Let

Design for trigger circuit:
Time period Ti of trigger signal vT must be more than TON.
Given that Ti=2ms.
Then
Choose
3. Bistable Multivibrator
Given that
Operation is always symmetry: then
R1>>RC1 and R2 > R1
Let
Procedure:
Steps (Astable multivibrator)
2. Connect the circuit diagram for symmetry waveform
3. Turn on the power supply
4. Connect the CRO channel 1probe to the Q1 collector and channel 2 to Q2

collector
5. Observe the wave forms
6. Connect the CRO channel 1probe to the Q1 base and channel 2 to Q2 base

9. Connect the circuit diagram for asymmetry waveform
10. Repeat the steps 3 to 7
Steps (Monostable multivibrator)
4. Connect th trigger signal from function generator
5. Connect the CRO channel 1probe to the Q1 collector and channel 2 to trigger
signal
7. Connect the CRO channel 1probe to the Q1 base and channel 2 to trigger signal
9. Connect the CRO channel 1probe to the Q2 collector and channel 2 to trigger
signal
11. Connect the CRO channel 1probe to the Q2 base and channel 2 to trigger signal
Steps (Bistable multivibrator)
4. Apply set (S) and reset (R) signal via switches, observe the states of outputs

If Vcc =5V, VBB=10V, RC1=RC2=RC=1kΩ, R1=R2=R=50kΩ, C1=C2=.01µF. Draw the

signals at vC1,vC2, vB1 and vB2. Find the frequency of oscillation. If VBB is a sinusoidal
wave what is the output?
2. Design a circuit to turn ON an LED for 2 seconds and OFF for 4 seconds continuously.
Design the components for VCC =5V, βmin = 25, TON = 4seconds
4. Draw a circuit to generate a square wave. Design it for VCC =5V, βmin = 25, f=4kHz
5. Simulate the above circuits.

6. Consider the following truth table and construct a circuit using BJT to generate the logic.
Inputs Output
S R Qn+1
0 0 Qn
0 1 0 1
1 0 1 0
1 1 1 1
7. Construct a circuit to generate the following wave.
Model Waveforms
Astable multivibrator
Symmetry waves

Asymmetr
y waves

Monostable multivibrator:


Bistable multivibrator:
OBSERVATIONS:
Astable Multivibrator
Design parameter and components used:
i) Symmetry wave:
Given that
ii)Asymmetry wave:
Given that
Choose

Monostable Multivibrator
Design parameter and components used:
Given that and time

period of trigger signal Ti=2ms
Bistable Multivibrator
Given that
Wave forms:
i) Astable multivibrator (Symmetry)
ii) Astable multivbrator (Asymmetry)

iii) Monostable multivibrator
Viva Questions:
1. Maximum frequency of oscillation of astable multivibrator is limited due to which
property?
2. Give the applications of multivibrators.
3. Give the expression for the delay in trailing edge of square wave generated by
astable multivibrator.
4. Define duty cycle.
5. Compare three multivibrator circuits.
6. Which circuit is referred as one-shot circuit and why?
7. Which multivibrator operates as SR flip-flop and why?
8. Which multivibrator is called free running multivibrator and why?
9. Triggering a monostable multivibrator during TON , what will happen to the

output?

Expt. No. 8
OSCILLATORS
Objectives: a) To study the operation of Phase shift, Wien bridge, Hartley and Colpitts
Oscillators.
b) To simulate oscillator circuits using PSPICE
3. DC power supply.
5. Resistors.
6. Capacitors.
7. Inductors.
8. Inductance decade box
9. Capacitance decade box
Circuit diagram:
1. RC phase shift oscillator:
Fig.1

2. Wien Bridge Oscillator:
Fig. 2(a)
Fig. 2(b)

3. Hartley Oscillator:
Fig. 3
4. Colpitts Oscillator:
Fig. 4

Theory:
Oscillators are circuits that produce a repetitive waveform with only a DC voltage
at the output. The output waveform can be sinusoidal, rectangular, triangular, etc. At the
base of almost any oscillator there is an amplification stage with a positive feedback
(regenerative feedback) circuit that will produce a phase shift and attenuation. Positive
feedback consists in the redirecting of the output signal to the input stage of the amplifier
without a phase shift. This feedback signal is then amplified again generating the output
signal, which produces the feedback signal. This phenomenon, in which the output signal
“takes care” of itself in order to generate continuum signal is called oscillation. Two
conditions then should be fulfilled to have a stable oscillator:
1. The phase shift of the feedback loop should be 0
2. The overall gain of the feedback loop should be 1
In order to arrive to the stable operation of the oscillator, during the starting period the
gain of the feedback loop should be greater than one, to allow the amplitude of the output
signal to achieve the desired level. These conditions are called Barkhausen criteria.
Sinusoidal oscillators are classified into two types:
i) RC oscillators
ii) LC oscillators
RC oscillators use RC elements in the feedback branch. They are useful to

frequencies up
to 200kHz. Two types of RC oscillators are:
i) RC phase shift oscillator
ii) Wien Bridge oscillator
Figure 1 shows RC phase shift oscillator, which uses RC coupled amplifier as

inverting amplifier and three RC networks as feedback circuit with voltage shunt
feedback. Each RC circuit provide at least 60o phase shift, so total 180o phase shit. The
gain of the feedback network is The frequency of oscillation is
and the current gain of the amplifier to satisfies the Barkhausen criteria is
.
Figure 2 shows Wien Bridge oscillator. It consists two stage RC coupled amplifier
as non-inverting amplifier (360o phase shift) with voltage series negative feedback and
voltage shunt positive feedback. Wien Bridge contains series RC and parallel RC
network, while feedback resistor element act as resistance arms of the bridge. Resistor
arms provide voltage series feedback and RC resonance arms provide voltage shunt
feedback. The bridge offer 360o phase shift at resonance frequency and the gain
introduced by the network is . So the gain of the amplifier , to satisfy
Barkhausen criteria. The frequency of oscillation is . The main advantage of
this oscillator over Phase shift oscillator is its amplitude stability due to the negative
feedback.

LC oscillator uses amplifier with 180o phase shift and LC tuned circuit as
feedback network. These oscillators are suitable for high frequency oscillation because of
it phase stability, frequency stability and less harmonics.
The two familiar LC oscillators are:
i) Hartley Oscillator
ii) Colpitts Oscillator
Figure 3 shows Hartley Oscillator circuit and it consists of a parallel LC resonator

tank circuit and RC coupled amplifier. It uses a pair of tapped coils and a capacitor to
produce regenerative feedback. The output voltage is developed across and the
feedback voltage is developed across . The attenuation caused by the feedback
network . So the gain of the amplifier, . The tank circuit determines the
operating frequency of the Hartley oscillator and is ,

where .
Figure 4 shows Colpitts Oscillator circuit and it consists of a parallel LC resonator

tank circuit and RC coupled amplifier. It uses a pair of tapped capacitors and an inductor
to produce regenerative feedback . The output voltage is developed across and the
feedback voltage is developed across . The attenuation caused by the feedback
network . So the gain of the amplifier, . The tank circuit determines the
operating frequency of the oscillator and is , where . This

oscillator has better frequency stability than Hartley oscillator.
Design:
1. RC Phase Shift Oscillator:
Given that
For amplifier
We have
(Given >> required )

Design for amplifier:
(or for better stability )
(Typical value of β =100)
Design for feedback network:
Let
(Designed Av > hfe)
(Use 1kΩ potentiometer to get accurate value)

2. Wien Bridge Oscillator :
Given that
For amplifier
We have
Where is the gain of cascade amplifier with feedback. Then feedback factor
k ≤ 0.5
Design of amplifier:
(We are using negative feedback, so ignore the

loading effect and use same design for each stage)
(Typical value of β =100)
Design of RC network for Wien Bridge:

Design for feedback network:
Let
(Use 10k pot)
Given that
We have where
And loop gain
According to Barkhausen criteria
Then
Choose
(Designing is similar to amplifier used for RC phase shift oscillator. Use low value
for IC, to avoid loading effect at the input and output of the amplifier with feedback
LC tuned circuit. Low IC value provide medium matched impedances with the
available L1 and L2)
Design of LC circuit:
Choose L1 and L2 according to the availability and the conditions

and
Let L1= 10µF (Use Inductance Decade box) and L2 = 470µF (Available)
Then and is less than the gain of the amplifier
Check the conditions at resonant frequency fo. (Where
(If standard capacitor is not available, use Capacitance Decade box)
Given that
We have where
And loop gain
According to Barkhausen criteria
Then
Choose
(Designing is similar to amplifier used for RC phase shift oscillator. Use low value
for IC, to avoid loading effect at the input and output of the amplifier with feedback
LC tuned circuit. Low IC value provide medium matched impedances with the
available C1 and C2)

Design of LC circuit:
Choose C1 and C2 according to the availability and the conditions
and
Let C1= 0.1µF and C2 = 0.001µF (Both are available)
Check the conditions at resonant frequency fo. (Where
(Use Inductance Decade box)
Procedure:
Steps (RC phase shift oscillator)
3. Connect the CRO probe to the output
4. Vary the potentiometer to get a proper wave form
5. Observe the amplitude and frequency of output wave form
6. Change C and observe the variation in frequency of the output wave
7. Change RC and observe the variation in amplitude of the output signal

8. Connect CRO probes to the nodes of RC network and observe the 60o phase
shift signals
Steps (Wien Bridge oscillator)
5. Vary the potentiometer to get a proper wave form
Steps (Hartley oscillator)
5. Vary the inductance decade box to the desired value
Steps (Colpitts oscillator)
5. Vary the inductance decade box to the desired value

7. Change L and observe the variation in frequency of the output wave
1. Design RC network of RC phase shift oscillator for frequency 20kHz.
2. Design RC network of Wien bridge oscillator for frequency 15kHz.
3. Design tuned circuit of Hartley oscillator for frequency 500kHz.
4. Design tuned circuit of Colpitts oscillator for frequency 750kHz.
5. Compare phase shift oscillators and tuned oscillators.
6. Define frequency and amplitude stabilization used in oscillators.
Model Waveforms
Phase Shift Oscillators

Tuned Oscillators
Simulated Results:
a) RC Phase Shift Oscillator

b) Wien Bridge Oscillator
(Only real time simulation using virtual oscilloscope is possible. SPICE simulation is not
possible !)
c) Hartley Oscillator
d) Colpitts oscillator
(To simulate inductors using SPICE, connect a low resistance of value 10mΩ in series with it.)

OBSERVATIONS:
1. RC Phase Shift Oscillator:
Given that
For amplifier
(Use 1kΩ potentiometer to get accurate value)
Wave form:
2. Wien Bridge Oscillator :
Given that
For amplifier

(Use 10k pot)
Wave form:
Given that
For amplifier
L1= 10µF L2 = 470µF
Wave form:

Given that
For amplifier
C1= 0.1µF C2 = 0.001µF
(Use Inductance Decade box)
Wave form:

Expt. No. 9
SCHMITT TRIGGER
Objective: To study the operation of Schmitt trigger circuit using BJT.
3. DC power supply.
5. Resistors.
Circuit diagram:
Fig. 1

Theory:
Schmitt trigger is a threshold circuits with positive feedback having a loop gain > 1. The
circuit is named "trigger" because the output retains its value until the input changes sufficiently
to trigger a change: in the non-inverting configuration, when the input is higher than a certain
chosen threshold (UTP), the output is high; when the input is below a different (lower) chosen
threshold (LTP), the output is low; when the input is between the two, the output retains its
value. This dual threshold action is called hysteresis and implies that the Schmitt trigger
possesses memory and can act as a bistable circuit (latch). There is a close relation between the
two kinds of circuits that actually are the same: a Schmitt trigger can be converted into a latch
and v.v., a latch can be converted into a Schmitt trigger.
Design:
Given that
Upper threshold point voltage
Choose (Determines voltage drop at output when Q2 is ON, so keep a low value)
Lower threshold point voltage
Choose

Procedure:
Steps
2. Connect the circuit
3. Turn on power supply, apply input signal (10Vpp, 1kHz).
4. Connect CRO channel 1 (Y) probe to output and channel 2 (X) probe to input
5. Observe input and output wave
6. Put the CRO in XY mode and observe the hysteresis
7. Observe output for different input signal by changing signal mode of function
generator.
8. Turn off power supply
9. Connect variable dc source to the input
10. Turn on power supply.
11. Vary input dc voltage from 0V to 4V, note down the change in output for VUT
12. Vary input dc voltage from 4V to 0V, note down the change in output for VLT
• Consider the circuit shown in fig.1. Find the Hysteresis voltage of the circuit, if
• For the input wave shown below, plot the output wave for the circuit in fig.1.
Where Vm=10V

Model Waveforms
Input and Output waveforms:
Hysteresis Curve
Hysteresis Voltage VH = VUT - VLT = 2V
Tabular Column
a) For UTP
Vin (V) Vo (V)

0
0.4
0.8
1.2
1.6
2
2.4
2.8
3.2
3.6
4

b) For LTP
Vin (V) Vo (V)

4
3.6
3.2
2.8
2.4
2
1.6
1.2
.8
0.4
0
(Observe the hysteresis curve on oscilloscope by applying V in as X-axis signal and Vo as Y-
axis signal. Put oscilloscope in XY mode)
OBSERVATIONS:
Given parameters and components used:
Given that

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Electronic Circuit Lab Manual

SERIES VOLTAGE REGULATOR

Optimum value of and

Optimum value of and

Department of ECE, VKCET Page 1

1. Test all components

2. Connect the circuit diagram

3. Connect the variable dc power supply as input and turn on.

5. Turn off the power supply

6. Replace RL with 100k pot in series with RLmin

7. Turn on power supply and set it to 20V

3. If R1 reduces what is the improvement of the circuit?

4. Derive the expression for Vo of the circuit shown in fig.1

5. Find optimum value of R1.

6. How does changing RL affect Vo?

Department of ECE, VKCET Page 2

Line Regulation: Load Regulation

(For maximum current) (For minimum current)

Department of ECE, VKCET Page 3

Vin = 30V, RLmin = 150Ω

Department of ECE, VKCET Page 4

Class B Power Amplifier:

AC Analysis: Output power is given by

The efficiency of Class B amplifier can be calculated by

Department of ECE, VKCET Page 6

The transistors are as emitter follower.

Power dissipation by each transistor,

To keep transistor at cut-off region under dc biased condition I1 should be low.

Class B operation R2 should be negligible. Use the equation .

Department of ECE, VKCET Page 7

For Class AB operation or replace the resistors with diodes

Note: Try to observe the output for different R2

1. Check the components

2. Connect the circuit (use R1 for class B operation)

4. Connect CRO probes channel 1 to input and channel 2 to output

6. Turn off the power supply

7. Replace R1 for Class AB operation

8. Turn on power supply

Department of ECE, VKCET Page 8

3. Derive expressions for of Class B power amplifier.

5. Design the circuits shown in fig.1 for , β =100,

and draw the output wave form for sinusoidal input.

Class AB power amplifier:

Department of ECE, VKCET Page 9

, RMS current delivered from source during the operation

Class AB Power Amplifier (R2=10k ) :

, RMS current delivered from source during the operation

Department of ECE, VKCET Page 10

Input and Output waveforms:

Department of ECE, VKCET Page 11

(?) Not satisfied. This is due to the lack of true RMS

Department of ECE, VKCET Page 12

3. Define efficiency of Power Amplifiers.

Department of ECE, VKCET Page 13

DIFFERENTIAL AMPLIFIER USING BJT

a) Differential Amplifier using BJT:

i) Differential Mode, Balanced Output (for differential gain)

Department of ECE, VKCET Page 14

ii) Common mode, balanced output (for common mode gain)

a) Dual input balanced output

The circuit is same as shown in Fig. 1

b) Dual input unbalanced output

c) Single input balanced output.