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> These VC12 pointers carry traffic data or not depending on the
frequency alignment of VC12 and TUs, generating Pointer
Justification Events (PJE), then phase gaps of 3.7
microseconds on the 2 Mbit/s signal recovered after being
extracted (desynchronized) from the VC12
87 (35) pointers
3 (1) missing pointers
PDH phase
time
ITSF2005 — 4 All rights reserved © 2003, Alcatel
SDH Network Synchronisation
Mapping & PJE due to desynchronisation
Central Clock
Pointer jusification
events
Mapper / Demapper
2 Mbit/s
PDH access
network VC-4, VC-3, VC12
34 Mbit/s
140 Mbit/s
PDH access
Synchronisation direction
PRC SEC SEC SEC SSU SEC SEC SSU SEC SEC SSU SEC SEC
1 2 m1 1 1 m2 2 1 mn n 1 m n+1
- maximum number of SEC's between 2 SSUs: m1, m2, ... mn+1 < 20
T1 Sel
SETS T0
T2 B
T3
•Line timing
•The SEC gets its timing from the East or West line signal
••Tributary
Tributary timing
••The
The SEC gets its timing from a tributary port, STM -N or PDH
STM-N
••External
External timing
••The
The network element uses an external reference signal dedicated for
synchronization (without traffic). Signal types: 2 048 kHz or 2 048 kbit /s
kbit/s
••Internal
Internal timing
••The
The clock of the NE is not locked to a reference signal, in free-run and holdover
free-run
modes
T4 ~
T1
T2
T3 T0
T4 ~
T1
T2
T3 T0
SEC SSU
SEC
T4
T1 T4
T1
T2
T3 T0 T2
T3 T0
>SSM application
•Prevent timing loops
> The standards, ETSI and ITU-T for SDH, did not agree on the
general use of SSM between SEC and SSU due to:
• the risk of timing loops in a mesh networks
• some issues of delays between SEC and SSU switching times
• The lack of a specific SSM code
SEC
DNU
G.811 2
G.811
G.811
DNU
2 DNU
G.811
2
SEC G.811
DNU
SEC
1
1
DNU
G.811
G.811
PRC
: SEC
SSU SSU
SSU
PRC
: SEC
RX
SSU RX SSU S SU RX
RX SSU SSU
RX
RX SSU
RX 2 1 1
SSU SSU SSU RX
2 3
2 1
SSU 3 SSU
RX
SSU
2 Mbit/s
Digital 2 Mbit/s Digital
switch SDH network switch
Synchro? Synchro?
• The new synchronization layer being the SDH now, this layer is
used to deliver timing to the digital switch
– This is done by using the synchronization output, 2 MHz or 2 Mbit/s,
of the SDH equipment which is derived from an STM-N signal
– This may be done via an SSU, or not, depending on the quality of the
digital switch clock
SEC
T4
~
T1
T2
2 MHz or
T3 T0 2 Mbit/s
SSU
E1 layer
Clock reference
Sync
Not atosync Sync to
No sync
Clock
interface
ref No sync
Clock ref