B7130 Esm

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Notebook Computer B7130 Service Manual

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Notice
The company reserves the right to revise this publication or to change its contents without notice. Information contained herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent vendor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication. This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publication, except for copies kept by the user for backup purposes. Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement of that product or its manufacturer. Version 1.0 October 2010
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Trademarks
Intel and Intel Core are trademarks of Intel Corporation. Windows is a registered trademark of Microsoft Corporation. Other brand and product names are trademarks and /or registered trademarks of their respective companies.
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About this Manual

This manual is intended for service personnel who have completed sufficient training to undertake the maintenance and inspection of personal computers. It is organized to allow you to look up basic information for servicing and/or upgrading components of the B7130 series notebook PC. The following information is included: Chapter 1, Introduction, provides general information about the location of system elements and their specifications. Chapter 2, Disassembly, provides step-by-step instructions for disassembling parts and subsystems and how to upgrade elements of the system. Appendix A, Part Lists Appendix B, Schematic Diagrams Appendix C, Updating the FLASH ROM BIOS
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IMPORTANT SAFETY INSTRUCTIONS

Follow basic safety precautions, including those listed below, to reduce the risk of fire, electric shock and injury to persons when using any electrical equipment:
1. Do not use this product near water, for example near a bath tub, wash bowl, kitchen sink or laundry tub, in a wet basement or near a swimming pool. 2. Avoid using a telephone (other than a cordless type) during an electrical storm. There may be a remote risk of electrical shock from lightning. 3. Do not use the telephone to report a gas leak in the vicinity of the leak. 4. Use only the power cord and batteries indicated in this manual. Do not dispose of batteries in a fire. They may explode. Check with local codes for possible special disposal instructions. 5. This product is intended to be supplied by a Listed Power Unit with an AC Input of 100 - 240V, 50 - 60Hz, DC Output of 19V, 4.74A (90W) minimum AC/DC Adapter.
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CAUTION This Computers Optical Device is a Laser Class 1 Product
FCC Statement
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: This device may not cause harmful interference. This device must accept any interference received, including interference that may cause undesired operation.
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Instructions for Care and Operation

The notebook computer is quite rugged, but it can be damaged. To prevent this, follow these suggestions:
1. Dont drop it, or expose it to shock. If the computer falls, the case and the components could be damaged.
Do not expose the computer to any shock or vibration. Do not place it on an unstable surface. Do not place anything heavy on the computer.
2.
Keep it dry, and dont overheat it. Keep the computer and power supply away from any kind of heating element. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged.
Do not expose it to excessive heat or direct sunlight. Do not leave it in a place where foreign matter or moisture may affect the system. Dont use or store the computer in a humid environment. Do not place the computer on any surface which will block the vents.
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3.
Follow the proper working procedures for the computer. Shut the computer down properly and dont forget to save your work. Remember to periodically save your data as data may be lost if the battery is depleted.
Do not turn off the power until you properly shut down all programs. Do not turn off any peripheral devices when the computer is on. Do not disassemble the computer by yourself. Perform routine maintenance on your computer.
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4. 5. Avoid interference. Keep the computer away from high capacity transformers, electric motors, and other strong magnetic fields. These can hinder proper performance and damage your data. Take care when using peripheral devices.
Use only approved brands of peripherals. Unplug the power cord before attaching peripheral devices.
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Power Safety
The computer has specific power requirements:
Only use a power adapter approved for use with this computer. Your AC adapter may be designed for international travel but it still requires a steady, uninterrupted power supply. If you are unsure of your local power specifications, consult your service representative or local power company. The power adapter may have either a 2-prong or a 3-prong grounded plug. The third prong is an important safety feature; do not defeat its purpose. If you do not have access to a compatible outlet, have a qualified electrician install one. When you want to unplug the power cord, be sure to disconnect it by the plug head, not by its wire. Make sure the socket and any extension cord(s) you use can support the total current load of all the connected devices. Before cleaning the computer, make sure it is disconnected from any external power supplies.
Do not plug in the power cord if you are wet. Do not use the power cord if it is broken. Do not place heavy objects on the power cord.
Power Safety Warning Before you undertake any upgrade procedures, make sure that you have turned off the power, and disconnected all peripherals and cables (including telephone lines). It is advisable to also remove your battery in order to prevent accidentally turning the machine on.
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Battery Precautions
Only use batteries designed for this computer. The wrong battery type may explode, leak or damage the computer. Do not continue to use a battery that has been dropped, or that appears damaged (e.g. bent or twisted) in any way. Even if the computer continues to work with a damaged battery in place, it may cause circuit damage, which may possibly result in fire. Recharge the batteries using the notebooks system. Incorrect recharging may make the battery explode. Do not try to repair a battery pack. Refer any battery pack repair or replacement to your service representative or qualified service personnel. Keep children away from, and promptly dispose of a damaged battery. Always dispose of batteries carefully. Batteries may explode or leak if exposed to fire, or improperly handled or discarded. Keep the battery away from metal appliances. Affix tape to the battery contacts before disposing of the battery. Do not touch the battery contacts with your hands or metal objects.
Battery Guidelines
The following can also apply to any backup batteries you may have. If you do not use the battery for an extended period, then remove the battery from the computer for storage. Before removing the battery for storage charge it to 60% - 70%. Check stored batteries at least every 3 months and charge them to 60% - 70%.
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Battery Disposal The product that you have purchased contains a rechargeable battery. The battery is recyclable. At the end of its useful life, under various state and local laws, it may be illegal to dispose of this battery into the municipal waste stream. Check with your local solid waste officials for details in your area for recycling options or proper disposal. Caution Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommended by the manufacturer. Discard used battery according to the manufacturers instructions.
Battery Level
Click the battery icon in the taskbar to see the current battery level and charge status. A battery that drops below a level of 10% will not allow the computer to boot up. Make sure that any battery that drops below 10% is recharged within one week.
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Related Documents
You may also need to consult the following manual for additional information: Users Manual on CD/DVD This describes the notebook PCs features and the procedures for operating the computer and its ROM-based setup program. It also describes the installation and operation of the utility programs provided with the notebook PC.
System Startup
Remove all packing materials. Place the computer on a stable surface. Insert the battery and make sure it is locked in position. Securely attach any peripherals you want to use with the computer (e.g. keyboard and mouse) to their ports. 5. Attach the AC/DC adapter to the DC-In jack at the rear of the computer, then plug the AC power cord into an outlet, and connect the AC power cord to the AC/DC adapter. 6. Use one hand to raise the lid/LCD to a comfortable viewing angle (do not exceed 135 degrees); use the other hand (as illustrated in <Hyperlink B n I>Figure 1) to support the base of the computer (Note: Never lift the computer by the lid/LCD). 7. Press the power button to turn the computer on. 1. 2. 3. 4.
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Figure 1
Opening the Lid/LCD/Computer with AC/DC Adapter Plugged-In
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Contents
Introduction ..............................................1-1
Overview .........................................................................................1-1 Specifications ..................................................................................1-2 External Locator - Top View with LCD Panel Open ......................1-4 External Locator - Front & Right Side Views .................................1-5 External Locator - Left Side & Rear View .....................................1-6 External Locator - Bottom View .....................................................1-7 Mainboard Overview - Top (Key Parts) .........................................1-8 Mainboard Overview - Bottom (Key Parts) ....................................1-9 Mainboard Overview - Top (Connectors) .....................................1-10 Mainboard Overview - Bottom (Connectors) ...............................1-11 HDD ............................................................................................... A-5 LCD ............................................................................................... A-6 SATA DVD Super-Multi ............................................................... A-7 SATA Blu-Ray Combo .................................................................. A-8
Schematic Diagrams................................. B-1

System Block Diagram ...................................................................B-2 Clock Generator ..............................................................................B-3 CPU 1/7 (DMI, PEG, FDI) .............................................................B-4 CPU 2/7 (CLK, MISC, JTAG) .......................................................B-5 CPU 3/7 (DDR3) ............................................................................B-6 CPU 4/7 (Power) .............................................................................B-7 CPU 5/7 (Graphics Power) .............................................................B-8 CPU 6/7 (GND) ..............................................................................B-9 CPU 7/7 (RESERVED) ................................................................B-10 DDR3 SO-DIMM_0 .....................................................................B-11 DDR3 SO-DIMM_1 .....................................................................B-12 Panel, Inverter, CRT .....................................................................B-13 VGA PCI-E Interface ....................................................................B-14 VGA Frame Buffer Interface ........................................................B-15 VGA Frame Buffer A ...................................................................B-16 VGA Frame Buffer C ...................................................................B-17 VGA I/O .......................................................................................B-18 VGA NVVDD Cecoupling ...........................................................B-19 IBEXPEAK- M 1/9 .......................................................................B-20 IBEXPEAK - M 2/9 ......................................................................B-21 IBEXPEAK - M 3/9 ......................................................................B-22 IBEXPEAK - M 4/9 ......................................................................B-23 IBEXPEAK - M 5/9 ......................................................................B-24 IBEXPEAK - M 6/9 ......................................................................B-25 IBEXPEAK - M 7/9 ......................................................................B-26 IX
Disassembly ...............................................2-1
Overview .........................................................................................2-1 Maintenance Tools ..........................................................................2-2 Connections .....................................................................................2-2 Maintenance Precautions .................................................................2-3 Disassembly Steps ...........................................................................2-4 Removing the Battery ......................................................................2-5 Removing the Hard Disk Drive .......................................................2-6 Removing the System Memory (RAM) ..........................................2-8 Removing the Optical (CD/DVD) Device ....................................2-10 Removing and Installing the Processor .........................................2-11 Removing the Wireless LAN Module ...........................................2-14 Removing the Bluetooth Module ..................................................2-15 Removing the Keyboard ................................................................2-16
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Part Lists ..................................................A-1

Part List Illustration Location ........................................................ A-2 Top ................................................................................................. A-3 Bottom ............................................................................................ A-4
Preface IBEXPEAK - M 8/9 ..................................................................... B-27 IBEXPEAK - M 9/9 ..................................................................... B-28 New Card, Mini PCIE .................................................................. B-29 3G, CCD, TPM ............................................................................. B-30 USB, Fan, TP, FP, Multi-Conn .................................................... B-31 USB 3.0 ........................................................................................ B-32 JMC 251 Card Reader .................................................................. B-33 SATA ODD, LED, Hotkey, LID SW ........................................... B-34 RJ45, Modem ............................................................................... B-35 Audio Codec (VIA1812) .............................................................. B-36 KBC-ITE IT8518 ......................................................................... B-37 5VS, 3.3VS, 1.5VS, VIN1 ........................................................... B-38 VDD3, VDD5 ............................................................................... B-39 Power 1.8V, PEX_VDD ............................................................... B-40 Power 1.5V/0.75V ........................................................................ B-41 Power 1.1VS_VTT ....................................................................... B-42 Power VGFX_Core ...................................................................... B-43 V-Core .......................................................................................... B-44 Power VGA NVVDD ................................................................... B-45 AC_IN, Charger ........................................................................... B-46 HDMI ........................................................................................... B-47 Audio Board ................................................................................. B-48 B7110 Second HDD Board .......................................................... B-49 B7110 Click Board ....................................................................... B-50 B7110 Power Switch Board ......................................................... B-51 B7130 LED & VGA SW Board ................................................... B-52 B7110 K/B Switch Board ............................................................. B-53 Sequence ....................................................................................... B-54 Unzip the downloaded files to a bootable CD/DVD/ or USB Flash drive ................................................................................................C-1 Set the computer to boot from the external drive ...........................C-1 Use the flash tools to update the BIOS ...........................................C-2 Restart the computer (booting from the HDD) ...............................C-2
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Updating the FLASH ROM BIOS......... C-1

To update the FLASH ROM BIOS you must: C-1 Download the BIOS ....................................................................... C-1 X
Introduction
Chapter 1: Introduction
Overview
This manual covers the information you need to service or upgrade the B7130 series notebook computer. Information about operating the computer (e.g. getting started, and the Setup utility) is in the Users Manual. Information about drivers (e.g. VGA & audio) is also found in the Users Manual. The manual is shipped with the computer. Operating systems (e.g. Windows Vista/ Window 7, etc.) have their own manuals as do application softwares (e.g. word processing and database programs). If you have questions about those programs, you should consult those manuals. The B7130 series notebook is designed to be upgradeable. See Disassembly on page 2 - 1 for a detailed description of the upgrade procedures for each specific component. Please take note of the warning and safety information indicated by the symbol. The balance of this chapter reviews the computers technical specifications and features.
1.Introduction
Overview 1 - 1
Introduction
Specifications
Latest Specification Information The specifications listed here are correct at the time of sending them to the press. Certain items (particularly processor types/speeds) may be changed, delayed or updated due to the manufacturer's release schedule. Check with your service center for more details.
Processor Options
Intel Core i7 Processor i7-640M (2.80GHz), i7-620M (2.66GHz) 4MB L3 Cache & 1066MHz FSB Intel Core i5 Processor i5-580M (2.66GHz), i5-560M (2.66GHz), i5-540M (2.53GHz), i5-520M (2.4GHz), i5-460M (2.53GHz), i5-450M (2.4GHz), i5-430M (2.26GHz) 3MB L3 Cache & 1066MHz FSB Intel Core i3 Processor i3-380M (2.53GHz), i3-370M (2.40GHz), i3-350M (2.27GHz) 3MB L3 Cache & 1066MHz FSB
Memory
Two 204 Pin SO-DIMM Sockets Supporting DDR3 1333MHz Memory Memory Expandable up to 8GB
Security
BIOS Password Security (Kensington Type) Lock Slot
Audio
High Definition Audio Compliant Interface 2 * Built-In Speakers Built-In Microphone
1.Introduction
Storage Core Logic
CPU The CPU is not a user serviceable part. Accessing the CPU in any way may violate your warranty.
Intel HM55 Chipset
BIOS
One 32Mb SPI Flash ROM Phoenix BIOS
(Factory Option) One Changeable 12.7mm(h) Optical Device Type Drive (Super Multi Drive Module or Blu-Ray Combo Drive Module) One Changeable 2.5" 9.5 mm (h) SATA (Serial) HDD
Keyboard
Full-size WinKey keyboard (with numeric keypad)
LCD
17.3" (43.94cm) HD+/ FHD LCD
Pointing Device
Built-in Touchpad (scrolling key functionality integrated)
Video Adapter
Intel GMA HD and NVIDIA GeForce GT 425M Supports NVIDIA Optimus Technology Intel Integrated GPU (Intel GMA HD): Shared Memory Architecture (DVMT) up to 1.7GB Microsoft DirectX10 Compatible NVIDIA Discrete GPU (NVIDIA GeForce GT 425M): 1GB GDDR3 Video RAM Microsoft DirectX11 Compatible
Card Reader
Embedded Multi-in-1 Card Reader MMC (MultiMedia Card) / RS MMC SD (Secure Digital) / Mini SD / SDHC/ SDXC Compatible MS (Memory Stick) / MS Pro / MS Duo
1 - 2 Specifications
Introduction
Communication
Built-In Gigabit Ethernet LAN (Factory Option) 1.3M/ 2.0M Pixel USB PC Camera Module (Factory Option) Bluetooth 2.1 + EDR Module (Factory Option) Combo WLAN (802.11b/g/n) and Bluetooth 3.0 Module (Factory Option) Intel WiFi Link 6200 (802.11a/g/n) Wireless LAN Half Mini-Card Module (Factory Option) Intel WiFi Link 6300 (802.11a/g/n) Wireless LAN Half Mini-Card Module (Factory Option) Intel WiFi Link 1000 (802.11b/g/n) Wireless LAN Half Mini-Card Module (Factory Option) Third-Party 802.11b/g/n Wireless LAN Half Mini-Card Module
Environmental Spec
Temperature Operating: 5C - 35C Non-Operating: -20C - 60C Relative Humidity Operating: 20% - 80% Non-Operating: 10% - 90%
Power
Full Range AC/DC Adapter AC Input: 100 - 240V, 50 - 60Hz DC Output: 19V, 4.74A (90W) 6 Cell Smart Lithium-Ion Battery Pack, 48.84WH (Factory Option) 6 Cell Smart Lithium-Ion Battery Pack, 62.16WH
1.Introduction
Interface
Three USB 2.0 Ports and One USB 3.0 Port Or Four USB 2.0 Ports* *Note: it depends on your purchase configuration One eSATA Port One HDMI-Out Port One Headphone-Out Jack One Microphone-In Jack One S/PDIF Out Jack One RJ-45 LAN Jack One External Monitor Port One DC-in Jack
Dimensions & Weight

413mm (w) * 277.5mm (d) * 25.1 - 38.9mm (h) 3.1kg with ODD & 48.84WH Battery
Mini Card Slots

Slot 1 for WLAN Module
Specifications 1 - 3
Introduction Figure 1
Top View 1 1. Built-In PC Camera (optional) 2. LCD 3. Power Button 4. GPU Button 5. LED Indicators 6. Hot Key Buttons 7. Keyboard 8. Built-In Microphone 9. Touchpad & Buttons
External Locator - Top View with LCD Panel Open
1.Introduction
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1 - 4 External Locator - Top View with LCD Panel Open
Introduction
External Locator - Front & Right Side Views
Figure 2
Front View 1. LED Indicators
FRONT VIEW
1.Introduction
Figure 3
Right Side View RIGHT SIDE VIEW 1. Headphone-Out Jack 2. Microphone-In Jack 3. S/PDIF-Out Jack 4. USB 2.0 Port 5. Optical Device Drive Bay 6. Emergency Eject Hole
External Locator - Front & Right Side Views 1 - 5
Introduction
External Locator - Left Side & Rear View

Figure 4
Left Side View 1. External Monitor Port 2. RJ-45 LAN Jack 3. HDMI-Out Port 4. 2 * USB 2.0 Ports 5. Vent 6. eSATA Port 7. USB 3.0 Port or USB 2.0 Port (Note: It depends on your purchase confirguration) 8. Multi-in-1 Card Reader
/
LEFT SIDE VIEW
4 5
1.Introduction
Figure 5
Rear View 1. Security Lock Slot 2. Battery 3. DC-In Jack
REAR VIEW
1 - 6 External Locator - Left Side & Rear View
Introduction
External Locator - Bottom View

Figure 6
Bottom View 1. Battery 2. Component Bay Cover 3. Vent 4. Hard Disk Bay Cover 5. Speakers 3 3 3
1.Introduction
Overheating
To prevent your computer from overheating, make sure nothing blocks any vent while the computer is in use.
External Locator - Bottom View 1 - 7
Mainboard Top Key Parts 1. 2. 3. 4. JMC251 KBC-ITE IT8502E Clock Generator Azalia Codec
Mainboard Overview - Top (Key Parts)
1.Introduction
Version Note The mainboard in this chapter is based upon this version. If your mainboard is a later version, please check with the Service Center.
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1 - 8 Mainboard Overview - Top (Key Parts)
Introduction
Mainboard Overview - Bottom (Key Parts)
Figure 8
Mainboard Bottom Key Parts 1. CPU Socket (no CPU installed) 2. Memory Slots DDR3 SO-DIMM 3. Mini-Card Connector (WLAN Module) 4. Platform Controller Hub 5. 3-in-1 Card Reader 6. VGA
1.Introduction
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Mainboard Overview - Bottom (Key Parts) 1 - 9
Mainboard Top Connectors 1. External Monitor Port 2. RJ-45 LAN Jack 3. HDMI-Out Port 4. USB Ports 5. eSATA Port 6. Microphone Cable Connector 7. MDC Connector 8. Audio Board Connector 9. Fingerprint and TouchPad Cable Connector 10. Keyboard Cable Connector 11. Switch Board Cable Connector
Mainboard Overview - Top (Connectors)
2 11
1.Introduction
4 10 6 5 9
1 - 10 Mainboard Overview - Top (Connectors)
Introduction
Mainboard Overview - Bottom (Connectors)

8
Figure 10
Mainboard Bottom Connectors 1. Bluetooth Cable Connector 2. HDD & ODD Connector 3. CMOS Battery Connector 4. Speaker Cable Connector 5. CPU Fan Cable Connector 6. LCD Cable Connector 7. CCD Cable Connector 8. DC-In Jack
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1.Introduction
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Mainboard Overview - Bottom (Connectors) 1 - 11
Introduction
1.Introduction
1 - 12
Disassembly
Chapter 2: Disassembly
Overview
This chapter provides step-by-step instructions for disassembling the B7130 series notebooks parts and subsystems. When it comes to reassembly, reverse the procedures (unless otherwise indicated). We suggest you completely review any procedure before you take the computer apart. Procedures such as upgrading/replacing the RAM, optical device and hard disk are included in the Users Manual but are repeated here for your convenience. To make the disassembly process easier each section may have a box in the page margin. Information contained under the figure # will give a synopsis of the sequence of procedures involved in the disassembly procedure. A box with a lists the relevant parts you will have after the disassembly process is complete. Note: The parts listed will be for the disassembly procedure listed ONLY, and not any previous disassembly step(s) required. Refer to the part list for the previous disassembly procedure. The amount of screws you should be left with will be listed here also. A box with a will also provide any possible helpful information. A box with a contains warnings. An example of these types of boxes are shown in the sidebar.
2.Disassembly
Information
Warning
Overview 2 - 1
Disassembly NOTE: All disassembly procedures assume that the system is turned OFF, and disconnected from any power supply (the battery is removed too).
Maintenance Tools
The following tools are recommended when working on the notebook PC:
M3 Philips-head screwdriver M2.5 Philips-head screwdriver (magnetized) M2 Philips-head screwdriver Small flat-head screwdriver Pair of needle-nose pliers Anti-static wrist-strap
2.Disassembly
Connections
Connections within the computer are one of four types:
Locking collar sockets for ribbon connectors To release these connectors, use a small flat-head screwdriver to gently pry the locking collar away from its base. When replacing the connection, make sure the connector is oriented in the same way. The pin1 side is usually not indicated. To release this connector type, grasp it at its head and gently rock it from side to side as you pull it out. Do not pull on the wires themselves. When replacing the connection, do not try to force it. The socket only fits one way. To release these connectors, use a small pair of needle-nose pliers to gently lift the connector away from its socket. When replacing the connection, make sure the connector is oriented in the same way. The pin1 side is usually not indicated. To separate the boards, gently rock them from side to side as you pull them apart. If the connection is very tight, use a small flat-head screwdriver - use just enough force to start.
Pressure sockets for multi-wire connectors
Pressure sockets for ribbon connectors
Board-to-board or multi-pin sockets
2 - 2 Overview
Disassembly
Maintenance Precautions
The following precautions are a reminder. To avoid personal injury or damage to the computer while performing a removal and/or replacement job, take the following precautions:
1. Don't drop it. Perform your repairs and/or upgrades on a stable surface. If the computer falls, the case and other components could be damaged. 2. Don't overheat it. Note the proximity of any heating elements. Keep the computer out of direct sunlight. 3. Avoid interference. Note the proximity of any high capacity transformers, electric motors, and other strong magnetic fields. These can hinder proper performance and damage components and/or data. You should also monitor the position of magnetized tools (i.e. screwdrivers). 4. Keep it dry. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged. 5. Be careful with power. Avoid accidental shocks, discharges or explosions.
Before removing or servicing any part from the computer, turn the computer off and detach any power supplies. When you want to unplug the power cord or any cable/wire, be sure to disconnect it by the plug head. Do not pull on the wire.
Power Safety Warning Before you undertake any upgrade procedures, make sure that you have turned off the power, and disconnected all peripherals and cables (including telephone lines). It is advisable to also remove your battery in order to prevent accidentally turning the machine on.
2.Disassembly
6. Peripherals Turn off and detach any peripherals. 7. Beware of static discharge. ICs, such as the CPU and main support chips, are vulnerable to static electricity. Before handling any part in the computer, discharge any static electricity inside the computer. When handling a printed circuit board, do not use gloves or other materials which allow static electricity buildup. We suggest that you use an anti-static wrist strap instead. 8. Beware of corrosion. As you perform your job, avoid touching any connector leads. Even the cleanest hands produce oils which can attract corrosive elements. 9. Keep your work environment clean. Tobacco smoke, dust or other air-born particulate matter is often attracted to charged surfaces, reducing performance. 10. Keep track of the components. When removing or replacing any part, be careful not to leave small parts, such as screws, loose inside the computer.
Cleaning
Do not apply cleaner directly to the computer, use a soft clean cloth. Do not use volatile (petroleum distillates) or abrasive cleaners on any part of the computer.
Overview 2 - 3
Disassembly
Disassembly Steps
The following table lists the disassembly steps, and on which page to find the related information. PLEASE PERFORM THE DISASSEMBLY STEPS IN THE ORDER INDICATED.
To remove the Battery:

1. Remove the battery page 2 - 5
To remove the Bluetooth Module:

1. Remove the battery 2. Remove the Bluetooth page 2 - 5 page 2 - 15
To remove the HDD:

1. Remove the battery 2. Remove the HDD page 2 - 5 page 2 - 6
To remove the Keyboard:

1. Remove the battery 2. Remove the keyboard page 2 - 5 page 2 - 16
2.Disassembly
To remove the System Memory:

1. Remove the battery 2. Remove the system memory page 2 - 5 page 2 - 8
To remove the Optical Device:

1. Remove the battery 2. Remove the HDD 3. Remove the Optical device page 2 - 5 page 2 - 6 page 2 - 10
To remove and install a Processor:

1. Remove the battery 2. Remove the processor 3. Install the processor page 2 - 5 page 2 - 11 page 2 - 13
To remove the Wireless LAN Module:

1. Remove the battery 2. Remove the wireless LAN page 2 - 5 page 2 - 14
2 - 4 Disassembly Steps
Disassembly
Removing the Battery

1. 2. 3. 4. Turn the computer off, and turn it over. Slide the latch 1 in the direction of the arrow (Figure 1a). Slide the latch 2 in the direction of the arrow, and hold it in place (Figure 1a). 3 Slide the battery 6 in the direction of the arrow 4 (Figure 1b).
Figure 1
Battery Removal
a. Slide the latch and hold in place. b. Slide the battery in the direction of the arrow.
a. 2 1
2.Disassembly
b. 3
3. Battery
Removing the Battery 2 - 5
Disassembly
Removing the Hard Disk Drive

Figure 2
HDD Assembly Removal
a. Locate the HDD bay cover and remove the screws.
The hard disk drive can be taken out to accommodate other 2.5" serial (SATA) hard disk drives with a height of 9.5mm (h). Follow your operating systems installation instructions, and install all necessary drivers and utilities (as outlined in Chapter 4 of the Users Manual) when setting up a new hard disk.
Hard Disk Upgrade Process

1. Turn off the computer, and remove the battery (page 2 - 5). 2. Locate the hard disk bay cover and remove screws 1 & 2 (Figure 2a). a.
2.Disassembly
11
2 2

2 Screws HDD System Warning New HDDs are blank. Before you begin make sure: You have backed up any data you want to keep from your old HDD. You have all the CD-ROMs and FDDs required to install your operating system and programs. If you have access to the internet, download the latest application and hardware driver updates for the operating system you plan to install. Copy these to a removable medium.
2 - 6 Removing the Hard Disk Drive
Disassembly
3. 4. 5. 6. 7. b.
3 Remove the hard disk bay cover 6 (Figure 3b). Grip the mylar cover and slide the hard disk in the direction of arrow 4 (Figure 3c). Lift the hard disk 5 out of the bay 6 (Figure 3d). (Figure53e). Remove the screws 7 - 10 and the mylar cover 11 from the hard disk Reverse the process to install a new hard disk (do not forget to replace all the screws and covers).
Figure 3
HDD Assembly Removal (contd.)
b. Remove the HDD bay cover. c. Grip the mylar cover and slide the HDD in the direction of the arrow. d. Lift the HDD assembly out of the bay. e. Remove the screws and mylar cover.
d.
e.
10
9 6 11 7 5
2.Disassembly
c.
4
3. HDD Bay Cover 5. HDD 11. Mylar Cover 4 Screws
Removing the Hard Disk Drive 2 - 7
Disassembly Figure 4
RAM Module Removal
a. Remove the screws. b. Disconnect the fan cable and remove the bay cover.
Removing the System Memory (RAM)

The computer has two memory sockets for 204 pin Small Outline Dual In-line Memory Modules (SO-DIMM) supporting DDR3 1333MHz. The main memory can be expanded up to 8GB. The SO-DIMM modules supported are 1024MB, and 2048MB and DDRIII Modules. The total memory size is automatically detected by the POST routine once you turn on your computer.
Memory Upgrade Process
2.Disassembly
Contact Warning Be careful not to touch the metal pins on the modules connecting edge. Even the cleanest hands have oils which can attract particles, and degrade the modules performance.
1. 2. 3. 4.
Turn off the computer, remove the battery (page 2 - 5). Locate the component bay cover 1 , and remove screws 2 - 5 (Figure 4a). Carefully (a fan and cable are attached to the under side of the cover) lift up the bay cover. Carefully disconnect the fan cable 6 , and remove the cover 1 (Figure 4b).
a. 2 3
b.
1 6 6
1. Component Bay Cover
4 Screws
2 - 8 Removing the System Memory (RAM)
Disassembly
5. Gently pull the two release latches ( 7 - 8 ) on the sides of the memory socket in the direction indicated by the arrows (Figure 5c). c. d. e.
c. Pull the release latches. d. Remove the module.
Figure 5
RAM Module Removal (contd.)
8 9
Single Memory Module Installation

If your computer has a single memory module, then insert the module into the Channel 0 (J_DIMM_1) socket. In this case, this is the lower memory socket (the socket closest to the mainboard) as shown in Figure 5e.
2.Disassembly
The RAM module 9 will pop-up (Figure 5d), and you can then remove it. Pull the latches to release the second module if necessary (Figure 5c). Insert a new module holding it at about a 30 angle and fit the connectors firmly into the memory slot. The modules pin alignment will allow it to only fit one way. Make sure the module is seated as far into the slot as it will go. DO NOT FORCE the module; it should fit without much pressure. 10. Press the module in and down towards the mainboard until the slot levers click into place to secure the module. 11. Replace the bay cover and screws (make sure you reconnect the fan cable before screwing down the bay cover). 12. Restart the computer to allow the BIOS to register the new memory configuration as it starts up.
6. 7. 8. 9.
9. RAM Module
Removing the System Memory (RAM) 2 - 9
Optical Device Removal
a. Remove the screw. b. Push the optical device out off the computer at point 3.
Removing the Optical (CD/DVD) Device

1. Turn off the computer, remove the battery (page 2 - 5) and hard disk (page 2 - 6). 2. Remove the screw at point 1 (Figure 6a), and use a screwdriver to carefully push out the optical device 2 at point 3 (Figure 6b). 3. Insert the new device and carefully slide it into the computer (the device only fits one way. DO NOT FORCE IT; The screw holes should line up). 4. Restart the computer to allow it to automatically detect the new device.
a.
b.
2.Disassembly
2 1
2. Optical Device
1 Screw
2 - 10 Removing the Optical (CD/DVD) Device
Disassembly
Removing and Installing the Processor

Processor Removal Procedure
1. 2. 3. 4. Turn off the computer, remove the battery (page 2 - 5) and the component bay cover (page 2 - 8). The CPU heat sink will be visible at point A (Figure 7a) on the mainboard. Remove screws 6 , 5 , 4 , 3 , 2 , 1 (Figure 7b), the reverse order indicated on the label. Carefully lift up the heat sink B (Figure 7c) off the computer.
a. c.
Figure 7
Processor Removal
a. Remove the cover and Iocate the heat sink. b. Remove the screws in the order indicated. c. Remove the heat sink.
2.Disassembly
B A
b.
1 3
B. Heat Sink 6 Screws
Removing and Installing the Processor 2 - 11
Processor Removal (contd)
d. Turn the release latch to unlock the CPU. e. Lift the CPU out of the socket.
5. 6. 7. 8.
Turn the release latch C towards the unlock symbol , to release the CPU (Figure 8d). Carefully (it may be hot) lift the CPU D up out of the socket (Figure 8e). See page 2 - 13 for information on inserting a new CPU. When re-inserting the CPU, pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE IT!).
d.
e.
2.Disassembly
Unlock
D. CPU
Caution The heat sink, and CPU area in general, contains parts which are subjected to high temperatures. Allow the area time to cool before removing these parts.
2 - 12 Removing and Installing the Processor
Disassembly
Processor Installation Procedure

1. Insert the CPU (Figure 9a), pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE IT!), and turn the release latch B towards the lock symbol (Figure 9b). 2. Remove the stickers C (Figure 9c) from the heat sink. 3. Insert the heat sink D as indicated in (Figure 9c). 4. Replace and tighten the screws 1 - 6 (Figure 9d) in the order indicated on the label. 5. Replace the component bay cover and screws (page 2 - 8).
A
Figure 9
Processor Installation
a. Insert the CPU. b. Turn the release latch towards the lock symbol. c. Remove the stickers from the heat sink and insert the heat sink. d. Replace and tighten the screws in the order indicated on the label.
a.
c. C A D C
2.Disassembly
b.
d.
2
D
3
5
1
A. CPU D. Heat Sink 6 Screws
Lock
Removing and Installing the Processor 2 - 13
Wireless LAN Module Removal
a. The WLAN module will be visible at point 1. b. Disconnect the cables and remove the screw. c. The WLAN module will pop up. d. Lift the WLAN module out.
Removing the Wireless LAN Module

1. 2. 3. 4. 5. a. Turn off the computer, remove the battery (page 2 - 5) and the component bay cover (page 2 - 8). The Wireless LAN module will be visible at point 1 (Figure 10a) on the mainboard. Carefully disconnect cables 2 - 3 , then remove screw 4 from the module socket (Figure 10b). The Wireless LAN module 5 (Figure 10c) will pop-up. Lift the Wireless LAN module (Figure 10d) up and off the computer. c. d.
2.Disassembly
Note: Make sure you reconnect the antenna cable to 1 + 2socket (Figure b).
1 b. 2 3 4
5. WLAN Module. 1 Screw
2 - 14 Removing the Wireless LAN Module
Disassembly
Removing the Bluetooth Module
Figure 11
Bluetooth Module 1. Turn off the computer, remove the battery (page 2 - 5) and the component bay cover (page 2 - 8. Removal 1. Locate the Bluetooth module at point 1 (Figure 11a). 2. Remove screw 2 and carefully disconnect the Bluetooth module from the connector 3 and the cable 4 (Figure a. Locate the Bluetooth mo11b). dule at point 1. 3. Lift the Bluetooth module 5 (Figure 11c) up and off the computer. b. Remove the screw and a. b. c.
carefully disconnect the connector and the cable. c. Lift the Bluetooth module up off the socket.
5 1
2.Disassembly
2 3
5. Bluetooth Module 1 Screw
Removing the Bluetooth Module 2 - 15
Disassembly
Figure 12
Keyboard Removal
a. Remove the screws and use a screwdriver to carefully push out the top cover module at point 3 . b. Remove the top cover module. c. Remove the screws. d. Lift the keyboard up and disconnect the cable from the locking collar. e. Remove the keyboard.
Removing the Keyboard

1. Turn off the computer and remove the battery (page 2 - 5). 2. Remove the screws 1 - 2 and use a screwdriver to carefully push out the top cover module at point 3 (Figure 12a). 3. Remove the top cover module 4 (Figure 12b) and the screws 5 - 9 (Figure 12c). 4. Carefully lift the keyboard 10 up, being careful not to bend the keyboard ribbon cable (Figure 12d). 5. Disconnect the keyboard ribbon cable 11 from the locking collar socket 12 (Figure 12d). 6. Carefully lift up the keyboard 10 (Figure 12e) off the computer. a. 1 3 2 10
12
d.
11
2.Disassembly
b.
4. Top cover module 10. Keyboard
44
e.
7 Screws
c.
10
2 - 16 Removing the Keyboard
Part Lists
Appendix A:Part Lists

This appendix breaks down the B7130 series notebooks construction into a series of illustrations. The component part numbers are indicated in the tables opposite the drawings. Note: This section indicates the manufacturers part numbers. Your organization may use a different system, so be sure to cross-check any relevant documentation. Note: Some assemblies may have parts in common (especially screws). However, the part lists DO NOT indicate the total number of duplicated parts used. Note: Be sure to check any update notices. The parts shown in these illustrations are appropriate for the system at the time of publication. Over the product life, some parts may be improved or re-configured, resulting in new part numbers.
A.Part Lists
A - 1
Part Lists
Part List Illustration Location

The following table indicates where to find the appropriate part list illustration. Table A - 1
Part List Illustration Location
Part Top Bottom HDD LCD B7130
page A - 3 page A - 4 page A - 5 page A - 6 page A - 7 page A - 8
A.Part Lists
SATA DVD Super-Multi SATA Blu-Ray Combo
A - 2 Part List Illustration Location
Part Lists
Top
Figure A - 1
Top
A.Part Lists
Top A - 3
Part Lists
Bottom
Figure A - 2
A.Part Lists
Bottom
A - 4 Bottom
Part Lists
HDD
Figure A - 3
HDD
A.Part Lists
HDD A - 5
Part Lists
LCD
Figure A - 4
A.Part Lists
LCD
A - 6 LCD
Part Lists
SATA DVD Super-Multi
Figure A - 5
SATA DVD SuperMulti
A.Part Lists
( )
SATA DVD Super-Multi A - 7
Part Lists
SATA Blu-Ray Combo
Figure A - 6
A.Part Lists
SATA Blu-Ray Combo
( )
A - 8 SATA Blu-Ray Combo
Schematic Diagrams
Appendix B: Schematic Diagrams

This appendix has circuit diagrams of the B7130 notebooks PCBs. The following table indicates where to find the appropriate schematic diagram. Table B - 1
Diagram - Page
System Block Diagram - Page B - 2 Clock Generator - Page B - 3 CPU 1/7 (DMI, PEG, FDI) - Page B - 4 CPU 2/7 (CLK, MISC, JTAG) - Page B - 5 CPU 3/7 (DDR3) - Page B - 6 CPU 4/7 (Power) - Page B - 7 CPU 5/7 (Graphics Power) - Page B - 8 CPU 6/7 (GND) - Page B - 9 CPU 7/7 (RESERVED) - Page B - 10 DDR3 SO-DIMM_0 - Page B - 11 DDR3 SO-DIMM_1 - Page B - 12 Panel, Inverter, CRT - Page B - 13 VGA PCI-E Interface - Page B - 14 VGA Frame Buffer Interface - Page B - 15 VGA Frame Buffer A - Page B - 16 VGA Frame Buffer C - Page B - 17 VGA I/O - Page B - 18 VGA NVVDD Cecoupling - Page B - 19
Diagram - Page
IBEXPEAK- M 1/9 - Page B - 20 IBEXPEAK - M 2/9 - Page B - 21 IBEXPEAK - M 3/9 - Page B - 22 IBEXPEAK - M 4/9 - Page B - 23 IBEXPEAK - M 5/9 - Page B - 24 IBEXPEAK - M 6/9 - Page B - 25 IBEXPEAK - M 7/9 - Page B - 26 IBEXPEAK - M 8/9 - Page B - 27 IBEXPEAK - M 9/9 - Page B - 28 New Card, Mini PCIE - Page B - 29 3G, CCD, TPM - Page B - 30 USB, Fan, TP, FP, Multi-Conn - Page B - 31 USB 3.0 - Page B - 32 JMC 251 Card Reader - Page B - 33 SATA ODD, LED, Hotkey, LID SW - Page B - 34 RJ45, Modem - Page B - 35 Audio Codec (VIA1812) - Page B - 36 KBC-ITE IT8518 - Page B - 37
Diagram - Page
5VS, 3.3VS, 1.5VS, VIN1 - Page B - 38 VDD3, VDD5 - Page B - 39 Power 1.8V, PEX_VDD - Page B - 40 Power 1.5V/0.75V - Page B - 41 Power 1.1VS_VTT - Page B - 42 Power VGFX_Core - Page B - 43 V-Core - Page B - 44 Power VGA NVVDD - Page B - 45 AC_IN, Charger - Page B - 46 HDMI - Page B - 47 Audio Board - Page B - 48 B7110 Second HDD Board - Page B - 49 B7110 Click Board - Page B - 50 B7110 Power Switch Board - Page B - 51 B7130 LED & VGA SW Board - Page B - 52 B7110 K/B Switch Board - Page B - 53 Sequence - Page B - 54
SCHEMATIC DIAGRAMS
B.Schematic Diagrams
Version Note The schematic diagrams in this chapter are based upon version 6-7P-B7137-001. If your mainboard (or other boards) are a later version, please check with the Service Center for updated diagrams (if required).
B - 1
Schematic Diagrams
System Block Diagram

B4100 POWER SWITCH BOARD FINGER PRINTER BOARD AUDIO BOARD
PHONE JACK x3, USB x1 RJ-11
B7130 System Block Diagram

14.318 MHz
VDD3,VDD5 GPU NVDIDA N11x NVVDD
PCIE*8
Clock Generator SLG8SP585
Arrandale
Nvidia Optimus N11x 973 Balls
5V,3V,5VS,3VS,1.5VS, 1.8VS,+1.5S_CPU DDRIII SO-DIMM2 DDRIII SO-DIMM1 1.8V, PEX_VDD 1.5V,0.75VS(VTT_MEM) FBVDDQ VCORE, 1.1VS_VTT
PROCESSOR
rPGA989/988
800/1067/1333 MHz DDR3 / 1.5V SYSTEM SMBUS
SECOND HDD BOARD
FINGER PRINTER BOARD CLICK BOARD POWER SWITCH BOARD LED & VGA S/W BOARD
LCD CONNECTOR CRT CONNECTOR <8" <15"
0.1"~13
FDI
0.5"~5.5"
DMI*4
<=8" AUDIO BOARD
Sheet 1 of 53 System Block Diagram
SPDIF OUT
MIC IN
HP OUT
VGFX_CORE
B5100
SENTELIC 649-C4 102-010 TOUCH PAD CLICK BOA RD
HDMI Connector
SPI TPM 1.2 Optional
Ibex Peak-M Platform Controller Hub (PCH)

27x27mm 1071 Ball FCBGA
RJ-11
USB PORT (USB8)

B 4100 (INT SPK L)
32.768 KHz
EC ITE 8518
128pins LQFP 14 *1 4*1 .6m m
LPC
0.5"~11"
AZALIA MDC MODULE

MDC CON
33 MHz
BIOS SPI
Azalia Codec VIA 1812
AMP N701 0
B4100 INT S PK R
B5100 INT S PKER INT MIC
24 MHz PCIE
AZALIA LINK 100 MHz

<12"
INT. K/B
EC SMBUS
THERMAL SENSOR
W83L 771AW G
SMART FAN
SMART BATTERY AC-IN
3 2.768KHz
USB 3.0
3G CARD (USB3)
( Optional)
SATA I/II 3.0Gb/s
<12"
USB2.0 480 Mbps

1"~16"
Mini PCIE SOCKET (USB2)
JMICRO
WLAN
LAN
JMC251 CARD READER
25 MHz
B4100
B 5100 F INGER PRINTER B OARD
SATA HDD
SATA ODD
eSATA
RJ-45
USB PORT USB PORT USB PORT (USB0) (USB10) (USB1)
Bluetooth CCD (USB11) (USB5)
FINGE PRINTER BOARD R
7IN1 SOCKET
(USB4) FingerPrint
(Optional) 12 MHz
(USB4) FingerPrint
(Optional ) 1 MHz 2
B5100 SECOND HDD BOARD
B - 2 System Block Diagram
Schematic Diagrams
Clock Generator
CLOCK GENERATOR
C LK _ V C C 1 U2 9 1 5 17 24 29 V DD V DD V DD V DD V DD _ D OT _ 27 _ S RC _ CP U _ RE F V D D _ S R C _I / O V D D _ C P U _I / O D OT _ 96 D OT _ 9 6# 15 18 C 4 82 3 4 6 7 C L K _ B U F _ D O T9 6 _ P 20 C L K _ B U F _ D O T9 6 _ N 2 0 0. 1 u _ 16 V _ Y 5 V _ 04 0 . 1 u_ 1 6 V _Y 5 V _0 4 C 47 5 C4 8 3 1 u_ 1 0V _0 6 CL K _ VCC 2 C LK _ V C C1 L33 * H C B 16 0 8K F -12 1 T 25 _ 32 m i l_ s ho rt 3. 3 V S
CLKGEN POWER
1u _10 V_ 06 C9 90 705
X OUT X IN
27 28
27M 2 7 M_ S S X TA L _ OU T X TA L _ I N S R C _1 / S A T A S R C _ 1 #/ S A T A # S R C _2 S R C _ 2#
2 0 CL K _ B UF _ REF 1 4
P R 1 17
3 3_ 0 4
RE F _ 0 /CP U _ SE L
30 RE F _ 0 /CP U _ S E L
10 11 13 14
0 . 1 u F n e ar t he e ve r y p o w er p in
C L K _ S A TA 20 C L K _ S A TA # 2 0 C L K _ P C IE _ I C H 2 0 C L K _ P C IE _ I C H # 20
CL K_ S DA T A CL K_ S CL K
31 32 2 8 9 12 21 26 33
S DA S CL V S S _ DO T VSS_ 2 7 VSS_ SATA V S S _ S RC V S S _ CP U V S S _ RE F GN D S L G8 S P 5 85
C P U _ S T OP # C P U _1 C P U _ 1# C P U _0 C P U _ 0# C K P W R GD / P D #
16 20 19 23 22 25
C P U _S T O P #
P R 12 2
2 .2K _ 0 4
3 .3 V S C LK _ V C C2
1 . 1 V S _ V TT
CL K _ B UF _ B CL K _ P 2 0 CL K _ B UF _ B CL K _ N 2 0 CL K_ P W RG D 3. 3 V S
L3 1 C 4 91 C 46 7 * H C B 16 0 8 K F -1 21 T 25 _ 3 2m i l_ s h ort
0. 1 u _ 16 V _ Y 5 V _ 04 1 u _1 0 V _ 06
V DD _ I /O c an b e r an g i ng f ro m 1 .0 5 V t o 3. 3 V
1 u_1 0V _0 6 C 99 070 5
R 3 28
9 L RS 3 1 97
10 K _ 0 4
Sheet 2 of 53 Clock Generator
0 .1 u F n e a r t h e e v e ry p ow e r p i n
D Q3 7 43 CL K EN# G S MT N 7 0 02 Z H S 3 1M _0 4
R 3 22
SMBus
1 0 , 11 , 2 0 S MB _ C L K D Q3 8 MT N 7 0 02 Z H S 3 S CL K _ SCL K X4 G P R1 2 1 2 . 2 K _ 04 3 . 3V S G P R1 2 0 S Q3 6 MT N 7 0 02 Z H S 3 2 . 2 K _ 04 CL K _ SDA T A 33 p _ 50 V _ N P O _0 4 33 p _5 0 V _ N P O _0 4 XI N X1 3 1 2 C4 3 5 2
EMI
? ? ? ? C 990 71 3
F S X-8 L _ 14 . 3 18 M H z 1 X OU T * 1 4. 3 1 8M H z _1 0 P P M_ 3 0 R 3 4 C 4 36 R E F _ 0/ C P U _ S E L C 4 37 * 10 P _ 5 0V _ 0 4
8 045 co la y 3 32 5
3 .3 V S
D 1 0 , 11 , 2 0 S MB _ D A T A
E MI C ap a c ti o r
CPU_SEL_During CK_PEWGD Latch Pinl
3 . 3V S R E F _ 0/ C P U _ S E L
PI N _ 30 0 ( de f a u lt ) 1 ( 0. 7 V - 1. 5 V )
C P U_ 0 1 3 3M H z 1 0 0M H z
C P U _1 1 3 3 MH z 1 0 0 MH z
3 .3 VS 10 , 1 1 , 12 , 1 3 , 19 ,2 0 , 21 , 2 2 , 23 , 2 4 , 25 , 2 6, 28 , 2 9, 3 0 , 3 2,3 3 , 3 5, 3 6 , 3 7, 4 2 , 4 3, 4 6
P R 1 18 P R 1 19
*4 . 7 k _0 4 1 0K _ 0 4
1 . 1 V S _V TT 4 , 6 , 7, 1 9 , 2 0, 2 1 , 2 4, 2 5 , 2 6, 3 9 , 41 , 4 2 , 43
Clock Generator B - 3
Schematic Diagrams
CPU 1/7 (DMI, PEG, FDI)

PROCESSOR
CPU
H 18 H 17 H1 0 H 8_ 0 D 4 _ 4 H 8_ 0 D 4 _ 4 H 8 _ 0 D 4 _ 4 21 21 21 21 21 21 21 21 21 21 21 21 D D D D D D D D MI _ T X N 0 MI _ T X N 1 MI _ T X N 2 MI _ T X N 3 MI _ T X P 0 MI _ T X P 1 MI _ T X P 2 MI _ T X P 3 A2 4 C2 3 B2 2 A2 1 B2 4 D2 3 B2 3 A2 2 D2 4 G2 4 F2 3 H2 3 D2 5 F2 4 E2 3 G2 3
1/7
U 40 A
( DMI,PEG,FDI )
DM DM DM DM DM DM DM DM
I_ RX # [0 ] I_ RX # [1 ] I_ RX # [2 ] I_ RX # [3 ] I_ RX [0 ] I_ RX [1 ] I_ RX [2 ] I_ RX [3 ]
P E G _ I C O MP I P E G_ I C OM P O P E G _ R C OM P O P E G _R B I A S P E G _R X #[ 0] P E G _R X #[ 1] P E G _R X #[ 2] P E G _R X #[ 3] P E G _R X #[ 4] P E G _R X #[ 5] P E G _R X #[ 6] P E G _R X #[ 7] P E G _R X #[ 8] P E G _R X #[ 9] P E G _ R X # [ 1 0] P E G _ R X # [ 1 1] P E G _ R X # [ 1 2] P E G _ R X # [ 1 3] P E G _ R X # [ 1 4] P E G _ R X # [ 1 5] P E G_ R X[ 0] P E G_ R X[ 1] P E G_ R X[ 2] P E G_ R X[ 3] P E G_ R X[ 4] P E G_ R X[ 5] P E G_ R X[ 6] P E G_ R X[ 7] P E G_ R X[ 8] P E G_ R X[ 9] P E G _R X [ 1 0] P E G _R X [ 1 1] P E G _R X [ 1 2] P E G _R X [ 1 3] P E G _R X [ 1 4] P E G _R X [ 1 5] P E G_ T X #[ 0] P E G_ T X #[ 1] P E G_ T X #[ 2] P E G_ T X #[ 3] P E G_ T X #[ 4] P E G_ T X #[ 5] P E G_ T X #[ 6] P E G_ T X #[ 7] P E G_ T X #[ 8] P E G_ T X #[ 9] P E G _T X # [ 1 0] P E G _T X # [ 1 1] P E G _T X # [ 1 2] P E G _T X # [ 1 3] P E G _T X # [ 1 4] P E G _T X # [ 1 5] P E G_ T X[ 0] P E G_ T X[ 1] P E G_ T X[ 2] P E G_ T X[ 3] P E G_ T X[ 4] P E G_ T X[ 5] P E G_ T X[ 6] P E G_ T X[ 7] P E G_ T X[ 8] P E G_ T X[ 9] P E G_ T X [ 1 0] P E G_ T X [ 1 1] P E G_ T X [ 1 2] P E G_ T X [ 1 3] P E G_ T X [ 1 4] P E G_ T X [ 1 5]
B2 6 A2 6 B2 7 A2 5 K3 5 J 34 J 33 G3 5 G3 2 F3 4 F3 1 D3 5 E3 3 C3 3 D3 2 B3 2 C3 1 B2 8 B3 0 A3 1 J 35 H3 4 H3 3 F3 5 G3 3 E3 4 F3 2 D3 4 F3 3 B3 3 D3 1 A3 2 C3 0 A2 8 B2 9 A3 0 L 33 M3 5 M3 3 M3 0 L 31 K3 2 M2 9 J 31 K2 9 H3 0 H2 9 F2 9 E2 8 D2 9 D2 7 C2 6 L 34 M3 4 M3 2 L 30 M3 1 K3 1 M2 8 H3 1 K2 8 G3 0 G2 9 F2 8 E2 7 D2 8 C2 7 C2 5
20 mil
P E G_ I R C O MP _ R
R4 2 7
4 9 . 9_ 1 % _ 04
EXP_ R BIAS PEG PEG PEG PEG PEG PEG PEG PEG _ RX # 0 _ RX # 1 _ RX # 2 _ RX # 3 _ RX # 4 _ RX # 5 _ RX # 6 _ RX # 7 13 13 13 13 13 13 13 13
R4 2 9
7 5 0_ 1 % _ 04
DMI
DM I_ RX N 0 DM I_ RX N 1 DM I_ RX N 2 DM I_ RX N 3 DM DM DM DM I_ RXP 0 I_ RXP 1 I_ RXP 2 I_ RXP 3
D M I _ T X# [ 0 ] D M I _ T X# [ 1 ] D M I _ T X# [ 2 ] D M I _ T X# [ 3 ] DM DM DM DM I _ T X[ I _ T X[ I _ T X[ I _ T X[ 0] 1] 2] 3]
21 21 21 21
Sheet 3 of 53 CPU 1/7 (DMI, PEG, FDI)

It ap plies to A uburn dale and Clark sfiel dis d crete gra phic desig ns. If di scret gra e phic chip is u sed f or Au burnd ale, VAXG (GFX core rai can be conne ) l cted to GN if mothe D rboar onl su d y pport dis s crete grap hics and also in a commo n mothe rboar des d ign i GFX VR is no stu f t ffed. On t he o ther hand, if t he VR is stuff ed, VAXG can b lef flo e t ating in a com mon m other board des ign ( Gfx V kee R ps VA XG f rom float ing). In ad ditio n, FD I_RXN _[7:0 an FDI ] d _RXP_ [7:0] can be l eft f loati ng on the PCH. FDI_T X[7:0 and FDI_ ] TX#[7 :0] can b lef flo e t ating on the A uburn dale. The G FX_IM ON, F DI_FS YNC[0 ], F DI_FS YNC[1 ], FD I_LSY NC[0 ], FD I_LSY NC[1] and , FDI_I NT si gnals shou ld be tie to GND ( d throu gh 1K ? % resi stors in the c ) ommo n mothe rboar des d ign c ase. Plea se no tha if these sig t t nals are l eft f loati ng, there are no funct ional impa cts b ut a smal amo l unt o pow f er (~ 15 m W) ma ybe w asted VAX . G_SE NSE and V SSAXG _SENS on Aubur E ndal can be l e eft a no conn s ect. DPLL_ REF_S SCLK and D PLL_R EF_S SCLK# can be co nnect ed t GND on A o uburn dale direc tly i mot f herbo ard o nly suppo rts d iscre te gr aphi cs. I a c n ommon moth erbo ard desig n, th ese p ins a re dr iven via PCH ( even if Gr aphi cs is disa bled by BI OS) thus no exter nal t ermin ation is r equi red.
21 21 21 21 21 21 21 21 21 21 21 21 21
FD FD FD FD FD FD FD FD
I _ TX P 0 I _ TX P 1 I _ TX P 2 I _ TX P 3 I _ TX P 4 I _ TX P 5 I _ TX P 6 I _ TX P 7
D2 2 C2 1 D2 0 C1 8 G2 2 E2 0 F2 0 G1 9 F1 7 E1 7 C1 7
I _ TX [ 0 ] I _ TX [ 1 ] I _ TX [ 2 ] I _ TX [ 3 ] I _ TX [ 4 ] I _ TX [ 5 ] I _ TX [ 6 ] I _ TX [ 7 ]
PCI EXPRESS -- GRAPHICS
21 21 21 21 21 21 21 21
I _ TX N I _ TX N I _ TX N I _ TX N I _ TX N I _ TX N I _ TX N I _ TX N
0 1 2 3 4 5 6 7
E2 2 D2 1 D1 9 D1 8 G2 1 E1 9 F2 1 G1 8
I _ TX # [ 0 ] I _ TX # [ 1 ] I _ TX # [ 2 ] I _ TX # [ 3 ] I _ TX # [ 4 ] I _ TX # [ 5 ] I _ TX # [ 6 ] I _ TX # [ 7 ]
PEG PEG PEG PEG PEG PEG PEG PEG
_ RX 0 _ RX 1 _ RX 2 _ RX 3 _ RX 4 _ RX 5 _ RX 6 _ RX 7
13 13 13 13 13 13 13 13
Intel(R) FDI
F D I_ F S Y NC 0 F D I_ F S Y NC 1 F D I_ INT F D I_ L S Y N C0 F D I_ L S Y N C1
F D I_ F S Y N C[0 ] F D I_ F S Y N C[1 ] F D I_ INT
P E G_ T X # _0 P E G_ T X # _1 P E G_ T X # _2 P E G_ T X # _3 P E G_ T X # _4 P E G_ T X # _5 P E G_ T X # _6 P E G_ T X # _7
C C C C C C C C
5 45 5 36 5 47 5 38 5 49 5 40 5 51 5 42
0 . 1 u _1 0 V _ X 7R 0 . 1 u _1 0 V _ X 7R 0 . 1 u _1 0 V _ X 7R 0 . 1 u _1 0 V _ X 7R 0 . 1 u _1 0 V _ X 7R 0 . 1 u _1 0 V _ X 7R 0 . 1 u _1 0 V _ X 7R 0 . 1 u _1 0 V _ X 7R
_04 _04 _04 _04 _04 _04 _04 _04
P E G_ T X # 0 P E G_ T X # 1 P E G_ T X # 2 P E G_ T X # 3 P E G_ T X # 4 P E G_ T X # 5 P E G_ T X # 6 P E G_ T X # 7
13 13 13 13 13 13 13 13
F1 8 D1 7
F D I _ LS Y N C [ 0 ] F D I _ LS Y N C [ 1 ]
P E G_ T X _ 0 P E G_ T X _ 1 P E G_ T X _ 2 P E G_ T X _ 3 P E G_ T X _ 4 P E G_ T X _ 5 P E G_ T X _ 6 P E G_ T X _ 7
C C C C C C C C
5 46 5 37 5 48 5 39 5 50 5 41 5 52 5 43
0 . 1 u _1 0 V _ X 7R 0 . 1 u _1 0 V _ X 7R 0 . 1 u _1 0 V _ X 7R 0 . 1 u _1 0 V _ X 7R 0 . 1 u _1 0 V _ X 7R 0 . 1 u _1 0 V _ X 7R 0 . 1 u _1 0 V _ X 7R 0 . 1 u _1 0 V _ X 7R
_04 _04 _04 _04 _04 _04 _04 _04
P E G_ T X 0 P E G_ T X 1 P E G_ T X 2 P E G_ T X 3 P E G_ T X 4 P E G_ T X 5 P E G_ T X 6 P E G_ T X 7
13 13 13 13 13 13 13 13
On Board DDR3 Thermal Sensor

P Z 9 8 9 2 7- 36 4 1 -0 1F
3 .3 V
Analog Thermal Sensor

C 328 R 221 * . 1 U _ 1 6 V _ 04 2 U1 9 1 2 C B E Q2 8 * 2N 3 9 04 3 5 D G ND S D A TA S C LK 7 8 S MD _ C P U _T H E R M 2 0 , 3 6 S MC _ C P U _T H E R M 2 0 , 3 6 V DD D + T HE RM AL ER T 4 6 C D1 1 * RB 7 5 1 V A VC C P M_ E X T T S # _E C 4 C3 2 1 3 G ND G7 1 1 S T 9 U O UT *1 0 m i l_ s h ort C R I T _T E M P _ R E P # 24 3 .3 V Q 27 1
1 :2 ( il 8m s) 4m s: il
C 30 3 0 . 1 u _1 6 V _ Y 5 V _ 0 4
T H E R M_ V O LT 3 6
4 , 1 2 , 1 3, 1 7 , 1 9 , 2 0, 2 1 , 2 3 , 2 4, 2 6 , 2 8 , 29 , 3 1 , 3 2 , 33 , 3 4 , 3 7 , 39 , 4 0 , 4 1 , 44 3 . 3 V
0. 1 u _ 1 6V _Y 5 V _ 04
1 3
*W 8 3 L 77 1 A W G
PLACE NEAR U19
B - 4 CPU 1/7 (DMI, PEG, FDI)
Schematic Diagrams
CPU 2/7 (CLK, MISC, JTAG)

Processor Compensation Signals
R4 1 9 R4 3 3 4 9 . 9 _1 % _ 04 4 9 . 9 _1 % _ 04 H _ C O MP 0 U4 0 B H _ C O MP 1 TRA W CE IDTH 10M IL, LENG < TH 500M ILS H _C OM P 3 H _C OM P 2 H _C OM P 1 R4 2 1 R4 2 4 2 0 _ 1% _ 0 4 2 0 _ 1% _ 0 4 H _ C O MP 2 H _C OM P 0 H _ C O MP 3 A H2 4 S K T OC C # H _C A T E R R # AK1 4 CAT ER R# AT2 6 AT2 3 AT2 4 G1 6 C O MP 3 C O MP 2 C O MP 1 C O MP 0 BC L K B CL K # A1 6 B1 6 A R3 0 AT3 0 E1 6 D1 6 A1 8 A1 7 C LK _ E X P _ P 2 0 C LK _ E X P _ N 20 C LK _ D P _ P 2 0 C LK _ D P _ N 2 0 B C LK _C P U _ P 2 4 B C LK _C P U _ N 24
PROCESSOR 2/7
( CLK,MISC,JTAG )
DDR3 Compensation Signals
CLOCKS
MISC THERMAL
S M _R C O MP _ 0 S M _R C O MP _ 1 S M _R C O MP _ 2
R 4 41 R 4 40 R 4 39
1 0 0_ 1 % _0 4 2 4 . 9_ 1 % _0 4 1 3 0_ 1 % _0 4
B C L K _ IT P BCL K_ IT P # P E G _C L K P E G _ CL K # DP L L _ RE F _ S S C L K D P LL _ R E F _S S C L K #
F6 S M_ D R A M R S T # S M_ R C OM P [ 0 ] S M_ R C OM P [ 1 ] S M_ R C OM P [ 2 ] AL 1 A M1 A N1 A N1 5 AP1 5
C P U _D R A MR S T# 1. 1 V S _ V T T S M _ R C O MP _ 0 S M _ R C O MP _ 1 S M _ R C O MP _ 2 P M _ E XT T S # [ 0 ] P M _ E XT T S # [ 1 ] R 13 0 R 13 1 R 15 3 R 12 9 R 12 8 1 0K _ 0 4 1 0K _ 0 4 *0 _ 04 *0 _ 04 *1 2 . 4 K _1 % _ 04 P M_ E X T T S #_ E C 3 T S # _D I MM 0_ 1 1 0 , 11
Processor Pullups
1.1 V S _ V T T 4 3 H _ P R O C H OT # 4 9 . 9 _1 % _ 04 6 8 _ 04 * 68 _ 0 4 H_ CA T E R R# H _ P R O C H OT # _D H_ CP U RS T #
24 ,3 6
H_ PEC I
R 1 21
0 _0 4
AT1 5 P E CI
R1 1 0
0_04
H _P R OC H O T# _ D
A N2 6 P R O C H OT #
DDR3 MISC
R1 2 5 R1 0 9 R1 0 7
If PROC HOT# is not used th , en it mus be ter t mina ted wit a 50-O pul h l-up res isto to VTT_ r 1.1 rail . 24 H _T H R M TR IP #
P M_ E X T_ T S # [ 0 ] P M_ E X T_ T S # [ 1 ]
AK1 5 T H E R MT R IP #
P RDY # P RE Q # H _C P U R S T # AP2 6 R E S E T_ O B S # AL 1 5 P M_ S Y N C S Y S _A GE N T_ P W R OK A N 1 4 A N2 7 V C C P W R GOO D _ 0 R 15 6 * 10 m i _ s h ort l V D D P W R GO OD _R AK1 3 A M1 5 V T TP W R G OO D H _P W R GD _ XD P A M2 6 AL 1 4 RST IN # T A P P W R G OO D S M_ D R A M P W R O K V C C P W R GOO D _ 1 TC K TM S T RS T # TD I T DO T DI_ M T D O_ M DB R #
AT2 8 AP2 7 A N2 8 AP2 8 AT2 7 AT2 9 A R2 7 A R2 9 AP2 9 A N2 5 AJ 2 2 AK2 2 AK2 4 AJ 2 4 AJ 2 5 A H2 2 AK2 3 A H2 3
X D P _P R E Q# X D P _T C L K X D P _T MS X D P _T R S T# X D P _T D I _R X D P _T D I _M X D P _T D O _ M X D P _ TC LK X D P _ TR S T # R 60 R 1 08 *5 1 _ 04 5 1_ 0 4 1 . 1V S _V T T XD XD XD XD P _ TM S P _ TD O_ M P _ TD I _ R P _ P RE Q # R R R R 68 4 18 67 69 *5 1 _ 04 5 1_ 0 4 *5 1 _ 04 *5 1 _ 04
S Y S _A GE N T_ P W R OK 2 1 , 4 3 D E L A Y _ P W R GD 2 4 H _ C P U P W R GD R 11 5 R 11 4 0. 1u _ 1 0V _ X 5 R _ 0 4
21
H _ P M _S Y N C *0 _ 04 * 10 m i _ s h ort l
C 1 1 26
JTAG & BPM
Sheet 4 of 53 CPU 2/7 (CLK, MISC, JTAG)
PWR MANAGEMENT
X 7R - > X 5R C 99 07 03
2 1 P M_ D R A M_ P W R GD 2 1 H _V T T P W R GD
Conn ect to t P he roce ssor (VTT PWRG OOD) VTT _1.1 VR powe r good sig nal to p roce ssor. Sig nal volt age leve is 1.1 V. l
BP BP BP BP BP BP BP BP
M# [ 0 ] M# [ 1 ] M# [ 2 ] M# [ 3 ] M# [ 4 ] M# [ 5 ] M# [ 6 ] M# [ 7 ]
X D P _ T D O _M
R4 1 6
*1 0 m li _ s ho rt
XD P _ TD I_ M
2 3 , 2 8 , 31 ,3 2 , 36 B U F _ P L T_ R S T#
R 15 9
1 . 5K _ 1 % _0 4
P L T _R S T # _R R 1 55 7 5 0 _1 % _ 04
3 . 3V
Sig nal from PCH to Proce ssor Con nect to PCH (PLT _RST# ) (ne eds to b le e vel trans late d fro 3. V to 1 V m 3 .1 ).
P Z 9 8 9 27 -3 6 41 -0 1 F
C2 2 2
*.1 u _ 10 V _ X 7 R _ 0 4
U1 1 *7 4 A H C 1 G0 8 GW 4 D R A MP W R GD _ C P U
21 , 4 1 1. 1V S _V T T _ P W R G D 3. 3 V
1 2 3
3 .3 V R 1 63 + 1.5 S _ C P U * 10 K _ 0 4 D RA M P W RG D_ C P U 1 . 5V R1 6 2 *1 0 K _0 4 +1 . 5 S _ C P U R 1 34 1 . 1 K _ 1% _ 0 4 R1 5 7 R2 4 6 C *1 .5 K _ 1% _ 0 4 *1 K _ 04 V D D P W R G OO D _ R *2 N 3 9 0 4 R 25 0 R 1 58 3 K _ 1 %_ 0 4 10 ,1 1 D D R 3 _ D R A MR S T # D D R 3_ D R A M R S T # D S Q 32 * MT N 7 0 0 2Z H S 3 R2 4 1 *1 0 0K _0 4 C P U _D R A M R S T # 0 _ 04 E B Q1 2 S G * MT N 7 0 0 2Z H S 3 D Q 13 +1 . 5 S _ C P U _ P W R G D 4 0
24 D R A M R S T _ C N TR L _P C H 9 D R A M R S T _ C N TR L
R 2 34
*0 _ 0 4
1 . 1V S _V T T 2 ,6 , 7, 19 ,2 0 , 21 , 2 4 ,2 5, 2 6 , 3 9,4 1 , 4 2 , 43 + 1.5 S _ C P U 7 , 3 7 1 . 5V 1 0,1 1 ,3 1 , 37 , 4 0 3 . 3V 3 , 12 ,1 3 ,1 7, 1 9 , 2 0,2 1 , 2 3 , 24 ,2 6 ,2 8, 2 9 , 3 1, 3 2 , 3 3 , 34 ,3 7 ,39 , 4 0 ,4 1, 4 4
C3 6 0 *4 7 0 p _5 0 V _ X7 R _0 4
CPU 2/7 (CLK, MISC, JTAG) B - 5
Schematic Diagrams
CPU 3/7 (DDR3)

PROCESSOR
U40C U40D
3/7
( DDR3 )
10 M _DQ 63 0] _A [ : M _DQ0 _A M _DQ1 _A M _DQ2 _A M _DQ3 _A M _DQ4 _A M _DQ5 _A M _DQ6 _A M _DQ7 _A M _DQ8 _A M _DQ9 _A M _DQ1 _A 0 M _DQ1 _A 1 M _DQ1 _A 2 M _DQ1 _A 3 M _DQ1 _A 4 M _DQ1 _A 5 M _DQ1 _A 6 M _DQ1 _A 7 M _DQ1 _A 8 M _DQ1 _A 9 M _DQ2 _A 0 M _DQ2 _A 1 M _DQ2 _A 2 M _DQ2 _A 3 M _DQ2 _A 4 M _DQ2 _A 5 M _DQ2 _A 6 M _DQ2 _A 7 M _DQ2 _A 8 M _DQ2 _A 9 M _DQ3 _A 0 M _DQ3 _A 1 M _DQ3 _A 2 M _DQ3 _A 3 M _DQ3 _A 4 M _DQ3 _A 5 M _DQ3 _A 6 M _DQ3 _A 7 M _DQ3 _A 8 M _DQ3 _A 9 M _DQ4 _A 0 M _DQ4 _A 1 M _DQ4 _A 2 M _DQ4 _A 3 M _DQ4 _A 4 M _DQ4 _A 5 M _DQ4 _A 6 M _DQ4 _A 7 M _DQ4 _A 8 M _DQ4 _A 9 M _DQ5 _A 0 M _DQ5 _A 1 M _DQ5 _A 2 M _DQ5 _A 3 M _DQ5 _A 4 M _DQ5 _A 5 M _DQ5 _A 6 M _DQ5 _A 7 M _DQ5 _A 8 M _DQ5 _A 9 M _DQ6 _A 0 M _DQ6 _A 1 M _DQ6 _A 2 M _DQ6 _A 3 A1 0 C1 0 C 7 A 7 B1 0 D1 0 E1 0 A 8 D 8 F1 0 E 6 F 7 E 9 B 7 E 7 C 6 H1 0 G 8 K 7 J 8 G 7 G1 0 J 7 J1 0 L 7 M 6 M 8 L 9 L 6 K 8 N 8 P 9 A5 H A5 F A6 K A7 K A6 F A5 G AJ 7 AJ 6 AJ1 0 AJ 9 AL1 0 A 2 K1 A8 K AL 7 A 1 K1 AL 8 A8 N A 1 M0 A 1 R1 AL1 1 A9 M A9 N AT 1 1 A 2 P1 A 1 M2 A 2 N1 A 1 M3 AT 4 1 AT 2 1 AL1 3 A 4 R1 A 4 P1
SA _CK [0] S _CK A #[0] S A_C [0] KE S DQ[0] A_ S DQ[1] A_ S DQ[2] A_ S DQ[3] A_ S DQ[4] A_ S DQ[5] A_ S DQ[6] A_ S DQ[7] A_ S DQ[8] A_ S DQ[9] A_ S DQ[10] A_ S DQ[11] A_ S DQ[12] A_ S DQ[13] A_ S DQ[14] A_ S DQ[15] A_ S DQ[16] A_ S DQ[17] A_ S DQ[18] A_ S DQ[19] A_ S DQ[20] A_ S DQ[21] A_ S DQ[22] A_ S DQ[23] A_ S DQ[24] A_ S DQ[25] A_ S DQ[26] A_ S DQ[27] A_ S DQ[28] A_ S DQ[29] A_ S DQ[30] A_ S DQ[31] A_ S DQ[32] A_ S DQ[33] A_ S DQ[34] A_ S DQ[35] A_ S DQ[36] A_ S DQ[37] A_ S DQ[38] A_ S DQ[39] A_ S DQ[40] A_ S DQ[41] A_ S DQ[42] A_ S DQ[43] A_ S DQ[44] A_ S DQ[45] A_ S DQ[46] A_ S DQ[47] A_ S DQ[48] A_ S DQ[49] A_ S DQ[50] A_ S DQ[51] A_ S DQ[52] A_ S DQ[53] A_ S DQ[54] A_ S DQ[55] A_ S DQ[56] A_ S DQ[57] A_ S DQ[58] A_ S DQ[59] A_ S DQ[60] A_ S DQ[61] A_ S DQ[62] A_ S DQ[63] A_
A6 A A7 A P 7
M _CLK _DD R0 10 M _CLK _DD R#0 10 M _CK 0 1 E 0
11 M _B_D Q[63:0] M _B_D Q0 M _B_D Q1 M _B_D Q2 M _B_D Q3 M _B_D Q4 M _B_D Q5 M _B_D Q6 M _B_D Q7 M _B_D Q8 M _B_D Q9 M _B_D Q10 M _B_D Q11 M _B_D Q12 M _B_D Q13 M _B_D Q14 M _B_D Q15 M _B_D Q16 M _B_D Q17 M _B_D Q18 M _B_D Q19 M _B_D Q20 M _B_D Q21 M _B_D Q22 M _B_D Q23 M _B_D Q24 M _B_D Q25 M _B_D Q26 M _B_D Q27 M _B_D Q28 M _B_D Q29 M _B_D Q30 M _B_D Q31 M _B_D Q32 M _B_D Q33 M _B_D Q34 M _B_D Q35 M _B_D Q36 M _B_D Q37 M _B_D Q38 M _B_D Q39 M _B_D Q40 M _B_D Q41 M _B_D Q42 M _B_D Q43 M _B_D Q44 M _B_D Q45 M _B_D Q46 M _B_D Q47 M _B_D Q48 M _B_D Q49 M _B_D Q50 M _B_D Q51 M _B_D Q52 M _B_D Q53 M _B_D Q54 M _B_D Q55 M _B_D Q56 M _B_D Q57 M _B_D Q58 M _B_D Q59 M _B_D Q60 M _B_D Q61 M _B_D Q62 M _B_D Q63 B 5 A 5 C3 B 3 E 4 A 6 A 4 C4 D1 D2 F 2 F 1 C2 F 5 F 3 G4 H6 G2 J6 J3 G1 G5 J2 J1 J5 K 2 L3 M 1 K 5 K 4 M 4 N5 AF 3 A G1 A J3 AK 1 A G4 A G3 A J4 A H4 AK 3 AK 4 A 6 M A N2 AK 5 AK 2 A 4 M A 3 M AP 3 A N5 A4 T A N6 A N4 A N3 A5 T A6 T A N7 AP 6 AP 8 A9 T A7 T AP 9 A R10 A 10 T S _CK B [0] S CK B_ #[0] S _CK [0] B E
W8 W9 M 3
SA _CK [1] S _CK A #[1] S A_C [1] KE
Y 6 Y 5 P 6
M _CLK _DD R1 10 M _CLK _DD R#1 10 M _CK 1 1 E 0
S _CS A #[0] S _CS A #[1]
A2 E A8 E
M _CS #0 10 M _CS #1 10
S A_O [0] DT S A_O [1] DT
A D8 A9 F
M _OD 0 1 T 0 M _OD 1 1 T 0
Sheet 5 of 53 CPU 3/7 (DDR3)
S A_D [0] M S A_D [1] M S A_D [2] M S A_D [3] M S A_D [4] M S A_D [5] M S A_D [6] M S A_D [7] M
B 9 D 7 H 7 M 7 A G6 A 7 M A N10 A N13
M _D 0 _A M M _D 1 _A M M _D 2 _A M M _D 3 _A M M _D 4 _A M M _D 5 _A M M _D 6 _A M M _D 7 _A M
M _A_D [7:0] 10 M
DD R SYS TEM M EMORY A
S _DQS A [0] S _DQS A [1] S _DQS A [2] S _DQS A [3] S _DQS A [4] S _DQS A [5] S _DQS A [6] S _DQS A [7]
C 8 F 9 H 9 M 9 A H8 A 10 K A N11 A R13
M _D 0 _A QS M _D 1 _A QS M _D 2 _A QS M _D 3 _A QS M _D 4 _A QS M _D 5 _A QS M _D 6 _A QS M _D 7 _A QS
M DQS _A_ [7:0] 10
DDR SYSTE M MEM ORY - B
S _DQS A #[0] S _DQS A #[1] S _DQS A #[2] S _DQS A #[3] S _DQS A #[4] S _DQS A #[5] S _DQS A #[6] S _DQS A #[7]
C 9 F 8 J9 N 9 A H7 A9 K A 11 P A 13 T
M _D #0 _A QS M _D #1 _A QS M _D #2 _A QS M _D #3 _A QS M _D #4 _A QS M _D #5 _A QS M _D #6 _A QS M _D #7 _A QS
M DQS _A_ #[7:0] 1 0
10 10 10
M _B _A S0 M _B _A S1 M _B _A S2
A3 C A2 B U 7
S BS A_ [0] S BS A_ [1] S BS A_ [2]
10 10 10
M _CA # _A S M _RA # _A S M _WE _A #
A1 E A3 B A9 E
S CA A_ S# S RA A_ S# S WE A_ #
SA A _M [0] SA A _M [1] SA A _M [2] SA A _M [3] SA A _M [4] SA A _M [5] SA A _M [6] SA A _M [7] SA A _M [8] SA A _M [9] S _M [10] A A S _M [11] A A S _M [12] A A S _M [13] A A S _M [14] A A S _M [15] A A
Y 3 W 1 A8 A A3 A V 1 A9 A V 8 T 1 Y 9 U 6 A D4 T 2 U 3 A G8 T 3 V 9
M _A _A 0 M _A _A 1 M _A _A 2 M _A _A 3 M _A _A 4 M _A _A 5 M _A _A 6 M _A _A 7 M _A _A 8 M _A _A 9 M _A _A 10 M _A _A 11 M _A _A 12 M _A _A 13 M _A _A 14 M _A _A 15
M _A_A [15:0] 10
SB _DQ [0] SB _DQ [1] SB _DQ [2] SB _DQ [3] SB _DQ [4] SB _DQ [5] SB _DQ [6] SB _DQ [7] SB _DQ [8] SB _DQ [9] SB _DQ [10] SB _DQ [11] SB _DQ [12] SB _DQ [13] SB _DQ [14] SB _DQ [15] SB _DQ [16] SB _DQ [17] SB _DQ [18] SB _DQ [19] SB _DQ [20] SB _DQ [21] SB _DQ [22] SB _DQ [23] SB _DQ [24] SB _DQ [25] SB _DQ [26] SB _DQ [27] SB _DQ [28] SB _DQ [29] SB _DQ [30] SB _DQ [31] SB _DQ [32] SB _DQ [33] SB _DQ [34] SB _DQ [35] SB _DQ [36] SB _DQ [37] SB _DQ [38] SB _DQ [39] SB _DQ [40] SB _DQ [41] SB _DQ [42] SB _DQ [43] SB _DQ [44] SB _DQ [45] SB _DQ [46] SB _DQ [47] SB _DQ [48] SB _DQ [49] SB _DQ [50] SB _DQ [51] SB _DQ [52] SB _DQ [53] SB _DQ [54] SB _DQ [55] SB _DQ [56] SB _DQ [57] SB _DQ [58] SB _DQ [59] SB _DQ [60] SB _DQ [61] SB _DQ [62] SB _DQ [63]
M CLK _ _DDR 11 2 M CLK _ _DDR #2 11 M CK _ E2 11
S _CK B [1] S CK B_ #[1] S _CK [1] B E
V 7 V 6 M 2
M CLK _ _DDR 11 3 M CLK _ _DDR #3 11 M CK _ E3 11
S CS B_ #[0] S CS B_ #[1]
A B8 A D6
M CS _ #2 1 1 M CS _ #3 1 1
S _OD [0] B T S _OD [1] B T
A C7 A D1
M ODT 11 _ 2 M ODT 11 _ 3
SB _DM [0] SB _DM [1] SB _DM [2] SB _DM [3] SB _DM [4] SB _DM [5] SB _DM [6] SB _DM [7]
D4 E 1 H3 K 1 A H1 A L2 A R4 A8 T
M _DM _B 0 M _DM _B 1 M _DM _B 2 M _DM _B 3 M _DM _B 4 M _DM _B 5 M _DM _B 6 M _DM _B 7
M _DM _B [7:0] 11
SB QS _D #[0] SB QS _D #[1] SB QS _D #[2] SB QS _D #[3] SB QS _D #[4] SB QS _D #[5] SB QS _D #[6] SB QS _D #[7]
D5 F 4 J4 L4 A H2 A L4 A R5 A R8
M _DQ _B S#0 M _DQ _B S#1 M _DQ _B S#2 M _DQ _B S#3 M _DQ _B S#4 M _DQ _B S#5 M _DQ _B S#6 M _DQ _B S#7
M _DQ #[ 7 0] 11 _B S :
S B_D [0] QS S B_D [1] QS S B_D [2] QS S B_D [3] QS S B_D [4] QS S B_D [5] QS S B_D [6] QS S B_D [7] QS
C5 E 3 H4 M 5 A G2 A L5 A P5 A R7
M _DQ _B S0 M _DQ _B S1 M _DQ _B S2 M _DQ _B S3 M _DQ _B S4 M _DQ _B S5 M _DQ _B S6 M _DQ _B S7
M _DQ [ 7:0] 11 _B S
11 11 11
M _BS _B 0 M _BS _B 1 M _BS _B 2
AB 1 W5 R7
SB S 0] _B [ SB S 1] _B [ SB S 2] _B [
11 11 11
M _CA _B S# M _RA _B S# M _WE _B #
A C5 Y7 A C6
SB _CA # S SB _RA # S SB E# _W
S _M [0] B A S _M [1] B A S _M [2] B A S _M [3] B A S _M [4] B A S _M [5] B A S _M [6] B A S _M [7] B A S _M [8] B A S _M [9] B A S M [1 B_ A 0] S M [1 B_ A 1] S M [1 B_ A 2] S M [1 B_ A 3] S M [1 B_ A 4] S M [1 B_ A 5]
U5 V 2 T 5 V 3 R1 T 8 R2 R6 R4 R5 A B5 P 3 R3 A F7 P 5 N1
M _A _B 0 M _A _B 1 M _A _B 2 M _A _B 3 M _A _B 4 M _A _B 5 M _A _B 6 M _A _B 7 M _A _B 8 M _A _B 9 M _A _B 10 M _A _B 11 M _A _B 12 M _A _B 13 M _A _B 14 M _A _B 15
M _A _B [15:0] 11
P Z98 927-3641-01F
PZ 98927-364 0 1- 1F
B - 6 CPU 3/7 (DDR3)
Schematic Diagrams
CPU 4/7 (Power)

P ROCES SOR
U 4 0F
4/7
( PO WER )
PROCESS OR UNCORE POWER
1 .1 V S _ V T T
PRO CESSOR CORE POWER

V C O RE
52A
I CC M AX M a xi m um P r oc es s or C or e I CC
V CO RE C1 5 0 22 u _ 6 .3 V _ X 5 R _ 08 C 157 2 2 u _ 6 . 3 V _ X 5 R _0 8 C 165 2 2 u _ 6 . 3 V _ X 5 R_ 0 8
SV 5 2 XE 6 5
C 173 2 2 u _ 6 . 3 V _ X 5 R_ 0 8
C1 4 5 22 u _ 6 .3 V _ X 5 R _ 08
C 171 2 2 u _ 6 .3 V _ X 5 R _0 8
C 163 2 2 u _ 6 .3 V _ X 5 R_ 0 8
C 183 2 2 u _ 6 .3 V _ X 5 R_ 0 8
C5 8 4 22 u _ 6 .3 V _ X 5 R _ 08
C 144 2 2 u _ 6 .3 V _ X 5 R _0 8
C 149 2 2 u _ 6 .3 V _ X 5 R_ 0 8
C 156 2 2 u _ 6 .3 V _ X 5 R_ 0 8
V CO RE C5 7 3 C 569 C 565 C5 6 4
C5 7 0
C 574 1 0 u _ 6 . 3 V _ X 5 R _0 6
C 580 1 0 u _ 6 . 3 V _ X 5 R_ 0 6
C 560 1 0 u _ 6 . 3 V _ X 5 R_ 0 6
C5 7 9
C 566 1 0 u _ 6 .3 V _ X 5 R _0 6
C 563 1 0 u _ 6 .3 V _ X 5 R_ 0 6
C 559 1 0 u _ 6 .3 V _ X 5 R_ 0 6
AG 3 5 AG 3 4 AG 3 3 AG 3 2 AG 3 1 AG 3 0 AG 2 9 AG 2 8 AG 2 7 AG 2 6 A F35 A F34 A F33 A F32 A F31 A F30 A F29 A F28 A F27 A F26 AD 3 5 AD 3 4 AD 3 3 AD 3 2 AD 3 1 AD 3 0 AD 2 9 AD 2 8 AD 2 7 AD 2 6 AC 3 5 AC 3 4 AC 3 3 AC 3 2 AC 3 1 AC 3 0 AC 2 9 AC 2 8 AC 2 7 AC 2 6 A A3 5 A A3 4 A A3 3 A A3 2 A A3 1 A A3 0 A A2 9 A A2 8 A A2 7 A A2 6 Y 35 Y 34 Y 33 Y 32 Y 31 Y 30 Y 29 Y 28 Y 27 Y 26 V3 5 V3 4 V3 3 V3 2 V3 1 V3 0 V2 9 V2 8 V2 7 V2 6 U 35 U 34 U 33 U 32 U 31 U 30 U 29 U 28 U 27 U 26 R 35 R 34 R 33 R 32 R 31 R 30 R 29 R 28 R 27 R 26 P3 5 P3 4 P3 3 P3 2 P3 1 P3 0 P2 9 P2 8 P2 7 P2 6
VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC
C1 C2 C3 C4 C5 C6 C7 C8 C9 C1 0 C1 1 C1 2 C1 3 C1 4 C1 5 C1 6 C1 7 C1 8 C1 9 C2 0 C2 1 C2 2 C2 3 C2 4 C2 5 C2 6 C2 7 C2 8 C2 9 C3 0 C3 1 C3 2 C3 3 C3 4 C3 5 C3 6 C3 7 C3 8 C3 9 C4 0 C4 1 C4 2 C4 3 C4 4 C4 5 C4 6 C4 7 C4 8 C4 9 C5 0 C5 1 C5 2 C5 3 C5 4 C5 5 C5 6 C5 7 C5 8 C5 9 C6 0 C6 1 C6 2 C6 3 C6 4 C6 5 C6 6 C6 7 C6 8 C6 9 C7 0 C7 1 C7 2 C7 3 C7 4 C7 5 C7 6 C7 7 C7 8 C7 9 C8 0 C8 1 C8 2 C8 3 C8 4 C8 5 C8 6 C8 7 C8 8 C8 9 C9 0 C9 1 C9 2 C9 3 C9 4 C9 5 C9 6 C9 7 C9 8 C9 9 C1 0 0
VTT0 _ 1 VTT0 _ 2 VTT0 _ 3 VTT0 _ 4 VTT0 _ 5 VTT0 _ 6 VTT0 _ 7 VTT0 _ 8 VTT0 _ 9 V TT 0 _ 1 0 V TT 0 _ 1 1 V TT 0 _ 1 2 V TT 0 _ 1 3 V TT 0 _ 1 4 V TT 0 _ 1 5 V TT 0 _ 1 6 V TT 0 _ 1 7 V TT 0 _ 1 8 V TT 0 _ 1 9 V TT 0 _ 2 0 V TT 0 _ 2 1 V TT 0 _ 2 2 V TT 0 _ 2 3 V TT 0 _ 2 4 V TT 0 _ 2 5 V TT 0 _ 2 6 V TT 0 _ 2 7 V TT 0 _ 2 8 V TT 0 _ 2 9 V TT 0 _ 3 0 V TT 0 _ 3 1 V TT 0 _ 3 2
1.1V RAIL POWER
A H1 4 A H1 2 A H1 1 A H1 0 J14 J13 H 14 H 12 G 14 G 13 G 12 G 11 F 14 F 13 F 12 F 11 E 14 E 12 D 14 D 13 D 12 D 11 C 14 C 13 C 12 C 11 B 14 B 12 A 14 A 13 A 12 A 11
V TT TOTAL 2 1A
C 177 C 186 C 170 C1 9 0 C2 0 4 *1 0 U _ 6 . 3 V _ 0 6 C1 7 5 2 2u _ 6 . 3 V _ X 5 R _ 0 8 C 58 5 2 2 u _6 . 3 V _X 5 R _ 08 1 0 u _ 6 . 3 V _ X 5R _ 0 6 1 0 u _ 6 .3 V _ X 5 R_ 0 6 1 0 u _ 6 . 3 V _ X 5R _ 0 6 *1 0 U _ 6 . 3 V _ 0 6
C 180
C 179
C 174
C6 2 6
1 0 u _ 6 . 3 V _ X 5R _ 0 6 1 0 u _ 6 .3 V _ X 5 R_ 0 6 1 0 u _ 6 . 3 V _ X 5R _ 0 6 10 u _ 6 . 3 V _ X 5 R _ 0 6
IC AX_ T M CM VT ax Cu rre nt fo VTT R r ail SV 18 XE 21
1. 1V S _ V T T A F10 A E1 0 A C1 0 A B1 0 Y 10 W 10 U 10 T10 J12 J11 J16 J15
The decoupling capacitors, filter recommendations and sense resistors on the CPU/PCH Rails are specific to the CRB Implementation. Customers need to follow the recommendations in the Calpella Platform Design Guide
V V V V V V V V V V V V
TT 0 _ 3 3 TT 0 _ 3 4 TT 0 _ 3 5 TT 0 _ 3 6 TT 0 _ 3 7 TT 0 _ 3 8 TT 0 _ 3 9 TT 0 _ 4 0 TT 0 _ 4 1 TT 0 _ 4 2 TT 0 _ 4 3 TT 0 _ 4 4
C 187 2 2 u _ 6 . 3 V _ X 5R _ 0 8
C1 8 8 22 u _ 6 . 3 V _ X 5 R _ 0 8
C5 8 6 2 2 u_ 6 . 3 V _ X 5 R _0 8
Sheet 6 of 53 CPU 4/7 (Power)
CPU CORE SUPPLY
1.1VS_VTT
+ V T T_ 4 3 + V T T_ 4 4 R4 3 4 R4 3 5 *1 0 m i l _s h o rt *1 0 m i l _s h o rt
Please note that the VTT Rail Values are Auburndale VTT=1.05V Clarksfield VTT=1.1V
1 . 1 V S _V TT
1K PU t o V T T an d 1 K P D to fo r P OC
VC ORE A N3 3 P S I# PSI #
GN D
R1 0 4 *1 K _ 0 4 P S I# R1 0 5 1K _0 4 R7 0 1 K_ 0 4 P M _ D P R S LP V R 43 43
1 0 u _ 6 . 3 V _ X 5 R _0 6
1 0 u _ 6 . 3 V _ X 5 R_ 0 6
1 0 u _ 6 . 3 V _ X 5 R_ 0 6
10 u _ 6 .3 V _ X 5 R _ 06
POWER
1 .1 V S_ VT T V ID [0 ] V ID [1 ] V ID [2 ] V ID [3 ] V ID [4 ] V ID [5 ] V ID [6 ] P R O C_ D P R S L P V R A A A A A A A A K3 5 K3 3 K3 4 L3 5 L3 3 M3 3 M3 5 M3 4 H H H H H H H _V _V _V _V _V _V _V ID0 ID1 ID2 ID3 ID4 ID5 ID6 43 43 43 43 43 43 43
10 u _ 6 .3 V _ X 5 R _ 06
CPU VIDS
G 15 VTT_ SEL EC T H _ VT T VID 1 41
TO V CORE POW ER CONT ROL A N3 5 IS E NS E IM O N 43
10 u _ 6 .3 V _ X 5 R _ 06
SENSE LINES
V C C_ S E NS E V S S _ S E NS E
A J3 4 A J3 5
VC C _ SEN SE 4 3 V S S _ S E N S E 43
V T T_ S E N S E V S S _S E N S E _ V T T
B 15 A 15
VTT _ SEN SE
4 1 ,4 2
V CO R E 43 1 . 1V S _ V T T 2 , 4 , 7 , 1 9 , 2 0 , 2 1, 2 4 , 2 5 , 2 6 , 3 9 , 4 1 , 4 2, 43
P Z 98 9 2 7 -3 6 4 1- 01 F
CPU 4/7 (Power) B - 7
Schematic Diagrams
CPU 5/7 (Graphics Power)

PROCESSOR
V GFX ORE _C A T21 A T19 A T18 A T16 A R21 A R19 A R18 A R16 AP 21 AP 19 AP 18 AP 16 A N21 A N19 A N18 A N16 A M21 A M19 A M18 A M16 A L21 A L19 A L18 A L16 AK 21 AK 19 AK 18 AK 16 A J21 A J19 A J18 A J16 A H21 A H19 A H18 A H16 U40G V G AX 1 V G AX 2 V G AX 3 V G AX 4 V G AX 5 V G AX 6 V G AX 7 V G AX 8 V G AX 9 V G AX 10 V G AX 11 V G AX 12 V G AX 13 V G AX 14 V G AX 15 V G AX 16 V G AX 17 V G AX 18 V G AX 19 V G AX 20 V G AX 21 V G AX 22 V G AX 23 V G AX 24 V G AX 25 V G AX 26 V G AX 27 V G AX 28 V G AX 29 V G AX 30 V G AX 31 V G AX 32 V G AX 33 V G AX 34 V G AX 35 V G AX 36 AR22 VX A G_SE E AT22 NS V A G_SE E SS X NS
5/7
( GRAPHICS POWER )
10u_6.3V_X _06 5R
10u_6.3V_X _06 5R
SENS E LI NES
C153
C152
R120 *0_04
G PUV CCS NSE 42 E G PUV SS SE 42 S EN
C146 + C567 22u_6.3V_X _08 5R 220u_6.3V_6.6*6. 6*4.2_C
C158 22u_6.3V 5R_08 _X
GRAPHICS VIDs
G _V FX ID[0] G _V FX ID[1] G _V FX ID[2] G _V FX ID[3] G _V FX ID[4] G _V FX ID[5] G _V FX ID[6]
AM22 AP 22 AN22 AP 23 AM23 AP 24 AN24
D FGT_V ID_0 D FGT_V ID_1 D FGT_V ID_2 D FGT_V ID_3 D FGT_V ID_4 D FGT_V ID_5 D FGT_V ID_6
42 42 42 42 42 42 42 DFG T_VR_E 42 N
GRAPHICS
AR25 GFX _EN AT25 _VR GFX PRS VR AM24 _D LP GFX _IMON
TP _GFX _IMON
R 113
100_ 04
GFX _IMO 42 N
R 112 *1K_ 04 F OR DI SABLE +1. 5S U _CP V DDQ1 V DDQ2 V DDQ3 V DDQ4 V DDQ5 V DDQ6 V DDQ7 V DDQ8 V DDQ9 V DDQ10 V DDQ11 V DDQ12 V DDQ13 V DDQ14 V DDQ15 V DDQ16 V DDQ17 V DDQ18 AJ1 AF1 AE 7 AE 4 AC1 AB 7 AB 4 Y1 W7 W4 U1 T7 T4 P1 N7 N4 L1 H1
- 1.5V RAILS
Sheet 7 of 53 CPU 5/7 (Graphics Power)
VDDQ 6A
C 193 1u_6.3V 5R_04 _X C266 10u_6. 3V 5R_06 _X C268 10u_6. 3V 5R_06 _X C1133 10u_6. 3V 5R_06 _X C267 10u_6.3V_X 5R_06
Pl ease note t hat t he VT T Rai l Valu es ar e Au burnd ale VT T=1.0 5V Cl arksf ield V TT=1. 1V
POWER
C 197 1u_6.3V 5R_04 _X
C265 1u_6. 3V 5R_04 _X
C264 1u_6. 3V 5R_04 _X
C196 1u_6. 3V 5R_04 _X
1.1V TT S_V C147 22u_6.3V_X _08 5R C601 22u_6.3V 5R_08 _X
J24 J23 H25
V TT1_45 V TT1_46 V TT1_47
DDR3
1. 1V _VTT S
1.1V
F DI
P10 VTT0_59 N10 VTT0_60 L10 VTT0_61 K10 VTT0_62
C 555 10u_6.3V 5R_06 _X
C210 10u_6. 3V 5R_06 _X
1.1VS _VTT K 26 J27 J26 J25 H27 G28 G27 G26 F26 E 26 E 25 VTT1_63 VTT1_64 VTT1_65 VTT1_66 VTT1_67 VTT1_68 J22 J20 J18 H21 H20 H19
1.1V TT S_V C189 22u_6.3V_X _08 5R C600 22u_6.3V 5R_08 _X
C161 22u_6.3V_X _08 5R
C587 22u_6.3V 5R_08 _X
1.8V
V TT1_48 V TT1_49 V TT1_50 V TT1_51 V TT1_52 V TT1_53 V TT1_54 V TT1_55 V TT1_56 V TT1_57 V TT1_58
C 588 22u_6.3V 5R_08 _X
C160 22u_6. 3V 5R_08 _X
P EG & DMI
1. 8V S L26 VC CPLL1 L27 VC CPLL2 M26 VC CPLL3
VCCPLL 0.6A
C 135 1u_6.3V 5R_04 _X C562 1u_6. 3V 5R_04 _X C561 2. 2u_6.3V 5R_06 _X C142 4. 7U 3V 5R_06 _6. _X C143 22u_6.3V_X 5R_08
P Z98927-3641-01F
VGFX _COR 42 E 1. 1V _VTT 2,4, 6,19,20,21,24, 25,26,39,41,42,43 S +1. 5S U 4, 37 _CP 1. 8V S 25, 37,39
B - 8 CPU 5/7 (Graphics Power)
Schematic Diagrams
CPU 6/7 (GND)

PROCESSOR
U4 0H AT 20 AT 17 AR31 AR28 AR26 AR24 AR23 AR20 AR17 AR15 AR12 AR9 AR6 AR3 AP20 AP17 AP13 AP10 AP 7 AP 4 AP 2 AN34 AN31 AN23 AN20 AN17 AM 29 AM 27 AM 25 AM 20 AM 17 AM 14 AM 11 AM 8 AM 5 AM 2 AL34 AL31 AL23 AL20 AL17 AL12 AL9 AL6 AL3 AK29 AK27 AK25 AK20 AK17 AJ31 AJ23 AJ20 AJ17 AJ14 AJ11 AJ8 AJ5 AJ2 AH35 AH34 AH33 AH32 AH31 AH30 AH29 AH28 AH27 AH26 AH20 AH17 AH13 AH9 AH6 AH3 AG10 AF 8 AF 4 AF 2 AE35 V SS1 V SS2 V SS3 V SS4 V SS5 V SS6 V SS7 V SS8 V SS9 V SS1 0 V SS1 1 V SS1 2 V SS1 3 V SS1 4 V SS1 5 V SS1 6 V SS1 7 V SS1 8 V SS1 9 V SS2 0 V SS2 1 V SS2 2 V SS2 3 V SS2 4 V SS2 5 V SS2 6 V SS2 7 V SS2 8 V SS2 9 V SS3 0 V SS3 1 V SS3 2 V SS3 3 V SS3 4 V SS3 5 V SS3 6 V SS3 7 V SS3 8 V SS3 9 V SS4 0 V SS4 1 V SS4 2 V SS4 3 V SS4 4 V SS4 5 V SS4 6 V SS4 7 V SS4 8 V SS4 9 V SS5 0 V SS5 1 V SS5 2 V SS5 3 V SS5 4 V SS5 5 V SS5 6 V SS5 7 V SS5 8 V SS5 9 V SS6 0 V SS6 1 V SS6 2 V SS6 3 V SS6 4 V SS6 5 V SS6 6 V SS6 7 V SS6 8 V SS6 9 V SS7 0 V SS7 1 V SS7 2 V SS7 3 V SS7 4 V SS7 5 V SS7 6 V SS7 7 V SS7 8 V SS7 9 V SS8 0 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 A 4 E3 A 3 E3 A 2 E3 A 1 E3 A 0 E3 A 9 E2 A 8 E2 A 7 E2 A 6 E2 A E6 A 10 D A 8 C A 4 C A 2 C A 5 B3 A 4 B3 A 3 B3 A 2 B3 A 1 B3 A 0 B3 A 9 B2 A 8 B2 A 7 B2 A 6 B2 A B6 A 0 A1 Y8 Y4 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 W6 V 0 1 U8 U4 U2 T 35 T 34 T 33 T 32 T 31 T 30 T 29 T 28 T 27 T 26 T 6 R10 P 8 P 4 P 2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 N6 M 10 L35 L32 L29 L8 L5 L2 K 4 3 K 3 3 K 0 3
6/7
( GND )
U40 I K 7 2 K9 K6 K3 J3 2 J3 0 J2 1 J1 9 H3 5 H3 2 H2 8 H2 6 H2 4 H2 2 H1 8 H1 5 H1 3 H1 1 H8 H5 H2 G3 4 G3 1 G2 0 G9 G6 G3 F 0 3 F 7 2 F 5 2 F 2 2 F 9 1 F 6 1 E 5 3 E 2 3 E 9 2 E 4 2 E 1 2 E 8 1 E 3 1 E 1 1 E8 E5 E2 D3 3 D3 0 D2 6 D9 D6 D3 C3 4 C3 2 C2 9 C2 8 C2 4 C2 2 C2 0 C1 9 C1 6 B 1 3 B 5 2 B 1 2 B 8 1 B 7 1 B 3 1 B 1 1 B8 B6 B4 A 9 2 A 7 2 A 3 2 A9
VSS
VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233
Sheet 8 of 53 CPU 6/7 (GND)
VSS
AT 5 3 AT 1 AR3 4 B34 B2 B1 A35
PZ98 927 -3 641 -0 1F
P 892 7- 364 1- 01F Z9
NCTF
VSS NC T _ F1 VSS NC T _ F2 VSS NC T _ F3 VSS NC T _ F4 VSS NC T _ F5 VSS NC T _ F6 VSS NC T _ F7
CPU 6/7 (GND) B - 9
Schematic Diagrams
CPU 7/7 (RESERVED)

PROCESSOR 7/7
R 2 38 0_04 AP2 5 A L2 5 A L2 4 A L2 2 A J3 3 A G9 M2 7 L2 8 J1 7 H1 7 G2 5 G1 7 E3 1 E3 0 RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV D1 D2 D3 D4 D5 D6 D7 D8 D9 D1 0 D1 1 D1 2 D1 3 D1 4
( RESERVED )
U4 0 E R SVD 3 2 R SVD 3 3 AJ 1 3 AJ 1 2
PCI-Express Conf iguration Select

1 0 MV R E F _D Q _D IM 0
S Q 30 *A O3 4 0 2 L G
V RE F _ CH _ A _ DIM M
R SVD 3 4 R SVD 3 5 R SVD 3 6 R S V D _ NC T F _ 3 7 R SVD 3 8 R SVD 3 9
AH 2 5 AK2 6 AL 2 6 AR 2 AJ 2 6 AJ 2 7
CFG0
1 : Single P EG 0 : Bifurcat ion enable

4 D R A M RS T _ C N T R L R1 0 6 * 3 .01 k _ 0 4 R2 4 9
R 233 * 1 0 0K _0 4
C F G0
0_04
Sheet 9 of 53 CPU 7/7 (RESERVED)
CFG3 - PCI-Expre Static Lane Rev ss ersal 1 : Normal O peration 0 : Lane Num bers Reversed 15 -> 0, 14 -> 1, ...
R S V D _ NC T F _ 4 0 R S V D _ NC T F _ 4 1 R S V D _ NC T F _ 4 2 R S V D _ NC T F _ 4 3
AP1 AT 2 AT 3 AR 1
D 11 M V R E F _ D Q_ D IM1
S Q 31 *A O3 4 0 2 L G
V RE F _ CH _ B _ DIM M
CFG3
R 242 * 1 0 0K _0 4 CF G 0 A M3 0 A M2 8 AP3 1 A L3 2 A L3 0 A M3 1 A N2 9 A M3 2 AK3 2 AK3 1 AK2 8 A J2 8 A N3 0 A N3 2 A J3 2 A J2 9 A J3 0 AK3 0 H1 6 CF G CF G CF G CF G CF G CF G CF G CF G CF G CF G CF G CF G CF G CF G CF G CF G CF G CF G RSV [0 ] [1 ] [2 ] [3 ] [4 ] [5 ] [6 ] [7 ] [8 ] [9 ] [1 0 ] [1 1 ] [1 2 ] [1 3 ] [1 4 ] [1 5 ] [1 6 ] [1 7 ] D_ T P_ 8 6 R SVD 4 5 R SVD 4 6 R SVD 4 7 R SVD 4 8 R SVD 4 9 R SVD 5 0 R SVD 5 1 R SVD 5 2 R SVD 5 3 _ NC T F _ 5 4 _ NC T F _ 5 5 _ NC T F _ 5 6 _ NC T F _ 5 7 R SVD 5 8 AL 2 8 AL 2 9 AP3 0 AP3 2 AL 2 7 AT 3 1 AT 3 2 AP3 3 AR 3 3 AT 3 3 AT 3 4 AP3 5 AR 3 5 AR 3 2
4 D R A M RS T _ C N T R L C F G3 R6 1 * 3 .01 k _ 0 4
CF G 3 CF G 4
CFG4 - Display P ort Presence

1 : Disablled; No physical Display Port attached to Embedded Display Port
CF G 7
CFG4
0 : Enabled; An external Display Port device is connected to the Embedded isplay Port
R 43 2 *0 _ 0 4 R S V D8 6
RESERVED
R R R R
SVD SVD SVD SVD
C F G4
R1 0 2
* 3 .01 k _ 0 4
RSVD 86 Conn ect to GND B1 9 A1 9 R 43 0 R 43 1 * 10 m i l _ sh o rt * 10 m i l _ sh o rt H _ R S V D 1 7_ R H _ R S V D 1 8_ R A2 0 B2 0 U9 T9 AC9 AB9
RSV D_ T P_ 5 9 RSV D_ T P_ 6 0 KEY R SVD 6 2 R SVD 6 3 R SVD 6 4 R SVD 6 5
E1 5 F1 5 A2 D 15 C 15 AJ 1 5 AH 1 5
RS V D6 4 _ R RS V D6 5 _ R
R1 2 2 R1 5 4
*1 0 m i l_ s h o rt *1 0 m i l_ s h o rt
RSV D1 5 RSV D1 6 RSV D1 7 RSV D1 8 RSV D1 9 RSV D2 0 RSV D2 1 RSV D2 2 RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV D_ T P_ 6 6 D_ T P_ 6 7 D_ T P_ 6 8 D_ T P_ 6 9 D_ T P_ 7 0 D_ T P_ 7 1 D_ T P_ 7 2 D_ T P_ 7 3 D_ T P_ 7 4 D_ T P_ 7 5
C F G7
R6 2
* 3 .01 k _ 0 4
CFG7 Clarksfield (only for early samples pre-ES1) - Connect to GND with 3.01K Ohm/5% resistor
C1 A3
AA5 AA4 R8 AD 3 AD 2 AA2 AA1 R9 AG 7 AE3
R S V D _ N CT F _ 2 3 R S V D _ N CT F _ 2 4
J2 9 J2 8 A3 4 A3 3 C3 5 B3 5
RSV D2 6 RSV D2 7 R S V D _ N CT F _ 2 8 R S V D _ N CT F _ 2 9 R S V D _ N CT F _ 3 0 R S V D _ N CT F _ 3 1
RSV RSV RSV RSV RSV RSV RSV RSV RSV RSV
D_ T P_ 7 6 D_ T P_ 7 7 D_ T P_ 7 8 D_ T P_ 7 9 D_ T P_ 8 0 D_ T P_ 8 1 D_ T P_ 8 2 D_ T P_ 8 3 D_ T P_ 8 4 D_ T P_ 8 5
V4 V5 N2 AD 5 AD 7 W3 W2 N3 AE5 AD 9
AP3 4 VSS
TP _R S V D 8 6
VSS (AP34) can be left NC is CRB implementation ; EDS/DG recommendation to GND
P Z 9 8 9 2 7-3 6 4 1 -0 1 F
B - 10 CPU 7/7 (RESERVED)
Schematic Diagrams
DDR3 SO-DIMM_0
SO-DIMM A
C3 1 0 * 10 p _ 50 V _ N P O_ 0 4 M _C L K _D DR 0 M_ C LK _D D R #0 C2 9 8 * 10 p _ 50 V _ N P O_ 0 4 M _C L K _D DR 1 M_ C LK _D D R #1 5 M_ A _ A [ 1 5 : 0 ] M_ A _ A 0 M_ A _ A 1 M_ A _ A 2 M_ A _ A 3 M_ A _ A 4 M_ A _ A 5 M_ A _ A 6 M_ A _ A 7 M_ A _ A 8 M_ A _ A 9 M_ A _ A 1 0 M_ A _ A 1 1 M_ A _ A 1 2 M_ A _ A 1 3 M_ A _ A 1 4 M_ A _ A 1 5
CHANGE TO STANDARD
La y out Note : s ignal /spa ce / signa l: 8/4/8
98 97 96 95 92 91 90 86 89 85 10 7 84 83 11 9 80 78 10 9 10 8 79 11 4 12 1 10 1 10 3 10 2 10 4 73 74 11 5 11 0 11 3 19 7 20 1 20 2 20 0 11 6 12 0
J D I MM 1A A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A 1 0 /A P A1 1 A 1 2 /B C# A1 3 A1 4 A1 5 BA0 BA1 BA2 S0 # S1 # C K0 C K 0# C K1 C K 1# C KE0 C KE1 C AS# R AS# W E# SA0 SA1 SC L SD A O DT 0 O DT 1 D D D D D D D D D D D D D D D D D D D D D D D D M0 M1 M2 M3 M4 M5 M6 M7 QS 0 QS 1 QS 2 QS 3 QS 4 QS 5 QS 6 QS 7 QS 0 # QS 1 # QS 2 # QS 3 # QS 4 # QS 5 # QS 6 # QS 7 # DQ 0 DQ 1 DQ 2 DQ 3 DQ 4 DQ 5 DQ 6 DQ 7 DQ 8 DQ 9 DQ 1 0 DQ 1 1 DQ 1 2 DQ 1 3 DQ 1 4 DQ 1 5 DQ 1 6 DQ 1 7 DQ 1 8 DQ 1 9 DQ 2 0 DQ 2 1 DQ 2 2 DQ 2 3 DQ 2 4 DQ 2 5 DQ 2 6 DQ 2 7 DQ 2 8 DQ 2 9 DQ 3 0 DQ 3 1 DQ 3 2 DQ 3 3 DQ 3 4 DQ 3 5 DQ 3 6 DQ 3 7 DQ 3 8 DQ 3 9 DQ 4 0 DQ 4 1 DQ 4 2 DQ 4 3 DQ 4 4 DQ 4 5 DQ 4 6 DQ 4 7 DQ 4 8 DQ 4 9 DQ 5 0 DQ 5 1 DQ 5 2 DQ 5 3 DQ 5 4 DQ 5 5 DQ 5 6 DQ 5 7 DQ 5 8 DQ 5 9 DQ 6 0 DQ 6 1 DQ 6 2 DQ 6 3
3 .3 V S
R N1 4 8 P 4 R X1 0 K _ 0 4 8 1 7 2 6 3 5 4
5 5 5 5 5 5 5 5 5 5 5 5 5 5
M _ A _B S 0 M _ A _B S 1 M _ A _B S 2 M _ CS # 0 M _ CS # 1 M_ CL K _ D DR M_ CL K _ D DR M_ CL K _ D DR M_ CL K _ D DR M _ CK E0 M _ CK E1 M_ A _ C A S # M_ A _ R A S # M_ A _ W E #
0 #0 1 #1
SA 0 _ DIM 0 SA 1 _ DIM 0
2 , 11 , 2 0 S M B _C L K 2 , 11 , 2 0 S M B _D A T A 5 5 5 M _ OD T 0 M _ OD T 1 M _A _D M[ 7 : 0 ]
S A 0 _ DI M 1 1 1 S A 1 _ DI M 1 1 1
M_ A _ D M M_ A _ D M M_ A _ D M M_ A _ D M M_ A _ D M M_ A _ D M M_ A _ D M M_ A _ D M M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q
0 1 2 3 4 5 6 7 S0 S1 S2 S3 S4 S5 S6 S7 S# 0 S# 1 S# 2 S# 3 S# 4 S# 5 S# 6 S# 7
11 28 46 63 13 6 15 3 17 0 18 7 12 29 47 64 13 7 15 4 17 1 18 8 10 27 45 62 13 5 15 2 16 9 18 6
M _A _D QS [ 7 : 0 ]
5 M _ A _ D QS #[ 7 : 0 ]
5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 12 9 13 1 14 1 14 3 13 0 13 2 14 0 14 2 14 7 14 9 15 7 15 9 14 6 14 8 15 8 16 0 16 3 16 5 17 5 17 7 16 4 16 6 17 4 17 6 18 1 18 3 19 1 19 3 18 0 18 2 19 2 19 4
M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q M_ A _ D Q
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
M _ A _ D Q [ 63 : 0 ] 5
J D I M M1 B 1. 5 V 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 199 V DD SP D 3 . 3V S R2 2 0 4 , 1 1 T S #_ D I MM 0_ 1 4 , 1 1 D D R 3 _ D R A MR S T # C 3 36 C 3 37 1 u _6 . 3 V _ X 5R _ 04 0 . 1 u_ 1 6 V _ Y 5 V _ 04 1 0 K_ 0 4 77 122 125 198 30 NC 1 NC 2 NC T ES T E V E N T# R E S E T# V R E F _D Q V R E F _C A VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS1 0 VSS1 1 VSS1 2 VSS1 3 VSS1 4 VSS1 5 V DD V DD V DD V DD V DD V DD V DD V DD V DD V DD V DD V DD V DD V DD V DD V DD V DD V DD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196
3 .3 VS
2 0 mi ls
C 31 1 1 u _6 . 3 V _ X 5R _ 04 C 3 12 0 . 1 u _1 6 V _ Y 5 V _ 0 4
Sheet 10 of 53 DDR3 SO-DIMM_0
20 m ils
1 126
9 MV R E F _ DQ _ D I M 0
R 2 29
* 0_ 0 4 MV R E F _ D I M 0
R 2 32 C 3 65 C 6 07
0 _ 04 1 u _6 . 3 V _ X 5R _ 04 0 . 1 u_ 1 6 V _ Y 5 V _ 04 2 3 8 9 13 14 19 20 25 26 31 32 37 38 43
V T T _M E M V T T1 V T T2 G1 G2 203 204 G ND 1 G ND 2
A S 0 A 6 2 1- U2 S N -7 F
C LO SE TO SO -DI M M_0
A S 0A 6 2 1 -U 2 S N -7F
1 .5 V
R 24 7
1 K _ 1% _ 0 4
M V RE F _D I M0
R 23 7 1 .5 V 1 K _ 1 %_ 0 4
C 3 63 0 . 1 u _ 10 V _ X 5 R _ 0 4
X 7R - > X5 R C9 90 70 3
C 34 6 + 2 20 u _ 4 V _V _A + C3 3 4 *2 2 0u _ 4 V _ V _A C 2 80 C 31 3 C2 7 9 C3 4 3 C 3 19 C2 8 4 C3 4 2 C 3 15 1 0 u _6 . 3 V _ X 5R _ 06 1 0u _ 6 . 3V _X 5 R_ 0 6 1 u _ 6. 3 V _ X 5 R _ 0 4 1u _ 6 . 3 V _ X5 R _0 4 1 0 u_ 1 0 V _ Y 5 V _ 08 1u _ 6 . 3V _X 5 R_ 0 4 1 u _6 . 3 V _ X 5R _ 04 1 u _ 6 . 3V _ X 5 R_ 0 4 1 1 , 4 0 V TT _ ME M 4 , 1 1 , 3 1, 3 7 , 4 0 1. 5 V 2, 11 , 1 2 , 13 , 1 9 , 2 0, 2 1 , 2 2 , 23 , 2 4 , 2 5, 2 6 , 2 8 , 29 , 3 0 , 3 2, 3 3 , 3 5 , 36 , 3 7 , 4 2, 4 3 , 4 6 3. 3 V S
1 . 5V
V T T_ M E M
C3 1 6
C3 2 2
C 2 82
C 28 5
C2 8 6
C2 8 3
C 3 23
C3 0 1
C2 9 9
C 2 87
C 2 88
C 32 5
C3 1 8
C 2 90
C 28 9
0 . 1 u_ 1 6 V _Y 5 V _ 04 0 . 1 u _ 16 V _ Y 5 V _ 0 4 0 . 1u _ 1 6V _Y 5 V _ 04 0 . 1 u _1 6 V _ Y 5 V _ 0 4 0. 1u _ 1 6V _Y 5 V _0 4 0. 1 u _ 1 6V _ Y 5V _0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0. 1 u _ 16 V _ Y 5V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 04 0 . 1 u _ 16 V _ Y 5 V _ 0 4
1 0 u _6 . 3 V _ X 5R _ 06 1 u_ 6 . 3 V _ X5 R _0 4 1 u _6 . 3 V _ X 5 R _ 0 4 1 u _6 . 3 V _ X 5R _ 04 1 u _ 6 . 3V _ X 5 R_ 0 4
DDR3 SO-DIMM_0 B - 11
Schematic Diagrams
DDR3 SO-DIMM_1 CHANGE TO STANDARD SO-DIMM B

C3 6 1 M_ C LK _D D R 2 C3 5 5 M_ C LK _D D R 3 *1 0 p_ 5 0 V _ N P O_ 0 4 M_ C L K _ D D R # 2 *1 0 p_ 5 0 V _ N P O_ 0 4 M_ C L K _ D D R # 3 5 M _ B _ A [ 1 5: 0] J D I M M2 A M_ B _ A 0 M_ B _ A 1 M_ B _ A 2 M_ B _ A 3 M_ B _ A 4 M_ B _ A 5 M_ B _ A 6 M_ B _ A 7 M_ B _ A 8 M_ B _ A 9 M_ B _ A 1 0 M_ B _ A 1 1 M_ B _ A 1 2 M_ B _ A 1 3 M_ B _ A 1 4 M_ B _ A 1 5 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 109 108 79 114 121 101 103 102 104 73 74 115 110 113 197 201 202 200 116 120 M_ B _ D M M_ B _ D M M_ B _ D M M_ B _ D M M_ B _ D M M_ B _ D M M_ B _ D M M_ B _ D M M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q 0 1 2 3 4 5 6 7 S0 S1 S2 S3 S4 S5 S6 S7 S# 0 S# 1 S# 2 S# 3 S# 4 S# 5 S# 6 S# 7 11 28 46 63 136 153 170 187 12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A1 0 /A P A1 1 A 1 2 /B C# A1 3 A1 4 A1 5 BA0 BA1 BA2 S0 # S1 # CK 0 CK 0 # CK 1 CK 1 # CK E 0 CK E 1 CA S # RA S # W E# SA0 SA1 SCL SDA OD T 0 OD T 1 DM DM DM DM DM DM DM DM DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ 0 1 2 3 4 5 6 7 S0 S1 S2 S3 S4 S5 S6 S7 S0 # S1 # S2 # S3 # S4 # S5 # S6 # S7 # D Q0 D Q1 D Q2 D Q3 D Q4 D Q5 D Q6 D Q7 D Q8 D Q9 D Q1 0 D Q1 1 D Q1 2 D Q1 3 D Q1 4 D Q1 5 D Q1 6 D Q1 7 D Q1 8 D Q1 9 D Q2 0 D Q2 1 D Q2 2 D Q2 3 D Q2 4 D Q2 5 D Q2 6 D Q2 7 D Q2 8 D Q2 9 D Q3 0 D Q3 1 D Q3 2 D Q3 3 D Q3 4 D Q3 5 D Q3 6 D Q3 7 D Q3 8 D Q3 9 D Q4 0 D Q4 1 D Q4 2 D Q4 3 D Q4 4 D Q4 5 D Q4 6 D Q4 7 D Q4 8 D Q4 9 D Q5 0 D Q5 1 D Q5 2 D Q5 3 D Q5 4 D Q5 5 D Q5 6 D Q5 7 D Q5 8 D Q5 9 D Q6 0 D Q6 1 D Q6 2 D Q6 3 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194 M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 M _ B _ D Q [ 6 3: 0 ] 5 J D I MM 2 B 1. 5 V 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD D1 D2 D3 D4 D5 D6 D7 D8 D9 D1 0 D1 1 D1 2 D1 3 D1 4 D1 5 D1 6 D1 7 D1 8 VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS S1 6 S1 7 S1 8 S1 9 S2 0 S2 1 S2 2 S2 3 S2 4 S2 5 S2 6 S2 7 S2 8 S2 9 S3 0 S3 1 S3 2 S3 3 S3 4 S3 5 S3 6 S3 7 S3 8 S3 9 S4 0 S4 1 S4 2 S4 3 S4 4 S4 5 S4 6 S4 7 S4 8 S4 9 S5 0 S5 1 S5 2 44 48 49 54 55 60 61 65 66 71 72 1 27 1 28 1 33 1 34 1 38 1 39 1 44 1 45 1 50 1 51 1 55 1 56 1 61 1 62 1 67 1 68 1 72 1 73 1 78 1 79 1 84 1 85 1 89 1 90 1 95 1 96
Lay out Note : signa l/ spa ce / signa l: 8 / 4/ 8
Sheet 11 of 53 DDR3 SO-DIMM_1
5 M_ B _ B S 0 5 M_ B _ B S 1 5 M_ B _ B S 2 5 M_ C S # 2 5 M_ C S # 3 5 M _ CL K _ DD R 2 5 M _ C L K _ D D R #2 5 M _ CL K _ DD R 3 5 M _ C L K _ D D R #3 5 M_ C K E 2 5 M_ C K E 3 5 M _ B _C A S # 5 M _ B _R A S # 5 M _ B _W E # 10 10 S A0 _ DIM 1 S A1 _ DIM 1 2 , 1 0 , 20 S MB _ C LK 2 , 1 0 , 20 S MB _ D A T A 5 5 5 M_ O D T 2 M_ O D T 3 M_ B _ D M[ 7 : 0 ]
3 .3 VS
20m ils
C 3 59 1 u _ 6 . 3V _X 5 R _0 4 C 3 57 0 . 1 u _ 16 V _ Y 5V _0 4
199 VD DS P D 77 122 125 198 30 N C1 N C2 N CT E S T E V E NT # R ESET #
S A 0 _ D I M1 S A 1 _D I M 1
4 , 1 0 TS #_ D I MM 0 _1 4 ,1 0 DD R3 _ DR A M RS T # C 376 C 377 R 244 *0 _ 0 4 R 243 1 u _ 6 . 3 V _ X5 R _ 04 0 . 1 u _ 1 6V _Y 5 V _ 0 4 0 _0 4
1 126
VR EF_ D Q VR EF_ C A
9 MV R E F _ D Q_ D I M1
M V R E F _ DIM 1 C 354 C 362
1 u _ 6 . 3 V _ X5 R _ 04 0 . 1 u _ 1 6V _Y 5 V _ 0 4
M_ B _ D QS [ 7 : 0 ]
2 3 8 9 13 14 19 20 25 26 31 32 37 38 43
VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS
S1 S2 S3 S4 S5 S6 S7 S8 S9 S1 0 S1 1 S1 2 S1 3 S1 4 S1 5
V T T _M E M VT T1 VT T2 G1 G2 2 03 2 04 GN D 1 GN D 2
A S 0 A 6 21 -U A S N -7 F
5 M_ B _ D QS # [ 7 : 0 ]
A S 0 A 6 2 1 -U A S N -7 F
CLO SE TO S O- DIMM_ 1 La yout Not e: SO -D IMM_1 i s pl a ce d f a rthe r f rom the GMC H t han SO -DI MM_0
1 .5 V R2 4 8 1 K _ 1 %_ 0 4 M V R E F _D I M 1
R2 3 5 1 K _ 1% _ 0 4 1 . 5V
C3 5 8 0 . 1u _ 1 0 V _ X 5R _ 04
X 7R - X > 5R C 07 99 03
C3 2 4 C3 4 9 C 3 66 C3 1 7 C3 2 0 C 3 68 C 340 C3 3 8
10 u _ 1 0V _Y 5 V _ 0 8 1 0 u _1 0 V _ Y 5V _0 8 1 u_ 6 . 3 V _ X 5 R _ 0 4 1 u _ 6 . 3 V _ X5 R _ 04 1 0 u_ 1 0 V _ Y 5 V _ 0 8 1u _ 6 . 3 V _ X5 R _ 04 1 u _ 6. 3 V _ X 5 R _ 0 4 1 u_ 6 . 3 V _ X 5 R _ 0 4 1 0, 4 0 V TT _ ME M 4, 1 0 , 3 1 , 3 7, 40 1 . 5 V 2 , 1 0, 12 , 1 3 , 1 9 , 20 , 2 1 , 2 2 , 2 3, 2 4 , 2 5 , 2 6, 28 , 2 9 , 3 0 , 32 , 3 3 , 3 5 , 3 6, 3 7 , 4 2 , 4 3, 46 3 . 3 V S
1 .5 V
V T T _ ME M
C 3 67
C3 4 1
C3 6 9
C 3 53
C3 3 9
C3 5 6
C 3 73
C 372
C3 7 1
C 37 0
C 34 8
C 3 74
C3 3 0
C3 3 5
C 3 32
0 . 1 u _ 16 V _ Y 5 V _ 04 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0. 1 u _ 1 6V _Y 5 V _ 0 4 0 . 1 u _1 6 V _ Y 5V _0 4 0 . 1u _ 1 6 V _ Y 5 V _ 0 4 1 0 u_ 1 0 V _ Y 5 V _ 0 8 1u _ 6 . 3 V _ X 5R _ 04 1 u _ 6. 3V _X 5 R _ 0 4 0. 1u _ 1 6 V _ Y 5 V _ 0 4 0. 1u _ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1 u _ 1 6V _Y 5 V _ 0 4 0 . 1 u _1 6 V _ Y 5V _0 4 1 u _ 6 . 3V _X 5 R _0 4 1 u _6 . 3 V _ X 5 R _ 0 4
B - 12 DDR3 SO-DIMM_1
Schematic Diagrams
Panel, Inverter, CRT

PANEL
3 6 B RIG HT NE S S G 1 G2 J _ L CD1 R L V D S -U C L K N R L V D S -U C L K P R3 8 8 P LV D D 0_ 0 4 R L V D S -U 1 N R L V D S -U 1 P R L V D S -L C LK N R L V D S -L C LK P C R L V D S -L 1 N R L V D S -L 1 P R L V D S -L 0 N R L V D S -L 0 P 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 R 3 53 2 . 2K _0 4 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 C 51 3 0 . 1u _ 5 0V _ Y 5V _ 0 6 L2 0 . 1 u_ 1 6 V _Y 5V _0 4 G nd 1 Gn d 2 3 . 3V S L51 *W C M3 2 16 F 2 S -1 6 1T 0 3 1 2 LV D S -L 2 N 4 3 LV D S -L 2 P L5 2 * W C M 32 1 6 F 2S -16 1 T 03 1 2 L V D S -U 2 N 4 3 L V D S -U 2 P 3 . 3V S L V D S -U 2 N 2 2 L V D S -U 2 P 22 C5 1 0 L V D S -U 1 P 22 L V D S -U 1 N 2 2 22 , 3 6 N B _ E N A V D D L V D S -U 0 N 2 2 L V D S -U 0 P 22 N B _ E NAV D D 3 *1 U _ 1 0 V _0 6 EN GN D G5 2 43 A P LV D D 2 NEA PI R N4,5 4 5 U 32 1 V IN V IN VO UT R LV D S -L 2N R 3 58 R LV D S -L 2P 2. 2 K _ 0 4 P _ DD C_ DA T A P _ DD C_ CL K R L V D S -U 2 N R L V D S -U 2 P R L V D S -U 0 N R L V D S -U 0 P R L V D S -L2 N R L V D S -L2 P 3 .3 VS P LV D D I N V _ B L ON L E D P L_ V I N 3 .3 V C 50 9 0 . 1 u_ 1 6 V _Y 5 V _0 4 R 41 0 BKL _ EN B L ON * 10 0 K _ 04 U3 5 A 74 L V C 0 8 P W 3 2 4 6 7 R4 1 1 VIN L1 H C B 16 0 8 K F -12 1 T 25 L E D P L_ V I N R4 0 9 C 16 0 . 1 u _5 0 V _ Y 5 V _ 06 *1 00 K _ 0 4 3 . 3V 24 3 0 , 36 S B _ B L ON L I D _S W # 12 11 13 *1 M_ 0 4 1 u_ 6 . 3V _Y 5V _0 4 U 35 D 7 4 LV C 0 8P W 14 10 7 10 0 K _ 04 5 U 35 C 7 4 L V C 0 8P W 8 R 4 00 1 K_ 0 4 I N V _ B L ON 14 7 14 3 . 3V U 35 B 7 4 LV C 0 8P W 3 . 3V 14 1 P _D D C _D A T A 2 2 P _D D C _C L K 22 L53 *W C M3 2 16 F 2 S -1 6 1T 0 3 R LV D S -L 1P 1 2 LV D S -L 1 P R LV D S -L 1N 4 3 LV D S -L 1 N L V D S -L 2N 22 R LV D S -U 2N R LV D S -U 2P
2A
L V D S -L 2P 2 2
L V D S -L 1P 2 2 L V D S -L 1N 22
L5 4 * W C M 32 1 6 F 2S -16 1 T 03 R L V D S -U 1 P 1 2 L V D S -U 1 P R L V D S -U 1 N 4 3 L V D S -U 1 N
L55 *W C M3 2 16 F 2 S -1 6 1T 0 3 2 LV D S -L 0 P R LV D S -L 0P 1 R LV D S -L 0N 4 3 LV D S -L 0 N
L V D S -L 0P 2 2 L V D S -L 0N 22
L5 6 * W C M 32 1 6 F 2S -16 1 T 03 2 L V D S -U 0 N R L V D S -U 0 N 1 R L V D S -U 0 P 4 3 L V D S -U 0 P
R3 7 7 C5 1 1 1 00 K _ 0 4 C5 1 2 R 37 6
R3 8 7 *1 0 K _ 04 A
D3 3 *R B 75 1 V
2A
L57 *W C M3 2 16 F 2 S -1 6 1T 0 3 1 2 LV D S -L C L K P R LV D S -L C L K P 4 R LV D S -L C L K N 3 LV D S -L C L K N
L V D S -L C L K P 2 2 L V D S -L C L K N 2 2
L5 8 * W C M 32 1 6 F 2S -16 1 T 03 2 L V D S -U C L K P R LV D S -U C L K P 1 R LV D S -U C L K N 4 3 L V D S -U C L K N
L V D S -U C LK P L V D S -U C LK N
22 22
0 . 1u _ 16 V _ Y 5 V _ 0 4 * 10 0 K _ 04 1 0 u_ 1 0V _Y 5V _0 8
AC
D2 4 B A V 9 9 RE CT IF IE R 3 . 3V C
C1 7
8 72 1 6 -40 0 6
INVERTER CONNECTOR
Sheet 12 of 53 Panel, Inverter, CRT
36 22
BKL _ EN B L ON
H C B 1 6 08 K F -1 2 1T 2 5
C 14
C1 1 1 0u _ 2 5V _ N P O_ 1 2
C1 5 0 . 1 u_ 5 0 V _Y 5 V _0 6
R 4 01
C5 2 9
1 0 u_ 2 5 V _N P O_ 1 2
21 , 3 6 A L L_ S Y S _P W R GD
6 .3 V_X 5R -> 6.3 V_ Y5 V C 99 070 3
CRT
2 2 DA C _ RE D 2 2 D A C _ GR E E N DA C_ B L UE 2 2 D A C _ B LU E D A C _ GR E E N L48 L49 6 0 OH M 6 0 OH M L 37 L 36 R3 7 2 1 50 _ 1 %_ 0 4 1 50 _ 1 %_ 0 4 R3 7 1 R3 7 0 15 0 _ 1% _ 0 4 C 5 07 C 50 5 C5 0 3 C6 6 5 C5 3 2 C 5 14
J _C R T 1 1 0 8 A H 1 5F S T0 4 N 1 C 3
2 2 p _5 0 V _ N P O _0 4 2 2 p_ 5 0V _N P O_ 0 4 2 2 p_ 5 0 V _N P O_ 0 4
2 2p _ 5 0V _ N P O_ 0 4 22 p _5 0 V _ N P O _0 4 22 p _ 50 V _ N P O _ 04
1 00 0 P _ 50 V _ X 7 R _ 0 4
U3 0 2 2 DA C _ DDC A DA T A 2 2 DA C _ DDC A CL K 2 2 DA C _ HS Y N C 2 2 DA C _ V S Y N C 5V S 3 . 3V S 0 . 2 2 u_ 1 0 V _Y 5 V _ 0 4 0. 22 u _1 0 V _ Y 5 V _0 4 10 DDC _ IN1 11 DDC _ IN2 13 S Y N C_ IN1 15 S Y N C_ IN2 1 2 7 8 0. 2 2 u _1 0 V _ Y 5V _ 0 4 V C C _S Y N C V C C _V I D E O V C C _D D C BYP I P 4 77 2 C Z 1 6 S Y N C _ OU T 2 V IDE O _ 1 V IDE O _ 2 V IDE O _ 3 GN D 3 4 5 6 3 . 3V S 3 . 3V 5 VS V IN 2 , 1 0 , 11 , 1 3 , 19 , 2 0 , 21 , 2 2 , 23 , 2 4 , 25 , 2 6 , 2 8, 2 9 , 3 0, 3 2 , 3 3, 3 5 , 3 6, 3 7 , 4 2, 4 3 , 4 6 3 , 4 , 1 3, 1 7 , 1 9, 2 0 , 2 1, 2 3 , 2 4, 26 , 2 8, 29 , 3 1 , 32 , 3 3 , 34 , 3 7 , 39 , 4 0 , 41 , 4 4 1 9 , 2 2, 2 5 , 2 6, 3 0 , 3 3, 3 5 , 3 7, 4 2 , 4 3, 4 6 3 7 , 3 8, 4 0 , 4 1, 4 2 , 4 3, 4 4 , 4 5 F RE D F GR N F BL UE S Y N C _ OU T 1 16 D D C _ OU T 2 14 R 7 R 1 33 _ 0 4 33 _ 0 4 H SYN C VSYN C D D C _ OU T 1 12 DD CL K 9 D DCD A T A
C 6
C4
C5 0 2
8 7 6 5
RN 1 2 . 2 K _ 8 P 4R _ 04
C5
C3
C1
P LEASE CLOSE T O CONN ECTOR
1 00 0 P _ 50 V _ X 7 R _ 0 4
2 20 p _5 0 V _ N P O _0 4
22 0 p _5 0 V _ N P O _ 0 4
3 .3 VS
5 VS
G ND1 GND 2
1 2 3 4
C2
. . .
. . .
DA C_ RE D
L50
6 0 OH M
L 38
6 0 OH M 6 0 OH M 6 0 OH M
F R ED F G RN F BL U E
1 9 2 10 3 11 4 12 D DCD A T A H S YNC V SY NC D DCL K 5 13 6 14 7 15 8
24 mil
C5 0 8
C 50 6
C5 0 4
22 p _ 50 V _ N P O 2_204 _5 0 V _ N P O 2_0 p_ 5 0 V _N P O_ 0 4 p 24
Panel, Inverter, CRT B - 13
Schematic Diagrams
VGA PCI-E Interface

G PU
H 11 H 13 H 5 1 H 8_0D 4_4 H 8_0D 4_4 H _0D _4 8 4 U 36A
B GA 9 7 3 COM MON
P X DD E _V A 16 K P X OD D E _I V A 17 K P X OD D E _I V A 21 K P X OD D E _I V A 24 K P X OD D E _I V A 27 K P X OD D E _I V
1/ 6P C E X R S 1 _ I PE S 3V _R N 3 U C 103 C 95 C 101 C 83 C 109 C 31 C 4 3 C 26
BI OS R OM
3 V UN 3_R 7 U 33 HO LD WP CS S I S O S K C G D N 4 V C C C 8 51 0. u_16V _Y 5V 1 _04 8
3V 3_R U N 3V _R N 3 U A G11 P E _I V D Q XO D A G12 P E _I V D Q A XO D G13 P E _I V D Q XO D A G15 P E _I V D Q XO D G16 P E _I V D Q A XO D A G17 P E _I V D Q XO D A P E _I V D Q G18 XO D A G22 P E _I V D Q XO D A G23 P E _I V D Q XO D A G24 P E _I V D Q XO D P E _I V D Q XO D P E _I V D Q XO D P E _I V D Q XO D P E _I V D Q XO D P E _I V D Q XO D P E _I V D Q XO D A G25 A G26 A 14 J A 15 J A 19 J A 21 J A 22 J
0. 1u_ 16V Y _04 _ 5V 0. 1u_1 6V 5V _04 _Y 0. 1u_16V _Y 5V 4 _0 P LA E N E R B LLS C A A
1u_6. 3V _X _04 5R 1 0u_6. 3V _X _06 5R 22u_1 0V 5V 08 _Y _ 1u_ 6. V 5R _04 3 _X 4. 7u_6. 3V _X _06 5R U 36K P C NE RB G LA E A A J26 J25
B GA 9 7 3 C OM MON
R 75 3 C3 10K _04 V _R OM S GA _C # D 3 C 4 D 4 V _R OM I GA _S V _R OM O GA _S V _R OM C K GA _S L
13/ 6MI C 1 S 2 BBSN C A I _N BBSP C A I _N
RO S M_C RO I M_S RO O M_S RO C M_S LK
3 1 5 2 6
C 62 U4 74A H 1G08GW C 1 36 dGP _R T# U S 2 R 57 3 G 1 00K 4 _0 4 P R TB E S # 1u _6. 3V 5R 04 _X _ 5
R 1 59 1 0K 4 _0
R 32 10 K _04
2 2 00 mA
P X DD E _V
S S 5V 512A T2 F S TR P 0 A S TR P 1 A S TR P 2 A C 75 C 70 C 107 C 86 C 57 C 25 C 22 1 C 51 F6 G 6 0. 1u_ 16V Y _04 _ 5V 0. 1u_1 6V 5V _04 _Y 0. 1u_16V _Y 5V 4 _0 P LA E N E R B LLS C A A 1u_6. 3V _X _04 5R 1 0u_6. 3V _X _06 5R 22u_1 0V 5V 08 _Y _ 1u_ 6. V 5R _04 3 _X 4. 7u_6. 3V _X _06 5R P LA E N E R B C A GA A5 B CE C S DF C P I _N B FS U RT P OO O U G D_ T R 54 R 56 3V _R N 3 U 40. 2K 1%_04 _ 40. 2K 1%_04 _ N 9 M 9 MU L _S R A _R F N D T I T P E 0_G MU L _S R A _R F N D T I T P E 1_G GN D GN D K9 A 5 A 4 C 5 W5 W7 V 7 V _S TR P GA A 0 V _S TR P GA A 1 V _S TR P GA A 2 3 V UN 3_R
A M16 A 13 R
P E _R T X S P E _C R E X LK Q
23, 29 P T_R S L T#
Q 4 5 D MTN 7002 ZH S 3 *0_04 A J17 A J18 A 16 R A 17 R P E _TS LK U T X TC _O P E _TS LK U T X TC _O P E _R F LK X E C P E _R F LK X E C P E _TX X 0 P E _TX X 0 P E _R 0 X X P E _R 0 X X P E _TX X 1 P E _TX X 1 P E _R 1 X X P E _R 1 X X P E _TX X 2 P E _TX X 2 P E _R 2 X X P E _R 2 X X P E _TX X 3 P E _TX X 3 P E _R 3 X X P E _R 3 X X P E _TX X 4 P E _TX X 4 A 22 N AP 22 P E _R 4 X X P E _R 4 X X P E _TX X 5 P E _TX X 5 P E _R 5 X X P E _R 5 X X P E _TX X 6 P E _TX X 6 P E _R 6 X X P E _R 6 X X P E _TX X 7 P E _TX X 7 P E _R 7 X X P E _R 7 X X P E _TX X 8 P E _TX X 8 P E _R 8 X X P E _R 8 X X P E _TX X 9 P E _TX X 9 P E _R 9 X X P E _R 9 X X P E _TX X 10 P E _TX X 10 P E _R 0 X X1 P E _R 0 X X1 P E _TX X 11 P E _TX X 11
R 52
*0_0 4 S
2 _S ICH CL 2H D I C _S A
R 22 R 34
2. 2K 04 _ 2. 2K 04 _
20 P E G_C LK E R Q#
P G C R Q# E _ LK E
R 39
R 58 2 0 V G _P X L K A E C 2 0 V G _P X L K A E C # V _ PXC GA E LK V _ PXC # GA E LK P G R0 E _ X P G R# 0 E _ X P G TX E _ 0 P G TX E _ #0 P G R1 E _ X P G R# 1 E _ X P G TX E _ 1 P G TX E _ #1 P G R2 E _ X P G R# 2 E _ X P G TX E _ 2 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 P G X E _T 2 P G X E _T #2 PE G_R X 3 PE G_R X #3 P G X E _T 3 P G X E _T #3 PE G_R X 4 PE G_R X #4 P G X E _T 4 P G X E _T #4 PE G_R X 5 PE G_R X #5 P G X E _T 5 P G X E _T #5 PE G_R X 6 PE G_R X #6 P G X E _T 6 P G X E _T #6 PE G_R X 7 PE G_R X #7 P G X E _T 7 P G X E _T #7 P G TX E _ #2 P G R3 E _ X P G R# 3 E _ X P G TX E _ 3 P G TX E _ #3 P G R4 E _ X P G R# 4 E _ X P G TX E _ 4 P G TX E _ #4 P G R5 E _ X P G R# 5 E _ X P G TX E _ 5 P G TX E _ #5 P G R6 E _ X P G R# 6 E _ X P G TX E _ 6 P G TX E _ #6 P G R7 E _ X P G R# 7 E _ X P G TX E _ 7 P G TX E _ #7 C 92 C 97 C 87 C 93 C 76 C 85 C 77 C 73 C 66 C 72 C 63 C 67
P E _T S LK O T X TC _ U *220_1%_ 04 P E _T S LK O T# X TC _ U
Sheet 13 of 53 VGA PCI-E Interface
P E _I V D Q XO D A 24 J P E _I V D Q A 25 XO D J P E _I V D Q XO D A 27 J P E _I V D Q A 18 XO D K P E _I V D Q XO D A 20 K P E _I V D Q XO D K P E _I V D Q A 23 XO D A 26 K P E _I V D Q XO D A 16 L P E _I V D Q XO D
3 3 3 3 3 3 3 3 3 3
PE G_R X 0 PE G_R X #0 P G X E _T 0 P G X E _T #0 PE G_R X 1 PE G_R X #1 P G X E _T 1 P G X E _T #1 PE G_R X 2 PE G_R X #2
0. 1u_10V _X _04 P X X 7R E _R 0 0. 1u_10V _X _04 P X X 7R E _R 0#
A L17 A M17 AP 17 A 17 N
A1 4 K
16 m il
G 08 F1 G 1X T2 A G19 PX V D 3 E _S D _3V P X V D _3V C F7 E _S D 3_N P X S V D _3V E _ D 3 P E _V D _S V D X D D C 35 C 47 P LA E N E R B L LS C A A P X DD E _V L3 P C NE A B A LA E R LLS H B 005K - 121T20 C 1 F
0. 1u_10V _X _04 P X X 7R E _R 1 E _R 1# 0. 1u_10V _X _04 P X X 7R
A M18 A M19 A 19 N AP 19
0. 01 u_16V _X _04 7R 0. 1u_ 16V 5V _04 _Y NC NC NC NC NC NC NC NC NC NC NC NC NC A 2 A 7 A 4 A A 4 B A 7 B A 5 C A 6 D A 6 F A G6 A 5 J A 15 K A 7 L B 7 C7
A 19 R A 20 R 0. 1u_10V _X _04 P X X 7R E _R 3 0. 1u_10V _X _04 P X X 7R E _R 3# A L20 A M20 AP 20 A 20 N E _R 4 0. 1u_10V _X _04 P X X 7R 0. 1u_10V _X _04 P X X 7R E _R 4# A M21 A M22
A L22 AK 22 A 22 R A 23 R
NC NC D5 D6 NC D7 NC E 5 NC E 7 NC NC NC NC NC NC NC NC V D D 33 V D D 33 V D D 33 V D D 33 V D D 33 F4 G5 H 32 P 6 U7 V 6 Y4 J10 J11 J12 J13 J9 C 53 0 . u_16V _Y V 1 5 _04 C 43 C 0 3 C 23 C 52 R 19 0. u_16V _Y 5V 1 _04 P LA E N E R B LLS C A A 0. 1u_16V _Y 5V 4 _0 1u_6. 3V _X _04 5R 4. 7u_ 6. V 5 R 6 3 _X _0 R 374 *4. 99K _1%_04 V G _R A OM_S O R 373 10K 1%_04 _ *20K _1%_04 V G _R A OM_S I R 379 2 0K _1%_ 04 3V U N 3_R
C 98 C 105
A L23 A M23 AP 23 A 23 N
C 104 C 110
A M24 A M25 A 25 N AP 25 A L25 AK 25 A 25 R A 26 R A L26 A M26 AP 26 A 26 N A M27 A M28 A 28 N AP 28 A L28 AK 28 A 28 R A 29 R AK 29 A L29 AP 29 A 29 N A M29 A M30 A 31 N AP 31 A M31 A M32 A 31 R A 32 R A 32 N AP 32 A 34 R AP 34
3V 3_R U N
R 16 D 35 V D E S D _S N E P 7 V D E S A 20 D _S N E D V D E S D _S N E A 19 D G D E S R7 N _S N E G D E S N _S N E E 5 3 G D E S N _S N E
34. 8K _1%_04
V G _R A OM_S LK C
R 380
R 25 P 1 _V D S N S E S D _ E P 1 _G D _S N E S N E S P 1 _V D _S N E 4 4 S D E S P 1 _G D _S N E 44 S N E S R 42
45. 3K _1%_04
V G _S A 0 A TR P
R 26
*34. 8K _1%_04
V G _S A 1 A TR P
R 43
R 41
*10K _1%_04
V G _S A 2 A TR P
R 40
10 u_10V _Y V 5 _08 0. 02 2u_16V _X _04 7R
1 6m i l
L6 P X LLV D E _P D A G14 P X L LV D E _P D C 64 0. 1u_ 6. V 5 R 4 3 _X _0 C 84 C 61
P E _V D D X
P E _R 1 X X P E _R 1 X X P E _TX X 12 P E _TX X 12 P E _R 2 X X1 P E _R 2 X X1 P E _TX X 13 P E _TX X 13 P E _R 3 X X1 P E _R 3 X X1 P E _TX X 14 P E _TX X 14 P E _R 4 X X1 P E _R 4 X X1 P E _TX X 15 P E _TX X 15 P E _R 5 X X1 P E _R 5 X X1 A 35 P
H B 1005K F- 121T2 0 C
1u_6. 3V _X _04 4 7 u_6. 3V 5R 06 5R . _X _ R 50 D
P LA E N E R B LLS C A A
P C N A BG LA E E R A
17 , 6 , 9 dGP _P WR E # 3 3 U _ N
dGP _P _E N U WR #
G S
Q6 MTN 7002Z H 3 S
R 30 1M_04
GT21X R FU
GF108 A G20 P X LL_H D _N C E _P V D G21 P X _T R E E MP A P X _TE MP E R R 66 2. 49 K _1%_0 4
TS M E E T OD
G U ETM E P _T S OD
R 417
10 K _04 1 4, 9 P X D D 3 E _V 2, 10, 11, 12, 19 , 0 , 1 2 2, 3, 4, 25, 26, 28, 29, 30, 32, 33, 35, 36, 37, 42, 43, 46 3. 3V 2 2 , 2 2 S 3, 4, 12, 17, 19, 20, 21, 23, 24, 26, 28, 29, 31, 32, 33 , 4 , 7 , 9, 0, 1, 4 3. 3V 3 3 3 4 4 4 1 7, 4 4 3V _R N 3 U
B - 14 VGA PCI-E Interface
.
C 38 C 42 C 32 U 36D 22u _6. 3V 5R 08 _X _ 0. u_16V _Y 5V 4 1 _0 0. u_16V _Y V 1 5 _04
B GA 9 7 3 C OMM ON
0. 1u_10V _X _04 P X X 7R E _R 2 P X X E _R 2# 0. 1u_10V _X _04 7R
A L19 AK 19
16 mi l
14/ 16X L_P TA LL AE 9 AD 9 C 24 0. 1u_16 V 5V 04 _Y _ C 40 A F9 P DD LLV V D LLV D I _P D S _P D P LLV D
0. 1u_1 6V 5V _04 _Y
D 2
X A S T L_S I N
X LOU B U F TA _ T F
D1
B 1 R 390 10 K _04 X A N T L_I XA T L_OU T
B2 R 9 38 10K 04 _
X 5 2 C 515
F S - 8L_ 27MH X z 1 C 516
B 0M 513
2 0p_50V _N P O_04
X 4 1 1 2
*27 . 0 0M z_10 P M_30 R 0 H P 3 4
20p_ 50V N O 4 _ P _0
0 0
*34. 8K _1%_04
1
*4. 99K _1%_04
1
34. 8K %_04 _1
33V . 2009 /12/0 1_Alex Q 2 A O3409 S D
3V 3_R U N
0
4. 99 K _1%_0 4
C 41
C 33
C 28 R 18 2 2K % 04 _1 _ 4. 7u_ 6. 3V 5 R 6 _X _0
3 .VS 3 R 33 100 K _04
10 K _04 G Q3 MTN 7002 ZH S 3
Schematic Diagrams
VGA Frame Buffer Interface

Fram e Buf fer Int erf ace
U 36B
B GA 9 7 3 COMM ON
U 36C
B GA 9 7 3 COM MON
2/ 16F A B F BV D Q D 15 FB A_D [ 63: 0] FBA _D 0 FBA _D 1 FBA _D 2 FBA _D 3 FBA _D 4 FBA _D 5 FBA _D 6 FBA _D 7 FBA _D 8 FBA _D 9 FBA _D 10 FBA _D 11 FBA _D 12 FBA _D 13 FBA _D 14 FBA _D 15 FBA _D 16 FBA _D 17 FBA _D 18 FBA _D 19 FBA _D 20 FBA _D 21 FBA _D 22 FBA _D 23 FBA _D 24 FBA _D 25 FBA _D 26 FBA _D 27 FBA _D 28 FBA _D 29 FBA _D 30 FBA _D 31 FBA _D 32 FBA _D 33 FBA _D 34 FBA _D 35 FBA _D 36 FBA _D 37 FBA _D 38 FBA _D 39 FBA _D 40 FBA _D 41 FBA _D 42 FBA _D 43 FBA _D 44 FBA _D 45 FBA _D 46 FBA _D 47 FBA _D 48 FBA _D 49 FBA _D 50 FBA _D 51 FBA _D 52 FBA _D 53 FBA _D 54 FBA _D 55 FBA _D 56 FBA _D 57 FBA _D 58 FBA _D 59 FBA _D 60 FBA _D 61 FBA _D 62 FBA _D 63 1 5 F B D M[ : 0] A Q 7 F B D 7: 0] A QM[ FBA D Q M0 FBA D Q M1 FBA D Q M2 FBA D Q M3 FBA D Q M4 FBA D Q M5 FBA D Q M6 FBA D Q M7 15 FB AD Q S _WP 7 : ] [ 0 FB D A QS_W P[ 7: 0] FB D A QS_W P 0 FB D A QS_W P 1 L 34 H 35 J 32 P 32 H 34 J 30 P 30 AF 32 AL 32 AL 34 AF 35 L 32 N 33 L 33 N 34 N 35 P 35 P 33 P 34 K 35 K 33 K 34 H 33 G34 G33 E 34 E 33 G31 F 30 G30 G32 K 30 K 32 H 30 K 31 L 31 L 30 M32 N 30 M30 P 31 R 32 R 30 A G30 A G32 A H 31 AF 31 AF 30 AE 30 A C 32 A D 30 A N 33 AL 31 A M33 AL 33 AK 30 AK 32 AJ 30 A H 30 A H 33 A H 35 A H 34 A H 32 AJ 33 AL 35 A M34 A M35 AF 33 AE 32 AF 34 AE 35 AE 34 AE 33 AB 32 A C 35 F A 0 B _D F A 1 B _D F A 2 B _D F A 3 B _D F A 4 B _D F A 5 B _D F A 6 B _D F A 7 B _D F A 8 B _D F A 9 B _D F A 10 B _D F A 11 B _D F A 12 B _D F A 13 B _D F A 14 B _D F A 15 B _D F A 16 B _D F A 17 B _D F A 18 B _D F A 19 B _D F A 20 B _D F A 21 B _D F A 22 B _D F A 23 B _D F A 24 B _D F A 25 B _D F A 26 B _D F A 27 B _D F A 28 B _D F A 29 B _D F A 30 B _D F A 31 B _D F A 32 B _D F A 33 B _D F A 34 B _D F A 35 B _D F A 36 B _D F A 37 B _D F A 38 B _D F A 39 B _D F A 40 B _D F A 41 B _D F A 42 B _D F A 43 B _D F A 44 B _D F A 45 B _D F A 46 B _D F A 47 B _D F A 48 B _D F A 49 B _D F A 50 B _D F A 51 B _D F A 52 B _D F A 53 B _D F A 54 B _D F A 55 B _D F A 56 B _D F A 57 B _D F A 58 B _D F A 59 B _D F A 60 B _D F A 61 B _D F A 62 B _D F A 63 B _D G 21X T F A _C 25 B MD F A _C 23 B MD F A _C 2 B MD F A _C 0 B MD F A _C 10 B MD F A _C 26 B MD F A _C 14 B MD F A _C 7 B MD F A _C 1 B MD F A _C 22 B MD F A _C 20 B MD F A _C 24 B MD F A _C 18 B MD F A _C 9 B MD F A _C 29 B MD F A _C 8 B MD F A _C 27 B MD F A _C 15 B MD F A _C 11 B MD F A _C 16 B MD F A _C 28 B MD F A _C 3 B MD F A _C 17 B MD F A _C 5 B MD F A _C 4 B MD F A _C 21 B MD F A _C 6 B MD F A _C 13 B MD F A _C 19 B MD F A _C 12 B MD F A _C 30 B MD NA / GF 108 F B _C 0 A MD F B _C 1 A MD F B _C 2 A MD F B _C 3 A MD F B _C 4 A MD F B _C 5 A MD F B _C 6 A MD F B _C 7 A MD F B _C 8 A MD F B _C 9 A MD F B _C 1 A MD 0 F B _C 1 A MD F B _C 1 A MD 2 F B _C 1 A MD 3 F B _C 1 A MD 4 F B _C 1 A MD 5 F B _C 1 A MD 6 F B _C 1 A MD 7 F B _C 1 A MD 8 F B _C 1 A MD 9 F B _C 2 A MD 0 F B _C 2 A MD 1 F B _C 2 A MD F B _C 2 A MD 3 F B _C 2 A MD 4 F B _C 2 A MD 5 F B _C 2 A MD 6 F B _C 2 A MD 7 F B _C 2 A MD 8 F B _C 2 A MD 9 F B _C 3 A MD 0 F B _C 3 A MD 1 F B _C 0 A LK F B _C 0 A LK F B _C 1 A LK F B _C 1 A LK U 0 3 V30 U 1 3 V32 T35 U 3 3 W32 W33 W31 W34 U 4 3 U 5 3 U 2 3 T34 T33 W30 AB 30 AA 30 AB 31 AA 32 AB 33 Y3 2 Y3 3 AB 34 AB 35 Y3 5 W35 Y3 4 Y3 1 Y3 0 W29 Y2 9 T32 T31 AC 31 AC 30 FB A C 0 _ MD FB A C 1 _ MD FB A C 2 _ MD FB A C 3 _ MD FB A C 4 _ MD FB A C 5 _ MD FB A _ FB A _ FB A _ FB A _ FB A _ C 6 MD C 7 MD C 8 MD C 9 MD C 10 MD F B D Q 7: 0] C M[ 16 F B _O T_ L A D F B _O T_ H A D F B _R T# A S F B _C E L A K _ F B _C E H A K _ FB _C M 0 A D R 422 FB _C M 19 R 78 A D FB _C M 20 R 438 A D FB _C M 3 R 89 A D FB _C M 16 R 420 A D 10K _04 10K _04 10K _04 10K _04 10K _04 FB C Q M 7: 0] D [ F B DQ C M0 F B DQ C M1 F B DQ C M2 F B DQ C M3 F B DQ C M4 F B DQ C M5 F B DQ C M6 F B DQ C M7 F B D Q _WP [ : 0] C S 7 16 F BC D S WP 7: 0] Q _ [ F B D Q _WP 0 C 14 C S F B D Q _WP 1 A 10 C S F B D Q _WP 2 E 10 C S D 14 F B D Q _WP 3 C S F B D Q _WP 4 E 26 C S F B D Q _WP 5 D 32 C S F B D Q _WP 6 A 32 C S F B D Q _WP 7 B 26 C S F B D Q _R N 7: 0] C S [ 16 FB C D S R [ 7: 0] Q _ N FB A LK 0 15 _C FB A LK 0# 1 5 _C FB A LK 1 15 _C FB A LK 1# 1 5 _C F B D Q _R N C S 0 F B D Q _R N C S 1 F B D Q _R N C S 2 F B D Q _R N C S 3 F B D Q _R N C S 4 F B D Q _R N C S 5 F B D Q _R N C S 6 F B D Q _R N C S 7 B 14 B 10 D9 E 14 F 26 D 31 A 31 A 26 A 16 D 10 F 11 D 15 D 27 D 34 A 34 D 28 F B _C 1 A MD F B _C 17 A MD F B _C 31 A MD FB DD V Q FB DD V Q FB DD V Q FB DD V Q FB DD V Q FB DD V Q FB DD V Q FB DD V Q FB DD V Q FB DD V Q FB DD V Q FB DD V Q FB DD V Q FB DD V Q FB DD V Q FB DD V Q FB DD V Q FB DD V Q FB DD V Q FB DD V Q FB DD V Q FB DD V Q FB DD V Q FB DD V Q FB DD V Q FB DD V Q FB DD V Q A E27A A B29A A31A A27 A D27 A B27A A29 C27 F B _D 63: 0] A [ 16 F BC _D 63 : ] [ 0 F B _D [ 63: 0] C FB C D _ 0 FB C D _ 1 FB C D _ 2 C 118 C 115 C 14 1 C 116 FB C _ FB C _ FB C _ FB C _ FB C _ D 3 D 4 D 5 D 6 D 7 B 13 D 13 A 13 A 14 C 16 B 16 A 17 D 16 C 13 B 11 C 11 A 11 C 10 C8 B8 A8 E8 F8 F 10 F9 F 12 D8 D 11 E 11 D 12 E 13 F 13 F 14 F 15 E 16 F 16 F 17 D 29 F 27 F 28 E 28 D 26 F 25 D 24 E 25 E 32 F 32 D 33 E 31 C 33 F 29 D 30 E 29 B 29 C 31 C 29 B 31 C 32 B 32 B 35 B 34 A 29 B 28 A 28 C 28 C 26 D 25 B 25 A 25
3/ 6F B 1 B FB D Q V D V 34 V U 29 2727 272727 V 2927 U T R P N
F B _D B 0 F B _D B 1 F B _D B 2 F B _D B 3 F B _D B 4 F B _D B 5 F B _D B 6 F B _D B 7 F B _D B 8 F B _D B 9 F B _D B 10 F B _D B 11 F B _D B 12 F B _D B 13 F B _D B 14 F B _D B 15 F B _D B 16 F B _D B 17 F B _D B 18 F B _D B 19 F B _D B 20 F B _D B 21 F B _D B 22 F B _D B 23 F B _D B 24 F B _D B 25 F B _D B 26 F B _D B 27 F B _D B 28 F B _D B 29 F B _D B 30 F B _D B 31 F B _D B 32 F B _D B 33 F B _D B 34 F B _D B 35 F B _D B 36 F B _D B 37 F B _D B 38 F B _D B 39 F B _D B 40 F B _D B 41 F B _D B 42 F B _D B 43 F B _D B 44 F B _D B 45 F B _D B 46 F B _D B 47 F B _D B 48 F B _D B 49 F B _D B 50 F B _D B 51 F B _D B 52 F B _D B 53 F B _D B 54 F B _D B 55 F B _D B 56 F B _D B 57 F B _D B 58 F B _D B 59 F B _D B 60 F B _D B 61 F B _D B 62 F B _D B 63 G 21X T F B MD B _C 25 F B MD B _C 23 F B MD B _C 2 F B MD B _C 0 F B MD B _C 10 F B MD B _C 26 F B MD B _C 14 F B MD B _C 7 F B MD B _C 1 F B MD B _C 22 F B MD B _C 20 F B MD B _C 24 F B MD B _C 18 F B MD B _C 9 F B MD B _C 29 F B MD B _C 8 F B MD B _C 27 F B MD B _C 15 F B MD B _C 11 F B MD B _C 16 F B MD B _C 28 F B MD B _C 3 F B MD B _C 17 F B MD B _C 5 F B MD B _C 4 F B MD B _C 21 F B MD B _C 6 F B MD B _C 13 F B MD B _C 19 F B MD B _C 12 F B MD B _C 30 N/ A GF108
FV D BD Q FV D BD Q FV D BD Q FV D BD Q FV D BD Q FV D BD Q FV D BD Q FV D BD Q FV D BD Q FV D BD Q FV D BD Q
C 11 3
C 124
C 69
C 7 11
0. 1u _16V _Y V 5 _04 0. 1u_16 V 5V 04 _Y _ 0. 1u_1 6V 5V _04 _Y 1 u_6. 3V_ Y V 5 _04
0 1 u_16V _Y 5V_0 4 . 0. 1u_1 6V 5V _04 _Y 0. 1u_ 16V Y V_04 _ 5 1u_6. 3V _Y 5V 4 _0
AJ28 B18 E21 G 7 1 G 8 1 G 2 2 G 8 G 9 H 9 2 J14 J15 J16 J17 J20 J21 J22 J23 J24 J29 C 74 C 71
X5R 5V ->Y C99 3 070

4. 7u _6. 3V 5R _06 _X 4. 7u_6 . V R 6 3 _X5 _0
FB C D _ 8 FB C D _ 9 FB C D _ 10 FB C D _ 11 FB C D _ 12 FB C D _ 13 FB C D _ 14 FB C D _ 15 FB C D _ 16 FB C D _ 17
W27 Y 27 C 94 C 99
X >Y5 5R- V C 703 990

4 7 u_6. 3V X _06 . _ 5R 4. 7u_ 6. 3V 5R 06 _X _
C 544
C 593
C 81 5
FB C D _ 18 FB C D _ 19 FB C D _ 20 FB C D _ 21 FB C D _ 22 FB C D _ 23 FB C D _ 24 FB C D _ 25 FB C D _ 26 FB C D _ 27 FB C D _ 28 FB C D _ 29 FB C D _ 30 FB C D _ 31 FB C D _ 32 FB C _ FB C _ FB C _ FB C _ FB C _ D 33 D 34 D 35 D 36 D 37
C 57 7
C 572
C 568
0. 04 7u_10 V 7 R 4 _X _0 0. 047u_ 10V X _04 _ 7R 0. 047u _10V _X _04 7R P A E N EA B L C R GA
0 0 47u_1 0V 7R 04 . _X _ 0. 047u _10V _X _04 7R 0. 47u_1 0V 7R _04 0 _X
P AC E N E B A L AR G
F BA C [ 1: ] _ MD 3 0 F BA C 3 1: ] 15 _ MD [ 0
FB C D _ 38 FB C D _ 39 FB C D _ 40 FB C D _ 41 FB C D _ 42 FB C D _ 43 FB C D _ 44 FB C D _ 45 FB C D _ 46 FB C D _ 47 FB C D _ 48 FB C D _ 49 FB C D _ 50 FB C D _ 51 FB C D _ 52 FB C D _ 53 FB C D _ 54 FB C D _ 55 FB C D _ 56 FB C D _ 57 FB C D _ 58 FB C _ FB C _ FB C _ FB C _ FB C _ D 59 D 60 D 61 D 62 D 63
F BC _C M [ 31: 0] D F B _C M [ 31: 0] 16 C D
UN USED NTES
F B _C MD C 1 F B _C MD C 17 F B _C MD C 31
Sheet 14 of 53 VGA Frame Buffer Interface
UNUSE NTES D
F B D0 B _CM F B D1 B _CM F B D2 B _CM F B D3 B _CM F B D4 B _CM F B D5 B _CM F B D6 B _CM F B D7 B _CM F B D8 B _CM F B D9 B _CM F B D 10 B _CM F B D 11 B _CM F B D 12 B _CM F B D 13 B _CM F B D 14 B _CM F B D 15 B _CM F B D 16 B _CM F B D 17 B _CM F B D 18 B _CM F B D 19 B _CM F B D 20 B _CM F B D 21 B _CM F B D 22 B _CM F B D 23 B _CM F B D 24 B _CM F B D 25 B _CM F B D 26 B _CM F B D 27 B _CM F B D 28 B _CM F B D 29 B _CM F B D 30 B _CM F B D 31 B _CM
F1 8 E 9 1 D 18 C 17 F1 9 C 19 B 7 1 E 0 2 B 9 1 D 20 A 9 1 D 19 C 20 F2 0 B 0 2 G21 F2 2 F2 4 F2 3 C 25 C 23 F2 1 E 2 2 D 21 A 3 2 D 22 B 3 2 C 22 B 2 2 A 2 2 A 0 2 G20
F B _C M 0 C D F B _C M 1 C D F B _C M 2 C D F B _C M 3 C D F B _C M 4 C D F B _C M 5 C D F B _C M 6 C D F B _C M 7 C D F B _C M 8 C D F B _C M 9 C D F B _C M 10 C D F B _C M 11 C D F B _C M 12 C D F B _C M 13 C D F B _C M 14 C D F B _C M 15 C D F B _C M 16 C D F B _C M 17 C D F B _C M 18 C D F B _C M 19 C D F B _C M 20 C D F B _C M 21 C D F B _C M 22 C D F B _C M 23 C D F B _C M 24 C D F B _C M 25 C D F B _C M 26 C D F B _C M 27 C D F B _C M 28 C D F B _C M 29 C D F B _C M 30 C D F B _C M 31 C D
FB A C 11 _ MD FB A C 12 _ MD FB A C 13 _ MD FB A C 14 _ MD FB A C 15 _ MD FB A C 16 _ MD FB A C 17 _ MD FB A C 18 _ MD FB A C 19 _ MD FB A C 20 _ MD FB A C 21 _ MD FB A C 22 _ MD FB A C 23 _ MD FB A C 24 _ MD FB A C 25 _ MD FB A C 26 _ MD FB A C 27 _ MD FB A C 28 _ MD FB A C 29 _ MD FB A C 30 _ MD FB A C 31 _ MD FB A C 0 _ LK FB A C 0# _ LK FB A C 1 _ LK FB A C 1# _ LK
FB A D T_L _O FB A D T_H _O FB A S T# _R FB A K E_L _C FB A K E_H _C
F B _C M 0 C D
F B _D 0 B QM F B _D 1 B QM F B _D 2 B QM F B _D 3 B QM F B _D 4 B QM F B _D 5 B QM F B _D 6 B QM F B _D 7 B QM
F A QM B _D 0 F A QM B _D 1 F A QM B _D 2 F A QM B _D 3 F A QM B _D 4 F A QM B _D 5 F A QM B _D 6 F A QM B _D 7
R 412 F B _C M 19 R 407 C D F B _C M 20 R 71 C D F B _C M 3 C D R 64 F B _C M 16 R 408 C D
10K 04 _ 10K 04 _ 10K 04 _ 10K 04 _ 10K 04 _
F B _D _WP B QS 0 F B _D _WP B QS 1 F B _D _WP B QS 2 F B _D _WP B QS 3 F B _D _WP B QS 4 F B _D _WP B QS 5 F B _D _WP B QS 6 F B _D _WP B QS 7
F A QS P 0 B _D _W F A QS P 1 B _D _W F A QS P 2 B _D _W F A QS P 3 B _D _W F A QS P 4 B _D _W F A QS P 5 B _D _W F A QS P 6 B _D _W F A QS P 7 B _D _W
FB D A QS_W P 2 FB D A QS_W P N 31 3 FB D A QS_W P AE 31 4 FB D A QS_W P AJ 32 5 FB D A QS_W P AJ 34 6 FB D A QS_W P A C 33 7 15 FB A Q _R N 7: 0] D S [ FB D A QS_R N [ 7: ] 0 FB D A QS_R N 0 FB D A QS_R N 1 FB D A QS_R N 2 L 35 G35 H 31
F A QS N 0 B _D _R F A QS N 1 B _D _R F A QS N 2 B _D _R F A QS N 3 B _D _R F A QS N 4 B _D _R F A QS N 5 B _D _R F A QS N 6 B _D _R F A QS N 7 B _D _R F A CK B _W 0 F A CK B _W 0 F A CK B _W 1 F A CK B _W 1 F A CK B _W 2 F A CK B _W 2 F A CK B _W 3 F A CK B _W 3
F B _D _R B QS N0 F B _D _R B QS N1 F B _D _R B QS N2 F B _D _R B QS N3 F B _D _R B QS N4 F B _D _R B QS N5 F B _D _R B QS N6 F B _D _R B QS N7
FB _C L 0 B K FB _C L 0 B K FB _C L 1 B K FB _C L 1 B K
E 7 1 D 17 D 23 E 3 2
F B _C LK C 0 F B _C LK C 0# F B _C LK C 1 F B _C LK C 1#
FB _C LK 0 16 C FB _C LK 0# 1 6 C FB _C LK 1 16 C FB _C LK 1# 1 6 C
FB D A QS_R N 3 N 32 FB D A QS_R N 4 A D 32 FB D A QS_R N 5 AJ 31 FB D A QS_R N 6 AJ 35 FB D A QS_R N 7 A C 34 P 29 R 29 L 29 M29 A G29 A H 29 A D 29 AE 29
G14 F A E B G0_C S B _D U A2 F A E U1 B _D B G T30 T29 F B _D E U G 0 A B F B _D E U G 1 A B R 77 R 585 *60. 4_ 04 *10K _04 F B DDQ V G15 G11 G12 G27 G28 G24 G25 P C N AR B A LS LA E E L P LAC E N E R B G C LOSE TO C A S A A P P E _V D D X L7 F B _WC 0 B K F B _WC 0 B K F B _WC 1 B K F B _WC 1 B K F B _WC 2 B K F B _WC 2 B K F B _WC 3 B K F B _WC 3 B K F B E UG A 2 B _D B 0_C S F B _D B G1 B E U
G19 G16
FBC _D E U G B 0 FBC _D E U G B 1
R 65 R 4 58
*60 . _04 4 *10 K _04
F B V DD Q
F B LLA D _D V D FB LLA D _P V D G 21X T RF U RF U G 108 F FB_ V E _TP J 27 R F F _V E _N B RF C G 21X T F _V E B R F G 08 F1 J1J1 9 8 F B LLA D _D V D FB LLA D _P V D
AG27 AF 27
16 m il
FB A LLA D D _P V _GP U C 119 0. 1u _16V _Y V 5 _04 C 125 1 0u_6. 3V _X _06 5R
.H C B10 05KF -121T2 0

C 1 12 1u_10V _06 FB A L_P _V D _C D D Q M 27 L 27 K 27 F B A _P _V D Q _C L D D F B A _P _GN _C L U D R 72 R 76 4 0. _1%_04 2 F B DDQ V 4 0. _1%_04 2 6 0. _1%_04 4
1 0V_ C99 5 u_1 06 070

F _C A U D B L_P _GN P E _V D D X L6 1 F _CA E M D B L_T R _GN
F B A _TE M_G N R _C L R D 73
.*H C B10 05KF - 121T20

C 1175 0. 1u _16V _Y V 5 _04 C 11 77 1 0u_6. 3V _X _06 5R C 76 11 1u_10V _06
1 3, 9 P E _V D D 3 X 15 , 6, 0 F B D Q 1 4 V D
1 0V_ C99 5 u_1 06 070

P C N AR B A LS LA E E L P LAC E N E R B G C LOSE TO C A S A A P
VGA Frame Buffer Interface B - 15
Schematic Diagrams
VGA Frame Buffer A

FB V D Q D
Frame Buffer Partition A
FB A C M [ 31 : ] _ D 0 14 FB A _C MD 3 1: 0] [ F B _D [ 63: 0 ] A 14 F BA _D [ 63 0 ] : F B D QM 7 : ] A [ 0 F B D QS_W P[ 7 0 ] A : 1 4 FB A QS _WP [ 7: 0] D F B D QS_R N [ 7: 0] A 1 4 FB A Q S _R N [ 7: 0] D 1u _6. 3V _Y 5V _0 4 1u _6. 3V _Y 5V _0 4 1 u_6 . 3V Y 5V _04 _ 1 u_6 . 3V Y 5V_ 04 _ C 589 C 1 91 C 182 C 1 72
14 F B D Q M[ 0 ] A 7:
X5R->Y 5V C99070 3
FB VD D Q FB V D Q D
F B DDQ V
F BV D D Q
C 571
C 2 01
C 20 2
C 57 8
C 594
C 583
C 599
C 16 6
C 167
C 5 76
C 59 8
C 19 4
C 185
C 200
C 69 1
C 5 91
C 59 6
C 592
C 95 5
C 1 68
C 17 6
C 16 4
C 162
C 582
C 99 1
C 19 2
C 590
C 597
C 59 1
C 1 55
C 15 1
C 575
0. 1u _16 V_ Y V 04 5 _ 0 . u_1 6V _Y 5V _04 1 0. 1u _16 V Y5 V_ 04 _ 1u_ 6. 3V _Y 5V _04 0 . 1u_ 16V _Y 5V _04 0. 1 u_1 6V Y 5V _04 _ 1u_ 6. 3V _Y 5V _0 4 1u _6. 3 V 5 V_ 04 _Y
0. 1u _16 V Y V_ 04 _ 5 0 . u_1 6V _Y 5V _04 1 0. 1u _16 V_ Y V 04 5 _ 1u_ 6. 3V _Y 5V _04 0 . 1u_1 6V _Y 5V _04 0. 1 u_1 6V_ Y 5V 04 _ 1u_ 6. 3V _Y 5V _04 1 u_6 . 3V_ Y 5V _04
0 . u_1 6V _Y 5V _04 1 0. 1u_ 16V _Y 5V _0 4 0 . u_1 6V _Y 5V _04 1 1u _6. 3V _Y 5V _0 4 0. 1u_ 16V _Y 5 V 4 _0 0 . 1u_ 16V _Y 5V _04 1u _6. 3 V 5 V 04 _Y _ 1u_ 6. 3V _Y 5V _0 4
0. 1u_ 16V _Y 5V _0 4 0. 1u _16 V Y V_ 04 _ 5 0. 1u_ 16V _Y 5V _0 4 1 u_6 . V Y5 V_ 04 3 _ 0. 1 u_16 V Y 5V 04 _ _ 0. 1u _16V _Y 5 V_0 4 1 u_6 . 3V Y 5V _04 _ 1u_ 6. 3V _Y 5V _04
X5R>Y5V C990 703
X5R>Y5V C990 MI RR O MODE C OMMA ND MAP PI NG 703 R

G 2x G T1 F108 C 0 CD MD M 3 0- 1 32-6 3 3 CE K A8 A 8 C 0* S A7 A6 A2 A1 A11 A9 A5 A4 A0 A 12 CS CA A* S* BA A 1 3 A9 A11 C S0* BA BA 0 0 BA A1 2 5 A3 BA 1 C S1* O T D A 4 A5 A 1 A14 3 U8
X5R>Y5V C990 703
X5R->Y 5V C99070 3
U7 F BV D D Q F B _CMD11 A J3 K3 L3 L2 RA S CA S WE CS V DD V DD V DD V DD V DD V DD V DD V DD V DD V DDQ V DDQ V DDQ V DDQ V DDQ V DDQ V DDQ V DDQ V DDQ B 2 D 9 G 7 K 2 K 8 N 1 N 9 R 1 R 9 A 1 A 8 C 1 C 9 D 2 E 9 F1 H 2 H 9 F BA _CMD11 F B A MD 15 _C F B A MD 28 _C F B A MD 2 _C J3 K 3 L3 L2
U 39 FB VD D Q B2 R S A C S A WE C S V D D V D D V D D V D D V D D V D D V D D V D D V D D V DQ D V DQ D V DQ D V DQ D V DQ D V DQ D V DQ D V DQ D V DQ D D9 G7 K2 K8 N1 N9 R1 R9 A1 A8 C1 C9 D2 E9 F1 H2 H9
F B _C MD 15 A F B _C MD 28 A F B _C MD 2 A
F B _C MD 7 A F B _C MD 10 A F B _C MD 24 A F B _C MD 6 A
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A 10 A 11 A 12 A 13
F B A MD 7 _C F B A MD 10 _C F B A MD 24 _C F B A MD 6 _C F B A MD 22 _C F B A MD 26 _C F B A MD 5 _C F B A MD 21 _C F B A MD 8 _C F B A MD 4 _C F B A MD 25 _C F B A MD 23 _C F B A MD 9 _C F B A MD 12 _C
N3 P 7 P 3 N2 P 8 P 2 R8 R2 T8 R3 L7 R7 N7 T3 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13
Sheet 15 of 53 VGA Frame Buffer A

14 14 FB A_ C K L 0 FB A_ C K # L 0
F B _C MD 22 A F B _C MD 26 A F B _C MD 5 A F B _C MD 21 A F B _C MD 8 A F B _C MD 4 A F B _C MD 25 A F B _C MD 23 A F B _C MD 9 A F B _C MD 12 A
C 1 MD C 2 MD C 3 MD C 4 MD C 5 MD C 6 MD C 7 MD C 8 MD C 9 MD C 1 MD 0 C 1 MD C 1 MD 2 C 1 MD 3 C 1 MD 4 C 1 MD 5 C 1 MD 6 C 1 MD 7 C 1 MD 8 C 1 MD 9 C 2 MD 0 C 2 MD 1 C 2 MD C 2 MD 3 C 2 MD 4 C 2 MD 5 C 2 MD 6 C 2 MD 7
CD M8 CD M2 CD M 21 CD M 24 CD M 23 CD M 26 CD M7 CD M 15 CD M 13 CD M4 CD M 18 CD M 29 CD M 27 CD M6 CD M 17 CD M 19 CD M 22 CD M 12
U3 8 FB V D Q D F B DD V Q FB A C M 1 1 _ D FB A C M 1 5 _ D FB A C M 2 5 _ D FB A C M 1 8 _ D J3 K 3 L3 L2 RA S CA S WE CS VD D VD D VD D VD D VD D VD D VD D VD D VD D VD Q D VD Q D VD Q D VD Q D VD Q D VD Q D VD Q D VD Q D VD Q D B2 D9 G7 K2 K8 N1 N9 R1 R9 A1 A8 C1 C9 D2 E9 F1 H2 H9
F B _C MD 11 A F B _C MD 15 A F B _C MD 25 A F B _C MD 18 A
J3 K3 L3 L2 RA S CA S WE CS V DD V DD V DD V DD V DD V DD V DD V DD V DD V DQ D V DQ D V DQ D V DQ D V DQ D V DQ D V DQ D V DQ D V DQ D
B2 D9 G7 K2 K8 N1 N9 R1 R9 A1 A8 C1 C9 D2 E9 F1 H2 H9
F B _C MD 9 A F B _C MD 24 A F B _C MD 10 A F B _C MD 13 A F B _C MD 26 A F B _C MD 22 A F B _C MD 21 A F B _C MD 5 A F B _C MD 8 A F B _C MD 23 A F B _C MD 28 A F B _C MD 4 A F B _C MD 7 A F B _C MD 14 A
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A 10 A 11 A 12 A 13
FB A C M 9 _ D FB A C M 2 4 _ D FB A C M 1 0 _ D FB A C M 1 3 _ D FB A C M 2 6 _ D FB A C M 2 2 _ D FB A C M 2 1 _ D FB A _ FB A _ FB A _ FB A _ FB A _ FB A _ FB A _ CM 5 D CM 8 D CM 2 3 D CM 2 8 D CM 4 D CM 7 D CM 1 4 D
N3 P 7 P 3 N2 P 8 P 2 R8 R2 T8 R3 L7 R7 N7 T3 A 0 A 1 A 2 A 3 A 4 A 5 A 6 A 7 A 8 A 9 A 0 1 A 1 1 A 2 1 A 3 1
C D WE A M 28 * 10 C D A 1 A2 M 10 C D A 1 WE M 25 0 * C D A12 A0 M9 C D C 1* M1 S C D R A R S* M 11 S* A C D OD M0 T C D A6 A7 M5 CD M 16 C KE CD RS RT M 20 T S C D A 1 A13 M 14 4 C D A 1 BA M 30 5 2 C M 31 D
M2 N8 M3 B A0 B A1 B A2 V S S V S S V S S V S S V S S V S S V S S V S S V S S V S S V S S V S S V SQ S V SQ S V SQ S V SQ S V SQ S R E SE T V SQ S V SQ S V SQ S V SQ S ZQ A 9 B 3 E 1 G 8 J2 J8 M 1 M 9 P 1 P 9 T1 T9 B 1 B 9 D 1 D 8 E 2 E 8 F9 G 1 G 9 R 139 FB V D Q D FB A C LK _ 0
F B A MD 29 _C F B A MD 13 _C F B A MD 27 _C
M2 N8 M3 BA 0 BA 1 BA 2 V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS VS Q S VS Q S VS Q S VS Q S VS Q S R S ET E VS Q S VS Q S VS Q S VS Q S ZQ A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 B1 B9 D1 D8 E2 E8 F9 G1 G9
C 2 MD 8 C 2 MD 9 C 3 MD 0 NA /
M2 N8 M3 BA0 BA1 BA2 VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S VS S V SS Q V SS Q V SS Q V SS Q V SS Q RE S T E V SS Q V SS Q V SS Q V SS Q ZQ A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 B1 B9 D1 D8 E2 E8 F9 G1 G9 R 145 F B DD V Q FB A _C LK 1
FB A C M 2 9 _ D FB A C M 6 _ D FB A C M 3 0 _ D
M2 N8 M3 B 0 A B 1 A B 2 A V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS V SS V S SQ V S SQ V S SQ V S SQ V S SQ RE E S T V S SQ V S SQ V S SQ V S SQ ZQ A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 B1 B9 D1 D8 E2 E8 F9 G1 G9
F B _C MD 3 A F B _C LK 0 A F B _C LK 0# A
K9 J7 K7
CK E CK CK
F B A MD 3 _C F B A L K0 _C F B A L K0 # _C
K 9 J7 K 7
C E K C K C K
F B _C MD 16 A F B _C LK 1 A 14 14 FB A _C LK 1 FB A _C LK 1# F B _C LK 1# A
K9 J7 K7
CK E CK CK
FB A C M 1 6 _ D FB A C LK _ 1 FB A C LK # _ 1
K 9 J7 K 7
CK E CK CK
J1 J9 L1 L9 M7 T7
NC1 NC2 NC3 NC4 NC5 NC6
R 24 1 160 _1%_ 04 FB A C LK # _ 0
J1 J9 L1 L9 M7 T7
N 1 C N 2 C N 3 C N 4 C N 5 C N 6 C
J1 J9 L1 L9 M7 T7
R 123 160 _1% _04 FB A _C LK 1#
J1 J9 L1 L9 M7 T7
F B _C MD 20 A F B _C MD 0 A F B _Z Q A 0
T2 K1 OD T L8
F B A MD 20 _C F B A MD 0 _C F B A Q1 _Z
T2 K 1 O T D L8
F B _C MD 20 A F B _C MD 19 A F B _Z Q 2 A
T2 K1 OD T L8
FB A C M 2 0 _ D FB A C M 1 9 _ D FB A ZQ 3 _
T2 K 1 OD T L8
16m il <50 0mil

V RE DQ F V RE CA F H 1 M 8 FB A _V E F0 R C 18 4
1. 1K _1%_ 04 R 138 V E FD Q R V E FC A R 243 _1% _04 R 133 H1 M8
16mil <500mi l
F B _V R E 0 A F R 135 243 _1%_ 04
16mi l <500 mil

V RE DQ F VR E FC A H1 M8 F B _V R F 1 A E C 1 95
1. 1K _1 %_04 R 43 6 VR E FD Q VR FC E A 24 3_1 %_04 R 143 H1 M8
1 6mil < 500mil

F B _V R E 1 A F
R 1 32 2 43_ 1%_0 4
0 . 1u_ 16V _X R _04 0 7 1. 1K _1%_ 04
0 . 01u _16V _X 7R _0 4 1. 1K _1 %_04
FB A D 12 _ FB A D 9 _ FB A D 14 _ FB A D 8 _ FB A D 13 _ FB A D 10 _ FB A D 15 _ FB A D 11 _
E3 F7 F2 F8 H3 H8 G2 H7
D Q L0 D Q L1 D Q L2 D Q L3 D Q L4 D Q L5 D Q L6 D Q L7
D U0 Q D U1 Q D U2 Q D U3 Q D U4 Q D U5 Q D U6 Q D U7 Q
D 7 C 3 C 8 C 2 A 7 A 2 B 8 A 3
FB A _D 22 FB A _D 19 FB A _D 20 FB A _D 17 FB A _D 21 FB A _D 18 FB A _D 23 FB A _D 16
F BA _D 29 F BA _D 28 F BA _D 30 F BA _D 25 F BA _D 26 F BA _D 27 F BA _D 31 F BA _D 24
E 3 F7 F2 F8 H3 H8 G2 H7
D QL D QL D QL D QL D QL D QL D QL D QL
0 1 2 3 4 5 6 7
D QU 0 D QU 1 D QU 2 D QU 3 D QU 4 D QU 5 D QU 6 D QU 7
D7 C3 C8 C2 A7 A2 B8 A3
E3 F7 F2 F8 H3 H8 G2 H7
DQ 0 U DQ 1 U DQ 2 U DQ 3 U DQ 4 U DQ 5 U DQ 6 U DQ 7 U
D7 C3 C8 C2 A7 A2 B8 A3
F B _D 56 A F B _D 59 A F B _D 58 A F B _D 62 A F B _D 61 A F B _D 57 A F B _D 60 A F B _D 63 A
F BA _D 45 F BA _D 47 F BA _D 42 F BA _D 46 F BA _D 43 F BA _D 44 F BA _D 40 F BA _D 41
E 3 F7 F2 F8 H3 H8 G2 H7
DQU 0 DQU 1 DQU 2 DQU 3 DQU 4 DQU 5 DQU 6 DQU 7
D7 C3 C8 C2 A7 A2 B8 A3
FBA D 1 _ 5 FBA D 2 _ 5 FBA D 8 _ 4 FBA D 4 _ 5 FBA D 9 _ 4 FBA D 5 _ 5 FBA D 0 _ 5 FBA D 3 _ 5
E7 FB A Q M1 D FB A Q S _WP 1 F 3 D FB A Q S _R N 1 G 3 D
D ML D Q SL D Q SL
D MU D QS U D QS U
D 3 C 7 B 7
F B D QM A 2 F B D QS_ WP 2 A F B D QS_ R 2 A N
F BA D Q M3 F BA D Q _W P S 3
E 7 F3
D ML D L QS D L QS
D MU DQ U S DQ U S
D3 C7 B7
FB A D M0 Q FB A D S _W P Q 0 FB A D S _R N 0 Q
E7 FB A D QM4 FB A D _W P F 3 QS 4 FB A D _R N 4 G 3 QS
D ML DQS L DQS L
D MU D SU Q D SU Q
D3 C7 B7
F B AD Q M7 F B AD Q S_ WP 7 F B AD Q S_ R N 7
E 7 F BA D Q M5 F BA D Q S WP 5 F3 _ F BA D Q S R 5 G 3 _ N
D ML D QS L D QS L
D MU D Q SU D Q SU
D3 C7 B7
F B A Q M6 D F B A Q S _WP 6 D F B A Q S _R N 6 D
F BA D Q _R N 3 G3 S
K4 W1G1 646 E H C 11 -
K 4W 1G 164 6E - C 11 H
K 4W1 G 1646 E C 11 -H
K 4W 1G 16 46E -H 1 1 C
1 4, 16, 40 F B VD D Q
B - 16 VGA Frame Buffer A
Schematic Diagrams
VGA Frame Buffer C

1 4 FB C _C MD [ 1: 0] 3 FB C _C MD [ 31: 0 ] F B C D [ 63: 0] _ 14 F BC _D [ 63 : 0] F B C QM[ 7: 0] D 14 F BC D QM[ 7: 0] 14 F B C QS _W P 7: 0] D [ 14 F B C QS _R N [ 7: 0] D F B C QS _W P 7: 0 ] D [ F B C QS _R N [ 7: 0] D
Frame Buffer Partition C
F BV D D Q
F B V DQ D
F B VD D Q
FB V D Q D
C 557
C 531
C 558
C 55 4
C 13 0
C 5 35
C 1 40
C 5 19
C 27
C 5 26
C 5 24
C 523
C 48
C 517
C 1 36
C 13 4
C 1 33
C 5 21
C 5 5
C 123
C 102
C6 0
C 1 08
C 1 11
C 30 5
C 553
C 534
C 55 6
0. 1u _16 V Y 5V _04 _ 0. 1u _16 V Y 5V _04 _ 0. 1 u_1 6V _Y 5V _0 4 1 u_6 . 3V _Y 5V _04 0. 1u _16 V_ Y V_ 04 5 0. 1 u_1 6V _Y 5V _04 1 u_6 . V_ Y 5V _04 3
0 . 1u_ 16V _Y 5V _0 4 0 . 1u_ 16V _Y 5V _0 4 0. 1u_ 16 V 5 V 04 _Y _ 1u _6. 3V _Y 5 V 04 _ 0 . u_1 6V _Y 5V _0 4 1 0 . 1u_ 16V _Y 5 V_ 04 1u_ 6. 3V _Y 5V _0 4
0 1 u_ 16V _Y 5V _0 4 . 0 . u_1 6V _Y 5V _0 4 1 0. 1u_ 16V _Y 5 V 04 _ 1u _6. 3V _Y 5 V_ 04 0. 1 u_1 6V _Y 5V _0 4 0 . 1u_ 16V _Y 5V _0 4 1u_ 6. 3V _Y 5V _0 4
0 . 1u_ 16V _Y 5 V_ 04 0 . 1u_ 16V _Y 5 V 4 _0 0. 1u _16 V Y V_ 04 _ 5 1u _6. 3 V 5 V 04 _Y _ 0 . u_ 16V _Y 5V _0 4 1 0. 1u_ 16V _Y 5 V 04 _ 1u _6. 3V _Y 5 V_ 04
X5 R->Y5V C9 90703
X5R->Y 5V C99070 3
X5R-> Y5V C9907 03
X5R>Y5V C990 703
U3 F B V DQ D F C_CMD11 B FB C _C MD 15 FB C _C MD 28 FB C _C MD 2 J3 K3 L3 L2 RA S CA S WE CS VD D VD D VD D VD D VD D FB C _C MD 7 FB C _C MD 10 FB C _C MD 24 FB C _C MD 6 FB C _C MD 22 FB C _C MD 26 FB C _C MD 5 FB C _C MD 21 FB C _C MD 8 FB C _C MD 4 FB C _C MD 25 FB C _C MD 23 FB C _C MD 9 FB C _C MD 12 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A 10 A 11 A 12 A 13 FB C _C MD 29 FB C _C MD 13 FB C _C MD 27 M2 N8 M3 BA0 BA1 BA2 FB C _C MD 3 FB C _C LK 0 14 14 FB C _C LK 0 FB C _C LK 0# FB C _C LK 0# K9 J7 K7 CK E CK CK A9 VSS VSS VSS VSS VSS VSS VSS VSS J1 J9 L1 L9 M7 T7 NC1 NC2 NC3 NC4 NC5 NC6 VSS VSS VSS VSS B1 V SQ S V SQ S V SQ S V SQ S FB C _C MD 20 FB C _C MD 0 FB C _Z Q0 T2 RE S T E K1 OD T L8 ZQ V SQ S V SQ S V SQ S V SQ S V SQ S B9 D 1 D 8 E2 E8 F9 G 1 G 9 R4 7 F B C ZQ1 _ L8 F B DDQ V F B C C MD 0 _ 2 F B C C MD _ 0 T2 F B _ C LK0 # C B3 E1 G 8 J2 J8 M 1 M 9 P1 P9 T1 T9 1 60_ 1%_ 04 R3 1 F B _ C LK0 C J1 J9 L1 L9 M7 T7 F B C C MD _ 3 F B C C LK 0 _ F B C C LK 0# _ K9 J7 K7 F B C C MD 9 _ 2 F B C C MD 3 _ 1 F B C C MD 7 _ 2 M2 N8 M3 VD D VD D VD D VD D A1 V DD Q V DD Q V DD Q V DD Q V DD Q V DD Q V DD Q V DD Q V DD Q A8 C 1 C 9 D 2 E9 F1 H 2 H 9 B2 D 9 G 7 K2 K8 N 1 N 9 R 1 R 9 F B C C MD _ 7 F B C C MD 0 _ 1 F B C C MD 4 _ 2 F B C C MD _ 6 F B C C MD 2 _ 2 F B C C MD 6 _ 2 F B C C MD _ 5 F B C C MD 1 _ 2 F B C C MD _ 8 F B C C MD _ 4 F B C C MD 5 _ 2 F B C C MD 3 _ 2 F B C C MD _ 9 F B C C MD 2 _ 1 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 F B C CMD 1 _ 1 F B C C MD 5 _ 1 F B C C MD 8 _ 2 F B C C MD _ 2 J3 K3 L3 L2
U 34 F B DDQ V B2 RA S CA S WE CS VD D VD D VD D VD D VD D A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A 10 A 11 A 12 A 13 F BC _ C 2 9 MD F BC _ C 6 MD F BC _ C 3 0 MD M2 N8 M3 VD D VD D VD D VD D A1 VD D Q VD D Q VD D Q VD D Q VD D Q VD D Q VD D Q VD D Q VD D Q A8 C1 C9 D2 E9 F1 H2 H9 D9 G7 K2 K8 N1 N9 R1 R9 F BC _ C 9 MD F BC _ C 2 4 MD F BC _ C 1 0 MD F BC _ C 1 3 MD F BC _ C 2 6 MD F BC _ C 2 2 MD F BC _ C 2 1 MD F BC _ C 5 MD F BC _ C 8 MD F BC _ C 2 3 MD F BC _ C 2 8 MD F BC _ C 4 MD F BC _ C 7 MD F BC _ C 1 4 MD N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 F BC _ C 1 1 MD F BC _ C 1 5 MD F BC _ C 2 5 MD F BC _ C 1 8 MD J3 K3 L3 L2
U5 F BV D D Q B2 R AS C AS WE CS V DD V DD V DD V DD V DD A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A1 0 A1 1 A1 2 A1 3 FB C _C MD 29 FB C _C MD 6 FB C _C MD 30 M2 N8 M3 V DD V DD V DD V DD A1 V DQ D V DQ D V DQ D V DQ D V DQ D V DQ D V DQ D V DQ D V DQ D A8 C1 C9 D2 E9 F1 H2 H9 D9 G7 K2 K8 N1 N9 R1 R9 FB C _C MD 9 FB C _C MD 24 FB C _C MD 10 FB C _C MD 13 FB C _C MD 26 FB C _C MD 22 FB C _C MD 21 FB C _C MD 5 FB C _C MD 8 FB C _C MD 23 FB C _C MD 28 FB C _C MD 4 FB C _C MD 7 FB C _C MD 14 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 FB C _C MD 11 FB C _C MD 15 FB C _C MD 25 FB C _C MD 18 J3 K3 L3 L2
U 37
FB V D Q D B2 R S A C S A WE C S V DD V DD V DD V DD V DD A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A1 0 A1 1 A1 2 A1 3 V DD V DD V DD V DD A1 V DDQ V DDQ V DDQ V DDQ V DDQ V DDQ V DDQ V DDQ V DDQ A8 C1 C9 D2 E9 F1 H2 H9 D9 G7 K2 K8 N1 N9 R1 R9
Sheet 16 of 53 VGA Frame Buffer C
BA 0 BA 1 BA 2
A9 VSS VSS B3 E1 V S S G8 VSS J2 VSS J8 V S S M1 VSS M9 VSS P1 VSS P9 VSS T1 VSS T9 VSS B1 V S SQ V S SQ V S SQ V S SQ V S SQ B9 D1 D8 E2 E8 F9 G1 G9
BA 0 BA 1 BA 2
A9 VS S VS S VS S VS S B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 R 88 FB C _C LK 1
BA 0 BA 1 BA 2
A9 V S S V S S V S S V S S B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 B1 V SQ S V SQ S V SQ S V SQ S B9 D1 D8 E2 E8 F9 G1 G9
F BC _ C 1 6 MD F BC _ C K L 1 14 14 F B _ C LK1 C F B _ C LK1 # C F BC _ C K # L 1
K9 J7 K7 C KE CK CK
FB C _C MD 16 FB C _C L K 1 FB C _C L K 1#
K9 J7 K7 C E K C K C K
CK E CK CK
VS S VS S VS S VS S VS S
V S S V S S V S S V S S V S S
J1 J9 L1 L9 M7 T7 NC1 NC2 NC3 NC4 NC5 NC6
J1 J9 L1 16 0_1 %_0 4 L9 M7 T7 N 1 C N 2 C N 3 C N 4 C N 5 C N 6 C
VS S VS S VS S
V S S V S S V S S
B1 VS Q S VS Q S VS Q S VS Q S B9 D1 D8 E2 E8 F9 G1 G9 FB V D Q D FB C _C MD 20 FB C _C MD 19 FB C _C LK 1#
F BC _ C 2 0 MD F BC _ C 1 9 MD F BC _ ZQ2
T2 R ES ET K1 OD T L8 ZQ
VS Q S VS Q S VS Q S VS Q S VS Q S
T2 R S ET E K1 O T D L8 ZQ
V SQ S V SQ S V SQ S V SQ S V SQ S
RE S T E K1 OD T ZQ 1 . K_ 1%_ 04 1 R 395 24 3_1 %_04 R 3 97 0 . 01u _16 V X7R _ 04 _ 1 . K_ 1%_ 04 1
V S SQ V S SQ V S SQ V S SQ
R 59 24 3_1 %_0 4
H 1 V EFD R Q V RE CA F M 8
16mil <500mi l
F BC _V R E F0 C3 9
H1 V E FD Q R V R F CA E M8
16mil <500mil
FB C _V R EF 0 R 9 7 243 _1%_ 04
16mil <500mil 1. 1K _1 %_04

H1 FB C _V R F 1 E C 12 6 R 414 0. 01 u_ 16V _X7 R _04 1. 1K _1 %_04 M8
R 413
FB C _Z Q3
16mil <500mi l
H1 F BC _ V E F1 R M8
V RE DQ F VR E FC A
R 4 15 2 43_ 1%_ 04
V RE DQ F V RE CA F
F B C D 15 _ F B C D9 _ F B C D 12 _ F B C D 10 _ F B C D 14 _ F B C D8 _ F B C D 13 _ F B C D 11 _
E3 F7 F2 F8 H3 H8 G2 H7 D QL0 D QL1 D QL2 D QL3 D QL4 D QL5 D QL6 D QL7 D QU 0 D QU 1 D QU 2 D QU 3 D QU 4 D QU 5 D QU 6 D QU 7
D 7 C 3 C 8 C 2 A7 A2 B8 A3
F BC _D 2 0 F BC _D 2 1 F BC _D 2 3 F BC _D 1 9 F BC _D 1 8 F BC _D 1 7 F BC _D 2 2 F BC _D 1 6
FB _D 8 C 2 FB _D 6 C 2 FB _D 9 C 2 FB _D 7 C 2 FB _D 0 C 3 FB _D 4 C 2 FB _D 1 C 3 FB _D 5 C 2
D7 C3 C8 C2 A7 A2 B8 A3
F B C _D 3 F B C _D 7 F B C _D 0 F B C _D 6 F B C _D 1 F B C _D 4 F B C _D 2 F B C _D 5
FB C _D 37 FB C _D 35 FB C _D 36 FB C _D 34 FB C _D 39 FB C _D 33 FB C _D 38 FB C _D 32
D7 C3 C8 C2 A7 A2 B8 A3
F B C _D 59 F B C _D 62 F B C _D 57 F B C _D 61 F B C _D 58 F B C _D 63 F B C _D 56 F B C _D 60
FB C _D 44 FB C _D 46 FB C _D 40 FB C _D 45 FB C _D 42 FB C _D 47 FB C _D 41 FB C _D 43
E3 F7 F2 F8 H3 H8 G2 H7 D 0 QL D 1 QL D 2 QL D 3 QL D 4 QL D 5 QL D 6 QL D 7 QL D 0 QU D 1 QU D 2 QU D 3 QU D 4 QU D 5 QU D 6 QU D 7 QU
D7 C3 C8 C2 A7 A2 B8 A3
F BC _ D 49 F BC _ D 53 F BC _ D 48 F BC _ D 54 F BC _ D 51 F BC _ D 55 F BC _ D 50 F BC _ D 52
F B C QM1 D
E7 D ML D QS L D QS L DM U D QSU D QSU
D 3 C 7 B7
F B C QM2 D F B C QS _W P2 D F B C QS _R N 2 D
F B D QM3 C
E7 D ML D QS L D QS L D MU D QSU D QSU
D3 C7 B7
F B CD QM0 F B C D _W P0 QS F B C D _R N 0 QS
FB C D QM4
E7 D ML D QS L D QS L D MU D U QS D U QS
D3 C7 B7
FB C D QM7 FB C D QS WP 7 _ FB C D QS R 7 _ N
FB C D Q M5
E7 D ML D L QS D L QS D MU D QS U D QS U
D3 C7 B7
F BC D QM6 F BC D QS _WP 6 F BC D QS _R N 6
F B C QS _W P1 F 3 D G3 F B C QS _R N 1 D
F B D QS _WP 3 F 3 C G3 F B D QS _R N 3 C
FB C D QS WP 4 F3 _ G3 FB C D QS R 4 _ N
FB C D Q _W P5 F 3 S G3 FB C D Q _R N 5 S
K 4W1 G164 6E H C 11 -
K4 W1G1 646 E H C 11 -
K 4W 1G16 46E -H C 11
K 4W 1G16 46E -H C 1 1
1 4, 15 , 0 FB VD D Q 4
VGA Frame Buffer C B - 17
Schematic Diagrams
VGA I/O
U 36 I U 36 H
BG A973 CO M N M O
3V 3 _R U N U 6O 3
BG 973 A C MMO O N
3V 3 _R U N U 3 6P
B G 973 A C O MO M N
BG A973 C MM N O O
9 1 6 FP / I EF A B A BA2BY33Y 2Y 1 1 MIOB _ D0 NC MIOB _ D1 NC MIOB _ D2 NC MIOB _ D3 NC MIOB _ D4 NC MIOB _ D5 NC MIOB _ D6 NC MIOB _ D7 NC MIOB _ D8 NC MIOB _ D9 NC MIOB 0 _ D1 NC MIOB 1 _ D1 NC MIOB 2 _ D1 NC MIOB 3 _ D1 NC MIOB 4 _ D1 NC DV L I-S HDMI SDA SCL TX C TX C TX D0 TX D0 TX D1 TX D1 TX D2 TX D2 HPDE
8/ 6I P 1 F C A J9 AK 7 IF PL VDD PC_ L IF RS PC_ ET DVI HDMI / SDA SCL TX C TX C TX D0 TX D0 A J8 TX D1 TX D1 IF IO PC_ VDD TX D2 TX D2 IF L PC_ 0 IF L PC_ 0 DP F C_ UX I P A F C_ UX I P A IF L PC_ 3 IF L PC_ 3 IF L PC_ 2 IF L PC_ 2 IF L PC_ 1 IF L PC_ 1 A N3 AP2 C 46 A R2 AP1 A M4 A M3 A M5 A L5 A M6 A M7 N 5 P9 R 9 T9 U 9
T 3 P 3P 2P 1P 4N1
1 /1 MIOA 0 6 MIOA_ DDQ_ N V C MIOA_ DDQ_ N V C MIOA_ DDQ_ N V C MIOA_ DDQ_ N V C
0 . 1 u_ 16 V _Y 5V _ 04 U 5 T5
MIOACA_ P VDDQ_ L D_ NC MIOACA_ P GND_ N L U_ C
MIOAD _ 0 NC MIOAD _ 1 NC MIOAD _ 2 NC MIOAD _ 3 NC MIOAD _ 4 NC MIOAD _ 5 NC MIOAD _ 6 NC MIOAD _ 7 NC MIOAD _ 8 NC MIOAD _ 9 NC MIOA 0 _ D1 NC MIOA 1 _ D1 NC MIOA 2 _ D1 NC MIOA 3 _ D1 NC MIOA 4 _ D1 NC
S DA S CL A C4 A C1 A C2 A C3 AE3 AE2 U6 W6 Y6 T XC T XC T XD0 T XD0 T XD1 T XD1 T XD2 T XD2 HP DE
F _ UX I PE A F _ UX I PE A IFP L E_ 3 IFP L E_ 3 IFP L E_ 2 IFP L E_ 2 IFP L E_ 1 IFP L E_ 1 IFP L E_ 0 IFP L E_ 0 GPI 1 O5
T2 T1 U4 U1 U2 U3 R6 T6 N6
C4 5 0 . 1u _ 16 V _Y 5V _ 04 AA7 AA6
A J6 A L1 R 39 1 10 K _0 4
F F_ L I PE PL VDD F F_ I PE RSE T
MIOB _ P VDDQ_ CAL D_ NC MIOB _ P GND_ CAL U_ NC
MIOA_ REF_ V NC
AF1
MIOB V _ NC _ REF
IF P C
U 36 G
HPDC
GPIO 1
K2
MIOA CT 3 _ _ L NC MIOA HS _ YNC_ NC M OA_ YNC_ I VS NC M OA_ I DE_ NC
P5 N3 L3 N2
MIOB C 3 _ _ TL NC MIOB HS _ YNC_ NC M OB_ YNC_ I VS NC M OB_ I DE_ NC
W3 W1 W2 Y5
AE 7 A D7
F _I I PE OVDD F _I I PF OVDD
SDA SCL TX C TX C T XD3 T XD3 T XD4 T XD4 T XD5 T XD5 TX D0 TX D0 TX D1 TX D1 TX D2 TX D2 HPDF
F _ UX I PF A F _ UX I PF A IFP L F_ 3 IFP L F_ 3 IFP L F_ 2 IFP L F_ 2 IFP L F_ 1 IFP L F_ 1 IFP L F_ 0 IFP L F_ 0 GPI 2 O1 K6
BG A973 CO M N M O
A E 1 4V 4 W
N4T 4R4
5 1 6 FP / I D A C6 A B6 IF PL VDD PD_ L IF RS PD_ ET DVI HDMI / SDA SCL DP F D_ UX I P A F D_ UX I P A IF L PD_ 3 IF L PD_ 3 IF L PD_ 2 IF L PD_ 2 IF L PD_ 1 IF L PD_ 1 IF L PD_ 0 IF L PD_ 0 A N4 AP4 A R4 A R5 AP5 A N5 A N7 AP7 A R7 A R8
MIOA CL K _ OUT_ NC MIOA CL K _ OUT_ NC MIO CL K NC A_ IN_
MIO CL K B_ OUT_ NC MIO CL K B_ OUT_ NC MI B_ KIN_ O CL NC R2 3 1 0K _ 0 4
R 29 10 K _0 4 R1 7 1 0K _ 04
Sheet 17 of 53 VGA I/O

A K8 IF IO PD_ VDD
TX C TX C TX D0 TX D0 TX D1 TX D1 TX D2 TX D2
13 , 3 6, 3 9 d GP U _ P W R _ EN # G
IF P E F
HPDD
GPI 1 O9
L7 R 12 *1 0m li _ sh ort U 2 V GA _ T H E R M_ S H D W N # S MD _V GA _ T H E R M S MC _V GA _ T H E R M 3. 3 V 3 V3 _ R U N R9 R1 0 R 5 26 R 5 27 1 00 K _ 04 1 00 K _ 04 1 0 K _0 4 1 0 K _0 4 R1 1 * 0_ 04 5 6 7 8 GN D T H E R M# A LE R T# DS DA T A D+ S CL K V DD G 78 1P 8 C2 0 0 . 1u _1 6 V _Y 5 V _ 04 R 1 3 0_ 0 4 4 3 2 1
D Q4 1 *2 N 70 0 2W
D Q4 0 *2 N 70 0 2W
S S MC _ V GA _ TH ER M S MD _ V GA _ TH ER M S U 36 L
BG A973 C MM N O O
S MC _V GA _ TH E R M 3 6 S MD _V GA _ TH E R M 3 6
IF P D
7 1 6 FP / I AB LV DS DV I-SL F A_ D0 I P TX F A_ D0 I P TX F A_ D1 I P TX F A_ D1 I P TX F A_ D2 I P TX F A_ D2 I P TX F A_ D3 I P TX F A_ D3 I P TX F AB_ C* I P TX F AB_ C I P TX F _ XC I PA T F _ XC I PA T
V GA _ T H E R MD C V GA _ T H E R MD A
Test Point
F AB_ D0 I P TX * F AB_ D0 I P TX F AB_ D1 I P TX * F AB_ D1 I P TX 33V . AK 9 A J 11 R 39 9 F B_ L I PA PL VDD F B_ I PA RSE T F AB_ D2 I P TX * F AB_ D2 I P TX
U 36 F
BG A973 C MM N O O
R 38 4 2 . 2 K_ 0 4
R 3 83 2. 2 K _0 4
3 V 3_ R U N 10 K _0 4
A J 12 A K 12 A K 13
4 1 DACA /6 DA VDD CA_ DA VRE CA_ F DA RSE CA_ T
I2 _ S CA CL 2 _ I CA SDA
G 1 G 4
S N N _ A _S C L S N N _ A _S D A S NN_ HS Y NC S NN_ V S Y NC S NN_ RE D S N N _ GR E E N S N N _ B LU E 3V 3 _R U N
U 36J
BG A973 CO M O N M
R3 8 1 2 . 2K _ 04
R3 8 2 2 . 2 K _0 4
DACA H _ SYNC A M 13 AL 1 3 D ACA_ SYNC V DA RED A M 15 CA_ DACA G _ REEN A M 14 AL 1 4
VG A _T H E R MD C C2 1 1 0 00 p_ 5 0V _ X7 R _ 04 VG A _T H E R MD A
B4
1 / 6 SC1 21 M I THER DN M
2 _ I CSSCL I2 SDA CS_ I2 SCL CC_ I2 SDA CC_
E2 E1 E3 E4 R2 0 R2 1 2. 2 K _0 4 2. 2 K _0 4 3 V3 _ R U N A G9 A G10 F _I I PA OVDD F _I I PB OVDD
F AB_ D3 I P TX * F AB_ D3 I P TX F AB_ D4 I P TX * F AB_ D4 I P TX F AB_ D5 I P TX * F AB_ D5 I P TX
F B_ D4 I P TX F B_ D4 I P TX F B_ D5 I P TX F B_ D5 I P TX F B_ D6 I P TX F B_ D6 I P TX F B_ D7 I P TX F B_ D7 I P TX F _ XC I PB T F _ XC I PB T
R4 0 6 *1 24 _ 1% _0 4
DA BL CA_ UE
B5
THER DP M R 48 R 35 GP IO2 GP IO3 GP IO4 GP IO5 GP IO6 GP IO7 GP IO8 GP IO9 GP 0 IO1 GP 1 IO1 GP 2 IO1 GP 3 IO1 GP 4 IO1 GP 6 IO1 GP 7 IO1 GP 8 IO1 GP 0 IO2 GP 2 IO2 GP 3 IO2 GP 4 IO2 K3 H3 H2 H1 H4 H5 H6 J7 K4 K5 H7 J4 J6 L2 L4 M4 L5 L6 M6 M7 10 0 K_ 0 4 10 0 K_ 0 4 R 39 6 3 V 3_ R U N 10 K _0 4
U 36 E
BG A973 C MM N O O
R 38 6 2. 2 K _0 4 I2 _ S CB CL 2 _ I CB SDA G 3 G 2
R3 8 5 2 . 2K _ 04
NV V DD_ V ID0 NV V DD_ V ID1 R 36 R 49 A C _ D E T R 45
N V V D D _ V I D 0 44 N V V D D _ V I D 1 44 E C _V GA _ A LE R T# 36
A G7 AK6 A H7 C 52 5 0 . 1 u_ 16 V _ Y 5V _ 0 4
6 1 DACB /6 DA VDD CB_ DA VRE CB_ F DA RSE CB_ T
DACB H _ SYNC A M 1 D ACB_ SYNC A M 2 V DA RED A K 4 CB_ DACB G _ REEN DA BL CB_ UE AL 4 AJ 4 R5 5 1 K _0 4
AP1 4 A R1 4 A N1 4 A N1 6 AP1 6
J T TCK AG_ J T TMS AG_ J T TDI AG_ J T TDO AG_ J T TRS AG_ T
*0_ 0 4 V GA _T H E R M _S H D W N # *0_ 0 4 E C _ VG A _A L E R T# 3 V 3_ R U N 10 K _0 4
IF P A B
3 , 4, 1 2 1 3 , 19 , 20 , 2 1, 2 3, 2 4, 2 6 , 28 , 29 , 3 1, 3 2, 3 3, 3 4 , 37 , 39 , 4 0, 4 1, 4 4 3 . 3 V , 1 3 , 44 3 V3 _ R U N
B - 18 VGA I/O
K1
C99 0710
HPDA B
GPI 0 O
A M8L8 A
DVI-D L
A E4 D4 A
AA9 AB9 W9 Y 9
1 /1 MIOB 1 6 MIOB V _ DDQ_ NC MIOB V _ DDQ_ NC MIOB V _ DDQ_ NC MIOB V _ DDQ_ NC
DVI DL -
DP
Schematic Diagrams
VGA NVVDD Cecoupling

U 36M
BG A 97 3 C M MO N O
1 5 6 GN D /1
AA 11 AA 12 AA 13 AA 14 AA 15 AA 16 AA 17 AA 18 AA 19 AA 2 AA 20 AA 21 AA 22 AA 23 AA 24 AA 25 AA 34 AA 5 AB 12 AB 14 AB 16 AB 18 AB 20 AB 22 AB 24 A C9 A D11 A D13 A D15 A D17 A D2 A D21 A D23 A D25 A D31 A D34 A D5 AE 11 AE 12 AE 13 AE 14 AE 15 AE 16 AE 17 AE 18 AE 19 AE 20 AE 21 AE 22 AE 23 AE 24 AE 25 A G2 A G31 A G34 A G5 AK 2 AK 31 AK 34 AK 5 A L12 A L15 A L18 A L21 A L24 A L27 A L30 A L6 A L9 A N2 A N34 AP 12 AP 15 AP 18 AP 21 AP 24 AP 27 AP 3 AP 30 AP 33 AP 6 AP 9 B 12 B 15 B 21 B 24 B 27 B 3 B 30 B 33 B 6 B 9 C2 C34 E 12
GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D
G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND
E 15 E 18 E 24 E 27 E 30 E 6 E 9 F2 F31 F34 F5 J2 J31 J34 J5 L9 M 11 M 13 M 15 M 17 M 19 M 2 M 21 M 23 M 25 M 31 M 34 M 5 N 11 N 12 N 13 N 14 N 15 N 16 N 17 N 18 N 19 N 20 N 21 N 22 N 23 N 24 N 25 P 12 P 14 P 16 P 18 P 20 P 22 P 24 R 2 R 31 R 34 R 5 T11 T13 T15 T17 T19 T21 T23 T25 U 11 U 12 U 13 U 14 U 15 U 16 U 17 U 18 U 19 U 20 U 21 U 22 U 23 U 24 U 25 V 12 V 14 V 16 V 18 V 2 V 20 V 22 V 24 V 31 V 5 V 9 Y 11 Y 13 Y 15 Y 17 Y 19 Y 21 Y 23 Y 25
N DD VV
U N 36
BG A 97 3 C MM O N O
N DD VV
1 /1 6 NVVD D 6
AB 11 AB 13 AB 15 AB 17 AB 19 AB 21 AB 23 AB 25 A C11 A C12 A C13 A C14 A C15 A C16 A C17 A C18 A C19 A C20 A C21 A C22 A C23 A C24 A C25 A D12 A D14 A D16 A D18 A D22 A D24 L11 L12 L13 L14 L15 L16 L17 L18 L19 L20 L21 L22 L23 L24 L25 M12 M14 M16 M18 M20 M22 M24 P 11 P 13 P 15 P 17 P 19
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
P21 P23 P25 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 R24 R25 T 12 T 14 T 16 T 18 T 20 T 22 T 24 V11 V13 V15 V17 V19 V21 V23 V25 W11 W12 W13 W14 W15 W16 W17 W18 W19 W20 W21 W22 W23 W24 W25 Y12 Y14 Y16 Y18 Y20 Y22 Y24
NVV DD
P LACEI N T E BA PLA A H CK TE REA
C 9 8
C68
C82
C49
C1178
C1179
0.01u_16V _X7R _04 0. 22u_10V _Y5V 04 _ 10u_6.3V_X 5R_06 0.01u_16V_X 7R_04 0.22u_10V_Y 5V_04 22u_1 0V _Y5V _08
C 6 9
C112
C106
C59
0.022u_16V_X 7R_04 0.022u_16V_X _04 7R 0.022u_16V X _04 _ 7R 0. 022u_16V 7R_04 _X
C 8 8
C58
C65
C79
C80
C100
0.01u_16V _X7R _04 0. 01u_16V 7R_04 _X 0.01u_16V_X 7R_04 0.01u_16V_X 7R_04 0.01u_16V_X _04 7R 0. 01u_16V 7R_04 _X
Sheet 18 of 53 VGA NVVDD Cecoupling
C 8 7
C90
C91
C50
C81
0.047u_10V X _04 _ 7R 0. 047u_10V 7R_04 _X 0.047u_10V_X 7R_04
1u_6.3V_Y5V _04 4. 7u_6.3V 5R_06 _X X5R ->Y5V C99 0703
44
NV D VD
VGA NVVDD Cecoupling B - 19
Schematic Diagrams
IBEXPEAK- M 1/9
RT CV CC
IBEXPEAK - M (HDA,JTAG,SATA)
C 63 7 1 u _6 . 3V _ X5 R _ 04 C 6 2 7 15 p_ 5 0V _ N P O_ 04
V DD3
R 5 28
*1 0m li _ sh ort A
20mils
D3 0 R B 7 51 V
20mi ls
C
a dd jo pen C9907 15
2 1 R 49 8 20 K _1 %_ 0 4 C 1 C 6 34 2 2 1 u_ 6. 3 V _X 5 R _0 4 J _ C B A T1 R TC _ V B A T1 1 2 A A A - A T -02 2 -K0 1 B R 50 0 20 K _1 %_ 0 4 1 JO PE N 3 J OP E N 4 C 6 2 5 15 p_ 5 0V _ N P O_ 04 *OP E N _ 10 m li -1M M *OP E N _ 1 0m il -1 MM 2 1 R TC _ V B A T_ 1 A C 1 12 8 *1 u_ 6 . 3V _ X5 R _ 04 J _C B A T 2 R 5 03 1K _ 0 4 D3 1 R B 7 51 V
3 .3 V S X1 1 *3 2 . 76 8K H z 3 4 X6 3 4 3 2. 7 68 K H z R 4 94 10 M_ 04 R TC _ X 1 R TC _X 2 R TC _ R S T # S R TC _ R T C # B1 3 D1 3 C1 4 D1 7 U 4 3A R TC X 1 R TC X 2 R TC R S T# F WH 4 / L F R A ME # F WH F WH F WH F WH 0/ 1/ 2/ 3/ L AD0 L AD1 L AD2 L AD3 D3 3 B3 3 C3 2 A3 2 C3 4 LP C _ A D 0 LP C _ A D 1 LP C _ A D 2 LP C _ A D 3 2 9 , 36 2 9 , 36 2 9 , 36 2 9 , 36 R 26 8 R 26 4 1 0 K _0 4 * 1K _ 04 S E RIRQ HDA _ S P K R
RTC C LEAR
1
NO RE T ST : HDA PKR H h E ble BOO RAP _S ig na
Zo= 50O? 5%
3 .3 V S
iT PM ENA BLE/D ISABLE

R 29 0 * 1K _ 04 S P I _S I T FU TI SP I Hig En e PM NC ON: I_S h abl R 37 8
2 *8 5 20 5-0 27 0 1
LP C
10m il s
LP C _ F R A ME # 2 9 , 36 B oa rd ID S E RIRQ SE R IR Q 29 , 3 6
RTC
S R TC R ST # R 49 7 1 M_ 04 C 6 36 2 1 u_ 6. 3 V _X 5 R _0 4
TPM CLEAR
JO P E N 2 *OP E N _ 1 0m li -1 MM RT CV CC R 49 5 33 0K _ 0 4
S M _I N T R U D ER # P C H _I N T V R ME N
A1 6 A1 4
I N TR U D E R # I N TV R ME N
L D R Q0 # LD R Q1# / GP I O2 3 S E RIRQ
A3 4 F34 AB9
1 0 K _0 4
Bo a rd I D R4 0 3 *1 0 K _0 4
3 4 , 35 H D A _ BI T C L K 3. 3 V S NC2 S H OR T
A3 0 D2 9
50V -> 16 V C9 90703

H D A _B C L K H D A _S Y N C S A T A 0R XN S A TA 0 R XP S A TA 0 T XN S A T A 0T XP S A T A 1R XN S A TA 1 R XP S A TA 1 T XN S A T A 1T XP AK7 AK6 AK1 1 AK9 A H6 A H5 A H9 A H8 AF1 1 AF9 AF7 AF6 A H3 A H1 AF3 AF1 A D9 A D8 A D6 A D5 A D3 A D1 AB3 AB1 AF1 6 AF1 5 SA T A I C OMP I 3 3 VS . R 4 73 T3 S P I _ C S 1# S A TA L E D # Y9 S A TA 0 GP / GP I O2 1 V1 S A TA 1 GP / GP I O1 9 S A T A _D E T #1 R 4 47 S A T A _L E D # OD D _D ET E C T # R 2 66 *1 0K _ 0 4 S A T A_ L E D # 3 3 1 0K _ 04 OD D _ D E T E C T# 33 1 0K _ 04 3. 3 V S R 46 5 *10 K _ 04 1 0 0_ 04 1 00 _ 04 S A T A I C OMP R 3 05 3 7. 4 _1 %_ 0 4 R 46 9 R 45 2 R 45 1 S A TA R X N 2 S A TA R X P 2 S A TA T XN 2 S A TA T XP 2 2 /1 3_ ex 009 1/2 Al S A T A R XN 0 S A T A R XP 0 S A T A TX N 0 S A T A TX P 0 S A T A R XN 1 S A T A R XP 1 S A T A TX N 1 S A T A TX P 1 C 3 89 C 3 88 C 3 84 C 3 83 C 3 82 C 3 81 C 3 86 C 3 87 0. 0 1u _ 16 V _X 7R _0 4 0. 0 1u _ 16 V _X 7R _0 4 0. 0 1u _ 16 V _X 7R _0 4 0. 0 1u _ 16 V _X 7R _0 4 0. 0 1u _ 16 V _X 7R _0 4 0. 0 1u _ 16 V _X 7R _0 4 0. 0 1u _ 16 V _X 7R _0 4 0. 0 1u _ 16 V _X 7R _0 4 S A TA _ R X N 0 S A TA _ R X P0 S A TA _ TX N 0 S A TA _ TX P 0
BIOS ROM
C 39 4 0. 1 u_ 16 V _Y 5V _ 04 S PI _ V D D R 30 0 3 . 3K _ 1 %_ 04 S PI _ W P # 8
3 4 , 35 H D A _ SY N C 35 H D A _ SP K R H D A _S P K R
P1 SPKR C3 0 G3 0 H D A _R ST # H D A _S D I N 0 F3 0 E3 2 H D A _S D I N 1 H D A _S D I N 2 F3 2 H D A _S D I N 3 B2 9
3 W P# CE# S CK H OL D # VSS
1 S P I _ C S 0# 6 S P I _ S C LK 4
S P I _W P #
3 W P# C E# SCK
1 6 4
S P I_ C S 1 # S P I_ S C L K 3 4 , 35 H D A _ SD OU T R 33 1 1K _ 0 4 H D A _D OC K _E N #
R 29 9 3 . 3K _ 1 %_ 04 S PI _ H OL D # 7 S A T A _R X P 0_ C S A T A _R X N 0 _C S A T A _T XN 0_ C S A T A _T XP 0 _C J _H D D 1 S1 S2 S3 S4 S5 S6 S7 3. 3 V S P1 P2 P3 P4 P5 P6 P7 P8 P9 P 10 P 11 P 12 P 13 P 14 P 15 * A C E S -91 90 7 -02 20 A -H 0 1 P I N GN D 1 ~ 2 =G N D
IHDA
Sheet 19 of 53 IBEXPEAK - M 1/9
3 2Mbit
U2 5 VDD SI SO 5 S PI_ S I 2 S PI_ S O S P I _V D D 8
32Mbit
U 26 V DD SI SO 2 5 S P I_ S I S P I_ S O
3 4 , 35 H D A _ R S T# 35 34 HDA _ S DIN0 HDA _ S DIN1
S A T A _R X N 1 S A T A _R X P 1 S A T A _T XN 1 S A T A _T XP 1
33 33 33 33
B4100 B5100
R403 R378
S A T A 2R XN S A TA 2 R XP S A TA 2 T XN S A T A 2T XP S A T A 3R XN S A TA 3 R XP S A TA 3 T XN S A T A 3T XP S A T A 4R XN S A TA 4 R XP S A TA 4 T XN S A T A 4T XP S A T A 5R XN S A TA 5 R XP S A TA 5 T XN S A T A 5T XP
S P I _H OLD # 7
H O LD #
VSS
H D A _S D O H D A _D OC K _E N # / GP I O3 3
MX 2 5L 32 0 5D M 2I -1 2G SA T A _R XP 0 SA T A _R XN 0 SA T A _T X N 0 SP * I_ SA T A _T X P 0 J _ SA T A 1 1 16 16 17 2 1 2 17 18 3 18 19 4 3 19 20 5 4 20 21 6 5 21 22 7 6 22 23 8 7 23 24 9 8 9 24 25 10 25 26 11 10 26 27 12 11 27 28 13 12 28 29 14 13 29 30 15 14 15 30 88 01 4 -30 00 1
*MX 25 L3 2 05 D M2 I -12 G
3 . 3V
= 1 "~ 5" .5 6.
C 36 ME _ WE # 1 D 15 R B 7 51 V A
J3 0
H D A _D OC K _R S T# / GP I O1 3
SAT A
H3 2
R 46 8
R 46 7
R 46 6 2 00 _ 1% _0 4
R4 5 7 2 00 _ 1% _0 4 P C H _ J TA G_ TM S P C H _ J TA G_ TD I P C H _ J TA G_ TD O P C H _ J TA G_ R S T # R4 4 4 1 00 _ 04
20 K _1 %_ 0 42 0 0_ 1% _ 04
P C H _J TA G _T C K _B U F M3 JOP E N 1 *OP E N _ 10 mi l -1MM P C H _J TA G _T MS P C H _J TA G _T D I P C H _J TA G _T D O P C H _J TA G _R S T # K3 K1 J2 J4
Fl ash D cr to es ip r Se cur y Ov id it er e
OD D _ D E TE C T# 33
J T AG _T C K J T AG _T MS
0 324
1. 1 V S_ V T T
J T AG _T D O J T AG _R S T #
JTAG
J T AG _T D I
S A T A I C OMP O
R 4 86 R 4 89 5V S R 4 91 R 4 93
0_ 0 4 0_ 0 4 0_ 0 4 0_ 0 4
SA T A _T X P1 3 3 SA T A _T X N 1 3 3 SA T A _R XN 1 3 3 SA T A _R XP 1 33 S P I_ S CL K SP I_ CS0 # SP I_ CS1 # S P I _ C S 0# _ R S P I _ C S 1# _ R BA2 AV3
S P I_ CL K S P I _ C S 0#
4 . 7 K _0 4 P C H _ J TA G_ T C K _B U F
AY3 AY1
H D D _N C 0 C 3 64 H D D _N C 1 H D D _N C 2 H D D _N C 3 *. 1 U _ 16 V _0 4 C 37 5 1 u_ 1 0V _ 06 +C 35 2 1 0 0u _6 . 3 V_ B _ A SP I_ S O R 27 4 33 _ 04 S P I _ S O_R S A TA _ TX P 0_ C S A TA _ TX N 0 _C S A TA _ R X N 0_ C S A TA _ R X P0 _ C R 54 2 R 54 0 R 54 1 R 51 5 *0_ 0 4 S A TA _ TX P 0 *0_ 0 4 S A TA _ TX N 0 *0_ 0 4 S A TA _ R XN 0 *0_ 0 4 S A TA _ R XP 0 SP I_ S I
AV1 S P I _ MI S O I B E XP E A K
1u_10V_06 C990703
SATA HDD ESATA REDRIVER

Layo ut Not e:
C sed t U4 lo o
3. 3 V S
3 . 3V S S A TA T XP 2 R 2 0 9 S A TA T XN 2 R 2 0 7 S A TA R X N 2 R 2 0 4 S A TA R X P 2 R 1 9 9 0_ 0 4 0_ 0 4 0_ 0 4 0_ 0 4 R 21 0 R 22 5 R 22 6 R 23 9 0 _ 04 S A TA _ TX P 2 _R 0 _ 04 S AT A _ TX N 2 _R 0 _ 04 S A TA _ R X N 2 _R 0 _ 04 S A T A _R X P 2 _R 6 10 16 20 R 1 97 *4 . 7K _ 04 U1 5 *S N 7 5L V C P 4 12 7 EN 15 SA T A _T X P2 _ R TX _0 P 14 SA T A _T X N 2_ R T X _0 N S A T A _T XP 2 _R C 2 71
ESATA
50V -> 16 V C9 90703
L1 9 0. 0 1u _ 16 V _X 7R _0 4 0. 0 1u _ 16 V _X 7R _0 4 S A TA _ TX P 2_ C S A TA _ TX N 2 _C L1 8 S A T A _R X N 2 _R C 2 60 S A T A _R X P 2_ R C 2 57 0. 0 1u _ 16 V _X 7R _0 4 0. 0 1u _ 16 V _X 7R _0 4 S A TA _ R X N 2_ C S A TA _ R X P 2_ C 2 3 S A T A _T XN 2_ R C 2 69 *W C M2 01 2F 2 S -16 1 T0 3 1 4 1 2 3 VDD VDD VDD VD D 1 2 4 5 R X _0 P R X _0 N 4 *W C M2 01 2F 2 S -16 1 T0 3 2 1 3 4 5 6
SPI
S P I _ MOS I
J_ E S AT A 1 GN D 1 T XP T XN GN D 2 RXN RXP 7 GN D 3 A T0 7J 36 B A A 09 0
S A TA T XP 2 S A TA T XN 2 S A TA R X N 2 S A TA R X P 2
C 27 0 C 26 3 C 26 1 C 25 8
* 0. 0 1u _ 50 V _X 7R _0 4 SA T A _T X P 2 * 0. 0 1u _ 50 V _X 7R _0 4 SA T A _T X N 2 * 0. 0 1u _ 50 V _X 7R _0 4 SA T A _R XN 2 * 0. 0 1u _ 50 V _X 7R _0 4 SA T A _R XP 2
HO ST
T X_ 1N T X_ 1P T -P A D D 1 D0
D CE EVI
R X _1 N R X _1 P G ND GN D GN D GN D GN D 3 13 17 18 19
12 SA T A _R XN 2 _ R 11 SA T A _R XP 2 _R
C 25 6 C 2 73 *0. 0 1 u_ 16 V _X 7 R _ 04 *0 . 1u _ 16 V _Y 5 V _0 4
C 27 4 *1u _ 6. 3 V _X 5 R _ 04
21
8 9
3 . 3V S
R 19 6 R 19 4 R 19 5 R 19 3
*4. 7 K _ 04 *4. 7 K _ 04 *4. 7 K _ 04 *4. 7 K _ 04
L ayout note:
NE AR TO J SA 1 _E TA
6- 02-754 12-KQ0
SN LVC 12 J 75 P4 RT
12 , 22 , 2 5, 2 6, 3 0, 3 3 , 35 , 37 , 42 , 43 , 4 6 5 V S 28 , 30 , 33 , 3 6, 3 7, 3 8, 4 4 4 5 VD D 3 , 2 , 10 , 1 1, 1 2, 1 3, 2 0 ,2 1 , 22 , 23 , 24 , 2 5, 2 6, 2 8, 2 9 3 0 , 32 , 33 , 35 , 3 6, 3 7, 4 2, 4 3 ,4 6 3. 3 V S , 3 , 4, 1 2, 1 3 ,1 7 , 20 , 21 , 23 , 2 4, 2 6, 2 8, 2 9 3 1 , 32 , 33 , 34 , 3 7, 3 9, 4 0, 4 1 ,4 4 3. 3 V , 26 RT CVCC 2 , 4, 6 , 7 2 0 , 21 , 24 , 25 , 2 6, 3 9, 4 1, 4 2 ,4 3 1. 1 V S_ V T T ,
B - 20 IBEXPEAK- M 1/9
Schematic Diagrams
IBEXPEAK - M 2/9
IBEXPEAK - M (PCI-E,SMBUS,CLK)
P C H _ B T _E N # U 43 B 2 8 P CI E _R X N1 _ NE W _ C A RD 2 8 P CI E _R X P 1_ N E W _ C A R D 2 8 P C IE _ T X N1 _ NE W _ C A RD 2 8 P C IE _ T X P 1_ N E W _ C A R D 3 2 P CI E _ RX N 2_ G LA N 3 2 P CI E _ RX P 2 _ GL A N 32 P C I E _ TX N 2_ G LA N 32 P C I E _ TX P 2 _ GL A N 28 28 28 28 P C IE _ RX N3 _ W L A N P C IE _ RX P 3 _W LA N P C IE _ T X N 3 _ W L A N P C IE _ T X P 3 _W LA N B G3 0 BJ 3 0 BF 2 9 BH2 9 AW 3 0 BA3 0 BC3 0 BD3 0 AU3 0 AT 3 0 AU3 2 AV3 2 BA3 2 BB3 2 BD3 2 BE3 2 BF 3 3 BH3 3 B G3 2 BJ 3 2 BA3 4 AW 3 4 BC3 4 BD3 4 AT 3 4 AU3 4 AU3 6 AV3 6 B G3 4 BJ 3 4 B G3 6 BJ 3 6 AK4 8 AK4 7 R2 6 2 1 0 K _0 4 P9 P C I E CL K RQ 0 # / GP IO 73 A M4 3 A M4 5 1 0K _ 0 4 R4 6 4 0 _ 04 U4 P C I E CL K RQ 1 # / GP IO 18 A M4 7 A M4 8 R4 7 4 0 _ 04 N4 P C I E CL K RQ 2 # / GP IO 20 AH4 2 AH4 1 A8 2 8 W L A N_ C L K R E Q# A M5 1 A M5 3 R2 7 2 1 0 K _0 4 M9 P C I E CL K RQ 4 # / GP IO 26 AJ 5 0 AJ 5 2 R4 8 1 1 0 K _0 4 H6 P C I E CL K RQ 5 # / GP IO 44 AK5 3 AK5 1 R2 7 8 1 0 K _0 4 P1 3 X CL K _ RC OM P T45 CL K O UT _ P CI E 5 N CL K O UT _ P CI E 5 P C L K OU T F LE X0 / G P I O6 4 P4 3 C L K OU T F LE X1 / G P I O6 5 T42 C L K OU T F LE X2 / G P I O6 6 C L K OU T F LE X3 / G P I O6 7 N 50 P C I E CL K RQ 3 # / GP IO 25 C LK IN _ P CI L OO P B A C K A H 51 A H 53 AF3 8 X T A L 25 _ IN X T A L 25 _ OU T X C LK _ R CO MP CL K O UT _ P CI E 2 N CL K O UT _ P CI E 2 P CL K O UT _ P CI E 1 N CL K O UT _ P CI E 1 P B9 PER N1 PER P1 P E T N1 PET P1 PER N2 PER P2 P E T N2 PET P2 PER N3 PER P3 P E T N3 PET P3 PER N4 PER P4 P E T N4 PET P4 S MB A L E R T# / G P I O1 1 H 14 S MB CL K C8 S MB D A T A J14 S M L0 A L E R T# / G P I O6 0 C6 S ML 0 CL K S M L 0_ C LK S M L 0_ D A T A S M L 0_ D A TA 28 M 14 E1 0 G 12 T13 L P D _S P I_I N T R# S M L 1_ C LK S M L 1_ D A T A S M L1 _ DA T A R 4 88 2 .2 K _ 0 4 S M L 0_ C LK 28 P C H_ B T _ E N # S M B _ CL K S M B _ DA T A P C H_ U P E K _ I NI T # L P D_ S P I_ IN TR # R 2 98 S M L1 _ CL K R 4 85 G8 S M L 0D A T A S M L1 A L E R T# / G P I O7 4 S ML 1 CL K / G P I O5 8 S ML 1 DA T A / G P I O7 5 1 0 K_ 0 4 2 .2 K _ 0 4 P CH _ B T_ E N # 28 , 3 3 S M B _ CL K 2 , 1 0 , 11 S M B _ DA T A 2 ,1 0 ,11 S M B _C L K S M B _D A T A R 4 87 R 4 77 R 4 75 1 0 K_ 0 4 2 .2 K _ 0 4 2 .2 K _ 0 4 1 0 K_ 0 4 2 .2 K _ 0 4 2 .2 K _ 0 4 C6 3 8 C6 3 9 0 . 1 u _1 0 V _ X 7R _ 04 0 . 1 u _1 0 V _ X 7R _ 04 P C I E _ TX N 1_ C P C I E _ TX P 1 _ C P C H _ UP E K _I N I T #R 4 92 S M L0 _ CL K S M L0 _ DA T A R 2 75 R 2 86 3 . 3V
C4 6 1 C4 6 0
0 . 1 u _1 0 V _ X 7R _ 04 0 . 1 u _1 0 V _ X 7R _ 04
P C I E _ TX N 2_ C P C I E _ TX P 2 _ C
C4 6 2 C4 5 7
0 . 1 u _1 0 V _ X 7R _ 04 0 . 1 u _1 0 V _ X 7R _ 04
P C I E _ TX N 3_ C P C I E _ TX P 3 _ C
SMBus
S MC _ C P U _T H E R M 3 , 36 S MD _ C P U _T H E R M 3 , 36 P E G _C L K RE Q # R 4 62 R 4 49 * 1 0K _ 0 4 1 0 K_ 0 4 C L _C L K 1 28 C L _D A T A 1 28 C L _R S T #1 2 8 10K pulldown to GND
Co nt ro ll er
PCI-E x1 Lane 1 Lane 2 Lane 3 Lane 4 Lane 5 Lane 6 Lane 7 Lane 8
Usage U 3. SB 0 G LAN W LAN C ard R eader X X X X
Li nk
PER N5 PER P5 P E T N5 PET P5 PER N6 PER P6 P E T N6 PET P6 PER N7 PER P7 P E T N7 PET P7 PER N8 PER P8 P E T N8 PET P8 CL K O UT _ P CI E 0 N CL K O UT _ P CI E 0 P
PCI-E*
CL _ CL K 1 T11 CL _ DAT A1 T9 C L _ R S T1 #
C L _C L K 1 C L _D A T A 1 C L _R S T #1
L A N_ C LK R E Q#

100 -MHz Gen di 2 ffer enti cl al ock to P CIe Grap hics dev ice.
H1 P E G_ A _ C LK R Q# / G P I O4 7 A D 43 A D 45 AN 4 AN 2 AT1 AT3
P E G_ CL K R E Q# V G A _ P E X CL K # V G A _ P E X CL K
P E G_ CL K R E Q# 1 3
C L K OU T_ P E G _ A _N CL K OU T _P E G_ A _ P
V G A _ P E X CL K # 1 3 V G A _ P E X CL K 1 3 CL K _ E X P _N 4 CL K _ E X P _P 4
PEG
C L K O U T _ DM I _N C LK OU T _ DM I _ P
CL K O UT _ DP _ N / CL K OU T _B CL K 1 _N CL K OU T _D P _ P / CL K O UT _ B CL K 1 _ P
P C H_ C LK _ D P _ N_ R P C H_ C LK _ D P _ P _R
R 3 59 R 3 60
* 1 0m i l _s h o rt * 1 0m i l _s h o rt
CL K _ D P _ N 4 CL K _ D P _ P 4 100 -MHz dif fere ntia cl l ock f rom PCH to P roce ssor . Con nect to PEG_ CLK# /PEG _CLK pins of the pro cess o
3 .3 V S
From CLK BUFFER
C LK I N _ D M I _N C L K I N_ D M I _ P CL K I N_ B C L K _N CL K I N _ B C L K _ P CL K IN _D OT _ 9 6N C LK I N_ DO T_ 9 6 P
AW 2 4 BA2 4
C L K _P CI E _ IC H # 2 C L K _P CI E _ IC H 2
2 8 CL K _ P C IE _N E W _ CA R D # 2 8 CL K _ P C IE _N E W _54 5 R D R CA 3 .3 V 2 8 , 31 N E W CA R D_ C LK RE Q # 3 2 CL K _ P C I E _ GL A N# 3 2 CL K _ P CI E _G L A N
AP3 AP1
C L K _B UF _ B C L K _ N 2 C L K _B UF _ B C L K _ P 2
F18 E1 8
C L K _B UF _ DO T 96 _ N 2 C L K _B UF _ DO T 96 _ P 2 C 65 2 2 2p _ 5 0V _ N P O_ 0 4
L A N _ C LK R E Q#
C L K I N _S A TA _N / CK S S CD _N CL K IN _ S A T A _ P / C K S S C D_ P
A H 13 A H 12
C L K _S A TA # 2 C L K _S A TA 2
2 8 CL K _ P CI E _M I NI # 2 8 C L K _ P CI E _ M INI
1 R5 0 8 1M _ 04 2
CL K O UT _ P CI E 3 N CL K O UT _ P CI E 3 P
RE F C L K 1 4I N J42
4 X7 H S X 5 3 1S _ 2 5 MH Z 3 C 65 3
P4 1
C L K _B UF _ RE F 14 2 C L K _P CI _ F B 2 3 51-O ser ies Resi sto Conn ect to a o o th CL ny ne f e KOUT _PCI[ 4:0] pin s
3 .3 V
CL K O UT _ P CI E 4 N CL K O UT _ P CI E 4 P
XT A L 2 5 _I N XT A L 2 5_ O UT
2 2p _ 5 0V _ N P O_ 0 4
R 3 37
9 0.9 _ 1 % _0 4
1 . 1 V S _ V TT
90. 9-O ? % pull up to +Vcc IO (1. 05V, S0 rail )
3 .3 V
3 .3 V
CL K O UT _ P E G_ B _ N CL K O UT _ P E G_ B _ P P E G _B _ C LK R Q# / G P I O5 6 IB E X P E A K
Clock Flex
3 . 3V S 2, 10 , 1 1 , 12 , 1 3 , 1 9, 2 1 , 2 2,2 3 , 2 4 , 25 , 2 6 , 2 8, 2 9 , 3 0,3 2 , 3 3 , 35 , 3 6 , 37 , 4 2 , 4 3,4 6 3 . 3V 3, 4,1 2 , 1 3,1 7 , 1 9 , 21 , 2 3 , 24 ,2 6 , 2 8,2 9 , 3 1 , 32 , 3 3 , 34 ,3 7 , 3 9,4 0 , 4 1, 44 1 . 1V S _V T T 2 , 4 , 6, 7, 1 9 ,2 1, 2 4 ,2 5 ,26 , 3 9 ,4 1, 4 2 ,4 3
IBEXPEAK - M 2/9 B - 21
Schematic Diagrams
IBEXPEAK - M 3/9
IBEXPEAK - M (DMI,FDI,GPIO)
U 4 3C 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 1. 1 V S _V TT R 4 96 DM DM DM DM DM DM DM DM DM DM DM DM DM DM DM DM I_ RX N I_ RX N I_ RX N I_ RX N 0 1 2 3 B C2 4 BJ 2 2 AW 2 0 BJ 2 0 B D2 4 B G2 2 BA2 0 B G2 0 BE2 2 BF2 1 B D2 0 BE1 8 B D2 2 B H2 1 B C2 0 B D1 8 D D D D D D D D D D D D D D D D MI 0 R X N MI 1 R X N MI 2 R X N MI 3 R X N MI 0 R X P MI 1 R X P MI 2 R X P MI 3 R X P MI 0 T X N MI 1 T X N MI 2 T X N MI 3 T X N MI 0 T X P MI 1 T X P MI 2 T X P MI 3 T X P F F F F F F F F DI_ RX N DI_ RX N DI_ RX N DI_ RX N DI_ RX N DI_ RX N DI_ RX N DI_ RX N 0 1 2 3 4 5 6 7 BA1 8 BH1 7 BD1 6 BJ 1 6 BA1 6 BE1 4 BA1 4 BC1 2 BB1 8 BF 1 7 BC1 6 B G1 6 AW 1 6 BD1 4 BB1 4 BD1 2 BJ 1 4 FD FD FD FD FD FD FD FD FD FD FD FD FD FD FD FD I _T X N I _T X N I _T X N I _T X N I _T X N I _T X N I _T X N I _T X N 0 1 2 3 4 5 6 7 FD FD FD FD FD FD FD FD FD FD FD FD FD FD FD FD I _ T XN I _ T XN I _ T XN I _ T XN I _ T XN I _ T XN I _ T XN I _ T XN 0 1 2 3 4 5 6 7 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 F DI_ IN T 3 F DI_ F S Y NC 0 3 BH1 3 F DI_ F S Y NC 1 D MI _ I R C O MP BJ 1 2 F DI_ L S Y NC 0 B G1 4 F DI_ L S Y NC 1 F DI_ F S Y NC 1 3 F DI_ L S Y N C0 3 F DI_ L S Y N C1 3
I_ RX P 0 I_ RX P 1 I_ RX P 2 I_ RX P 3 I _ TX N I _ TX N I _ TX N I _ TX N 0 1 2 3
FDI
DMI
I _ TX P 0 I _ TX P 1 I _ TX P 2 I _ TX P 3 D M I _C OM P _ R
F DI_ R F DI_ R F DI_ R F DI_ R F DI_ R F DI_ R F DI_ R F DI_ R
XP0 XP1 XP2 XP3 XP4 XP5 XP6 XP7
I _T X P 0 I _T X P 1 I _T X P 2 I _T X P 3 I _T X P 4 I _T X P 5 I _T X P 6 I _T X P 7
I _ T XP 0 I _ T XP 1 I _ T XP 2 I _ T XP 3 I _ T XP 4 I _ T XP 5 I _ T XP 6 I _ T XP 7
F DI_ IN T BF 1 3 F DI_ F S Y NC 0
4 9 . 9 _ 1% _ 0 4
B H2 5 D MI _ Z C OM P BF2 5

3 .3 V S R 276 1 0 K _0 4 SYS_ R ESET# T6 S Y S _ R E S E T# SY S_ PW RO K M6 B1 7 P W R OK K5 M E P W R OK R 4 90 1 0 K_ 0 4 AUXPPW RO K _ R A1 0 L A N _R S T # D 9 D R A M P W R OK RS M RS T # 1 0 K_ 0 4 S U S _ P W R_ A C K P W R_ B T N # 36 P W R_ BT N # AC_ PR ESEN T P7 A C P R E S E N T / G P I O 31 P M_ B A T L O W # A6 F14 R I# I B E XP E A K B A T L OW # / GP I O 7 2 C1 6 R S MR S T # M1 S U S _ P W R _A C K / G P I O 30 P5 P W R B T N# S Y S _ P W R OK
3 . 3V P C IE _ W A K E # J 12 W AK E# C L K R U N # / GP I O 3 2 Y1 P M _C L K R U N # P C IE _ W A K E # P C I E _W A K E # 2 8, 31 , 3 2 P M _ S LP _L A N # SW I # R2 9 7 R2 7 3 R3 0 1 R4 5 0 R2 7 7 R2 8 1 1 K_ 0 4 * 10 K _ 0 4 1 0 K _ 04 1 0 K _ 04 * 10 K _ 0 4 * 10 K _ 0 4
System Power Management
P M _ C L K R U N # 29
S U S _ P W R _A C K P W R _ B T N# A C _ P RE S E NT
S B _ P W R OK P M_ M P W R O K
P8 S U S _ S T A T # / GP I O 6 1 F3 S U S C LK / GP I O 6 2 E4 S L P _ S 5 # / GP I O 6 3
S4 _ ST ATE# S4 _ ST ATE# 2 9 P M _ B A T LO W # R4 8 4 8 .2 K_ 0 4
EXT-LAN
4 P M _ D R A M_ P W R G D
3 . 3V S H7 SL P_ S4 # P1 2 SL P_ S3 # K8 SL P_ M # 3 .3 V N2 TP2 3 P MS Y N C H BJ 1 0 F6 S LP _ L A N # H _ P M _S Y N C 4 14 P M _S LP _ L A N # A L L _S Y S _ P W R GD 4 , 43 D E L A Y _P W R G D 12 11 13 R 2 56 7 3. 3 V 1 0 K_ 0 4 R 2 54 *1 0 m li _ s ho rt S Y S _ P W RO K R 2 53 U 23 D 7 4 L V C0 8 P W R 2 55 *1 0 m li _ s ho rt *1 0 m li _ s ho rt P M _M P W R OK S B _ P W R OK SU SB# S U S C # 3 6 , 40 P M_ C L K R U N # R4 5 9 8 .2 K_ 0 4
36
R S MR S T#
R 3 04
3 6 S U S _P W R _ A C K
SU SB#
2 8 , 31 , 3 5 , 3 6 , 39
36
SW I#
SW I#
3 . 3V R2 1 8 1 0K _0 4 D A C _ P RE S E NT
3 .3 V U2 3 C 74 L V C 08 P W 8 10 7 R2 5 7 2K _0 4 A L L _ S Y S _ P W RG D A L L _ S Y S _P W R G D 1 2 , 3 6 H _ V TT P W R G D 4 14 9 4, 4 1 1 . 1 V S _ V T T _P W R G D 3 .3 V R2 5 8 1K _0 4 U 2 3A 7 4 L V C0 8 P W 3 2 3 9 1. 8 V S _ P W R G D 7 1. 1V S _V TT _ E N 41 1 14 1 . 1 V S _ V T T 2 , 4 , 6 , 7, 19 , 2 0 , 2 4, 2 5 , 2 6 , 3 9, 4 1 , 4 2 , 4 3 3 .3 V 3, 4 , 1 2 , 1 3 , 17 , 1 9 , 2 0 , 23 , 2 4 , 2 6 , 28 , 2 9 , 3 1 , 32 , 3 3 , 3 4, 37 , 3 9 , 4 0, 41 , 4 4 3 .3 V S 2, 1 0 , 1 1 , 1 2, 1 3 , 1 9 , 2 0, 2 2 , 2 3 , 2 4, 2 5 , 2 6 , 2 8, 2 9 , 3 0 , 32 , 3 3 , 3 5 , 36 , 3 7 , 4 2 , 43 , 4 6
U 2 3B 7 4 L VC0 8 PW 6
Q2 4 36 , 4 5 A C _I N # A C _ IN# G S
C 29 3
4 40 D D R 1 . 5V _P W R G D 5 7
MT N 7 00 2 Z H S 3 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 S U S B #
B - 22 IBEXPEAK - M 3/9
14
Schematic Diagrams
IBEXPEAK - M 4/9
IBEXPEAK - M (LVDS,DDI)
U4 3 D 1 2 BL O N 1 2 , 3 6 NB _ E N A V D D T4 8 T4 7 Y4 8 L _ B K LT C T L 3 .3 VS R 357 R 356 R 329 1 0 K_ 0 4 1 0 K_ 0 4 2 . 3 7 K _ 1 % _ 04 12 P _D D C _ C LK 12 P _D D C _ D A T A L _ C T R L _C L K L _ C T R L _D A T A L VD S_ IBG AB4 8 Y4 5 AB4 6 V4 8 AP3 9 AP4 1 AT4 3 AT4 2 L _ D D C _ CL K L _ D D C _ DA T A L _ C T RL _ CL K L _ C T RL _ DA TA L V D _ IBG L VD _ VBG L VD _ VR EF H L VD _ VR EF L S D V O _ CT R LC L K S D V O _C T R L D A T A T5 1 T5 3 SD VO _ STAL L N S DV O_ S T A L L P S D V O_ I N T N S D V O _I N T P L _ B K LT E N L _ V D D_ E N S D V O_ T V C L K I N N S D V O _ TV C L K I N P B J 46 B G4 6 B J 48 B G4 8 BF4 5 B H4 5
Display Port B
LVD_V REFH/L VD_VRE DEL FL
12 L V D S -L C L K N 12 L V D S -L C L K P 12 L V D S -L 0 N 12 L V D S -L 1 N 12 L V D S -L 2 N
L VD SA_ C L K# L VD SA_ C L K L VD L VD L VD L VD L VD L VD L VD L VD SA_ D SA_ D SA_ D SA_ D SA_ D SA_ D SA_ D SA_ D ATA# 0 ATA# 1 ATA# 2 ATA# 3 ATA0 ATA1 ATA2 ATA3
LVDS
AV5 3 AV5 1 BB4 7 BA5 2 AY4 8 AV4 7 BB4 8 BA5 0 AY4 9 AV4 8
D D PB_ AU XN DD P B _ A U X P D DP B _ HP D D DP B _ 0 N DD P B _ 0 P D DP B _ 1 N DD P B _ 1 P D DP B _ 2 N DD P B _ 2 P D DP B _ 3 N DD P B _ 3 P
B G4 4 B J 44 A U3 8 B D4 2 B C4 2 B J 42 B G4 2 BB4 0 BA4 0 AW 3 8 BA3 8
Digital Display Interface
R 594 R 595
2 . 2 K _ 04 2 . 2 K _ 04
3 .3 VS
12 L V D S -L 0 P 12 L V D S -L 1 P 12 L V D S -L 2 P
D D P C _ CT R LC L K DD P C _C T R L D A T A
Y4 9 AB4 9
H D MI _ C T RL C LK 4 6 H D MI _ C T RL D A T A 4 6
5 VS
12 L V D S -U CL K N 12 L V D S -U CL K P 12 L V D S -U 0 N 12 L V D S -U 1 N 12 L V D S -U 2 N
L VD SB_ C L K# L VD SB_ C L K L VD L VD L VD L VD L VD L VD L VD L VD SB_ D SB_ D SB_ D SB_ D SB_ D SB_ D SB_ D SB_ D ATA# 0 ATA# 1 ATA# 2 ATA# 3 ATA0 ATA1 ATA2 ATA3
AY5 3 AT4 9 A U5 2 AT5 3 AY5 1 AT4 8 A U5 0 AT5 1
D DPC _ A U X N D D PC_ A U X P D DP C _ HP D DD P C _ 0 N D DP C_ 0 P DD P C _ 1 N D DP C_ 1 P DD P C _ 2 N D DP C_ 2 P DD P C _ 3 N D DP C_ 3 P
BE4 4 B D4 4 AV4 0 BE4 0 B D4 0 BF4 1 B H4 1 B D3 8 B C3 8 BB3 6 BA3 6
DP C_ H PD_ Q H H H H H H H H D D D D D D D D MI B _ D MI B _ D MI B _ D MI B _ D MI B _ D MI B _ D MI B _ C MI B _ C 2 BN 4 6 2 BP 4 6 1 BN 4 6 1 BP 4 6 0 BN 4 6 0 BP 4 6 L KBN 4 6 L K B P 46
P O RT C _ HP D 4 6 R 3 43 1 0 0 K_ 0 4
FOR DI SABLE 150_1% _04 -- ? ? ? > R5 1 0 R5 1 1 R5 0 9 1 5 0 _ 1 % _0 4 1 5 0 _ 1 % _0 4 1 5 0 _ 1 % _0 4 12 12 12
12 L V D S -U 0 P 12 L V D S -U 1 P 12 L V D S -U 2 P
DA C_ B L U E D A C _ GR E E N DA C_ RE D AA5 2 AB5 3 A D5 3 C R T_ B L U E C R T_ G R E E N C R T_ R E D
D D P D _ CT R LC L K DD P D _C T R L D A T A
U5 0 U5 2
1 2 DA C_ DD C ACL K 1 2 D A C _ D D C A D A TA
V5 1 V5 3
C R T_ D D C _ CL K C R T_ D D C _ DA TA
D DPD _ A U X N D D PD_ A U X P D DP D _ HP D DD P D _ 0 N D DP D_ 0 P DD P D _ 1 N D DP D_ 1 P DD P D _ 2 N D DP D_ 2 P DD P D _ 3 N D DP D_ 3 P
B C4 6 B D4 6 A T 38 B J 40 B G4 0 B J 38 B G3 8 BF3 7 B H3 7 BE3 6 B D3 6
12 12 R3 4 9 1 K _1 % _ 0 4
DA C_ HS Y N C D A C _ V S Y NC D AC_ IR EF _ R
Y5 3 Y5 1
C R T_ H S Y N C C R T_ V S Y N C
A D4 8 AB5 1
D A C _ IRE F C R T_ I R T N IBE XP EA K
Connect to GND
CRT
5 VS 3 .3 VS
1 2, 1 9 , 2 5 , 2 6 , 3 0 , 33 , 3 5 , 3 7 , 4 2 , 4 3, 46 2 , 10 , 1 1 , 1 2 , 1 3 , 1 9, 20 , 2 1 , 2 3 , 2 4 , 2 5, 26 , 2 8 , 2 9 , 3 0 , 32 , 3 3 , 3 5 , 3 6 , 3 7, 42 , 4 3 , 4 6
Display Port D
Display Port C
AP4 8 AP4 7
Q3 9 MT N 7 00 2 Z H S 3
SDVO
FOR L VDS DI SABLE
R 344 R 335
*1 0 m il _ s h or t *1 0 m il _ s h or t
L V D _ V RE F H L V D _ V RE F L
Schematic Diagrams
IBEXPEAK - M 5/9
IBEXPEAK - M (PCI,USB,NVRAM)
U43 E H4 0 N3 4 C4 4 A 8 3 C3 6 J3 4 A 0 4 D4 5 E 6 3 H4 8 E 0 4 C4 0 M 8 4 M 5 4 F 3 5 M 0 4 M 3 4 J3 6 K 8 4 F 0 4 C4 2 K 6 4 M 1 5 J5 2 K 1 5 L3 4 F 2 4 J4 0 G4 6 F 4 4 M 7 4 H3 6 J5 0 G4 2 H4 7 G3 4 3.3 V S 4 3 RN9 8.2 K 8P4R_0 4 2 _ 1 4 3 RN4 8.2 K 8P4R_0 4 2 _ 1 4 3 RN10 8.2 K 8P4R_0 4 2 _ 1 4 3 RN8 8.2 K 8P4R_0 4 2 _ 1 4 3 RN11 8.2 K 8P4R_0 4 2 _ 1 R504 1 0K_04 5 6 7 8 5 6 7 8 5 6 7 8 5 6 7 8 5 6 7 8 IN T _PIRQE# PCI_I RDY# INT P RQD# _ I PCI_ F A E# R M PCI_PERR# PCI _LOCK# PCI _DEV SEL# PCI_SERR# PCI _REQ#1 PCI_TRDY# INT P RQH# _ I PCI _REQ#0 INT P RQG# _ I INT P RQC# _ I IN T _PIRQA# PCI_ST OP# IN T _PIRQB# IN T _PIRQF# PCI _REQ#3 INT_PIRQA# INT_PIRQB# INT_PIRQC # INT_PIRQD # PCI_R E #0 Q PCI_R E #1 Q DGPU_SELECT # PCI_R E #3 Q PCI_G NT #0 PCI_G NT #1 DGPU_PWM S _ ELECT# PCI_G NT #3 INT_PIRQE# INT_PIRQF# INT_PIRQG # INT_PIRQH # G3 8 H5 1 B 7 3 A 4 4 F 1 5 A 6 4 B 5 4 M 3 5 F 8 4 K 5 4 F 6 3 H5 3 B 1 4 K 3 5 A 6 3 A 8 4 K6 PCIR S T# PCI_SERR# PCI_PERR# E 4 4 E 0 5 SERR# PERR# I RDY# PAR DEVSE # L FRAM E# PLOC K # D4 1 C4 8 M7 PM E# PLT _R S T# D5 PLT S R T# 22_ 04 22_ 04 22_ 04 CLK_PCI _FB R _ CLK_PCI _KB R C_ CLK_PCI _T PM _R N5 2 P 3 5 P 6 4 P 1 5 P 8 4 CL K UT O _PCI0 CL K UT O _PCI1 CL K UT O _PCI2 CL K UT O _PCI3 CL K UT O _PCI4 IBEX AK PE 3 .3VS C380 0. 1u_ 16V_Y5 V 04 _ 5 1 4 2 3 R267 100K_0 4 U22 M C7 4VHC1G0 8DFT 1G B F P T U _ L _RST 4 ,28, 31, 32, 36 # USB_OC #23 USB_OC #101 1 USB_OC #45 USB_OC #89 5 6 7 8 4 3 2 1 R N3 1 0K_8P4R_ 04 3.3 V OC0# / G P O59 I OC1# / G P O40 I OC2# / G P O41 I OC3# / G P O42 I OC4# / G P O43 I OC5# / GPIO9 OC6# / G P O10 I OC7# / G P O14 I N16 J16 F16 L16 E14 G16 F12 T 15 USB_OC# 01 USB_OC# 23 USB_OC# 45 USB_OC# 67 USB_OC# 89 USB_OC# 101 1 USB_OC# 121 3 USB_OC# 23 28, 31 USB B A R I S# ST OP# T DY# R USBRBIAS AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 C/ B E0# C/ B E1# C/ B E2# C/ B E3# PIRQ A # PIRQ B # PIRQ C# PIRQ D# REQ0 # REQ1 # / GPIO5 0 REQ2 # / GPIO5 2 REQ3 # / GPIO5 4 GN T 0# GN T 1# / G P O51 I GN T 2# / G P O53 I GN T 3# / G P O55 I PIRQ E / # PIRQ F / # PIRQ G# / PIRQ H# / GPIO2 GPIO3 GPIO 4 GPIO 5 NV_CE#0 NV_CE#1 NV_CE#2 NV_CE#3 NV_DQS0 NV_DQS1 NV_DQ0 NV_DQ1 NV_DQ2 NV_DQ3 NV_DQ4 NV_DQ5 NV_DQ6 NV_DQ7 NV_DQ8 NV_DQ9 NV_DQ 10 / NV_DQ 11 / NV_DQ 12 / NV_DQ 13 / NV_DQ 14 / NV_DQ 15 / / N V IO0 _ / N V IO1 _ / N V IO2 _ / N V IO3 _ / N V IO4 _ / N V IO5 _ / N V IO6 _ / N V IO7 _ / N V IO8 _ / N V IO9 _ NV_I O10 NV_I O11 NV_I O12 NV_I O13 NV_I O14 NV_I O15 NV A E _ L NV_CL E NV_RCO M P AY9 BD1 AP 5 1 BD8 AV 9 BG8 AP 7 AP 6 AT 6 AT 9 BB 1 AV 6 BB 3 BA 4 BE 4 BB 6 BD6 BB 7 BC8 BJ8 BJ6 BG6 BD3 AY6
Bo ot B IO S S tr ap
PC I_GNT# 0 0 0 1 1 PCI _GNT#1 0 1 0 1 Bo ot BIO S Loca tion L PC R eserve d P CI S PI
(NA ND)
R 351 R 345
* K 04 1 _ * K 04 1 _
P I_GNT#0 C P I_GNT#1 C
Understand t he RED FONT define

R35 0 *1K_04 PCI_ GNT #3
NV RA M
AU2 AV 7 AY8 AY5 AV 1 1 BF 5
PC I
NV_RB# NV_WR# 0_RE# NV_WR# 1_RE# NV_WE#_CK0 NV_WE#_CK1 USB P0N USBP P 0 USB P1N USBP P 1 USB P2N USBP P 2 USB P3N USBP P 3 USB P4N USBP P 4 USB P5N USBP P 5 USB P6N USBP P 6 USB P7N USBP P 7 USB P8N USBP P 8 USB P9N USBP P 9 US BP10N USB P10 P US BP11N USB P11 P US BP12N USB P12 P US BP13N USB P13 P
BAC KLI GHT CONT ROL FRO M IG PU/D GPU
DGPU_ S ELECT # PCI_I RDY# PCI_D E VSEL# PCI_FRAM E# PCI_L OCK# PCI_ST P O # PCI_TRDY# 36 13, 29 PM E# PLT RST _ # A 2 4 H4 4 F 6 4 C4 6 D4 9
H18 J18 A18 C18 N20 P20 J20 L20 F20 G20 A20 C20 M 22 N22 B21 D21 H22 J22 E22 F22 A22 C22 G24 H24 L24 M 24 A24 C24
USB_PN0 USB_PP 0 USB_PN1 USB_PP 1 USB_PN2 USB_PP 2 USB_PN3 US B_PP3 USB_PN4 USB_PP 4 USB_PN5 USB_PP 5
30 30 30 30 29 29 28 28 30, 33 30, 33 29 29
USB PORT0 USB PORT1 3G WLAN FINGER CCD
USB_PN8 USB_PP 8 USB_PN9 USB_PP 9 USB_PN10 USB_PP 0 1 USB_PN11 USB_PP 1 1
30 30 28 28 30 30 33 33
U SB
USB PORT3 NEW CARD USB PORT2 BT
B25 D25
USB_BIAS
R499
22. 6_1%_0 4
PIN PLT_RST# to Buffer

20 CLK_PCI _FB 36 PCLK_KB C 29 PCLK_T PM
R505 R341 R211
R293 R279
10K_0 4 10K_0 4
3.3 V
PLT _R S T#
USB_OC #67 USB_OC #01
R3 14 R2 63
10K_0 4 10K_0 4
2,10 ,11 ,12 ,13, 19, 20, 21,2 2,2 4,25 ,26 ,28 ,29, 30, 32, 33,3 5,3 6,37 ,42 ,43 ,46 3. 3VS 3,4 ,12, 13, 17, 19,2 0,2 1,24 ,26 ,28 ,29, 31, 32, 33,3 4,3 7,39 ,40 ,41 ,44 3. 3V
Schematic Diagrams
IBEXPEAK - M 6/9
IBEXPEAK - M (GPIO,VSS_NCTF,RSVD)
U 43F E D P _ C A R D _D E T # 021 3 3 .3 V S R4 4 6 S_GP IO CHANG TO ED E P_CARD_D ET# 1 K _ 1 % _ 04 ED P_ C ARD _ D E T # 36 S M I# S MI # D G P U _ H P D _ I N TR # S CI # P CH _ M UT E # 35 P C H _ MU T E # E D I D _ S E LE C T # H O S T _ A L E R T #1 3 .3 V S R2 5 2 1 0 K_ 0 4 BIO S_ R EC DG P U _ HO L D_ R S T # R 251 * 0 _ 04 D G P U _ P W R OK B IO S _ RE C A A2 S A T A 4 GP / G P I O 1 6 F3 8 T A C H 0 / G P I O 17 Y 7 H 10 M E M _ L E D / GP I O2 4 R4 5 3 *1 0 K _ 0 4 C R B _S V _ D E T 12 S B _B L ON SB_ BL O N S P I_ C S # 2 AB1 2 G PIO 2 7 V1 3 G PIO 2 8 M 11 S TP _ P C I # / GP I O3 4 1 0 0 K_ 0 4 GP I O3 5 dG P U _ P W R _ E N # _R DG P U _ P RS NT # 3 .3 V S R2 8 0 1 0 K_ 0 4 S V _S E T _ U P MF G _ M OD E R 291 * 0 _ 04 4 D R A M R S T_ C N TR L _ P C H 3. 3V 3 C R I T_ T E M P _ R E P # R4 7 0 R2 6 5 R2 8 9 R4 7 1 R2 8 3 1 0 K_ 0 4 1 K_ 0 4 1 0 K_ 0 4 1 0 K_ 0 4 1 0 K_ 0 4 D R A M R S T_ C N T R L _ P C H H OS T_ A L E R T # 1 P C H _M U TE # S P I_ CS # 2 E D I D _S E L E C T # A4 A4 9 A5 A5 0 A5 2 A5 3 B2 B4 B5 2 B5 3 B E1 BE5 3 B F1 BF5 3 BH 1 BH 2 BH 5 2 BH 5 3 BJ 1 BJ 2 BJ 4 BJ 4 9 BJ 5 BJ 5 0 BJ 5 2 BJ 5 3 D 1 D 2 D 53 E1 E5 3 V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V SS_ N SS_ N SS_ N SS_ N SS_ N SS_ N SS_ N SS_ N SS_ N SS_ N SS_ N SS_ N SS_ N SS_ N SS_ N SS_ N SS_ N SS_ N SS_ N SS_ N SS_ N SS_ N SS_ N SS_ N SS_ N SS_ N SS_ N SS_ N SS_ N SS_ N SS_ N CT F _ 1 CT F _ 2 CT F _ 3 CT F _ 4 CT F _ 5 CT F _ 6 CT F _ 7 CT F _ 8 CT F _ 9 CT F _ 1 0 CT F _ 1 1 CT F _ 1 2 CT F _ 1 3 CT F _ 1 4 CT F _ 1 5 CT F _ 1 6 CT F _ 1 7 CT F _ 1 8 CT F _ 1 9 CT F _ 2 0 CT F _ 2 1 CT F _ 2 2 CT F _ 2 3 CT F _ 2 4 CT F _ 2 5 CT F _ 2 6 CT F _ 2 7 CT F _ 2 8 CT F _ 2 9 CT F _ 3 0 CT F _ 3 1 R2 9 4 R4 4 3 *0 _ 0 4 1 0 K_ 0 4 DR A M R S T _ CN T RL _ P C H SV_ SET _ U P C R I T _ T E MP _R E P #_ R P C H _ G P I O5 7 CR B _ SV_ D E T V3 S LO A D / G P I O 3 8 P3 S D A T A OU T 0 / G P I O 39 H 3 P C I E C L K R Q 6# / GP I O4 5 F1 P C I E C L K R Q 7# / GP I O4 6 A B6 S D A T A OU T 1 / G P I O 48 A A4 S A T A 5 GP / G P I O 4 9 F8 G PIO 5 7 TP9 N1 8 TP 10 AJ 2 4 TP 11 TP8 M1 8 TP7 AF1 3 TP6 AV4 5 TP5 AV4 3 TP4 AY 4 6 TP3 AY 4 5 V6 S A T A C LK R E Q# / G P I O 3 5 A B7 S A T A 2 GP / G P I O 3 6 AB1 3 S A T A 3 GP / G P I O 3 7 TP2 BB2 2 TP1 AW 2 2 BA2 2 C L K O UT _ B C L K 0 _ P / C L K O UT _ P C IE 8 P BG 1 0 S C L O C K / G P I O 22 P E CI T1 RC IN# BE1 0 C L K O U T _ B C L K 0 _ N / C LK OU T _ P C I E 8 N AM 1 H_ P E CI_ R R 45 5 1 0 K_ 0 4 K9 L A N _ P H Y _ P W R _C T R L / GP I O1 2 T7 G PIO 1 5 AM 3 B C LK _ C P U _ N 4 R 303 R 302 3 .3 VS K B C_ R S T # 3 6 H _ CP U P W RG D R 28 2 56_04 R 292 56 _ 0 4 4 *1 0 K _ 0 4 0_ 0 4 1 .1 V S _ V T T B C LK _ C P U _ P 4 A 2 0G A T E C 38 T A C H 1 / G PIO 1 D 37 T A C H 2 / G PIO 6 J32 T A C H 3 / G PIO 7 F1 0 G PIO 8 U2 G A2 0 36 AF4 8 AF4 7 R 47 2 1 0 K_ 0 4 3. 3V S Y 3 B MB U S Y # / G P I O 0 C LK OU T _ P C I E 6 N C L K O UT _ P C IE 6 P AH 4 5 AH 4 6
DGPU HDP (N CONTRO BYSELF V L ) R 445 * 0 _ 04 36 S C I#
MISC
C LK OU T _ P C I E 7 N C L K O UT _ P C IE 7 P
GPIO
BIOS RECOVERY DISABLE----NO STUFF (DEFAULT) ENABLE-----STUFF
H_ P E CI
4 ,3 6
CPU
P R OC P W R G D BD 1 0 T HR M T RIP #
3 .3 V S
1. 1V S _ V T T
CRB/SV DETECT NO STUFF [DETECT]
R 454
S T P_ PC I#
H _ TH R MT R I P # 4 Con nected t PCH (T o HRMTRIP #) Rou ting gui delines availab in le Cal pella De sign Gui de. NOT E: CRB u ses a 54 O ? % .9 ser ies resi stor and 56-O p ull-up.
NCTF
RSVD
AK4 1 TP 12 AK4 2 TP 13 M3 2 TP 14 N3 2 TP 15 M3 0 TP 16 N3 0 TP 17 H1 2 TP 18 AA2 3 TP 19 AB4 5 N C _1 AB3 8 N C _2 AB4 2 N C _3 AB4 1 N C _4 T39 N C _5 P6 I N I T 3 _3 V # C1 0 TP 24
3 .3 V S
R3 1 9 R3 3 0 R4 6 3 R2 7 1 R2 6 1 R5 0 2 R4 4 8 R4 5 6 R2 7 0 R2 6 9
1 0 K_ 0 4 1 0 K_ 0 4 1 0 K_ 0 4 1 0 K_ 0 4 1 K_ 0 4 1 0 K_ 0 4 1 0 K_ 0 4 1 0 K_ 0 4 1 0 K_ 0 4 *1 0 K _ 0 4
SC I# SM I# M F G _M O D E S T P _ P C I# d G P U_ P W R_ E N# _ R D GP U _ H P D _ I N T R # D GP U _ H OL D _ R S T # C RIT _ T E M P _ R E P # _ R D GP U _ P R S N T #
LOW: DGPU PRESENT

R3 2 7 R4 5 8 *1 0 K _ 0 4 1 0 K_ 0 4 D GP U _ P W R O K G P I O 35
I BEXPEA K
2 , 4 , 6 , 7 , 1 9 , 2 0 , 2 1 , 2 5 , 2 6 , 3 9, 41 , 4 2 , 4 3 1 . 1 V S _V T T 3 , 4 , 1 2, 13 , 1 7 , 1 9 , 2 0 , 2 1 , 2 3 , 2 6, 28 , 2 9 , 3 1 , 3 2 , 3 3 , 3 4 , 3 7 , 3 9, 40 , 4 1 , 4 4 3 . 3 V 2 , 1 0 , 1 1 , 1 2 , 1 3, 19 , 2 0 , 2 1 , 2 2 , 2 3 , 2 5 , 2 6, 28 , 2 9 , 3 0 , 3 2 , 3 3 , 3 5 , 3 6 , 3 7, 42 , 4 3 , 4 6 3 . 3 V S
Schematic Diagrams
IBEXPEAK - M 7/9
IBEXPEAK - M (POWER)
V CC A _ D A C_ 1 .2 1 .1 VS_ V T T U 43G AB2 4 AB2 6 AB2 8 AD 2 6 AD 2 8 AF2 6 AF2 8 AF3 0 AF3 1 AH 2 6 AH 2 8 AH 3 0 AH 3 1 AJ 3 0 AJ 3 1 VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC C C C C C C C C C C C C C C C CO CO CO CO CO CO CO CO CO CO CO CO CO CO CO R R R R R R R R R R R R R R R E [1 ] E [2 ] E [3 ] E [4 ] E [5 ] E [6 ] E [7 ] E [8 ] E [9 ] E [1 0 ] E [1 1 ] E [1 2 ] E [1 3 ] E [1 4 ] E [1 5 ]
APL5603-33B 6-02-56033-4C0 G9091-330T11UF 6-02-90913-4C0

3 .3 VS
L47 H C B 1 6 0 8 K F -1 2 1 T 2 5
.
U 44 5 OU T IN 1 R 5 24 3 S H D N# 2 S ET G ND
POWER
V C CA DA C [1 ] V C CA DA C [2 ]
5 VS
AE5 0 AE5 2 R5 0 7 *0 _ 0 4 C 656 C 651 +C 6 6 6 0 . 0 1 u _ 1 6V _ X7 R _ 0 4 0 . 1 u _ 1 6 V _ Y 5 V _0 4 1 0 0 u _ 6. 3V _ B _ A C 65 7
C 421
C 4 46
C 1 1 27 *1 u _ 6 . 3V _ X5 R _ 0 4
CRT
1 0 u _ 6 .3 V_ X5 R_ 0 6 1 u _6 . 3 V _X 5 R _ 0 4
AF5 3 V S S A _ DA C [1 ] AF5 1 V S S A _ DA C [2 ]
* 23 . 7 k _ 1 % _ 0 4 4 1 0 u_ 6 . 3 V _ X 5 R _ 06 R 5 25 * 10 k _ 1 % _ 0 4
VCC CORE
* A P L 5 6 0 3 -3 3 B
3 . 3 V S _V C C A _ L V D A H3 8 V CC AL VD S A H3 9 V SSA_ L VD S AP4 3 AP4 5 AT4 6 AT4 5 C4 9 7 AB3 4 V C C3 _ 3 [2 ] AB3 5 V C C3 _ 3 [3 ] V C C3 _ 3 [4 ] A D3 5 3 .3 V S 0. 01 u _ 1 6 V _ X 7 R _ 0 4 0 . 0 1 u _ 1 6V _X 7 R _ 0 4 C 498 C4 9 4 2 2 u_ 6 . 3 V _ X 5 R _0 8 R3 5 4 *0 _ 0 4 R 361 0 _ 04
3 .3 V S
1 .1 V S_ VT T
1. 8V S _ V C C T X _ L V D L34 H C B 1 6 0 8 K F -1 2 1 T 2 5
1 .8 V S
LVDS
1. 1V S _ V C C A P L L_ E XP
AK2 4 V C C I O[ 24 ] BJ 2 4 VC C APL L EXP
1 .1 V S _ V T T
HVCMOS
C 443
C 445
C4 5 4 1u _ 6 . 3 V _ X 5 R _ 0 4
1 0 u _ 6 . 3 V _ X 5R _ 0 6 1 u_ 6 . 3 V _ X 5 R _0 4
DMI
PCI E*
1 . 1 V S _ 1. 5 V S _ 1 . 8 V S
3 .3 V S AN 3 5
NAND / SPI
1 .1 VS_ VT T
1. 1V S _ V C C A P L L_ F D I AT2 2
L 43 * H C B 1 0 0 5 K F -1 2 1 T 2 0
V C C I O[ 1] *1 0 U _ 6 . 3 V _ 0 6
FDI
C6 2 9
1 . 1 V S _ V TT R3 1 5 0 _0 4
1 . 1 V S _V T T
1 .8 VS
R3 1 0 R3 0 9
.
C4 4 8 1 u_ 6 . 3 V _ X 5 R _ 04 0 _0 4 *0 _ 0 4
L42 * B K P 1 0 0 5 H S 12 1 _ 0 4
VC VC VC VC
CT X _ L V D CT X _ L V D CT X _ L V D CT X _ L V D
S[1 ] S[2 ] S[3 ] S[4 ]
R 35 2 *0 _ 0 4
C6 3 0 1 0 u_ 6 . 3 V _ X 5 R _ 06 AN 2 0 AN 2 2 AN 2 3 AN 2 4 AN 2 6 AN 2 8 BJ 2 6 BJ 2 8 AT2 6 AT2 8 AU 2 6 AU 2 8 AV2 6 AV2 8 A W26 A W28 BA2 6 BA2 8 BB2 6 BB2 8 BC 2 6 BC 2 8 BD 2 6 BD 2 8 BE2 6 BE2 8 BG 2 6 BG 2 8 BH 2 7 AN 3 0 AN 3 1 VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC C C C C C C C C C C C C C C C C C C C C C C C C C C C C C I O[ I O[ I O[ I O[ I O[ I O[ I O[ I O[ I O[ I O[ I O[ I O[ I O[ I O[ I O[ I O[ I O[ I O[ I O[ I O[ I O[ I O[ I O[ I O[ I O[ I O[ I O[ I O[ I O[ 25 ] 26 ] 27 ] 28 ] 29 ] 30 ] 31 ] 32 ] 33 ] 34 ] 35 ] 36 ] 37 ] 38 ] 39 ] 40 ] 41 ] 42 ] 43 ] 44 ] 45 ] 46 ] 47 ] 48 ] 49 ] 50 ] 51 ] 52 ] 53 ]
C4 6 3 0. 1u _ 1 6 V _ Y 5V _ 04 1. 1V S _ 1 . 5 V S _ 1 . 8 V S AT2 4 VC C VRM [2 ] AT1 6 V C C DM I[1 ] A U1 6 V C C DM I[2 ] C4 1 8 1 u _ 6 .3 V _ X 5 R_ 0 4 VC VC VC VC VC VC VC VC VC C C C C C C C C C PN PN PN PN PN PN PN PN PN AND AND AND AND AND AND AND AND AND [1 ] [2 ] [3 ] [4 ] [5 ] [6 ] [7 ] [8 ] [9 ] A M1 6 AK1 6 AK2 0 AK1 9 AK1 5 AK1 3 A M1 2 A M1 3 A M1 5 1 .1 VS _ VT T
C4 4 0 1 u _6 . 3 V _X 5 R _ 0 4
V _ NV RA M _ V C CQ R 3 07 C4 1 5 0. 1u _ 1 6 V _ Y 5V _ 04 R 3 06 0_04 * 0 _ 04
1 .8 V S
3 .3 V S
V C C I O[ 54 ] V C C I O[ 55 ]
V C C 3 _3 [ 1 ]
V C C V R M[ 1 ] BJ 1 8 V C C F D IP L L AM 2 3
VC VC VC VC
C C C C
ME 3 _ 3 [ 1 ] ME 3 _ 3 [ 2 ] ME 3 _ 3 [ 3 ] ME 3 _ 3 [ 4 ]
A M8 A M9 AP1 1 AP9
3 .3 V S
C4 6 6 IB EXPEA K 1 .1 VS_ VC CD PL L _ F D I 0. 1u _ 1 6 V _ Y 5V _ 04
1 2 , 1 9 , 2 2 , 2 6 , 3 0 , 3 3, 35 , 3 7 , 4 2 , 4 3 , 4 6 2 , 1 0 , 1 1 , 1 2, 13 , 1 9 , 2 0 , 2 1 , 2 2 , 2 3 , 2 4, 26 , 2 8 , 2 9 , 3 0 , 3 2 , 3 3 , 3 5, 36 , 3 7 , 4 2 , 4 3 , 4 6 2 , 4 , 6 , 7 , 1 9 , 2 0 , 2 1 , 2 4, 26 , 3 9 , 4 1 , 4 2 , 4 3 26 7 ,3 7 ,3 9
5 VS 3 .3 V S 1 .1 V S _ V T T 1 .1 V S _ 1 .5 V S _ 1 .8 V S 1 .8 V S
1. 1V S _ 1 . 5 V S _ 1 . 8 V S
Schematic Diagrams
IBEXPEAK - M 8/9
IBEXPEAK - M (POWER)
L4 6 *H C B 1 0 05 K F -1 2 1T 2 0 1 . 1 V S _ V TT C6 5 5 1 0u _ 6 . 3V _ X 5 R _ 0 6 C6 5 4 *. 1 U _ 1 6V _0 4 AF2 3 V C C LA N [ 1 ] 1 . 1V S _V T T C4 4 4 T P _ P CH _ V CC DS W 1 u_ 6 . 3 V _X 5 R _ 0 4 C4 1 7 A D3 8 0. 1 u _ 16 V _ Y 5 V _ 0 4 A D3 9 V C C ME [ 1 ] V C C ME [ 2 ] V C C ME [ 3 ] V C C ME [ 4 ] AF4 1 V C C ME [ 5 ] AF4 2 V C C ME [ 6 ] V3 9 V C C ME [ 7 ] C4 3 2 2 2u _ 6 . 3V _ X 5 R _ 0 8 C4 8 4 1u _ 6 . 3V _ X 5 R _ 0 4 V4 1 V C C ME [ 8 ] V4 2 V C C ME [ 9 ] Y3 9 V C C ME [ 1 0 ] Y4 1 V C C ME [ 1 1 ] Y4 2 1 .1 V S _ V T T L4 4 H C B 10 0 5 K F -1 21 T 2 0 V CC RT CE X T C6 4 8 + *2 20 U _4 V _ D L4 5 H C B 10 0 5 K F -1 21 T 2 0 C 6 43 * 22 U _6 . 3 V _ X5 R _0 8 C 49 5 R5 0 6 1 u _6 . 3 V _ X5 R _0 4 *0 _ 0 4 1 . 1 V S _V C C A _ A _ D P L A U2 4 V C C V R M [ 3] BB5 1 BB5 3 B D5 1 B D5 3 C 41 9 1u _ 6 . 3V _ X 5 R _ 0 4 A H2 3 AJ 3 5 A H3 5 AF3 4 V C C I O[ 2 ] A H3 4 V C C I O[ 3 ] C 46 4 1u _ 6 . 3V _ X 5 R _ 0 4 AF3 2 V1 2 C3 9 1 C4 2 5 0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1 u _1 6 V _ Y 5 V _ 04 V CC S S T *1 u _ 6. 3 V _ 0 4 1 . 1V _ I N T_ V C C S U S Y2 2 DCP S US V C CIO [9 ] 3 .3 V A H2 2 A T 20 V C C S U S 3 _ 3[ 2 9 ] V CC V RM [4 ] 1 . 1 V S _ 1 . 5V S _1 . 8 V S A H1 9 V C C I O[ 1 0 ] A D2 0 V C C I O[ 1 1 ] AF2 2 V C C I O[ 1 2 ] V C C I O[ 1 3 ] V C C I O[ 1 4 ] V C C I O[ 1 5 ] V C C I O[ 1 6 ] V CC V CC V CC V CC V CCM V CCM V CCM V CCM I O[ 1 7 ] I O[ 1 8 ] I O[ 1 9 ] I O[ 2 0 ] E [1 3 ] E [1 4 ] E [1 5 ] E [1 6 ] A D1 9 AF2 0 AF1 9 A H2 0 AB1 9 AB2 0 AB2 2 A D2 2 AA3 4 Y3 4 Y3 5 AA3 5 1. 1 V S _ V T T 1 .1 V S _ V T T V C C S U S 3 _ 3[ 3 0 ] U2 0 V C C S U S 3 _ 3[ 3 1 ] U2 2 V C C S U S 3 _ 3[ 3 2 ] * 10 U _6 . 3 V _ 06 V C C I O[ 4 ] DCP S S T V C CS A T A P L L [1 ] V C CS A T A P L L [2 ] 1. 1 V S _ V C C A P L L AK3 AK1 C6 1 1 C 61 0 V C C 3 _3 [ 1 4 ] L41 * H C B 1 0 0 5K F -12 1 T 20 1 .1 V S _ V T T A D1 3 V CC A DP L L A [1 ] V CC A DP L L A [2 ] V CC A DP L L B [1 ] V CC A DP L L B [2 ] V C C I O[ 2 1 ] V C C I O[ 2 2 ] V C C I O[ 2 3 ] 1 . 1V S _1 . 5 V S _ 1 . 8V S V9 DCP RT C C3 9 0 0 . 1 u _1 0 V _ X7 R _0 4 V C C ME [ 1 2 ] Y2 0 DCP S US B Y P AF2 4 1 . 1 V S _ V C C A _C LK U4 3 J
Vo lt age R ai l Vol ta ge V_ CP U_I O V5 RE F

1 .1 V S _ V T T
S0 I ccm ax C urr en t (A )
1. 1/ 1. 05 < 1 (mA ) 5 < 1 (mA ) 5 3. 3 1. 05 3. 3 1. 05 1. 05 1. 05 1. 05 1. 05 1. 1 1. 05 1. 05 1. 05 1. 05 3. 3 1. 8 3. 3 1. 05 3. 3 3. 3 1. 8/ 1. 5 1. 05 3. 3 1. 8 < 1 (mA ) 0. 35 7 0. 05 2 0. 06 9 0. 06 8 0. 06 9 0. 04 0 1. 43 2 0. 05 8 0. 06 1 0. 03 7 3. 06 2 0. 32 0 1. 84 9
POWER
V C CIO [5 ] V C CIO [6 ] V C CIO [7 ] V C CIO [8 ] V C C S U S 3_ 3 [ 1 ] V C C S U S 3_ 3 [ 2 ] V C C S U S 3_ 3 [ 3 ] V C C S U S 3_ 3 [ 4 ] V C C S U S 3_ 3 [ 5 ] V C C S U S 3_ 3 [ 6 ] V C C S U S 3_ 3 [ 7 ] V C C S U S 3_ 3 [ 8 ] V C C S U S 3_ 3 [ 9 ] V C C S U S 3 _3 [ 1 0 ] V C C S U S 3 _3 [ 1 1 ] V C C S U S 3 _3 [ 1 2 ] V C C S U S 3 _3 [ 1 3 ] V C C S U S 3 _3 [ 1 4 ] V C C S U S 3 _3 [ 1 5 ] V C C S U S 3 _3 [ 1 6 ] V C C S U S 3 _3 [ 1 7 ] V C C S U S 3 _3 [ 1 8 ] V C C S U S 3 _3 [ 1 9 ] V C C S U S 3 _3 [ 2 0 ] V C C S U S 3 _3 [ 2 1 ] V C C S U S 3 _3 [ 2 2 ] V C C S U S 3 _3 [ 2 3 ] V C C S U S 3 _3 [ 2 4 ] V C C S U S 3 _3 [ 2 5 ] V C C S U S 3 _3 [ 2 6 ] V C C S U S 3 _3 [ 2 7 ] V C C S U S 3 _3 [ 2 8 ] V2 3 V C C I O[ 5 6 ] F24 V 5 RE F _ S US V2 4 V2 6 Y2 4 Y2 6 V2 8 U2 8 U2 6 U2 4 P2 8 P2 6 N2 8 N2 6 M2 8 M2 6 L2 8 L2 6 J2 8 J2 6 H2 8 H2 6 G2 8 G2 6 F28 F26 E2 8 E2 6 C2 8 C2 6 B2 7 A2 8 A2 6 U2 3
52mA
AP5 1 V CC A CL K [1 ] AP5 3 V CC A CL K [2 ]
V5 RE F_S us Vc c3 _3 Vc cA Clk Vc cA DAC Vc cA DPL LA

3 . 3V
C4 5 5 1 u_ 6 . 3 V _X 5 R _ 0 4
320mA
V C C LA N [ 2 ]
142.6mA
C4 2 9 0 . 1u _ 1 6V _ Y 5V _ 0 4
Vc cA DPL LB Vc ca pll EX P Vc cC ore Vc cD MI Vc cD MI Vc cF DIP LL Vc cI O Vc cL AN Vc cM E Vc cM E3_ 3 Vc cp NAN D Vc cR TC Vc cS ATA PL L Vc cS us3 _3 Vc cS usH DA Vc cV RM Vc cV RM Vc cA LVD S Vc cT X_L VD S
1849mA
1 . 1V S _V T T C4 5 3 2 2u _ 6 . 3V _ X 5 R _ 0 8 C4 3 8 1u _ 6 . 3V _ X 5 R _ 0 4
A D4 1 AF4 3
U SB
3 .3 V _ V CC P US B R 3 11 C4 3 1 0 . 1u _ 1 6V _ Y 5V _ 0 4 * 20 m i l_ s h ort
0. 08 5 0. 15 6 2 (m A) 0. 03 1 0. 16 3 0. 00 6 0. 19 6 < 1 (mA ) < 1 (mA ) 0. 05 9
Cl oc k and M is ce ll an eo us
1. 1 V S _ V T T 5 V _P C H _ V C C 5 R E F S U S D1 4 C R 31 7 C4 2 8 1 u_ 6 . 3 V _X 5 R _ 0 4 V CC 5 RE F S C S 55 1 V -3 0 A 3 .3 V 10 0 _ 04 5V
D 18 C R3 5 5 C 4 96
S C S 5 5 1 V -30 A 1 0 0_ 0 4
3. 3 V S 5V S
V 5 RE F
K4 9 J3 8
68mA
1 . 1 V S _V C C A _ B _ D P L
P CI /GP IO /L PC
V C C 3_ 3 [ 8 ] L3 8 V C C 3_ 3 [ 9 ] M3 6 V C C 3 _3 [ 1 0 ] N3 6 V C C 3 _3 [ 1 1 ] P3 6 V C C 3 _3 [ 1 2 ] U3 5 V C C 3 _3 [ 1 3 ] 0 . 1u _ 1 6V _ Y 5V _ 0 4 C4 4 1 C4 0 1 0 . 1u _ 1 6V _ Y 5V _ 0 4
3. 3V S
1 u _ 6. 3 V _ X 5R _ 04
69mA
C6 4 7 + *2 20 U _4 V _ D C 6 50 * 22 U _6 . 3 V _ X5 R _0 8 C 49 3 1 u _6 . 3 V _ X5 R _0 4
3. 3V S
C 42 6
1u _ 6 . 3V _ X 5 R _ 0 4
VCCIO 3062mA
1 .1 V S _ V T T
20.4mA
C4 3 0 0. 1 u _ 16 V _ Y 5 V _ 0 4
P1 8
3 .3 V S
357mA
C4 0 6 0. 1 u _ 16 V _ Y 5 V _ 0 4
V1 5 V C C 3_ 3 [ 5 ] V1 6 V C C 3_ 3 [ 6 ] Y1 6 V C C 3_ 3 [ 7 ]
PC I/ GP IO/ LP C
SATA
U1 9
C4 3 4 1 u_ 6 . 3 V _X 5 R _ 0 4 2 , 4 , 6, 7, 1 9 , 2 0, 2 1 , 2 4, 2 5 , 3 9, 4 1 , 4 2, 4 3 1 . 1 V S _V TT 25 1 . 1 V S _1 . 5 V S _ 1 . 8V S 3 , 4 , 1 2, 13 , 1 7 , 19 , 2 0 , 21 , 2 3 , 24 , 2 8 , 29 , 3 1 , 32 , 3 3 , 3 4, 3 7 , 3 9, 4 0 , 4 1, 4 4 3 .3 V 2, 1 0 , 1 1, 1 2 , 1 3, 19 , 2 0 , 21 , 2 2 , 23 , 2 4 , 25 , 2 8 , 29 , 3 0 , 32 , 3 3 , 3 5, 3 6 , 3 7, 4 2 , 4 3, 4 6 3 .3 V S 1 2 , 19 , 2 2 , 25 , 3 0 , 3 3, 3 5 , 3 7, 4 2 , 4 3, 4 6 5 VS 2 9 , 30 , 3 1 , 3 5, 3 7 , 3 9, 4 0 , 4 1, 4 4 5V 19 RT C V CC
1 . 1 V S _ V TT C4 2 2 1 u _6 . 3 V _ X5 R _0 4 0 . 1u _ 1 6V _ Y 5V _ 0 4 RT CV C C C4 1 1 0 . 1u _ 1 6V _ Y 5V _ 0 4 C4 1 0 C4 5 1 C4 2 3
<1mA
0. 1 u _ 16 V _ Y 5 V _ 0 4
AT1 8 V _C P U _ I O [ 1] A U1 8 V _C P U _ I O [ 2]
CP U
3 .3 V L3 0 C4 5 0 1 u_ 6 . 3 V _ X5 R _ 0 4
IB E X P E A K 0. 1 u _ 16 V _ Y 5 V _ 0 4
HD A
V CC RT C
RT C
2mA
A1 2
V C CS U S HDA
Schematic Diagrams
IBEXPEAK - M 9/9
IBEXPEAK - M (GND)
AY 7 B1 1 B1 5 B1 9 B2 3 B3 1 B3 5 B3 9 B4 3 B4 7 B7 BG 1 2 B B1 2 B B1 6 B B2 0 B B2 4 B B3 0 B B3 4 B B3 8 B B4 2 B B4 9 B B5 BC 1 0 BC 1 4 BC 1 8 BC 2 BC 2 2 BC 3 2 BC 3 6 BC 4 0 BC 4 4 BC 5 2 BH 9 BD 4 8 BD 4 9 BD 5 B E1 2 B E1 6 B E2 0 B E2 4 B E3 0 B E3 4 B E3 8 B E4 2 B E4 6 B E4 8 B E5 0 B E6 B E8 B F3 B F4 9 B F5 1 BG 1 8 BG 2 4 BG 4 BG 5 0 BH 1 1 BH 1 5 BH 1 9 BH 2 3 BH 3 1 BH 3 5 BH 3 9 BH 4 3 BH 4 7 BH 7 C 12 C 50 D 51 E1 2 E1 6 E2 0 E2 4 E3 0 E3 4 E3 8 E4 2 E4 6 E4 8 E6 E8 F4 9 F5 G10 G14 G18 G2 G22 G32 G36 G40 G44 G52 A F3 9 H 16 H 20 H 30 H 34 H 38 H 42 U 43I V SS [ 1 59 ] V SS [ 1 60 ] V SS [ 1 61 ] V SS [ 1 62 ] V SS [ 1 63 ] V SS [ 1 64 ] V SS [ 1 65 ] V SS [ 1 66 ] V SS [ 1 67 ] V SS [ 1 68 ] V SS [ 1 69 ] V SS [ 1 70 ] V SS [ 1 71 ] V SS [ 1 72 ] V SS [ 1 73 ] V SS [ 1 74 ] V SS [ 1 75 ] V SS [ 1 76 ] V SS [ 1 77 ] V SS [ 1 78 ] V SS [ 1 79 ] V SS [ 1 80 ] V SS [ 1 81 ] V SS [ 1 82 ] V SS [ 1 83 ] V SS [ 1 84 ] V SS [ 1 85 ] V SS [ 1 86 ] V SS [ 1 87 ] V SS [ 1 88 ] V SS [ 1 89 ] V SS [ 1 90 ] V SS [ 1 91 ] V SS [ 1 92 ] V SS [ 1 93 ] V SS [ 1 94 ] V SS [ 1 95 ] V SS [ 1 96 ] V SS [ 1 97 ] V SS [ 1 98 ] V SS [ 1 99 ] V SS [ 2 00 ] V SS [ 2 01 ] V SS [ 2 02 ] V SS [ 2 03 ] V SS [ 2 04 ] V SS [ 2 05 ] V SS [ 2 06 ] V SS [ 2 07 ] V SS [ 2 08 ] V SS [ 2 09 ] V SS [ 2 10 ] V SS [ 2 11 ] V SS [ 2 12 ] V SS [ 2 13 ] V SS [ 2 14 ] V SS [ 2 15 ] V SS [ 2 16 ] V SS [ 2 17 ] V SS [ 2 18 ] V SS [ 2 19 ] V SS [ 2 20 ] V SS [ 2 21 ] V SS [ 2 22 ] V SS [ 2 23 ] V SS [ 2 24 ] V SS [ 2 25 ] V SS [ 2 26 ] V SS [ 2 27 ] V SS [ 2 28 ] V SS [ 2 29 ] V SS [ 2 30 ] V SS [ 2 31 ] V SS [ 2 32 ] V SS [ 2 33 ] V SS [ 2 34 ] V SS [ 2 35 ] V SS [ 2 36 ] V SS [ 2 37 ] V SS [ 2 38 ] V SS [ 2 39 ] V SS [ 2 40 ] V SS [ 2 41 ] V SS [ 2 42 ] V SS [ 2 43 ] V SS [ 2 44 ] V SS [ 2 45 ] V SS [ 2 46 ] V SS [ 2 47 ] V SS [ 2 48 ] V SS [ 2 49 ] V SS [ 2 50 ] V SS [ 2 51 ] V SS [ 2 52 ] V SS [ 2 53 ] V SS [ 2 54 ] V SS [ 2 55 ] V SS [ 2 56 ] V SS [ 2 57 ] V SS [ 2 58 ] VS S[ 2 5 9 ] VS S[ 2 6 0 ] VS S[ 2 6 1 ] VS S[ 2 6 2 ] VS S[ 2 6 3 ] VS S[ 2 6 4 ] VS S[ 2 6 5 ] VS S[ 2 6 6 ] VS S[ 2 6 7 ] VS S[ 2 6 8 ] VS S[ 2 6 9 ] VS S[ 2 7 0 ] VS S[ 2 7 1 ] VS S[ 2 7 2 ] VS S[ 2 7 3 ] VS S[ 2 7 4 ] VS S[ 2 7 5 ] VS S[ 2 7 6 ] VS S[ 2 7 7 ] VS S[ 2 7 8 ] VS S[ 2 7 9 ] VS S[ 2 8 0 ] VS S[ 2 8 1 ] VS S[ 2 8 2 ] VS S[ 2 8 3 ] VS S[ 2 8 4 ] VS S[ 2 8 5 ] VS S[ 2 8 6 ] VS S[ 2 8 7 ] VS S[ 2 8 8 ] VS S[ 2 8 9 ] VS S[ 2 9 0 ] VS S[ 2 9 1 ] VS S[ 2 9 2 ] VS S[ 2 9 3 ] VS S[ 2 9 4 ] VS S[ 2 9 5 ] VS S[ 2 9 6 ] VS S[ 2 9 7 ] VS S[ 2 9 8 ] VS S[ 2 9 9 ] VS S[ 3 0 0 ] VS S[ 3 0 1 ] VS S[ 3 0 2 ] VS S[ 3 0 3 ] VS S[ 3 0 4 ] VS S[ 3 0 5 ] VS S[ 3 0 6 ] VS S[ 3 0 7 ] VS S[ 3 0 8 ] VS S[ 3 0 9 ] VS S[ 3 1 0 ] VS S[ 3 1 1 ] VS S[ 3 1 2 ] VS S[ 3 1 3 ] VS S[ 3 1 4 ] VS S[ 3 1 5 ] VS S[ 3 1 6 ] VS S[ 3 1 7 ] VS S[ 3 1 8 ] VS S[ 3 1 9 ] VS S[ 3 2 0 ] VS S[ 3 2 1 ] VS S[ 3 2 2 ] VS S[ 3 2 3 ] VS S[ 3 2 4 ] VS S[ 3 2 5 ] VS S[ 3 2 6 ] VS S[ 3 2 7 ] VS S[ 3 2 8 ] VS S[ 3 2 9 ] VS S[ 3 3 0 ] VS S[ 3 3 1 ] VS S[ 3 3 2 ] VS S[ 3 3 3 ] VS S[ 3 3 4 ] VS S[ 3 3 5 ] VS S[ 3 3 6 ] VS S[ 3 3 7 ] VS S[ 3 3 8 ] VS S[ 3 3 9 ] VS S[ 3 4 0 ] VS S[ 3 4 1 ] VS S[ 3 4 2 ] VS S[ 3 4 3 ] VS S[ 3 4 4 ] VS S[ 3 4 5 ] VS S[ 3 4 6 ] VS S[ 3 4 7 ] VS S[ 3 4 8 ] VS S[ 3 4 9 ] VS S[ 3 5 0 ] VS S[ 3 5 1 ] VS S[ 3 5 2 ] VS S[ 3 5 3 ] VS S[ 3 5 4 ] VS S[ 3 5 5 ] VS S[ 3 5 6 ] VS S[ 3 6 6 ] H 49 H5 J 24 K1 1 K4 3 K4 7 K7 L 14 L 18 L2 L 22 L 32 L 36 L 40 L 52 M1 2 M1 6 M2 0 N 38 M3 4 M3 8 M4 2 M4 6 M4 9 M5 M8 N 24 P1 1 AD 1 5 P2 2 P3 0 P3 2 P3 4 P4 2 P4 5 P4 7 R2 R 52 T12 T41 T46 T49 T5 T8 U 30 U 31 U 32 U 34 P3 8 V1 1 P1 6 V1 9 V2 0 V2 2 V3 0 V3 1 V3 2 V3 4 V3 5 V3 8 V4 3 V4 5 V4 6 V4 7 V4 9 V5 V7 V8 W2 W 52 Y 11 Y 12 Y 15 Y 19 Y 23 Y 28 Y 30 Y 31 Y 32 Y 38 Y 43 Y 46 P4 9 Y5 Y6 Y8 P2 4 T43 AD 5 1 AT8 AD 4 7 Y 47 AT1 2 AM6 AT1 3 AM5 AK 4 5 AK 3 9 AV 1 4
AB 1 6 AA 1 9 AA 2 0 AA 2 2 A M1 9 AA 2 4 AA 2 6 AA 2 8 AA 3 0 AA 3 1 AA 3 2 AB 1 1 AB 1 5 AB 2 3 AB 3 0 AB 3 1 AB 3 2 AB 3 9 AB 4 3 AB 4 7 AB 5 AB 8 A C2 A C 52 A D 11 A D 12 A D 16 A D 23 A D 30 A D 31 A D 32 A D 34 A U 22 A D 42 A D 46 A D 49 A D7 AE 2 AE 4 AF 1 2 Y 13 A H 49 A U4 AF 3 5 AP 1 3 A N 34 AF 4 5 AF 4 6 AF 4 9 AF 5 AF 8 A G2 A G52 A H 11 A H 15 A H 16 A H 24 A H 32 AV 1 8 A H 43 A H 47 A H7 A J 19 AJ2 A J 20 A J 22 A J 23 A J 26 A J 28 A J 32 A J 34 A T5 AJ4 AK 1 2 A M4 1 A N 19 AK 2 6 AK 2 2 AK 2 3 AK 2 8
U 43H VS S[ 0 ] VS S[ 1 ] VS S[ 2 ] VS S[ 3 ] VS S[ 4 ] VS S[ 5 ] VS S[ 6 ] VS S[ 7 ] VS S[ 8 ] VS S[ 9 ] VS S[ 1 0 ] VS S[ 1 1 ] VS S[ 1 2 ] VS S[ 1 3 ] VS S[ 1 4 ] VS S[ 1 5 ] VS S[ 1 6 ] VS S[ 1 7 ] VS S[ 1 8 ] VS S[ 1 9 ] VS S[ 2 0 ] VS S[ 2 1 ] VS S[ 2 2 ] VS S[ 2 3 ] VS S[ 2 4 ] VS S[ 2 5 ] VS S[ 2 6 ] VS S[ 2 7 ] VS S[ 2 8 ] VS S[ 2 9 ] VS S[ 3 0 ] VS S[ 3 1 ] VS S[ 3 2 ] VS S[ 3 3 ] VS S[ 3 4 ] VS S[ 3 5 ] VS S[ 3 6 ] VS S[ 3 7 ] VS S[ 3 8 ] VS S[ 3 9 ] VS S[ 4 0 ] VS S[ 4 1 ] VS S[ 4 2 ] VS S[ 4 3 ] VS S[ 4 4 ] VS S[ 4 5 ] VS S[ 4 6 ] VS S[ 4 7 ] VS S[ 4 8 ] VS S[ 4 9 ] VS S[ 5 0 ] VS S[ 5 1 ] VS S[ 5 2 ] VS S[ 5 3 ] VS S[ 5 4 ] VS S[ 5 5 ] VS S[ 5 6 ] VS S[ 5 7 ] VS S[ 5 8 ] VS S[ 5 9 ] VS S[ 6 0 ] VS S[ 6 1 ] VS S[ 6 2 ] VS S[ 6 3 ] VS S[ 6 4 ] VS S[ 6 5 ] VS S[ 6 6 ] VS S[ 6 7 ] VS S[ 6 8 ] VS S[ 6 9 ] VS S[ 7 0 ] VS S[ 7 1 ] VS S[ 7 2 ] VS S[ 7 3 ] VS S[ 7 4 ] VS S[ 7 5 ] VS S[ 7 6 ] VS S[ 7 7 ] VS S[ 7 8 ] VS S[ 7 9 ] I BE XPE AK V SS [8 0 ] V SS [8 1 ] V SS [8 2 ] V SS [8 3 ] V SS [8 4 ] V SS [8 5 ] V SS [8 6 ] V SS [8 7 ] V SS [8 8 ] V SS [8 9 ] V SS [9 0 ] V SS [9 1 ] V SS [9 2 ] V SS [9 3 ] V SS [9 4 ] V SS [9 5 ] V SS [9 6 ] V SS [9 7 ] V SS [9 8 ] V SS [9 9 ] V SS [1 0 0 ] V SS [1 0 1 ] V SS [1 0 2 ] V SS [1 0 3 ] V SS [1 0 4 ] V SS [1 0 5 ] V SS [1 0 6 ] V SS [1 0 7 ] V SS [1 0 8 ] V SS [1 0 9 ] V SS [1 1 0 ] V SS [1 1 1 ] V SS [1 1 2 ] V SS [1 1 3 ] V SS [1 1 4 ] V SS [1 1 5 ] V SS [1 1 6 ] V SS [1 1 7 ] V SS [1 1 8 ] V SS [1 1 9 ] V SS [1 2 0 ] V SS [1 2 1 ] V SS [1 2 2 ] V SS [1 2 3 ] V SS [1 2 4 ] V SS [1 2 5 ] V SS [1 2 6 ] V SS [1 2 7 ] V SS [1 2 8 ] V SS [1 2 9 ] V SS [1 3 0 ] V SS [1 3 1 ] V SS [1 3 2 ] V SS [1 3 3 ] V SS [1 3 4 ] V SS [1 3 5 ] V SS [1 3 6 ] V SS [1 3 7 ] V SS [1 3 8 ] V SS [1 3 9 ] V SS [1 4 0 ] V SS [1 4 1 ] V SS [1 4 2 ] V SS [1 4 3 ] V SS [1 4 4 ] V SS [1 4 5 ] V SS [1 4 6 ] V SS [1 4 7 ] V SS [1 4 8 ] V SS [1 4 9 ] V SS [1 5 0 ] V SS [1 5 1 ] V SS [1 5 2 ] V SS [1 5 3 ] V SS [1 5 4 ] V SS [1 5 5 ] V SS [1 5 6 ] V SS [1 5 7 ] V SS [1 5 8 ] A K3 0 A K3 1 A K3 2 A K3 4 A K3 5 A K3 8 A K4 3 A K4 6 A K4 9 A K5 A K8 A L2 A L 52 A M1 1 B B4 4 A D 24 A M2 0 A M2 2 A M2 4 A M2 6 A M2 8 B A4 2 A M3 0 A M3 1 A M3 2 A M3 4 A M3 5 A M3 8 A M3 9 A M4 2 A U 20 A M4 6 A V2 2 A M4 9 A M7 A A5 0 B B1 0 A N 32 A N 50 A N 52 A P1 2 A P4 2 A P4 6 A P4 9 A P5 A P8 A R2 A R 52 A T11 B A1 2 A H 48 A T32 A T36 A T41 A T47 A T7 A V1 2 A V1 6 A V2 0 A V2 4 A V3 0 A V3 4 A V3 8 A V4 2 A V4 6 A V4 9 A V5 A V8 A W 14 A W 18 A W2 B F9 A W 32 A W 36 A W 40 A W 52 A Y 11 A Y 43 A Y 47
I B EXP EA K
Schematic Diagrams
New Card, Mini PCIE

NEW CARD
B U F _ P L T _R S T # 1 4 2 3. 3 V U 42 C 62 0 * 0 . 1u _ 1 6V _ Y 5 V _ 0 4 3. 3 V S A U XO U T C 61 4 * 0 . 1u _ 1 6V _ Y 5 V _ 0 4 1. 5 V S V O U T _3 . 3 V C 62 1 * 0 . 1u _ 1 6V _ Y 5 V _ 0 4 12 A V C C _ 1 . 5V V O U T _1 . 5 V 4, 2 3 , 3 1, 3 2 , 3 6 B U F _ P L T_ R S T# 23 , 3 1 U S B _ OC #2 3 21 , 3 1 , 35 , 3 6 , 39 S U S B # 4 5 13 14 16 B U F _ P L T _R S T # 6 19 1 ST BY# 18 20 7 21 R 4 82 R 4 79 R 4 83 R 4 76 *1 0 0K _ 0 4 *1 0 0K _ 0 4 *1 0 K _0 4 *1 0 K _0 4 3. 3 V CPP E # C PUS B # 11 10 9 2 1 , 3 1, 3 2 P CI E _W A K E # 20 , 3 1 N E W C A R D _C L K R E Q # 3 .3 V S 2 0 C L K _ P CI E _ NE W _C A R D 2 0 C L K _ P C I E _ NE W _C A RD # 20 20 20 20 P C I E _ R X P 1 _N E W _ C A R D P C IE _ RXN1 _ NE W _ CA RD P C I E _ T XP 1_ N E W _C A R D P C I E _ T XN 1 _N E W _ C A R D N C _ 1 . 5V S 2 A V C C _ 3 . 3V 3 17 A V C C_ AUX P E R S T# 15 N C _ 3 . 3V 8 13 U4 1 *M C 7 4 V H C 1G 08 D F T1 G J _ NE W 1 C6 3 3 *0 . 1 u _1 6 V _ Y 5 V _ 04 12 + 3. 3 V A U X N C _ 3 . 3V S C6 3 5 C6 4 1 *0 . 1 u _1 6 V _ Y 5 V _ 04 *0 . 1 u _1 6 V _ Y 5 V _ 04 *0 . 1 u _1 6 V _ Y 5 V _ 04 *0 . 1 u _1 6 V _ Y 5 V _ 04 9 10 17 4 11 16 R5 0 1 *1 0 K _0 4 19 18 22 21 25 24 3 2 8 7 + 1. 5 V + 1. 5 V 14 15 PE RS T # 3 3. 3 V S C 6 13 5 *. 1 U _ 1 6 V _0 4 C LK _ P C I E _N E W _ C A R D C LK _ P C I E _N E W _ C A R D # R5 7 4 R5 7 5 0_ 0 4 0_ 0 4 0_ 0 4 0_ 0 4 0_ 0 4 0_ 0 4 C L K _ P CI E _ US B 3 0 3 1 C L K _ P CI E _ US B 3 0 # 31 P C I E _ R X P 1 _ U S B 3 0 31 P C I E _ R X N 1_ U S B 30 3 1 P C I E _ T XP 1 _ U S B 30 3 1 P C I E _ T XN 1 _U S B 3 0 3 1 P C I E _R X P 1_ N E W _ CA R D R 5 7 6 P C I E _R X N 1 _ N E W _ CA R D R 5 7 7 P C I E _T X P 1 _N E W _ C A R D P C I E _T X N 1 _ N E W _ C A R D R5 7 8 R5 7 9
20 mil 40 mil 40 mil
6- 01- 74 10 8-Q 61
+ 3. 3 V + 3. 3 V
C6 2 8 C6 3 1
S Y S RS T # O C#
CP P E # CP U S B # W AKE# CL K R E Q# RE F C L K + RE F C L K R E S E RV E PE Rp 0 R E S E RV E PE Rn 0 P E T p0 GN P E T n0 GN GN GN US B _ D + GN US B _ D GN GN S MB _ D A TA GN S MB _ C LK *1 3 0 80 1 -0 2
3 . 3V
R4 8 0
*1 0 K _0 4
N N N N N
C C C C C
R C LK E N S HD N# GN D GN D
D D D D D D D D D D
5 6 1 20 23 26 G ND1 G ND2 G ND3 G ND4
NE W _ R E S E RV E D 1 NE W _ R E S E RV E D 2
Sheet 28 of 53 New Card, Mini PCIE
* P 2 23 1 NF E 2
Port 9
23 U S B _ P P 9 23 U S B _ P N 9 20 20 S ML 0 _ D A T A S ML 0 _ C L K
MINI CARD
H 12 H 6 D 2 _8 2 0, 3 3 P C H _ B T_ E N # 33 , 3 6 BT_ EN R5 7 1 R5 7 2 *0 _ 0 4 *0 _ 0 4 J_ M I N I 2 2 1, 3 1 , 3 2 P C I E _ W A K E # 3. 3V S 2 0 W L A N _ C L K R E Q# 2 0 C L K _ P CI E _M I N I # 20 C L K _ P C I E _M I N I P C I E _W A K E # R3 9 2 10 K _ 0 4 1 3 5 7 11 13 9 15 W AKE# C OE X 1 C OE X 2 C L K RE Q # R E F CL K R E F CL K + G ND 0 G ND 1 3 .3 V AUX _ 0 1 .5 V _ 0 U I M_ P W R U I M_ D A TA U I M_ C LK U I M_ R E S E T U I M_ V P P G ND 5 2 6 8 10 12 14 16 4
20 mil 20 mil
U U U U U I M_ P W R _ 1 I M_ D A T A _ 1 I M_ C L K _ 1 I M_ R S T _ 1 I M_ V P P _ 1 R5 9 0
3 .3 V W L A N 1. 5 V S R1 0 3 *0 _ 0 4 P C H _ B T _E N # C 1 38 0. 1 u _ 16 V _ Y 5 V _ 04 1. 5 V S 0 _0 6 G ND
K EY
21 27 29 3 6 W L A N_ DE T # 20 P C I E _ R X N 3 _ W LA N 2 0 P C I E _R XP 3 _ W L A N 2 0 P C I E _T X N 3 _ W LA N 2 0 P C I E _ T XP 3 _ W L A N 36 36 3 3 ,3 6 8 0D E T # 3 IN 1 B T _E N R5 7 0 R5 2 9 3 .3 V R 4 26 R 4 28 R 4 25 R 4 23 R 5 31 R5 3 * * * * 0_ 0 4 0_ 0 4 0_ 0 4 0_ 0 4 * 0_ 0 4 0 _ 04 35 23 25 31 33 17 19 37 39 41 43 45 47 49 51 G ND 2 G ND 3 G ND 4 G N D 11 P E Tn 0 P E Tp 0 P E Rn 0 P E Rp 0 R e se rv e d 0 R e se rv e d 1 G N D 12 3 .3 V A UX _ 3 3 .3 V A UX _ 4 G N D 13 R e se rv e d 2 R e se rv e d 3 R e se rv e d 4 R e se rv e d 5 88 9 1 0-5 2 0 4M -01 G ND 6 G ND 7 G ND 8 G ND 9 GN D 1 0 W _ D ISABL E# PER SET# S MB _ C LK S MB _ D A TA USB _ DUS B _ D + 3 .3 V AUX _ 1 1 .5 V _ 1 1 .5 V _ 2 3 .3 V AUX _ 2 L E D_ W W A N # L E D _W L A N # L E D_ W P A N # 18 26 34 40 50 20 22 30 32 36 38 24 28 48 52 42 44 46
R 53 0
0 _0 4
V DD 3
R 39 3 1 0 K _ 04 B U F _P L T _ RS T #
3. 3 V S W L A N _E N 3 0, 3 6 B U F _ P LT _ R S T # 4 , 23 , 3 1 , 32 , 3 6 B T_ D E T# 3 3, 3 6 U S B _ P N3 2 3 U SB_ PP3 2 3
20 mil 3 . 3 V A U X _ 1 R6 3 40 mil 20 mil

W L A N 1. 5 V S 3. 3 V
Port 3
3. 3 V S 3. 3 V S V DD 3 1. 5 V S 3. 3 V 2 , 1 0 , 11 , 1 2 , 13 , 1 9 , 20 , 2 1 , 22 , 2 3 , 24 , 2 5 , 26 , 2 9 , 30 , 3 2 , 33 , 3 5 , 36 , 3 7 , 42 , 4 3, 46 1 9 , 3 0, 3 3 , 3 6, 3 7 , 3 8, 4 4 , 4 5 37 3 , 4 , 1 2, 1 3 , 1 7, 1 9 , 2 0, 2 1 , 2 3, 2 4 , 2 6, 2 9 , 3 1, 3 2 , 3 3, 3 4 , 3 7, 3 9 , 4 0, 4 1 , 4 4
0 _ 04 R 59 9
3. 3 V *0 _0 4
20 20 20 33 , 3 6
C L _C LK 1 C L _D A TA 1 C L _R S T# 1 V DD 3 BT_ EN
W LA N _L E D # 33 , 3 6 8 0 CL K 36
0_04 * 0_ 0 4
a dd wl an le d C9 907 14
2 0, 3 3 P C H _B T_ E N #
New Card, Mini PCIE B - 29
Schematic Diagrams
3G, CCD, TPM

3G
40 mil C6 4 9
C4 9 0 J _3 G 2 1 3 5 7 11 13 9 15 W AKE# C OE X1 C OE X2 C L K R E Q# RE F C L K RE F C L K + GN D 0 GN D 1 3 .3 V A UX _ 0 1 .5 V_ 0 U I M_ P W R U I M_ D A T A U I M_ C L K U I M_ RE S E T U I M_ V P P G ND 5 2 6 8 10 12 14 16 4 GN D GN D D GN D 21 27 29 GN D 2 GN D 3 GN D 4 GN D 1 1 P E T n0 P E T p0 P E Rn 0 P E Rp 0 R e s erv ed 0 R e s erv ed 1 GN D 1 2 3. 3 V A U X _3 3. 3 V A U X _4 GN D 1 3 R e s erv ed 2 R e s erv ed 3 R e s erv ed 4 R e s erv ed 5 8 89 0 8 -52 0 4 M-0 1 G ND G ND U I M _ CL K U I M _ RS T UIM _ PW R R4 7 8 * 1 0m i l _s h o rt U I M_ C LK _R 9 7 5 3 1 GN D G ND 6 G ND 7 G ND 8 G ND 9 GN D 1 0 W _ D IS A B L E# PER SET# S MB _ C L K S MB _ D A T A US B _ D U S B _D + 3 .3 V A UX _ 1 1 .5 V_ 1 1 .5 V_ 2 3 .3 V A UX _ 2 LE D _ W W A N # L E D _W L A N # L E D_ W P A N # 18 26 34 40 50 20 22 30 32 36 38 24 28 48 52 42 44 46 3G _ 3 . 3V 3 G _E N 36 G 3 6 3 G_ P O W E R S 3 G _3 . 3 V UIM UIM UIM UIM UIM _ PW R _ DA T A _ CL K _ RS T _ VPP G 3 G _ 3. 3 V C 66 3 C6 6 4 1 0 u_ 1 0 V _ Y 5 V _ 0 8 C 48 9 C 4 92 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1 u _ 16 V _ Y 5V _ 0 4 R5 1 4 1 00 K _ 0 4 G S 1 0 K _ 04 D Q5 5 *M TN 7 00 2 Z H S 3 R 51 3 R5 9 6 *1 0 _0 6 C6 6 2 0. 1 u _ 1 6V _ Y 5V _0 4
3G POWER
+ 2 2 0 u _4 V _ V _ A 0 . 1 u _ 16 V _ Y 5V _ 0 4 G ND 3 .3 V
>48 mil
Q4 8 A O 34 1 5 S D
3 G _3 . 3 V
>48 mil
1 u _ 6. 3 V _ X 5 R _ 0 4
KEY
Q 47 M TN 7 00 2 Z H S 3
FOR ? ? ? ?
C990712
36
3 G _ DE T #
Sheet 29 of 53 3G, CCD, TPM
35 23 25 31 33 17 19 37 39 41 43 45 47 49 51
From H8 default HI
AD R D 596, Q 47 Solut ion For PDA B - W UG hen B te ry at dis charg e t o shut down, th e CMOS someti me s los s.
U SB_ PN 2 2 3 U SB_ PP2 2 3
Port 2
3 G _3 . 3 V C6 5 9 C6 6 1
SIM CONN
U I M _P W R R3 4 7 J _ S I M2 4 . 7 K _ 04 U I M _D A T A
0 . 1u _ 1 6V _Y 5 V _ 04 u _ 10 V _ Y 5V _0 8 10 G ND G ND
3G _ 3 . 3V C 66 0 + 2 20 u _ 6. 3V _ 6 . 6 *6 . 6 *5 . 9 _ C
(TOP VIEW)
D E T E C T _S W U I M _ DA T A U I M _ CL K U I M _ RS T UIM _ PW R U I M_ M C M D U I M _I / O UIM _ V PP U I M _ GN D
8 6 4 2
U I M _D A T A _ R
R 34 6 * 10 m i _ s h o rt l
U I M_ D A TA U I M_ V P P
GN G GND G ND GN D
C6 1 7 *2 2 P _ 50 V _ 0 4
C 48 7 * 22 P _ 5 0 V _0 4
C4 8 6 *2 2 P _ 5 0V _0 4
C 11 2 9 3 .3 V S 0 . 1 u _1 6 V _ Y 5 V _ 0 4 U1 8 C2 7 7 0 1 2 3 V DD 1 V DD 2 V DD 3 10 19 24 C3 2 7 C 3 26 C 49 9 GN D GN D
C 48 8 *2 2 P _ 5 0V _0 4
G ND 1 GN D2 G ND 3 GN D4
TPM 1.2
19 , 3 6 19 , 3 6 19 , 3 6 19 , 3 6 23 L PC L PC L PC L PC _ A D0 _ A D1 _ A D2 _ A D3 26 23 20 17 21 L C LK 22 16 27 15 28 L P C P D# T P M_ B A D D T P M_ P P 9 T E S T B I/B A DD 7 P P 14 T P M3 0 0 1 1 T P M3 0 0 2 3 T P M3 0 0 3 12 8 TESTI *S L B 9 6 35 T T XT A L O N C_ 1 N C_ 2 N C_ 3 G G G G ND ND ND ND _1 _2 _3 _4 4 11 18 25 C 34 5 * 18 p _ 50 V _ N P O_ 0 4 X TALO X TA LI G PIO GP I O 2 L AD L AD L AD L AD *0 . 1 u _1 6 V _ Y 5 V _ 0 4 * 0 . 1u _ 1 6 V _Y 5 V _ 04 *0 . 1 u _ 16 V _ Y 5V _ 0 4 * 1u _ 1 6 V _X 5 R _ 0 6
91 7 1 2-0 0 9 0 P
GN D
G ND
P C L K _ TP M
TPM
5 VSB
3. 3 V S
1 9, 3 6 L P C _F R A M E # 1 3, 2 3 P L T _ RS T # 1 9, 3 6 S E R I RQ 2 1 P M _ CL K RU N# 2 1 S4 _ STATE#
L F R A ME # L R ESET # S E RIR Q C L K RU N#
C2 7 5 *0 . 1 u _1 6 V _ Y 5 V _ 0 4 6 2 13 T P M3 0 0 4 T P M3 0 0 5 X TALI X3 4 3 X 10 4 3 *3 2 . 76 8 K H z 1 2 *3 2 . 76 8 K H z 1 2 C 3 44 * 18 p _ 5 0V _ N P O_ 0 4
CCD
5V
1A
4 5 C8 C 9 C C D_ E N 3
10V_X7R->16V_Y5V C990703
U 1 1 V IN V IN V OU T
5 V _ C CD 5 V _ CC D C1 3 1u _ 6 . 3 V _ Y 5 V _ 04
48 mil 1A
R8 C1 2 0. 1 u _ 1 6V _ Y 5V _0 4 C1 0 1u _ 6 . 3V _Y 5 V _ 04
2 E N G ND G 5 24 3 A 1 00 K _ 0 4
X5 R- >Y 5V C9 90 70 3
36
1u _ 6 . 3 V _Y 5 V _ 04 1 u _ 6 . 3V _Y 5 V _0 4
X5 R- >Y 5V C9 90 70 3
J _ CC D 1 1 2 3 4 5 8 5 2 0 4-0 5 0 01
Ass erted before ent ering S3 LPC reset timing: LPC PD# inact ive to LR ST# inac tive 32~96us
H ACCESS I: LOW N M AL ( Int erna l PD ) : OR H 4E/ 4F H I: TPM_BAD LOW 2E/ 2F H D : TPM_PP
CC D_ E N 23 23 36
Port 5
U S B _P N 5 U SB_ PP5 C C D _D E T #
P CL K _ T P M
R 21 2
*3 3 _ 04
C2 7 6
* 1 0p _ 5 0V _0 4
From KBC default HI
3. 3 V S T P M_ P P T P M_ B A D D R 22 2 R 22 3 R 22 7 *1 0 K _ 0 4 *1 0 K _ 0 4 *1 0 K _ 0 4 5V 3. 3V 3. 3V S 2 6, 3 0 , 3 1 , 35 , 3 7 , 3 9, 4 0 , 4 1 , 44 3 , 4, 1 2 , 1 3 , 17 , 1 9 , 2 0, 2 1 , 2 3 , 24 , 2 6 , 2 8, 31 , 3 2 , 3 3, 3 4 , 3 7 , 39 , 4 0 , 4 1, 4 4 2 , 10 , 1 1 , 1 2, 1 3 , 1 9 , 20 , 2 1 , 2 2, 2 3 , 2 4 , 25 , 2 6 , 2 8, 30 , 3 2 , 3 3, 3 5 , 3 6 , 37 , 4 2 , 4 3, 4 6
B - 30 3G, CCD, TPM
Schematic Diagrams
USB, Fan, TP, FP, Multi-Conn

CPU FAN CONTROL
S P T1 S MD 79 X 13 8 1 SPT 2 S M D 7 9 X1 3 8 1 SPT3 S MD 7 9X 1 3 8 1 SPT 5 S MD 79 X 1 38 1 R2 3 6 *1 0 K _0 4 FO N 5 VS_ FAN 2009 /03_ /12 Alex R2 3 1 *0 _ 04 C3 5 0 1 0u _ 10 V _ Y 5 V _ 0 8 5 VS F ON 1 2 3 4 U2 0 FO N V IN V O UT VSE T G9 90 P 1 1 U CP U _ F A N 3 6 G G G G ND ND ND ND 8 7 6 5 1 1 1 1 C3 4 7 C 35 1
0 . 1 u_ 1 6V _ Y 5V _ 0 4 4 . 7 u_ 6 . 3 V _X 5 R _ 0 6
CP U_ FA N
J _ F A N2 1 2 3 85 2 0 5-0 3 7 01 J_F AN1 3
3 6 C P U _F A N S E N 3 . 3V S R 44 2 C D2 9 4 . 7 K _ 04 A S C S 55 1 V -3 0
USB PORT
5V 5 2 V IN1 C3 0 9 1 0u _ 1 0V _ Y 5 V _ 0 8 3 V IN2 4 E N# GN D R T 9 71 5 B GS 3 1 , 37 , 4 0 D D _O N # V OU T3 1 V OU T2 8 C3 0 2 U1 7 F LG # V OU T1 7 6 US B V CC0 1
FO R PH ONE J AC K BOA RD
U S B V C C 01 L21 * H C B 1 6 0 8K F -12 1 T2 5 U S B _V C C 0 1 _2
Fo US 2. r B 0 60 m il
C3 2 9
FP CONN
3 . 3V S _F P J _ FP1 1 2 3 4 * 85 2 01 -0 4 05 1 L 16 H C B 1 6 0 8K F -12 1 T2 5 U S B _P N 4 23 , 3 3 U S B _P P 4 23 , 3 3 3 .3 VS 35 35 MI C 1 -R MI C 1 -L 3 5 H E A D P H O N E -R 3 5 H E A D P H O N E -L 3 5 J D_ S E N S E 3 5 J D _ S E N S E _B 3 5 S P K OU TR -_ R 3 5 S P K OU TR + _R 23 23 US B _ P N 8 US B _ P P 8
5V J _C N1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 87 2 13 -1 6 00 G L23 F C M1 0 0 5K F -1 2 1 T0 3 S P DIF O _ R
+C 31 4 * 10 0 u _6 . 3 V _ B _A
*0 . 1 u_ 1 6 V _Y 5 V _0 4
Sheet 30 of 53 USB, Fan, TP, FP, Multi-Conn
Port 4
C2 4 1 1u _ 1 6V _ X 5 R _ 06
R 22 8 0 . 1 u_ 1 6V _Y 5V _ 0 4 23 23 U S B _P N 1 0 U S B _P P 1 0 4
* 1 0m i l_ s h ort 3 U S B _ P N 6_ R US B _ P N6 _ R 3 1 U S B _ P P 6 _R 31 J_ FP1 4 1
1 2 US B _ P P 6 _ R L22 * W C M 20 1 2F 2S -1 6 1 T0 3 R 23 0 * 1 0m i l_ s h ort
U S B V C C 01 L12 H C B 1 6 08 K F -1 2 1T 2 5 U S B _V C C 0 1 _0
5V
60 m il
C1 3 9 0 . 1u _ 1 6V _ Y 5 V _ 0 4
ADD S PDI F C99 07 10
1 00 MI L
C2 9 2 *. 1 U _ 1 6 V _0 4 C 2 97 * . 1 U _ 16 V _ 0 4
+C 14 1 1 0 0U _ 6. 3 V _ B 2
Port 0
J _U S B 1 1 V+ DA T A _ L DA T A _ H GN D C 1 0 7 70 -1 04 A 3 P IN G N D3 ~ 4 = G ND G ND1 GN D 2 GN D3 GN D4 G ND 3 G ND 4 2 3 4 V DD 3 3. 3 V S
R 13 7 For ESD 23 23 U S B _ P N0 U SB_ PP0 U S B _ P N0 U SB_ PP0 4 1
0_04 3 U S B _ P N 0_ R US B _ P P 0 _ R
2 L13 * W C M 20 1 2F 2S -1 6 1 T0 3 R 13 6 0_04
FO R P OW ER S WIT CH B OA RD
US B V C C0 1 L14
U S B _ V C C 01 _ 1
G ND 1 GN D 2
B4 10 0 B5 10 0
36 I N T 16 R 5 20 28 , 3 6 W L A N _ E N
R 52 0 R 52 1
*0 _ 04
.
+C 20 6 1 0 0u _ 6 . 3V _ B _ A
60 mil
C2 1 1 0 . 1u _ 1 6V _ Y 5 V _ 0 4
3 6 ,4 5 3 6 ,4 5 37 36
S MC _ B A T S MD _ B A T M_ B T N #
S MC _ B A T S MD _ B A T
H C B 1 6 08 K F -1 2 1T 2 5
W LA N _S W #
Port 1
J _U S B 2 1 V+ 2 DA T A _ L 3 4 DA T A _ H GN D G ND1 GN D 2 GN D3 GN D4 G ND 3 G ND 4
R 5 21
0_ 0 4
36 M UT E _ SW # 1 2 ,3 6 L ID_ SW # 36 C C D _S W #
US B V C C0 1
R 17 2 23 U S B _ P N1 U SB_ PP1 U S B _ P N1 U SB_ PP1 4
0_04 3 U S B _ P N 1_ R US B _ P P 1 _ R
100 MIL
C 30 8 C2 91 23
0 . 1u _ 1 6V _ Y 5 V _ 0 4 * 10 U _ 1 0 V _0 8
1 2 L17 * W C M 20 1 2F 2S -1 6 1 T0 3 R 17 1 0_04
G ND 1 GN D 2
C 1 0 7 70 -1 04 A 3 P IN G N D3~4=G ND
U S B _ V C C0 1 _ 2 3 1 V D D3 1 9, 2 8 , 3 3, 3 6 , 3 7, 3 8 , 4 4, 4 5 3 .3 V S 2 , 10 , 1 1 , 12 , 1 3 , 19 , 2 0 , 21 , 2 2, 23 , 2 4, 2 5 , 2 6, 2 8 , 2 9, 3 2 , 3 3, 3 5 , 3 6, 3 7 , 4 2, 4 3 , 4 6 5V 2 6, 2 9 , 3 1, 3 5 , 3 7, 3 9 , 4 0, 4 1 , 44 5 VS 1 2, 1 9 , 2 2, 2 5 , 2 6, 3 3 , 3 5, 3 7 , 42 , 4 3 , 46
C2 4 0 0 . 1u _ 1 6V _ Y 5V _ 0 4
S P K _ HP #
35
S P DIF O
C3 8 5 10 0 0p _ 5 0V _ X 7 R _ 04
A U DG
J_ S W 1 1 2 3 4 5 6 7 8 9 10 11 12 8 7 1 51 -1 2 07 G
USB, Fan, TP, FP, Multi-Conn B - 31
Schematic Diagrams
USB 3.0
3 . 3V L 59 C 11 34 3. 3 V A 1 . 0 5V X7R -> X5 R C990 703 3. 3 V A
H C B1 6 08 K F-1 21 T 25
C 1 13 5
0 . 1u _1 0 V X 5R _ 04 _ X 7R -> X5R C9 90703
C 11 36 C 1 1 37 0 . 1u _1 0 V_ X R _ 04 5 0. 1 u_ 10 V _X 5R _ 0 4 0. 1 u_ 1 0V _ X5 R _0 4
C 1 13 8 0 . 1u _1 0V _ X R _ 04 5 X7 R -> X 5R C99 0703 3 . 3V A 0. 0 1u _1 6V _ X7 R _ 04 C 1 14 7 5p _5 0V _ N P O_ 04 0. 1 u_ 10 V _X 5 R _0 4 X7R - > X5R C9907 03 30 US B _ P P _ R 6 U 2D P1 R 58 2 R 58 3 *0 _0 4 0_ 0 4 D+ 30 U S B _ P N 6_ R R 58 0 U 2D M1 R 58 1 *0 _0 4 0_ 0 4 D-
C 11 42 C 1 14 5 0 . 01 u _1 6V _ X7 R _0 4 0 0 1 u_ 16 V _X 7R _ 0 4 . C 11 4 1 C 1 1 43 C 11 44 C 1 13 9 0. 0 1u _1 6 V X 7R _ 04 _ 0 . 01 u_ 1 6V _X 7 R _0 4 0 . 01 u _1 6V _ X R _0 4 7 C 1 14 9 C 11 5 2 C 1 14 6 0 . 01 u_ 16 V _X 7R _0 4 0. 0 1u _1 6V _ X7 R _ 04 C 11 48 C 11 5 0 C 1 15 1 C 11 53 0 . 01 u_ 1 6V _ X R _0 4 7 0. 0 1u _1 6 V X 7R _ 04 _ 0. 0 1u _ 16 V _X 7R _ 04 0 . 01 u _1 6V _ X R _0 4 7 L9 L10 P1 3 D10 F1 3 F 14 E11 E12 H11 K11 K12 L8 C4 C8 C9 D8 D9 L1 3 L1 4 F3 G3 G4 N4 N5 N6 P3 E 3 E4 C5 C6 C7 D5 H3 H4 L5 D7
C 1 14 0 0. 0 1u _1 6V _ X R _ 04 7
U4 5
VDD3 3 VDD3 3 VDD3 3
VDD3 3 VDD3 3
VDD3 3 VDD3 3
VDD1 0 VDD1 0 VDD1 0 VDD1 0 VDD 10
V D10 D V D10 D VDD10 VDD1 0
VDD1 0 VDD1 0
VDD10 VDD10 VDD1 0
VDD1 0 VDD1 0 VDD1 0 VDD 10
VDD 33 V D33 D V D33 D
VDD 33 V D33 D V D33 D VDD33
VDD 10 VDD 10
U3A VDD3 3
2 8 C LK _ P I _ U S B 30 C E 28 C LK _ P C I E U S B 30 # _ 2 8 P C I E _ R XP 1 _U S B 3 0 2 8 P C I E _ R XN 1 _U S B3 0 28 28 P I _ TX P 1_ U S B 30 C E P I _ TX N 1 _U S B 3 0 C E C 11 68 C 11 73
B2 B1 0. 1 u _1 0V _ X R _0 4 D 2 7 0. 1 u _1 0V _ X R _0 4 D 1 7 F2 F1
P CL KP E P CL KN E P TX E P P TX E N P RXP E P RXN E
U2 AV D33 D
US B 2. 0 ? US B 3. 0 ?
R58 0, R5 82 R58 1, R5 83
U 3T X P 2 D U 3 TX D N 2 U 2 D M2 U 2D P 2 U3 RX P 2 D U 3R X D N 2
B6 A6 N8 P8 B8 A8 C99 0528 R 5 46 1 0K _ 04 R 54 3 10 K _0 4 U S B _V C C 0 1_ 2 R 5 69 PP ON 1 R 5 44 * 0_ 04 * 0_ 04 U SB _ OC # 1 GND 1 U S B 30 V C C L6 0 3. 3 V
.
C 1 17 4 15 0u _6 . 3V _ V _A
+
Sheet 31 of 53 USB 3.0
3 . 3V
4 , 23 , 28 , 32 , 36 21 , 28 , 32
D3 4 SC S 5 1V - 40 7 A
B U F _P L T_ R S T# R 55 0 P C I E _W A K E # 20 , 28 N E WC AR D _C L K R E Q# A U X E T R 54 7 D R5 4 8 R 54 9 3. 3 V 1 M_ 04
0_ 0 4 R 5 73
P E WA K E 0 _ 04
H2 K1 K2
P RST B E P W AKEB E P C R EQ B E A XD E T U P EL S S B M I P N R S TB O
H C B 16 0 8K F - 12 1T 2 5
D 0_ 0 4 A U X ET _ R J2 J1 10 K _0 4 H1 P5
OC 2 B I OC 1 B I P P ON 2 P P ON 1
G14 H 13 H 14 J1 4
U S B _ O C # 23
23 , 28 C LOSE T O CONN ECTOR J_ U S B 3 9 1 8 2 4 3 6 7 5 S S TX + V B US S S TX DGN D D+ S S R X+ GN D _ D S S R X-
NE C USB3 .0 tim ing C 11 55 C9 90710 4. 7 u_ 25 V _X 5R _ 0 8 U S B _S P I _S C L K M2 U S B _S P I _C E # N 2 N1 U S B _S P I _S I M1 U S B _S P I _S O *0 _0 4 K 13 K 14 J 13 P4
U 3T X P 1 D S IS CK P S ICS B P S ISI P S ISO P U 3 TX D N 1 U 2 D M1 U 2D P 1 U3 RX P 1 D U 3R X D N 1
B1 0 A1 0 N 10 P1 0 B1 2 A1 2
SS T X 1 SS T X # 1 U 2D M 1 U 2D P 1 SS R X 1 SS R X 1 #
C 11 54 C 11 56
0. 1 u_ 1 0V _X 7 R _0 4 0. 1 u_ 1 0V _X 7 R _0 4 D D +
S I LD HE
Port 2
Standar d-A 3 .0 -> 6 -21-B4A10- 109 U EA111RC-C1 41F-7H 2 .0 -> 6 -21-B4A00- 104 U B111RC-C1B 1F-7H
A XD E T _R U
R 55 1
RRE F U 2A V S S C 14 GN D N 14 M14 P6 R 55 4 1 0 0_ 04 X 2 1 2 C 11 58 2 0 p_ 50 V _N P O_ 04 24 MH z 1 C 11 59 2 0 p_ 50 V _N P O_ 04 A1 A2 A3 A4 A5 A7 A9 A 11 A 13 A 14 B3 B4 B5 B7 B9 B 11 B 13 B 14 C1 C2 C3 C 10 C 11 GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D C S EL G G G G G G G G G G G G G G G G G G G G G G G G G GND GND GN D GN D G ND GND GND GND GND GND GND GND GN D GN D G ND GND GND GND GND GND GND GND GN D G ND G ND GND GND GND GND GND GND GND GN D G ND G ND GND GND GND GND GND GND GND GN D G ND G ND GND GND ND ND ND ND ND ND ND ND ND ND ND ND ND ND ND ND ND ND ND ND ND ND ND ND ND X 1 T X 2 T U 2P V S S U 3A V S S
P1 2 N 12 N 11 D6
R 55 2
1 . 6K _ 1% _0 4
GND 2
GN D GN D GN D GN D
U E A 11 1R C - 14 1F -7 H C
P1 4 P1 1 P9 P7 P2 P1 N 13 N9 N7 N3 M13 M12 M11 M10 M9 M8 M7 M6 M5 M4 M3 L1 2 L1 1 L7 L6
U GN D
33V . 5V U S B _OC # 1 R 5 67 C 1 17 2 *1 0K _ 04 10 u_ 1 0V _ Y 5V _ 08 30 , 37 , 40 D D _ ON # R 5 92 *0_ 04 D Q5 3 R 56 8 S *2 N 70 0 2W 0_ 04 4 3 5 2 U4 8 F L G# V IN1 V IN2 E N# V OU T1 V OU T2 V OU T3 G ND 7 8 1 C 11 70 0 . 1u _ 16 V _Y 5 V _0 4 C 11 71 * 0. 1 u_ 16 V _Y 5V _0 4 6
S I LD H E
uPD720200
U S B 3 0V C C
1 00 M IL
R T 97 15 B G S
P PO N 1 G
3. 3 V NC4 0.1 u_16V_ Y5V_04 *N C _ 04 C9907 06
3. 3 V
E 3 1 E14 F4 F6 F7 F8 F9 F1 1 F1 2 G1
C12 C13 D3 D4 D1 1 D1 2 D1 3 D1 4 E1 E2
G2 G6 G7 G8 G9 G1 1 G1 2 G1 3 H6 H7 H8 H9 H12 J3 J4 J6 J7 J8 J9 J11 J1 2 K3 K4 L1 L2 L3 L4
512Kbit
U 46 8 VDD SI SO 5 2 1 W P# CE # 6 S CK 4 HOL D# V S S A 25 F 51 2 AN T
K BC _S PI _* _R = 0 .1 "~ 0. 5"
U S B _S P I _ S _ R I R 5 55 U S B _S P I _ S O_R R 5 56 U S B _S P I _ C E #_ R R 5 58 U S B _S P I _ S C LK _ R R 5 59 47 _0 4 U S B S P I _S O _ 15 _1 %_ 04 U S B S P I _C E # _ 15 _1 %_ 04 U S B S P I _S C L K _ 47 _0 4 U S B S P I _S I _
R 5 53 4 7K _ 04
u P 72 02 00 D
C 1 15 7
0 . 1u _1 6V _ Y 5 V_ 0 4 U S B _ SP I _ V D D _ 1
R 55 7
1 K _0 4
U S _ F LA S H 3 B
R 56 0
4 . 7K _ 04
U S _ H OL D # 7 B
5V 5V 3. 3 V R 56 1 R 5 62 10 K _0 4 A UX DE T C 11 61 1 u _6 . 3V _ Y 5V _ 04 D O 8033 Z Q5 2 2 1, 2 8, 3 5, 3 6, 3 9 S U S B # G S *MT N 7 00 2Z H S 3 0. 1 u_ 1 6V _Y 5V _ 04 C 1 16 9 10 u_ 1 0V _Y 5V _ 08 0 . 1u _1 6V _ Y 5V _ 04 C 1 16 6 C 11 6 7 C 1 16 2 0. 0 15 u_ 10 V _X 7 R _0 4 0. 1u_16 V_Y5V_ 04 C99 0706 1 0 K_ 0 4 1 .5 V C 11 60
2A
U 47 5 9 7 8 EN 1 GN D VFB 2 R 5 63 VIN VIN P OK V N TL C V OUT V OUT 6 4 3
1 u _1 0V _ 06
3A
75 0_ 1 %_ 04 C 1 16 3 *1 0U _ 10 V _0 8 C 11 64 C 1 1 65
1 . 05 V
10 u_ 10 V _Y 5 V _0 8 0 . 1u _1 6 V_ Y 5 V _0 4
30 U S B _V C C 0 1_ 2 4, 1 0, 1 1, 3 7, 4 0 1 . 5V 3, 4 , 12 , 13 , 17 , 19 , 20 , 21 , 23 , 2 4, 2 6, 2 8, 2 9, 3 2, 3 3, 3 4, 3 7, 3 9, 4 0, 4 1, 4 4 3 . 3V 2 6, 2 9, 3 0, 3 5, 3 7, 3 9, 4 0, 4 1, 4 4 5 V
(15n F~48nF)
R 5 65 2 . 4K _ 1% _0 4
P R 2 30 0.1u_1 6V_Y5V _04 C9 90706
*1 5m il _s h ort
UG ND
B - 32 USB 3.0
Schematic Diagrams
JMC 251 Card Reader

JMC251
3 .3 V R 144 4 . 7K _0 4 S D _C D # 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 U 9 R 146 V C C_ C A RD R N2 1 0 K _ 8 P 4 R_ 0 4 8 1 7 2 6 3 5 4 L A N _L E D 0 L A N _L E D 1 S D _B S S D _W P MD I O 13 34 34 34 34 DV DD L A N_ M DIP 0 L A N_ M DIN 0 DV DD L A N_ M DIP 1 L A N_ M DIN 1 3 .3 V L A N_ M DIP 2 L A N_ M DIN 2 DV DD L A N_ M DIP 3 L A N_ M DIN 3 L A N _M D I P 2 L A N _M D I N 2 L A N _M D I P 3 L A N _M D I N 3 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 1 0K _0 4 MS _I N S # S D _ C LK R1 2 6 2 2 _ 04 3 .3 V 3 .3 V
M D I O8 M DIO 9 M D I O1 0 M DIO 1 1 MD I O 12
SD _ W P M DIO 7
S D _D 3 S D_ BS
S D_ D0 S D _D 1 SD_ D 2
MD IO S gl in e En = 50 d Oh m
S tc wi hin Re la r g gu to (> mi 20 l)
RE G L X L1 5 A RF B 1 2 C 22 6 C 224
DV DD
M DIO 0 MD I O 1 M D I O2 V DD IO M D I O3 M DIO 4 MD I O 5 G ND M DIO 6 M D I O7 V D DIO M DIO 8 M D I O9 M DIO 1 0 MD I O 11 M D I O1 2
R 178 0 N C N C
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 MD I O 13 MD I O 14 C R 1 _ LE D N 3 .3 V D VD D
R1 88 NC NC 10 0K
R 2 43 N C 0 N C
C5 66 F ct n un io sa e E NC Di bl D3 NC En le D (1) ab 3E 3E 0. En le D (2) 1u ab
S W F 2 5 20 C F -4 R 7 M -M
Card Reader Pull High/Low Resistors

3 .3 V S R 127 R 140 R 141 *1 0 K _ 0 4 MD I O 7 *2 0 0 K _ 04 MD I O 12 *2 0 0 K _ 04 MD I O 14
34 34 34 34
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
J M C2 5 1
REXT V D D X 33 X IN X OU T G ND LX F B 12 V D DR E G C L KN C LK P AVD DH R XP RX N GN D TXN TXP
L ED 0 L ED 1 VD D G ND V I P _1 VIN _ 1 A V D D1 2 V I P _2 VIN _ 2 G ND A V D D3 3 V I P _3 (N C ) V I N _ 3( N C ) A V D D1 2 (N C ) V I P _4 (N C ) V I N _ 4( N C )
JMC251 JMC261
(LQFP 64)
G ND MD I O1 3 MD I O1 4 S M B _ S D A /CR _ L E DN TESTN V D DIO V DD V C C3 O C R _C D 0 N C R _C D 1 N S M B _ S C L/ LE D 2 C R E QN MP D W AKEN RS T N A V DD X
1. For JM C251/JM C261 only. 2. MPD conn ect to Main Power or R STN for D3E app licai on, to AUX power ot herwise.
F or J MC2 /2 51 61 o y nl
3 .3 V
CR 1 _ P CT L N S D _C D # MS _I N S # L A N_ L E D 2
R1 5 0 R1 5 1 P C I E _ W A K E # 2 1 , 28 , 3 1 D VD D R1 6 0 0_04 C2 1 3
*0 _ 0 4 *1 0 0 K _ 0 4 *. 1U _ 16 V _ 0 4
3. 3V S
PC Ie D iff en al er ti Pa s = 1 ir 00 O hm
C 219 C 218 0 . 1 u _ 1 0V _X 7 R _0 4 0 . 1 u _ 1 0V _X 7 R _0 4 P C I E _R X P 2 _G L A N 20 P C I E _ R X N 2_ G L A N 2 0
B U F _ P L T _ R S T # 4 , 2 3 , 2 8, 31 , 3 6
L AN X IN L A N X OU T
R E GL X A RF B 1 2
C R1 _ P CT L N
R1 5 2 12 K _ 1 % _ 04 DV D D
P C I E _ T X N 2 _ GL A N 2 0 P C I E _ T XP 2_ G LA N 2 0 3 .3 V C L K _ P C I E _G L A N 20 C LK _ P C I E _ G LA N # 2 0 L A N _L E D 2 C R 1 _ L E DN R1 4 9 R1 4 2
3 .3 V
C 216 0 . 1 u _ 1 6V _Y 5 V _ 04 Pin#2 6 3 . 3V DV D D C2 1 7 C 22 7
0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 C 209 C2 0 3 C 19 8 C 220 Pi n#8 0 . 1 u _ 1 6V _Y 5 V _ 04 0 . 1 u _1 6 V _ Y 5 V _ 0 4 0 . 1u _ 1 6 V _ Y 5 V _ 0 4 1 0 u _ 10 V _ Y 5 V _ 08 Pin#5 1 Pi n#62 Pin #55 Pin#5 5 Reser ved Pi n#8
Fo JM 51 61 r C2 /2 on ly
1 0u _ 1 0 V _ Y 5 V _ 0 8
Card Reader Connector

J _ CA R D- RE V1 S D_ C D# S D_ D 2 S D_ D 3 S D_ B S V CC _ CA RD P1 P2 P3 P4 P5 P6 P7 P8 P9 P1 0 P1 1 P1 2 P1 3 P1 4 P1 5 P1 6 P1 7 P1 8 P1 9 P2 0 P2 1 CD _ S D D A T2 _ S D C D / D A T 3_ S D CM D_ S D VSS_ SD V D D_ S D CL K _ S D VSS_ SD D A T0 _ S D D A T1 _ S D W P_ SD VSS_ M S V C C _ MS S C LK _M S D A T3 _ M S I N S _M S D A T2 _ M S S D I O/ D A T 0 _M S D A T1 _ M S BS_ M S VSS_ M S M D R 01 9 -C 0- 10 4 2 S D _ C LK C6 4 5 0 . 1u _ 1 6 V _ Y 5 V _ 0 4 S D_ D 0 S D_ D 1 S D_ W P
3 .3 V
C 205
C1 8 1 LA N X O U T
0 . 1 u _ 1 6V _Y 5 V _ 04 0 . 1u _ 1 6 V _ Y 5 V _ 0 4 Pin#3 8 Pi n#27 R 1 61 3 .3 V X1 2 C 416 C1 7 8 C 21 4 C 452 X1 5 1 2 *2 5 M H z _1 0 P P M _ 3 0R 3 4 C6 3 2 *1 0 P _ 5 0V _0 4 C6 4 6 0. 1 u _ 1 6V _Y 5 V _ 0 4 4 . 7 u _ 1 0V _0 8 Pin#5 9 Reser ved Pi n#59 Pin #2 Pin#1 1 C2 2 1 2 2p _ 5 0 V _ N P O _ 04 C2 1 5 C 658 C 6 44 C6 4 2 F S X -8 L _ 2 5M H z 1 S D _C L K V CC _ CA R D V C C_ C A RD 1M _ 04 LA N X I N V CC _ CA RD
C6 4 0 0 . 1u _ 1 6 V _ Y 5 V _ 0 4
S D _ C LK S D_ D 3 MS _ I N S # S D_ D 2 S D_ D 0 S D_ D 1 S D_ B S
1 0 u _ 10 V _ Y 5 V _ 08 0 . 1 u _1 6 V _ Y 5 V _ 0 4 0 . 1u _ 1 6 V _ Y 5 V _ 0 4 0 . 1 u _ 16 V _ Y 5 V _ 04
0 . 1 u _ 16 V _ Y 5V _0 4 0. 1 u _ 1 6V _Y 5 V _ 0 4
Near Cardreader CONN Place a ll capacit ors clo sed to chip. The subscript in each CAP incicat es t he pin n umber of JMC251/ JMC261 t ha t sh ould be closed to.
2 2p _ 5 0 V _ N P O _ 0 4
2 5V - > 10 V C 99 07 03
3 , 4 , 1 2, 1 3 , 1 7 , 1 9 , 20 , 2 1 , 2 3 , 24 , 2 6 , 2 8 , 2 9, 3 1 , 3 3 , 3 4, 37 , 3 9 , 4 0 , 41 , 4 4 3 . 3 V 2 , 1 0, 1 1 , 1 2 , 1 3, 1 9 , 2 0 , 2 1 , 22 , 2 3 , 2 4 , 25 , 2 6 , 2 8 , 2 9, 3 0 , 3 3 , 3 5, 36 , 3 7 , 4 2 , 43 , 4 6 3 . 3 V S
(> mi 20 l)
1 0 u_ 1 0 V _ Y 5 V _ 0 8 0 . 1 u _ 16 V _ Y 5 V _ 04 Pin #7 Pin#7
Sheet 32 of 53 JMC 251 Card Reader

Card Reader Power
V C C_ CA RD
R 5 12
75 _ 1 % _ 04
3 . 3V 4. 7K _0 4 4. 7K _0 4
G ND G ND
P 22 P 23
JMC 251 Card Reader B - 33
Schematic Diagrams
SATA ODD, LED, Hotkey, LID SW

5 VS
SATA ODD
J _O D D 1 S1 S2 S3 S4 S5 S6 S7 R5 1 6 R5 1 7 R5 1 9 R5 1 8 *0 _ 04 *0 _ 04 *0 _ 04 *0 _ 04 S A T A _T X P 1 19 S A T A _T X N 1 1 9 S A T A _R X N 1 19 S A T A _R X P 1 1 9 5V S J _T P 2 10 9 8 7 6 5 4 3 2 1 8 52 0 1-1 0 0 51 C2 3 4 C 2 35 C 2 31 C2 2 9 +C 2 2 3 1 3 T P _ CL K T P _ DA T A 3 .3 V S GN D 3 GN D 4
5V S
C2 4 4 0 . 1 u_ 1 0 V _X 5 R _ 0 4 R 17 0 R 16 9 1 0 K _0 4 C2 3 8 *1 0 U _ 10 V _ 0 8 T P _ CL K T P _ DA T A C 24 5 C 24 3 36 36
For B4100M
1 0 K _0 4
J _ TP 1 1 2 3 4 5 6
X7R -> X5R C990703

TP _ C LK TP _ D A TA TP B U T TO N _ L TP B U T TO N _ R
P1 P2 P3 P4 P5 P6 *C 18 5 5 3-1 1 30 5 -L P I N GN D 1 ~ 4 = G N D
OD D _D E T E C T # 19
5 VS
U S B _ P N 4 2 3 , 30 U S B _ P P 4 2 3 , 30
*8 5 20 1 -0 60 5 1
4 7 p_ 5 0 V _N P O_ 0 4 4 7 p_ 5 0 V _N P O_ 0 4
SW 2 *T J G-5 3 3-S - T/ R 2 4 5 6
LIF T KEY
T P B U T T ON _ L 1 3
SW 3 * TJ G -53 3 -S -T / R 2 4 5 6
RIGH T KEY
C ~2 SW1 T P B U T T ON _R 2 1 4 3
0. 1 u _ 16 V _ Y 5 V _ 04 1u _ 10 V _ 0 6 0. 1 u _ 16 V _ Y 5 V _ 04
*1 0 0 U _ 6. 3 V _ B 2 1 0 u_ 1 0V _ Y 5V _ 0 8
DU MM Y N ET C9 90 713
1u _10 V_0 6 C99 07 03
For B4100M
For B5100M B4100M/B5100M

3 .3 V S J _ LE D 1 LE D _ I GP U # LE D _ D GP U # V GA _ S W # B T_ E N S A T A _L E D # O P TI M U S _ MO D E W L A N _ LE D # 1 2 3 4 5 6 7 8 9 10 8 8 48 6 -1 0R 2 0, 2 8 P C H _B T _ E N #
Sheet 33 of 53 SATA ODD, LED, Hotkey, LID SW
LED
3 . 3V S 3 . 3V S R4 *2 20 _ 04 A R 36 7 2 2 0 _0 4 A A D4 *H T-1 7 0 B P Z C
Bluetooth
P ort 1 1
23 U S B _ P N 11 23 USB _ PP 1 1 2 8, 3 6 B T _ DET # R 10 1 *0 _0 4 B T_ D E T# B T_ E N # 3 V_ BT J_ B T 1 1 2 3 4 5 6 8 7 21 2 -06 G 0
3. 3 V S
3. 3 V S
R 36 8 2 2 0_ 0 4 A
R 36 9 2 2 0_ 0 4
2 8, 3 6 W L A N _ L E D #
HD D/CD -ROM LE D
S CRO LL
D2 2 R Y -S P 1 7 2 Y G3 4
D2 0 R Y -S P 17 2 Y G 34
Wh it e
C
N UM L OCK L ED
C
D2 1 R Y -S P 17 2 Y G3 4
C APS LOC K L ED
C
G re en
L OCK L ED
8 pin ->10 pin add WLAN_LED# C990713
For B5100M
Fro EC def m ault HI
G re en
L E D_ CA P # L E D_ C A P# 3 6
G re en
L E D _ S C R OL L# L E D _ S C R OL L# 3 6 3. 3 V R1 1 1 0 _0 6 3V _ B T
S AT A_ L ED# 3 . 3V S
S A T A _L E D # 1 9 3 . 3V S
L E D _ N U M#
L E D _N U M# 3 6
5 0mi l
U6 4 5 R 1 00 10 K _ 0 4 1 V IN V IN EN VO UT
50m il
3 . 3V S C 13 7 R5 *2 20 _ 04 A A R3 *2 20 _ 04 R2 *2 20 _ 04 D2 D Q4 9 *A O3 40 9 D5 G S 1 0 u_ 1 0V _Y 5V _ 0 8
C1 4 8 2
C1 5 4
GN D *G 52 4 3A
*0 . 1u _ 16 V _ Y 5 V _ 0 4 *1 0 U _ 1 0V _ 0 8
IG PU L ED
DG PU L ED
B T _ EN# SW 1 *T J G-5 33 -S -T / R R 5 36 1 3 5 6 2 4 V GA _ S W # G V G A _S W # 3 6 2 8 , 36 B T_ E N S 3 .3 V S R6 *2 2 0_ 0 4 3 .3 VS VD D3 3 .3 V 5 VS 2, 1 0 , 11 , 1 2 , 13 , 1 9, 2 0 , 2 1, 2 2 , 2 3, 2 4 , 25 , 2 6 , 28 , 2 9, 3 0 , 3 2, 3 5 , 3 6, 3 7 , 42 , 4 3 , 46 19 , 2 8, 3 0 , 3 6, 3 7 , 38 , 4 4 , 45 3, 4 , 1 2, 1 3 , 1 7, 1 9 , 20 , 2 1 , 23 , 2 4 , 26 , 2 8, 2 9 , 3 1, 3 2 , 34 , 3 7 , 39 , 4 0 , 41 , 4 4 12 , 1 9, 2 2 , 2 5, 2 6 , 30 , 3 5 , 37 , 4 2, 43 , 4 6 A D 3 * H T -17 0 B P Z D Q1 1 MT N 7 0 02 Z H S 3
*R Y -S P 1 7 2Y G3 4
*R Y -S P 1 7 2U H R 24 -5 M C
G re en
C L ED_ IG PU#
Re d
L E D_ DG P U# 1 L E D _D GP U # 3 6 3 6 O P T I MU S _ M OD E 3
*2 20 _ 0 4
LE D _ I GP U # 3 6
D1
VDD 3
VD D3
V DD 3
V DD 3 B C
R3 6 3 22 0 _0 4
R 36 4 2 2 0_ 0 4
B4100M/B5100M
R 36 5 22 0 _ 04
R 3 66 22 0 _0 4 Q 50 * D T C 1 1 4E U A E
D1 9
D2 3
Y SG
OP T I MU S _M OD E
RED
G n ree *R Y _ S P 19 5
Y SG
W hi te
C B 2 8 , 36 B T_ E N Q1 * D T C 1 1 4E U A E C
Y SG
R Y - S P 15 5 H Y Y G4 2
R Y -S P 1 55 H Y Y G 4
36
L ED_ ACIN #
L E D_ P W R# 3 6
36 L E D _ B A T _ C H G #
LE D _ B A T_ F U LL # 36
BAT CHA RGE/ FULL LED AC IN/P OWE ON LED R
B - 34 SATA ODD, LED, Hotkey, LID SW
Schematic Diagrams
RJ45, Modem
4 3 2 1 RN 5 5 6 7 8
0 _ 8P 4R _0 4 L39 32 32 32 32 32 32 32 32 L A N _ MD I P 0 L A N _ MD I N 0 L A N _ MD I P 1 L A N _ MD I N 1 L A N _ MD L A N _ MD L A N _ MD L A N _ MD IP 2 IN2 IP 3 IN3 LA N LA N LA N LA N _ MD I _ MD I _ MD I _ MD I P0 N0 P1 N1 12 11 9 8 T D4 T D4 + T D3 T D3 + T D2 T D2 + T D1 T D1 + T CT 4 T CT 3 T CT 2 T CT 1 G S T5 0 0 9 L F 0_ 8 P 4 R _ 0 4 C 52 8 0 . 0 1 u_ 1 6 V _X 7 R _ 0 4 C 52 7 0 . 0 1u _ 1 6V _ X 7 R _ 0 4 C5 2 2 0 . 01 u _ 16 V _ X 7R _ 04 C5 2 0 0 . 01 u _ 16 V _ X 7R _0 4 N MC T _ 4 N MC T _ 3 N MC T _ 2 N MC T _ 1 R 38 R 24 R 15 R 14 MX 4 M X4 + MX 3 M X3 + MX 2 M X2 + MX 1 M X1 + M M M M CT 4 CT 3 CT 2 CT 1 13 14 16 17 L P1 * S B 0 40 2 T L-0 4 0 L MX 1 + 1 8 D L MX 1 + 7 D L MX 1 L MX 1 - 2 L MX 2 + 3 6 D L MX 2 + L MX 2 - 4 5 D L MX 2 L P2 * S B 0 40 2 T L-0 4 0 LM X 3+ 1 8 D L MX 3 + LM X 3- 2 7 D L MX 3 LM X 4+ 3 6 D L MX 4 + LM X 4- 4 5 D L MX 4 R N6 4 3 2 1 5 6 7 8 J_ R J_ 1 D D D D LM LM LM LM X1 + X1 X2 + X2 1 2 3 6 D A+ D AD B+ D BD D D D C+ CD+ Ds hi e l d s hi e l d GN D 1 GN D 2
LA N _ MD I P 2 LA N _ MD I N 2 LA N _ MD I P 3 LA N _ MD I N 3
6 5 3 2 10 7 4 1
19 20 22 23 15 18 21 24
D LM X3 + D LM X3 D LM X4 + D LM X4 -
4 5 7 8
P J S -08 S L 3 B
D03 LP16 CHANGE TO RN22

7 5 _1 % _ 04 7 5 _1 % _ 04 7 5 _1 % _ 04 7 5 _1 % _ 04 NM CT _ R
C5 6 1 00 0 p _2 K V _ X 7 R _ 12 _ H 1 2 5
Sheet 34 of 53 RJ45, Modem

H1 H 2 H3 H 4 C 1 5 8 D 1 58 C 15 8 D 1 5 8 C 1 5 8D 1 58 C 15 8 D 1 5 8 H2 5 C 1 5 8 D 1 58
H1 6 J_MD C1 2 3 4 5 11 MT H 7_ 0 D 2 _ 8 2 1 3 .3 V 3. 3 V M D C _3 . 3 V G ND GN D 1 9 8 7 6 H2 2 H 6 _ 0 D 3 _7 H2 1 H 24 H 6 _ 0B 4 _ 7 D 3 _ 7 H 6_ 0 B 4 _7 D 3_ 7 H 23 C 1 46 D 11 0 H 28 C 1 46 D 1 1 0 H 6 C 14 6 D 1 1 0
MDC
19 , 3 5 H D A _S D OU T 19 , 3 5 H D A _S Y NC 1 9 H D A _S D I N 1 19 , 3 5 H D A _R S T # R 32 5 R 32 4 R 32 3 R 32 0 * 33 _ 0 4 * 33 _ 0 4 * 22 _ 0 4 * 33 _ 0 4 H D A _ S D OU T _R H D A _ S Y NC _ R H D A _ S D I N 1_ R H D A _ R S T # _R 1 3 5 7 9 11 J _M D C 1
12
20 MIL
2 4 6 8 10 12
GN D RE S E R V E D A za l a _ S D O i RE S E R V E D GN D 3 . 3V Ma n / a u x i A za l a _ S Y N C i G ND A za l a _ S D I i G ND A za l a _ R S T # i A za l i a_ B C LK *8 8 0 18 -1 2 0G
10mil
C5 0 1
L35
*H C B 1 0 05 K F -1 2 1 T2 0
H D A _B I T C LK _R
R 36 2 C 50 0 * 22 P _ 5 0V _0 4
*3 3 _0 4
H DA _ B I T C L K 1 9 , 3 5
2 3 4 5
H5 1
9 8 7 6
H 7 m t h 7 _0 d 2 _8 _ O
MT H 7_ 0 D 2 _ 8 G ND H3 0 GN D H 14 1 9 8 7 6 2 3 4 5 1
D UMMY NET C 99071 3
G ND
*0 . 1 u _1 0 V _ X7 R _0 4
H2 0 9 8 7 6 2 3 4 5 9 1 7 6 2 3 4 5
H2 9 9 1 7 6
G ND M1 M2 M3 M4 M-M A R K M-M A R K M-M A R K M-M A R K
2 3 4 5
MT H 7_ 0 D 2 _ 8 G ND M5 M6 M7 M8 M-M A R K M-M A R K M-M A R K M-M A R K 2 3 4 5 M9 M1 0 M1 1 M1 2 M-M A R K M-M A R K M-M A R K M-M A R K G ND H1 9 9 8 7 6 2 3 4 5 GN D
M T H 7 _0 D 2_ 8 GN D H 8 9 8 7 6 2 3 4 5
MT H 7 _ 0 D2 _8 G ND H3 1 9 1 7 6 2 3 4 5
MT H 7_ 0 D 2 _ 8 GN D H2 7 9 1 7 6 2 3 4 5 H 9 9 8 7 6
MT H 7_ 0 D 2 _ 8
M T H 7 _0 D 2_ 8
MT H 7 _ 0 D2 _8
MT H 7_ 0 D 2 _ 8
M T H 7 _0 D 2_ 8
GN D
GN D
G ND
GN D
GN D
M1 3 M1 4 M1 5 M1 6 M-M A R K M-M A R K M-M A R K M-M A R K
3. 3 V
3 , 4 , 1 2, 1 3 , 1 7, 1 9 , 2 0, 21 , 2 3 , 24 , 2 6 , 28 , 2 9 , 31 , 3 2 , 33 , 3 7 , 3 9, 4 0 , 4 1, 4 4
RJ45, Modem B - 35
Schematic Diagrams
Audio Codec (VIA1812)

CODEC ( VIA1812 )
C 4 12 C4 2 0 5 V S _A U D D 12 C *S C S 5 5 1V -3 0 A 5V L24 C4 7 3 BEEP C4 6 8 1 u _ 6. 3 V _ Y 5 V _ 0 4 19 H D A _S P K R C4 5 8 4 0. 1 u _ 16 V _ Y 5 V _ 0 4 1 0u _ 1 0V _ Y 5V _ 0 8 A U DG C 4 74 *. 1 U _ 1 6V _ 0 4 0. 1u _ 16 V _ Y 5 V _ 0 4 1 0 u_ 1 0 V _Y 5 V _0 8 0. 1 u _ 16 V _ Y 5 V _ 0 4 0 . 1 u _1 6 V _ Y 5 V _ 04 3 C3 9 2 BYP GN D *G 9 24 *0 . 1u _ 1 6V _ Y 5V _ 0 4 C C C C C A U DG L3 2 41 3 61 5 61 6 40 9 42 4 *1 0m i l _s h o rt 0. 1 u _ 16 V _ Y 5 V _ 0 4 0. 1 u _ 16 V _ Y 5 V _ 0 4 0. 1 u _ 16 V _ Y 5 V _ 0 4 0. 1 u _ 16 V _ Y 5 V _ 0 4 0. 1 u _ 16 V _ Y 5 V _ 0 4 OU T VIN 1 S H DN # 2 *1 U _ 1 0V _0 6 H C B 1 6 08 K F -1 2 1T 2 5 U 21 5 C4 0 2 5 VS 3 . 3V S 3 . 3V S _A U D
36
BEEP
C4 5 6
X5 R-> Y5 V C9 907 03
1 9
25 38
4 7
D VSS1 DVSS2
DV DD D V D D -I O
AVDD 1 AV DD2
M I C 2 _L M I C 2 _R M I C 1 _L M I C 1 _R
C 46 9 C 47 0 C 47 1 C 47 2
*. 1 U _ 1 6V _ 0 4 *. 1 U _ 1 6V _ 0 4 *. 1 U _ 1 6V _ 0 4 *. 1 U _ 1 6V _ 0 4 1 9 , 34 H D A _ S D O U T 1 9 , 34 H D A _ B I T C L K 19 H D A _S D I N 0 1 9 ,3 4 H DA _ S Y NC 19 , 3 4 H D A _R S T #
A UD G
Sheet 35 of 53 Audio Codec (VIA1812)
La yo ut N ot e:
Ve ry cl os e to Au di o C od ec
1 u_ 10 V_0 6 C9 907 03
B EEP AU DG R 3 39 R 3 36 C 4 80 1 0 K _ 04 P CB E E P _ C 5 . 1 K _ 1% _ 0 4 1 0 0 p_ 5 0 V _N P O_ 0 4 C 4 65 30 30 1u _ 1 0V _0 6 MI C _S E N S E R 3 3 8 HP _ S E N S E R3 1 2 C 1 18 2 * 0. 1 u _ 16 V _ Y 5 V _ 0 4 I N T_ MI C R 33 3 7 5_ 1 % _0 4 I N T _M I C _ R C4 7 6 C4 7 7 P C B E E P _R 20 K _ 1 %_ 0 4 5. 1 K _ 1 % _0 4 C 1 1 83 J D1 J D2
JD _ S E N S E JD _ S E N S E _ B
R336 1.5V VIA1812 10K 3.3V VIA1812 5.1K ALC272 1K

30 30 MI C 1-L MI C 1 -R
MI C 1 -L MI C 1 -R
A VSS1 AVSS2
M I C 1 -L M I C 1 -R
R3 3 4 R3 4 0
1 K _1 % _ 04 1 K _1 % _ 04
MI C 1 _L _ C MI C 1 _R _C
L ay ou t Not e:
C od ec pi n 1 ~ p in 11 a nd pi n 44 ~ pi n 48 a re Di gi ta l s ig na ls. T he ot he rs ar e An alo g si gna ls .
26 42
3 .3 VS F R ON T -L C 1 13 2 0 . 1u _ 1 6V _ Y 5V _ 0 4 F R ON T -R R2 9 6 0_04 A UD G R 5 37 1 0 0K _ 0 4 3 . 3V S C D3 2 C D1 3 R5 3 9 A S C S 3 55 V A * S CS 3 5 5 V *0 _ 04 1 4 2 U2 4 MC 7 4V H C 1 G0 8 D F T 1 G 3 SPK_ EN 3 .3 V S A UD G 5 VS A UD G R2 8 7 R2 8 8 R2 8 5 R2 8 4 1 0 0 K _0 4 * 1 00 K _ 0 4 * 1 00 K _ 0 4 1 0 0 K _0 4 R2 9 5 0_04 A UD G C 3 96 C 4 07 C 3 97 C 4 04 1 u_ 6 . 3 V _X 5 R _ 0 4 1 u_ 6 . 3 V _X 5 R _ 0 4 1 u_ 6 . 3 V _X 5 R _ 0 4 1 u_ 6 . 3 V _X 5 R _ 0 4 L INL IN+ R INR IN+ 5 9 17 7 19
LI N LI N + RINRIN+ S D#
PVD D PVD D VD D
S P K OU TL + S P K OU TL L 26 L 29 F C M1 0 05 K F -1 2 1 T0 3 F C M1 0 05 K F -1 2 1 T0 3 C 40 5 1 80 p _5 0 V _ N P O _0 4 S P K O UT R+ _ R S P K O U T R -_ R C3 9 5 1 8 0 p_ 5 0 V _N P O_ 0 4 C 60 8 1 8 0 p_ 5 0 V _N P O_ 0 4 C 60 9 1 8 0p _ 5 0V _ N P O_ 04
Low mute!
Ther mal Pad
L OU T + 8 L OU T 18 R OU T + 14 R OU T 10 12 A M P _B Y P A S S C4 0 8 S P K OU TR + S P K OU TR -
S P K _E N G A IN0 G A IN1
2 3 1 11 13 20 21
GA I N 0 GA I N 1
2 1 , 28 , 3 1 , 3 6, 3 9 S U S B # 2 4 P C H _ MU T E # E A P D _M OD E 3 6 K B C _ MU TE #
R 5 38 C 3 93 * . 1 U _ 10 V _ X 7R _ 04 5 *1 0 0 K _0 4
GN D GN D GN D B YPASS GN D E XP O S E D P A D N C N 7 0 10
4. 7 u _ 6. 3 V _ X 5R _ 06
Ga in S ett in gs GA IN 0 GAI N1 A V(i nv ) 0 0 1 1 0 1 0 1 6 dB 10 dB 1 5.6 d B 2 1.6 d B
IN PUT I MP EDA NC E 90 70 45 25 k k k k
A U DG
A U DG
3 . 3V S 5V 5 VS
2 , 1 0 , 11 , 1 2 , 13 , 1 9 , 2 0, 2 1 , 2 2, 2 3 , 2 4, 2 5 , 2 6, 2 8 , 2 9, 3 0 , 3 2, 3 3 , 3 6, 3 7 , 4 2, 4 3 , 4 6 2 6 , 2 9, 3 0 , 3 1, 3 7 , 3 9, 40 , 4 1, 44 1 2 , 1 9, 2 2 , 2 5, 2 6 , 3 0, 33 , 3 7, 42 , 4 3 , 46
B - 36 Audio Codec (VIA1812)
. .
.
R R R R R
L30
H C B 1 6 0 8K F -12 1 T 25 C 41 4 C 4 39 C4 4 7
A UDG
C1 18 0 ->1 0V _X 5R C9 90 70 3
U2 8 A LC _V R E F C 44 9 C 11 8 0 C 11 8 1 27 VR EF MI C 1 -V R E F O 28 37 MI C 1 -V R E F O D 16 D 17 A A C C H 3 5 5P T C C H 3 5 5P T A UD G 1 U _1 0 V _ 06 0 . 1 u _1 0 V _ X5 R _0 4 * 1 0u _ 10 V _ Y 5 V _ 0 8
C 42 7 31 3 31 6 31 8 32 1 32 6
2 2p _ 5 0V _ N P O_ 0 4 2 2 _ 04 2 2 _ 04 2 2 _ 04 2 2 _ 04 2 2 _ 04
A L C _G P I O0 A L C _G P I O1 A Z _ S DO UT _ R A Z _ B IT CL K _ R A Z _ S D I N 0_ R A Z _ S Y N C_ R A Z _ R S T # _R E A P D _M OD E
2 3 5 6 8 10 11 47
GP I O0 / D M I C -D A TA 1 / 2 GP I O1 / D M I C -D A TA 3 / 4 S D A TA -O U T B I T -C L K S D A TA -I N S Y NC R E S E T# EAPD
M I C 1 -V R E F O-R MI C 1-V R E F O- L
DIGITAL
M ON O-O U T
V er y clo se t o A ud io Co de c
CP V E E CB N C BP 31 30 29 C 43 3 C 44 2 2. 2 u _ 6. 3 V _ X 5R _ 06 2. 2 u _ 6. 3 V _ X 5R _ 06 MI C 1 -L A UDG L OU T 1 -L L OU T 1-R L OU T 2 -L L OU T 2-R 35 36 39 41 33 32 23 24 40 J DR E F JD R E F H E A D P H ON E -L 3 0 H E A D P H ON E -R 3 0 F R ON T -L F R ON T -R
R 3 32 4 . 7 K _ 04 M I C 1 -R C 4 59 * 6 80 P _ 5 0V _ X 7 R _ 04
30
S P D IF O
48 45 46 44 43 12 13 34 14 15 16 17 18 19 20 21 22
S P D I F O1 S P D I F O2 D M I C -C L K 1/ 2 D M I C -C L K 3/ 4 NC P C B E E P -I N S e n se A (J D 1 ) S e n se B (J D 2 ) L I N E 2 -L L I N E 2 -R MI C 2 -L MI C 2 -R L I N E 1 -V R E F O MI C 2 -V R E F O L I N E 2 -V R E F O
A U DG
*1 0 0p _ 5 0V _ N P O_ 0 4 A UD G 4 . 7 u _6 . 3 V _ X5 R _0 6 MI C 2_ L 4 . 7 u _6 . 3 V _ X5 R _0 6 MI C 2_ R MI C 2- V R E F O
ANALOG
H P O U T -L H P OU T-R L I N E 1 -L L I N E 1-R
NEAR CODEC
R 30 8 C 11 8 4 5 . 1 K _ 1% _ 0 4 *1 0 0 p_ 5 0V _N P O_ 0 4
MI C 2 -V R E F O
C4 7 8 C4 7 9
4 . 7 u _6 . 3 V _ X5 R _0 6 MI C 1_ L 4 . 7 u _6 . 3 V _ X5 R _0 6 MI C 1_ R
I N T _ MI C A U DG V T 1 81 2
5V S _ R E A R A U DG
R 30 8 V IA 18 12 5. 1K _1 %_ 04 A LC 27 2 20 K_ 1% _0 4
L 27 C 40 0 C 4 03 C3 9 9 C3 9 8
H C B 1 0 05 K F -1 2 1 T2 0
AMP (N7010)
10/16 change footprinter
U2 7 6 15 16
* 1 U _ 10 V _ 0 6 0 . 1 u_ 1 6 V _Y 5 V _0 4
*1 0 U _ 1 0V _0 8 10 u _ 10 V _ Y 5 V _ 0 8 A UD G S P K O U T L +_ R S P K O U T L -_R
L 25 L 28
F C M 10 0 5 K F -1 21 T 0 3 F C M 10 0 5 K F -1 21 T 0 3
PC BEEP
0. 1 u _ 16 V _ Y 5 V _ 0 4 1 0u _ 1 0V _ Y 5V _ 0 8
La yo ut N ot e:
Ve ry c los e to Au di o Cod ec
R 3 42 4. 7 K _ 0 4
C 4 81 *6 80 P _ 5 0V _X 7 R _ 0 4
A U DG
R3 4 8 2. 2 K _ 0 4 J _ I N T MI C 1 2 1 8 8 26 6 -0 20 0 1 P C B F o ot p ri n t = 88 2 66 -2 R
C4 8 5 33 0 p _5 0 V _ X7 R _ 0 4 5V S
J _ SPKL 2 2 1 8 5 20 5 -0 27 0 1
S P K OU T R +_ R 30 S P K OU T R -_R 3 0
FOR E MI
Schematic Diagrams
KBC-ITE IT8518
K B C _ AV DD V DD 3 C 6 06 C2 4 9 C6 0 5 C 2 72 C2 9 4 C6 0 4 0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1 u_ 1 6 V _Y 5 V _0 4 0. 1u _ 16 V _ Y 5 V _ 0 4 10 u _ 10 V _ Y 5 V _ 0 8 0 . 1 u _1 6 V _ Y 5 V _ 04 C2 9 6 1 00 K _ 0 4 L 20 H C B 1 0 0 5K F -1 2 1 T2 0 0 . 1 u_ 1 6 V _Y 5 V _0 4 E C_ VCC 26 50 92 114 1 21 127 K B C _ A GN D C 60 3 L40 H C B 1 0 05 K F -1 2 1 T2 0
0 . 1u _ 1 6V _ Y 5V _ 0 4 * . 1U _ 16 V _ 0 4
11
U 14 10 9 8 7 13 6 5 22 14 W R ST# 1 26 4 16 20 d GP U _P W R _ E N # d GP U _R S T # 23 15 76 77 78 79 80 81 66 67 68 69 70 71 72 73 1 10 1 11 1 15 1 16 1 17 1 18
M 74 0T/ TU
74
0 _04 f or M7 60 T/ TU B KP1 00 5H S12 1_ 04 f or E MI So lu tio n
V CC
VST BY VST BY VST BY VST BY VST BY VST B Y
VBAT
A V CC
1 9 ,2 9 L P C_ A D 0 1 9 ,2 9 L P C_ A D 1 1 9 ,2 9 L P C_ A D 2 1 9 ,2 9 L P C_ A D 3 23 P C LK _K B C 19 , 2 9 LP C _ F R A M E # 1 9 ,2 9 S E RIRQ 4 , 2 3 , 28 , 3 1 , 32 B U F _ P LT _ R S T #
24 GA 2 0 2 1 ,4 5 A C_ IN# 33 L E D_ A C IN# 3 3 OP T I MU S _ MO D E 1 3, 1 7 , 3 9 dG P U _ P W R _E N # 13 d GP U _ R S T #
1 7 E C _ V GA _ A L E R T # 30 CP U _ F A N 28 , 3 0 W L A N _ E N 29 3 G_ P OW E R 35 K B C_ M UT E #
3 T H E R M_ V O LT 12 , 2 2 N B _ E N A V D D 29 3G _ D E T # 29 C C D _D E T #
17 17 3 ,2 0 3 ,2 0
3 0 ,4 5 S MC _B A T 3 0 ,4 5 S MD _B A T S MC _ V G A _T H E R M S MD _ V G A _T H E R M S MC _C P U _ T H E R M S MD _C P U _ T H E R M
1u _1 0V _06 C 99 07 06
35 BEEP C3 0 5 1 u _ 10 V _ 0 6
LOW ACTIVE
28 28 28 23 33 33 33
8 0 CL K 3 IN1 80 D E T# P ME # T P _C L K TP _D A T A L E D _ I GP U #
37 P W R _S W # 1 2 ,3 0 LI D _ S W # 33 V GA _ S W #
AVSS
VSS VSS VSS VSS VSS VSS VSS
2 8 ,3 3 12
B T _E N BKL _ EN
1 12 27 49 91 113 1 22
75
0 _04 F OR IT 85 12 CX /EX 0 .1U _0 4 FOR I TE 85 12- J( IT E85 02 -J E C C os t Dow n

1 2 B R I GH T N E S S R 2 15 0_ 0 4
3 . 3V S
PCL K _ K BC
L A D0 L A D1 L A D2 L A D3 L P CC L K L F R A ME # S E R IRQ L P C R S T #/ W U I 4 / GP D 2 ( P U )
LPC K/B MATRIX
K S I0 /S T B # K SI1 /A F D # K S I2 /INIT # K S I 3/ S LI N # K S I4 K S I5 K S I6 K S I7
58 59 60 61 62 63 64 65 36 37 38 39 40 41 42 43 44 45 46 51 52 53 54 55
K B -S I 0 K B -S I 1 K B -S I 2 K B -S I 3 K B -S I 4 K B -S I 5 K B -S I 6 K B -S I 7 K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
K B C _W R E S E T #
G A 20 / G P B 5 K B R S T #/ G P B 6 ( P U ) P W U R E Q # / GP C 7( P U ) L 8 0L L A T / GP E 7 ( P U ) E C S C I # / GP D 3 ( P U ) E C S MI # / GP D 4 ( P U )
R 58 7 R 58 8 R 58 9
*0 _0 4 *0 _0 4 0_ 0 4
DAC
G G D D D D P J0 P J1 A C 2 / GP J 2 A C 3 / GP J 3 A C 4 / GP J 4 A C 5 / GP J 5
IT8518
FLASH
K S O 0/ P D 0 K S O 1/ P D 1 K S O 2/ P D 2 K S O 3/ P D 3 K S O 4/ P D 4 K S O 5/ P D 5 K S O 6/ P D 6 K S O 7/ P D 7 K S O8 / A C K # K S O 9/ B U S Y K S O 1 0/ P E K S O1 1 / E R R # K S O1 2 / S LC T K S O1 3 K S O1 4 K S O1 5
BA T _ DE T B A T _ V OL T _R C U R _ S E N S E _R R2 4 0 * 0_ 0 4 3 G_ D E T # CC D_ DE T # MO D E L _ I D S MC S MD S MC S MD S MC S MD _ BAT _ BAT _ V GA _ T H E R M _ V GA _ T H E R M _ C P U _T H E R M _ C P U _T H E R M
ADC
AD AD AD AD AD AD AD AD C 0 / GP I 0 C 1 / GP I 1 C 2 / GP I 2 C 3 / GP I 3 C 4 / GP I 4 C 5 / GP I 5 C 6 / GP I 6 C 7 / GP I 7
F L F R A ME # / GP G 2 F L A D0 /S C E # F L A D 1/ S I F L A D2 /S O F L A D 3 / GP G 6 F L CL K /S CK ( P D )F L R S T# / W U I 7 / GP G 0/ T M
10 0 10 1 10 2 10 3 10 4 10 5 10 6
K B C _S P I _ C E # K B C _S P I _ S I K B C _S P I _ S O K B C _S P I _ S C LK
SMBUS
SM SM SM SM SM SM C L K 0 / GP B 3 D A T 0 / GP B 4 C L K 1 / GP C 1 D A T 1 / GP C 2 C L K 2 / GP F 6 ( P U ) D A T 2 / GP F 7 ( P U )
GPIO
( P D )K S O1 6 / GP C 3 ( P D )K S O1 7 / GP C 5 ( ( ( ( ( ( ( ( PD PD PD PD PD PD PD PD )GP H )GP H )GP H )GP H )GP H )GP H )GP H )GP G 0/ I D 1/ I D 2/ I D 3/ I D 4/ I D 5/ I D 6/ I D 1/ I D 0 1 2 3 4 5 6 7
56 57 93 94 95 96 97 98 99 10 7
L C D _B R I GH TN E S S K B C _B E E P
3 3 L E D _S C R O L L# 33 LE D _ N U M# 33 LE D _ C A P # 3 3 L E D _ B A T _ C H G# 3 3 L E D _B A T_ F U LL # 33 L E D _P W R # 8 0C L K 3 IN1 8 0D E T #
24 25 28 29 30 31 32 34
PWM
PW M PW M PW M PW M PW M PW M PW M PW M 0 / GP A 0 ( 1 / GP A 1 ( 2 / GP A 2 ( 3 / GP A 3 ( 4 / GP A 4 ( 5 / GP A 5 ( 6 / GP A 6 ( 7 / GP A 7 ( PU PU PU PU PU PU PU PU ) ) ) ) ) ) ) )
EXT GPIO
( P D )E G A D / G P E 1 ( P D )E G C S # / G P E 2 ( P D )E G C L K / G P E 3
82 83 84 35 17 47 48 12 0 12 4 R 60 0 *0 _0 4
WAKE UP
) ) ) ) ) ) ( P D )W U I 5 / G P E 5 ( P D )L P C P D # / W U I 6 / G P E 6
85 86 87 88 89 90
PS /2
PS2 C PS2 D PS2 C PS2 D PS2 C PS2 D LK 0 / G A T0 / G LK 1 / G A T1 / G LK 2 / G A T2 / G P F 0( P F 1( P F 2( P F 3( P F 4( P F 5( PU PU PU PU PU PU
PWM/COUNTER
( P D )T A C H 0 / GP D 6 ( P D )T A C H 1 / GP D 7 ( P D )T MR I 0/ W U I 2 / GP C 4 ( P D )T MR I 1/ W U I 3 / GP C 6
1 25 18 21
WAKE UP
P W R S W / G P E 4( P U ) R I 1# / W U I 0 / GP D 0( P U ) R I 2# / W U I 1 / GP D 1( P U )
CIR
( P D )C R X / GP C 0 ( P D )C TX / G P B 2
11 9 12 3
33
GP INTE RRUPT
G I N T / GP D 5 ( P U )
LPC/WAKE UP
( P D )L 80 H LA T / G P E 0
19 11 2 2 12 8 CK 3 2 K E CK 3 2 K R2 1 3 X2 1 2 X9 1 2 C2 7 8 *1 2 p_ 5 0V _N P O_ 0 4
1 08 1 09
UA RT
R XD / GP B 0 ( P U ) T X D / G P B 1( P U ) I T 8 5 18 E C_ VS S
( P D )R I N G # / P W R F A I L # / L P C R S T# / G P B 7
CLO CK
C K 3 2K E C K 3 2K
R 21 9 C 29 5
* 0 _0 4
0 . 1 u_ 1 6V _Y 5V _0 4 R 59 3 0 _ 04 NC 3 S H OR T
W /0 C IR)
L CD _ B RIG HT NE S S
K B C _A G N D
C 3 06
* . 1U _ 16 V _ 0 4
.
C 6 02
V D D3
V DD 3
*. 1 U _ 1 6V _ 0 4
J_ KB1
24
R2 1 7
B4100
J _K B 1 * 8 52 0 1 -24 0 5 1 4 5 6 8 11 12 14 15 1 2 3 7 9 10 13 16 17 18 19 20 21 22 23 24 KB KB KB KB KB KB KB KB KB KB KB KB KB KB KB KB KB KB KB KB KB KB KB KB
B5100
J_ K B 2 8 5 20 1 -2 40 5 1 -S I 0 -S I 1 -S I 2 -S I 3 -S I 4 -S I 5 -S I 6 -S I 7 -S O0 -S O1 -S O2 -S O3 -S O4 -S O5 -S O6 -S O7 -S O8 -S O9 -S O1 0 -S O1 1 -S O1 2 -S O1 3 -S O1 4 -S O1 5 4 5 6 8 11 12 14 15 1 2 3 7 9 10 13 16 17 18 19 20 21 22 23 24
K B C _ W R E S E T# C3 0 7 1 u_ 1 0 V _0 6
1u _1 0V_ 06 C 990 70 6
EC MODU LE C HOOSE (FO DIF R FERE NCE K /B TY PE)

V ER . V 1. 0 RX R1 63 10 K/ R1 71 X R1 63 X /R 171 1 0K
MO D E L _ I D
V OL TA GE 3. 3V 0V
R1 8 6 R1 8 5
MO DEL _I D
10 K _ 0 4 *1 0 K _0 4 _ C
V DD 3
RX
Sheet 36 of 53 KBC-ITE IT8518
V DD 3 W L A N _S W # 3 0 V D D3 V S H G_ S E L 4 5 C CD_ E N SU SB# S U S C# 29 2 1, 2 8 , 3 1, 3 5 , 3 9 2 1, 4 0 R 17 8 R 20 6 R 19 8 SM C_ B A T 10 K _ 0 4 4. 7 K _ 0 4 4. 7 K _ 0 4 3 G _D E T # C C D _D E T # R 1 79 R 1 87 1 0 K _ 04 1 0 K _ 04
S U S _P W R _ A C K 21 M E _W E # 1 9 M U T E _ S W # 30 C E LL _ C O N T R O L 45 W L A N _D E T # 2 8 B T _ D E T # 2 8, 3 3 D D _ ON 3 7, 3 8 3 G_ E N 29 SM I# 24 SC I# 24 P W R _ B TN # 21
SM D_ B A T
P WR
C 99 07 14
45 B A T _ DE T BA T _ DE T
C AC D 9 A B AV 9 9 RE C T IF IE R C AC A D 10 B AV 9 9 RE C T IF IE R C AC A D 8 B AV 9 9 RE C T IF IE R C AC A D 7 B AV 9 9 RE C T IF IE R
P CL K _ K BC
R2 1 6
*1 0_ 0 4
P C LK _ K B C _ R
C3 0 4
* 10 P _ 5 0V _ 0 4
B A T_ V O LT
R1 7 7
10 0 _0 4
B A T _ V OL T _R
C2 5 3
1 u _1 0 V _ 06
45
B A T _ V OL T
B A T _ V OL T
1 u_ 10V _0 6 C99 07 03
R S MR S T# 2 1 K B C _R S T # 24 R2 0 8 *0 _ 0 4 S M C _ C P U _T H E R M
C PU_ F A NS E N 3 0 C CD_ S W # 3 0 V C OR E _O N 4 3 A L L _S Y S _ P W R G D 1 2 , 2 1 W L A N _L E D # 2 8 , 3 3 I N T1 6 30 L E D _ D GP U # 3 3 a dd SW I# C H G_ E N 21 45
V DD 3
4 , 24
H_ P E CI
NC 1 S H OR T
wl an l ed C 99 071 4
51 2K bit
C 2 51 0 . 1u _ 1 6V _ Y 5V _ 0 4 U1 3 S P I_ V DD _ 1 8 VD D SI SO R1 9 0 1 K_ 0 4 K B C _F L A S H 3 WP # CE # S CK R1 7 4 4 . 7 K _ 04 K B C _H OL D # 7 H OL D # VSS 5 2 1 6 4 E N 2 5 P 05 -5 0 GC P
KB C_SPI_*_R = 0.1"~0.5"
K B C_ S P I_ S I_ R K B C _ S P I _ S O_ R K B C_ S P I_ CE # _ R K B C_ S P I_ S CL K _ R R 18 8 R 19 1 R 19 2 R 17 5 4 7 _0 4 1 5 _1 % _ 04 1 5 _1 % _ 04 4 7 _0 4 K B C _S P I _S I K B C _S P I _S O K B C _S P I _C E # K B C _S P I _S C L K
* 1 0M _ 04 *3 2 . 7 68 K H z 4 3 *3 2 . 7 68 K H z 4 3 J _8 0 D E B U G1 C2 8 1 *1 2 p_ 5 0 V _ N P O_ 0 4 1 2 3 4 5 *8 8 2 66 -0 5 00 1
V DD 3
V DD3 3 .3 VS
1 9 , 28 , 3 0 , 33 , 3 7 , 38 , 4 4 , 45 2 , 10 , 1 1 , 12 , 1 3 , 19 , 2 0 , 21 , 2 2 , 23 , 2 4 , 2 5, 2 6 , 2 8, 2 9 , 3 0, 3 2 , 3 3, 3 5 , 3 7, 4 2 , 4 3, 46
3 IN1 8 0C L K 8 0D E T #
KBC-ITE IT8518 B - 37
Schematic Diagrams
5VS, 3.3VS, 1.5VS, VIN1

VA VA VA 1 . 5V PJ 7 VD D3 C 7 C2 9 C2 2 1 + 1 .5 S _ CP U U 16 VA VIN 30 M_ B T N # M _ B TN # 3 M_ B T N # 4 I N S TA N T -O N P 2 8 0 8A 1 D Q1 9 G S USB S *M T N 7 0 0 2Z H S 3 G S D C 2 62 P Q1 7 *MT N 7 00 2 Z H S 3 P C7 0 * 47 0 p _ 50 V _ X 7 R _ 0 4 *0 . 0 1 u_ 5 0 V _ X 7R _ 04 VIN VIN GN D P W R_ S W # 5 1 VA 2 VIN D D _ ON _ LA TC H 6 VIN 1 7 R 566 P W R_ S W # 8 VIN 1 2 2 _ 0 4 D D _ ON P W R_ S W # 3 6 R 20 0 1 0 K _ 04 R2 0 5 P R 75 *2 2 0 _ 04 +1 . 5 S _ C P U _ E N 4 *1 0 0 K _ 04 Q 20 * P 1 20 3 B V 0 . 1 u _ 50 V _ Y 5V _0 6 0 . 1 u_ 5 0 V _ Y 5 V _ 0 6 0 . 1u _ 5 0 V _ Y 5 V _ 0 6 SY S1 5 V 8 7 6 5 3 2 1 2 *O P E N -1 2m m + 1 .5 S _ CP U
C 19
C1 8
0 . 1 u _ 50 V _ Y 5V _0 6
0 . 1u _ 5 0 V _Y 5 V _ 06
EMI
Sheet 37 of 53 5VS, 3.3VS, 1.5VS, VIN1
5V
SY S1 5 V VD D 5
5VS
3A
P Q 56 ME 44 1 0 A D -G 8 7 3 6 2 5 1
1.8VS
NMO S
Q4 5 ME 4 4 1 0A D -G 8 7 3 6 2 5 1 5 VS SY S1 5 V 1 .8 V
1.5VS
NM OS
Q 44 * ME 4 4 1 0A D -G 8 7 3 6 2 5 1 C6 2 2 C6 1 9 R4 6 1 0. 1 u _ 1 6V _Y 5 V _ 04 *1 0 0_ 0 4 10 u _ 1 0V _ Y 5 V _ 08 Q 42 * MT N 7 0 0 2Z H S 3 G SU SB G S S S D S YS1 5 V 1 . 8V S 1 .5 V
N MO S
Q 25 P 12 0 3 B V 8 7 3 6 2 5 1
1 .5 V S
S Y S 1 5 V V D D5 5V
P R 1 05 1 M _0 4
3A
Power Plane
R 2 14 1 M _0 4 1 .5 VS_ EN
R 24 5 1 M_ 0 4
R 46 0 C6 2 3 * 1M _ 04 1 . 8V S _ E N
C3 3 3 4
P Q2 5 MT N 70 0 2 Z H S 3 C 37 8 G D D _ ON # 1 4 7 0p _ 5 0 V _ X7 R _0 4 S PJ 1 0 2 * 4 0m i l D
P C 10 2 S 4 7 0 p_ 5 0 V _ X 7R _ 04
Q 33 M T N 7 0 0 2Z H S 3 C 61 2 G 1 D S US B P J 12 *4 0 m i l S 3 9 ,4 0 * 22 0 0 p_ 5 0 V _ X 7R _ 04
0. 1 u _ 1 6V _ Y 5 V _ 04
C3 3 1 R2 2 4 1 0 0_ 0 4 0 . 1u _ 1 6 V _ Y 5 V _ 0 4 1 0u _ 1 0 V _ Y 5 V _ 0 8 Q 26 M T N 7 0 02 Z H S 3 G SUSB G D
C 3 00 D Q4 3 *M TN 7 00 2 Z H S 3 2 2 0 0 p_ 5 0 V _ X7 R _ 04
Q2 9 MT N 7 00 2 Z H S 3
ON ON ON
S Y S 5V
3.3V
SY S1 5 V VD D 3
3.3VS
P Q 57 ME 44 1 0 A D -G 8 7 3 6 2 5 1 SY S1 5 V 3 .3 V V DD 3
P R1 1 2 1 0 K_ 0 4
NM OS
Q 46 M E 4 41 0 A D -G 8 7 3 6 2 5 1 3 . 3V S D D _ ON # D D _ ON # 3 0 , 3 1 , 40 V IN1 V IN VA SYS1 5 V SYS5 V V DD 5 5V 5V S V DD 3 3. 3 V 3. 3 V S + 1. 5S _ C P U 1. 5 V 1. 5 V S 1. 8 V 1. 8 V S 38 1 2, 3 8 , 4 0 , 41 , 4 2 , 4 3 , 44 , 4 5 45 3 8, 3 9 , 4 0 3 8, 3 9 38 2 6, 2 9 , 3 0 , 31 , 3 5 , 3 9 , 40 , 4 1 , 4 4 1 2, 1 9 , 2 2 , 25 , 2 6 , 3 0 , 33 , 3 5 , 4 2 , 43 , 4 6 1 9, 2 8 , 3 0 , 33 , 3 6 , 3 8 , 44 , 4 5 3 , 4, 1 2 , 1 3 , 1 7, 1 9 , 2 0 , 2 1, 2 3 , 2 4 , 26 , 2 8 , 2 9 , 31 , 3 2 , 3 3 , 34 , 3 9 , 4 0 , 41 , 4 4 2 , 10 , 1 1 , 1 2, 13 , 1 9 , 2 0, 21 , 2 2 , 2 3, 2 4 , 2 5 , 2 6, 2 8 , 2 9 , 3 0, 3 2 , 3 3 , 3 5, 3 6 , 4 2 , 43 , 4 6 4, 7 4 , 10 , 1 1 , 3 1, 40 28 39 7 , 25 , 3 9
3A
P R 1 07 1 M _0 4
3A
Power Plane
R 25 9 1 M_ 0 4
D C6 2 4 C6 1 8 R2 6 0 0. 1 u _ 1 6V _ Y 5 V _ 04 *1 0 0_ 0 4 10 u _ 1 0V _ Y 5 V _0 8 G S
P Q2 7 M T N 7 0 0 2Z H S 3 P C1 0 6 *. 1 U _ 1 6 V _ 04
3 6, 38
D D _O N
P R 11 3 1 0 0K _ 0 4
P C 1 03 2 2 0 0p _ 5 0 V _ X7 R _0 4
P Q2 6 MT N 70 0 2 Z H S 3 G D D_ O N#
C 37 9 D 2 2 00 p _ 5 0V _X 7 R _ 0 4
Q 34 M TN 7 00 2 Z H S 3 G SU SB G
D S
Q3 5 *M TN 7 00 2 Z H S 3
ON
B - 38 5VS, 3.3VS, 1.5VS, VIN1
Schematic Diagrams
VDD3, VDD5
V RE F P R8 4 *0 _ 0 4 P R 80 0_04 P C 76 1u _ 1 6V _X 5 R _ 0 6 Z 24 0 1 P R8 8 E N_ 3 V P C8 1 1 00 0 p _ 50 V _ X 7 R _ 0 4 1 00 K _ 0 4 5 6 4 2 3 1 P U4 VIN 24 VO 1 23 L D O3 P Q 51 P 1 2 0 3B V 4 V DD 3 2 P J 22 *5 m m 8 7 6 5 C C P C1 0 7 + P D2 4 P R1 1 1 13 K _ 1 % _0 6 15 0 u _6 . 3 V _ V _ A P C 10 5 1 00 p _ 5 0V _ N P O _ 0 4 1 SYS3 V PC 8 4 P C8 5 1 0 u _6 . 3 V _ X 5 R _ 0 6 Z 24 0 3 9 B O OT 2 P OK 22 PR 7 6 Z 24 1 5 P C 72 Z 24 1 4 5 6 7 8 1 u_ 2 5 V _ 08 Z2413 *1 0 K _0 4 S Y S 5V P C 91 P C8 9 0 . 1u _ 5 0 V _Y 5 V _ 06 P Q4 9 P 12 0 3 B V 1 PL 1 2 4.7 U H _ 6 . 8 *7 . 3 *3 . 5 2 P D2 3 S K IP S E L L G A TE 2 EN 0 G ND PAD GN D Z2406 12 19 L G A TE 1 L DO 5 VCL K 4 C S O D 1 4 0S H P 1 2 0 3B V * S K 3 4S A A A 1 0 0 0p _ 5 0V _X 7 R _ 0 4 1 2 3 V IN Z 2 4 10 Z2411 C PD 2 0 PQ 4 8 C 5 6 7 8 P C1 0 4 3 0 K _ 1% _ 0 6 1 2 3 P C9 0 4 .7 u_ 2 5 V _ X5 R _0 8 4 .7u _ 2 5V _X 5 R _ 0 8 Z2417 Z 2 4 16 PR 7 8 E N_ 5 V 1 0 0K _0 4 P C7 1 1 00 0 p _ 50 V _ X 7 R _ 0 4
EN 2
T ON S E L
VR EF
VFB2
VFB1
7 V RE G 3 VIN PC 8 7 4 . 7 u _2 5 V _ X 5R _ 08 4 . 7 u_ 2 5 V _ X5 R _0 8 8 7 6 5 PC 8 8 8 VO 2
0.1 u _ 25 V _ X 7 R _ 0 6 Z2404 10 U GA T E 2 11 PH ASE2
uP6182
EN1 B OO T 1 21 U G A TE 1 20 P HA S E 1 Z2412 4
SY S5 V V D D5
5A
PL 1 3 4 . 7 U H _ 6. 8 * 7. 3 * 3. 5 2 1
3 2 1
Z2405 P Q 50 P 1 2 0 3B V 4 P D1 4
5A
Ra
P R 1 08
PJ 2 1 1 * 5 mm 2
P C1 8 7 0 . 1 u _ 16 V _ Y 5V _0 4
P D2 1 3 2 1
C S O D 1 4 0S H A
13
14
25 15
16
17
*S K 3 4 S A V R E G5
PD 8 18 C PR 8 9 C R B 0 5 4 0S 2 A VR EG 5 P R2 2 3
Sheet 38 of 53 VDD3, VDD5
Rb
P R 1 04 1 8 .7 K _ 1% _ 0 6
P C 1 08 + 1 5 0 u_ 6 .3 V _ V _ A
P C 1 86 0 .1 u _1 6 V _ Y 5 V _ 0 4
V RE F V RE G 5 V IN 1 V R E G5 P R 79 Z 24 1 8 P R9 4 *0 _ 0 4 E N _ 3V V IN C
P R8 6 P R8 7
*0 _ 04Z 24 0 7 0_ 0 4
P R 22 9 *0 _ 0 4
Z 2 40 8
P R1 0 9 2 0K _ 1 % _ 04
R B 0 5 40 S 2
E N _A L L P R 2 22 * 68 0 K _ 1 % _0 4
* 0 _0 4
0_ 0 4
P C 73 0 . 0 1u _ 5 0V _X 7 R _ 0 4 Z 2 4 20
PD 9 C
R B 0 5 4 0S 2 A S Y S 5V
? ? ? 5.20v C990708
P D 10 A P R8 5 P D1 3 A 4. 7u _ 2 5V _X 5 R _ 0 8 R B 0 5 40 S 2 1 0u _ 6 .3 V _X 5 R _0 6 P C 74 0 . 0 1u _ 5 0V _X 7 R _ 0 4 Z 2 4 21 C 2 . 2 _0 6 P C7 9 P C7 7 V R E G5 P D 11
R B 0 5 4 0S 2 C
S Y S 10 V P C7 5
R B 0 5 4 0S 2 22 0 0 p_ 5 0 V _ X7 R _0 4 A
P R 77
0 _0 6
E N _ 5V
10 K _ 0 4 D P Q2 0 Z2419 G P Q 21 D G 3 6 ,3 7 D D _ ON S M T N 7 0 0 2Z H S 3 1 S PC8 2 P R 90 MT N 7 00 2 Z H S 3
P D 12 A
R B 0 5 4 0S 2 C
S Y S 15 V P C7 8 22 0 0 p_ 5 0 V _ X7 R _0 4
PJ 8 *4 0 m li 2
0 . 1u _ 1 0 V _X 5R _ 04
X7R -> X5R C990715
1 0 0K _0 4 VIN SYS1 5 V V IN1 V DD 5 V DD 3 SYS5 V 12 , 3 7 ,4 0, 41 ,4 2 , 4 3, 4 4 ,4 5 3 7 , 39 , 4 0 37 37 19 , 2 8 ,3 0, 33 ,3 6 , 3 7, 4 4 ,4 5 37 , 3 9
VDD3, VDD5 B - 39
Schematic Diagrams
Power 1.8V, PEX_VDD

1.8VS 5V 3.3 V PC 191 P R219 10K_04 R117 *10mil_short 1 V 1.8 P J23 2 *O N_2A PE
2A
PU 8 5 9 VIN 7 VIN PO K 8 1 EN 2 GND VFB AX6 61 0 / GS71 13 P R220 1. 27K _04 _1% P C190 82p_50V_NP O_04 P C193 PC 94 1 P C188 0.1u_16V_Y 5V_04 VCNTL VOUT VOUT 6 4 3 1u_16V_X 5R_06
1.8VS
1.8V
3.3V 21 1.8V WRGD S_P P R218 10K _04 5V
1.8VS _PW RGD E N1.8VS
2A
P J28
*O N_2A PE
D PQ 54 2N7002 S
PC189 *1u_6.3V_Y5V _04 PC195 P C192
37,40
S USB
PR217
1M _04
G P C185
*10U _10V_08 10u_10V_Y5V _08 P R221 1K _1%_04
0. 1u_16V _Y5V _04 10u_10V _Y5V_08
2200p_50V _04
Sheet 39 of 53 Power 1.8V, PEX_VDD
SY S15V S 5V YS R98 P R216 1M_04 10K _04
1.1V TT S_V
N MO S
Q7 P 1203BV 8 7 3 6 2 5 1 C128 C127 R99 0. 1u_16V _Y5V_04 10u_10V _Y5V_08 100_04 D D Q9 MTN7002ZHS3 G S 1 G S 4
250 MIL
1
PE _VD X D P J5 2 *OPE N_5A
1.05V@4A
1.1V_1.0V_P WR_E N SUS B D PC184 P Q55 S MTN7002ZHS 3 *.1U_16V_04 6800p_ 50V 7R_04 _X S B US 37,40 C131
21,28, 31,35,36 S B# US
Q10 MTN7002ZH S3
P J24 *40mil 2 dG PU_P WR_E N# dG PU_P WR_E 13, 17,36 N#
ON
3, 4,12,13,17, 19,20,21, 23,24,26,28, 29,31,32,33, 34,37,40,41,44 3.3V 37,38,40 SY S15V 37,38 SY S5V 12,37,38,40, 41,42,43,44,45 VIN 13,14 P X V E _ DD 2,4,6,7,19,20, 21,24,25,26, 41,42,43 1.1V TT S_V 26,29,30,31, 35,37,40,41,44 5V 37 1.8V 7,25,37 1.8VS
B - 40 Power 1.8V, PEX_VDD
Schematic Diagrams
Power 1.5V/0.75V
P C 18 0 4 . 7 u_ 2 5 V _ X 5 R _ 0 8 P C 9 4 4 . 7 u _ 2 5V _ X 5 R _ 0 8 P C 1 8 1 0 . 1 u _ 50 V _ Y 5 V _0 6 P C 9 5 0 . 1 u _ 5 0V _Y 5V _ 06 V IN PD 1 6 A 5V PU 5 V D DQ u P 6 1 63 PC 1 0 9 1 0 u _1 0 V _ Y 5 V _ 08 P C 1 82 23 V L DO IN PJ 1 1 2 V TT _ M E M * OP E N_ 2 A 1 PC 1 1 2 P C 1 11 P C 1 10 V T T GN D LL 19 V T T S NS DR V L 0 _ 06 GN D PG ND C S _G N D C S P V C C5 V C C5 15 14 18 17 16 MO D E P C9 8 0 . 1 u _ 10 V _ X 7 R_ 0 4 5 Z2604 V T T RE F 5V PR9 3 0_06 Z 26 0 5 6 C O MP Z 26 0 6 PR9 8 8 V D D Q S NS Z26079 V D DQ S ET *1 0 _0 4 G N D PC 9 6 * 1 00 0 p _ X 7 R _ 0 4 N C NC S3 S5 10 P GO OD 11 Z 2 61 0 P R 1 0 6 Z 2 60P9R 1 01 Z 2 60 8 0 _ 06 G 6 . 1 9 K _ 1 % _ 06 5V C SO D1 4 0 SH *S K 3 4 S A A A S * 5. 1_ 0 6 P R1 0 3 Z2 6 1 1 PR 1 1 5 PQ 5 3 IR F H7 9 3 2 D C PD 1 5 C P D 22 P R 1 14 1 0 u _ 10 V _Y 5 V _ 0 8 0_06Z26022 1 0 u _ 10 V _ Y 5 V _ 08 * 10 U _ 1 0V _0 8 3 P R 1 1 0 0 _ 06 P R1 0 2 P R1 0 0 *0 _ 0 4 *0 _ 0 4 Z 26 0 3 4 20 Z2 6 1 2 1 Z 2 6 01 24 VTT D RV H 0 _0 6 * 10 0 0 p _ X 7 R _ 0 6 P C1 0 1 P C 1 78 P C 99 P C9 2 2 2 0 u _2 . 5 V _ B _ A + * 1 0_ 0 6 PR2 1 5 * 1 0 00 p _ X 7 R _ 0 6 P C 17 9 + PC 8 3 2 2 0u _ 2 . 5 V _ B _ A 21 Z2 6 1 3 VBST P R1 1 6 Z 2 62 0 P L 11 2 . 5 U _1 0 * 10 * 5 1 2 22 Z 26 1 4 VD DQ 0 . 1 u _ 10 V _ X 7 R _0 4 G S R B 0 5 40 S 2 C PQ 5 2 IR F H7 9 2 3 D
1.5V
8A
PJ 2 0 1 2 * OP E N _ 8 A 1 .5 V
Z2621
0 . 1 u_ 1 6 V _ Y 5 V _ 0 4
0 . 1 u _1 6 V _ Y 5 V _ 0 4
VD DQ 5V
PR 9 9 2 .2 _ 0 4
Z 2 6 17
P R 2 12 0_06
13
P C9 7 1 u _ 16 V _ X 5 R _ 06
PC 1 0 0 3 .3 V 1u _ 1 6 V _ X 5 R _ 0 6
Sheet 40 of 53 Power 1.5V/0.75V
P R9 5 1 0 0 K_ 0 4
12
25
Z2618 PC 9 3 *1 0 0 0p _ X 7 R _0 4 P R9 6
DD R 1 . 5 V _ P W R G D
DD R1 .5 V _ P W RG D 2 1 P R2 1 4 * 0 _0 4
5V *1 0 K _ 1 % _ 04 PR 9 7 9 . 5 3 K _ 1% _ 0 6 PR 2 1 3 9 . 7 6K _1 % _ 0 6
NMO S
1 .5 V Q1 5 P 1 2 03 B 8 7 6 5 Q1 4 P 1 2 0 3B 8 7 6 5 4 4 V 3 2 1 C2 3 2 2 V F B V DD Q 3 2 1
5V
P R9 1
4 7K _0 4 D
1 .5 VEN SY S1 5 V P Q2 3 MT N 70 0 2 Z H S 3 G S D P C 86 P Q2 2 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 *M T N 7 0 0 2 Z H S 3 S 1 M _ 04 R 173
P R9 2
1 0 0 K _ 04 D
Z 2 61 5 1
240MIL
C2 2 5 0 . 1u _ 1 6 V _ Y 5 V _ 0 4
PJ 6 1 2 * OP E N _ 1 1 A R 16 8
P Q2 4 21 , 3 6 S US C # G MT N 70 0 2 Z H S 3 S
P J9 *4 0 m li 3 0 , 3 1, 37 D D _O N#
F B V D D Q_ P W R_ E N
10 u _ 1 0 V _ Y 5 V _ 0 8 1 0 0 _0 4
D G S P S _ N V V D D _P GO OD #
C 250 6 8 0 0 p_ 5 0 V _ X 7 R_ 0 4 5V 4 + 1 .5 S _ C P U_ PW RG D PR 8 3 PR 8 2 1 0 0K _0 4 *1 0 0 K _ 0 4 D V TT E N
Q 17 M T N 7 0 0 2Z H S 3 G
Q 16 M TN 7 0 02 Z H S 3
PC8 0 PQ 1 8 0. 1u _ 1 6 V _ Y 5 V _ 0 4 M TN 7 0 0 2Z H S 3
V T T _ ME M
PR 8 1
*2 2 _0 4 Z 2 6 1 6 S US B D G S
ON
P S _ N V V D D _ P G OO D # 4 4
PQ 1 9 3 7 ,3 9 S US B SU SB G S * MT N 7 00 2 Z H S 3
1 0 , 1 1 V T T _ ME M 1 2 , 37 , 3 8 , 4 1 , 4 2 , 43 , 4 4 , 4 5 V I N 4 , 1 0 , 11 , 3 1 , 3 7 1 . 5 V 1 4 , 1 5 , 16 F B V D D Q 3 7 ,3 8 ,3 9 SY S1 5 V 2 6, 29 , 3 0 , 3 1 , 3 5, 37 , 3 9 , 4 1 , 4 4 5V 3 , 4 , 12 , 1 3 , 1 7 , 1 9 , 20 , 2 1 , 2 3 , 2 4 , 26 , 2 8 , 2 9 , 3 1 , 32 , 3 3 , 3 4 , 3 7 , 39 , 4 1 , 4 4 3 . 3 V
Power 1.5V/0.75V B - 41
Schematic Diagrams
Power 1.1VS_VTT
CONTROL 1.1VS_VTT
H_ VTTV ID1 = LO W, 1.1V H_ VTTV ID1 = HI GH, 1.05 V
Cl ar ks fi el d - -> 1. 1V Au bu rn da le - -> 1. 05V

5V
H_VTTVID1 H L +1.05V +1.1V

3. 3 V R3 7 D A P C 1 642. 7u _ 2 5V _X 5 R _0 8 R4 4 *1 0 0K _ 0 4 6 H_ V T T V I D1 R5 1 1 0 K _ 04 B C Q5 2 N 3 9 04 E 10 0 K _ 04 G S PC 2 3 PQ 8 MT N 70 0 2 Z HS 3 * 1 U _ 6. 3V _ 0 4 P R1 9 7 . 1 5 K _1 % _ 04 C P C 1 61. 7 u _2 5 V _ X 5 R _ 0 8 4 VI N 3. 3 V
P R1 1 1 0 K_ 0 4 5V
PD 3 R B 05 4 0 S 2 P Q 38 Q M3 00 2 S 5 6 7 8 4 4 P Q 37 *Q M3 0 0 2S 5 6 7 8
P C 1 58 + 1 5 u _2 5 V _ 6. 3 * 4. 4 _ C
R4 6 10 0 K _ 04
1.1VS_VTT
V T T _S E N S E 6 , 4 2
13
14
15
16
1. 1V S _ V T T _ E N _ R 3 .3 V P R 18 1 0K _0 4 12 EN 11
PU 1 S C4 7 5 A 1 LX 2 BST 3 VC C 4
0. 1 u _ 50 V _ Y 5 V _ 0 6 PL 9 0 . 5U H _ 1 0 *1 0* 4 . 1
2 3 1
P C2 8
2 3 1
G0
IL IM
G1
DH
23A
V T T 1. 1 V S 1
PJ 1 5 2 * OP E N -12 m m
1 .1 VS_ VT T
M 99 01 25
P C 35 P R 27 10 0 0 p_ 5 0 V _X 7 R _0 65. 1 _ 0 6 C P D4 4 2 3 1 4 2 3 1 SK3 4 SA A 5 6 7 8 5 6 7 8
GN D
RT N
Sheet 41 of 53 Power 1.1VS_VTT
ON
5V
4, 2 1 1 . 1 V S _V TT _ P W R GD P R 20 * 90 . 9 K _ 1% _ 0 4 FB
P GD 10 V OU T 9 FB D0 D1 P C2 9 0 . 1 u_ 1 0 V _X 7 R _ 0 4 PR 2 1 0 _ 04
DL 17 P C 33 1 u _1 6 V _ X5 R _0 6 P Q1 1 QM3 0 0 6S P Q 43 QM 3 00 6 S PA D
P C 16 6 + 5 60 u _ 2. 5 V _ 6 . 6* 6 . 6* 5 . 9_ C
P C1 6 3 0. 1 u _ 16 V _ Y 5 V _ 0 4
P C 16 9 + 22 0 u _6 . 3 V _ 6. 6* 6. 6 * 4. 2 _ C
PR 2 3 6 4. 9 K _ 1 % _0 6
P C3 2
P R 22 1 0K _1 % _ 04
P C3 4 4 70 p _ 50 V _ X 7R _ 04
P R2 4 6 4. 9 K _ 1 %_ 0 4
20 p _ 50 V _ N P O _ 04
P R 26 2 5. 5K _ 1 % _0 4
R5 3 5
* 10 m i _ s ho rt l PJ 4
5V
P R1 7
10 K _ 0 4
1 *4 0 m li
1 . 1 V S _ V T T_ E N _R
P R1 3 *1 0 0K _0 4 G D
P Q 10 *M T N 7 0 02 Z H S 3 S
P R1 4 *1 0 K _ 04
2 1 1 . 1V S _V T T _ E N
R5 3 4
1 00 K _ 0 4
G P C2 7 S
PQ 9 * MT N 7 0 02 Z H S 3 2
PJ 2 * 40 m i l
. 1U _ 16 V _ 0 4
6 , 4 2 V T T 1. 1 V S 2 , 4, 6 , 7 , 1 9, 2 0 , 2 1 , 24 , 2 5 , 26 , 3 9 , 42 , 4 3 1 . 1V S _V T T 3 , 4 , 1 2, 1 3 , 1 7, 1 9 , 2 0, 21 , 2 3 , 24 , 2 6 , 28 , 2 9 , 3 1, 3 2 , 3 3, 3 4 , 3 7, 3 9 , 4 0, 44 3 . 3 V 2 6 , 2 9, 3 0 , 3 1, 3 5 , 3 7, 3 9 , 4 0, 44 5 V 1 2, 3 7 , 3 8, 4 0 , 4 2, 4 3 , 4 4, 45 V I N
B - 42 Power 1.1VS_VTT
Schematic Diagrams
Power VGFX_Core
1 .1V S _ V TT P R 18 8 10 K _0 4 P J 18 2 4 0 mi l 1 1K _ 04 1 K_ 0 4 1 K _0 4 * 1K _ 04 *1K _ 0 4 1K _ 0 4 *1 K _0 4 P J1 9 2 4 0m i l 1 D F GT _V R _ E N _ R D F GT _V I D _ 0 D F GT _V I D _ 1 D F GT _V I D _ 2 D F GT _V I D _ 3 D F GT _V I D _ 4 D F GT _V I D _ 5 D F GT _V I D _ 6 V T T1 . 1V S 7 D F G T_ V ID _0 7 D F G T_ V ID _1 7 D F G T_ V ID _2 7 D F G T_ V ID _3 7 D F G T_ V ID _4 7 D F G T_ V ID _5 7 D F G T_ V ID _6
3. 3 V S
P R 1 89
1 0K _ 0 4
3.3VS
7 D F GT _V R _E N
5 VS
P R5 9 V IN P R5 8 4 . 7 u_ 25 V _ X 5R _ 0 8 1 0_ 06 0 . 1u _ 50 V _Y 5 V _0 6 4 . 7 u_ 25 V _ X 5R _ 0 8
P R1 9 7 4 . 7K _ 0 4
*1 K _0 4 *1 K _0 4 *1 K _ 04 1 K _ 04 1K _ 04 *1 K _0 4 1 K _0 4
P R 19 6 P R 1 95 PR1 9 4 P R 19 3 P R 19 2 P R 1 91 P R 1 90
1.1 VS_ VTT
*4 . 7 U _2 5 V _0 8
*. 0 1U _1 6V _ 0 4
P R 20 4 P R 2 03 PR2 0 2 P R 20 1 P R 20 0 P R 1 99 P R 1 98
1 0 K_ 1 %_ 0 4
P R2 0 5 *10 K _ 1% _0 4
P C6 2 1 u_ 1 6V _ X5 R _ 06 P Q4 7 MD U 2 65 7 G S
VGFX_CORE
(0. 7V~1 .77V)
V GF X _C O R E GP U 2 P J 14 * OP E N _ 8A PL 1 0 1 .0 U H _1 0* 10 *4 . 5 1 2 5 60 u _2 . 5V _ 6 . 6*6 . 6 *5. 9 _ C * . 1U _1 6V _ 0 4 1
GF X_ I MO N 32 31 30 29 27 25
Sheet 42 of 53 Power VGFX_Core
PC5 2
PC5 3
3. 3VS
P R 20 8 0_ 04 G N D _ 32 1 1 24 V CC BST 23 22 DRV H 21 3 2 11 _D R V H 3 2 11 _S W P R 60 0 _ 06 P C6 3 0. 2 2 u_ 16 V _ 06
28
V ID 1
V ID 3
EN
V ID 0
V ID 2
V ID 4
V ID 5
26
P R 62 PC 17 1 0.1 u_ 2 5V _ X7 R _ 06 P R2 0 6 *1 0K _ 1 %_ 04 5.6 2K _ 1 %_ 04 3 21 1_ C L K E N #
1 P WR GD 2 3 C LK E N # 4 F BR TN FB P U3 A D P 3 21 1 I MON
V ID 6
PC 17 3 PC 17 2 10 0 0p _5 0 V _X 7 R _ 04
22 0p _ 50 V _N P O_ 04 P C 17 5 P C 1 76 P R 20 9 20 K _1 % _0 4 4 7 p_ 50 V _ N P O_ 04
19 DR V L P GN D 18 17 A GN D CS C OM P CSREF
3 2 11 _D R V L P C 64 2 . 2 u_ 6.3 V _ X5 R _ 06 G P Q1 4 *M D U 2 65 4 D
6 7
M990125
P Q4 6 MD U 2 65 4 G S S A P D 25 D C P D1 9 * S K 34 S A C S O D 1 4 0S H A C
5.1 _0 6
C OMP GP U
8 I LI M L L IN E RAM P C SF B IR E F RPM
PR 21 0 1K _ 1% _ 04
47 0p _ 50 V _X 7 R _0 4 PR6 4 0_ 0 4 PR6 7 7 . 15 K _1 % _0 4
A GN D
33
P C 17 0 22 00 p _5 0V _ X 7R _ 0 6
R T
+ PC1 6 8 P C 1 67
+ P C 16 4 P C 1 65
GN D _3 2 11
10
11
12
14
16
5VS GP U 0 1 Ap p.
3 2 11 _C S C O M P
GN D _3 2 11
13
15
Pla R ce TH1 c se to lo
3 2 11 _ C S C O M P 3 21 1 _C S C O M P PR 66 P R 68 80 . 6K _ 1 %_ 04 P R6 9 2 0 0K _ 1% _ 04 P R7 0 3 2 4K _ 1% _ 04 *0_ 0 4 RT 3 10 0 K_ N T C _ 06 _ A 2 1
ind to o th s e lay uc r n e am er
CP U GP U
P R6 5 1 10 K _1 %_ 0 6
GN D _3 21 1
4 5 3K _ 1% _ 04
P J 25 1 P R2 1 1 P R2 0 7
* 40 mi l 2 1 00 _ 04 1 00 _ 04
GP U V C C S E N S E 7
P R 71 GN D _ 3 21G N D _ 32 1G N D _ 32 1 1 1 1
P C6 6 1 50 0 p_ 5 0V _ 04
PC6 5 2 20 p _5 0 V_ N P O _0 4
P R6 1 1 80 K _1 %_ 0 4 P R 63 24 3K _ 1 %_ 04
GPU VIN
GP U V S S S E N S E 7 PR7 2 1 K _ 1% _0 4
distrib evenly b ee N si e and Sside ute etw n d , pref erabl on secondary si e. y d
P C 67 1 0 00 p _5 0V _ X7 R _ 0 4
P C 17 4 1 0 00 p_ 5 0V _ X7 R _ 04
GN D _ 3 21 1
2 ,10 ,11 ,1 2,1 3, 1 9 ,20 ,21 ,22 ,2 3, 2 4, 2 5 ,26 ,28 , 2 9, 3 0, 3 2 ,33 ,35 , 3 6, 3 7, 4 3 ,46 3. 3 V S 2,4 , 6, 7 , 1 9, 2 0, 2 1 ,24 ,25 , 2 6, 3 9, 4 1 ,43 1. 1 V S _V T T 3, 4 ,1 2,1 3, 1 7 ,19 ,20 ,21 ,2 3, 2 4, 2 6 ,28 ,29 ,3 1, 3 2, 3 3 ,34 ,37 ,3 9, 4 0, 4 1 ,44 3. 3 V 4 ,10 , 1 1, 3 1, 3 7 ,40 1. 5 V 7 V G F X_ C OR E 1 2, 3 7 ,38 ,40 , 4 1, 4 3, 4 4 ,45 V I N 12 ,19 ,2 2, 2 5, 2 6 ,30 ,33 ,3 5, 3 7, 4 3 ,46 5V S 6 ,41 V TT 1. 1 V S
*. 0 1U _1 6V _ 0 4
P V CC
20
5VS
P R 17 0
22 0 u_ 6. 3 V _ 6. 6 *6 . 6* 4. 2 _C
SW
PC4 8
P C 43
P C 45
Power VGFX_Core B - 43
Schematic Diagrams
V-Core
P C 46 * 1n _ 50 V _ 04 S GN D 2 P C 18 0 . 1 u_ 5 0V _ Y 5 V _0 6 P R3 9 *4 7K _ 0 4 CS _ PH1 CS _ PH2 P R3 0 P R2 9 P R3 6 1 R clo to cho T1 se ke RT 1 10 0 K _N TC _0 6 _A 2 15 0 K _0 6 15 0 K _0 6 V IN 1 65 K _ 1% _ 06 P R 43 P R3 8 7 3. 2 K _ 1% _ 04 P C4 9 15 0 0p _ 50 V _ 04 P C4 7 4 70 p _5 0 V _X 7 R _ 04 P C 50 1 K _0 4 10 0 0p _ 5 0V _ X 7R _0 4 P Q3 6 MD U 26 5 7 D G C S COM P CS S UM CSR EF C S COM P 6 80 K _ 1% _ 06 1 6 2K _ 1 %_ 0 6 47 . 5 K _1 % _0 4 8 0. 6 K _ 1% _ 04 S P Q3 5 *MD U 2 65 7 D G S VIN
FOR EMI
P C 17 7 0 . 1 u_ 5 0V _ Y 5 V _0 6 P C 1 9 0 . 1u _ 50 V _ Y 5V _ 0 6 P C 1 3 3 0 . 1u _ 50 V _ Y 5V _ 0 6 P C 1 53 0. 1 u _5 0 V _Y 5 V _ 06 P C 1 51 0. 1 u _5 0 V _Y 5 V _ 06 P C 21 0 . 1 u_ 5 0V _ Y 5 V _0 6 P C 2 0 0. 1 u _5 0 V _Y 5 V _ 06 4. 7 u _2 5 V _X 5 R _ 0 8 4 . 7 u_ 2 5V _ X 5 R _ 08 4. 7 u _2 5 V _X 5 R _ 0 8 * 4. 7 U _ 2 5V _0 8 4 . 7u _ 25 V _ X 5R _0 8 4 . 7u _ 25 V _ X 5R _0 8 *4 . 7 U _ 2 5V _ 0 8
P C5 1 1 u_ 6 . 3V _ X 5R _0 4
P C 19 6 + 3 3 0U _2 5 V
PC1 5
P C 19 7
PC1 7
P C 20 1
PC2 0 2
P C 1 44
P C 1 48
S G ND2
H DR1 P L7 0 . 36 U H _1 3 *1 3* 3. 8 LX 1 C S _P H 1 P Q3 9 MD U 26 5 4 P C4 0 5 VS 0 . 22 u _5 0 V _0 8 G G S S A P Q4 0 MD U 26 5 4
VCORE
22 0 u_ 6 . 3V _ 6 . 6* 6. 6 *4 . 2 _C
V C OR E
3 . 3V S
3 . 3V S
P R3 1 2 . 21 K _ 1% _ 04
26A
P R 15 1 0 _0 6
PR4 4 P R 46 PR4 5 PR4 7
3 3 0u _ 2. 5 V _ 6. 6 *6 . 6 *5 . 9_ C
24 23 22 21 20 19 18 17 16 15 14 13
P R 1 84 3K _ 1 %_ 0 4 4, 2 1 DE L A Y _ P W R GD 6
P R 1 85 3K _ 1 %_ 0 4 V R _O N 1 2 3 4 5 6 7 T RDE T # 8 9 5V S 10 T T S N S 11 12 49
ADP32 12
36 35 34 33 32 31 30 29 28 27 26 25 P R3 4 2_ 0 6 P R3 2 1K _ 0 6 P R3 3 1K _ 0 6 CS _ P H2 CS _ P H1
P U2
P R 16 5 . 1 _0 6 P D2 SK3 4 SA P C 26
SW FB3 P W M3 O D 3# IL IM C S C O MP CSSU M C SREF LL I N E RAM P R T RPM IR E F
P C 1 56 4. 7 u _2 5 V _X 5 R _ 0 8
P C 2 2 4 . 7u _ 25 V _ X 5R _0 8
P C 2 00 4. 7 u _2 5 V _X 5 R _ 0 8
P C 19 8 4 . 7 u_ 2 5V _ X 5 R _ 08
P C 15 5 4 . 7 u_ 2 5V _ X 5 R _ 08
P C 1 9 9 4 . 7u _ 25 V _ X 5R _0 8
P C 1 507. 1u _ 50 V _ Y 5V _ 0 6
P C 3 9 4. 7 u _2 5 V _X 5 R _ 0 8
4 . 7u _ 25 V _ X 5R _0 8
S G ND2
VC C PH1 PH0 D PRSL P P S I# V ID 6 V ID 5 V ID 4 V ID 3 V ID 2 V ID 1 V ID 0
P C5 5 0 . 1u _ 10 V _ X7 R _ 0 4 RS N RS P P R 48 5 . 1K _ 1 %_ 0 4 PR4 9 1. 6 5 K _1 % _0 6
P C5 9 1 50 p _5 0 V _0 6 P R 53 3 9 . 2K _ 1 %_ 0 4
G S
G S
S GN D 2
37 38 39 40 41 42 43 44 45 46 47 48
H DR 2
C S _P H 2
V RT T T TS N S A GN D A GN D
P R 28 1 0 _0 6
PR5 6
Sheet 43 of 53 V-Core
I M ON C LK E N #
5 VS L X2
PL 8 0 . 3 6U H _ 13 *1 3 *3 . 8
26A
4 H _P R OC H OT # D P C 41 P R 37 S GN D 2 G 1 0 _0 4 1 . 1 V S _V T T P C 42 1 u _1 6 V _X 5 R _ 06 1 K _0 4 1 K _ 04 1K _ 0 4 *1 K _ 0 4 * 1 K _0 4 1 K _0 4 * 1K _ 0 4 6 49 _ 1% _ 04 V1 .8 P R3 5 2_ 0 6 B S T2 0 . 2 2u _ 50 V _ 08
P Q4 5 MD U 2 65 4 G
P Q1 5 MT N 7 00 2 Z H S 3 S
P Q 44 M D U 2 6 54 G
P R 25 5 . 1 _0 6 P D5 SK3 4 SA P C 37 2 2 0p _ 50 V _ 06 P R5 7 0 _0 4
S G ND2 P R4 0 P R4 2 0 _0 4 0 _0 4
RS P P C 61 * 10 0 0P _ 5 0V _ 0 4 RS N P R5 4 0 _0 4
V C C _S E N S E 6
6 P M_ D P R S L P V R 6 PSI#
V S S _ S E NS E 6
PR1 7 4 P R 17 8 PR1 7 6 P R 17 2 P R 1 87 PR1 8 3 P R 16 9
P R4 1 *R _ 0 4
6 6 6 6 6 6 6
H_ V ID0 H_ V ID1 H_ V ID2 H_ V ID3 H_ V ID4 H_ V ID5 H_ V ID6
PR1 6 7
P R5 2 2 P J1 6 *6 mi l 1 0_ 0 4
5V S 5V S
*1 K _ 04 * 1K _ 0 4 *1 K _0 4 1 K _ 04 1K_ 0 4 *1 K _ 04 1 K _ 04
P R1 6 6 3 . 3V S P R5 0 P R5 1 5 . 1K _ 1 %_ 0 4 7 . 32 K _ 1% _ 04 TT S N S TR D E T # P R5 5 1 00 K _ N T C _ 06 _ A 0 . 0 1u _ 50 V _ X7 R _ 0 4 *R _0 4 36 V C OR E _O N S G D P C 58 2 P J 17 1 P Q 13 M TN 70 0 2Z H S 3 40 m li PR1 7 3 P R 17 7 PR1 7 5 P R 17 1 P R 1 86 PR1 8 2 P R 16 8 P R 18 1 1 0 0K _ 0 4 G S D P Q1 2 MT N 7 00 2 Z H S 3 P R 1 79 *1 0K _ 0 4 S G ND2 P R 1 80 10 K _ 04 V R _O N
0 _0 4
RT 2
2, 1 0 , 11 , 1 2, 1 3 , 19 , 2 0, 2 1 , 22 , 2 3, 2 4 , 25 , 2 6, 2 8 , 29 , 3 0, 3 2 , 33 , 3 5, 3 6 , 37 , 4 2, 4 6 1 2, 1 9 , 22 , 2 5, 2 6 , 30 , 3 3, 3 5 , 37 , 4 2, 4 6 2 , 4, 6 , 7 , 19 , 2 0, 2 1 , 24 , 2 5, 2 6 , 39 , 4 1, 4 2 6 1 2, 3 7 , 38 , 4 0, 4 1 , 42 , 4 4, 4 5
P C 16 0
P C5 7 1 00 0 p_ 5 0V _ X 7R _0 4
PC6 0 15 0 p_ 5 0V _ 0 6
P C5 6 1 2p _ 50 V _ N P O_ 0 4
EN P W RG D I MO N CL K E N# F BRT N FB C O MP T RD E T # V ARF R
B S T1 D RVH1 SW 1 SW FB1 PVC C D R V L1 P GN D D R V L2 SW FB2 SW 2 D RVH2 B S T2
BST1
0 _0 4
V IN
2 2 0p _ 50 V _ 06 C S RE F
+ P C2 5 P C3 6 +
+ P C 30
+ P C3 1
*3 3 0U _2 . 5 V _D 2_ D +
3 30 U _ 2 . 5V _ D 2 _ D
5V S P C 4 4 P Q4 1 *M D U2 6 57 P Q 42 M D U 2 6 57 P C 1 59
3. 3 V S 5V S 1. 1 V S _ V TT V C OR E V IN
P C5 4 *. 1 U _ 1 6V _ 0 4
B - 44 V-Core
3 3 0U _2 . 5 V _D 2_ D
33 0 U _ 2. 5 V _ D 2 _D
Schematic Diagrams
Power VGA NVVDD

NVIDIA N11P-GE1
0. V 95 GPI _N D_ D0 O5 VVD VI GPI _N D_ D1 O6 VVD VI 0.9 0V 0 5V .8 0. V 80
0 0
1 0
0 1
1 1
PR131 PR132 PR139 PR142 PR143 PR144 B4100 15K_1% N11M-OP1 B5100 10K_1% N11P-GE1
75K_1% 20K_1% 6.8K_1% 2K_1% 20K_1% 100K_1% 10K_1% 10K_1%
NVIDIA N11M-OP1
1. V 03 GPI _N D_ D0 O5 VVD VI GPI _N D_ D1 O6 VVD VI 0.9 5V 0 5V .8 0. V 80
4.99K_1% 30K_1%
0 0
1 0
0 1
1 1
3. 3 V
5V 1 7 NV V DD _ V ID 0 1 7 NV V DD _ V ID 1 3 V 3 _ R UN P R1 3 8 PR 1 3 0 1 0 K_ 0 4 E N _ V GA _C O R E 10 0 K _ 0 4 P R1 4 1 10 0 K _ 0 4 P R1 3 5 5 .1 K _ 1 %_ 0 4 C A P D1 7 RB 0 5 4 0 S 2 P Q2 9 MD U 2 6 5 7 D G PR 1 2 6 S 1 0 K_ 0 4 P S _N V V D D _P GO OD # 4 0 P S _N V V D D _P GO OD # P Q2 8 M T N7 0 0 2 Z H S 3 S D P R1 2 9 1 0 K_ 0 4 G P C1 2 0 S C4 7 1 A _ F B * 1 0 0p _ 5 0 V _ N P O _ 0 4 P R1 3 1 1 0K _1 % _ 0 4 5V P R1 3 2 2 0 K _ 1 % _ 04 1 u _ 1 6V _X 5 R _0 6 3 V 3 _ R UN PU 6 SC 4 7 1 A 1 LX 2 P GD 10 V OU T 9 F B RT N G ND D 0 D 1 DL PAD PC 1 2 6 C SO D1 4 0 SH A 17 S S A V CC 4 G G * SK3 4 SA BST 3 P Q2 MD U 2 6 5 4 D PQ 3 0 M D U 2 6 54 P D2 6 PD 1 P C1 2 4 0. 1 u _ 5 0 V _ Y 5 V _ 0 6 S PC 2 PQ 1 *M D U 2 6 57 G D NV V DD _ V ID 0 NV V DD _ V ID 1 P R 1 37 P R 1 40 * 1 0K _0 4 * 1 0K _0 4
V IN
P C3 *4 .7 u _ 25 V _ X 5 R _0 8
P C4 4 . 7u _ 2 5 V _ X 5R _ 0 8
P C1 1 8 + 15 u _ 2 5 V _ 6 .3* 4 .4 _ C
Sheet 44 of 53 Power VGA NVVDD
V D D3
P C1 2 1 * 2 2 00 p _ 5 0V _ X7 R _ 06
4 . 7 u_ 2 5 V _ X 5 R _ 0 8
13
15
16
14
ON
12 E N 11
IL IM
D H
PL 5 B C I H 13 5 0 -1 R 0 M 1 2
G 0
G1
25A
P C 12 3 P C1 2 7 + +
V GA _V C O R E 1
PJ 1 3 2 *1 2 m m
NV V DD
PC 117
PR 1 5 .1 _0 6
VCORE_VGA
5 60 u _ 2 . 5 V _ 6 . 6* 6 . 6 *5 . 9
5 6 0 u _ 2. 5V _6 . 6 * 6. 6* 5 . 9
0 . 1 u _ 10 V _ X 7 R _ 04
PC 1 2 20 p _ 5 0 V _ 06
Frequency adj.
P R1 2 7 * 9 0 . 9K _ 1% _ 0 4
P C1 1 6 P J2 6 4 70 p _ 5 0V _ X7 R _ 04 2 * 6 m li S GN D P R1 2 8 100_04 1
P R1 3 6 0_04
P C1 2 2 2 0p _ 5 0 V _ N P O_ 0 4
P R1 3 9 2 K _ 1% _ 0 4
P R 1 42 4 .9 9 K _ 1% _ 0 4 P R 1 44 P C 1 25 10 K _ 1 % _ 0 4
P R1 3 3 P R1 3 4
0_04 0_04
P S 1 _ V D D_ S E N S E 1 3 P S 1 _ GN D _ S E N S E 1 3
P R2
100_04
P C1 1 9 0 . 0 1 u _ 5 0V _X 7 R _0 4
P R1 4 3 3 0K _1 % _ 0 4
1 0 00 p _ 5 0 V _ X 7R _ 0 4 S GN D S GN D
S GN D
18 1 2 ,3 7 , 3 8, 4 0 ,4 1 , 4 2 , 4 3, 45 2 6 , 2 9 ,3 0 , 3 1, 3 5 ,3 7 , 3 9 , 4 0, 41 3 , 4 ,1 2, 13 , 1 7 ,1 9 , 2 0 ,21 ,2 3 , 2 4 , 2 6 ,28 ,2 9 , 3 1 ,3 2 , 3 3, 3 4 ,3 7 , 3 9 , 4 0, 41 1 9,2 8 , 3 0 ,3 3 , 3 6, 37 ,3 8 ,4 5 1 3, 1 7
NV V DD V IN 5V 3 .3 V V D D3 3 V 3 _ RU N
Power VGA NVVDD B - 45
Schematic Diagrams
AC_IN, Charger
T ota l Po wer 6 0W Cha rg e Cur re nt 3. 0A
VA VIN 1 2 3 P Q3 2 A A O4 93 2 2 1 P C 1 2 4 . 7u _ 2 5V _ X 5 R _ 0 8 P C 16 4 . 7 u_ 2 5 V _X 5R _0 8 P C 1 1 4. 7 u _ 25 V _ X 5 R _ 0 8 PL 6 4 . 7U H _ 6 . 8* 7 . 3* 3. 5 7 P C 1 3 0 4 . 7u _ 2 5V _ X 5 R _ 0 8 P C 1 3 2 4 . 7u _ 2 5V _ X 5 R _ 0 8 P C 1 3 6 4 . 7u _ 2 5V _ X 5 R _ 0 8 P C 13 1 4 . 7 u_ 2 5V _X 5 R _0 8 4 P R1 6 2 0 _ 04 P Q3 4 P 2 00 3 E V G 5 6 7 8
C har ge C urr en t : 3 .0 A C har ge V olt ag e 12. 6V T ota l Po wer : 8 0W

P C 1 4 4 . 7 u _2 5 V _ X 5 R _ 08 BAT BA T
J_ D C -J A C K 1 50 9 3 2-0 0 3 01 -0 0 1 1 2 G ND 1 G ND 2 P C 1 13 P C1 1 4
PL 4 H C B 4 5 3 2K F -80 0 T 60
V A 8 7 6 5
P Q 31 P 2 0 03 E V G 3 2 1 P C 1 37 P R 15 2 0 . 0 2_ 1 % _3 2
3A
PR 1 0 2 0 m _3 2
P R 12 4 1 30 K _ 1 % _0 4 P R1 2 3 P C 11 5
P R1 5 5 2 00 K _ 1 %_ 0 4
5 6
C 11 3 0 1 0 0 0p _ 50 V _ X 7 R _ 0 4
PC 5 0 . 1 u_ 5 0 V _Y 5V _ 0 6
C 1 13 1 0. 1 u _1 6 V _ Y 5 V _0 4
0 . 3 3U _ X7 R _ 1 6 V _0 6 0 . 1 u _5 0 V _ Y 5 V _ 06 1 0K _ 0 8 0. 1 u _ 50 V _ Y 5 V _ 0 6 0. 1u _ 50 V _ Y 5 V _ 0 6 P R 12 5 1 0K _1 % _ 04
P C 12 9 0 . 1 u_ 5 0 V _Y 5V _ 0 6
3 P R1 4 5 P R 1 54 *1 0m i l _s h o rt *1 0m i l _s h o rt P Q 3 2B A O 4 93 2
P C1 5 0 P R 1 56 1 0 0 K _ 04 BAT E P Q4 P D T A 1 14 E U C PR 3 3 0 K _1 % _ 04 B A T _ V OL T 3 6 P C1 4 7 0 . 1 U _ 5 0V _0 6 PR 4 D B PC 1 0 0 . 1 u _1 6 V _ Y 5 V _ 04 P C1 4 9 0. 1 U _ 5 0 V _ 06 P R 16 1 0 _ 04 P R 1 64 0_04 C P D 18
0. 1 u _ 25 V _ X 7R _0 6 A R B 0 5 40 S 2 VA P R 1 65 VA P C 1 46 24 23 22 21 20 19 18 17 33 CT L P C1 4 5 P R 1 58 P C 1 42 V OL T -S E L 0 . 1 u_ 5 0 V _Y 5 V _0 6 0 . 1 u_ 5 0 V _Y 5 V _0 6 3 9 . 2K _1 % _0 4 0 . 1 u_ 1 6 V _Y 5 V _0 4 * 0_ 0 4 P C1 5 4 C E L LS 1 u _2 5 V _ 08
PC 9 0 . 1 u_ 5 0 V _Y 5V _ 0 6
S GN D 5 P R 1 63
* 0_ 0 4
P C1 5 2
0 . 1 u _5 0 V _ Y 5 V _ 06
Sheet 45 of 53 AC_IN, Charger
P U7 1 2 3 4 5 6 7 8
G S Y S 3V S
PQ 3 MT N 70 0 2Z H S 3 V D D3
P R1 5 7 PR 7 1 0K _0 4 15 . 4 K _ 1% _ 0 4 A C _ IN# D P Q5 M T N 7 0 02 Z H S 3 S 2 1, 3 6 P C 14 3 P R 1 59 2 0K _ 1 % _0 4 P R1 6 0 1 0K _ 1 % _0 4
-I N E 1 OU T C 1 OU T C 2 + IN C2 -I N C 2 AD J 2 C O MP 2 C OM P 3
9 10 11 12 13 14 15 16
MB 3 9 A 13 2
P R 1 49 S GN D 5 1 K _ 1 %_ 0 4 C H G -C U R R E N T
P R 1 47 2 1 K _ 1% _ 0 4
0 . 01 u _ 50 V _ X 7R _0 4 S G ND 5 S G ND 5 P C 1 35 P R 14 6
V S H G_ S E L 3 6
VA
PR 6
1 M _0 4 P R5
P R 1 48 1 0 0 p_ 5 0V _N P O_ 0 4 1 0 K _ 1% _ 0 4
P R 22 4 P R 22 6 10 2 K _ 1% _ 0 4 2 M_ 1 % _0 4 D
SYS3 V 20 0 K _ 1% _ 0 4 P C1 4 1 PR 9 1 0 0K _ 0 4
P C 13 8 P R 15 3
47 P _ 5 0V _ 0 4 2 2K _1 % _ 04
1 0 K _1 % _ 04
0 . 1 u _5 0 V _ Y 5 V _0 6
VC C -I N C 1 + IN C1 A C IN A C OK -I N E 3 AD J 1 C OM P 1
C T L2 CB OU T -1 LX VB O U T -2 P GN D C E L LS
6 . 0 4K _ 1 % _0 4
32 31 30 29 28 27 26 25
FOR EMI
VIN C TL 1 GN D VR EF T RERM PAD AL RT C S A DJ 3 BATT S GN D
P C1 3 S GN D 5
FO R B 41 00
V OL T -S E L S G ND 5 P C 13 4 2 2 00 p _ 50 V _ X 7R _0 4 P R 22 5 S P Q5 8 G M TN 70 0 2 Z H S 3 1 2 3 4 5 *B T D -0 5 T I 1G P R2 2 8 0_04 JB A TT A 1
1 00 0 p _5 0 V _ X7 R _ 0 4
76 . 8 K _ 1% _ 0 4 C TL D S GN D 5
P R2 2 7 *0 _ 04
P Q7 S YS3 V P R8 1 00 K _ 0 4 D G S M TN 7 00 2 Z H S 3
G 36 C H G _E N S
P Q6 1 M TN 70 0 2 Z H S 3 PJ 1 * 1m m 2 36 3 0 , 36 3 0 , 36 B A T_ D E T S MD _B A T S MC _B A T PL 1 PL 2 PL 3 H C B 10 0 5K F -12 1 T 20 H C B 10 0 5K F -12 1 T 20 H C B 10 0 5K F -12 1 T 20
Battery Voltage: 9V~12.6V
JB A TT A 2 1 2 3 4 5 B TD -0 5T I 1 G
C E L LS
C H G -C U R R E N T
PC 8
PC 7
P C6
F OR B5 10 0
3 0 p _5 0 V _ N P O_ 0 4 3 0p _ 5 0V _ N P O_ 0 4 30 p _ 50 V _ N P O _0 4 P R2 3 2 7. 1 5 K _ 1% _ 0 4 PR 1 2 *1 5 mi l _s h o rt
PQ 5 9 D T A 1 1 4E U A B D P R 2 31 10 0 K _ 04 P Q6 0 G S S G ND5 2N 7 00 2 W
PWR
C990712
CE C L M D
G S
PQ 6 1 V IN 2N 7 00 2 W P C 18 3 P C 1 28 P C 38 PC 2 4
V IN SYS5 V V DD 3 VA
1 2 , 3 7, 3 8 , 4 0, 4 1 , 4 2, 4 3 , 4 4 3 7 , 3 8, 3 9 1 9 , 2 8, 3 0 , 3 3, 3 6 , 3 7, 3 8 , 4 4 37
P C 20 3 P Q6 2 0 . 0 1u _ 50 V _ X 7 R _ 0 4 2 N 7 0 02 W
P R2 3 3 1 . 5M _0 4 0. 1u _ 50 V _ Y 5 V _ 0 6 0 . 1 u_ 5 0V _Y 5V _0 6 0 . 1 u _5 0 V _ Y 5 V _ 06 0 . 1 u _5 0 V _ Y 5 V _ 06
3 6 CE L L _ CO NT RO L
G S
P R2 3 4 1M _ 04
B - 46 AC_IN, Charger
D S GN D 5
Schematic Diagrams
HDMI
HDMI CONNECTOR
5 VS R5 2 2 1 _0 4 R5 2 3 1_04 J _ H D MI1 C 1 29 2 2 u _ 6. 3 V _ X 5 R _ 0 8 C 1 32 2 2 u _6 .3 V _ X 5R _ 0 8 18 +5V R9 6 R9 7 T MD S _ C L OC K # -R T MD S _ C L OC K -R L1 1 L9 T MD S _ D A T A 1 # -R T MD S _ D A T A 1 -R 2 3 R9 2 R9 3 4 1 0_04 0_04 3 2 * W C M 2 01 2 F 2 S -1 6 1T 0 3 * W C M 2 01 2 F 2 S -1 6 1T 0 3 1 4 H D MIG N D R8 2 * 49 9 _ 1 %_ 0 4 2 S H IE L D2 T M D S D A T A 2+ 5V S Q8 *MT N 70 0 2 Z HS 3 G C 1 2 81 7 -1 1 9A 5-L S H D MI G N D 0_04 0_04 R8 6 R8 3 * 49 9 _ 1 %_ 0 4 8 * 49 9 _ 1 %_ 0 4 6 T MD S D A TA 14 T MD S D A TA 1+ T MD S D A TA 2 1 R 80 *4 9 9_ 1 % _ 04 R 90 R 91 0 _ 04 0 _ 04 2 S HIEL D1 3 R8 7 * 49 9 _ 1 %_ 0 4 H D M I _ S D A -C 16 SD A 14 R ESER VED 12 T MD S C LO C K 10 T MD S C LO C K + T MD S D A TA 0 S H IE L D0 T M D S D A T A 0+ 5 R 81 *4 9 9_ 1 % _ 04 L8 3 *W C M2 0 1 2 F 2S -16 1 T 03 4 T M D S _ D A TA 2# -R 1 T M D S _ D A TA 2-R 7 R 84 *4 9 9_ 1 % _ 04 2 L10 1 T M D S _ D A TA 0-R *W C M2 0 1 2 F 2S -16 1 T 03 C L K S H IE L D 9 C EC 11 R 85 *4 9 9_ 1 % _ 04 3 4 T M D S _ D A TA 0# -R H D MI _ S D A -C S CL AC 13 H D MI _ C E C R 94 R 95 0 _ 04 0 _ 04 H D M I _ S C L -C D DC /C E C GN D H O T P LU G D E T E C T 19 17 15 H D MI _S C L -C H D MI _H P D -C C C C A A R5 3 2 1 .5 K_ 0 4 R 53 3 1 .5 K _ 04 D 26 D2 5 D2 7 *B A V 99 R E C T IF I E R * B A V 9 9 R E C T IF I E R * B A V 9 9 R E C TIF IE R AC AC A 5 V S _ H D MI 5 V S _ H D MI
For ESD
H D MI _ H P D -C
Sheet 46 of 53 HDMI
P IN G ND 1 ~ 4 = G ND
FOR INTEL GRAPHIC

U1 2 2 2 H D M I B _D 2 B N 2 2 H D M I B _D 2 B P 2 2 H D M I B _D 1 B N 2 2 H D M I B _D 1 B P 2 2 H D M I B _D 0 B N 2 2 H D M I B _D 0 B P 2 2 H D M I B _C L K B N 2 2 H D M I B _C L K B P C2 4 8 C2 5 2 C2 4 2 C2 4 7 C2 3 6 C2 3 9 C2 3 0 C2 3 3 0 .1 u_ 1 0 V _ X7 R _0 4 0 .1 u_ 1 0 V _ X7 R _0 4 0 .1 u_ 1 0 V _ X7 R _0 4 0 .1 u_ 1 0 V _ X7 R _0 4 0 .1 u_ 1 0 V _ X7 R _0 4 0 .1 u_ 1 0 V _ X7 R _0 4 0 .1 u_ 1 0 V _ X7 R _0 4 0 .1 u_ 1 0 V _ X7 R _0 4 H D M IB _D 2 B N _ C 3 9 H D M IB _D 2 B P _ C 3 8 H D M IB _D 1 B N _ C 4 2 H D M IB _D 1 B P _ C 4 1 H D M IB _D 0 B N _ C 4 5 H D M IB _D 0 B P _ C 4 4 HDM IB_ CL K B N _ C 4 8 H D M I B _ C L K B P _C 4 7 H D MI _ C T R L C L K H D MI _ C T R L D A T A 9 8 7 H PD 25 O E# DC C_ E N# P C0 P C1 R 1 65 3 .3 V S R1 8 3 R1 8 4 49 9 _ 1% _ 0 4 *4 . 7 K _ 0 4 *4 . 7 K _ 0 4 32 10 3 4 6 D CC_ E N # R T_ E N # PC 0 PC 1 R E XT V CC V CC V CC V CC V CC V CC V CC V CC [1] [2] [3] [4] [5] [6] [7] [8] HP D _ S IN K 2 11 15 21 26 33 40 46 1 5 12 18 24 27 31 36 37 43 3 .3 VS C2 3 7 0.1 u _ 1 6V _ Y 5 V _0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 C2 5 4 C 2 55 20 K _ 1 % _ 04 0 .1 u _ 16 V _ Y 5 V _ 0 4 R1 8 1 22 23 19 20 16 17 13 14 28 29 30 TM D S _D A T A 2 #-R TM D S _D A T A 2 -R TM D S _D A T A 1 #-R TM D S _D A T A 1 -R TM D S _D A T A 0 #-R TM D S _D A T A 0 -R TM D S _C L OC K #-R TM D S _C L OC K -R H D MI_ S C L-C H D MI_ S D A -C H D MI_ H P D -C IN _D 1 + IN _D 1 IN _D 2 + IN _D 2 IN _D 3 + IN _D 3 IN _D 4 + IN _D 4 SC L SD A OU T _ D 1 + OU T_ D 1OU T _ D 2 + OU T_ D 2OU T _ D 3 + OU T_ D 3OU T _ D 4 + OU T_ D 4S C L _ S IN K S D A _ S IN K
22 H D M I _ C T R L C LK 2 2 H D MI _C T R L D A T A 22 P OR TC _ H P D 3. 3V S R 1 64 R 1 76 R 1 89 0_ 0 4 *4 . 7 K _0 4 *0 _ 04
34 35
O E _1 Q E _2
3. 3V S
R1 8 2 R1 6 7 R1 6 6
4 .7 K _ 04 4 .7 K _ 04 * 4. 7 K _ 0 4
D C C _E N # PC 0 P S 81 0 1 PC 1
G N D [1] G N D [2] G N D [3] G N D [4] G N D [5] G N D [6] G N D [7] G N D [8] G N D [9] G N D [1 0]
C2 4 6 0.1 u _ 1 6V _ Y 5 V _0 4
C2 2 8 3 . 3V S 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 5 VS 2 ,10 ,1 1 , 1 2,1 3 , 1 9 ,20 , 2 1 ,2 2,2 3 ,2 4 , 25 , 2 6 , 2 8, 29 ,3 0 ,3 2,3 3 ,3 5, 36 , 3 7 , 4 2, 4 3 1 2, 1 9 ,2 2 , 25 ,2 6 , 3 0, 3 3 , 3 5 ,37 ,4 2 ,4 3
P IN 4 9 = G ND
HDMI B - 47
Schematic Diagrams
Audio Board
USB PORT
A _ USB V C C A _ 5V A _U S B V C C AL 6 H C B 1 6 08 K F -1 2 1 T2 5 AU 1 4 3 V IN V IN V O UT V O UT G ND R T9 7 0 1-C P L A G ND A G ND A R6 *1 0 mi l _s h o rt A G ND AUS B _ P N4 _ R AUS B _ P P 4 _ R 1 5 2 A C1 5 . 1U _ 10 V _ X 7R _0 4 A _ U SB V CC 2
60 mil
A C1 1 + 10 0 U _ 6 . 3V _ B 2 AC 3 . 1 U _ 1 0 V _X 7 R_ 0 4 1 2 DAT A _ L 3 DAT A _ H G ND1 G ND 1 A GN D GND C 1 0 7 70 -1 04 A 3 G ND2 G ND 2 4 A J _U S B 1 V+
50 mil
A C1 3 1 0 U _ 1 0 V _0 8
50 mil
A C1 6 . 1 U _ 10 V _ X 7R _ 04 A C1 7 1 0U _ 10 V _ 0 8
A U S B _P N 8 A U S B _P P 8
A L 7 *W C M2 0 12 F 2 S -1 6 1T 0 3 4 3 1 2
A R7
*1 0 mi l _s h o rt A G ND
Sheet 47 of 53 Audio Board

A_ 5 V A J _ AUD 1 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 8 7 21 3 -1 60 0 G
A M I C 1 -R A M I C 1 -L A H E A D P H ON E -R A H E A D P H ON E -L A M IC_ SE NS E ASPK_ H P# A H P _S E N S E A S P K O U T R-_ R A S P K O U T R+ _ R A US B_ P N8 A US B_ P P 8 A S P DI F O
AUDIO JACK
A J _S P K L 1 A S P K OU TR -_ R A S P K OU TR + _R 1 2 85 2 0 5-0 2 7 01 2 20 _ 04 AC1 8 1 80 P _ 5 0V _ 0 4 AC 1 4 1 8 0 P _5 0 V _ 04 A GN D A MI C _S E N S E A MI C 1-R A G ND A MI C 1-L A L3 A L4 F C M1 0 0 5K F -12 1 T0 3 F C M1 0 0 5K F -12 1 T0 3 5 4 3 A J_ MI C 1 R 1 00 0 P _ 50 V _ 0 4 A C8 . 0 1U _ 50 V _ X 7R _0 4 A S PDIF O 5 4 3 AL 5 F C M 1 00 5 K F -1 02 T 0 2 A J_ S P D I F 1 R AR3 AC 9 2 6 L 1 2 S J -T3 5 1 -S 23
SPDIF OUT
BLACK
A _ AUDG
A G ND AC2 6 80 P _ 5 0V _ 0 4 AC 7 6 8 0P _ 5 0 V _0 4
2 6 L 1 2 S J -T3 5 1 -S 23
MIC IN
BLACK
A HP_ S E N SE A S PK _ HP# A H E A D P H O N E -R A R 4 A H3 A H2 C 5 6 D5 6 C 5 6D 5 6 2 3 4 5 A H1 1 9 8 7 6 2 3 4 5 AH 4 1 9 8 7 6 A H E A D P H O N E -L A R 5 10 0 _0 6 10 0 _0 6 AL 1 AL 2 F CM 10 0 5 K F -12 1 T 03 F CM 10 0 5 K F -12 1 T 03 A R1 2009 /11/ Alex 28_ *1 K _ 04 MT H 7 _ 0D 2 _8 M TH 7_ 0 D 2 _ 8 A C1 0 A GN D A H5 2 3 4 5 9 8 7 6 A GN D mt h 6 _ 0d 2 _ 2 A GN D A G ND A G ND A G ND A GND A C1 A C1 2 A C4 . 1U _1 0 V _ X7 R _0 4 . 1U _1 0 V _ X7 R _0 4 . 1U _1 0 V _ X7 R _0 4 A _A U D G . 1U _1 0 V _ X7 R _0 4 *1 K _ 0 4 6 80 P _ 5 0V _ 0 4 6 8 0P _ 5 0 V _0 4 AR 2 AC6 AC 5 A _A U D G 5 4 3 A J_ HP 1 R
2 6 L 1 2 S J -T3 5 1 -S 23
HEAD PHONE
BLACK
A _ A UD G
B - 48 Audio Board
Schematic Diagrams
B7110 Second HDD Board

OJ _OD D 1 S1 S2 S3 S4 S5 S6 S7 OGN D EODD _EDTEC T# O_5VS O_5VS OSATA _TXP 0 OSATA _TXN 0 OSATA _R XN 0 OSATA _R XP 0 OJ _SA TA1 HSA TA_TXP0 HSA TA_TXN 0 HSA TA_R XN 0 HSA TA_R XP0 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 88028-3010M OGN D 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 OSATA_TXP0 OSATA_TXN0 OSATA_RXN0 OSATA_RXP0 EODD _EDTEC T#
P1 P2 P3 P4 P5 P6
O_3.3VS
AT13035B AA089 OGN D
6-21- C1D50 -215
OGN D
OJ _HD D 1 S1 S2 S3 S4 S5 S6 S7 O_3. 3V S P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 C16664-12204-L P I N GN D1~2 =GN D OGN D
H SATA _TXP0 H SATA _TXN 0 H SATA _R XN 0 H SATA _R XP 0
Sheet 48 of 53 B7110 Second HDD Board
OC3 *. 01u_16V_04
OC 5 *10u_10V_08 O_5VS
OGN D
OGND
OC6 . 1u_10V_X7R_04
OC8 . 1u_10V_X7R_04
OC7 .1u_10V _X7R _04
OC9 1u_6. 3V_X5R_04
OC4 10u_10V_Y 5V_08
OC 1 100U_6. 3V_B 2
OC 2 *22u_6.3V_12
OGND
6-2 1-C27 00-12 2

OH 7 C111D 111
OH 1 OH 2 OH 3 OH 4 OH 5 OH 6 H 6_3D2_8 H 6_3D 2_8 H 6_3D 2_8 H6_3D 2_8 H6_5D 3_7 H6_5D 3_7
OGND
OGND
OGN D
OGN D
OGN D
OGN D
OM1 M-MARK
OM2 M-MARK
B7110 Second HDD Board B - 49
Schematic Diagrams
B7110 Click Board

T3.3V T+5VS 2010 /2/22_Gar y TJ_TP2 10 9 8 7 6 5 4 3 2 1 85201-10051 FCR7 *32mil_short TGTP_CLK TGTP_DATA 3 /8 ? ? pi n define TC16 TUSB_PN10 TUSB_PP10 0.1u_16V_Y5V_04 TJ_TP1 6 5 4 3 2 1 TGTP_CLK TGTP_DATA CTPBUTTON_L CTPBUTTON_R TGND TGND T+5VS CC1 .1u_10V_X7R_04 2 1 CSW1~2 4 3 201 0/2/22_Ga ry
R IGH T K EY
CSW2 TJG-533-S-T/R 2010 /2/22_Gar y 2 4 CTPBUTTON_R 1 3
L EF T KE Y
CSW1 TJG-533-S-T/R 2 010/2/22_ Gary CTPBUTTON_L
1 3
2 4
5 6
Sheet 49 of 53 B7110 Click Board
*32mil_short TG ND TR10 TESD_G TGND ND
TG ND
TGND
6 -20 -94 A2 0-1 10 It is strongly recommendedthat the TESD_G has ND a dedicatedconnectiontothe system chassis or cable shield.
85201-06051 TGND
TH1 TH2 TH3 TH4 TH5 TH6 H7_0D2_3 H7_0D2_3 H7_0D2_3 H7_0D2_3 H4_0D2_2 H4_0D2_2
TGND
TGND
TG ND
TGND
TGND
TGND
B - 50 B7110 Click Board
5 6
Schematic Diagrams
B7110 Power Switch Board

BVD D3 BC6 *0.1u_16V_04 BD GND BVD D3 BC3 *0.1u_16V_04 BVD D 3 BC 5 BVDD 3 BC 4 BVD D 3 BH _3.3VS BPWR BTN # BDGND BDGN D BD GN D BWEB#0 BWEB#1 BLI D_SW# BVD D3 BD 4 C C *BAV99 AC BPWR BTN # BVDD 3 BD1 C *BAV99 AC BW EB#0 BVD D3 BD 2 *BAV99 AC BWEB#1 C BVD D3 BD3 *BAV99 BDGND AC BW EB#2 BWEB#2 BJ _SW 1 1 2 3 4 5 6 7 8 9 10 11 12 87151-1207G *0. 01u_16V_04 *0. 01u_16V_04
BSW 4 BDGND BD GN D BD GND 2010/2/22_Gary BDGND 2010/2/22_Gary BDGND 4 3 HC H _STS-02

P ,6=BDGND IN5
1 2
POWER BOTTOM
BPW RBTN#
Sheet 50 of 53 B7110 Power Switch Board
Mute
BSW 2 4 3 H CH _STS-02 BD GN D
PIN5,6=BDGND
WLAN
BSW 3 BSW 1 1 2 H CH _STS-02 BD GN D
PIN5,6=BDGND
C CD
4 3 H CH _STS-02 BDGN D
PIN5,6=BDGND
1 2
BWEB#1
4 3
BWEB#0
1 2
BW EB#2
BH _3.3VS
POWER BUTTON LED
BR1 680_06 A C Z3901 BD 5 KP-2012SGC
LID SWITCH IC
BVDD 3 BR2 1 BC7 .1U_16V_04 BDGND BU1 G ND VC C OUT 10K_04 2 BLID _SW # BH 1 BH 2 BH 3 H 5_0D 2_3 H 5_0D 2_3 H 5_0D 2_3 BD GN D
BD GN D BD GN D BD GN D BD GN D
MH-248
B7110 Power Switch Board B - 51
Schematic Diagrams
B7130 LED & VGA SW Board

BL_3. 3 VS B L_3.3VS B LJ _LED 1 B L_ 3. 3V S BL_LE D _I GPU # BL_LE D _D GPU # BL_VGA_SW # BL_BT_E N BL_SATA_LED # BL_D GP U /I GPU # BL_W LA N _LED # 10 9 8 7 6 5 4 3 2 1 88 486 -10R
BLR 2 220_04
HDD LED
HD D/C D-R OM LE D
BL R 1 220 _04
BLR7 220_04
BLD 1
BLD2
R Y _S P195 4
BT & WLAN LED

Da vi d 7 /14
D avi d 7 /13
David 7/15 David 7/13
B L_SW 1 TJ G-5 33-S-T/R BLGN D 2 4
Da vi d 7 /1 3
KP-2012SGC C
1 3 BL_W LAN _ LE D #
BL_VGA_SW #
BL_BT_EN
Sheet 51 of 53 B7130 LED & VGA SW Board
BL_SATA_LED #
BLQ1 D TC114EU A
B LGN D B LGN D BL_3. 3V S
5 6
B L_3.3VS
B L_3. 3V S BLR 5 220_04 BLR 6 470_04 1 BLD4
G B LQ3 A O34 09
BLR 3 220_04 A A
BLR 4 220_04
Da vi d 7 /1 3
B LD 3 K P-2012SGC C
KP-2012SGC C
IGP U LED
DG PU LED
RED
een B LD 5 Gr R Y _SP195 4
BL_ LED _I GPU #
BL_ LED _D GPU # BL_D GP U /I GPU # B B LQ2 D TC 114EU A
BL H 1 B LH2 BL H 3 BLH 4 H 4_5D 2_3 H 4_5D 2_3 H 6_0D 2_3 H6_0D2 _3
BLGND
BL GN D
B LGN D
BL GND
BLGN D
B - 52 B7130 LED & VGA SW Board
Schematic Diagrams
B7110 K/B Switch Board

KJ_KB3 85201-240 51 K _KB-SI0 4 K _KB-SI1 5 K _KB-SI2 6 K _KB-SI3 8 K _KB-SI4 11 K _KB-SI5 12 K _KB-SI6 14 K _KB-SI7 15 K _KB-SO0 1 K _KB-SO1 2 K _KB-SO2 3 K _KB-SO3 7 K _KB-SO4 9 10 K _KB-SO5 13 K _KB-SO6 16 K _KB-SO7 17 K _KB-SO8 18 K _KB-SO9 K_K B-SO10 19 K_K B-SO11 20 K_K B-SO12 21 K_K B-SO13 22 K_K B-SO14 23 K_K B-SO15 24 KJ _KB4 8520 1-24051 K_KB -SI0 4 K_KB -SI1 5 K_KB -SI2 6 K_KB -SI3 8 K_KB -SI4 11 K_KB -SI5 12 K_KB -SI6 14 K_KB -SI7 15 K_KB -SO0 1 K_KB -SO1 2 K_KB -SO2 3 K_KB -SO3 7 K_KB -SO4 9 10 K_KB -SO5 13 K_KB -SO6 16 K_KB -SO7 17 K_KB -SO8 18 K_KB -SO9 K_KB-SO 10 19 K_KB-SO 11 20 K_KB-SO 12 21 K_KB-SO 13 22 K_KB-SO 14 23 K_KB-SO 15 24
Sheet 52 of 53 B7110 K/B Switch Board
KH1 H4_ 0D2_0
KH 2 H 4_0D2_0
KH3 H6_0D2_3
KH4 H6_0D2 _3
KH5 H6_0D 2_3
KH6 H6_0 D2_3
B7110 K/B Switch Board B - 53
Schematic Diagrams
Sequence
B 4 1 0 0
VC CRT C RT CRS T# 3 6m S S PE C
D 0 1
P O W E R
S E Q U E N C E
MI N
9 mS
DD _ON # 1. 67 5m S 5V 3V 1. 27 6m S 2 40 mS S PE C M AX S PE C M IN 7 34 mS 2 00 mS 1 0m S 20 0m S 45 0mS 9 8. 5m S S PE C MI N
SU S_P WR _D N_ AC K
RS MRS T# AC PRE SE NT PW RBT N# SL P_S 4# 1. 5V (V DD Q) 30 mS
5m S SP EC
MA X
Sheet 53 of 53 Sequence
10 0mS
2 .1 7mS 1. 85m S 50 uS SP EC
DD R1. 5V _P WR GD SL P_S 3# 5V S 3. 3VS 1. 1VS 1. 8VS 1. 1VS _V TT H_ VTT PW RG D( AL L_ SY S_P WR GD ) VC ORE _O N VC ORE
M IN
3 0uS
1. 73 mS 79 0u S
1. 8m S 1. 88 2m S 5 .7m S 350 uS SPE C 0. 00 01 mS
50 0m S 99 mS SP EC MA X 3m S
5 12 mS S PE C MI N ? mS
CL KEN # CL KIN _B CL K
95 3u S PE C 1. 05 6m S S MI N 1m S
SY S_P WR GD /S B_ PW RO K/P M_ MP WR OK VD DPW RG OO D_ R BC LK_ CP U_ N/ P H_ CPU PW RG D SU S_S TA TE # PL T_R ST # H_ CP UP WR GD -> SP EC M IN 1m S P LT _R ST # VC OR E -> H_ CP UPW RG D SP EC 0 .0 5m S ~ 6 50 mS SY S_ PW RG D SP EC 10 0m S >H _C PU PW RG D < 14 6. 87 mS
5 .6 4mS S PE C M IN
1 mS 1 mS
13 4. 5m S SP EC M IN
14 5.8 76 mS
1 .1m S 50 uS SP EC
0 .0 3mS
2 mS
1 50 uS S PE C MI N
60u S
B - 54 Sequence
BIOS Update
Appendix C:Updating the FLASH ROM BIOS

To update the FLASH ROM BIOS you must:
Download the BIOS update from the web site. Unzip the files onto a bootable CD/DVD/USB Flash Drive. Reboot your computer from an external CD/DVD/USB Flash Drive. Use the flash tools to update the flash BIOS using the commands indicated below. Restart the computer booting from the HDD and press F2 at startup enter the BIOS. Load setup defaults from the BIOS and save the default settings and exit the BIOS to restart the computer. After rebooting the computer you may restart the computer again and make any required changes to the default BIOS settings.
BIOS Version Make sure you download the latest correct version of the BIOS appropriate for the computer model you are working on. You should only download BIOS versions that are V1.01.XX or higher as appropriate for your computer model. Note that BIOS versions are not backward compatible and therefore you may not downgrade your BIOS to an older version after upgrading to a later version (e.g if you upgrade a BIOS to ver 1.01.05, you MAY NOT then go back and flash the BIOS to ver 1.01.04).
C:BIOS Update
Download the BIOS

1. Go to www.clevo.com.tw and point to E-Services and click E-Channel. 2. Use your user ID and password to access the appropriate download area (BIOS), and download the latest BIOS files (the BIOS file will be contained in a batch file that may be run directly once unzipped) for your computer model (see sidebar for important information on BIOS versions).
Unzip the downloaded files to a bootable CD/DVD/ or USB Flash drive

1. Insert a bootable CD/DVD/USB flash drive into the CD/DVD drive/USB port of the computer containing the downloaded files. 2. Use a tool such as Winzip or Winrar to unzip all the BIOS files and refresh tools to your bootable CD/DVD/USB flash drive (you may need to create a bootable CD/DVD with the files using a 3rd party software).
Set the computer to boot from the external drive

1. With the bootable CD/DVD/USB flash drive containing the BIOS files in your CD/DVD drive/USB port, restart the computer and press F2 (in most cases) to enter the BIOS. 2. Use the arrow keys to highlight the Boot menu. 3. Use the + and - keys to move boot devices up and down the priority order. 4. Make sure that the CD/DVD drive/USB flash drive is set first in the boot priority of the BIOS. 5. Press F10 to save any changes you have made and exit the BIOS to restart the computer. C - 1
BIOS Update
Use the flash tools to update the BIOS

1. Make sure you are not loading any memory management programs such as HIMEM by holding the F8 key as you see the message Starting MS-DOS. You will then be prompted to give Y or N responses to the programs being loaded by DOS. Choose N for any memory management programs. 2. You should now be at the DOS prompt e.g: DISK C:\> (C is the designated drive letter for the CD/DVD drive/USB flash drive). 3. Type the following command at the DOS prompt: C:\> Flash.bat 4. The utility will then proceed to flash the BIOS. 5. You should then be prompted to press any key to restart the system or turn the power off, and then on again but make sure you remove the CD/DVD/USB flash drive from the CD/DVD drive/USB port before the computer restarts.
C:BIOS Update
Restart the computer (booting from the HDD)

1. With the CD/DVD/USB flash drive removed from the CD/DVD drive/USB port the computer should restart from the HDD. 2. Press F2 as the computer restarts to enter the BIOS. 3. Use the arrow keys to highlight the Exit menu. 4. Select Load Setup Defaults (or press F9) and select Yes to confirm the selection. 5. Press F10 to save any changes you have made and exit the BIOS to restart the computer.
Your computer is now running normally with the updated BIOS

You may now enter the BIOS and make any changes you require to the default settings.
C-2

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Preface

Notebook Computer B7130 Service Manual

About this Manual

IMPORTANT SAFETY INSTRUCTIONS

CAUTION This Computers Optical Device is a Laser Class 1 Product

Instructions for Care and Operation

Schematic Diagrams................................. B-1

Part Lists ..................................................A-1

Updating the FLASH ROM BIOS......... C-1

Storage Core Logic

Intel HM55 Chipset

Dimensions & Weight

Mini Card Slots

External Locator - Top View with LCD Panel Open

1 - 4 External Locator - Top View with LCD Panel Open

External Locator - Front & Right Side Views

External Locator - Front & Right Side Views 1 - 5

External Locator - Left Side & Rear View

LEFT SIDE VIEW

1 - 6 External Locator - Left Side & Rear View

External Locator - Bottom View

External Locator - Bottom View 1 - 7

Mainboard Overview - Top (Key Parts)

1 - 8 Mainboard Overview - Top (Key Parts)

Mainboard Overview - Bottom (Key Parts)

Mainboard Overview - Bottom (Key Parts) 1 - 9

Mainboard Overview - Top (Connectors)

1 - 10 Mainboard Overview - Top (Connectors)

Mainboard Overview - Bottom (Connectors)

Mainboard Overview - Bottom (Connectors) 1 - 11

Pressure sockets for multi-wire connectors

Pressure sockets for ribbon connectors

Board-to-board or multi-pin sockets

To remove the Battery:

To remove the Bluetooth Module:

To remove the HDD:

To remove the Keyboard:

To remove the System Memory:

To remove the Optical Device:

To remove and install a Processor:

To remove the Wireless LAN Module:

Removing the Battery

Removing the Battery 2 - 5

Removing the Hard Disk Drive

Hard Disk Upgrade Process

2 - 6 Removing the Hard Disk Drive

Removing the Hard Disk Drive 2 - 7

Removing the System Memory (RAM)

Memory Upgrade Process

1. Component Bay Cover

2 - 8 Removing the System Memory (RAM)

Single Memory Module Installation

Removing the System Memory (RAM) 2 - 9

Removing the Optical (CD/DVD) Device

2 - 10 Removing the Optical (CD/DVD) Device

Removing and Installing the Processor

B. Heat Sink 6 Screws

Removing and Installing the Processor 2 - 11

2 - 12 Removing and Installing the Processor

Processor Installation Procedure

A. CPU D. Heat Sink 6 Screws

Removing and Installing the Processor 2 - 13

Removing the Wireless LAN Module