Professional Documents
Culture Documents
PREPARED BY
B.T.P.MADHAV
P.POORNA PRIYA
KL University
Guntur
2010-2011
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DEPARTMENT
LICA LAB MANUAL K L UNIVERSITY
OF ECE
ACKNOWLEDGEMENTS
B.T.P.Madhav
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LICA LAB MANUAL K L UNIVERSITY
OF ECE
PREFACE
Authors
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OP-AMP 741
IC-741 is a 8-pin IC. The pin diagram is shown in Fig. 1. Every IC should be supplied with
positive and negative dc voltages of +12 and –12 volts respectively. +12V should be supplied
to pin-7 and –12V to pin-4. Pin-2 is the inverting input pin and Pin-3 is the non-inverting
input pin. Output can be measured at the output pin-6 with respect to the breadboard ground.
Pins 1 and 5 are used for output offset voltage compensation. These two pins are not required
for normal applications.
as to the base of the other transistor. In addition, the transistor emitters are connected
together, in this case to the V+ power source. In some diagrams, the transistor with
the collector and base shorted together is rendered as a diode, which shows bias for
the other transistor, but doesn't show the full value of this configuration. This
arrangement is known as a current mirror. The two transistors are manufactured side
by side on the same silicon die, at the same time. Thus, they have essentially identical
characteristics. The controlling transistor (on the left in each pair) will necessarily set
its emitter-base voltage to exactly that value that will sustain the collector current it is
carrying, even down to fractions of a mill-volt. In so doing, it also sets the emitter-
base voltage of the second transistor to the same value. Since the transistors are
essentially identical, the second transistor will carry exactly the same current as the
first, even to an independent circuit.
2. The use of a current mirror on the input circuit allows the inputs to accommodate
large common-mode voltage swings without exceeding the active range of any
transistor in the circuit. The second current mirror in red provides a constant-current
active load for the output circuitry, again without regard for the actual output voltage.
A third current mirror, shown in blue, is a bit different. That 5K resistor in series with
the emitter of the mirrored transistor limits its collector current to virtually nothing.
Thus, it serves as a high-impedance connection to the negative power supply,
providing a reference without loading the input circuit. This particular circuit is
therefore able to provide the slight base bias current needed for the PNP transistors in
the differential input circuit, while allowing those transistors to operate correctly over
a wide common-mode input voltage range.
3. The final odd circuit within the op amp is shown in green. Here, the two resistors bias
the transistor in what would seem to be an unusual way, since there is no apparent
signal input to the base of the transistor. To understand its purpose, assume zero base
current for a moment, and a VBE of 0.625 volt. Ohm's Law then requires a current of
0.625 ÷ 7.5K = 0.0833mA through the 7.5K resistor. The same current must also flow
through the 4.5K resistor, which will therefore exhibit a voltage drop of
0.0833mA × 4.5K = 0.375V. The total voltage across the two resistors, then, and
therefore across the transistor, is 0.625V + 0.375V = 1.0V. This, then, is a simple
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AIM:
EQUIPMENT REQUIRED:
1. Bread board.
2. Resistor-1, 10, 100, 200, 330KΩ--1no.
3. Capacitor-0.01, 0.1μf—1no.
4. Function generator
5. CRO with Probes.
6. Connecting wires
Theory:
DC Parameters:-
In the above characteristics (a) represents, ideal transfer characteristics (b) and (c) represents
non ideal characteristics. Vos=±off set voltage. If Vos=1mv, Av=5000, output=-5v
2. Input offset Voltage: It is defined as the voltage that has to be applied between the
op-amp input terminals to obtain zero voltage at the output.
AC Parameters:-
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CMRR=A d /Ac
The differential voltage gain is same as t h e l ar ge signal voltage gain A. Common-
mode voltage gain can be determined from t h e c i r c u i t given below using the
equation Acm = Vocm / V cm
Vocm = Output common-mode voltage
V cm = Input common-mode voltage
Acm = Common-mode voltage gain
Circuit Diagram:
DC Parameters:
1) Input Bias current
a) Non-inverting
Since the bias current is in µAmps, to measure reasonably large voltage uses 10Mohms
instead of 1Mohm.
V0=-I2R
b) Inverting:
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VOS is the difference in the voltage between the inputs that is necessary to make Vout (error) =
0. Vout (error) is caused by a slight mismatch of VBE1 and VBE2. Typical values of VOS are
2mV.
V0 = Vi R3/ (R3+R4)
Inverting Amplifier
Non-Inverting Amplifier
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AC Parameters:
1 Bandwidth:
2. Slew rate:
Unity gain, no o/p load, higher closed loop gain, higher supply voltage; slew rate is high SR
decreases with increases with increasing of temperature.
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5) Note down the values of the input frequency at which the output get distorted.
3 CMRR
Common Mode:
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Differential Mode:
RESULT:
DC Parameters:
AC Parameters:
Bandwidth=________________________ KHz
CMRR=___________________________ dB
Review Questions:
2. APPLICATIONS OF OP-AMP
Aim:
Apparatus:
1) Op-Amp (uA- 741)-3 No.s
2) DC Power Supply ( 1 2 - 0 - 12) V
3) CRO(0-20MHz range)
4) Signal Generator (0 -1MHz range)
5) Bread Board
Theory:
Give input voltages from the DC power supply to the inverting terminal as
shown in the figure.
Verify the output voltage with the voltage obtained practically by using the
formula
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Give input values from the DC power supply to both inverting terminal and
non-inverting terminals as shown in the figure.
Verify the output voltage with the voltage obtained practically by using the
formula
3. Adder-Subtractor
Give input values from the DC power supply to both inverting terminal and
non-inverting terminals as shown in the figure.
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Averaging amplifier
Give input values from the DC power supply to both inverting terminal and
non-inverting terminals as shown in the figure.
The above circuit can be used as an averaging circuit in which the output of the circuit is
equal to the average of all the input voltages. This is accomplished by using all resistors of
equal value, Ra= Rb= Rc=R
In addition, the gain by which each input is amplified must be equal to 1 over the number of
inputs; that is, RF/R=1/n. where n is the number of inputs.
Thus for a circuit with 3 inputs, consequently from equation3 Vo= (Va+Vb+Vc)/3
Photocell, photodiode and photovoltaic cell give an output current that is proportional to an
incident radiant energy or light. The current through these devices can be converted to
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voltage by using a current-to-voltage converter and thereby the amount of light or radiant
energy incident on the photo-device can be measured.
Above figure shows an op-amp used as I to V Converter Since the (-) input terminal is at
virtual ground, no current flows through Rs and current ii flows through the feedback resistor
Rf. Thus the output voltage v0 = - ii Rf. It may be pointed out that the lowest current that this
circuit can measure will depend upon the bias current IB of the op-amp. This means that 741
(IB = 3 nA) can be used to detect lower currents. The resistor R f is sometimes shunted with a
capacitor Cf to reduce high frequency noise and the possibility of oscillations.
Result:
Review questions:
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Apparatus:
Integrator: It is defined as the maximum rate of change of the output voltage per unit of
time and is expressed in volts/micro sec.
Integrators produce output voltages that are proportional to the running time integral of the input
voltages. In a running time integral, the upper limit of integration is t.
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Integrator procedure:
Give a square wave input 1 Vpp, 1 KHz from the AC power supply to the
inverting terminal as shown in the figure.
Differentiator procedure:
Simple differentiator without R1 and Cf will not function well since the gain Rf/Xc1 increases
with increase in frequency at a rate of 20dB/decade. This makes the circuit unstable.
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Input impedance Xc1 decreases with increase of frequency which makes the circuit very
susceptible to high frequency noise. When amplified this noise can completely over ride the
differentiated output signal. The frequency fa is the frequency at which the gain is 0dB.
fa=1/(2πRfC1) ;
fb=1/(2πR1C1)=1/(2πRfCf);
The input signal will be differentiated properly if the time period T of the signal
T≥ RfC1
Give a square wave input 1 Vpp, 1 KHz from the AC power supply to the inverting
terminal as shown in the figure.
Verify the output voltage with the voltage obtained practically by using the
formula
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The process of integration involves the accumulation of signal over time and hence
sudden changes in the signal are suppressed. Therefore an effective smoothing of
signal is achieved and hence, integration can be viewed as low-pass filtering.
Result:
Review Questions:
1) Why op amp integrator has high value resistor connected across input?
2) Why op amp integrators are not used?
3) Integrator produces an output that approximates the area under the curve of an input
function(T/F)
4) differentiator is used to measure________________
5) Mention the drawback of differentiator
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Aim:
Apparatus:
1) Op-Amp (uA - 7 4 1 ) - 3 No.s
2) DC Power Supply ( 1 2 - 0 - 1 2 ) V
3) CRO((0-20MHz range)
4) Resistors
5) Bread board
The bridge in the circuit of fig is dc excited but could be ac excited as well. For the
balanced bridge at some reference condition,
Vb=Va
RB(Vdc) = RA(Vdc)
RB+ RC RA+RT
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RC = RT
RB RA
Generally resistors RA,RB, RC are selected so that they are equal in value to the
transducer resistance RT at some reference condition. The reference condition is
specific value of the physical quantity under measurement at which the bridge is
balanced. This value is normally established by the designer and depends on the
transducers characteristics, the type of physical quantity to be measured, and the
desired application.
Let the change in resistance of the transducer be ΔR.Since R B and RCare fixed
resistors, the voltage Vb is constant.However,voltage Va varies as a function of the
change in transducer resistance.Therefore, according to the voltage divider rule,
Va=RA(VDC)/RA+RT+ΔR
Vb= RB(VDC)/RB+RC
Consequently, the voltage Vab across the output terminals of the bridge is
Vab=Va-Vb
=(RA(VDC)/RA+RT+ΔR) - RB(VDC)/RB+RC
However if RA=RB=RC=RT=R
Vab=ΔR(Vdc)/2(2R+ΔR)
The negative sign indicates the Va<Vb because of the increase in the value of ΔR.
The output voltage Vout of the bridge is then applied to the differential
instrumentation amplifier composed of three op-amps. The voltage followers
preceding the basic differential amplifier help to eliminate the loading of the bridge
circuit. The gain of the basic differential amplifier is (-RF/R1): therefore the output
V0 of the circuit is
V0=Vab(-RF/R1)
= [(ΔR)Vdc/2(2R+ΔR)] (RF/R1)
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Result:
Practical Value:
Gain =_______________________
Theoretical Value:
Gain = ______________________
Review questions:
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LICA LAB MANUAL K L UNIVERSITY
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We know that the integrator output waveform will be triangular if the input to it is square-
wave. It means that a triangular-wave generator can be formed by simply cascading an
integrator and a square-wave generator, as illustrated in figure. This circuit needs a dual op-
amp, two capacitors, and at least five resistors. The rectangular-wave output of the square-
wave generator drives the integrator which produces a triangular output waveform.
The input of integrator A2 is a square wave and its output is a triangular waveform, the output
of integrator will be triangular wave only when R4 C2 > T/ 2 where T is the (period of square
wave. As a general rule, R4C2 should be equal to T. It may also be necessary to shunt the
capacitor C2 with resistance R5 = 10 R4 and connect an offset volt compensating network at
the non-inverting (+) input terminal of op-amp A2 so as to obtain a stable triangular wave.
Procedure:
1) Connections are made as per the circuit diagram
2) Give the biasing voltage as power to the IC
3) Observe the square wave output at 1st op-amp sixth pin and triangular wave output at
2nd op-amp sixth pin.
4) Adjust the potentiometer to observe the undistorted square wave output.
5) Calculate the frequency and amplitude of the square and triangular wave observed
from the CRO.
6) Compare the practical waves obtained with the theoretical values
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Result:
Practical values
Frequency=
Amplitude of square wave=
Amplitude of triangular wave =
Theoretical values:
Frequency=
Amplitude of square wave=
Amplitude of triangular wave =
Review Questions:
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Aim: To design and test the low pass filter and high pass filter using op-amp
Apparatus:
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Experimental procedure:
1) Vary the input frequency at regular intervals and note down the output response from
the CRO.
2) Calculate the gain in dB.
3) Verify practical and theoretical cutoff frequency
4) Plot the frequency response on semi-log sheet
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Experimental procedure:
1) Vary the input frequency at regular intervals and note down the output response from
the CRO.
2) Calculate the gain in dB.
3) Verify practical and theoretical cutoff frequency
4) Plot the frequency response on semi-log sheet
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The voltage gain magnitude of the second order high pass filter is
Result:
Practical values
Cut-off Frequency of low pass filter =
Cut-off Frequency of high pass filter =
Theoretical values:
Cut-off Frequency of low pass filter =
Cut-off Frequency of high pass filter =
Review Questions:
AIM
APPARATUS
IC 741— Two with bases, Diodes—Two(2) ,Voltmeter (EVM or DVM), Capacitors and
resistors, 10 W potentiometer, Dual power supply (15-0-15) 1.5 V battery.
INTRODUCTION
Radiation transducers like photomultipliers and particle detectors produce signals in the
frequency domain. These signals have to be converted into analogous current or voltage signals in
order to display or record them using analogue devices like recorders, etc.
A simple circuit to convert frequency to voltage is shown in Fig. 9.4.1. The input signal is
given to one of the inputs of an op amp comparator. The other input of the comparator is
referenced at a convenient value <-r. If, for example, the instrument is to ignore signals whose
amplitude is less than 100 mV, a d.c. voltage of 100 mV is applied to the non-inverting
Q - CXAV (1)
Where AV is the peak-to-peak value of the comparator output. The average charging current
through D2 at a frequency/is given by
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-l a v =f C t dV (2)
The minus sign indicates that the current must be supplied to the current pump.
The charging current is converted into voltage by the op amp current follower. The output
voltage is given by
v0 =~ R7fCxA V (3)
supply, AV — 20 V.
The capacitor Cx should be charged to the full comparator output after each transition. Since a
capacitor is fully charged after five time constants.
5C\Ri < the lowest time period of the input wave, i.e.,
5C,/?, < lcr 3 s
EXPERIMENTAL PROCEDURE
Frequency Meter
1. Wire the circuit as shown in Figure with the values of components as per the design.
Monitor the output voltage using DVM or EVM.
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10
100
200
300
.
.
1000
5. Plot VQ as a function of frequency. Evaluate the slope (dv{)jdf). Compare with the design
value.
6. Measure the output voltage at 1.5 kHz, 2.0 kHz and 4 kHz. Does the output voltage increase
linearly with frequency? Discuss.
Result:
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Apparatus:
If Vcc = 6v
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4. Two different threshold voltages exists as Single reference voltage Vref or –Vref.
VUT & VLT
5. Hysteresis exists. No Hysteresis exists.
Result:
Review Questions:
Apparatus:
Theory:
Analog signal is a smooth, but continuous time varying signal. It is not possible to
study such a change in signals. In order to study the signal, we require discrete samples of the
signal at different instances of time. i.e. we require a digitized signal or digital signal. Digital
signal is therefore a discrete signal. Discrete signal obtained for the purpose of analysis must
be converted back again into the original analog signal after the analysis of the signal. Thus
we require ADC and DAC. The input to a DAC is a digital signal. A digital signal is a
sequence of 1’s and 0’s. Each bit is positional weighed in a digital port or signal. A digital
port in electronics can be of N – bit length.
Circuit Diagram:
Procedure:
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5) Compare theoretical and practical values and calculate the percentage of error.
Result:
B2 B1 B0 V0(T) V0(P)
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Result:
Review Questions:
2) The output voltage is the ---------- sum of all the input voltages in this circuit.
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LOGARITHMIC AMPLIFIER
Apparatus: op-amp, diode, resistor, function generator, bread board, power supply
A logarithmic amplifier has an Output voltage that is proportional to the logarithm of the
input, or: Vout=0.06 log Vin+k, where k=0.495 for above circuit.
For a logarithmic amplifier to function properly, its nonlinear element, such as a diode or
transistor, must have logarithmic function. For a diode, the voltage drop across it (VD) as a
function of the current that flows through it is essentially given by the relation: VD= K log
(I).
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Result:
Review Questions:
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Apparatus: IC 555, power supply, CRO, Resistors, capacitors, connecting wires, bread
board.
1 Ground DC Ground
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The reset pin is used to drive the output LOW, regardless of the
4 Reset state of the circuit. When not used, the reset pin should be tied to
+V.
The threshold pin causes the output to be driven LOW when its
6 Threshold
voltage rises above 2/3 of +V.
The discharge pin shorts to ground when the output pin goes
7 Discharge HIGH. This is normally used to discharge the timing capacitor
during oscillation.
a) Astable Multivibrator
This circuit diagram shows how a 555 timer IC is configured to function as an astable
multivibrator. An Astable multivibrator is a timing circuit whose 'low' and 'high' states
are both unstable. As such, the output of an astable multivibrator toggles between 'low'
and 'high' continuously, in effect generating a train of pulses. This circuit is therefore
also known as a 'pulse generator' circuit.
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In this circuit, capacitor C1 charges through R1 and R2, eventually building up enough
voltage to trigger an internal comparator to toggle the output flip-flop. Once toggled, the
flip-flop discharges C1 through R2 into pin 7, which is the discharge pin. When C1's
voltage becomes low enough, another internal comparator is triggered to toggle the
output flip-flop. This once again allows C1 to charge up through R1 and R2 and the
cycle starts all over again.
C1's charge-up time t1 is given by: t1 = 0.693(R1+R2) C1. C1's discharge time t2 is
given by: t2 = 0.693(R2) C1. Thus, the total period of one cycle is t1+t2 = 0.693 C1
(R1+2R2). The frequency f of the output wave is the reciprocal of this period, and is
therefore given by: f = 1.44/ (C1 (R1+2R2)), wherein f is in Hz if R1 and R2 are in
megaohms and C1 is in microfarads.
b) Monostable Multivibrator
This circuit diagram shows how a 555 timer IC is configured to function as a basic
monostable multivibrator. A monostable multivibrator is a timing circuit that changes
state once triggered, but returns to its original state after a certain time delay. It got its
name from the fact that only one of its output states is stable. It is also known as a 'one-
shot'.
In this circuit, a negative pulse applied at pin 2 triggers an internal flip-flop that turns off
pin 7's discharge transistor, allowing C1 to charge up through R1. At the same time, the
flip-flop brings the output (pin 3) level to 'high'. When capacitor C1 as charged up to
about 2/3 Vcc, the flip-flop is triggered once again, this time making the pin 3 output
'low' and turning on pin 7's discharge transistor, which discharges C1 to ground. This
circuit, in effect, produces a pulse at pin 3 whose width t is just the product of R1 and
C1, i.e., t=R1C1.
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The reset pin, which may be used to reset the timing cycle by pulling it momentarily
low, should be tied to the Vcc if it will not be used.
Result:
Review questions:
Principle of PLL:
PLL has emerged as one of the fundamental building block in electronic technology. It is
used for the frequency multiplication. Fm stereo detector, FM demodulator, frequency shift
keying decoders, local oscillator in TV and FM tuner.
The block diagram of PLL is as shown in figure. It consists of phase detector, a LPF and a
voltage controlled oscillator(VCO).The phase detector or comparator compares the input
frequency, fin, with feedback frequency, fout(output frequency).The output of the phase
detector is proportional to the phase difference between fin and fout. The output voltage of the
phase detector a DC voltage and therefore, is often refers to as error voltage. The output of
the phase detector is then applied to the LPF, which removes the high frequency noise and
produces a DC level. The DC level in turn is the input to the VCO.
The output frequency of the VCO is directly proportional to the input DC level. The VCO
frequency is compared with the input frequencies and adjust until it is equal to the input
frequency. In short, PLL keeps its output frequency constant at the input frequency.
2. Capture range/mode
Before input is applied, the PLL is in the free running state. Once the input frequency is
applied, the VCO frequency starts to change and the PLL is said to be the capture
range/mode.
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IC version of PLL:
Today, the PLL is even available as a single package, and examples are560, 561,562,564,565
and 567.These are all monolithic ICs. These differ mainly in operating frequency range,
power supply requirements, etc.
The frequency divider is inserted between the VCO and the phase detector in the feed-back
path. Since the output of the divider is locked to the input frequency, fin, the VCO is actually
running at the multiple of the input frequency and hence names the multiplier. The divider-
by-N network is a modulo-N multiplication (MOD-N) binary counter. A proper divided by N
network can obtain the desired amount of multiplication. Where N is an integer.
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1. Lock range
2. Capture Range
Equipment Required:
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Circuit Diagram:
Procedure:
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Result:
___________________________________________________________________________
___________________________________________________________________________
Review questions:
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Aim:
Apparatus:
1) IC – 741, 1 No.
2) DC Power Supply(12 -0 -12) V
3) Bread Board
Theory:
Figure shows a simple voltage regulator circuit that employs an operational amplifier
(op-amp). As its name implies, this circuit accepts an unregulated voltage input (i.e., a
fluctuating input voltage), and provides a regulated voltage output (a stable output
voltage that remains at or very close to its intended output level). The unregulated input
voltage must be higher than the desired output level by a sufficient margin in order to
achieve 'effective' regulation.
The zener diode Vz acts as a voltage reference for the circuit, and is fed into the non-
inverting input of the operational amplifier. The voltage divider formed by R1 and RF
sets the voltage level of the inverting input of the op amp, which is basically a feedback
from the circuit output to the op amp. The NPN transistor is used to boost the output
current of the circuit.
The voltage at the non-inverting input of the op amp is pegged at the zener voltage, while
the voltage at the inverting input is always a fraction of the output voltage as defined by
RF and R1. When the output exceeds the set level, the inverting input voltage exceeds
that of the non-inverting input, causing the output of the op-amp to go 'low'. This turns
off the NPN transistor, causing the output voltage to dip. When the output goes below
the set level, the reverse happens, i.e., the op-amp's output goes 'high', causing the NPN
transistor to turn on and pull the voltage up.
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Thus, this circuit works by turning off the transistor when the output voltage is too high and
turning it on when the output is too low. This balancing act happens continuously, with the
circuit reacting instantaneously to deviations in the output voltage. Resistor RF is adjusted to
set the desired output voltage of the circuit. The zener diode needs to be replaced by a
voltage reference IC if a more stable and more precise output is required.
Procedure:
Result:
Review Questions:
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Aim: To verify Frequency modulation using IC 566 and to calculate the modulation index for
various modulating voltages.
Apparatus: IC NE566, Resistors, Capacitor, CRO, Bread board and connecting wires, RPS
A VCO is a circuit that provides an oscillating signal whose frequency can be adjusted over a
control by Dc voltage. VCO can generate both square and triangular Wave signal whose
frequency is set by an external capacitor and resistor and then varied by an applied DC
voltage. IC 566 contains a current source to charge and discharge an external capacitor C1 at
a rate set by an external resistor. R1 and a modulating DC output voltage.
The Schmitt trigger circuit present in the IC is used to switch the current source between
charge and discharge capacitor and triangular voltage developed across the capacitor and the
square wave from the Schmitt trigger are provide as the output of the buffer amplifier. The
R2 and R3 combination is a voltage divider, the voltage VC must be in the range ¾ VCC < VC
< VCC. The modulating voltage must be less than 3/4VCC the frequency fc can be calculated
using the formula fo = 2 (VCC-Vc) R1 C1 VCC For a fixed value of VC and a constant C1 the
frequency can be varied at 10:1 similarly for a constant R1 C1 product value the frequency
modulation can be done at 10:1 ratio.
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LICA LAB MANUAL K L UNIVERSITY
OF ECE
Circuit diagram
Procedure;
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DEPARTMENT
LICA LAB MANUAL K L UNIVERSITY
OF ECE
3. For various values of modulating voltage Vm the values of Fmax and Fmin are noted
RESULT:
Thus the FM circuit using IC566 was performed and the modulation index was found.
REVIEW QUESTIONS
1. What will be the changes in the wave under FM when the amplitude or frequency of the
modulating signal is increased?
2. The FM station has less noise while receiving the signal. Justify your answer.
3. What happens when a stronger signal and a weaker signal both overlap at the same
frequency in FM?
5. Which mathematical expression is used to decide the side band amplitudes in a FM signal?