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A

Block Diagram

Compal confidential
Model Name : CY23 LA-1281 Rev:2.0

INTEL FC-PGA370
APICCLK

CRT
Connector

HCLK_CPU

Page 2,3

page 14
HA#(3..31)

TV_OUT
Connector

14MOSC

Twister PN-133T
(VT8606)PCIGNT#/PCIREQ#

page 13

Clock Generator 14MCRT/14.3M_TV

PCLK_NB

PCLK_1394

ICS 9248-195
DCLKWR

PCLK_PCM

page 11

DCLKO

PIRQA#

MD(0..63)

TFT Panel
Interface

HCLK_NB

PCLK_MINI

CLK_SDRAM0

MA(0..13)

page 4,5,6

CLK_SDRAM2,3
2

AD(0..31)

page 14

On Board
64/128MB
(Bank 0)

Memory Damping
Resistor
page 6

SO-DIMM 0
(Bank 2,3)

page 7

page 8

PCLK_SB

Y1
14.318MHZ

HD#(0..63)

PCI BUS

Mini PCI
Socket
PIRQB#/PIRQD#

GNT#0/REQ#0
GNT#1/REQ#1
page 23 AD27/AD28

CardBus
OZ6933
PIRQA#/PIRQB#
GNT#3/REQ#3
AD15
page 15

IEEE 1394
PIRQC#
GNT#2/REQ#2
AD24

USB Port 0,1


FIR

AC97
Interface

VT686B

page 25

14MOSC

page 9,10

IDE CHANNEL 1

page 27

Power On/Off
Reset Circuit

Pull Up/Down
Resistor

S A ( 0..15)
S D ( 0..15)

Slot 0
page 29

page 16

page 18

page 29

Slot 0& 1

DIRECT
CD-PLAY
FUNCTION

48MHZ

IDE Damping
Resistor

ISA BUS

page 12

page 17

page 28

KeyBoard
87570
page 20

PIO

IDE Connector
(FDD/HDD/CR-ROM)

DC/DC Interface
RTC Battery

page 24

page 19

page 22

I/O Buffer
page 21

KBD
page 21

Power Circuit
DC/DC

BIOS

Touch Pad

page 21

page 26

page
30,31,32,33

Compal Electronics , Inc.

Title
PROPRIETARY NOTE

T H I S S H E E T OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Size
T R A D E S E C RET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
D E P A R T M E N T EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
U S E D B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
C

SCHEMATIC,M/BLA-1281
Document Number

Rev
2A

401202
, 04, 2002

Sheet

of

34

+5VS

FERR#

Q5
FDV301N

4
4
4
4
4

HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4

4 ADS#

HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4

AK18
AH16
AH18
AL19
AL17
AN23

ADS#

AN31

REQUEST
PHASE
SIGNALS

DATA
PHASE
SIGNALS

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
RP#
ADS#

1
R90
200

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

C79
.1UF
2

W1
T4
N1
M6
U1
S3
T6
J1
S1
P6
Q3
M4
Q1
L1
N3
U3
H4
R4
P4
H6
L3
G1
F8
G3
K6
E3
E1
F12
A5
A3
J3
C5
F6
C1
C7
B2
C9
A9
D8
D10
C15
D14
D12
A7
A11
C11
A21
A15
A17
C13
C25
A13
D16
A23
C21
C19
C27
A19
C23
C17
A25
A27
E25
F16

1617VCC
U6

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

C80

2200PF

1
2
3
4
5
6
7
8

THERMDA
THERMDC

NC
VCC
DXP
DXN
NC
ADD1
GND
GND
MAX1617

NC
STBY
SMBCLK
NC
SMBDATA
ALERT
ADD0
NC

from 87570

16
15
14
13
12
11
10
9

9,27,32

VR_POK

PWRGD_CPU

D7
RB751V

1
R27
1
R395

BREQ0#
RS#2
DBSY#
DRDY#

2
+2.5V_CLK
180
2
@1.8K

8
7
6
5

18,20,24

SMD

18,20,24

ATF#

R89
1K
1

SMC

1
2
3
4
RP2
@8P4R-56

HA#5
HA#13
HA#10
HA#12

21

FC-PGA2

A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
A32#
A33#
A34#
A35#

R96
1K
2

FERR#1.5

AK8
AH12
AH8
AN9
AL15
AH10
AL9
AH6
AK10
AN5
AL7
AK14
AL5
AN7
AE1
Z6
AG3
AC3
AJ1
AE3
AB6
AB4
AF6
Y3
AA1
AK6
Z4
AA3
AD4
X6
AC1
W3
AF4

HD#[0..63]

R73
10K
21

R67
1.5K
1

R64
1.5K

+3VS

VCMOS

VCMOS

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

HD#[0..63]

U38A

HA#[3..31]

4 HA#[3..31]

+5VS

8
7
6
5

CPU_IO

1
2
3
4

HD#39
HD#36
HD#37
HD#38

1
2
3
4

8
7
6
5

HD#1
HD#5
HD#8
HD#17

8
7
6
5

1
2
3
4

HA#16
HA#15
HA#28
HA#31

8
7
6
5

RP6
@8P4R-56
1
2
3
4

HD#27
HD#42
HD#45
HD#44

1
2
3
4

RP43
@8P4R-56
8
7
6
5

HD#0
HD#4
HD#15
HD#6

8
7
6
5

RP25
@8P4R-56
1
2
3
4

HA#19
HA#25
HA#22
HA#17

8
7
6
5

RP14
@8P4R-56
1
2
3
4

HD#40
HD#41
HD#49
HD#51

1
2
3
4

RP44
@8P4R-56
8
7
6
5

HD#12
HD#10
HD#9
HD#18

8
7
6
5

RP24
@8P4R-56
1
2
3
4

HA#23
HA#24
HA#20
HA#27

8
7
6
5

RP20
@8P4R-56
1
2
3
4

HD#48
HD#63
HD#52
HD#47

1
2
3
4

RP45
@8P4R-56
8
7
6
5

HD#14
HD#2
HD#3
HD#11

8
7
6
5

RP28
@8P4R-56
1
2
3
4

HA#30
HA#29
HA#18
HA#26

8
7
6
5

RP19
@8P4R-56
1
2
3
4

HD#46
HD#55
HD#57
HD#59

1
2
3
4

RP46
@8P4R-56
8
7
6
5

HD#13
HD#20
HD#7
HD#16

8
7
6
5

RP27
@8P4R-56
1
2
3
4

HREQ#2
HREQ#0
HREQ#4
BPRI#

8
7
6
5

RP22
@8P4R-56
1
2
3
4

HD#50
HD#58
HD#53
HD#54

1
2
3
4

RP47
@8P4R-56
8
7
6
5

HD#19
HD#24
HD#30
HD#22

8
7
6
5

RP31
@8P4R-56
1
2
3
4

RS#1
HLOCK#
HREQ#3
DEFER#

8
7
6
5

RP9
@8P4R-56
1
2
3
4

HD#61
HD#56
HD#62
HD#60

1
2
3
4

RP48
@8P4R-56
8
7
6
5

HD#43
HD#34
HD#32
HD#28

1
2
3
4

RP30
@8P4R-56
8
7
6
5

RS#0
HIT#
HTRDY#
HITM#

8
7
6
5

RP10
@8P4R-56
1
2
3
4

HA#4
HA#8
HA#11
HA#9

8
7
6
5

RP49
@8P4R-56
1
2
3
4

HD#31
HD#25
HD#29
HD#35

1
2
3
4

RP42
@8P4R-56
8
7
6
5

HREQ#1
HA#7
BNR#
HA#14

8
7
6
5

RP11
@8P4R-56
1
2
3
4

HA#3
HA#6
HA#21

8
7
6
5

RP7
@8P4R-56
1
2
3
4

HD#23
HD#21
HD#26
HD#33

1
2
3
4

RP41
@8P4R-56
8
7
6
5

www.kythuatvitinh.com
4
4
4
4
4
4
4

IGNNE#

1 R6
1 R5
1 R10
NMI

NMI
C533 reserve for
Intel Celeron
,VIA recommend

RP98
8P4R-1K

1K
1K
@1K
3

INTR

9
9

8
7
6
5

STPCLK#
SLP#
C139
1UF

PWRGD_CPU
PREQ#
PRDY#

INTR

AN29
AN17
AH14
AK20
X2
AL25
AL23
AN19
G33
E37
C35
E35
AN25
AH26
AH22
AK28
AC37

AE33
AC35
AG37
AK26
AJ35
AN37
AN35
AK32
AN33
AL33
J37
A35
AJ33
AJ31

STPCLK#
SLP#

M36
L37
AG35
AH30

THERMDA
THERMDC

AL31
AL29

ERROR
SIGNALS

BR0#
BPRI#
BNR#
LOCK#
BR1#/RSVD*

ARBITRATION
PHASE
SIGNALS

HIT#
HITM#
DEFER#

SNOOP PHASE
SIGNALS

BP2#
BP3#
BPM0#
BPM1#
TRDY#
RS0#
RS1#
RS2#
RSP#

RESPONSE
PHASE
SIGNALS

A20M#
FERR#
IGNNE#
PWRGOOD
SMI#

PC
COMPATIBILITY
SIGNALS

TDO
TDI
TMS
TRST#
TCK
PREQ#
PRDY#
BSEL0
BSEL1

DIAGNOSTIC
& TEST
SIGNALS

INTR/LINT0
NMI/LINT1
STPCLK#
SLP#

EXECUTION
CONTROL
SIGNALS

DEP0#
DEP1#
DEP2#
DEP3#
DEP4#
DEP5#
DEP6#
DEP7#
DBSY#
DRDY#

PICCLK
PICD1
PICD0

THERMDA
THERMDC

INIT#
FLUSH#
RESET#
RESET2#/VSS*
BCLK
EDGCTRL/VTT*

THERMAL DIODE

* For Intel New CPU

S T S E M BUS FREQUENCY

00

66MHZ

01

100MHZ

10

RESERVED

11

133MHZ
A

PRDY#

1
R151
1
R54
1
R61
1
R53
1
R57
1
R47
1
R127

2
150
2
150
2
150
2
150
2
150
2
150
2
330

1
R26
1
R7

2
56.2_1%
2
@56.2_1%

SLP#

CPUINIT#
STPCLK#

FLUSH#
SMI#

PREQ#

ADS#

DBSY#
DRDY#

J33
L35
J35

DBSY#
DRDY#

R117
R131
CPUINIT#
FLUSH#
CPURST#

AG33
AE37
AH4
X4
W37

R94

AG1

1
R396
2

FC-PGA2
SELPSB[1:0]

1
2
3
4

CPURST#

AL27
AN27

RP26

IGNNE#
A20M#
INTR
NMI

8
7
6
5

VCMOS

8P4R-150

C33
C31
A33
A31
E31
C29
E29
A29

150
150

4
4

APICCLK
11
VCMOS
CPUINIT#

9
CPURST#

1K
2
1K

CPU_IO

HCLK_CPU
2
R97
TUAL5

1 1
10
3,11,32

4,9
11

C94
2
10PF

RP8
@8P4R-56

Q56
FDV301N

SMI#
1
2
3
4

+3VS

A20M#
FERR#1.5
IGNNE#
PWRGD_CPU
SMI#

A20M#

BSEL0
BSEL1
2
2
2

HTRDY#
RS#0
RS#1
RS#2

HTRDY#
RS#0
RS#1
RS#2

6
6,11

HIT#
HITM#
DEFER#

HIT#
HITM#
DEFER#

4
4
4
4

BREQ0#
BPRI#
BNR#
LOCK#

BREQ0#
BPRI#
BNR#
HLOCK#

AERR#
AP0#
AP1#
BERR#
BINIT#
IERR#

AK24
AL11
AN13
V4
B36
AE35

Title

T H I S S H E E T OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Size
T R A D E S E C RET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
D E P A R T M E N T EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
U S E D B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
C

RP40
@8P4R-56

Compal Electronics, Inc.

CPU_IO

PROPRIETARY NOTE

RP1
@8P4R-56

SCHEMATIC, M/B LA-1281


Document Number

401202

, 04, 2002

Sheet

Rev
2A
2

of

34

.1UF

C209

.1UF

C210

.1UF

.1UF

.1UF

.1UF

.1UF

.1UF

C47

C11

.1UF

C12
.1UF

C9

C111

.1UF

C119

.1UF

C141

.1UF

C5

C185

C186

CPU_IO

VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT

CPU_IO

+ C6
220UF_E

RSVD/VTT*
RSVD
RSVD
RSVD
RSVD/NCHCTRL*
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD/KEY*
RSVD

FC-PGA370
P O WER AND NC

C10

NCHCTRL

VID1
VID2
VID0
VID3

1
2
3
4

VID4

1
R399

8
7
6
5
4

8P4R-10K

R398
14_1%

2
10K

CPU_IO

AL35
AM36
AL37
AJ37

VID0
VID1
VID2
VID3

+5V

RP13

G37
L33
N33
N35
N37
Q33
Q35
Q37
R2
W35
Y1
AK30
AM2
F10

C211

.1UF

CPU_IO

U38C
AH20
AK16
AL13
AL21
AN11
AN15
G35
AA33
AA35
AN21
E23
S33
S37
U35
U37

VID0
VID1
VID2
VID3

* For Intel New CPU

.1UF

CPU_CORE

FC-PGA370

C444

C433

C428

1UF

1UF

1UF

1UF

VID[0..4]

32 VID[0..4]

C443

1UF

C442

1UF

C441

1UF

C446

1UF

C445

1UF

C434

1UF

C429

C427

1UF

VCMOS

CPU_CORE

+3VS

8
7
6
5

C212

.1UF

CPU_CORE

C213

.1UF

.1UF

150_1%

C501

C214

.1UF

1
R401

C215

.1UF

75_1%

C216

.1UF

R400

VCMOS

C217

4.7UF_0805

VCMOSREF

FC-PGA370

C218

C60

.1UF

CPU_IO

CPU_IO

.1UF

C144 C110
.1UF

150_1%

C166

.1UF

AA37
AA5
AB2
AB34
AD32
AE5
E5
E9
F14
F2
F22
F26
F30
F34
F4
H32
H36
J5
K2
K32
K34
M32
N5
P2
P34
R32
R36
S5
T2
T34
V32
V36
W5
X34
Y35
Z32
AF2
AF34
AH24
AH32
AH36
AJ13
AJ17
AJ21
AJ25
AJ29
AJ5
AK2
AK34
AM12
AM16
AM20
AM24
AM28
AM32
AM4
AM8
B10
B14
B18
B22
B26
B30
B34
B6
C3
D20
D24
D28
D32
D36
D6
E13
E17
AJ9

R118

75_1%

VCCTREF

CPU_IO
2

VCCTREF
VCMOSREF

R150

CPU_IO

R397
1K

VCCTREF

.1UF

DYN_OE

E33
F18
K4
R6
V6
AD6
AK12
AK22

AM22
AM26
AM30
AM34
AM6
AN3
B12
B16
B20
B24
B28
B32
B4
B8
D18
D2
D22
D26
D30
D34
D4
E11
E15
E19
E7
F20
F24
F28
F32
F36
G5
H2
H34
K36
L5
M2
M34
P32
P36
A37
AB32
AC33
AC5
AD2
AD34
AF32
AF36
AG5
AH2
AH34
AJ11
AJ15
AJ19
AJ23
AJ27
AJ3
AJ7
AK36
AK4
AL1
AL3
AM10
AM14
AM18
Q5
R34
T32
T36
U5
V2
V34
X32
X36
Y37
Y5
Z2
Z34

C181

PROPRIETARY NOTE

VSS0
VSS1
VSS2
VSS3
VREF0
VSS4
VREF1
VSS5/DYN_OE*
VREF2
VSS6
VREF3
VSS7
VREF4
VSS8
VREF5
VSS9
VREF6
VSS10
VREF7/VCMOS_REF*
VSS11
VSS12
VCC0
VSS13
VCC1
VSS14
VCC2
VSS15
VCC3
VSS16
VCC4
VSS17
VCC5
VSS18
VCC6
VSS19
VCC7
VSS20
VCC8
VSS21
VCC9
VSS22
VCC10
VSS23
POWER,
VCC11
VSS24
GROUND,
VCC12
VSS25
RESERVED
VCC13
VSS26
SIGNALS
VCC14
VSS27
VCC15
VSS28
VCC16
VSS29
VCC17
VSS30
VCC18
VSS31
VCC19
VSS32
VCC20
VSS33
VCC21
VSS34
VCC22
VSS35
VCC23
VSS36
VCC24
VSS37
VCC25
VSS38
VCC26
VSS39
VCC27
VSS40
VCC28
VSS41
VCC29
VSS42
VCC30
VSS43
VCC31
VSS44
VCC32
VSS45
VCC33/VTT*
VSS46/DETECT*
VCC34
VSS47
VCC35
VSS48
VCC36
VSS49
VCC37
VSS50
VCC38
VSS51
VCC39
VSS52
VCC40
VSS53
VCC41
VSS54
VCC42
VSS55/RESET2#*
VCC43
VSS56
VCC44
VSS57/VID_25mV*
VCC45
VSS58/VTT_PWRGD*
VCC46
VSS59/RSVD*
VCC47
VSS60
VCC48
VSS61
VCC49
VSS62
VCC50
VSS63
VCC51
VSS64
VCC52
VSS65
VCC53
VSS66
VCC54
VSS67
VCC55
VSS68
VCC56
VSS69
VCC57
VSS70
VCC58
VSS71
VCC59
VSS72
VCC60
VSS73
VCC61
VSS74
VCC62
VSS75
VCC63
VSS76
VCC64
VCC65
VCC66
VCC67
PLL1
VCC68
PLL2
VCC69
VCC70
VCC71
VCC72
VEDT/RSVD*
VCC73
VCC74
VCC1.5/VTT*
VCC2.5/RSVD*

AD36
Z36

CPU_IO

T H I S S H E E T OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
T R A D E S E C RET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
D E P A R T M E N T EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
U S E D B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

U38B

RP58
@8P4R_1K

C266
2

R353
56_1%

C117

SB_A20M#

C120

C149

.1UF

.1UF

SB_IGNNE#

SB_A20M#

2
3

SB_IGNNE#

5
6

SB_INTR

11
10

SB_INTR

SB_NMI

14
13

CRESET#

.1UF

C87

C77

.1UF

.1UF

C61

.1UF

C62

C63

.1UF

11,32

SB_NMI

CRESET#

CPU_CORE

R165
@0

2
2
2
2

C156

.1UF

.1UF

+ C457
220UF_E
6.3V

VCCT
VSST

C109
.1UF

E21

+ C178
220UF_E
6.3V

1
L18

+ C449
220UF_E
6.3V

2
4.7Uh_0805

+ C150
220UF_E
6.3V

C169
R166
@0
R162
@0

+ C135
220UF_E
6.3V

SB_IGNNE#

SB_INTR

+ C140

SB_NMI

33UF_6.3X2.5

R168
0
R159
0
R157
0
R158
0

YD

4.7U_1206

4.7U_1206

4.7U_1206

2 IGNNE#
2

4.7U_1206

INTR

2 NMI

C435

C430

A20M#

A20M#

IGNNE#

IGNNE#

INTR

INTR

12

NMI

NMI

8
15

R172

@QS3257

2 A20M#

C426

C437

C431

C420

GND
E#

@.1UF

@1K

RATIO SELECT

3X
3.5X

ON
ON

OFF
OFF

ON
OFF

ON
ON

4X
4.5X
5X

OFF
OFF
OFF

ON
ON
OFF

ON
OFF
ON

ON
ON
ON

5.5X
6X

OFF
ON

OFF
ON

OFF
ON

ON
OFF

6.5X
7X
7.5X

ON
ON
ON

ON
OFF
OFF

OFF
ON
OFF

OFF
OFF
OFF

C439

4.7UF_1206 4.7UF_1206 4.7UF_1206


2

.1UF

4.7U_1206

R175
@0

C37

YC

I1D
I1D

16

CPU_CORE

C83

.1UF

* For Intel New CPU


FC-PGA370

+ C422
220UF_E
6.3V

4.7UF_0805

C70

CPUPRES#

C418

THERMTRIP#
CLKREF/BCLK#*

C438

4.7UF_1206 4.7U_1206

AH28
Y33

CLKREF

C417

CPU_IO
C203

AB36

YB

SW1

VCCCMOS/VTT*

YA

I1C
I1C

RATIO

SB_A20M#

CPU_CORE

RTTCTRL
SLEWCTRL

S35
E27

VCC

IOB
IOB

.1UF
2

2
+ C116
220UF_E
6.3V

C162

.1UF

C173

.1UF

C172

.1UF

C168

.1UF

C170

.1UF

C165

.1UF

C164

.1UF

C167

C160

.1UF

CPU_CORE

IOA
IOA

1
1
1
1

1
2

1
2

.1UF

U18

1
2
3
4

1UF

1UF

1UF

1
2

1
2

C142

1
R91
150_1%
R78
150_1%

C76

+2.5V_CLK

1UF

C151

CPU_CORE
1
1

R149
110_1%
1

C416 C415
1UF

2
2

W33
U33

C414
1UF

11

C425

.1UF

FMMT3904

TUAL5#

1UF

Q58

1UF

2
B

C410

TUALDET

FDV301N

VTTPWRGD

Q57

2
1K

2,11,32

.1UF

1 2

TUAL5

C88

2.7K

VID4

1
R405

C101

.1UF

2.7K

1UF

C411

10K

C412

CPU_CORE

R404

R403

R402

C421
1UF

+5V

www.kythuatvitinh.com
CPU_IO

TUALDET

+ C458
220UF_E
6.3V

+ C459
220UF_E
6.3V

+ C134
220UF_E
6.3V

+ C404
220UF_E
6.3V

+ C400
220UF_E
6.3V

Compal Electronics, Inc.


Title
Size
B

Date:

SCHEMATIC, M/B LA-1281


Document Number

401202

, 04, 2002

Sheet

Rev
2A
3

of

34

HD#[0..63]

2
HA#[3..31]

2 HA#[3..31]

+2.5VS

U14A

ADS#
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
BREQ0#
BPRI#
BNR#
HLOCK#

C132

C130

.01UF .01UF .01UF

.01UF

C200

.1UF

C208

.1UF

C249

.1UF

C248

.1UF

C127

C171

C113
4.7UF_1206

U14E

J24
E24
F23
F24
F25
E25
J25
E26
D26
G23

ADS#

HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4

2
2
2
2
2

BREQ0#
BPRI#
BNR#
HLOCK#

2
2
2
2

HIT#
HITM#
DEFER#

2
2
2

DBSY#
DRDY#

2
2

HTRDY#
RS#0
RS#1
RS#2

2
2
2
2

CPURST#
CRESET#

2,9
3

C223
150UF_E_4V

C159

C250

C128

.1UF

.1UF

.01UF

.01UF

C201

.1UF

C196

.1UF

C131

.1UF

C129

.1UF

C126

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

A25
D24
B25
B26
E23
C26
C24
A23
C25
D22
B24
D25
F22
C23
D21
A20
C22
A21
B23
A22
B21
E20
B22
B19
C20
A24
B20
D20
C21

HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#

HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#

HA#[3..31]

E19
B18
B16
A16
C18
C17
D18
D15
D17
C16
B17
D16
A17
A15
E16
D19
A14
E18
E17
B14
C15
E14
B11
D14
B15
D13
C13
E9
C12
D12
E15
A13
B12
B13
A12
E13
D11
D10
A11
E10
E8
C9
D9
C11
B10
A10
E7
D8
B8
C10
B6
B9
F8
D6
D7
C7
E5
A7
E6
B7
C6
D5
A6
A8

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

HD#[0..63]

HD#[0..63]

J9
J10
J11
J12
J15
J16
J17
J18
K9
K18
L9
L18
M9
M18
R9
R18
T9
T18
U9
U18
V9
V10
V11
V12
V15
V16
V17
V18

AF26
AF18
AF9
AF1
AD19
AD13
AD8
AC23
AC4
AA15
AA14
AA13
AA21
AA6
W24
V26
V14
V13
T21
T16
T15
T14
T13
T12

VCC25
VCC25
VCC25
VCC25
VCC25
VCC25
VCC25
VCC25
VCC25
VCC25
VCC25
VCC25
VCC25
VCC25
VCC25
VCC25
VCC25
VCC25
VCC25
VCC25
VCC25
VCC25
VCC25
VCC25
VCC25
VCC25
VCC25
VCC25

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

A9
A18
A26
B2
C8
C14
C19
D4
D23
F6
F13
F14
F16
F21
H24
J13
J14
J26
L11
L12
L13
L14
L15
L16
M11
M12
M13
M14
M15
M16
M21
N3
N6
N9
N11
N12
N13
N14
N15
N16
N18
N21
P1
P6
P9
P11
P12
P13
P14
P15
P16
P18
P21
R11
R12
R13
R14
R15
R16
T11

www.kythuatvitinh.com
G22

11 H C L K _ N B

DBSY#
DRDY#

HTRDY#
RS#0
RS#1
RS#2

CPURST#
CPURSTD#

GTL_REFA
GTL_REFB

G24
G26
F26
H26
J23

G25
H23
K23
H25

R111
2 @0

A19
E22
E12
E21

VCCT_REF

VT8606

HCLKIN

HIT#
HITM#
DEFER#

VT8606

11

R130
10

C182
10PF

VCCT_REF

C153 C148

C143
4.7UF_0805

1000PF
2

.1UF

1UF

150_1%

R122
1

VCCT_REF
C158

2
1

75_1%

CPU_IO

1 R125

Compal Electronics, Inc.


T H IS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL
E L ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
T H IS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION
O F R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER
T H IS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
T H IRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title
Size
B
Date:

SCHEMATIC, M/B LA-1281


Document Number

401202

, 04, 2002

Sheet
E

Rev
2A
4

of

34

.1UF

.1UF

C96

.1UF

C154
.1UF

C95

4.7UF_1206 .1UF

C92

C98

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C506

.1UF

.1UF

.1UF
2

C505

C504

C503

4.7UF_1206 .1UF
2

C502

CPU_IO
E11
F7
F9
F10
F12
F17
F18
F19
F20
G21
J21
K21

C/BE0#
C/BE1#
C/BE2#
C/BE3#

VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT

FRAME#
IRDY#
TRDY#
DEVSEL#
PAR
STOP#
SERR#

AF14
AE14
AE13
AF13
AC14
AB14
AC13
AB13
AE12
AD12
AB12
AC12
AF11
AE11
AD11
AC11
AA8
AC9
AF8
AE8
AE7
AB8
AF7
AC8
AC7
AB7
AF6
AE6
AD6
AC6
AB6
AF5

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

AD[0..31]

PIRQA#
SUS_STAT#

RP39
6
7
8
9
10

20

5
4
3
2
1

VGASUSP

ZV12
ZV15
ZV13
ZV14

R391

1
R392

F5
F4

2
6
@1K
+3V POWER

ZV8
ZV9
ZV10
ZV11
ZV12
ZV13
ZV14
ZV15

@10K
5

U28B
74LVC125
1
R147
13
13

FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
SERR#

C/BE#0
C/BE#1
C/BE#2
C/BE#3

9,15,23,28
9,15,23,28
9,15,23,28
9,15,23,28

FRAME#
IRDY#
TRDY#
DEVSEL#
PAR
STOP#
SERR#

9,12,15,23,28
9,12,15,23,28
9,12,15,23,28
9,12,15,23,28
9,12,15,23,28
9,12,15,23,28
9,12,15,23,28

100K

14
14
14
14
14
14
14
14

TXOUT0TXOUT0+
TXOUT1TXOUT1+
TXOUT2TXOUT2+
TXCLKOTXCLKO+

14
14
14
14
14
14
14
14

TZOUT0TZOUT0+
TZOUT1TZOUT1+
TZOUT2TZOUT2+
TZCLKOTZCLKO+

SUSPEND
STANDBY
ZVD0
ZVD1
ZVD2
ZVD3
ZVD4
ZVD5
ZVD6
ZVD7
ZVD8
ZVD9
ZVD10
ZVD11
ZVD12
ZVD13
ZVD14
ZVD15
ZVHS
ZVVS
ZVCLK

F2
F3

SMDTV
SMCTV

TVD11/PD0
TVD10/PD1
PD2
PD3
PD4
PD5
PD6
PD7
TVD9/PD8
TVD8/PD9
PD10
PD11
PD12
PD13
PD14
PD15
TVCLKR/PD16
TVBLANK/PD17
PD18
PD19
PD20
PD21
PD22
PD23
TVD6/PD24
TVD4/PD25
TVD5/PD26
TVD7/PD27
TVD0/PD28
TVD1/PD29
TVD3/PD30
TVVS/PD31
TVCLK/PD32
TVD2/PD33
TVHS/PD34
PD35

INTA#
AGP_BUSY#
STP_AGP#

R6
T2
T1
R5
R2
R4
R1
R3
P5
P2
P3
P4
N5
N2
N1
N4
T3
U1
U3

+3VS
SUS_STAT#

SUSPEND

W5
B4
C4

AGP_BUSY#
2 SUSSTAT#
0
2 SUSPEND
STANDBY

1
R119
1
R390
0

10P8R-100K

AF12
AB11
AD9
AD7
AE9
AC10
AD10
AB9
AB10
AE10
AF10

U14D
9,12,15

ZV8
ZV11
ZV10
ZV9

9,15,23,28

C256

VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3

C267

.1UF

AD[0..31]

U14C
G6
H6
J6
L4
R21
T4
U21
V6
V21
W6
Y21
Y6
AA7
AA9
AA10
AA17
AA18
AA20

C232

.1UF
2

C133

4.7UF_1206 .1UF

C118

+3VS

SPD1
SPCLK1

AB3
AA3
Y4
W4
AA5
Y5
AC1
AB1

Y0M
Y0P
Y1M
Y1P
Y2M
Y2P
YCM
YCP

AD2
AC2
AD3
AC3
AB4
AA4
AE1
AD1

PANELDEN
PANELCLK
PANELVS
PANELHS

Z0M
Z0P
Z1M
Z1P
Z2M
Z2P
ZCM
ZCP

ENVDD
ENVEE

G2
H2
H1
J2
J1
H4
K6
J4
J3
L5
K2
J5
K1
K3
L6
L2
K5
L1
L3
M6
K4
M4
M5
M1
T6
T5
U4
U2
V1
V2
V3
W3
V4
U5
V5
C5

TVD11
TVD10

13
13

TVD9
TVD8

13
13

TVCLKR

13

R129
22

TVD6
TVD4
TVD5
TVD7
TVD0
TVD1
TVD3
TVVS
TVCLK
TVD2
TVHS

13
13
13
13
13
13
13
13
13
13
13

H3
G4
G3
G5

F1
H5

ENVDD
ENVEE

14
14,21

BLON#

14

www.kythuatvitinh.com
AE15
AF15
AB15

9,12

GNT#0
GNT#1
GNT#2
GNT#3

23
23
28
15

PCIGNT#

9,12

VT8606

PLLVDD

9
9,20,27

11

47
11

+3VS

R210

14MCRT

GNT#4

1
R211

2
10K

1
1
R109
1K

VCCDAC
VCCRGB

GNDLVDS

F15
F11

GNDDAC
GNDRGB

BISTIN
DFTIN

A2
A3

VCCPLL1
VCCPLL2

XTALI
XTALO

GNDPLL1
GNDPLL2

+2.5VS

REQ#1
REQ#2
REQ#3
REQ#4

MINI PCI
1394
NO USED

SUS_STAT#
STANDBY
AGP_BUSY#
SUSSTAT#

1
2
3
4

RP29

R121
140_1%
1

C1
D1

R
G
B
HSYNC1
VSYNC1

1
2
C161
.1UF

14
14
14
14
14

+DACVDD

+DACVDD

B1
A1
2

B3
A5

PLLVDD

A4
B5

L20
1
2
CHB2012U121_0805
1

C125
1000PF

10UF_1206

C155
.1UF

+DACVDD
C146

10UF_1206

C174
1000PF

C114

.1UF

T=40iml

+3VS

L35
1
2
CHB2012U121_0805

+LAVDD

T=20iml

C227
10UF_1206

T=40iml

C234
.1UF

LVDD
C233
10UF_1206
1

Compal Electronics, Inc.

8
7
6
5

T H IS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL


E L ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
T H IS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION
O F R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER
T H IS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
T H IRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

8P4R_4.7K

C124

L28
1
2
CHB2012U121_0805
C219
.1UF

+3VS

MiniPCI(Compal)

PCMCIA CONTROLLER

E3
E4

D D C _ C L K 14
DDC_DATA 14

PLLVDD

+3VS

GNT#2
GNT#3
GNT#1
REQ#2

REQ#0

C2
D3
D2
E2
E1

+3VS

5
4
3
2
1

T=40iml

C123
.1UF

RP63
6
7
8
9
10

M2
M3

1
2
CHB2012U121_0805

+2.5VS

REQ#3
GNT#0
REQ#0
REQ#1

VT8606

C255

PCI REQ ASSIGMENT

2
10K

PLLGND

L19

1
R212

RSET
COMP

15PF

+2.5VS

REQ#4

LVDSGND
LVDS1GND

AA2

R110
1K

RED
GREEN
BLUE
HSYNC
VSYNC

VCCLVDS

Y3

10P8R-10K

+3VS

Y2

Y1
AA1

PCIRST#
9,13,15,16,19,23,28
C L K R U N # 9,12,15,23,28
PCLK_NB 11

SPCLK2
SPD2

PLLVCCA

Digitally signed by
fdsf
DN: cn=fdsf,
o=fsdfsd, ou=ffsdf,
email=fdfsd@fsdff,
c=US
Date: 2010.02.15
22:23:43 +07'00'

AB2

+LAVDD

SUS_STAT#
SPWROFF#

LVDSVCCA
LVDS1VCCA

R222
4.7K

PCIRST#
CLKRUN#
PCICLK

PCIREQ#

PANELDET

W1
W2

LVDD

SUSTAT#
PWRGOOD

SUS_STAT#
NBPWROK
2
R274
0
CLKRUN#

23
23
28
15

AA16

NC1
NC2
NC3
NC4

AC22
AD14

REQ#0
REQ#1
REQ#2
REQ#3

12,15

U6
V22
W22
AB22

GNT#0
GNT#1
GNT#2
GNT#3
GNT#4

PLOCK#

25VSUS

AB5
AF4
AF3
AE3
AE2
AD15

+3VS

C465
.1UF

D42
1N4148

AA22

R221
4.7K

REQ#0
REQ#1
REQ#2
REQ#3
REQ#4

+3V

GNT0#
GNT1#
GNT2#
GNT3#
GNTX#
PGNT#

AC5
AD5
AE4
AD4
AF2
AC15

REQ0#
REQ1#
REQ2#
REQ3#
REQX#
PREQ#

AE5
AA11

C3
G1
AA12

LOCK#
WSC#

GOP0
FPGPIO
STRW/GPOUT

Title
Size
B
Date:

SCHEMATIC, M/B LA-1281


Document Number

401202

, 04, 2002

Sheet
E

Rev
2A
5

of

34

MD[0..63]

MD[0..63]

7,8

U14B
Y26
Y25
Y24
Y23
Y22
W21

7 RRAS#0
8 RRAS#2
8 RRAS#3

7,8
7,8
7,8
7,8
7,8
7,8
7,8
7,8

V23
W23
AF24
AE23
W26
W25
AD23
AF23

RCAS#0
RCAS#1
RCAS#2
RCAS#3
RCAS#4
RCAS#5
RCAS#6
RCAS#7

U24
U25
U26

7,8 RMWEA#
8 CKE2
7 CKE0
3

7,8

AA24
AA25
AA26

SRASA#

U22
V25
V24

RAS0#/CS0#
RAS1#/CS1#
RAS2#/CS2#
RAS3#/CS3#
RAS4#/CS4#
RAS5#/CS5#

MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63

DQM0/CAS0#
DQM1/CAS1#
DQM2/CAS2#
DQM3/CAS3#
DQM4/CAS4#
DQM5/CAS5#
DQM6/CAS6#
DQM7/CAS7#
SWEA#
SWEB#/CKE2
SWEC#/CKE0
SRASA#
SRASB#/CKE5
SRASC#/CKE4

M23
K25
L26
L25
M26
M24
N26
N24
P23
P25
R23
R25
P22
T23
T25
T22
AD22
AF22
AB21
AE21
AB20
AD20
AE20
AC19
AF19
AC18
AE18
AD17
AF17
AB17
AE16
AC16
K26
L23
M22
L24
M25
N23
N25
N22
P26
P24
R26
R24
R22
T26
T24
U23
AE22
AC21
AD21
AF21
AC20
AF20
AB19
AE19
AB18
AD18
AA19
AE17
AC17
AD16
AF16
AB16

MDD0
MDD1
MDD2
MDD3
MDD4
MDD5
MDD6
MDD7
MDD8
MDD9
MDD10
MDD11
MDD12
MDD13
MDD14
MDD15
MDD16
MDD17
MDD18
MDD19
MDD20
MDD21
MDD22
MDD23
MDD24
MDD25
MDD26
MDD27
MDD28
MDD29
MDD30
MDD31
MDD32
MDD33
MDD34
MDD35
MDD36
MDD37
MDD38
MDD39
MDD40
MDD41
MDD42
MDD43
MDD44
MDD45
MDD46
MDD47
MDD48
MDD49
MDD50
MDD51
MDD52
MDD53
MDD54
MDD55
MDD56
MDD57
MDD58
MDD59
MDD60
MDD61
MDD62
MDD63

MDD5
MDD0
MDD34
MDD6
MDD38
MDD7
MDD37
MDD39
MDD10
MDD44
MDD45
MDD14
MDD46
MDD13
MDD15
MDD47
MDD20
MDD52
MDD21
MDD22
MDD53
MDD58
MDD54
MDD23
MDD27
MDD59
MDD28
MDD62
MDD30
MDD61
MDD31
MDD63
MDD1
MDD32
MDD33
MDD35
MDD3
MDD2
MDD36
MDD4
MDD40
MDD9
MDD41
MDD8
MDD12
MDD42
MDD11
MDD43
MDD16
MDD48
MDD17
MDD18
MDD49
MDD50
MDD19
MDD51
MDD55
MDD24
MDD56
MDD25
MDD57
MDD26
MDD29
MDD60

8
7
6
5
4
3
2
1
8
7
6
5
4
3
2
1
8
7
6
5
4
3
2
1
8
7
6
5
4
3
2
1
8
7
6
5
4
3
2
1
8
7
6
5
4
3
2
1
8
7
6
5
4
3
2
1
8
7
6
5
4
3
2
1

9
10
11
12
13
14
15
16
9
10
11
12
13
14
15
16
9
10
11
12
13
14
15
16
9
10
11
12
13
14
15
16
9
10
11
12
13
14
15
16
9
10
11
12
13
14
15
16
9
10
11
12
13
14
15
16
9
10
11
12
13
14
15
16

8
7
6
5
4
3
2
1
8
7
6
5
4
3
2
1

9
10
11
12
13
14
15
16
9
10
11
12
13
14
15
16

MD5
MD0
MD34
MD6
MD38
MD7
MD37
MD39
MD10
MD44
MD45
MD14
MD46
MD13
MD15
MD47
MD20
MD52
MD21
MD22
MD53
MD58
MD54
MD23
MD27
MD59
MD28
MD62
MD30
MD61
MD31
MD63
MD1
MD32
MD33
MD35
MD3
MD2
MD36
MD4
MD40
MD9
MD41
MD8
MD12
MD42
MD11
MD43
MD16
MD48
MD17
MD18
MD49
MD50
MD19
MD51
MD55
MD24
MD56
MD25
MD57
MD26
MD29
MD60

RP34
16P8R-22

MA0
MA1
MA13
MA14

R362
R364
R370
R368

1
1
1
1

2
2
2
2

@10K
@10K
@10K
@10K

MA2
MA3
MA4
MA5

R366
R361
R363
R365

1
1
1
1

2
2
2
2

@10K
@10K
@10K
@10K

+3VS

Strap

MA6
MA7
MA8
MA12

RP54
16P8R-22

R164
R167
R174
R369

MA9
MA11

RP62
16P8R-22

1
1
1
1

2
2
2
2

R180 1
R367 1

2
2

10K
@10K
@10K
@10K
@10K
@10K

+3VS

+3VS

+3VS

Setting

MA2

PCI Base Address Mapping

01=100Mhz
11=133Mhz
00=66Mhz
0=Map0
1=Map1

MA3

Graphic IO Enable/Disable

0=Enable
1=Disable

MA4

PCI Interrupt

0=Enable
1=Disable

MA7

Graphic Test Mode

0=Normal
1=Test

MA9

VGA Clock Select

MA12,8
RP50
16P8R-22

Description

CPU Clcok Frequency

0=PLL
1= External
0=4Level
1=1Level

www.kythuatvitinh.com
7,8 SCASA#
8 CKE3

MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13
MA14

C187
10PF

11 DCLKO
11 D C L K W R

R134
33

DCLKO1

J22
K22

MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13
MA14

DCLKO
DCLKI

AA23
AB23
AB26
AB25
AB24
AC26
AC25
AC24
AD26
AD25
AE26
AD24
AE24
AE25
AF25

SCASA#
SCASB#/CKE3
SCASC#/CKE1

H21
H22

11

R137
VCCA
@15

L21
L22

C189
@47PF

GNDA
GNDA
PLLTEST

R170
R185

1
1

2
2

10K
10K

BSEL0
BSEL1

2
2,11

IOQ Level

MA0,1,13,14

Panel Type

RP38
16P8R-22

RP33
16P8R-22

RP57
16P8R-22
2

RP61
16P8R-22

K24

VCCA
VCCA

MA11

MA8
MA12

VT8606

MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA11
MA10
MA12
MA13
MA14

R354
4.7K

T=40iml

L23
1
2
CHB2012U121_0805

+2.5VS
1

.1UF

C448

RP53
16P8R-22

RP56
16P8R-22
1

10UF_1210
2

C451

VCCA

MMA0
MMA1
MMA2
MMA3
MMA4
MMA5
MMA6
MMA7
MMA8
MMA9
MMA11
MMA10
MMA12
MMA13
MMA14

7,8

MMA[0..14]

MMA[0..14]

Compal Electronics, Inc.


T H IS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL
E L ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
T H IS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION
O F R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER
T H IS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
T H IRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

SCHEMATIC, M/B LA-1281

Size
Document Number
Custom 401202
Date:

, 04, 2002

Rev
2A
Sheet
E

of

34

+3V

+3V

CKE
CLK
RVD
RVD

37
38
36
40

CKE0
CLK_SDRAM0
MMA14

CKE0
6
CLK_SDRAM0

8MX16S

11

R286
@10

MMA0
MMA1
MMA2
MMA3
MMA4
MMA5
MMA6
MMA7
MMA8
MMA9
MMA10
MMA13
MMA12
MMA11

23
24
25
26
29
30
31
32
33
34
22
35
21
20

RCAS#4
RCAS#5
RMWEA#
SCASA#
SRASA#
RRAS#0

15
39
16
17
18
19

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BA1
A13/BA0
DQML
DQMH
WE#
CAS#
RAS#
CS#

+3V

64/128MB SDRAM

U43

1
14
27
3
9
43
49

MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15

VCC
VCC
VCC
VCCQ
VCCQ
VCCQ
VCCQ

2
4
5
7
8
10
11
13
42
44
45
47
48
50
51
53

VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

28
41
54
6
12
46
52

DQML
DQMH
WE#
CAS#
RAS#
CS#

BANK0

U44

1
14
27
3
9
43
49
15
39
16
17
18
19

VCC
VCC
VCC
VCCQ
VCCQ
VCCQ
VCCQ

RCAS#0
RCAS#1
RMWEA#
SCASA#
SRASA#
RRAS#0

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BA1
A13/BA0

VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ

23
24
25
26
29
30
31
32
33
34
22
35
21
20

28
41
54
6
12
46
52

MMA0
MMA1
MMA2
MMA3
MMA4
MMA5
MMA6
MMA7
MMA8
MMA9
MMA10
MMA13
MMA12
MMA11

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
CKE
CLK
RVD
RVD

2
4
5
7
8
10
11
13
42
44
45
47
48
50
51
53
37
38
36
40

MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47

CKE0
CLK_SDRAM0
MMA14

8MX16S
+3V

6,8

MMA[0..14]

MMA[0..14]

RCAS#2
RCAS#3
RMWEA#
SCASA#
SRASA#
RRAS#0

15
39
16
17
18
19

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BA1
A13/BA0

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

2
4
5
7
8
10
11
13
42
44
45
47
48
50
51
53

MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31

U41

1
14
27
3
9
43
49

23
24
25
26
29
30
31
32
33
34
22
35
21
20

VCC
VCC
VCC
VCCQ
VCCQ
VCCQ
VCCQ

MMA0
MMA1
MMA2
MMA3
MMA4
MMA5
MMA6
MMA7
MMA8
MMA9
MMA10
MMA13
MMA12
MMA11

MMA0
MMA1
MMA2
MMA3
MMA4
MMA5
MMA6
MMA7
MMA8
MMA9
MMA10
MMA13
MMA12
MMA11

23
24
25
26
29
30
31
32
33
34
22
35
21
20

RCAS#6
RCAS#7
RMWEA#
SCASA#
SRASA#
RRAS#0

15
39
16
17
18
19

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BA1
A13/BA0

VCC
VCC
VCC
VCCQ
VCCQ
VCCQ
VCCQ

U42

1
14
27
3
9
43
49

C330
@15PF

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63

2
4
5
7
8
10
11
13
42
44
45
47
48
50
51
53

RCAS#[0..7]

RCAS#[0..7]

RMWEA#
SCASA#
SRASA#
RRAS#0

DQML
DQMH
WE#
CAS#
RAS#
CS#

CKE
CLK
RVD
RVD

37
38
36
40

CKE0
CLK_SDRAM0
MMA14

8MX16S

DQML
DQMH
WE#
CAS#
RAS#
CS#

28
41
54
6
12
46
52

28
41
54
6
12
46
52

6,8
6,8
6,8
6

VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ

6,8

MD[0..63]

MD[0..63]

VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ

www.kythuatvitinh.com
6,8

CKE
CLK
RVD
RVD

37
38
36
40

CKE0
CLK_SDRAM0
MMA14

8MX16S

+3V

C332
.1UF

C368
.1UF

C344
.1UF

+3V

C331
.1UF

C351
.1UF

C389
.1UF

C339
.1UF

+3V

C352
1000PF

C393
1000PF

C364
1000PF

+3V

C335
.1UF

C365
.1UF

C362
.1UF

C338
.1UF

+3V

C336
1000PF

C367
1000PF

C363
1000PF

C329
1000PF

C485
.1UF

+3V

C350
1000PF

C392
1000PF

C343
1000PF

C482
1000PF

C384
1000PF

Compal Electronics, Inc.


Title
PROPRIETARY NOTE

T H I S S H E E T OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Size
T R A D E S E C RET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
D E P A R T M E N T EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
U S E D B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
C

SCHEMATIC, M/B LA-1281


Document Number

401202

, 04, 2002

Sheet

Rev
2A
7

of

34

SO-DIM 144 PINS


RAM MODULE CONN.
1

6,7

MMA[0..14]

6,7

MD[0..63]

6,7

RCAS#[0..7]

RRAS#[2..3]

BANK2/3

MMA[0..14]
MD[0..63]

RCAS#[0..7]

+3V

+3V

RRAS#[2..3]

MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
RCAS#0
RCAS#4
MMA0
MMA1
MMA2
MD32
MD33
MD34
MD35

MD36
MD37
MD38
MD39

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59

JP20
VSS
DQ0
DQ1
DQ2
DQ3
VCC
DQ4
DQ5
DQ6
DQ7
VSS
CE0#
CE1#
VCC
A0
A1
A2
VSS
DQ8
DQ9
DQ10
DQ11
VCC
DQ12
DQ13
DQ14
DQ15
VSS
RESVD/DQ64
RESVD/DQ65

VSS
DQ32
DQ33
DQ34
DQ35
VCC
DQ36
DQ37
DQ38
DQ39
VSS
CE4#
CE5#
VCC
A3
A4
A5
VSS
DQ40
DQ41
DQ42
DQ43
VCC
DQ44
DQ45
DQ46
DQ47
VSS
RESVD/DQ68
RESVD/DQ69

RFU/CLK0
VCC
RFU
WE#
RE0#
RE1#
OE#/RESVD
VSS
RESVD/DQ66
RESVD/DQ67
VCC
DQ16
DQ17
DQ18
DQ19
VSS
DQ20
DQ21
DQ22
DQ23
VCC
A6
A8
VSS
A9
A10
VCC
CE2#/RESVD
CE3#/RESVD
VSS
DQ24
DQ25
DQ26
DQ27
VCC
DQ28
DQ29
DQ30
DQ31
VSS
SDA
VCC
SO-DIMM144

RFU/CKE0
VCC
RFU
RFU/CKE1
RFU
RFU
RFU/CLK1
VSS
RESVD/DQ70
RESVD/DQ71
VCC
DQ48
DQ49
DQ50
DQ51
VSS
DQ52
DQ53
DQ54
DQ55
VCC
A7
A11/BA0
VSS
A12/BA1
A13/A11
VCC
CE6#/RESVD
CE7#/RESVD
VSS
DQ56
DQ57
DQ58
DQ59
VCC
DQ60
DQ61
DQ62
DQ63
VSS
SCL
VCC

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60

MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
RCAS#1
RCAS#5
MMA3
MMA4
MMA5
MD40
MD41
MD42
MD43

MD44
MD45
MD46
MD47

www.kythuatvitinh.com
C298

R260

22PF

33

11 CLK_SDRAM2
6,7
6,7

SRASA#
RMWEA#

RMWEA#
RRAS#2
RRAS#3

MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23

MMA6
MMA8
MMA9
MMA10
RCAS#2
RCAS#6

+3V

R372
10K

9,11

SMBDATA

MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55

61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143

62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144

CKE2

CKE2

CKE3
MMA14

SCASA#
CKE3

6,7
6

+3V

CLK_SDRAM3

11

C473
10UF_1206
6.3V

C483
.1UF

C474
.1UF

C484
.1UF

C476
.1UF

C477
.01UF

C475
.01UF

C488
.01UF

R277
33

MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31

+3V

C319
22PF

MMA7
MMA11

C472
10UF_1206
6.3V

C478
.01UF

C479
1000PF

C489
1000PF

C358
1000PF

C487
1000PF

MMA12
MMA13
RCAS#3
RCAS#7
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63

+3V

R278
10K
SMBCLK

9,11

DIMM1
Compal Electronics, Inc.
Title
PROPRIETARY NOTE

T H I S S H E E T OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Size
T R A D E S E C RET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
D E P A R T M E N T EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
U S E D B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
C

SCHEMATIC, M/B LA-1281


Document Number

401202

, 04, 2002

Sheet

Rev
2A
8

of

34

17

5,15,23,28

PDA0
PDA1
PDA2
PDCS1#
PDCS3#
PDDACK#
PDDREQ
PDIOR#
PDIOW#
PDIORDY

AD[0..31]

AD[0..31]

VT82C686A-A

PDD[0..15]

PDD[0..15]

17
17
17
17
17
17
17
17
17
17

U30A

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

P16
P18
P20
R17
R19
T16
T18
T20
T19
T17
R20
R18
R16
P19
P17
N20

PDA0
PDA1
PDA2
PDCS1#
PDCS3#
PDDACK#
PDDREQ
PDIOR#
PDIOW#
PIORDY

M17
M19
M18
L20
M16
M20
N19
N17
N18
N16

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

L17
L16
K20
K19
K18
K17
K16
J20
J18
J17
J16
H20
H19
H18
H17
H16
F16
E20
E19
E18
E17
D20
D19
D18
B20
A20
A19
B19
A18
B18
C18
A17

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

SDD0/BITCLK
SDD1/SDIN
SDD2
SDD3/SYNC
SDD4/SDOUT
SDD5/-ACRST
SDD6/JBY
SDD7/JBX
SDD8/JAY
SDD9/JAX
SDD10/JAB2
SDD11/JAB1
SDD12/JBB2
SDD13/JBB1
SDD14/MSO
SDD15/MSI

PDA0
PDA1
PDA2
PDCS1
PDCS3
PDDACK
PDDREQ
PDIOR
PDIOW
PDRDY
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

SDA0
SDA1
SDA2
SDCS1
SDCS3
SDDACK
SDDREQ
SDIOR
SDIOW
SDRDY
A20M
CPURST
FERR
IGNNE
INIT
INTR
NMI
SLP/GPO7
SMI
STPCLK
SMBCLK
SMBDATA

W18
V17
Y17
V16
Y16
U15
W15
U14
Y15
V15
T15
W16
U16
W17
Y18
Y19
U19
V18
U20
U17
U18
V19
Y20
W19
W20
V20
Y7
V8
V7
Y8
T6
W8
U7
T7
U6
W7
U9
T9

2
R306
2
1 R300
0
2
1 R295
22

2
R312
2
R310

2
R313
SDA0
SDA1
SDA2
SDCS1#
SDCS3#
SDDACK#
SDDREQ
SDIOR#
SDIOW#

1
22

1
10K
1
0

+3VS

1
1
2
@33
IAC_BITCLK
26 C369
IAC_SDATAI
26

1
2
3
4
5

2
R8

SB_SMC
SB_SMD

10
9
8
7
6

+3VS

PBTN#
ATF_INT#
PX4_RI#
IRQ8#

1
2
3
4

LID#
SCI#
VLB#

1
2
3
4

D29

ON/OFF

20,26

@RB751V
2

0
0

8
7
6
5

D30

RP82
SUSCLK

PBTN_OUT#

21

2
R272

8
7
6
5
8P4R_10K
1
10K
+3V

RB751V

CPURST#

2,4

CPUINIT#

+3V

RP86

8P4R_10K

PBTN#

32
R247
FERR#
2
SB_IGNNE#
23
R248
SB_INTR
3
SB_NMI
3
SLP#
SMI#
2
STPCLK# 2
SMBCLK
SMBDATA

RP92

10P8R-10K

17
17
17
17
17
17
18
17
17
18

SB_A20M#
FERR#

Signals Pullup

IAC_SYNC
26
IAC_SDATAO
26
IAC_RST#
26

+3VS

SDA0
SDA1
SDA2
SDCS1#
SDCS3#
SDDACK#
SDDREQ
SDIOR#
SDIOW#
SDIORDY

@22PF

CLKRUN#

2
R288

1
10K

2
R289

1
@1K

+3VS

SUSA#

2
R268

1
10K

2
R267

8,11
8,11

SPKR

1
10K

2
R264

+3VS

1
@10K

www.kythuatvitinh.com
FRAME#
IRDY#
TRDY#
STOP#
DEVSEL#
SERR#
PAR
IDSEL
PCIREQ#
PCIGNT#
PCI_RST#

5,12,15,23,28 FRAME#
5,12,15,23,28 IRDY#
5,12,15,23,28 TRDY#
5,12,15,23,28 STOP#
5,12,15,23,28 DEVSEL#
5,12,15,23,28 SERR#
5,12,15,23,28 PAR

PCLK_SB
1

5,12
5,12
R292
@22

PCIREQ#
PCIGNT#

5,12,15
12,15,23
12,28
12,23

C353
@10PF

11

A16
D17
C17
B17

PIRQA#
PIRQB#
PIRQC#
PIRQD#
PCLK_SB

PCLK_SB

As close
as 686A
X3

Y5

RTCX2

W5
R9
R10

Y6

+RTCVCC
C311
1
2

C294
22PF
2

+3VS

E16

RTCX1

+3V

H15
J15
K15
M15
N15
R7
R8
R11
R14

C279

C360

.1UF

.1UF

.1UF

.1UF
2

C277

4.7U_1206

C278

C263

.01UF

C288
22PF

RTCX2

32.768KHZ
1
2
R386
@20M

RTCX1

F18
F19
F20
G17
G16
G18
G19
C20
L18
L19
B16

FRAME
IRDY
TRDY
STOP
DEVSEL
SERR
PAR
IDSEL
REQ
GNT
PCIRST

GND
GND
GND
GND
GND

PINTA
PINTB
PINTC
PINTD

VSENS4(12V)
VSENS3(5V)

PCICLK

VSENS1(2.0V)

RTCX1

VSENS2(2.2V)

RTCX2

TSEN1

VCCSUS
VCCSUS

VREF

VBAT

TSEN2

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VT82C686-B

FAN1
FAN2/GPIOB/GPIO9
VCCHWM
GNDHWM

Y10
T11
V10
U11
W11
T14
T8
U10
W10
V9
W9
Y9

21
26

+3VS

15,16

RTCCLK

R265
4.7K

ATF_INT#

VLB#
IRQ8#
133M/100M#
LID#
SCI#
SUSA#
SUSB#
SUSC#

EXTSMI#
ATF_INT#

20
20

IRQ8#

20

LID#
SCI#
SUSA#
SUSB#
SUSC#

21
20
11,20
20
20

1 2

ACIN_SYS#

PX4_RI#
SPKR

D25

SUS_STAT#

LLBATT#

2N7002

D28
2

21

RB751V

+3VS
RP83

8
7
6
5

W14
U13

2,27,32 VR_POK

1
2
3
4

PCI_RST#

8P4R_10K

V13

W13

2
R290

T13

PCI_RST#

1
100K

PCIRST#

PCIRST#

5,13,15,16,19,23,28

U45
@7SH08FU

2
R394

1
R319

2
10K

1
R318

2
@10K

133M/100M#

Populate R318 and not


populate R319 When
100MHz SDRAM on board
Populate R319 and not
populate R318 When
133MHz SDRAM on board

1 PCIRST#

+5VS

Y13

R12

Q40

ACIN

+3VS

Y14

U12

20,26,29

RB751V

F15
G15
L15
P15
R15

T12

ACIN_SYS#

C/BE0
C/BE1
C/BE2
C/BE3

U8

27

J19
G20
F17
C19

C/BE#0
C/BE#1
C/BE#2
C/BE#3

PX4_RI#
SPKR

RSMRST#
1
0

5,15,23,28
5,15,23,28
5,15,23,28
5,15,23,28

EXTSMI
PME/GPI5/THRM
SUSST1/GPO6
BATLOW/GPI2
GPI1/IRQ8
GPIOA/GPIO8
GPO0
LID/APICREQ/GPI3
SMBALT/GPI6
SUSA/APICACK/GPO1
SUSB/APICCS/GPO2
SUSC

V11
V5

2
R275

NOTE:DISABLE INTERNAL
AUDIO CTRL

2
R299

1
C359

2
.1UF
2
R385

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN C.

FAN_SENSE
20,22
1
+3VS
+3VS 1 0 K

Compal Electronics, Inc.

IDSEL

GPIOD/GPIO11

SUSCLK

SPWROFF#
5,20,27
CPU_STP#
11
PCI_STP# 11
CLKRUN#
5,12,15,23,28

R13

C383

+C376

.1UF

Title

10UF_1210

Size
B

1
100

RING/GPI7
SPKR

T10

2
R315

SUSCLK

CLKRUN#
PBTN#
RSMRST#

AD18

PWRGD
CPUSTP/GPO4
PCISTP/GPO5
CLKRUN
PWRBTN
RSMRST

W6
Y12
V12
W12
Y11
V6

Date:

SCHEMATIC, M/B LA-1281


Document Number

Rev
2A

401202

, 04, 2002
7

Sheet

of

34

U30B

SD[0..15]

12,20

SA[0..19]

SA[0..19]

SD0
SD1
SD2
SD3
SD4
SD5
SD6
SD7
SD8
SD9
SD10
SD11
SD12
SD13
SD14
SD15

Y1
Y2
W2
Y3
W3
V3
Y4
W4
L5
M2
M4
N1
N3
N5
P1
P2
L2
E1
D2
L4
M3
N2

ACK
BUSY
PE
SLCT
ERROR
PINIT
AUTOFD
SLCTIN
STROBE
TXD1
DTR1
RTS1
CTS1
DSR1
DCD1
RI1
RXD1

SD0
SD1
SD2
SD3
SD4
SD5
SD6
SD7
SD8
SD9
SD10
SD11
SD12
SD13
SD14
SD15

TXD2
DTR2
RTS2
CTS2
DSR2
DCD2
RI2
RXD2
VCCUSB
GNDUSB

DACK0/IDEIRQA/GPO16
USBCLK
DACK1/IDEIRQB/GPO17
DACK3/AC97IRQ/GPO18
USBP0+
DACK5/MC97IRQ/GPO19/SERIRQ
USBP0DACK6/USBIRQA/GPO20
USBP1+
DACK7/USBIRQB/GPO21
USBP1DRQ2/OC1/SERIRQ/GPIOE
DACK2/OC0/GPIOF
DRQ0/GPI16
CHAS/GPIOC/GPIO10
DRQ1/GPI17
DRQ3/GPI18
USBP2+
DRQ5/GPI19
USBP2DRQ6/GPI20
USBP3+
DRQ7/GPI21(CF/CG)
USBP3-

B15
D15
A14
B14
C14
D14
E14
A13

LPD0
LPD1
LPD2
LPD3
LPD4
LPD5
LPD6
LPD7

USBP1+
USBP1USBP0+
USBP0-

B13
C13
D13
E13
A15
C15
C16
E15
D16
A11
D11
B11
C11
C12
A12
E11
B12
D10
B9
E10
A9
C10
A10
C9
B10

LPTACK#
LPTBUSY
LPTPE
LPTSLCT
LPTERR#
INIT#
LPTAFD#
SLCTIN#
LPTSTB#
TXD1
DTR#1
RTS#1
CTS#1
DSR#1
DCD#1
DCD#1
DSR#1
RI#1
RXD1

F9

CTS2
DSR2
DCD2
RI2
1
R284 1 0 K
VCCUSB

F8

GNDUSB

1
2
3
4

RP84

24
24
24
24
24
24
24
24
24

+5V

1
R285 1 0 K

8
7
6
5

+3VS

1
2
3
4
5
6
7
8
9
10

1
2
3
4
5
6
7
8
9
10
@96212-1011S

2 RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD#1

RI2
CTS2
DSR2
DCD2

1
2
3
4

RP81

8
7
6
5

48M

A3
B3
C4
D4
H3
G5
V14

USBP0+
USBP0USBP1+
USBP1-

A4
B4
B5
E6

RP80

8
7
6
5

8P4R-27

USB1_D+
USB1_DUSB0_D+
USB0_D-

25
25
25
25
A

RP77
8P4R-15K

+3VS

8P4R_10K

C3

RP76

CP7
8P4C-47PF

JP1

8P4R_10K

1
2
3
4

5
6
7
8

12,20

SD[0..15]

PRD0
PRD1
PRD2
PRD3
PRD4
PRD5
PRD6
PRD7

8
7
6
5

LPD[0..7]

LPD[0..7]

SA0
SA1
SA2
SA3
SA4
SA5
SA6
SA7
SA8
SA9
SA10
SA11
SA12
SA13
SA14
SA15
SA16
SA17
SA18
SA19
LA20
LA21
LA22
LA23

1
2
3
4

SDD[0..15]

SDD[0..15]

W1
V2
V1
U3
U2
U1
T4
T3
T2
T1
R5
R4
R3
R2
R1
P5
P4
P3
K2
K1
J5
J4
J3
J2

48M

11

17
24

SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
SA16
SA17
SA18
SA19

The components most place cloely 686B

4
3
2
1

SDD0
SDD1
SDD2
SDD3

4
3
2
1

SDD4
SDD5
SDD6
SDD7

4
3
2
1

RP73

8P4R_0
RP71

5
6
7
8

SA0
SA1
SA2
SA3

5
6
7
8

SA4
SA5
SA6
SA7

1
2
3
4

SA9
SA14
SA8
SA13

1
2
3
4

SA12
SA11
SA10
SA15

www.kythuatvitinh.com
20

IOR#
IOW#
MEMR#
MEMW#

AEN

+3VS
+3VS
1
2
3
4

MEMR#
MEMW#

RP72
C

12,20

8P4R_22
R240
+3VS
R251
+3VS
IOCHRDY

11

14MOSC

14MOSC

R253
R254
8
7
6
5

12

R252
@10

14MOSC

C265

12
12
12
12
12
12
12
12
12,17
12,18

C366

C375

C373

.1UF

.1UF

.1UF

F7
F10
F12
F13
F14
H6
J6
K6
M6
N6

AEN
BALE
SBHE
REFRESH
IOR
IOW
MEMR
MEMW
SMEMR
SMEMW
IOCS16
MEMCS16
IOCHRDY
IOCHK/GPI0
TC
RSTDRV

KBCK/KA20G
KBDT/KBRC
MSCK/IRQ1
MSDT/IRQ12

ROMCS/KBCS
DRVDEN0
DRVDEN1

INDEX
MTR0
DS1
DS0
MTR1
DIR
STEP
WDATA
WGATE
TRAK00
WRTPRT
RDATA
HDSEL
DSKCHG

OSC
BCLK
IRRX/GPO15
IRTX/GPO14
IRQ3
IRQ4
IRQ5
IRQ6/GPI4/SLPBTN#
IRQ7
IRQ9
IRQ10
IRQ11
IRQ14
IRQ15

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

XDIR/GPO12
SOE/GPO13
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VT82C686-B

E5
A5
D5
C5
C1

8
7
6
5
8P4R_15K
GATEA20 20
RC#
20
IRQ1
12,20
IRQ12
12,20

IRQ1
IRQ12

BIOSCS#

3MODE#

19

D7
E9
A8
B8
C8
D8
E8
A7
B7
E7
A6
B6
C7
C6

INDEX#
MTR0#

19
19

DRV0#

19,21

FDDIR#
STEP#
WDATA#
WGATE#
TRACK0#
WP#
RDATA#
HDSEL#
DSKCHG#

19
19
19
19
19
19
19
19
19

F6
F11
G6
J9
J10
J11
J12
K9
K10
K11
K12
L6
L9
L10
L11
L12
M9
M10
M11
M12
P6
R6

SDD9
SDD14
SDD8
SDD13

@10PF

8
7
6
5

RP78

8P4R_0

BIOSCS#

1
R255

D9
D6

C303

2
4.7K

RP79

20

SDD12
SDD11
SDD10
SDD15

+3VS

8
7
6
5

8P4R_0

PH: SOCKET 370; SLOT 1,SOCKET-A


PL: SOCKET7

VCCUSB
C333

.1UF
GNDUSB

L38 0_0805
2

+3VS

C325
10UF_1206
1

L37
0_0805

Compal Electronics, Inc.


Title

C374

C379

+3VS

4.7UF_1206 .1UF

G4
G3
G2
G1
F5
H4
K3
K4
L1
K5
T5
U5

FLASH#

4.7K
2
TC
4.7K
2 IOCHK#

+3VS

R250
1
R239
1

IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
IRQ9
IRQ10
IRQ11
IRQ14
IRQ15

IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
IRQ9
IRQ10
IRQ11
IRQ14
IRQ15

21

E4
H5
D12
E12

@10PF

+3VS

B2
H2
1
F2
1
E3
PIOR#
D1
PIOW#
C2
PMEMR#
U4
PMEMW#
V4
A1
B1
1
2 1 K F3
1
2 4.7K F1
A2
IOCHK#
F4
TC
H1
J1
2 1K
2 1K

1
2
3
4

12,20
12,20
12,20
12,20

L3
E2
D3
M1
M5
N4

8P4R_0

Populate R383 and not


populate R384 When
128M SDRAM on board

64M#/128M

PID0
PID1
PID2
PID3

25
25

14
14
14
14

OVCUR#1
OVCUR#0

Populate R384 and not


populate R383 When 64M
SDRAM on board

R263
@33

12

+3VS

SIRQ
PHDRST#
SHDRST#
2
10K
2
@10K

12,15
19
191
R383
1
R384

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN C.
4

Size
B
Date:

SCHEMATIC, M/B LA-1281


Document Number

Rev
2A

401202

, 04, 2002
7

Sheet

10

of

34

CLOCK GENERATOR & BUFFER

1000PF

CLK_CPUIO

C270
.01UF

2
2

14.318MHZ
1
2
R257
@2M

47

+3VCLK_CORE
+3VBUFF
+3VBUFF
+3VCLK_CORE
+3VCLK_CORE
+3VCLK_CORE
+3VCLK_CORE

19
36
30
27
14
6
1

XIN

XOUT

DCLKO

6 DCLKO

C280
10PF

15
20

9 PCI_STP#

C281
10PF

DCLKO

Y3

CLK_CPUIO

R196

SUS_A#

@22

9 CPU_STP#
1

2
@10K

R388

21

CPUSTP#

41
23
24

U22
VDDL

24/48MHZ/FS1

VDDCOR
VDDSDR
VDDSDR
VDD48
VDDPCI
VDDPCI
VDDREF

48MHZ/FS0
CPUCLKF
CPUCLK0
CPUCLK1
CPUCLK2
PCIF

XIN

PCI0/FS3
PCI1
PCI2
PCI3
PCI4
PCI5
PCI6

XOUT
BUFIN
PCI_STP#
PWR_DWN#

SDRAMF
SDRAM0
SDRAM1
SDRAM2
SDRAM3
SDRAM4
SDRAM5
SDRAM6
SDRAM7

CLK_STP#

25

FS1

26

FS0

46
45
43
42
7

MODE

8
10
11
12
13
17
18

EARLY

39
38
37
35
34
32
31
29
28

R187

22

1
1
1

2
2
2

R387
R225
R219

22
22
@22

R213

22

1
1
1
1

2
2
2
2

R377
R216
R206
R202

33
33
33
33

R190

33

1
1

2
2

R214
R204

22
10

1
1

2
2

R198
R197

10
10

C276

C283
4.7UF_10V_0805
10V

W=30MILS
1

C236
1000PF

1000PF

C262
.1UF

.01UF

C242

C235

L36
1
CHB2012U170

.1UF

C231

+2.5V_CLK

.1UF

+3VBUFF

W=30MILS

C225
4.7UF_10V_0805
10V

CLK_CPUIO

+3VBUFF

.1UF

.1UF

C464

C463

1000PF

C469

1
C264
1000PF

C466

C462
4.7UF_10V_0805
10V

+3VCLK_CORE

W=40MILS
2

+3VS

L30
1
@CHB2012U170
L31
1
+3VS
CHB2012U170
+3V

L32
1
2
CHB2012U170
L34
1
2
CHB2012U170

48M

10

HCLK_CPU 2
HCLK_NB 4
PCLK_SB

APICCLK 2
PCLK_PCM 15
PCLK_MINI 23
PCLK_1394 28
PCLK_NB

DCLKWR 6
CLK_SDRAM0

C237

@10PF

R389

+3VS

CPUSTP#

+12VS

@RB751V
D20

9,20 SUSA#

3
9
16
22
33
40
44

R169

10K

SUS_A#

SDATA
SCLK

VSS
VSS
VSS
VSS
VSS
VSS
VSS

REF0
REF1/FS2

2
48

1
R237 1
R238 1
R243

SPECTRUM
FS2

@10
10
10

CLK_SDRAM2
CLK_SDRAM3

2
2
2

14.3M_TV
14MCRT
14MOSC

13
5
10

ICS9248-195

8
8

www.kythuatvitinh.com
D45

+3VS

R184
10K

SMBCLK

8,9

SMBDATA

8,9

C260

C252

@10PF

@10PF

@15PF

R378
150

C254

Q27
1

2N7002

1
Q28

2N7002
2,6

BSEL1

R176

FS0

@10K
1

R186

FS3

FS2

FS1

FS0

CPU / PCI

133 / 33 MHz

100 / 33 MHz

66 / 33 MHz

@10K
2

FS1

10K

CPU / PCI CLOCK

R179

R177

FS2

2,3,32

TUAL5#

Q60
FDV301N

+3VS
1

0 NO
1 EARLY CLOCK

R220

EARLY

10K

@10K
R246

TUAL5

Q59
FDV301N

Q61
FMMT3904

VTTPWRGD

3,32

R406
49.9_1%

11

2
10K

1
R407

CPU_IO

@RB751V

0 3.3V CPU
1 2.5V CPU

R227

@10K
MODE

R218
1

2
10K

10K

0 NO
1 SPREAD SPECTRUM

SPECTRUM

R226

10K

Compal Electronics, Inc.


Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONIC S, INC.
Date:

SCHEMATIC, M/B LA-1281


Document Number

401202

, 04, 2002

Sheet

Rev
2A
11

of

34

ISA BUS Pullup


10,20

SD[0..15]

10,20

SA[0..19]

PCI BUS Pullup

SD[0..15]
SA[0..19]

+3VS

10,20

+3VS

10,18

+3VS
RP67

10,20
10
10

IRQ1
IRQ3
IRQ4

1
2
3
4
5

DEVSEL#
FRAME#
IRDY#
TRDY#

5,9,15,23,28
5,9,15,23,28
5,9,15,23,28
5,9,15,23,28

8P4R-10K

8
7
6
5

IRQ11
IRQ12
IRQ5

H14
C276PAD

H15
C276PAD

H16
C276PAD

H17
C276PAD

H12
C236PAD

H5
S3.14X0.66mm

H9
C236PAD

H30
S4X2.8mm

H31
S4X2.8mm

+3VS

10
10,20
10

R241

8P4R-10K
2

1
2
3
4

H13
S3.14X0.66mm

1
2
3
4

RP90

8
7
6
5

H23
S3.14X0.66mm

IRQ15

H32
S3.14X0.66mm

SIRQ

10,15

10K

H26
S3.14X0.66mm

R234

H4
S3.14X0.66mm

8P4R-10K

+3VS

10,17

IRQ14

2
10K

9,28
9,23
5,9,15,23,28
5,15

1
R233

PIRQC#
PIRQD#
PAR
PLOCK#

+5VS

8
7
6
5

RP87

1
2
3
4

IOCHRDY

2
1K

1
R256

10K

RP69

10
9
8
7
6

H36
S276D146X114

+3VS
IRQ6
IRQ7
IRQ9
IRQ10

10
10
10
10

H19
S4X1.5mm

H18
S4X1.5mm

H21
S6.5X3.8mm

H11
S6.5X3.8mm

H10
S6.5X3.8mm

H22
S6.5X3.8mm

RP91

10P8R-10K

+3VS

+3VS

+3VS

H27
S7X3.0mm

H34
S7X3.0mm

H6
S7X3.0mm

H24
S7X3.0mm

H25
S7X3.0mm

H38
C177D98

H20
S7X3.0mm

H7
S7X3.0mm

H8
S7X3.0mm

10P8R-10K

SD0
SD2
SD1
SD5

10
9
8
7
6

5,9,15
9,15,23
5,9
5,9,15,23,28

RP74

+3VS
PIRQA#
PIRQB#
PCIREQ#
CLKRUN#

1
2
3
4
5

10
9
8
7
6

SD3
SD4
SD6
SD7

1
2
3
4
5

15,23,28 PERR#
5,9
PCIGNT#
5,9,15,23,28 STOP#
5,9,15,23,28 SERR#

www.kythuatvitinh.com
+3VS

10P8R-4.7K

10P8R-4.7K

H2
2
3
4
5
6
7
8
9
SCREW-GND169

2
3
4
5
6
7
8
9

H29
2
3
4
5
6
7
8
9
SCREW-GND169

2
3
4
5
6
7
8
9

1
1

CF3
SMD40M80

CF6
SMD40M80

FD3
FIDUCAL

FD2
FIDUCAL

FD4
FIDUCAL

FD6
FIDUCAL

FD1
FIDUCAL

FD5
FIDUCAL

2
3
4
5
6
7
8
9

2
3
4
5
6
7
8
9

CF11
SMD40M80

2
3
4
5
6
7
8
9
SCREW-GND118

2
3
4
5
6
7
8
9
SCREW-GND118

CF8
SMD40M80

CF1
SMD40M80

CF4
SMD40M80

H3

2
3
4
5
6
7
8
9

2
3
4
5
6
7
8
9

2
3
4
5
6
7
8
9
SCREW-GND118

CF14
SMD40M80

2
3
4
5
6
7
8
9
SCREW-GND150

2
3
4
5
6
7
8
9

H1

SA5
SA7
SA6
SA4

2
3
4
5
6
7
8
9
SCREW-GND118

H33

CF12
SMD40M80

+3VS
10
9
8
7
6

2
3
4
5
6
7
8
9

2
3
4
5
6
7
8
9
SCREW-GND118

+3VS

H35

CF9
SMD40M80

SA15
SA12
SA14
SA11

H28

CF7
SMD40M80

EP17
EMIPAD

EP16
EMIPAD

EP15
EMIPAD

EP14
EMIPAD

CF13
SMD40M80

+3VS
4

EP13
EMIPAD

CF10
SMD40M80

10
9
8
7
6

10P8R-4.7K

1
2
3
4
5

EP12
EMIPAD

H37

RP65
SA1
SA3
SA2
SA0

EP3
EMIPAD

CF5
SMD40M80

RP75

EP5
EMIPAD

10,20
10,20
10,20
10,20

EP2
EMIPAD

CF2
SMD40M80

+3VS

1
2
3
4
5

EP11
EMIPAD

MEMW#
MEMR#
IOR#
IOW#

10P8R-4.7K

SA13
SA9
SA10
SA8

EP10
EMIPAD

+3VS
5
4
3
2
1

EP6
EMIPAD

RP66

EP8
EMIPAD

+3VS

6
7
8
9
10

SA18
SA17
SA16
SA19

EP9
EMIPAD

10P8R-4.7K
3

EP7
EMIPAD

SD11
SD10
SD9
SD8

EP4
EMIPAD

EP1
EMIPAD

+3VS

5
4
3
2
1

RP60

6
7
8
9
10

SD15
SD14
SD13
SD12
+3VS

Compal Electronics, Inc.


Title
PROPRIETARY NOTE

T H I S S H E E T OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Size
T R A D E S E C RET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
D E P A R T M E N T EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
U S E D B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
C

SCHEMATIC, M/B LA-1281


Document Number

401202

, 04, 2002

Sheet

Rev
2A
12

of

34

L11
2

.1UF

.1UF

4.7UF_10V_0805

C48

C52

C51

.1UF

.1UF

4.7UF_10V_0805

TV-OUT Encode

TV-GNDA
+3VS

5
5
5
5
5
5
5
5
5
5
5
5

D3

C/G
CSYNC
DS/BCD
P-OUT
XTALO
XTALI

LUMA

21

CRMA

17
35
37

@DAN217

@DAN217
+5VS

1
1

33

R48
R104

2
@75_1%
2
47

1
TVCLK

14.318MHZ

C20
47PF
CHB1608G301
1
2
1
2
C37
47PF
1
2
L5
CHB1608G301

JP8

L7

LUMA

14.3M_TVOUT

32

@DAN217

COMPS

22

20

Y/R

DVDD
DVDD
DVDD
DVDD

31
25
D0
D1
D2
D3
D4
D5
D6
D7
D8/SUSP
D9
D10
D11
D12
D13
D14
D15
RESET#

CVBS/B

42
43
44
1
2
3
4
6
7
9
10
11
12
13
14
15
29

SD
SC

AVDD
VDD

26
27

D8

U4

TVD0
TVD1
TVD2
TVD3
TVD4
TVD5
TVD6
TVD7
TVD8
TVD9
TVD10
TVD11

TVD0
TVD1
TVD2
TVD3
TVD4
TVD5
TVD6
TVD7
TVD8
TVD9
TVD10
TVD11

D10

2.2K

30
5
16
38

R50

SMDTV
SMCTV

DVDD

TVDD

R49
2.2K

5
5

C49

1
C50

TVDD
1

1
CHB1608B121
L10

+5VS

C64

DVDD

CHB1608B121

+3VS

1
2
3
4
5
6
7

www.kythuatvitinh.com
1

R82

14.3M_TV

150PF

270PF

C16

C18

C17

270PF

270PF

150PF

C34

S CONN._SUYIN

47PF

C35

150PF

C19

75_1%

75_1%

14.3M_TVOUT

2
CHB1608G301
1
2

75_1%

R21

R30

TV-GNDA

CH7005

C41

R31

360_1%

18PF

18PF

L6

C122

COMPS

C121

24

R59

CRMA

Y2

5
5
5

TVCLKR
TVHS
TVVS

DGND

IRSET

39
40
41

28

DGND
DGND
DGND

33

34
23
19

R75

8
18
36

PCIRST#

AGND
GND
GND

5,9,15,16,19,23,28

XCLK
HS
VS

11

@0

C78

L17
1

CHB1608B121
2
L16

2 1

R81

@10

2
@15PF

CHB1608B121
TV-GNDA

Compal Electronics, Inc.


Title
PROPRIETARY NOTE

T H I S S H E E T OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Size
T R A D E S E C RET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
D E P A R T M E N T EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
U S E D B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
3

SCHEMATIC, M/B LA-1281


Document Number

401202

, 04, 2002

Sheet

Rev
2A
13

of

34

+5VALW
1
2

+5VALW

C27
4.7UF_1210
1
2

C26

JP2
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49

@4.7UF_1210
20

INVT_PWM

+5VALW
+3VS

PID0
PID1
PID2
PID3
ENVDD
DISPOFF#
L_LCD15
L_LCD14
L_LCD13
L_LCD12
L_LCD11
L_LCD10

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50

DISPOFF#

PID[0..3]

PID[0..3]

LCDVDD

10

LVDDVGA
+3VS

L_LCD0
L_LCD1

5
6
7
8

L_LCD2
L_LCD3
L_LCD4
L_LCD5

RP18

4
3
2
1

PID3
PID2
PID1
PID0

5
5
5
5

TXCLKO+
TXCLKOTXOUT2+
TXOUT2-

TXCLK0+
TXCLK0TXOUT2+
TXOUT2-

5
6
7
8

5
5
5
5

TXOUT1+
TXOUT1TXOUT0+
TXOUT0-

TXOUT1+
TXOUT1TXOUT0+
TXOUT0-

5
6
7
8

8P4R-10K

L_LCD6
L_LCD7
L_LCD8
L_LCD9

L_LCD7
L_LCD6
L_LCD5
L_LCD4

5
5
5
5

TZCLKO+
TZCLKOTZOUT2+
TZOUT2-

TZCLK0+
TZCLK0TZOUT2+
TZOUT2-

8
7
6
5

4
3
2
1

L_LCD3
L_LCD2
L_LCD1
L_LCD0

5
5
5
5

TZOUT0TZOUT0+
TZOUT1+
TZOUT1-

TZOUT0TZOUT0+
TZOUT1+
TZOUT1-

8
7
6
5

TXCLK0+
TXCLK0TXOUT2+
TXOUT2-

4
3
2
1

TXOUT1+
TXOUT1TXOUT0+
TXOUT0-

4
3
2
1

RP101

8P4R-0
RP102

1
2
3
4

L_LCD15
L_LCD14
L_LCD13
L_LCD12

1
2
3
4

L_LCD8
L_LCD9
L_LCD11
L_LCD10

8P4R-0

CP3

5
6
7
8

TZCLK0+
TZCLK0TZOUT2+
TZOUT2-

1
2
3
4

TZOUT1TZOUT1+
TZOUT0+
TZOUT0-

4
3
2
1

@8P4C-220PF

CP18

8
7
6
5

@8P4C-220PF

CP5

CP19
5
6
7
8

@8P4C-220PF

+12V

5
6
7
8

@8P4C-220PF

LVDDVGA
R100
100K
+

LCDVDD

8P4R-0
RP17

4
3
2
1

8P4R-0

HEADER 25X2-LCD

+5V

RP16

R74

C75
4.7UF_1206
10V

Q9
SI2302DS

+3VS

www.kythuatvitinh.com
ENVDD

47K
Q6
DTC124EK

LCDVDD

R76
4.7K

22K

C71

22K

.1UF

DTC124EK

D11 RB717F

C90
4.7UF_1206
10V

20

BKOFF#

5,21

ENVEE

ENVEE

22K

22K

BLON#

BLON#

DISPOFF#

DISPOFF#

ENVDD

C100
1000PF

Q13

R84

Q8
2N7002

R101
200K

R83
10K

12

100

C24

220PF

Q11

2
G

2N7002

JP9
CRT-15P

15PF

C398
15PF

C8
15PF

+12VS
+5VS
R32
100K

R65
2K

R44
2K

100K

DDC_DATA
G

1
C33
220PF

DDC_CLK

C43
220PF
C403
@100PF

Q3
2N7002

PROPRIETARY NOTE

Compal Electronics, Inc.


Title

C4
68PF

C397
68PF

1
2
CHB1608U121

2N7002
2

+12VS

L3

R28

Q2

1
3
Q4
2N7002

Q50

VSYNC1

L42
1
2
CHB1608U121

3
2N7002

18PF

CRT_VCC
C13

HSYNC1

1
5

18PF

C14

18PF

C399

C7

R9
75

1
R336
75

R11
75

1
2
FCM2012C80_0805
L41
1
2
FCM2012C80_0805
L1
1
2
FCM2012C80_0805

L2
5

6
11
1
7
12
2
8
13
3
9
14
4
10
15
5

C402
.1UF

DAN217

DAN217

DAN217

RB491D

F1

FUSE_1A

1 1

D41

+5VS
2

D5

D40

D4

+5VS

CRT Connector

T H I S S H E E T OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Size
T R A D E S E C RET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
D E P A R T M E N T EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
U S E D B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
C

SCHEMATIC, M/B LA-1281


Document Number

401202

, 04, 2002

Sheet

Rev
2A
14

of

34

S1_IOWR#
S1_IORD#
S1_OE#
S1_CE2#

S1_IOWR#
S1_IORD#
S1_OE#
S1_CE2#

16
16
16
16

S1_A[0..25]
S1_D[0..15]

+3V

16
16

+3VS
CBRST#

S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3

+3VS

S1_A[0..25]
S1_D[0..15]

16,23,28

S1_VCC

79
134
180

U26

124
122
121
120
119
116
113
111
109
107
105
103
102
100
99
83
81
80
78
77
75
74
73
71
68
67
66
65
64
63
62
59
A_D10/CAD31
A_D9/CAD30
A_D1/CAD29
A_D8/CAD28
A_D0/CAD27
A_A0/CAD26
A_A1/CAD25
A_A2/CAD24
A_A3/CAD23
A_A4/CAD22
A_A5/CAD21
A_A6/CAD20
A_A25/CAD19
A_A7/CAD18
A_A24/CAD17
A_A17/CAD16
A_IOWR/CAD15
A_A9/CAD14
A_IORD#/CAD13
A_A11/CAD12
A_OE#/CAD11
A_CE2#/CAD10
A_A10/CAD9
A_D15/CAD8
A_D7/CAD7
A_D13/CAD6
A_D6/CAD5
A_D12/CAD4
A_D5/CAD3
A_D11/CAD2
A_D4/CAD1
A_D3/CAD0

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

CORE_VCC
CORE_VCC
CORE_VCC

4
5
7
8
9
10
11
12
16
17
18
19
20
22
23
24
38
39
40
41
42
43
45
46
48
49
51
52
53
54
55
56

PCI_VCC
PCI_VCC
PCI_VCC
PCI_VCC

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

AUX_VCC

AD[0..31]

6
21
37
50

5,9,23,28

127

GRST#
A_SKT_VCC
A_SKT_VCC
A_REG#/CCBE3#
A_A12/CCBE2#
A_A8/CCBE1#
A_CE1#/CCBE0#
A_A16/CCLK
A_A23/CFRAME#
A_A15/CIRDY#
A_A22/CTRDY#
A_A21/CDEVSEL#
A_A20/CSTOP#
A_A13/CPAR
A_A14/CPERR#
A_WAIT#/CSERR#
A_INPACK#/CREQ#
A_WE#/CGNT#
A_RDY_IRQ#/CINT#
A_A19/CBLOCK#
A_WP/CCLKRUN#
A_RST/CRST#
A_R2_D2/RFU
A_R2_D14/RFU
A_R2_A18/RFU
A_VS1/CVS1
A_VS2/CVS2
A_CD1#/CCD1#
A_CD2#/CCD2#
A_BVD2/CAUDIO
A_BVD1/CSTSCHG

117
98
60
112
97
82
70
93
96
95
94
92
90
84
86
108
110
89
91
88
125
106
123
69
85
76
104
61
126
114
118

C246

C244

C247

.1UF

.1UF

.1UF

S1_A12
S1_A8
R208 1

S1_A23
S1_A15
S1_A22
S1_A21
S1_A20
S1_A13
S1_A14

2 33

S1_REG#

16

S1_CE1#
S1_A16

16

S1_WAIT# 16
S1_INPACK#
16
S1_WE#
16
S1_RDY#
16

S1_A19
S1_D2
S1_D14
S1_A18

S1_WP
S1_RST

16
16

S1_VS1
S1_VS2
S1_CD1#
S1_CD2#
S1_BVD2
S1_BVD1

16
16
16
16
16
16

S2_BVD1
S2_BVD2
S2_CD2#
S2_CD1#
S2_VS2
S2_VS1

16
16
16
16
16
16

S2_RST
S2_WP

16
16

www.kythuatvitinh.com
205
206

IRQ5/SERIRQ#
IRQ7/SIN#/B_VPP_PGM

14
26
28
44
57
101
129
177
1

S2_D10
S2_D9
S2_D1
S2_D8
S2_D0
S2_A0
S2_A1
S2_A2
S2_A3
S2_A4
S2_A5
S2_A6
S2_A25
S2_A7
S2_A24
S2_A17

+3VS
C321
.1UF

C341
.1UF

C301
.1UF

B_SKT_VCC
B_SKT_VCC
B_SKT_VCC

147
157
173
188
143
160
200

OZ6933TQFP

S2_A18
S2_D14
S2_D2
S2_A19

S2_A14
S2_A13
S2_A20
S2_A21
S2_A22
S2_A15
S2_A23

1
R291

S2_RDY#
16
S2_WE#
16
S2_INPACK#
16
S2_WAIT# 16

2
33

S2_A8
S2_A12

S2_A16
S2_CE1#

16

S2_REG#

16

S2_VCC
C340

C345

C310

.1UF

.1UF

.1UF

C302
4.7UF_10V_0805

B_CE1#/CCBE0#
B_A8/CCBE1#
B_A12/CCBE2#
B_REG#/CCBE3#

192
190
202
136
179
152
161
145
198
182
201
164
167
165
186
184
162
159
166
168
170
171
172
169

S2_A10
S2_D15
S2_D7
S2_D13
S2_D6
S2_D12
S2_D5
S2_D11
S2_D4
S2_D3

10,12 SIRQ

IRQ12/PME#
IRQ14/CLKRUN#
IRQ15/RI_OUT#
SPKR_OUT#
LEDO#/SKTA_ACTV
IRQ11/SKTB_ACTV

S2_A11

163
208
72
128
133
193

S2_A9

21
PCM_PME#
5,9,12,23,28 CLKRUN#
23
PCM_RI#
26
PCM_SPK#
21
PCM1_LED
21
PCM2_LED

B_BVD1/CSTCHG
B_BVD2/CAUDIO
B_CD2#/CCD2#
B_CD1#/CCD1#
B_VS2/CVS2
B_VS1/CVS1
B_R2_A18/RFU
B_R2_D14/RFU
B_R2_D2/RFU
B_RST/CRST#
B_WP/CCLKRUN#
B_A19/CBLOCK#
B_RDY_IRQ#/CINT#
B_WE#/CGNT#
B_INPACK#/CREQ#
B_WAIT#/CSERR#
B_A14/CPERR#
B_A13/CPAR
B_A20/CSTOP#
B_A21/CDEVSEL#
B_A22/CTRDY#
B_A15/CIRDY#
B_A23/CFRAME#
B_A16/CCLK

IDSEL
PCI_CLK
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PERR#
SERR#
PCI_REQ#
PCI_GNT#
IRQ9/INTA#
IRQ4/INTB#/A_VPP_PGM
LOCK#
RST#

GND
GND
GND
GND
GND
GND
GND
GND

CardBus Controller
OZ6933T (TQFP)

B_D10/CAD31
B_D9/CAD30
B_D1/CAD29
B_D8/CAD28
B_D0/CAD27
B_A0/CAD26
B_A1/CAD25
B_A2/CAD24
B_A3/CAD23
B_A4/CAD22
B_A5/CAD21
B_A6/CAD20
B_A25/CAD19
B_A7/CAD18
B_A24/CAD17
B_A17/CAD16
B_IOWR#/CAD15
B_A9/CAD14
B_IORD#/CAD13
B_A11/CAD12
B_OE#/CAD11
B_CE2#/CAD10
B_A10/CAD9
B_D15/CAD8
B_D7/CAD7
B_D13/CAD6
B_D6/CAD5
B_D12/CAD4
B_D5/CAD3
B_D11/CAD2
B_D4/CAD1
B_D3/CAD0

C326
@10PF

15
1
31
27
29
30
32
35
33
34
3
2
203
204
58
207

C/BE3#
C/BE2#
C/BE1#
C/BE0#

199
197
196
195
194
191
189
187
185
183
181
178
176
175
174
158
156
155
154
153
151
150
149
148
144
142
141
140
139
138
137
135

R283
@33

R269
100
1
2
PCLK_PCM

5,9,23,28 AD15
11
PCLK_PCM
5,9,12,23,28 DEVSEL#
5,9,12,23,28 FRAME#
5,9,12,23,28 IRDY#
5,9,12,23,28 TRDY#
5,9,12,23,28 STOP#
5,9,12,23,28 PAR
12,23,28 PERR#
5,9,12,23,28 SERR#
5
REQ#3
5
GNT#3
5,9,12 PIRQA#
9,12,23 PIRQB#
5,12 PLOCK#
5,9,13,16,19,23,28
PCIRST#

13
25
36
47

IRQ3/A_VCC_3#
SCLK/A_VCC_5#
SDATA/B_VCC_3#
SLATCH/SMBCLK/B_VCC_5#
IRQ9/A_VPP_VCC_PGM
IRQ10/B_VPP_VCC_PGM

PCLK_PCM

C/BE#3
C/BE#2
C/BE#1
C/BE#0

87
132
131
130
115
146

5,9,23,28
5,9,23,28
5,9,23,28
5,9,23,28

+3V
+3VS
C258
.1UF

C245
.1UF

C261
.1UF

C291

C282
.1UF

SLATCH
SLDATA
RTCCLK

16
16
9,16

.1UF

S2_CE2#
S2_OE#
S2_IORD#
S2_IOWR#

S2_CE2#
S2_OE#
S2_IORD#
S2_IOWR#

S2_A[0..25]
S2_D[0..15]

S2_A[0..25]
S2_D[0..15]

16
16
16
16
16
16
Title

T H I S S H E E T OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
T R A D E S E C RET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
D E P A R T M E N T EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
U S E D B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Size
Custom
Date:

Compal Electronics, Inc.


SCHEMATIC, M/B LA-1281
Document Number

401202

, 04, 2002

Sheet

Rev
2A
15

of

34

PCMCIA POWER CTRL.

Wire ZV PORT to Slot A

+ 3 V + 5 V +12V

S1_VPP

1
1
1
1
1
1

7
24

2 C356
.1UF
2 C357
.1UF
2 C395
.1UF
2 C370
.1UF
2 C381
.1UF
2 C382
.1UF

1
2
30

21

15
16
17
15
15
9,15

3
5
4

SLDATA
SLATCH
RTCCLK

13
19
18

OCCB#
+3V

12V
12V
5V
5V
5V
3.3V
3.3V
3.3V

BVPP
BVCC
BVCC
BVCC
RESET
RESET#

DATA
LATCH
CLOCK
APWR_GOOD#
BPWR_GOOD#
OC#

NC
NC
NC
NC
GND

23
20
21
22

15
15

4.7UF_10V_0805

S2_VPP

S2_VCC

C394
15

4.7UF_10V_0805

CBRST#

S1_BVD1

15

S1_BVD2

15

S1_REG#

15

12

15

TPS2206AI/TPS2216

R314
100K

S1_CD2#
S1_WP

S2_VPP

W=40mils

6
14
26
27
28
29

JP19

C354
2

C355
2 1UF_25V_0805

AVPP
AVCC
AVCC
AVCC

S1_VCC

VCC_5V

8
9
10
11

25

S1_VPP

W=40mils

U36

CARDBUS
SOCKET

S1_INPACK#
S1_WAIT#

15

S1_RST

15

S1_VS2

S1_CD2#
S1_WP
S1_D10
S1_D2
S1_D9
S1_D1
S1_D8
S1_D0
S1_BVD1
S1_A0
S1_BVD2
S1_A1
S1_REG#
S1_A2
S1_INPACK#
S1_A3
S1_WAIT#
S1_A4
S1_RST
S1_A5
S1_VS2
S1_A6
S1_A25
S1_A7
S1_A24
S1_A12
S1_A23
S1_A15
S1_A22

A77
A76
A75
A74
A73
A72
A71
A70
A69
A68
A67
A66
A65
A64
A63
A62
A61
A60
A59
A58
A57
A56
A55
A54
A53
A52
A51
A50
A49
A48
A47
A46
A45
A44
A43
A42
A41
A40
A39
A38
A37
A36
A35
A34
A33
A32
A31
A30
A29
A28
A27
A26
A25
A24
A23
A22
A21
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1

a68
a34
a67
a33
GND
a66
a32
a65
a31
a64
a30
a63
GND
a29
a62
a28
a61
a27
a60
a26
GND
a59
a25
a58
a24
a57
a23
a56
GND
a22
a55
a21
a54
a20
a53
GND
a19
a52
a18
a51
a17
a50
a16
a49
a15
a48
a14
a47
a13
GND
a46
a12
a45
a11
a44
GND
a10
a43
a9
a42
a8
GND
a41
a7
a40
a6
a39
a5
GND
a38
a4
a37
a3
a36
a2
a35
a1

b68
b34
b67
b33
GND
b66
b32
b65
b31
b64
b30
b63
GND
b29
b62
b28
b61
b27
b60
b26
GND
b59
b25
b58
b24
b57
b23
b56
GND
b22
b55
b21
b54
b20
b53
GND
b19
b52
b18
b51
b17
b50
b16
b49
b15
b48
b14
b47
b13
GND
b46
b12
b45
b11
b44
GND
b10
b43
b9
b42
b8
GND
b41
b7
b40
b6
b39
b5
GND
b38
b4
b37
b3
b36
b2
b35
b1

B77
B76
B75
B74
B73
B72
B71
B70
B69
B68
B67
B66
B65
B64
B63
B62
B61
B60
B59
B58
B57
B56
B55
B54
B53
B52
B51
B50
B49
B48
B47
B46
B45
B44
B43
B42
B41
B40
B39
B38
B37
B36
B35
B34
B33
B32
B31
B30
B29
B28
B27
B26
B25
B24
B23
B22
B21
B20
B19
B18
B17
B16
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1

S2_CD2#
S2_WP
S2_D10
S2_D2
S2_D9
S2_D1
S2_D8
S2_D0
S2_BVD1
S2_A0
S2_BVD2
S2_A1
S2_REG#
S2_A2
S2_INPACK#
S2_A3

S2_CD2#
S2_WP

15
15

S2_BVD1

15

S2_BVD2

15

S2_REG#

15

S2_INPACK#

S2_WAIT#
S2_A4
S2_RST
S2_A5
S2_VS2
S2_A6
S2_A25

15

S2_WAIT#

15

S2_RST

15

S2_VS2

15

S2_A7
S2_A24
S2_A12
S2_A23
S2_A15
S2_A22

www.kythuatvitinh.com
S1_A16

S1_VPP

S1_VCC

S1_A[0..25]
S1_D[0..15]
S2_A[0..25]
S2_D[0..15]

S1_A[0..25]
S1_D[0..15]
S2_A[0..25]
S2_D[0..15]

S1_RDY#

15

S1_WE#

C293

C300

.01UF

1UF_25V_0805

PCIRST#

+3V POWER

S1_VPP

C299

.01UF

1UF_25V_0805

C292

S1_VCC

CBRST#

15,23,28

10K

+3V

W=30mils

CBRST#

R262

U28A
74LVC125

20

5,9,13,15,19,23,28

W=30mils

S2_VPP

PCMRST#

14

+3V

S1_CD1#
1
1000PF

C494
2

C468
S1_CD2#
1
2
1000PF
C493
S2_CD1#
1
2
1000PF
C467
S2_CD2#
1
2

C308

C305
1000PF

.1UF
2

56PF

C312

C322
10UF_1206

1000PF

15

S1_IOWR#

15

S1_IORD#

15
15
15

S1_VS1
S1_OE#
S1_CE2#

15

S1_CE1#

15

S1_CD1#

S1_A17
S1_A8
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_VS1
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_CE1#
S1_D14
S1_D7
S1_D13
S1_D6

S1_D12
S1_D5
S1_D11
S1_D4
S1_CD1#
S1_D3

S2_VPP

S2_VCC

S2_A21
S2_RDY#
S2_A20
S2_WE#
S2_A19
S2_A14
S2_A18
S2_A13

S2_A17
S2_A8
S2_IOWR#
S2_A9
S2_IORD#

S2_RDY#

15

S2_WE#

15

S2_IOWR#

S2_A11
S2_VS1
S2_OE#
S2_CE2#
S2_A10
S2_D15
S2_CE1#
S2_D14
S2_D7
S2_D13
S2_D6
S2_D12
S2_D5
S2_D11
S2_D4
S2_CD1#
S2_D3

15

S2_IORD#

15

S2_VS1
S2_OE#
S2_CE2#

15
15
15

S2_CE1#

15

S2_CD1#

15

PCMC154PIN

S2_VCC

C306
.1UF

C313
1000PF

Compal Electronics, Inc.


C309
C323
10UF_1206 56PF
2

15
15
15
15

15

S1_A21
S1_RDY#
S1_A20
S1_WE#
S1_A19
S1_A14
S1_A18
S1_A13

S2_A16

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN C.

Size
B
Date:

SCHEMATIC, M/B LA-1281


Document Number

401202

, 04, 2002

Sheet

Rev
2A
16

of

34

IDE Series Resistor


Place them close SB

10
9

SDD[0..15]
PDD[0..15]

SDD[0..15]
PDD[0..15]

18
19

SBD[0..15]
PBD[0..15]

SBD[0..15]
PBD[0..15]

RP89
PDD8
PDD9
PDD10
PDD11
PDD7
PDD6
PDD5
PDD4

16
15
14
13
12
11
10
9

1
2
3
4
5
6
7
8

PBD8
PBD9
PBD10
PBD11
PBD7
PBD6
PBD5
PBD4

10,12

IRQ14

PDDREQ

PDDREQ

R331

IIRQ14

IIRQ14

19

PBDREQ

19

PBIORDY

19

82
2

82

16P8R-33
9

RP93
PDD12
PDD13
PDD14
PDD15
PDD3
PDD2
PDD1
PDD0

R232

16
15
14
13
12
11
10
9

1
2
3
4
5
6
7
8

PDIORDY

PBD12
PBD13
PBD14
PBD15
PBD3
PBD2
PBD1
PBD0

R329

R328
1

+5VS
R330
1

16P8R-33

PBIORDY

16
15
14
13
12
11
10
9

SDD7
SDD6
SDD5
SDD4
SDD3
SDD2
SDD1
SDD0

16
15
14
13
12
11
10
9

RP64

1
2
3
4
5
6
7
8

SBD15
SBD14
SBD13
SBD12
SBD11
SBD10
SBD9
SBD8

1
2
3
4
5
6
7
8

SBD7
SBD6
SBD5
SBD4
SBD3
SBD2
SBD1
SBD0

4
3
2
1

S_DA2
S_DA0
S_DCS3#
S_DCS1#

16P8R-33

82
2

SDD15
SDD14
SDD13
SDD12
SDD11
SDD10
SDD9
SDD8

PBIORDY

1K
2 PDDREQ

4.7K

RP70

16P8R-33

RP95
9
9
9

PDCS3#
PDA0
PDCS1#

PDA1

8
7
6
5

1
2
3
4

PCS3#
PBA0
PCS1#

PCS3#
PBA0
PCS1#

19
19
19

PBA1

PBA1

19

9
9
9
9

8P4R-33
1 R332
33

5
6
7
8

SDA2
SDA0
SDCS3#
SDCS1#
SDA1

R298

RP85

8P4R-33

2 33 S_DA1

S_DA2
S_DA0
S_DCS3#
S_DCS1#

18
18
18
18

S_DA1

18

RP94

www.kythuatvitinh.com
9
PDIOW#
9
PDIOR#
9 PDDACK#
9
PDA2

8
7
6
5

1
2
3
4

8P4R-22

PBDIOW#
PBDIOR#
PBA2

PBDIOW#
PBDIOR#
PBDACK#
PBA2

19
19
19
19

9
9
9

SDIOR#
SDDACK#
SDIOW#

SDDACK#

8
7
6
5

RP88

1
2
3
4

S_DIOR#
S_DDACK#
S_DIOW#

S_DIOR#
S_DDACK#
S_DIOW#

18
18
18

8P4R-22

Compal Electronics, Inc.


Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN C.

Size
B
Date:

SCHEMATIC, M/B LA-1281


Document Number

401202

, 04, 2002

Sheet

Rev
2A
17

of

34

R93

+5VCD

CD_SIORDY

+5VOZ

CDD[0..15]

CDD[0..15]

SBD[0..15]

SBD[0..15]

19

SBD0
SBD1
SBD2
SBD3
SBD4
SBD5
SBD6
SBD7
SBD8
SBD9
SBD10
SBD11
SBD12
SBD13
SBD14
SBD15

R88
SDDREQ

2
4.7K

+5VOZ

76
78
81
83
86
90
95
97
2
4
8
11
15
18
20
22

17
17
17

S_DA0
S_DA1
S_DA2

S_DA0
S_DA1
S_DA2

68
70
66

17
17

S_DCS1#
S_DCS3#

S_DCS1#
S_DCS3#

63
61

17
17

S_DIOR#
S_DIOW#
R92

S_DIOR#
S_DIOW#

99
6
72
93

SDIORDY

2 82

VDD

8P4R-10K

1
L14
1
L13

C57
.1UF

C28
.1UF

C53
.1UF

2
CHB1608U301
2
CHB1608U301+5VCD

C68
.1UF

17

U2
OZ163

58

+5VCD

44

8
7
6
5

8P4R-10K
RP12
1
2
3
4

2
1K

VDD

INTN
GPIO_1
GPIO_0

1
2
3
4

8
7
6
5

+5VCD

VDD

MODE1
CDASPN
CD_IRQ
ISCDROM

RP21

HDD0
HDD1
HDD2
HDD3
HDD4
HDD5
HDD6
HDD7
HDD8
HDD9
HDD10
HDD11
HDD12
HDD13
HDD14
HDD15

CDD0
CDD1
CDD2
CDD3
CDD4
CDD5
CDD6
CDD7
CDD8
CDD9
CDD10
CDD11
CDD12
CDD13
CDD14
CDD15

HDA0
HDA1
HDA2

CDA0
CDA1
CDA2

HCS0
HCS1

CCS0
CCS1

HDIOR#
HDIOW#
HIOCS16#
HIORDY

CDIOR#
CDIOW#
CIOCS16#
CIORDY

HINTRQ
HDMARQ
HDMACK#

CHINTRQ
CDMARQ
CHDMACK#

HRESET#
HDASPN

CRESET#
CDASPN

77
79
82
84
87
91
96
98
1
3
7
10
14
17
19
21

CDD0
CDD1
CDD2
CDD3
CDD4
CDD5
CDD6
CDD7
CDD8
CDD9
CDD10
CDD11
CDD12
CDD13
CDD14
CDD15

69
71
67

CD_SBA0
CD_SBA1
CD_SBA2

CD_SBA0
CD_SBA1
CD_SBA2

64
62

CD_SCS1#
CD_SCS3#

CD_SCS1#
CD_SCS3#

19
19

100
5
73
94

CD_SIOR#
CD_SIOW#
CIOCS16#
CD_SIORDY

CD_SIOR#
CD_SIOW#

19
19

CD_SIORDY

19
19
19

19

www.kythuatvitinh.com
10,12 IRQ15
9
SDDREQ
17
S_DDACK#

X1

OSC2

8MHZ
R43

19

SDDREQ
S_DDACK#

SIDERST#

R41

1
1

2 33
2 82

2
33

24
59
48
53
55
50
46

1M

C42
10PF

10UF_1206

2,20,24

SMC

+5VALW

+5VALW

26
27

OSC1
OSC2

31
32

100K

ISCDROM

GPIO[1]/VOL_UP
GPIO[0]/VOL_DN

PCSYSTEM_OFF
INTN
RESET#

MODE0
MODE1

SDATA

PAVMODE

SCLK

CSN
INCN
UDN

OSCI
OSCO

CD_RSTDRV#
CDASPN

47
52
54
49
45

CD_IRQ
CD_DREQ
CD_DACK#

CD_RSTDRV#

+5VCD

19
19
19

REVBTN
FRDBTN
PLAYBTN
STOPBTN

19

+5VCD

8
7
6
5

RP5

51

1
R33
1
R39

80

ISCDROM

39
40

GPIO_1
GPIO_0

56
57

R45
1K
1
2
MODE1

38

1
R22

41
42
43

2
@10K
2
10K

+5VCD

CDD7
CDD6
CDD5
CDD4
CDD3
CDD2
CDD1
CDD0

1
2
3
4
5
6
7
8

CDD8
CDD9
CDD10
CDD11
CDD12
CDD13
CDD14
CDD15

8
7
6
5
4
3
2
1

RP23

1
2
3
4

240K
2

C137

S
S
S
G
SI4425DY

2
10K

16P8R_4.7K

+5VCD

R85
100K

+5VCD

8
7
6
5

C58
10UF_1206

.1UF

R71
100K

C66

DM_ON#

R114

10K

DM_ON
SUSP#

DM_ON

Q7

DM_ON#

26

9
10
11
12
13
14
15
16

CD_DREQ

DM_ON

5.6K

26

Q14

CIOCS16#

2N7002

1
R72

2
47K

+5VCD

2N7002
3

1UF_0805

D
D
D
D

+5VCD

16
15
14
13
12
11
10
9

16P8R_4.7K
RP15

R51
U5

1
2
3
4

8P4R-10K

C136
1UF_0805
+5VALW
R113
1

29
25
30

C138
10UF_1206

DM_ON

3
Q15
2N7002

Q12
2N7002

R116
1

+12VS

INTN

SMD

1N4148
2,20,24

R42

CD_INTA#

PWR_CTL

23
60

D9

21

PAV_EN
PLAY/PAUSE
FFORWARD
REWIND
STOP/EJECT

CD_IRQ
CD_DREQ
CD_DACK#

GND
GND
GND
GND
GND

10K

28
36
35
34
37

SSYNC
SBIT_CLK
SDATA_OUT
SDATA_IN
SACRSTN

16
33
65
85
92

C15
R29
1

+5VCD

DM_ON
PLAYBTN
FRDBTN
REVBTN
STOPBTN

PLAYBTN
FRDBTN
REVBTN
STOPBTN

26
26
26
26

HSYNC
HBIT_CLK
HDATA_OUT
HDATA_IN
HACRSTN

75
13
89

C29
10PF

74
12
88

OSC1

R86
R87

SUSP#

22K

22K

22K
Q20
DTC124EK

22K

SUSP#

20,22,31,32

Q16
DTC124EK

CDPLAY

Compal Electronics, Inc.


CD_PLAY

21

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN C.

Size
B
Date:

SCHEMATIC, M/B LA-1281


Document Number

401202

, 04, 2002

Sheet

Rev
2A
18

of

34

IDE,CD-ROM & FDD Module CONN.


HDSEL#
RDATA#
WP#
TRACK0#
C498

1
2
3
4

RP99

+5VS

Place component's closely FDD CONN.

+5VS

10

JP22

17
17
17
17
17
17
17
17
17
21

PBDREQ
PBDIOW#
PBDIOR#
PBIORDY
PBDACK#
IIRQ14
PBA1
PBA0
PCS1#
PHDD_LED#

PIDERST#
PBD7
PBD6
PBD5
PBD4
PBD3
PBD2
PBD1
PBD0

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43

IIRQ14
PBA1
PBA0
PCS1#
DASP#

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44

PBD8
PBD9
PBD10
PBD11
PBD12
PBD13
PBD14
PBD15

PCSEL

R322

1
470

FDDIR#
STEP#
WDATA#
WGATE#

+5VS

10P8R-1K

10,21

5
4
3
2
1

.1UF

1UF_25V_0805

10

10K

6
7
8
9
10

+5VS

DRV0#

1K

+5VS

PBD[0..15]
CDD[0..15]

PBD[0..15]
CDD[0..15]

R324
1

MTR0#
DSKCHG#
INDEX#

8P4R_1K

C497

R376
17
18

RP100

8
7
6
5

10UF_1210

1000PF

Place component's closely H DD CONN.

C500

C499

.1UF
2

1UF_25V_0805

C386

C388

10UF_1210

1000PF

C385

C387

+5VS

+5VS

INDEX#

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
85201-2605

DRV0#

DRV0#

DSKCHG#

DSKCHG#

MTR0#

10

MTR0#

10
10
10

FDDIR#
3MODE#
STEP#

10

WDATA#

10

WGATE#

WGATE#

10

TRACK0#

TRACK0#

10

WP#

FDDIR#
3MODE#
STEP#
WDATA#

WP#

10

RDATA#

RDATA#

10

HDSEL#

HDSEL#

JP7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

INDEX#

www.kythuatvitinh.com
+5VS

1
R326

+5VS

2
100K

PBA2
PCS3#

PBA2
PCS3#

17
17

+5VS

+5VS

HDD 44P

R325

100K

PCIRST#

10

PHDRST#

D24 RB717F

PIDERST#

+5VS

1
R98

2 SHDD_LED#
100K

R107
470

CDROM_R

R235

26

CDD8
CDD9
CDD10
CDD11
CDD12
CDD13
CDD14
CDD15

100K

5,9,13,15,16,23,28
10

+5VCD
1

C85

.1UF

+5VCD

SIDERST#

SIDERST#

18

+5VCD

W=80mils

C86
1000PF

C115
10UF_1210

C97

C112

1UF_25V_0805

.1UF
2

R80

W=80mils

PDIAG#

SHDRST#

PCIRST#

18
18

CD_DACK#
18
100K
+5VCD
CD_SBA2
18
CD_SCS3#
18

CD_DREQ
CD_SIOR#

PCIRST#

D26 RB717F

Place component's closely CD-ROM CONN.

CD-ROM CONN.

Compal Electronics, Inc.

+5VCD

+5VCD

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50

SHDD_LED#

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49

CD_SIOW#
CD_SIORDY
CD_IRQ
CD_SBA1
CD_SBA0
CD_SCS1#
SHDD_LED#

CD_RSTDRV#
CDD7
CDD6
CDD5
CDD4
CDD3
CDD2
CDD1
CDD0

18
18
18
18
18
18
21

2
10K

JP14
26
CDROM_L
26
CD_AGND
18 CD_RSTDRV#1
R60

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN C.

Size
B
Date:

SCHEMATIC, M/B LA-1281


Document Number

401202

, 04, 2002

Sheet

Rev
2A
19

of

34

R192

14
10,12

IRE

IRD

Development

2
G
3

MEMW#

10,12

AEN
IOR#
IOW#
IOCHRDY

10
10,12
10,12
10,12

1
2
43
44
45
46
87
88
1

Extend access until completed

+3V

1K

6 EXTSMI#

EXTSMI#

+3V POWER

U21
ATFOUT#

D0
D1
D2
D3
D4
D5
D6
D7

114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
135

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17

137
138
139
140
141
142
143
144

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

111
105
112

HDEN#
HRMS#

110
107
106
113

SELIO#
VGASUSP#_1
PCMRST#
ATFOUT#

U34C
74LVC125

10

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13/BE0
A14/BE1
A15/PG1
A16/PA5
A17/PA6

HRMS#

Reset host when shared


m e m o r y a c c e s s can not
be completed

ECSMI#

NC
NC
NC
NC
NC
NC
NC
NC

HD0
HD1
HD2
HD3
HD4
HD5
HD6
HD7

(P105)

R304
U34B
74LVC125

8 ATFINT#

ATF_INT#

+3V

+3V POWER

VGASUSP#_1

Mode

2
+3V POWER

R302

U34D
74LVC125

12

10K

11

VGASUSP

ENV1
(P103)

U31A

2
G
D

157
162
163
13
158
159
14

15
16
17
18
19
20
21
22

166
167
168
169
170
171
172
173
174
3
4
5
6
7
8
9
10
11

AGND
ENV0
(P104)

MEMR#

SYSON

Q38
2N7002

2
92

91
80

Environment

10

74LVC14

HRMS#(Host Reset Mode Select)

KBSOUT0
KBSOUT1
KBSOUT2
KBSOUT3
KBSOUT4
KBSOUT5
KBSOUT6
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12
KBSOUT13
KBSOUT14
KBSOUT15

BIOSCS#

.1UF

13

56
55
54
53
52
51
50
49
48
47
42
41
40
39
38
37

HMEMCS#/PA0
HMEMRD#/PA1
HMEMWR#/PA2
HAEN/FXASTB#
HIOR#
HIOW#
HIOCHRDY

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

1
Q39
2N7002

HA0
HA1
HA2
HA3
HA4
HA5
HA6
HA7
HA8
HA9
HA10
HA11
HA12
HA13
HA14
HA15
HA16/PA3
HA17/PA4

36
35
34
33
32
31
30
29

AVCC
AVREF

VCC
VCC
VCC
VCC

23
67
108
161

2
24
26
66
109
160

GND
GND
GND
GND
GND
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

C228
.1UF

1000PF

51AVCC

CHB1608U800

ECAGND

C243

C289
.1UF

1000PF

C251

L29

C348

100K

+3V

+12VS

SD7
SD6
SD5
SD4
SD3
SD2
SD1
SD0

.1UF

C205

SA17
SA16
SA15
SA14
SA13
SA12
SA11
SA10
SA9
SA8
SA7
SA6
SA5
SA4
SA3
SA2
SA1
SA0

.1UF

C253

+3VALW

1
R178
1

2
G

L33
2

@CHB1608U800

+3VALW

2N7002
Q31
D

KBA[0..18]
ADB[0..7]
SA[0..18]
SD[0..7]
KSI[0..7]
KSO[0..15]

21
KBA[0..18]
21
ADB[0..7]
10,12
SA[0..18]
10,12
SD[0..7]
21 KSI[0..7]
21 KSO[0..15]

+3V POWER

+3V

www.kythuatvitinh.com
2

79
165
28

RD#
SEL0#
WR0#

HDEN#(Host Device Enable)

PFAIL#
HPWRON
VBAT

Mode

HDEN#

TRIS(TRI-STATE)

PG0/SELIO#
PG2/CLK
PG3/SEL1#
PG4/WR1#

(P102)

Device are enabled o reset

Normally

Devices are disabled on reset

TriState

PF0/D8
PF1/D9
PF2/D10
PF3/D11
PF4/D12
PF5/D13
PF6/D14
PF7/D15

R231
100K

(P111)

RC#

1 RCL#

RB751V 23

RING#
2,18,24 SMC
2,18,24 SMD
14
INVT_PWM

R258
1

2
22M

R259
51K

C296
10PF

1 1

10K

C290
33PF
+5VALW

FAN_SENSE

R199
2 4.7K

CLK_SMB

DAT_SMB

R193
4.7K

SELIO#

21

PCMRST#

16

PIIX4_LID#
BQ_BATT
SUSA#
SUSB#
SUSC#
SYSON
ACIN
BKOFF#

21
29
9,11
9
9
22
9,26,29
14

51RST

26

89
90
131
132
133
134
175
176

VBATT

ECSMI#

51ON

26

ENV1
ENV0

ACOFF
SUSP#
MMO_ON

30
18,22,31,32
21,22

VOL_DW#
21,26
BATT_CHGI 30
VOL_UP# 21,26
VBATT
29

VBATT
BATT_TEMP
EXT_DATA
EXT_CLK
KBD_DATA
KBD_CLK
PS2_DATA
PS2_CLK

29
25
25
25
25
26
26

BATT_CHGI
BATT_TEMP

R155
47K_1%

RP51

ENV1
KBA15
KBA16
KBA17

10
9
8
7
6

EXT_DATA
EXT_CLK

10
9
8
7
6

1
2
3
4
5

HRMS#
ECSMI#
KBA18
ENV0

10P8R-10K

RP68
+5VS

1
2
3
4
5

KBD_DATA
KBD_CLK
PS2_DATA
PS2_CLK
+5VS

10P8R-10K

C224
C222
C226

.01UF
2

.01UF
2

.01UF
2

1
2
3
4

+3V
ECAGND
+3VALW

30

RP52
10
9
8
7
6

HDEN#
SELIO#

21,26 LID_SW#

OCP

SCI#

+3V POWER

PC87570-176PIN

EN_DFAN#
22
VOL_AMP 26
BNI/ILI#
29

BATT_TEMP
EXT_DATA
EXT_CLK
KBD_DATA
KBD_CLK
PS2_DATA
PS2_CLK

SYSON
ACIN
BKOFF#

21
21
21

10K

SCI#

NC
NC
NC
NC
NC
NC
NC
NC

PH0/BST0
PH1/BST1
PH2/BST2
PH3/PFS#
PH4/PLI#
PH5/ISE#
104
103
102
101
100
99

DA0
DA1
DA2
DA3
95
96
97
98

PD0/AD0
PD1/AD1
PD2/AD2
PD3/AD3
PD4/AD4
PD5/AD5
PD6/AD6
PD7/AD7
81
82
83
84
85
86
93
94

PSCLK1
PSCLK2
PSDAT1
PSDAT2
58
60
57
59

PC0
PC1
PC2
PC3/EXINT0
PC4/EXTINT11
PC5/EXINT15
PC6/PSCLK3
PC7/PSDAT3

9,26
ON/OFF
23
EN_WOL#
9,22 FAN_SENSE
26 NUM_LED#
26 CAPS_LED#
26 ARROW_LED#

X2
32.768KHZ

SA18
KBA18
RING#
CLK_SMB
DAT_SMB
PWM

N3/F5#

164

570SCI#

R173

G20
RCL#

CRY2
2

CRY1

PB0/RING
PB1/SCL
PB2/SDA
PB3/TA
PB4/TB
PB5/GA20
PB6/HRSTO
PB7/SWIN

CRY1
CRY2

10

D18

HMR

+3VALW

RB751V

61
62
63
64
65
68
70
69

1 G20

PE0/HA18
PE1/A18

32KX1
32KX2

D17

71
72
73
74
75
76
77
78

25
27

GATEA20

10

R163
10K
1

R156
10K

12
136

+3VS

145
146
147
148
149
150
151
152

FRD#
FSEL#
FWR#

U34A
74LVC125

ISA Bus Compatible Mode

R303

14

Shared Memories

C377
.1UF

21

CDON#/MAIL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN C.

CDON#

PCMRST#

8
7
6
5

RING#

8P4R_10K
1
2
3
4
5

N3/F5#
BKOFF#
G20
RCL#

R153

+3VALW

@0

10P8R-4.7K

D31

26

RP59

IRQ12

+3VALW
EC_HPOWON

+3V

CDON_BTN#

@RB751V
R188 1 0 K
1
2
EC_HPOWON
+RTCVCC

IRQ1
IRQ8#
IRQ11
IRQ12

156
155
154
153

FXBUSEN#

FX Bus Interface Enabled

10,12

5,9,27

D23

(P130)

Non Shared Memories

IRQ1
IRQ8#

Mode

+3VALW

10,12
9

@10K
1

570SCI#

26

DAN202U

R203

FXBUSEN#(FX Bus Interface Enable)

(P136)
SHBM#(Shared/Non-Shared BIOS Memory)

Compal Electronics, Inc.


Title
Size
B
Date:

SCHEMATIC, M/B LA-1281


Document Number

401202

, 04, 2002

Sheet

Rev
2A
20

of

34

+5VCD
+3VALW

8
7
6
5

1
R95

SELIO#

4
5

CC

20
DD
AA
BB
CC

1
2
3
4

8
7
6
5

R154

20,22

MMO_ON

MMO_ON

D15

PCM_LED

LID_SW#

R140
+5VALW

D12

11
1

VR_ON

LID#

CLK
CLR

+3VALW

RP35

2
4
6
8
11
13
15
17

VCC

4
3
2
1

E_MAIL#
INTERNET#

.1UF
U11

20

8P4R-100K
E_MAIL#
INTERNET#
BUTTON3#
BUTTON4#
ATF#
LID_SW#
ENVEE

20

C191
1
2

1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4

1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4

PIIX4_LID#

LID#

51RING#

26

FSTCHG
30
CD_PLAY
18
S W_CLK/HDD_LED#
26
S W _ DATA/CD_FDD_LED#

26

74HCT273

+5VALW

SMB_SEL# 24
DQ_BATT# 29
MAIL_ACT_LED#

C192
2
.1UF

D16
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

2
5
6
9
12
15
16
19

1UF_25V_0805

RB751V
18
16
14
12
9
7
5
3

Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7

32

D22

+5VALW
5
6
7
8

100K

U10

VCC

AA
LARST#

D0
D1
D2
D3
D4
D5
D6
D7

C194
1
2

20K
2

3
4
7
8
13
14
17
18

@RB751V

R148

DAN202U

26
26
26
26
2
20,26
5,14

SELIO#

U13A
74LVC32

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

20

15 PCM2_LED

RB751V

KBA3

10K
2

+3V

+3VALW

.1UF

74LVC244

D14
15 PCM1_LED

C198
1
2

C193
2

GND

+3VALW

RP37

8P4R_100K

10

14

U13B
74LVC32

1G
2G

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

20

KBA2
SELIO#

1
19

18
16
14
12
9
7
5
3

10

+3VALW

1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4

PX4_RI#

RB751V

+3VALW

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

3
4
7
8
13
14
17
18

BB
LARST#

11
1

D0
D1
D2
D3
D4
D5
D6
D7

U16

VCC

20
PCM_LED
SHDD#

U17
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4

VCC

SHDD_LED#
PHDD_LED#
DRV0#
OCCB#

.1UF

2
4
6
8
11
13
15
17

.1UF

+5VALW

GND

19
19
10,19
16

C204
2

100K
2

VOL_DW#
VOL_UP#
CDON#/MAIL
CD_INTA#
BUTTON_LOCK#

1
2
3
4

20,26
20,26
20
18
26

14

RP55
8P4R-100K

+3VALW

Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7

2
5
6
9
12
15
16
19

PWR_LED#
26
TRICKLE
30

51RING#

BATT_LOW_LED#
PBTN_OUT# 9
LLBATT# 9
BATT_CHGI_LED#
BEEP#
26

26

11

DD

FRD#
KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3
ADB2
ADB1
ADB0
KBA0
KBA1
KBA2
KBA3

KBA[0..18]
ADB[0..7]

@29F040
KBA[0..18]
ADB[0..7]

GND

10

15

PCM_PME#

23

MDMPME#
+12V

1
R139

2
100K

Q25
2N7002
3

1394_PME#

R143
10K

KSI[0..7]
KSO[0..15]

KSI[0..7]
KSO[0..15]

JP6
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

2
100K
Q24
2N7002

28

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

FRD#
KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3
ADB2
ADB1
ADB0
KBA0
KBA1
KBA2
KBA3

FRD#

20

FSEL#

20

PME#

PME#

23

+3VALW

+3VALW

R141
R144
100K

FWE#

U15
7SH32FU

2N7002

100K
Q26
3

2
G

OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
VSS
DQ2
DQ1
DQ0
A0
A1
A2
A3

KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4

A11
A9
A8
A13
A14
A17
WE#
VCC
A18
A16
A15
A12
A7
A6
A5
A4

1
R142

For Test Only(PLCC


Socket)

U8
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

+12V

FWE#
KBA17
KBA14
KBA13
KBA8
KBA9
KBA11
FRD#
KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3

KBA11
KBA9
KBA8
KBA13
KBA14
KBA17
FWE#

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

VCC
WE*
A17
A14
A13
A8
A9
A11
OE*
A10
CE*
DQ7
DQ6
DQ5
DQ4
DQ3

+3VALW

NC
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS

@29F040

SST39VF040_TSOP
2

.1UF

20
20

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

U9

KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1
KBA0
ADB0
ADB1
ADB2

C199

OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
VSS
DQ2
DQ1
DQ0
A0
A1
A2
A3

+3VALW

KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4

A11
A9
A8
A13
A14
A17
WE#
VCC
A18
A16
A15
A12
A7
A6
A5
A4

74HCT273

+12VS

20
20

KSI1
KSI7
KSI6
KSO9
KSI4
KSI5
KSO0
KSI2
KSI3
KSO5
KSO1
KSI0
KSO2
KSO4
KSO7
KSO8
KSO6
KSO3
KSO12
KSO13
KSO14
KSO11
KSO10
KSO15

1
2
3
4
1
2
3
4
1
2
3
4
1
2
3
4
1
2
3
4
1
2
3
4

8
7
6
5
8
7
6
5
8
7
6
5
8
7
6
5
8
7
6
5
8
7
6
5

CP12
8P4C-220PF
CP13
8P4C-220PF
CP14
8P4C-220PF
CP15
8P4C-220PF
CP16
8P4C-220PF
CP17
8P4C-220PF

int. kb-85201-2405
FLASH#

10

FWR#

20

+3VALW

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

CLK
CLR

26

+3VALW

U7

KBA11
KBA9
KBA8
KBA13
KBA14
KBA17
FWE#

10

13

SELIO#

SELIO#

74LVC244

10

14

12

1G
2G

KBA1

1
19

U13D
74LVC32

KBA4

GND

+3VALW

14

www.kythuatvitinh.com
PME#

U13C
74LVC32

Compal Electronics, Inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN C.

Size
B
Date:

SCHEMATIC, M/B LA-1281


Document Number

401202

, 04, 2002

Sheet

Rev
2A
21

of

34

+3V

1
2
3
4

SYSON_ALW
C274

R230

.01UF

@1M

R205

2N7002
Q36

+12VALW

100K

2 SYSON#
+3VS

+5VS

+12VS

+3V

+5V

+5VALW

+12V

+5VALW

D1
S1
D1
G1
D2
S2
D2
G2
8936
C241
10UF_1206
6.3V

U23

8
7
6
5

C271
1UF_0805

+3VALW

C272
10UF_1206
6.3V

5VS_GATE

C284
10UF_1206
6.3V

R276

C307
.01UF

@1M

R307
10K

SUSP#

2
Q43
2N7002

20

SYSON

SYSON

2
Q44
2N7002

SYSON#

Q46
2N7002

SYSON#
1

2 SYSON#
Q42
2N7002

2 SUSP
Q21
2N7002

R308
10K

R320
470
SUSP

2 SUSP
Q48
2N7002

R301
470

Q32
2N7002
2 SYSON#

R215
470

+12VALW
100K
2 SUSP

Q41

2N7002

R270

R120
470

1
2
3
4

Q49
2N7002
2 SUSP

S1
G1
S2
G2

D1
D1
D2
D2
8936

C257
1UF_0805

8
7
6
5

C269
10UF_1206
6.3V

+
U25

R327
470

+3VALW

R323
470

+3VS

+12VALW
+5VALW

+12VALW

www.kythuatvitinh.com
+12VALW

R355
100K

C455
.1UF

C378
1UF_0805

+5V

R358
51K

R360

C456
.1UF

C453
1UF_0805_50V
50V

R356
100K

C452
1UF_0805
50V

C391
4.7UF_1206
16V

+12VALW

Q51
NDS352P
+12V

R357
51K

Q52
NDS352P
+12VS

1
2
3
4

D1
S1
D1
G1
D2
S2
D2
G2
8936
C390
4.7UF_1206
16V

+5VS

8
7
6
5

U37

100K

Q53

18,20,31,32

SUSP#

SUSP#

Q54

2N7002

FAN CONN.

+5VALW
1
2
3
4

+5V
1

+5V

20,21

MMO_ON

C470
.1UF

+2.5V_CLK

E
FAN1

1
D44
1SS355

C471
10UF_1206
JP21
1
2
3
FAN_CON_3P

9,20 FAN_SENSE
D43
1N4148

C163
4.7UF_25V_1206
CC3216

R223

R228
8.2K

Q55
2SC2411K

R371
100

U24B
LM358

2
B

SI2302DS

10K

EN_DFAN#

Q18

Q22
DTC124EK

22K
22K

EN_DFAN#

1
R132
200K

C179
.1UF

Q23
2N7002

2
G

SYSON_ALW
C297
.01UF

100K

R124

16V

20

+2.5VS

100K

C315
1UF_0805

C318
4.7UF_1206

R135

+5VS

U27
D1
S1
D1
G1
D2
S2
D2
G2
8936
C286
4.7UF_1206
16V

+12V

+12VS

8
7
6
5

C454
1UF_1206
25V

2N7002

C371
.01UF

C450
1UF_1206_25V
25V

5VS_GATE

Compal Electronics, Inc.


Title
PROPRIETARY NOTE

T H I S S H E E T OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Size
T R A D E S E C RET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
D E P A R T M E N T EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
U S E D B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
C

SCHEMATIC, M/B LA-1281


Document Number

401202

, 04, 2002

Sheet

Rev
2A
22

of

34

Q10
@SI2301DS

+3VALW

+3.3VAUX

R346

JP11

+3V

1
2
3
4
5
6

C82
@1UF_25V_0805
2

C108
@1UF_25V_0805

RJ11/RJ45

R103
20

EN_WOL#

1
2
3
4
5
6

15

+5VALW

PCM_RI#

MINI_RI#

PCM_RI#

LAN RESERVED

+3VS_MINIPCI
1

+3V

L24

W=40mils9,12,15
5

PIRQB#

PIRQB#

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123

JP17
1
KEY
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123

2
KEY
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

RING#

20

RB717F

@100K

TIP

D13

RING

1
R69
1
R77

MINI_RST#
LAN RESERVED

2
PCIRST#
0
2
@0

PCIRST#

5,9,13,15,16,19,28

CBRST#

15,16,28

+5VS_MINIPCI

W=30mils
PIRQD#

PIRQD#
GNT#0

9,12
5

www.kythuatvitinh.com
12,15,28
5,9,15,28

PERR#
C/BE#1

AD14
AD12
AD10
AD8
AD7

PCLK_MINI
1

AD5
AD3
W=30mils
AD1

+5VS_MINIPCI

12

R79
10

C84
33PF
2

MOD_AUDIO_MON

+5VS

1
L26

MINI_RI#

2 W=30mils
0

AD22
AD20

PAR

5,9,12,15,28

FRAME#
TRDY#
STOP#

5,9,12,15,28
5,9,12,15,28
5,9,12,15,28

DEVSEL#

5,9,12,15,28

IDSEL : AD27

+5VS_MINIPCI

AD15
AD13
AD11

C221
@1000PF

C197
@.1UF

C408
@.1UF

C206
@10UF_1210

AD9
C/BE#0

5,9,15,28

AD6
AD4
AD2
AD0

+3VS_MINIPCI
C152

C93

C423

C413

.1UF

.1UF

.1UF

.1UF

MOD_AUDIO_MON

MD_SPK

26

C67
.1UF

C157
.1UF

C183
.1UF

C177
.1UF

2
0.5_0805

W=20mils

+3.3VAUX

C220
.1UF

Compal Electronics, Inc.


Title

AD[0..31]

AD[0..31]

5,9,15,28

C190
10UF_1210

L27
1

+5VS_MINIPCI

100

AD18
AD16

Mini-PCI SLOT

0603

2 AD27

5,9,12,15,28 CLKRUN#
5,9,12,15,28 SERR#

R105

C/BE#2
IRDY#

AD28
AD26
AD24
MINI_IDSEL

5,9,15,28
5,9,12,15,28

21

AD30

AD17

+3V

CHB1608U121
0603

AD21
AD19

MDMPME#

1
R99

C/BE#3

GNT#1

AD28

5,9,15,28

AD27
AD25
2
100
AD23

GNT#1

AD31
AD29

+3VS_MINIPCI
L25
1
2

REQ#1

W=40mils

+3.3VAUX

PCLK_MINI

W=40mils
MINI_RST#

11

REQ#0

CHB1608U121
0603

PROPRIETARY NOTE

T H I S S H E E T OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Size
T R A D E S E C RET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
D E P A R T M E N T EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
U S E D B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:

SCHEMATIC, M/B LA-1281


Document Number

401202

, 04, 2002

Sheet

Rev
2A
23

of

34

SMD_BATT
SMC_BATT

SMB_SEL
SMB_SEL#

VCC
1Y
2Y
3Y
4Y
NC
NC
GND

16
4
7
10
13
1
9
8

+5VALW

SMD
SMC

SMD
SMC

2,18,20
2,18,20

C202
1
2

+5VALW

R145
100K

.1UF

SMC_EE
SMD_EE

+5VALW

1A
2A
3A
4A
1OE
2OE
3OE
4OE
@QS3125

3
6
11
14
2
5
12
15

29
29

SMD_EE
SMC_EE
SMD_BATT
SMC_BATT

C240
@.1UF

U19

U12
VCC
WC
SCL
SDA
NM24C16

A0
A1
A2
GND

1
2
3
4

R171
@10K

8
7
6
5

+5VALW

21

SMB_SEL#

+5VALW
SMD

SMB_SEL# 2
G

Q29
@2N7002

2
R379
2
R380

SMC

SMD_EE

SMC_EE

SMD_BATT

SMC_BATT

2
R161
2
R160

1
@4.7K
1
@4.7K

2
R200
2
R201

1
@4.7K
1
@4.7K

R146
100K
2

SMB_SEL
D

+5VALW
SMD

2
R381
2
R382

SMC

0
0

www.kythuatvitinh.com
+5V_PRN

PARALLEL PORT

LPTSLCT
LPTPE
LPTBUSY
LPTACK#

10
9
8
7
6

+5V_PRN

RP3
10P8R-2.7K

D6

+5VS

1
2
3
4
5

RB420D

+5V_PRN

10

FD7
FD6
FD5
FD4

LPTSTB#
AFD#/3M#

10

INIT#

+5V_PRN
AFD#/3M#
LPTERR#
LPTINIT#
LPTSLCTIN#

LPTSTB#

10

SLCTIN#

R15
33
R14
33

LPTINIT#

LPTSLCTIN#

10

LPTAFD#

10

LPTERR#

FD0
LPTERR#
FD1
LPTINIT#
FD2
LPTSLCTIN#
FD3
FD4

10
9
8
7
6

FD5
RP4
10P8R-2.7K

1
2
3
4
5

LPD3
LPD2
LPD1
LPD0
LPD7
LPD6
LPD5
LPD4

+5V_PRN
FD3
FD2
FD1
FD0

8
7
6
5

RP96
8P4R-68

FD6
1
2
3
4

8
7
6
5

1
2
3
4

FD3
FD2
FD1
FD0
FD7
FD6
FD5
FD4

FD7
10

LPTACK#

10

LPTBUSY

10
10

LPTPE
LPTSLCT

LPTACK#
LPTBUSY
LPTPE
LPTSLCT

R339
33

R16
33

R338
2.2K

1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9
22
10
23
11
24
12
25
13

C401
220PF

CP8

FD1
LPTERR#
FD0
AFD#/3M#

1
2
3
4

8
7
6
5

LPTACK#
LPTBUSY
LPTPE
LPTSLCT

4
3
2
1

8P4C-220PF
CP11
5
6
7
8

FD3
LPTSLCTIN#
FD2
LPTINIT#

1
2
3
4

8P4C-220PF
CP9
8
7
6
5

FD4
FD5
FD6
FD7

4
3
2
1

8P4C-220PF
CP10
5
6
7
8
8P4C-220PF

JP10
LPTCN-25

RP97
8P4R-68
10

LPD[0..7]

LPD[0..7]

Compal Electronics, Inc.


Title

PROPRIETARY NOTE

T H I S S H E E T OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND Size
T R A D E S E C RET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
D E P A R T M E N T EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
Date:
U S E D B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC, M/B LA-1281


Document Number

401202

, 04, 2002

Sheet

Rev
2A
24

of

34

C436
1000PF

L22
CHB1608U800
1
2

USB_AGND

1
1

1
6

C407
1000PF

R341
560K

C176
220PF

USB0_DUSB0_D+

USB0_DUSB0_D+

1
1

C175
220PF

JP13
1
2
3
4
USB_CONN1

L9
N1608Z301T01
2
2
L8
N1608Z301T01
1

Q19
@SMO5

10
10

L21
CHB1608U800

OVCUR#0

C38
150UF_E

KBD_CLK

KBD_DATA

20

10

C36
.1UF

20

4
2
1
3

C432
220PF

R340
470K

F4
POLYSWITCH_1.1A

JP18
KBD/PS2_6

+5VS

2
L44
CHB1608U800
KB_VCC

F2
POLYSWITCH_0.75A

C440
220PF

EXT_DATA

C447
220PF
2

L45
CHB1608U800
1
2

EXT_DATA

EXT_CLK

USB_VCCA
+5VS

20

EXT_CLK

20

Keyboard CONN.
1

Q17
@SMO5

1
2

C32
.1UF
2

L4
CHB4516G750_1806
4516

www.kythuatvitinh.com
USB_VCCB

+5VS

AGND

MODE0

TXD

MODE1

RXD

FIR_SEL

N.C

IRTXOUT

IRRX

2
10
10

USB1_DUSB1_D+

USB1_DUSB1_D+

1
1

JP15
1
2
3
4
USB_CONN1

L15
N1608Z301T01
2
2
L12
N1608Z301T01

L43
CHB4516G750_1806
4516

@HSDL-3600

C419
.1UF
2

R333
@10K

1/4W

W=40mils

R115
560K

GND

10

C145
1000PF

C396
@10UF 6.3V_A
R2
@4.7_1206

LEDA

USB_BGND

R334
@10K
2
2
@10K

VCC

2
2

1
1
R335
IRMODE

FIR_VCC

U1

C2
@0.47UF

OVCUR#1

C91
150UF_E

C1
@10UF 6.3V_A

1
R1
@4.7_1206
1

+3VS

10

C99
.1UF

+3VS

R106
470K

FIR Module

F3
POLYSWITCH_0.75A

Compal Electronics, Inc.


Title
PROPRIETARY NOTE

T H I S S H E E T OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Size
T R A D E S E C RET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
D E P A R T M E N T EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
U S E D B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:

SCHEMATIC, M/B LA-1281


Document Number

401202

, 04, 2002

Sheet

Rev
2A
25

of

34

CHGRTC
51ON#
1
R317
560K

R309
@100K

D38
@RB751V
2

R316
100K

3
10K

20

C380
1UF

R321
@5.6M

Q47
@2N7002

21 MAIL_ACT_LED#

51RST

51RST

51ON_RST#

20

.1UF

51ON_RST#

9
9
9
9
9

DAN202U

1
1
D21
4

ON/OFFBTN#

ON/OFF

51ON#

IAC_BITCLK
IAC_SDATAI
IAC_SDATAO
IAC_SYNC
IAC_RST#

21 BATT_LOW_LED#

R195
100K

3
C

BUT_LOCK#
EMAIL_ON#

PS2_CLK
PS2_DATA

3 BUT_LOCK#

+3VALW

PWR_LED#

20
20

D36
CHGRTC

BUTTON_LOCK#

21 BUTTON_LOCK#

21

U46
7SH14

C507
1
2

BTN4#
BTN3#

20 CDON_BTN#
20,21
VOL_UP#
20,21 VOL_DW#
20 VOL_AMP

CDON#

R17
4.7K

BTN1#
BTN2#

C3
1UF_25V_0805

DAN202U

1
D37
RB751V

MEOFFBTN

SW3

EMAIL_ON#

Q1
DTA114EK

10K

D2

Q45
2N7002

1
D1
1N4148

CDON_BTN# is Low , enable CD_PLAY


MAIL is High , enable
MAIL

+3VALW

Reset Button

ON/OFF

9,20

51ON#

30

18

FRDBTN

D33
RB751V
1

BTN1#

INTERNET#

18
18

21

DM_ON
DM_ON#

21 BATT_CHGI_LED#
23

MD_SPK

19
19
19

CD_AGND
CDROM_L
CDROM_R

JP4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50

www.kythuatvitinh.com
+3VALW

2 2

R209
33K

22K
B

D34
RB751V
1

BTN2#

18

STOPBTN

D32
RB751V
1

BTN3#

D39
RB751V
1

21

+3VS

BUTTON3#

21

+5VCD

18

Q30
22K
DTC124EK

MONO_IN_R

E_MAIL#

PLAYBTN

+5VALW

BTN4#

BUTTON4#

21

+5VS

2
G

C295
10UF_1206

C287
10UF_1206

C304
10UF_1206

HEADER 50

Q37
2N7002

51ON

20

REVBTN

D19
RLZ20A

C229
1000PF

R207
4.7K

18

DAN202U

SW2
HCH SMT1-02

+3V
+3V

BEEP#

74LVC14
+3V POWER

C316
1UF

2
R273
560

9,20,29
ACIN
21 S W_CLK/HDD_LED#
21 S W _ DATA/CD_FDD_LED#
20
CAPS_LED#
20 ARROW_LED#
20
NUM_LED#

+3V POWER
U28C
C314
74LVC125
.22UF

System Window Connector


U31B

R266
8.2K

14

R261
100K
10

21

15

PCM_SPK#

C327
1UF

MONO_IN_R

+5VS
+3VS

R287
560
20,21

SPKR

LID_SW#

U31C
6

2
C320
1UF

2
R279
560

R282
10K

74LVC14
+3V POWER

LID_SW#

3 SW1

D27
RB751V

1
2
3
4
5
6
7
8
9
10
96212-1011S

Compal Electronics, Inc.

2
5

JP3

Title
PROPRIETARY NOTE

1
2
3
4
5
6
7
8
9
10

HORNG CHIH

14

+3V
A

+5VALW

T H I S S H E E T OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Size
T R A D E S E C RET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
D E P A R T M E N T EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
U S E D B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
3

SCHEMATIC, M/B LA-1281


Document Number

401202

, 04, 2002

Sheet

Rev
2A
26

of

34

2
R245
10K

Q35
2N7002

U24A
LM358

R244
10K

+3V

14

R296
330K

C238
@.1UF

C347
.1UF

10

RSMRST#

RSMRST#

U31E
74LVC14
+3V POWER
+3V

+3V POWER

Q34
@2N7002

U20A
@LM358

11

2
C334
.1UF

8
U31D
74LVC14

+RTCVCC

R194
@56K

+3V

9
1

R183
@150K_1%
2

D35
HSM1265

+5V

RTCBATT

CPU_IO

+3V

+RTCBATT

+3V

R297
47K

BATT1

14

1
+

2
C268
.1UF

C273
0.33UF_0805
2

1
R229
100K_1%

RTC BATT

+12V

R242
56K
2

R224
150K_1%

CPU_CORE
1

+3V

www.kythuatvitinh.com
2

14

R293
47K

+3V

(2.7A)

+2.5VSP

+2.5VS

(2A)

C317
.01UF

C324
.1UF

13

EC_HPOWON

MR#

RST#

PFI

RST

NC

PFO#

12

11

U28D
74LVC125
+3V POWER

SPWROFF#

5,9,20

5,9,20

R271
10K

MAX708

3MMA/+2.5VS

2
6

R280
100K

J6

3MMA/CPU_IO

U29

CPU_IO

U33
7SH08FU

R281
240K

C337
.1UF

J5

VR_POK

2,9,32

PAD-OPEN 4x4m

+CPU_IOP

1
2

+5VS

(4A)

+3VS
C328
.1UF

+5VALW (5A)

+3VALW

U31F
74LVC14
+3V POWER

+3VS

VCC

U20B
@LM358

PAD-OPEN 4x4m
J3
2

Q33
@2N7002

+3VALWP

C230
@0.33UF_0805

+5VALWP

GND

R181
@200K_1%

J1
1

JOPEN/+12V
3

(120mA)

+12VALW

C346
.1UF

U32
7SH32FU

12

+12VALWP

J2

R294
330K

R217
10K

R191
@56K

R182
@100K_1%

DC/DC INTERFACE

13

+5V

+2.5V_CLK
1

+3V

+3V

+5V

C342
.1UF

C239
@0.33UF_0805

J4
JOPEN

R189
@100K_1%

CHGRTC

Compal Electronics, Inc.


Title
PROPRIETARY NOTE

T H I S S H E E T OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Size
T R A D E S E C RET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
D E P A R T M E N T EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
U S E D B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
C

SCHEMATIC, M/B LA-1281


Document Number

401202

, 04, 2002

Sheet

Rev
2A
27

of

34

+3V

PCLK_1394

2
R70
22

C59
10PF

C106
.1UF

C103
.1UF

1
1

C45
.1UF

C104
4.7UF_10V_0805
2

C73
.1UF
2

C69
.01UF

C102

.01UF
2

C107

.01UF
2

2
2

C72

.01UF

86
96
10
11

TSB43AB22
PCI BUS INTERFACE

CPS

PHY PORT 2

TPBIAS1
TPA1+
TPA1TPB1+
TPB1-

BIAS CURRENT

R0

C405
.1UF

C40

C406
.1UF

.1UF

.1UF

+3V

106
125
124
123
122
121

C105

+3V

+3V

15
27
39
51
59
72
88
100
7
1
2
107
108
120

DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
PLLVDD
AVDD
AVDD
AVDD
AVDD
AVDD

CYCLEOUT
TEST7
TEST17
TEST16

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
PCI_C/BE3
PCI_C/BE2
PCI_C/BE1
PCI_C/BE0
PCI_CLK
PCI_GNT
PCI_REQ
PCI_IDSEL
PCI_FRAME
PCI_IRDY
PCI_TRDY
PCI_DEVSEL
PCI_STOP
PCI_PERR
PCI_INTA
PCI_PME
PCI_SERR
PCI_PAR
PCI_CLKRUN
PCI_RST

CYCLEIN

22
24
25
26
28
29
31
32
37
38
40
41
42
43
45
46
61
63
65
66
67
69
70
71
74
76
77
79
80
81
82
84
34
47
60
73
16
18
19
36
49
50
52
53
54
56
13
21
57
58
12
85

VDDP
VDDP
VDDP
VDDP
VDDP

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
C/BE#3
C/BE#2
C/BE#1
C/BE#0
PCLK_1394
GNT#2
REQ#2

20
35
48
62
78

U3
TSB43AB22

C65

.01UF
R46
4.7K

R408
4.7K

87

R66
4.7K

R68
4.7K

+3V

AD[0..31]

AD[0..31]

5,9,15,23

+3V
1

+3V

1
1

2
2

R36
1K

C39
1UF_10V_0603
R35
1 1K
1

2
2
R342
1K

118

R34
6.34K_1%

www.kythuatvitinh.com
PCIRST#

2
C409
CBRST#

R393

14

89
90

FILTER0
FILTER1

EEPROM 2 WIRE BUS

SDA
SCL

POWER CLASS

PHY PORT 1

PC0
PC1
PC2

TPBIAS0
TPA0+
TPA0TPB0 +
TPB0 TEST9
TEST8

G_RST
GPIO3
GPIO2

2
C55
10PF

TEST3
TEST2
TEST1
TEST0

5
3

24.576 MHz

2
C56
.1UF

2
C44
10PF

92

91

R56
220

99
98
97

116
115
114
113
112

R55
220

2
2

TPBIAS0

R23
56.2_1%

R24
56.2_1%

94
95

R52
R40

1
1

2
2

220
220

101
102
104
105

R38
R37
R343
R344

1
1
1
1

2
2
2
2

220
220
220
220

C31
1UF_10V_0603

TPA_0+
TPA_0TPB_0+
TPB_0-

TPB_0TPB_0+
TPA_0TPA_0+

R4
R3
R13
R12

1
1
1
1

2
2
2
2

0
0
0
0

TPB0TPB0+
TPA0TPA0+

1
2
3
4

JP12
1
2
3
4

FOXCONN-UV31413
R19
56.2_1%

R18
56.2_1%

R20
5.11K_1%

C30
220PF

8
9
109
110
111
117
126
127
128
17
23
30
33
44
55
64
68
75
83
93
103

15,16,23

FILTER

@2.2K
1
@4.7UF_0805

Y1

X1

PLLGND1
PLLGND2
AGND
AGND
AGND
AGND
AGND
AGND
AGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND

R345

+3V

X0

FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
PIRQC#
1394_PME#
SERR#
PAR

5,9,12,15,23 FRAME#
5,9,12,15,23 IRDY#
5,9,12,15,23 TRDY#
5,9,12,15,23
DEVSEL#
5,9,12,15,23 STOP#
12,15,23
PERR#
9,12
PIRQC#
21
1394_PME#
5,9,12,15,23 SERR#
5,9,12,15,23 PAR
5,9,12,15,23
CLKRUN#
5,9,13,15,16,19,23
PCIRST#

OSCILLATOR

119

5,9,15,23 C/BE#3
5,9,15,23 C/BE#2
5,9,15,23 C/BE#1
5,9,15,23 C/BE#0
11
PCLK_1394
R102
5
GNT#2
100
5
REQ#2
AD24
1
2

R1

R62
220

C54
.1UF
1

C46
@0
1

C89
@0
1

C81
.1UF

R63
220

For TSB43AA22
C46,C89
change to 0
ohm to short
to GND

TSB43AB22 USE

Title
T H I S SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
T R A DE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
D E P A RTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
U S E D BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Size
B
Date:

Compal Electronics, Inc.


SCHEMATIC, M /B LA-1281

Document Number

401202

, 04, 2002

Sheet
E

Rev
2A
28

of

34

VMB

PF2

200

PD1
@BAS40-04

SMD_BATT
0

PZD1
RLZ10C
1

20

PR115
24

51AVCC
+3VALWP

BNI/ILI#

1
PR4

PR6
10K

+5VALWP
3

20

1
2

PC5
1UF_25V_1206

BSCL

VS

20

200
SMC_BATT

PD3
@BAS40-04

51AVCC

PC6
4700PF
2
1

PR17
10K

20

VBATT

LM358A

PR19
100K_1%

PC9
150PF

PU2A

PR20
@2.2K

PC10
100PF

2
3

PR8
@10K

PR11

@0

1.62K_0.1%
2

DQ_BATT#

5.11K_0.1%

34.8K_1%

DBV
PR21

VS

21

PR15

PR16
150K_0.1%

PR18

PR10

PD4
AS2431

1SS355

PC8
1UF_25V_1206

PR14
301K_0.1%

PD6

8
+

PU2B
LM358A

3.3V FOR 87570 AVCC

PC7
0.1UF_0805_25V

+5VALWP

PR9
2.2K_1206

3
1

PQ1
@SI2303DS
1
3
VS

BATT_TEMP

+3VALWP
PR13
100K_1%

@0

25063A-08G1-C

24

PR12
100K_1%

PU1B
LM358A
5

PR2

PR5
1K

DBV

PD5
BAS40-04

6.49K_1%

1
2
3
4
5
6
7
8

PD2
BAS40-04

PR7

@0

PR1

PR116
BQ_BATT

@5A

PC4
4.7UF_1210_25V

4.7UF_1210_25V

BQ_BATT/SMD

PC3
4.7UF_1210_25V

PC2
4.7UF_1210_25V

PC1

PJP1
BATT+
VBS
BNI/ILI#
TS
EEPROMVCC
BSCL
BQ_BATT/SMD

@10K
PR3

7A

PF1

+3VALWP
PR114

+5VALWP

VBS

15K_0.1%

www.kythuatvitinh.com
VIN

2DC-S315-B01
1
1

PD7
EC10QS04

PF3

PL1
CHC4532UX
1

5A

+
-

PR23
1K_1%

PR24
1M_0.1%

PR25
453K_1%

PJP2

PU4A
LM358A
3

PR22
100K_1%

PC12
1000PF

PC13
100PF

PL2
CHC4532UX

PC14
100PF

PC15
1000PF

PQ2
2N7002
2
G

PC11
1000PF

+3VALWP

30
VS

1
3

DTC115EK
PR31

PR32

3.3K

ACIN

9,20,26

5.1K

BNI/ILI#

2 100K
100K

PQ5
S

2N7002

PZD2
RLZ3.6B

PR34
47K

2
G

2N7002

8
2

LM358A
1

PR33
10K

1SS355

PQ3
S

PQ4

PU1A
3

2
G

30
1

PR30
10K

PC17
0.22UF_0805_16V

LI/NIMH#
PACIN

+RTCVREF
PR35
45.3K_1%

402K_1%

PR29
174K_1%

ACOFF#

PR27
10K

ACIN:VH:17.8V/VL:16V
PR28

PC16
1000PF

1
30

VIN

PR26
210K_1%

LI/NIMH#

PD8

Compal Electronics, Inc.


Title
PROPRIETARY NOTE

T H I S S H E E T OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Size
T R A D E S E C RET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
D E P A R T M E N T EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
U S E D B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
C

SCHEMATIC, M/B LA-1281


Document Number

401202

, 04, 2002

Sheet
E

Rev
2A
29

of

34

PC24
4.7UF_1210 25V

PR57

PR58
6.8K_0805

VS

LM358A

1
3

8
7
6
5

1
2

+5VALWP
1

1
1

PL3
SPC-1207P-220
2

PR53
47K

P4
PR55
0.02_2512_1%

100K 2

PR56
1.5K_1%

VMB

PQ17
2SC2411K

PR52
100K

S
D
S
D
S
D
G
D
SI4835DY

47K

PC25
1000PF

8
3

PQ15

PU6A

VMB
PQ13
TP0610T

1
2
3
4

PC23
4.7UF_1210 25V

P4

PQ14
TP0610T

20

PD12
RLS4148

2
PC22
4.7UF_1210 25V

PR49
80.6K_1%

P3

PR54

PC21
0.022UF_0805

PD13
EA60QC04

1 PR60

100K

PU5A
LM358A

DTC115EK
PQ16

ACOFF

11.5K_1%

Charger : CC:2.2A CV:14.4V

PR59
1K_1%

1.5K_1%

DBV

PR61
1K_1%

1SS355

4.7K

PC20
0.22UF_0805_16V

100K PQ11
DTC115EK

29

PR42
24K_0.5%

2.2K_1206
PR51

100K

LI/NIMH#

CP

PR48
2.2K_1206

PACIN

PD11

PR62
10K_1%

2
G

29

2
G

ACOFF#
1

PQ10
2N7002

2
G

PD10
RB751V

2N7002
PQ9

PR50
47K

PC19
100PF

PD9
RB751V

7
PR47

ACOFF#

PQ12
2N7002

VIN

PR45

PU3A
LM358A
3

22K

PU3B
LM358A

2
PR36
110K_1%

PR43
10K

51AVCC

47K

PR46
150K

8
7
6
5

S
D
S
D
S
D
G
D
SI4835DY

PR44

LM358A

PQ8

1
2
3
4

PR38
200K

8
7
6
5

S
D
S
D
S
D
G
D
SI4835DY

PQ7

1
2
3
4

DBV
PR41
150_1%

PR40
150_1%

1
2
3
4

PC18
1UF_0805_25V

D
S
D
S
D
S
D
G
SI4835DY
PU4B

P1

PR39
10K

PQ6

8
7
6
5

C h a r g er : CC:2.2A CV:16.8V for LI-ION/CV:14.4V for NI-MH

B+

VIN

P2

P1
PR37
0.015_2512_1%

P4

ACIN: CC:2.87A/ OCP:3.48A

www.kythuatvitinh.com
PR73
22K

PC38
4.7UF_1206_16V

FSTCHG

29
PZD4
RLZ16B

PC39
4.7UF_1206_16V

PACIN

PACIN

PR77
47K

PR78
100K_1%

100K

2N7002
PQ25
2
G

PC37
.1UF

20

TRICKLE

21

100K

PQ24
DTC115EK

T H I S S H E E T OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Size
T R A D E S E C RET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
D E P A R T M E N T EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
U S E D B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
C

BATT_CHGI

+5VALWP

100K 2

Title

1SS355
2

PC36
4.7UF_1206_16V

PR76
22K_0.5%

PQ23
DTC115EK

2 100K

PR72
10K

PR71
16.9K_1%

47K

PROPRIETARY NOTE

1
2

5
4

1
2

1 PR80

2
1

2
1

FSTCHG

1SS355

3
PR79
200_0805

21

PU8
S-81235SG

2
PR75
10K

RTC: 3.5V

+RTCVREF
4

PD18

CHGRTC

PR70
10K

PC34
1000PF

2
1SS355

PR68
10K_1%

PD17
VMB

PD16
4

PR74
100K
PC35
0.22UF_1206_25V

+3VALWP

51ON#

PC32
.01UF_50V_0805

PC31
0.1UF_0805_25V

PU6B
LM358A

5 +
6 1

PR69
100K
26

PR67
100K

PC33
0.1UF_0805_25V

5001-3

PQ22
TP0610T
3
1

VIN

RLZ4.3B

VS

PU5B
LM358A

VS

200_1206

CHARGER_D

PQ20
2N7002

PQ21
SI2303DS
3
1

PZD3
2
1

33_1206

PC30
100PF

2
G

PR66

P4

PR65

2
G

PU7
TL5001

PR64
1.5K

RLS4148

PD14

100PF

PQ19
2N7002

PR63
61.9K_1%

P1

PD15
RLS4148

2
PC26

PC28
1UF_0805_25V

PQ18
2SA1036K

PC27
.1UF

OCP

PC29
4.7UF_1206_16V

20

Compal Electronics, Inc.


SCHEMATIC, M/B LA-1281
Document Number

401202

, 04, 2002

Sheet

30

Rev
2A
of

34

B+
PR81
10_1206
+12VALWP

RB751V
2

TIME/ON5
RUN/ON3

2
3

B+

PT1
CDRH124B

P7

PQ28
SI4800DY

8
7
6
5

VL

MAX1632

47_1206

8
7
6
5

CSH3
CSL3
FB3
SKIP#
SHDN#

PU9

1 PR82

D
D
D
D

LX3
DL3

PD21
EC11FS2

PC51
PC52
4.7UF_1210 25V
PQ29
4.7UF_1210 25V
SI4800DY

P9

1
2
3
4

28

DH3

4
5
18
16
17
19
20
14
13
12
15
9
6
11

S
S
S
G

1
2
3
10
23

P5

PR83

PZD5
RLZ4.3B

PC45
PC48
1UF_0805_25V
470PF_0805_100V

1
2
3
4

26
24

12OUT
VDD
BST5
DH5
LX5
DL5
PGND
CSH5
CSL5
FB5
SEQ
REF
SYNC
RST#

PC42
2.2UF_1206_25V

PL4
BLM32A06_3216
1
2

PC50
0.1UF_0805_25V

21

22
27

BST3

GND

0.1UF_0805_25V

25

V+

1
2
3
4

PC49

0.015_2512_1%

PD23
EC10QS04

EC10QS04
+3VALWP

PC43
4.7UF_1206_25V

PC44

PL5
10UH_SLF12565T

PC40
4.7UF_1206_16V
1

0.1UF_0805_25V

PD22
EC10QS04

PD24

PD20
RB751V
2

VL

8
7
6
5
D
D
D
D
S
S
S
G

8
7
6
5
D
D
D
D

PC47
4.7UF_1210 25V

1
2
3
4

PC46
4.7UF_1210 25V

S
S
S
G

PQ26
SI4800DY

4.7UF_1206_25V

4 2

PC41
1

PD19

D
D
D
D

PQ27
SI4800DY

S
S
S
G

B+

P6

PC55
47UF_D_6.3V_SP
+

PR84
0.015_2512_1%

PC54
150UF_D_6.3V_KO

18,20,22,32

SUSP#

SUSP#

PR85
100K

+5VALWP

51AVCC

PC57
4.7UF_1206_25V

PD25
EC10QS04

PC61
0.01UF

PZD6
RLZ6.2C

PC53
150UF_D_6.3V_KO

www.kythuatvitinh.com
+

51AVCC

PC58
47UF_D_6.3V_SP

PC59
47UF_D_6.3V_SP

PC60
150UF_D_6.3V_KO

PR86
10K
3

33 MAX1632_SHDN#
PC62
1000PF

Compal Electronics, Inc.


Title
PROPRIETARY NOTE

T H I S S H E E T OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Size
T R A D E S E C RET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
D E P A R T M E N T EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
U S E D B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
C

SCHEMATIC, M/B LA-1281


Document Number

401202

, 04, 2002

Sheet

Rev
2A
31

of

34

MAX1711BST

PC73
0.22UF_0805_16V

9
+5VALWP

PC72
220PF

PR93
0

D
D
D
D

D
D
D
D

D
D
D
D

S
S
S
G

S
S
S
G

PC65

PC66

PC67

PC68

PC92

4.7UF_1210_25V

4.7UF_1210_25V

4.7UF_1210_25V

4.7UF_1210_25V

4.7UF_1210_25V

4.7UF_1210_25V

PC93

PC94

4.7UF_1210_25V

4.7UF_1210_25V

PGND

D3

FB

CC

D4

REF

FBS

TON

GNDS

1
2
3
4

1
2
3
4

14

PQ33
SI4404

PQ34
SI4404

PQ35
SI4404

PD27
BYS10-45

PD28
BYS10-45

16
4
11

CPU_CORE
1

MAX1711DL

HK-RM136-22A0R7
1

8
7
6
5

13

PL6
2

PU10
MAX1711

MAX1711LX

1
2
3
4

VCC

DL

23

CPU_CORE
GNDS

PC70
PC71
220UF_D_4V
220UF_D_4V

D1

MAX1711DH

D
D
D
D

17

LX

D2

PC91

S
S
S
G

VID3

D0

24

8
7
6
5

18

DH

S
S
S
G

VID2

S
S
S
G

8
7
6
5
19

SKIP#

22

8
7
6
5

VID1

BST

PR90
2.2

D
D
D
D

20

SHDN#

PC69
0.1UF_0805_25V

1
2
3
4

VID[0..3]

VID[0..3]

VID0

V+

1
2
3
4

SI4894DY

S
S
S
G

21

PR92
100K

SI4894DY

1
2
3
4

SUSP#
0

SI4894DY

PL7
FBM_L11_322513_201_LMAT

15
VDD

PR89
0

PR91
SUSP#

PQ32

CPU_B+

0.1UF_0805_25V

18,20,22,31

PQ31

PC64
0.22UF_0805_16V

PQ30

8
7
6
5

8
7
6
5

PC63

VCC_ON

B+

PD26
MAX1711VDD

PR88 RB751V
20

D
D
D
D

PR87
0

+5VALWP

PR94
1K_1%

www.kythuatvitinh.com
1

PR112
39K_1%

ILIM

PGOOD

12

PR95
150K_1%

PQ40

2N7002

VR_POK

PQ38

2,9,27

PC76
10UF_1210_16V

+5VALW

Vpower

Output

Control

Adjust

+2.5VSP

TP0610T
3
1

PC77
10UF_1210_16V

2
G

Sense

+3VALWP

10

2
1

TUAL5

GNDS

PU12
AMS1503

CPU_CORE

GND

PR123
52.3K_1%

+3V

22K
SUSP#

PU14A
+

LM393
3

PR120

PR98
0

100K

PQ39
PC86

100K

DTC115EK

VCMOS

4.7UF_1206_16V

PR119
10K

PR99

20_1%

1K
2200PF

PC88

PQ37
DTC115EK

2 100K

7
1

PQ41
2N7002

2
G

TUAL5

TUAL5

21

2,3,11

VR_ON

VR_ON

VIN

VOUT

DELAY

SENSE

ERROR

CNOISE

ON/OFF#
SI9182AD

GND

PR121
2.37K_1%

1
3

PC90
1000PF

PC89

PR122
10K_1%

.1UF
2

3
4

PC87
4.7UF_1206_16V

100K

PU15

PC78
100PF

1
VR_ON

PR118

10K
VCC_ON

10K

PR101

PR117

PR100

PR97
100_1%

PC75
4.7UF_1206_16V

0.1UF

3
2
1

PC74

200K

OUT
ADJUST

IN

PC79
0.1UF

+CPU_IOP

G
D
D
PR96

PR113
100K

S
D
D

PU11
AMS1085CD

4
5
6

+3V

SI3441DV

PQ36

3,11

VTTPWRGD

Compal Electronics, Inc.


Title
PROPRIETARY NOTE

T H I S S H E E T OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Size
T R A D E S E C RET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
D E P A R T M E N T EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
U S E D B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
C

SCHEMATIC, M/B LA-1281


Document Number

401202

, 04, 2002

Sheet

Rev
2A
32

of

34

For CPU thermal protection 90/60


C

VS

PR102
47K_1%

51AVCC
PR104
1K

5.62K_1%

PR103

PR105

PTH1

PC81
.1UF

1000PF

10K_1%_0805

31

PU13A
LM393

PC80

MAX1632_SHDN#

3.65K_1%

PC82
.1UF

PR106
100K_1%
51AVCC
PR107
100K_1%

For Battery thermal protection 83/54


C

PR108
47K_1%

www.kythuatvitinh.com
51AVCC

PR110
1K

PR109
6.04K_1%

PR111
3.65K_1%

PTH2
10K_1%_0805

PU13B

PC83
.1UF

LM393

PC84
.1UF

PC85

1000PF

Title
Size
B
5

Date:

S C HEMATIC, M/B LA-1281


Document Number
401202
, 04, 2002

Rev
2A
Sheet

33

of

34

CY23 PIR LIST


08/28/01 Written by Jerry
P 11: Add Q61 and R407 for VTTPWRGD
* * *********** Rev1.0 PIR List **************
09/10/01 Written by Jerry
P26: Add @ at R309 and Q47
Add C507 and U46
Change value of R317 to 510K
P 2 7 : Remove @ at R224, R229, R242, R245, R244, C273, and Q35
P 32: Add PC91, PC92, PC93, and PC94.
09/12/01 Written by Jerry
P 0 6 : Change value of RP34, RP50, RP54, RP62, RP38, RP33, RP57,
R P61,RP53, and RP56 to 16P8R-22
P 26: Change value of R317 to 560K
09/19/01 Written by Jerry
P 29: Change value of PR29 to 174K_1%
P 32: Change value of PR123 to 52.3K_1%
* * *********** Rev2.0 PIR List **************
10/03/01 Written by Jerry
P 02: Change value of R27 to 180
Delete R395
R 395's Pin 1 tie to RP98's pin5
P 03: Change value of R353 to 56.2 1%
P 2 8: Add R408 between +3V and pin 87 of U3
10/08/01 Written by Jerry
P 1 1 , P13, P28: Change footprint of Y1, Y2, and Y3
P 23: Change footprint of JP11
P 28: Change footprint of JP12
P31: Change footprint of PL5
P26: Change footprint of SW1

www.kythuatvitinh.com
10/17/01 Written by Jerry

P 0 2 : Add @ at RP25, RP24, RP28, RP27, RP31, RP30, RP 42, RP41,


R P 4 0 , RP43, RP44, RP45, RP46, RP47, RP48, RP49, RP7, RP1, RP6,
R P 1 4, RP20, RP19, RP22, RP9, RP10, RP11, RP8, RP2, and R7
P06: Remove @ at R164
P11: Add @ at R176

Compal Electronics, Inc.


Title
PROPRIETARY NOTE

T H I S S H E E T OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Size
T R A D E S E C RET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
D E P A R T M E N T EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
U S E D B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:

SCHEMATIC, M/B LA-1281


Document Number

401202

, 04, 2002

Sheet

Rev
2A
34

of

34

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