1.

Simplify the following function

F(A,B,C,D) =P(2,4,5,6,7,10,12,13,14,15) + don’t care (0,8)
using Karnaugh Maps and obtain the POS and SOP forms.

Answer:

CD=00 01 11 10
AB=00 X 1 1 0
01 0 0 0 0
11 0 0 0 0
10 X 1 1 0

POS: F = (B’)(D)

SOP: F = B’D
 2. Give the Characteristics Table and Excitation Table of J-K flip-
flop and D- Flip flop.

JK Flip Flop operation

Characteristic Table Excitation Table

J K Q+ Comment Q Q+ J K Comment

0 0 Hold State 0 0 0 X No change

0 1 Reset 0 1 1 X Set

1 0 Set 1 0 X 1 Reset

1 1 Toggle 1 1 X 0 No change

D Flip Flop operation

Characteristic Table Excitation Table

D Q Q+ Comment Q Q+ D Comment

0 0 Reset 0 0 0 Reset

0 1 Reset 0 1 1 Set

1 0 Set 1 0 0 Reset

1 1 Set 1 1 1 Set
 Implement J-K flip-flop using D flip-flop.

Answer: If we look at the characteristic table for JK, then

using Kmap--

Q=0 1
JK=00 0 1
01 0 0
11 1 0
10 1 1

We can see that we can implement JK using D as follows:

D = JQ’ + K’Q

SET
D Q
K

CL R
Q
inv

Implement D flip-flop using J-K flip-flop.

Answer: If we look at the characteristic table for D and the

excitation table for JK, then using Kmap—

Q=0 1
D=0 JK=0X (Q+=0) JK=X1 (Q+=0)
1 JK=1X (Q+=1) JK=X0 (Q+=1)

We can see that:

J=D
K = D’
D
SET
J Q
inv
K CL R
Q
 3. Add additional circuitry required to construct a synchronous
up counter in the following figure.

Answer:

Examining the three-bit binary count sequence, another predictive pattern can be seen.
Notice that just before a bit toggles, all preceding bits are "high":

[B2,B1,B0]
000
001
010
011
100
101
110
111

This pattern is also something we can exploit in designing a counter circuit. If we enable
each J-K flip-flop to toggle based on whether or not all preceding flip-flop outputs (Q)
are "high," we can obtain the same counting sequence:
 4. Add additional circuitry required to construct a synchronous
down counter in the following figure.

Answer:

To make a synchronous "down" counter, we need to build the circuit to recognize the
appropriate bit patterns predicting each toggle state while counting down. Not
surprisingly, when we examine the binary count sequence, we see that all preceding bits
are "low" prior to a toggle:

[B2,B1,B0]
111
110
101
100
011
010
001
000

[MAKE ADDITIONAL ASSUMPTIONS AS REQUIRED]