UncontrolledThreePhaseRectifiers NotesLecture2224 EE4PK4 PowerElectronics

Acknowledgment MaterialpreparedbyDr.AndrewForsyth InstructorDr.FranciscoJ.PerezPinal 2011

Three-Phase Rectifiers
Aims To explain the operation of, and analyse the waveforms in, 3-pulse and 6-pulse diode rectifiers. To examine and analyse the effect of non-zero source inductance on the operation of rectifier circuits. 1.0 Introduction

The 3-phase rectifier forms the interface between the great majority of motor drive systems and the AC utility, and also between many other pieces of power supply equipment and the utility, for example supplies for welding and induction heating applications. However, increasingly strict legislation on the harmonic content of the currents that may be drawn from the utility is forcing many manufacturers to seek rectifiers that offer higher performance than the basic 6-pulse circuit, such as 12-pulse systems or active rectifiers. An understanding of the operation and characteristics of 3-phase rectifiers is therefore not only important for power electronics engineers, but also for those who specify and purchase rectifier equipment, and those who design and operate utility systems. In the following sections we will first look at the 3-pulse rectifier, and then show how the 6pulse system is derived from this simple circuit. We will use Fourier techniques to examine the input currents. Then we will look at one of the main second-order effects in rectifier systems, namely the influence of non-zero AC source inductance. 2.0 3-Pulse Rectifier

The 3-pulse rectifier in Figure 1 is assumed to be supplying a resistive load in series with a filter inductor, the inductor being large enough to ensure that the load current is continuous and ripple-free. The circuit is a half-wave rectifier, with each supply line, A, B and C, being connected through a single diode to the top of the load. The neutral wire forms the return path. The circuit waveforms follow directly from the assumption of a continuous and smooth load current: One of the three diodes must always be in conduction to provide a path for the load current. Only one diode may conduct at once, since otherwise two of the supply lines would have the same voltage, and this only occurs momentarily as the voltages cross each other. The diode that conducts at any instant is determined by the supply line with the largest positive voltage, since this voltage will forward bias the diode in that line and reverse bias the other two diodes.

Therefore the diodes conduct in sequence for 2/3 radians or 120, and the rectifier output voltage vD is the maximum value of the three line-to-neutral voltages. Since the vD waveform repeats every 2/3 radians, or three times each utility cycle, it is known as a 3-pulse rectifier, and the output voltage ripple frequency is three times the utility frequency. 1

As the repetition period of vD is 2/3 radians, the average value of the waveform may be calculated by integrating over this interval:

average v D =

5 / 6 3 3V 1 / 6 VLN sin d = 2 LN 2 / 3

(1)

Because the circuit only draws a uni-directional current from each supply line, and also uses the neutral wire for the return current, it is very rarely used in practice, however it is a simple circuit to understand, and is therefore useful in helping to analyse more complex circuits. By reversing the diodes in the 3-pulse rectifier, and also swapping over the load connection, a slightly different 3-pulse circuit is formed in which the rectifier now operates from the negative halves of the supply voltages, but continues to provide a positive voltage to the load, Figure 2. The vD waveform has an identical form to that in the positive-half-cycle circuit, except that the ripple voltage is phase shifted by /3 radians or 60. The average of vD will be the same as in the positive-half-cycle circuit, eq(1). The line currents now consist of a series of negative current pulses, each pulse width again being 2/3 radians.
3.0 6-Pulse Rectifier

Connecting two 3-pulse circuits, one operating on the positive half cycle and the other on the negative half cycle, in a back-to-back configuration, Figure 3, forms the 6-pulse rectifier. Since the average values of vD1 and vD2 are the same, then, the currents in the two load resistors will also be the same, providing that the resistors have equal values, say R. Under these conditions, the line currents will consist of 120 pulses of +Io as DA1, DB1 and DC1 conduct, and also 120 pulses of -Io as DA2, DB2 and DC2 conduct. The negative pulses will flow in between the positive pulses, making the line currents quasi-squarewaves. Furthermore, since the two resistors carry equal currents, the neutral current will be zero, and the neutral connection may be removed without affecting the circuit operation. This leaves us with the standard 3-wire, 6-pulse rectifier, Figure 4, in which the load is simply drawn as a constant current element, representing the highly inductive nature of the load. Figure 5 shows the detail of the two 3-pulse output voltages vD1 and vD2 and the total output voltage vDD= vD1+vD2. Since the ripple components in vD1 and vD2 are phase-shifted by /3 radians, the resultant ripple in vDD is reduced in amplitude and has a repetition interval of /3 radians, giving 6 pulses per period of the input waveform. The average of vDD is simply twice the average value of the 3-pulse waveforms and from eq(1):

3 3V LN 3 3V LN 3V LL = = 2 where VLL is the amplitude or peak value of the line-to-line supply voltage. average v DD = 2
3.1 Harmonic Analysis of the 6-Pulse Input Current

(2)

For the purposes of analysing the quasi-squarewave input current, iA, the waveform is redrawn in Figure 6 with the leading edge of the waveform aligned with the origin. 2

Using the standard complex Fourier technique, in which the complex Fourier coefficients An of a waveform v() are calculated as:
An = 1 2

v( )e jn d

(3)

giving the Fourier series for v() as:

v( ) = A0 + 2 A1 cos A1 + 2 A2 cos 2A2 + ......

(4)

then the complex Fourier coefficients of the quasi-squarewave input current may calculated as: An = 1 2

2 / 3

I 0 e jn d +

1 2

5 / 3

( I 0 )e jn d

(5)

2 / 3 5 / 3 I 0 e jn e jn An = 2 jn 0 jn I = 0 1 e jn e jn 2 / 3 + e jn5 / 3 2 jn

(6)

( ( (

) )
(7)

simplifying
An = I0 1 e jn e jn 2 / 3 (1 e jn ) 2 jn I = 0 1 e jn 1 e jn 2 / 3 2 jn

)(

2 for n odd 0 for n even

rearranging into a magnitude and angle format

An =

2 I 0 e jn / 3 e jn / 3 jn / 3 2 I 0 n = sin e jn / 3 for n odd e n n 2j 3

(8)

and we note that sin(n/3)=0 for n=3,6,9, therefore, in addition to the fundamental, the harmonics present in the quasi-squarewave are of order 6k1, where k=1,2,3 From eq(8), the fundamental of the waveform is obtained by setting n=1, the fundamental is therefore: 2 3I 0 2 A1 A1 = / 3 radians (9)

Figure 7 shows a plot of the harmonic magnitudes of the quasi-squarewave input current drawn by the 6-pulse rectifier. The plot is normalised to the magnitude of the fundamental, so the fundamental is shown to have a magnitude of unity.
3.2 RMS Value of the Quasi-Squarewave 6-Pulse Input Current

Recalling the fundamental definition for the rms value, IRMS of a current i(), having a period 2:
I RMS = 1 2
2 0 [i( )] d 2

(10)

then the rms value of the quasi-squarewave rectifier input current in Figure 6 is:

I RMS =

2 / 3 2 I 0 d

5 / 3

( I 0 ) 2 d

2 / 3 2 I 0 d

= 2 / 3I 0

(11)

3.3

Power Factor of the 6-Pulse Rectifier

Recalling the fundamental definition of power factor: Power Factor = Active Power = k d k Apparent Power (12)

where kd is the distortion factor and k is the input displacement factor.

kd = I 1 RMS I RMS k = cos

(13)

I1 is the fundamental component of the current, and is the angle of the fundamental current component with respect to the voltage. Looking at the waveform in Figure 3, then compared to the analysed waveform in Figure 6, iA is delayed by /6, therefore the total phase of the fundamental of iA in Figure 3 is (/3+/6)= -/2. That is the expression for the fundamental is 2 3I 0 / cos( / 2) = 2 3I 0 sin , and we conclude that the fundamental of IA is in phase with vAN, giving =0, therefore k=1. Using eqs(9) and (11)
kd = I (1) I RMS =

(2

3I 0 / / 2 2 / 3I 0

(14)

The power factor is therefore 3/=0.955.

4.0

Source Inductance Effects

In considering the basic rectifier circuits, we have assumed a perfect AC source, that is a source from which it is possible to draw any amount of current without affecting the source voltage. However, to provide an isolated DC output a rectifier would normally be supplied from the AC system though a transformer. A transformer could also be used on the AC side to change the output voltage of the rectifier, for example to produce a low DC voltage supply from the high voltage mains. In these circumstances the leakage inductance of the transformer will appear as an impedance in series with the rectifier input, and this can significantly affect the rectifier operation. The reason for this is that the ideal input currents in the circuits we have examined are stepped waveforms, have points of infinite di/dt, and such waveforms cannot be drawn through an inductive impedance. In addition to a transformer, the supply cables themselves will also add inductance into the source In the following sections we will see how the ideal operation of a 3-pulse rectifier is changed by the presence of non-zero source inductance. The results for the 3-pulse circuit can be easily extended to other more complex systems.
4.1 3-Pulse Rectifier - Analysis of Commutation Waveforms

Figure 8 shows the 3-pulse circuit re-drawn with a small inductor of value LS included in series with each of the supply lines. The three inductors represent the leakage inductance of the supply transformer and any other inductance present in the source. Since the three line inductors are assumed to be small, they will only affect the circuit operation in the region of the commutation instants, that is when the constant load current transfers between any two diodes. To look at the detailed operation of the circuit, we will examine the commutation of current from DA to DB, which is initiated at the instant when vAN exceeds vBN. This is taken as the t=0 origin in the expanded waveforms of Figure 9. The presence of the source inductance will prevent an instantaneous transfer of current from DA to DB and instead the current will transfer gradually. During this commutation transient both diodes DA and DB will be in conduction, giving rise to the term overlap, and the equivalent circuit during the commutation process is shown in Figure 10. The analysis of the commutation transient assumes that the line-to-line voltage vBA drives a current iOL around the loop shown in Figure 10. This current will be superimposed on top of the current distribution that exists at time t=0, so for the overlap period we can write i A = i A (0) iOL = I 0 iOL and i B = i B (0) + iOL = iOL . The current iOL is zero at t=0 and gradually rises to the load current level I0, at which time iA will be zero, DA turns off, and iB will be equal to I0. The commutation process is then complete. During the commutation or overlap transient the load current is constant, therefore

i A + iB = I 0

di A di = B dt dt

(15)

From Figure 10, the equation governing the rise in iOL is

v BA = 2 LS diOL dt

(16)

and the voltage across each source inductance in the direction indicated in Figure 10 is
LS diOL v BA = 2 dt

(17)

The voltage vBA/2, shown as the second waveform in Figure 9, is responsible for changing the current in each inductor; driving iB from zero to I0, and reducing iA from I0 to 0. The currents iA and iB are shown as the third set of waveforms in Figure 9. During the overlap transient the rectifier output voltage, vD, is reduced by an amount equal to the voltage dropped across LS, the output voltage is therefore
v D = v BN

(v v AN ) (v AN + v BN ) v BA = v BN BN = 2 2 2

(18)

So immediately prior to t=0, vD is equal to vAN, during the commutation transient vD is the instantaneous average of the A and B line-to-neutral voltages, (vAN+vBN)/2, and once the current in DA has fallen to zero, vD becomes vBN. The form of vD is indicated in the top waveform of Figure 9. Analytic expressions for the instantaneous line currents during overlap may be derived from eq(17), since during overlap iB=iOL therefore iB = 1 2 LS

v
0

BA

dt

(19)

From Figure 9 we can see that with respect to the origin at t=0, v BA = VLL sin t , and since i B (0) = 0 , then integrating eq(19) V V (20) i B = LL (1 cos t ) and i A = I 0 i B = I 0 LL (1 cos t ) 2LS 2LS Eq(20) gives the detailed expressions for iA and iB during overlap and we can determine the duration of the commutation transient, denoted TOL in Figure 9, by putting iA =0 or iB=I0, giving
I0 = VLL (1 cos TOL ) TOL = 1 cos 1 1 2LS I 0 VLL 2LS

(21)

4.2

Average Output Voltage Calculation

During the overlap transient the rectifier output voltage, vD, is reduced from the ideal value by the voltage dropped across one of the input inductors, LS, equal to vBA/2, eq(18), and the lost volt-seconds, shown shaded in Figure 9, will result in a reduction in the average output voltage. Assuming that the average output voltage under ideal conditions, with no source inductance, is VD , and that due to overlap the average output voltage falls by VOL , then the average output voltage in the presence of overlap, VD , may be written as

VD = VD VOL

(22)

These voltages are depicted in Figure 11, where the lower plot shows the voltage pulses that are lost from the rectifier output, and the average value, VOL , of the pulses of lost voltage. By integrating eq(17) over the commutation interval, we can obtain an expression for the volt-time area of each pulse of lost voltage

I0 0

LS diOL =

TOL 0

v BA dt = volt-time area of each lost voltage pulse 2

(23)

Carrying out the integration of the left hand integral

LS I 0 = volt-time area of each lost voltage pulse

(24)

Since there are three commutations per utility cycle, the total volt-time area of the lost voltage pulses in each cycle is 3LS I 0 . Then, by dividing by the utility period, we can obtain an expression for the reduction in average rectifier output voltage due to overlap Reduction in average output voltage VOL = Finally, substituting into eq(22) yields
VD = 3VLL 3LS I0 2 2 (26)
3LS I 0 3LS I 0 = 2 / 2

(25)

Eq(26) shows that the average rectifier output voltage may be characterised by a simple Thevenin equivalent form in which there is a no load output voltage of 3VLL/(2) in series with an output resistance of 3LS/(2). This is illustrated by the equivalent circuit in Figure 12. It is important to note however that there is no power dissipation or power loss associated with the rectifier output resistance. The output resistance simply reflects the fact that voltseconds are lost in transferring the rectifier current, and stored energy, between the line inductors.

4.3

Extension to the 6-Pulse Rectifier

Since we have seen that a 6-pulse rectifier consists of two 3-pulse circuits operating in series across a common load, then the equations derived for overlap in the 3-pulse circuit may be readily applied to the 6-pulse system. An overlap transient will occur as the current transfers between each of the three top diodes and each of the three lower diodes. Since the output voltage of a 6-pulse circuit is formed by two 3-pluse circuits, we can obtain the average output voltage expression for a 6-pulse system by simply doubling eq(26). Therefore the average output voltage of a 6-pulse rectifier with source inductance is VD = 3VLL 3LS I0 (27)

Figure 1
9

Figure 2
10

Figure 3
11

Figure 4

12

Figure 5

13

Harmonic Spectrum of 6-pulse Input Current

Figure 7
14

3-Pulse Rectifier with Source Inductance

LS A LS B LS C

DA

DB

DC

vD

L O VD A D

Figure 8

15

Overlap Waveforms A to B Transient

vBA 2
(

vD

1 (v + v BN 2 AN

vBN t=o vAN vBA/2

iA

iB IO

t=o t=TOL

Figure 9

16

Equivalent Circuit for Overlap A to B Transient

LS vAN Io vBA vBN i OL

iA Io iB

LS

Figure 10 Rectifier Output Voltage Showing Lost Volts Due to Overlap

VD vD when Ls = 0

' VD

vD with Ls = 0

VOL

Figure 11
17

Equivalent Circuit for 3-Pulse Rectifier Including Overlap

Re =

VD =

3VLL 2

' VD

Figure 12

18