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MARKING DIAGRAM
D
1
S S S G
4119N AYWZZ D
tp = 10 ms
Operating Junction and Storage Temperature Source Current (Body Diode) Single Pulse DraintoSource Avalanche Energy (VDD = 30 V, VGS = 10 V, IPK = 29 A, L = 1 mH, RG = 25 W) Lead Temperature for Soldering Purposes (1/8 from case for 10 s)
= Specific Device Code = Assembly Location = Year = Work Week = Lot Traceability
TL
260
ORDERING INFORMATION
Device Package SO8 FL (PbFree) SO8 FL (PbFree) Shipping 1500 / Tape & Reel 5000 / Tape & Reel
NTMFS4119NT1G NTMFS4119NT3G
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces). 2. Surface mounted on FR4 board using the minimum recommended pad size (Cu area = 0.412 in sq).
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.
NTMFS4119N
ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise noted)
Characteristic OFF CHARACTERISTICS DraintoSource Breakdown Voltage DraintoSource Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current GatetoSource Leakage Current ON CHARACTERISTICS (Note 3) Gate Threshold Voltage Negative Threshold Temperature Coefficient DraintoSource On Resistance Forward Transconductance VGS(TH) VGS(TH)/TJ RDS(on) gFS CISS COSS CRSS QG(TOT) QG(TH) QGS QGD RG td(ON) tr td(OFF) tf VSD tRR ta tb QRR VGS = 0 V, dIS/dt = 100 A/ms, IS = 8.0 A TJ = 25C TJ = 125C VGS = 4.5 V, VDS = 15 V, ID = 1.0 A, RG = 3.0 W VGS = 4.5 V, VDS = 15 V, ID = 18 A VGS = 0 V, f = 1.0 MHz, VDS = 24 V VGS = 10 V, ID = 29 A VGS = 4.5 V, ID = 25 A VDS = 15 V, ID = 10 A CHARGES, CAPACITANCES AND GATE RESISTANCE Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Threshold Gate Charge GatetoSource Charge GatetoDrain Charge Gate Resistance 4800 800 530 36.8 7.3 11 17.4 0.73 W ns 60 nC pF VGS = VDS, ID = 250 mA 1.0 7.0 2.3 3.1 23 3.5 4.8 S 2.5 V mV/C mW V(BR)DSS V(BR)DSS/TJ IDSS IGSS TJ = 25C TJ = 125C VGS = 0 V, ID = 250 mA 30 19 1.0 10 100 nA V mV/C mA Symbol Test Condition Min Typ Max Unit
VGS = 0 V, VDS = 24 V
VDS = 0 V, VGS = 20 V
SWITCHING CHARACTERISTICS, VGS = 4.5 V (Note 4) TurnOn Delay Time Rise Time TurnOff Delay Time Fall Time DRAINSOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge VGS = 0 V, IS = 8.0 A 0.74 0.56 36.5 19.3 19.8 37 nC ns 1.0 V 28 26 35 40
3. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%. 4. Switching characteristics are independent of operating junction temperatures.
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NTMFS4119N
TYPICAL PERFORMANCE CURVES
70 ID, DRAIN CURRENT (AMPS) 60 50 40 30 20 10 0 0 1 2 3 4 5 6 7 8 3.0 V 2.8 V 2.6 V 9 10 3.2 V VGS = 3.8 V to 10 V 3.6 V TJ = 25C 3.4 V ID, DRAIN CURRENT (AMPS) 70 60 50 40 30 20 10 0 1 TJ = 125C TJ = 25C TJ = 55C 2 3 4 VGS, GATETOSOURCE VOLTAGE (VOLTS) 5 VDS 10 V
0.006 0.005
VGS = 4.5 V
0.001
10
20
30
40
50
60
70
VGS = 0 V
TJ = 100C
25
25
50
75
100
125
150
12
15
18
21
24
27
30
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NTMFS4119N
TYPICAL PERFORMANCE CURVES
VGS = 0 V TJ = 25C VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) 7000 6300 C, CAPACITANCE (pF) 5600 4900 4200 3500 2800 2100 1400 700 Coss Ciss 5 QT 4 3 2 1 VDS QGS QGD VGS 12 8 4 0 40 16 20 VDS , DRAIN-TO-SOURCE VOLTAGE (VOLTS)
1000 IS, SOURCE CURRENT (AMPS) VDD = 15 V ID = 1 A VGS = 4.5 V t, TIME (ns)
8 VGS = 0 V TJ = 25C 6
0 0.4
0.9
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NTMFS4119N
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P (SO8FL) CASE 488AA ISSUE G
0.20 C D 2 D1 A B
2X
2X
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS. DIM A A1 b c D D1 D2 E E1 E2 e G K L L1 M q MILLIMETERS MIN NOM MAX 1.10 0.90 1.00 0.00 0.05 0.33 0.41 0.51 0.23 0.28 0.33 5.15 BSC 4.50 4.90 5.10 3.50 4.22 6.15 BSC 5.50 5.80 6.10 3.45 4.30 1.27 BSC 0.51 0.61 0.71 1.20 1.35 1.50 0.51 0.61 0.71 0.05 0.17 0.20 3.00 3.40 3.80 0_ 12 _
0.20 C E1 2 E c
4X
A1
TOP VIEW
3X
C
SEATING PLANE
DETAIL A
DETAIL A
SOLDERING FOOTPRINT*
1.270
3X
b e/2
1 4
0.750
4X
0.10 0.05
C A B c L
1.000
K 1.330
PIN 5 (EXPOSED PAD)
0.965 0.905
2X 2X
E2 L1
4.530
D2 BOTTOM VIEW 1.530 4.560 *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customers technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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NTMFS4119N/D