INTRODUCTION

Welcome to VLSI world! Here we listed out a number of titles as per industry requirement and latest development. These titles are purely based upon IEEE Transactions only. VLSI is ever growing research field, and it leads the world always. The following table shows the IEEE titles in various domains like signal processing, communication Systems, cryptography, audio signal processing, image processing and power electronic controls. The following titles are always simulatable and for hardware details consult our coordinators, since every title has its own hardware setup. SOFTWARES REQUIRED: For simulation For synthesis and implementation For inter verification (Miscellaneous)

ModelSim 6.5 or later Xilinx 12.1 or later MATLAB R2009a or later

FPGA/CPLD REQUIRED: Our projects are vendor independent, which means that we can use any FPGA or CPLD as per project requirement.

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Sl.No

Image processing
Cognition and Removal of Impulse Noise With Uncertainty_jul2k12 Fast Higher-Order MR Image Reconstruction Using SingularVector Separation_Jul2k12 Image Deblurring Using Derivative Compressed Sensing for Optical Imaging Application_Jul2k12 New Families of Fourier Eigen functions for Steerable Filtering_jun2k12 Scalable Coding of Encrypted Images_Jun2k12 A Pipeline VLSI Architecture for Fast Computation of the 2-D Discrete Wavelet Transform An Efficient Denoising Architecture for Removal of Impulse Noise in Images Design and Implementation of a Pipelined Datapath for HighSpeed Face Detection Using FPGA An Efficient VLSI Architecture for Lifting-Based Discrete Wavelet Transform Chaos-Based Security Solution for Fingerprint Data During Communication and Transmission An FPGA-Based Hardware Implementation of Configurable Pixel-Level Color Image Fusion An Improved Multiplicative Spread Spectrum Embedding Scheme for Data Hiding Interference Removal Operation for Spread Spectrum Fingerprinting Scheme

Month July July July June June

Year

1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13.

2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012

LOGIT(P)LTD.,Varatharajamills,nearhopes,Coimbatore,9597388388,8122044220,9003667666

14. 15. 16. 17.

Robust Watermarking of Compressed and Encrypted JPEG2000 Images Spread Spectrum Magnetic Resonance Imaging VLSI Architecture of Arithmetic Coder Used in SPIHT Digital Signal Processing Techniques to Improve Time Resolution in Positron Emission Tomography A New Supervised Method for Blood Vessel Segmentation in Retinal Images by Using Gray-Level and Moment InvariantsBased Features High-Accuracy Fixed-Width Modified Booth Multipliers for Lossy Applications Optimal Design of FIR Triplet Halfband Filter Bank and Application in Image Coding Memory Efficient Modular VLSI Architecture for Highthroughput and Low-Latency Implementation of Multilevel Lifting 2-D DWT A Self-Configurable Systolic Architecture for Face Recognition System Based on Principal Component Neural Network Time Multiplexed VLSI Architecture for Real-Time Barrel Distortion Correction in Video-Endoscopic Images Blind Methods for Detecting Image Fakery(any one method) FPGA implementation of adaptive segmentation for nonstationary biomedical signals Implementation of a New Contrast Enhancement Method for Video Images Medical image enhancement algorithm based on wavelet transform Message Encoding in Images Using Lifting Schemes P-step Unbiased FIR Filter to the Ultrasound Image Processing

2012 2012 2012 2011

18.

2011

19. 20.

2011 2011

21.

2011

22. 23. 24. 25. 26. 27. 28. 29.

2011 2011 2010 2010 2010 2010 2010 2010

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Arithmetic cores
30. 31. 32. 33. 34. Investigating the Impact of Logic and Circuit Implementation on Full Adder Performance_Jul2k12 Optimizing Floating Point Units in Hybrid FPGAs_Jul2k12 Low-Power and Area-Efficient Carry Select Adder Design Issues and Implementations for Floating Point DivideAdd Fused FPGA Designs with Optimized Logarithmic Arithmetic July July 2012 2012 2012 2010 2010

Communication systems
35. A Highly-Integrated 38 GHz Ultra-Wideband RF Transmitter With Digital-Assisted Carrier Leakage Calibration and Automatic Transmit Power Control_Aug2k12 High-Throughput Soft-Output MIMO Detector Based on PathPreserving Trellis-Search Algorithm_Jul2k12 Novel Interpolation and Polynomial Selection for LowComplexity Chase Soft-Decision Reed-Solomon Decoding_Jul2k12 Power Management of MIMO Network Interfaces on Mobile Systems_Jul2k12 Unified Architecture for Reed-Solomon Decoder Combined With Burst-Error Correction_Jul2k12 A Fourier Based Method for Approximating the Joint Detection Probability in MIMO Communications_Jun2k12 Low Complexity Transmitter Architectures for SFBC MIMOOFDM Systems_Jun2k12 On the Reduction of Additive Complexity of Cyclotomic FFTs_Jun2k12 A Mutual Distortion and Impairment Compensator for Wideband Direct-Conversion Transmitters Using Neural August 2012

36.

July

2012

37.

July

2012

38. 39. 40. 41. 42. 43.

July July June June June June

2012 2012 2012 2012 2012 2012

LOGIT(P)LTD.,Varatharajamills,nearhopes,Coimbatore,9597388388,8122044220,9003667666

Networks_Jun2k12 44. 45. 46. 47. 48. 49. 50. 51. 52. 53. 54. 55. 56. 57. 58. 59. Segmentation of Source Symbols for Adaptive Arithmetic Coding_Jun2k12 Cooperative Beamforming for Cognitive Radio Networks-A Cross-Layer Design_May2k12 Dynamic Resource Allocation in MIMO-OFDMA Systems with Full-Duplex and Hybrid Relaying_May2k12 Good Synchronization Sequences for Permutation Codes_May2k12 Low Latency Coding- Convolutional Codes vs. LDPC Codes_May2k12 Low-Complexity Iterative Channel Estimation for Turbo Receivers_May2k12 Spectrum Sensing in the Presence of Multiple Primary Users_May2k12 The Design of Hybrid Asymmetric-FIR_Analog Pulse-Shaping Filters Against Receiver Timing Jitter_May2k12 Uncoordinated Beamforming for Cognitive Networks_May2k12 3D MIMO-OFDM Channel Estimation_Apr2k12 Interleaved Product LDPC Codes_Apr2k12 Secure Communication in the Low-SNR Regime_Apr2k12 Blind Signal Processing for Impulsive Noise Channels_Feb2k12 Curvature Based ECG Signal Compression for Effective Communication on WPAN_Feb2k12 Distributed Coordination Protocol for Ad Hoc Cognitive Radio Networks_Feb2k12 A CMOS Low-Power Digital Polar Modulator System June May May May May May May May May April April April February February February 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012

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Integration for WCDMA Transmitter 60. 61. 62. 63. 64. 65. 66. 67. 68. 69. 70. 71. 72. 73. 74. A High-Speed Low-Complexity Modified(Radix_2pow5) FFT Processor for High Rate WPAN Applications A Wideband Digital RF Receiver Front-End Employing a New Discrete-Time Filter for m-WiMAX A Novel Filter-Bank Multicarrier Scheme to Mitigate the Intrinsic Interference Application to MIMO Systems Differential Coding for MAC Based Two-User MIMO Communication Systems High-Speed Low-Power Viterbi Decoder Design for TCM Decoders MDC FFT_IFFT Processor With Variable Length for MIMOOFDM Systems New S-Band Bandpass Filter (BPF) With Wideband Passband for Wireless Communication Systems Reconfigurable Adaptive Singular Value Decomposition Engine Design for High-Throughput MIMO-OFDM Systems Synthesis and Array Processor Realization of a 2-D IIR Beam Filter for Wireless Applications Transmission of 4-ASK Optical Fast OFDM With Chromatic Dispersion Compensation VLSI Architecture for a Reconfigurable Spectrally Efficient FDM Baseband Transmitter A Two-Level FH-CDMA Scheme for Wireless Communication Systems over Fading Channels Differential Encoding by a Look-Up Table for QuadratureAmplitude Modulation Timing accuracy of self-encoded spread spectrum navigation with communication A Low-Complexity Viterbi Decoder for Space-Time Trellis 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2011 2011 2011 2010

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Codes 75. 76. 77. 78. 79. 80. 81. Adaptive Design of Digital FIR Filter for Beamforming with Its Application in PSK UWA Communication Coding Schemes for Noiseless and Noisy Asynchronous CDMA Systems Design Space Exploration of Hard-Decision Viterbi DecodingAlgorithm and VLSI Implementation FPGA Implementation of Digital Up_Down Convertor for WCDMA System Performance of MC-CDM Systems With MMSEC Over Rayleigh Fading Channels Video Encoder Design for High-Definition 3D Video Communication Systems A CMOS Low-Power Digital Polar Modulator System Integration for WCDMA Transmitter 2010 2010 2010 2010 2010 2010 2012

Audio/Speech Signal Processing

82. 83. 84. 85. 86. 87. 88. Enhancement of Single-Channel Periodic Signals in the TimeDomain_Sep2k12 Multi-View and Multi-Objective SemiSupervised Learning for HMM-Based Automatic Speech Recognition_Sep2k12 Musical-Noise-Free Speech Enhancement Based on Optimized Iterative Spectral Subtraction_Sep2k12 Robustness and Regularization of Personal Audio Systems_Sep2k12 Speaker and Noise Factorization for Robust Speech Recognition_Sep2k12 State-Space Frequency-Domain Adaptive Filtering for Nonlinear Acoustic Echo Cancellation_Sep2k12 Vocal Tract Length Normalization for Statistical Parametric Septembe r Septembe r Septembe r Septembe r Septembe r Septembe r Septembe 2012 2012 2012 2012 2012 2012 2012

LOGIT(P)LTD.,Varatharajamills,nearhopes,Coimbatore,9597388388,8122044220,9003667666

Speech Synthesis_Sep2k12 89. 90. 91. A Dual-Channel Time-Spread Echo Method for Audio Watermarking A Low-Complexity Design for an MP3 Multi-Channel Telephone Channel Compensation in Speaker Verification Using a Polynomial Approximation in the Log-Filter-Bank Energy Domain Enhancement of Residual Echo for Robust Acoustic Echo Cancellation A Wiener Filter Approach to Microphone Leakage Reduction in Close-Microphone Applications Robust Patchwork-Based Embedding and Decoding Scheme for Digital Audio Watermarking Stereo Acoustic Echo Cancellation Employing FrequencyDomain Preprocessing and Adaptive Filter

r 2012 2012 2012

92. 93. 94. 95.

2012 2012 2012 2011

Cryptography
96. 97. 98. 99. 100. Efficient FPGA Implementations of Point Mult on Binary Edwards & Generalized Hessian Curves Using_Aug2k12 Construction of Optimum Composite Field Architecture for Compact High-Throughput AES S-Boxes_Jun2k12 Secure Multipliers Resilient to Strong Fault-Injection Attacks Using Multilinear Arithmetic Codes_Jun2k12 A Formal Approach to Designing Cryptographic Processors Based on GF(2^m) Arithmetic Circuits Efficient Implementation of Elliptic Curve Cryptography Using Low-power Digital Signal Processor August June June 2012 2012 2012 2012 2010

Signal processing
101. A Highly-Digital VCO-Based ADC Using Phase Interpolator & Digital Calibration_Aug2k12 August 2012

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102. 103. 104. 105. 106. 107. 108. 109. 110. 111. 112. 113. 114. 115. 116.

Area-Time Efficient Scaling-Free CORDIC Using Generalized Micro-Rotation Selection_Aug2k12 Jitter Analysis of Polyphase Filter-Based Multiphase Clock in Frequency Multiplier_Aug2k12 Resource-Efficient FPGA Architecture and Implementation of Hough Transform_Aug2k12 A Low-Power Low-Cost Design of Primary Synchronization Signal Detection_Jul2k12 A Multi-Resolution Fast Filter Bank for Spectrum Sensing in Military Radio Receivers_Jul2k12 Hardware Implementation of Nakagami and Weibull Variate Generators_Jul2k12 Pipelined Parallel FFT Architectures via Folding Transformation_June2k12 A Novel Approach for Motion Artifact Reduction in PPG Signals Based on AS-LMS Adaptive Filter A Single-Pass-Based Localized Adaptive Interpolation Filter for Video Coding A Very Linear Low-Pass Filter with Automatic Frequency Tuning An Optimization-Based Parallel Particle Filter for Multitarget Tracking Area-Efficient Parallel FIR Digital Filter Structures for Symmetric Convolutions Based on Fast FIR Algorithm Area-Efficient VLSI Implementation for Parallel Linear-Phase FIR Digital Filters of Odd Length Based on Fast FIR Algorithm Design of Digit-Serial FIR Filters Algorithms, Architectures, and a CAD Tool Hierarchical Design of an Application-Specific Instruction Set Processor for High-Throughput and Scalable FFT Processing

August August August July July July June

2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012 2012

LOGIT(P)LTD.,Varatharajamills,nearhopes,Coimbatore,9597388388,8122044220,9003667666

117. 118. 119. 120. 121. 122. 123. 124. 125. 126. 127. 128. 129. 130. 131. 132.

Non-Causal Time-Domain Filters for Single-Channel Noise Reduction On the BIBO Stability Condition of Adaptive Recursive FLANN Filters With Application to Nonlinear Active Noise Control Pipelined Parallel FFT Architectures via Folding Transformation The Design of Hybrid Symmetric-FIR_Analog Pulse-Shaping Filters Universal Switching FIR Filtering Energy-Efficient Low-Latency 600 MHz FIR With HighOverdrive Charge-Recovery Logic Fixed-Point Implementation of Cascaded ForwardBackward Adaptive Predictors Radix-2 Fast Algorithm for Computing Discrete Hartley Transform of Type III A Reconfigurable FIR Filter Architecture to Trade Off Filter Performance for Dynamic Power Consumption An Adaptive Kalman Filter for ECG Signal Enhancement Analysis and Compensation of the Effects of Analog VLSI Arithmetic on the LMS Algorithm Design of Linear Phase FIR Filters With High Probability of Achieving Minimum Number of Adders Implementation of Linear-Phase FIR Filters for a Rational Sampling-Rate Conversion Utilizing the Coefficient Symmetry Pipelined Parallel FFT Architectures via Folding Transformation A Quaternion Widely Linear Adaptive Filter An Adaptively Pipelined Mixed Synchronous-Asynchronous Digital FIR Filter Chip Operating at 1.3 Gigahertz

2012 2012 2012 2012 2012 2012 2012 2012 2011 2011 2011 2011 2011 2011 2010 2010

LOGIT(P)LTD.,Varatharajamills,nearhopes,Coimbatore,9597388388,8122044220,9003667666

133. 134. 135. 136.

First Order Complex Adaptive FIR Notch Filter Modulated Wideband Converter with Non-Ideal Lowpass Filters New Approach to Look-Up-Table Design and Memory-Based Realization of FIR Digital Filter New Reconfigurable Architectures for Implementing FIR Filters with Low Complexity

2010 2010 2010 2010

Power Electronics Control

137. 138. 139. 140. 141. 142. 143. 144. 145. 146. Design and Implementation of a New Multilevel Inverter Topology_Nov2k12 Digital Filters for Fast Harmonic Sequence Component Separation 3Ph_Oct2k12 Spread Spectrum Modulation by Using Asymmetric-Carrier Random PWM_Oct2k12 A Fast-Response Pseudo-PWM Buck Converter With PLLBased Hysteresis Control_Jul2k12 Energy-Efficient Low-Latency 600 MHz FIR With HighOverdrive Charge-Recovery Logic_Jun2k12 A Filter Bank and a Self-Tuning Adaptive Filter for the Harmonic and Inter harmonic Estimation in Power Signals A Shifted SVPWM Method to Control DC-Link Resonant Inverters and Its FPGA Realization Fully FPGA-Based Sensorless Control for Synchronous AC Drive Using an Extended Kalman Filter Synchronous FPGA-Based High-Resolution Implementations of Digital Pulse-Width Modulators High Resolution FPGA DPWM Based on Variable Clock Phase Shifting November October October July June 2012 2012 2012 2012 2012 2012 2012 2012 2012 2010

Miscellaneous
LOGIT(P)LTD.,Varatharajamills,nearhopes,Coimbatore,9597388388,8122044220,9003667666

147. 148. 149. 150. 151. 152. 153. 154. 155. 156.

Dual-Layer Adaptive Error Control for Network-on-Chip Links_Jul2k12 Return Data Interleaving for Multi-Channel Embedded CMPs Systems_Jul2k12 A Reconfigurable Clock Polarity Assignment Flow for Clock Gated Designs_Jun2k12 Parallel Architecture for Hierarchical Optical Flow Estimation Based on FPGA_Jun2k12 A High Speed Low Power CAM With a Parity Bit and PowerGated ML Sensing Viterbi-Based Efficient Test Data Compression Effective and Efficient Approach for Power Reduction by Using Multi-Bit Flip-Flops A Low-Cost HighQuality Adaptive Scalar for Real-Time Multimedia Applications A Low-Power High-Performance H.264_AVC Intra-Frame Encoder for 1080pHD Video A VLSI Architecture and the FPGA Prototype for MPEG-2 Audio_Video Decoding Development and Implementation of Parameterized FPGABased General Purpose Neural Networks for Online Applications A High Speed Low Power CAM With a Parity Bit and PowerGated ML Sensing

July July June June

2012 2012 2012 2012 2012 2012 2012 2011 2011 2011

157.

2011

158.

2012

LOGIT(P)LTD.,Varatharajamills,nearhopes,Coimbatore,9597388388,8122044220,9003667666