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Bistable Monostable Astable

Astable/Monostable Multivibrators
A multivibrator is an electronic circuit used to implement a variety of simple two-state systems such as oscillators, timers and flip-flops. It is characterized by two transistors cross-coupled by resistors and capacitors. There are three types of multivibrator circuit: astable, in which the circuit is not stable in either stateit continuously oscillates from one state to the other. Due to this, it does not require a input (Clock pulse or other). monostable, in which one of the states is stable, but the other is notthe circuit will flip into the unstable state for a determined period, but will eventually return to the stable state. Such a circuit is useful for creating a timing period of fixed duration in response to some external event. This circuit is also known as a one shot. A common application is in eliminating switch bounce. bistable, in which the circuit will remain in either state indefinitely. The circuit can be flipped from one state to the other by an external event or trigger. Such a circuit is important as the fundamental building block of a register or memory device. This circuit is also known as a latch or a flip-flop.
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BISTABLE MULTIVIBRATOR - LATCHES

A latch is a temporary storage device that has two stable states (bistable). It is a basic form of memory.

The S-R (Set-Reset) latch is the most basic type. It can be constructed from NOR gates or NAND gates. With NOR gates, the latch responds to active-HIGH inputs; with NAND gates, it responds to active-LOW inputs.
R Q S Q

NOR Active-HIGH Latch

NAND Active-LOW Latch

LATCHES
The active-HIGH S-R latch is in a stable (latched) condition when both inputs are LOW.

Assume the latch is initially RESET (Q = 0) and the inputs are at their inactive level (0). To SET the latch (Q = 1), a momentary HIGH signal is applied to the S input while the R remains LOW. To RESET the latch (Q = 0), a momentary HIGH signal is applied to the R input while the S remains LOW.

0 R

0 1

10 0 S 0 R

Latch initially RESET

Q

0 1 Q

1 0 0 S

Latch initially SET

Q

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LATCHES
The active-LOW S-R latch is in a stable (latched) condition when both inputs are HIGH.

Assume the latch is initially RESET (Q = 0) and the inputs are at their inactive level (1). To SET the latch (Q = 1), a momentary LOW signal is applied to the S input while the R remains HIGH. To RESET the latch a momentary LOW is applied to the R input while S is HIGH. Never apply an active set and reset at the same time (invalid).

1 S

1 0

1 0 1 R 1 S 1 0

Latch initially RESET

Q

Latch initially 0 1 SET

1R Q

Bistable multivibrator

Bistable multivibrator SR Latch circuit diagram

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Bistable multivibrator SR Latch

Q

S=0 R

We should analyse the cutoff and saturation conditions for Q2 for momentary SET or RESET input. In the figure part (a), the circuit for Q2 ON condition is shown. If Q1 is OFF, the base current will drive Q2yi into saturation. The saturation condition is calculated as follows:
I1 = VCC (VBE )ON R1 + R2 (V ) I 2 = BE ON R3

I B = I1 I 2
R3 S (b) R=0

IC =

VCC (VCE ) SAT R1 IC IB

hFE >

In the figure part (b), the circuit for Q2 OFF condition is shown. The
OFF voltage at the base is:

R3 (VCE ) SAT R2 + R3 If Q1 is ON, the collector voltage will be VCE,SAT. The low voltage at the base of Q2 will drive Q2 into cutoff. As Q2 is cutoff, the collector voltage of Q2 will supply current to the base of Q1 via R2 ensuring Q1 to stay in ON condition. If a momentary voltage of +VCC (logic 1) is applied to the R input, Q2 is driven into saturation. When Q2 is ON, the collector voltage of Q2 will drive Q1 into cutoff (reverse bias). When R input is logic 0, Q2 will stay in ON and Q1 will stay in OFF condition. If a momentary voltage of +VCC (logic 1) is applied to the S input, Q1 is driven into saturation and Q2 into cutoff. If RESET or SET inputs are changed to logic 0, output condition does not change. If +VCC is applied to both R and S inputs, then two transistors are driven into saturation causing the two complementary outputs to 8 become indeterminant. (VBE ) OFF =

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Cross-Coupled Pairs - CMOS SR Latch

Gate-level Schematic : NOR-based set-reset
S S Q S R R Q Q Q 0 1 0 1 Forbidden State 0 0 1 1 Q 1 0 0 Q 0 1 0

Truth Table
R Q Q

Transistor schematic

Bistable Multivibrators
Bistable multivibrator A switching circuit with two stable output states.
Also referred to as a flip-flop. The output changes state when it receives a valid input trigger signal, and remains in that state until another valid trigger signal is received.

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Bistable Multivibrators
Bi Stable multivibrator : Circuits & Components. +VCC
15 R12 1.5 K 12 C5 .001f C7 .001f R15 1.5 K 16 O

2 Stable States; Q1 On, Q2 C/O or Q2 On, Q1 C/O Frequency Out 10 K is the Input.
R11

Output
R13 22 K R16 22 K R18 10 K Q1 13 D4 14 R14 & 17 22 K D5 18 17 Q2

C6 .001f

C8 .001f

T Flip-flop

Ops Q1 on
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Bistable Multivibrator Operation

Bi Stable multivibrator : Stable State; Q1 ON, Q2 C/O Remains in stable state until triggered. D4 FB allows trigger R11 to change 10 K conduction.
Q1 R12 1.5 K C5 .001f C7 .001f R15 1.5 K 16

Ops: Q1 ON Q2 OFF. +VCC

15 O

12

Output

R13 22 K

2 a

R16 22 K

R18 10 K

1 13
D4

FB
2 b
T 14

D4

4
R14 & 17 22 K D5

17

2 a

Q2

RB
18

D5

3 a
C8 .001f

C6 .001f

FB: Forward Biased RB: Reverse Biased

Q1 off Q2 on
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Bistable Multivibrator Operation

Bi Stable : Stable State; Q2 On, Q1 C/O Remains in stable state until triggered. D5 FB allows trigger R11 to change 10 K conduction.
Q1 R12 1.5 K C5 .001f C7 .001f R15 1.5 K 16

Ops: Q2 ON Q1 OFF. +VCC

15 O

Output
3

12

R13 22 K

2 a

3 a

R16 22 K

R18 10 K

13 D4

D4

4
R14 & 17 22 K D5

17 2

Q2

D5

RB
2 b
T 14

FB
18

3 b
C8 .001f

C6 .001f

Wave Form
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Bistable Multivibrator Operation

Bi Stable : Wave Form Analysis
Stable State; Q1 ON, Q2 C/O Remains in stable state until triggered. D4 FB allows trigger to change conduction. Stable State; Q2 ON, Q1 C/O Remains in stable state until triggered. D5 FB allows trigger to change conduction. Read Signals: Left to Right

Q1

Q2

Output @ 220 KHz

Q2 B

Q1 B

Rectified @ 220 KHz

Differentiated @ 440 KHz

Input @ 440 KHz

Frequency Out is the Input.

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Monostable Multivibrators
Monostable multivibrator A switching circuit with one stable output state.
Also referred to as a one-shot. The one-shot produces a single output pulse when it receives a valid input trigger signal.

One-Shots

The one-shot or monostable multivibrator is a device with only one stable state. When triggered, it goes to its unstable state for a predetermined length of time, then returns to its stable state.
+V REXT CEXT
CX RX/CX

For most one-shots, the length of time in the unstable state (tW) is determined by an external RC circuit.
Trigger

Trigger

Q
tW

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Monostable multivibrator
Mono Stable; 1 Stable State, Q1 C/O, Q2 Sat.
Triggered.

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Monostable multivibrator waveforms: (a) trigger input waveform; (b) differentiator output waveform; (c) monostable multivibrator output waveform.

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Monostable multivibrator
Mono Stable multivibrator : Circuits & Components One Stable State; Q2 On, Q1 Cutoff. When Triggered, Changes state, Q2 C/O, Q1 On. Frequency in = Frequency Out.
22 C10 .0068 f 23 Q2 25 R21 2.2 K
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+VCC
R24 2.2 K

R22 12 K R23 100 K

Output
26

Trigger input

20

C9

500 pf

D6

21

Q1

R25 10 K

R19 68 K

R20 8.2 K

Ops
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Monostable multivibrator operation

Mono Stable multivibrator : Stable State; Q2 On, Q1 Cutoff. C10 Charges
Stable state Between Triggers
22 C9 500 pf D6 C10 .0068 f 23 Q2

Ops, Stable State.

25 R21 2.2 K
24

O R24 2.2 K

+VCC

R22 12 K R23 100 K

Output
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Trigger input

20

21

Q1

R25 10 K

R19 68 K

R20 8.2 K

Frequency in = Frequency Out.

Triggered
20

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Monostable multivibrator operation

Mono Stable multivibrator : Triggered, Changes state, Q1 On, Q2 C/O. C10 Discharges
R23 100 K 22 C9 500 pf D6 C10 .0068 f 23 Q2

Ops, Triggered.
25 R21 2.2 K
24

O R24 2.2 K

+VCC

R22 12 K

Output
26

Trigger input

20

21

Q1

R25 10 K

R19 68 K

R20 8.2 K

Frequency in = Frequency Out.

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Astable Multivibrators
Astable multivibrator A switching circuit that has no stable output state.
The astable multivibrator is a rectangular-wave oscillator. Also referred to as a free-running multivibrator.

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Astable multivibrator
Astable multivibrator: Circuits & Components
8 R5 R1 6.8 K R3 15 K
R6 100 K

+VCC

100 K

R9 15 K

R10 6.8 K

R7 5.1 K

R8 5.1 K C4
CR3

Q Output
3

CR1

C3 .005 f

6 .005 f 5 7

Q Output

Q1

Q2

Charge & Discharge

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Astable multivibrator operation

Astable multivibrator : Q2 on, C3 Charge, C4 Discharge, Q1 C/O.
8 R5 R1 6.8 K R3 15 K
R6 100 K

+VCC

100 K

R9 15 K

R10 6.8 K

R7 5.1 K

R8 5.1 K 6 .005 f 5 7

CR3 FB

.005 f Q1

+
C4 DisChg

Q2

C3 Chg

C4 Discharge Symmetry
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C3

C4

Q Output

CR1

CR3

Q Output

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Astable multivibrator operation

Astable multivibrator : Symmetry control, C4 Discharge.
8 R5 R1 6.8 K R3 15 K
R6 100 K

+VCC

100 K

R9 15 K

R10 6.8 K

R7 5.1 K

R8 5.1 K C4
CR3

Q Output

CR1

C3 .005 f

6 .005 f 5 7

Q Output

Q1

Q2

Q2 On, CR3 FB, C4 Dis-Chg, Q1 C/O C3 Discharge Symmetry

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Astable multivibrator operation

Astable multivibrator : Symmetry control, C3 Discharge.
8 R5 R1 6.8 K R3 15 K
R6 100 K

+VCC

100 K

R9 15 K

R10 6.8 K

R7 5.1 K
CR1

R8 5.1 K C4
CR3

C3 .005 f

Q Output
Q1

6 .005 f 5 7

Q Output
Q2

Q1 On, CR1 FB, C3 Dis-Chg, Q2 C/O Wave Form

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Internal functional diagram of a 555 timer

Comparator Input / Output Relationships

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The 555 timer connected as a one-shot.

The 555 timer can be configured in various ways, including as a one-shot. A basic one shot is shown. The pulse width is determined by R1C1 and is approximately tW = 1.1R1C1.
+VCC

R1

(4) (7) RESET

(8)

VCC
(3) (5)

DISCH

The trigger is a negative-going pulse.

(6) (2)

THRES

OUT

C1

TRIG CONT GND

(1)

tW = 1.1R1C1 C2

Determine the pulse width for the circuit shown. tW = 1.1R1C1 = 1.1(10 k)(2.2 F) =
+VCC +15 V

24.2 ms

R1
10 k

(4) (7) RESET

(8)

VCC
(3) (5)

DISCH
(6) (2)

THRES

OUT

C1
2.2 F

TRIG CONT GND

(1)

tW = 1.1R1C1 C2

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One-shot operation of the 555 timer.

The 555 timer connected as an astable multivibrator (oscillator).

Decoupling capacitor A capacitor connected between the supply voltage and ground pins of an IC to prevent intermittent highfrequency operation.

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Operation of the 555 timer in the astable mode.

Astable Multivibrator Waveforms

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Duty Cycle
Duty cycle The ratio of pulse width (tW) to period (T), measured as a percentage.
duty cycle% = pulse width 100 period

Astable Multivibrator Relationships

The 555 can be configured as a basic astable multivibrator with the circuit shown. In this circuit C1 charges through R1 and R2 and discharges through only R2. The output frequency, duty cycle and pulse width are given by:
f = duty cycle% = 1.44 ( R1 + 2 R2 )C1 R1 + R2 100 R1 + 2 R2
R1
(4)

+VCC

tW = 0.693( R1 + R2 )C1
The frequency and duty cycle are set by these components.

(8)

RESET (7) DISCH

(6) (2)

VCC
(3) (5)

R2 C1

THRES

OUT

TRIG CONT GND

(1)

C2

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EXAMPLE: Determine the output frequency and duty cycle of the 555 oscillator. SOLUTION:

f =

1.44 1.44 = ( R1 + 2 R2 )C1 (3k + 2 2.7 k

)0.033F

5.2kHz

duty cycle% =

R1 + R2 3k + 2.7k 100 = 100 68% R1 + 2 R2 3k + 2 2.7k

Schmitt Triggers
Schmitt trigger A voltage-level detector. The output of a Schmitt trigger changes state when
When a positive-going input passes the upper trigger point (UTP) voltage. When a negative-going input passes the lower trigger point (LTP) voltage.

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Trigger Point Voltages

Trigger point voltages may be equal or unequal in magnitude, and are opposite in polarity.

Hysteresis
Hysteresis A term that is often used to describe the range of voltages between the UTP and LTP of a Schmitt trigger.

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Schmitt Trigger
Vou t
In Out

V OH

VTC with hysteresis Restores signal slopes

V OL

VM

VM+

Vi n

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Schmitt trigger with transistors

Since a transistor implementation of a Schmitt Trigger is rather important due to the single voltage supply that requires to operate, we will analyse a basic Schmitt Trigger circuit with two NPN transistors:

The operation of this circuit is simple. Suppose that the input voltage is zero. Q1 will not conduct. The resistors R1+R3 and R4 will perform a voltage divider. The output from this voltage divider will determine the state of the transistor Q2.
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Calculation of the high trigger level

The base voltage of Q2 can then be calculated as VB2 = VCC * R4/(R1+R3+R4) The emitter voltage of Q2 will be less, because of the VBE voltage difference between the base and emitter. For a silicon transistor where current is flowing, the VBE voltage can be estimated at roughly 0.61 Volt. The emitter voltage can be calculated as: VE2 = VB2 - VBE2 = VCC* R4/(R1+R3+R4) - VBE(on) The Schmitt trigger circuit uses emitter coupled logic. Therefore VE = VE1 = VE2. As the input voltage is increased, as soon as VB1 is larger than VE1, a very small current will start to flow through transistor Q1. This current also passes resistor R1, and therefore the base voltage of Q2 will gradually be decreased. Also the emitter voltage of Q2 will be decreased. As the emitters of Q1 and Q2 are connected together, the voltage difference VBE1 of Q1 will be increased (VB1 &VE1).

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More current will start to flow through transistor Q1, and Q1 will be ON. Note that the emitter voltage over resistor RE won't fall to zero. Although Q1 is closing, Q2 is opening at the same time keeping the emitter voltage more or less stable at a value of Vin - VBE. When Q1 is totally closed (ON) and Q2 has opened (OFF), the system has changed state. The output will change to the HIGH state because resistor R2 pulls the output to the power supply. The trigger voltage where this effect starts to happen is called the high trigger voltage and can be approximately calculated as VHIGH(UTL)=VCC* R4/(R1+R3+R4) - VBE(on)
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Calculation of the low trigger level

Now let's assume that the input voltage is decreasing. The base current of Q1 is decreased, and so does the current IC. This will increase the base voltage VB on Q2. There will be a point that input voltage will be very low, and the base voltage of Q2 will become slightly higher than the emitter voltage. This will cause a small base current to flow through Q2, and thus an emitter current that will flow through RE. This will cause the emitter voltage to be increased. Because the voltage difference between the base and the emitter of Q1 will become smaller, less current will flow through Q1 and the base voltage of Q2 will be further increased. This loop will cause Q2 to start conducting, and Q1 to be sent to cut-off almost simultaneously. There is only a very narrow voltage area where this shift is done. VLOW (LTL) = VCC x R4 / (R1 + R3 + R4 + R1 x R4 / RE) + VBE (on)
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Basic astable multivibrator using a Schmitt trigger.

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CMOS Schmitt Trigger

V DD

M2 Vin X

M4 Vout

M1

M3

Moves switching threshold of first inverter

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CMOS Schmitt Trigger Circuit

The Schmitt Trigger circuit, shown at left, has a dc transfer characteristic like an inverter, but with different switching thresholds depending on whether Vin is increasing or decreasing
Hysteresis effect
If Vin is increasing, high Vth If Vin is decreasing, low Vth

SPICE simulated VTC waveforms with increasing and decreasing input voltage are shown at right. increasing Vin Vth = 3.5 V decreasing Vin Vth = 1.4 V

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