Introduction to the Design of Embedded System

2008. 12 2008 12. 3 Presented by Sang-Uk Jeon

KAIST SE LAB 2008

Contents Part I What is Embedded System? Part II Designing Embedded System Part III Software Engineering in Embedded System Design

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Part I. What is Embedded System?

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Part I. What is Embedded System?

Definition of Embedded System* y A combination of computer hardware and software, and perhaps additional p mechanical or other parts Designed to perform a dedicated function In some cases, part of a large system or p product
e.g.) Antilock Braking System(ABS) in a car

* Michael Barr, "Embedded Systems Glossary, Netrino Technical Library Barr Glossary Library, Available at http://www.netrino.com/Embedded-Systems/Glossary KAIST SE LAB 2008 4/35

Part I. What is Embedded System?

Characteristics of Embedded System* y Single-functioned

Executes a single program, repeatedly

Tightly-constrained
Low power, small, fast, etc.

Reactive and real-time

Continually reacts to changes in the systems system s environment Must compute certain results in real-time without delay
* Frank Vahid and Tony Givargis Embedded System Design: A Unified Givargis, Hardware/Software Introduction, John Wiley & Sons, ISBN: 0471386782, 2002. KAIST SE LAB 2008 5/35

Part I. What is Embedded System?

Categorization of Embedded System g y Computation oriented

MP3 player, MPEG decoder, etc

Control oriented
Home appliances, industrial controller, safetycritical controller iti l t ll

Hybrid(computation + control) y ( )
Portable information devices
e g) Cellular phone e.g)

Networked multimedia applications

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Part II. Designing Embedded System

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Part II. Designing Embedded System Traditional Embedded System Design

Issues in Embedded System Design y g Top-priority design goal

Construct the system with desired functionality

Design issue
Simultaneously optimize numerous design constraints t i t
Size, performance, power, flexibility, etc.

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Part II. Designing Embedded System Traditional Embedded System Design

Traditional Embedded System Design y g

System Specification HW & SW P titi Partition HW Development p SW Development Prototype Test
Test passed

Designers partition the system into hardware and software early in the flow HW and SW engineers design their respective components in isolation HW and SW engineers do not talk to each other h Integration problems Hi h t d long it ti High cost and l iteration

Test not passed

Prototype
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Need new methodology!! HW & SW co-design Platform-based design

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Part II. Designing Embedded System HW & SW Co-Design

HW & SW Co-Design g
System Specification HW & SW Partition
* Synonym * Architecture Platform Design Space Exploration * Synonym * Application Functionality

HW Model Map HW & SW

SW Model

E l ti f il d Evaluation failed

Evaluation* SW Synthesis

HW Synthesis

HW & SW Integration g
*Evaluation subject : Performance, energy, etc. KAIST SE LAB 2008 10/35

Part II. Designing Embedded System HW & SW Co-Design

Design Space Exploration(DSE)* g p p ( ) Finding the optimal design of software and hardware
That satisfies given design objectives
Problem Space (Characteristics of SW & HW) Software functionality Hardware parameters Processor architecture Clock rate Cache size Memory architecture Page replacement policy
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Solution Space (Design objectives) Performance objective Energy objective

* M. Gries. Methods for evaluating and covering the design space during early design development. Integr. VLSI J., 38(2):131183, 2004.

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Part II. Designing Embedded System HW & SW Co-Design

HW & SW Partition Decides whether each functionality is implemented in HW or SW

Requirements : Summing up 100 values q g p Alternative 1 Software implementation ADD v1, v2 ADD v1, v3 ADD v1, v100 Alternative 2 Software implementation ADD v1, v2, , v100

ADD x1, x2 Hardware support pp

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ADD x1, x2, , x100 Hardware support pp Smaller software size Better performance
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More flexible software

Part II. Designing Embedded System HW & SW Co-Design

Software Model
Kahn process networks Directed Acyclic Graphs(DAG) DAGs with periods and deadlines Synchronous data flow y Control data flow graphs and dynamic data flow High-level programming language Co-Design Finite State Machines Communication analysis graphs Click model of computation Transaction Level Modeling
SystemC

Hierarchical and heterogeneous models of computation

Ptolemy framework, Metropolis meta-model language, etc.

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Part II. Designing Embedded System HW & SW Co-Design

Hardware Model Abstract models

Instruction-accurate model Task accurate Task-accurate model Non-linear, accumulative service descriptions

Executable models E t bl d l
Micro-architecture templates p Hardware description language Architecture description language

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Part II. Designing Embedded System HW & SW Co-Design

Mapping Software and Hardware pp g Binding software tasks to hardware building blocks
May require additional jobs such as
Rewriting/adapting software code
To link required interface of software and p q provided interface of hardware

Compilation of the software onto the hardware

Software Tasks

Hardware blocks

ARM P1

ARM P2

DSP P3
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Part II. Designing Embedded System HW & SW Co-Design

Evaluation (1/3) ( / ) Simulation-based methods

Cycle-accurate simulation
Software Read Memory Hardware Cycle 1 (do Inst1) Cycle 2 (do Inst2) Done! (3 cycle) Cycle 3 (do Inst2)

System level System-level simulation

Software Read Memory Done! (3 cycle) ( y )
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Hardware

Read Memory : Assume that it consumes 3 cycle

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Part II. Designing Embedded System HW & SW Co-Design

Evaluation (2/3) ( / ) Analytical methods

Static profiling
Complexity analysis of algorithms, the dependency p y y g , p y analysis of function call graph, etc.

High-level synthesis g y
Find an optimal mapping for the software tasks to the hardware
Exact method such as Integer/mixed linear program formulations, heuristics, evolutionary algorithms, etc.

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Part II. Designing Embedded System HW & SW Co-Design

Evaluation (3/3) ( / ) Combination of simulation-based and analytical methods

Trace based Trace-based performance analysis
A trace contains all memory access y Initial simulation Cache hit & miss statistics Use the trace to calculate performance

Analytical models with initial, calibrating simulation

Simulation results Exhaustive simulation
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Cache miss rate : 10~20% 10 20% Obtain Obt i ranges of f performance factor

P=A/B* Q = C * 100 + . Feed the i f F d th information ti Into the analytical model

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Part II. Designing Embedded System HW & SW Co-Design

Frameworks for DSE

System-level
Metropolis Mescal StepNP SPADE Artemis MILAN MESH SEAS Incisive-SPW CoCentric System Studio
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Micro-architecture centric
Mescal/Tipi ASIP-Meister / PEAS-III EXPRESSION LisaTek Chess / Checkers MaxCore & MaxSim

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Part II. Designing Embedded System HW & SW Co-Design

Example Metropolis ( / ) p p (1/4) Functionality modeling

Process Src Process Src { port Out out; void thread() { out.send(data); d(d ) } void doSomething() { } } Port Out { void send() {} }
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Medium S Medium S { void send() { } void receive() { } }

Process Sink Process Sink { port In in; void thread() { in.receive(data); i i (d ) } }

Port In { void receive() {} }

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Part II. Designing Embedded System HW & SW Co-Design

Example Metropolis ( / ) p p (2/4) Architecture modeling

Task 1 Process Task { P T k port TaskToCPU taskToCPU; void thread() { } void read() { } void write() { } void execute(int n) { // Consume n CPU cycles } }
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Task 2 CPU

Task n Medium CPU { M di void read() { // read from memory } void write() { // write to memory } }

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Part II. Designing Embedded System HW & SW Co-Design

Example Metropolis ( / ) p p (3/4) Mapping

Process Src Medium S Process Sink

Task 1 CPU

Task 2

Mapper { constraint { Src.send => Task1.write; Src.doSomething Src doSomething => Task1.execute(50); Task1 execute(50); Sink.receive => Task2.read; } }
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Part II. Designing Embedded System HW & SW Co-Design

Example Metropolis ( / ) p p (4/4) A part of the output in Simple case study example

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Part II. Designing Embedded System Platform-Based Design

Platform-Based Design g Main idea

Reusing & facilitating a common design to a variety of different applications y pp
Cell Phone Platform

Phone SW No. N 1

Phone SW No. N 2

Phone SW No. No n

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Phone Product No. 1

Phone Product No. 2

Phone Product No. n

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Part II. Designing Embedded System Platform-Based Design

What is the Platform?* (1/2) ( / ) Platform

A library of components
To generate a design at certain level of abstraction
Processor Memory M Bus

Platform instance
A set of components
Selected from the library(platform) P Parameters are set t t
* A. Sangiovanni-Vincentelli, Quo Vadis, SLD? Reasoning About the Trends d Challenges of S t T d and Ch ll f System L Level D i l Design, P Proceedings of th di f the IEEE, Vol. 95, No. 3, March 2007. KAIST SE LAB 2008

Processor P1 -Clock : 300Mhz Clock -Cache size : 16Kb - Bus B1 -Bandwidth : 10Mb/s -
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Part II. Designing Embedded System Platform-Based Design

What is the Platform? (2/2) ( / ) Multiple abstraction levels of the platform

Each platform instance in the abstraction levels can be reused
Functionality Level 1 Functionality Level 2 Functionality Level 3

Processor Memory Bus

ARM

MIPS ISA PCI

ARM920T ARM926EJ-S DDR-200 DDR-333 DDR2-533

R2000 R4600 8-bit ISA 16-bit ISA PCI 2.2 PCI 3.0
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DDR SDRAM DDR2 SDRAM

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DDR2-800

Part II. Designing Embedded System Platform-Based Design

Design Process g Meet-in-the-middle process

Combination of top-down and bottom-up approach pp

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Part II. Designing Embedded System Platform-Based Design

A Platform for Software Reuse API Platform*

* A. Sangiovanni-Vincentelli and Grant Martin, Platform-Based Design and Software Design Methodology for Embedded Systems, IEEE Design & Test, Vol. 18(6), November 2001. KAIST SE LAB 2008 28/35

Part III. Software Engineering in Embedded System Design y g

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Challenge in Embedded System Design g y g Consideration of flexible implementation

To address rapidly changing & increasing requirements q Sacrificing some degree of performance

Increasing usage of programmable elements instead of ASICs (Application Specific Integrated Circuits) Increasing complexity of application(software)
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Part III. Software Engineering in Embedded System Design

Research Issues (1/3) ( / ) In the view of the software process*

Embedded System Engineering

Issue 1 : Coordination of embedded software development process with other sub-processes Embedded Software Engineering Electrical Engineering Mechanical Engineering

Issue 2 : Specialized software development process for dealing with non-functional requirements (Memory, power, real-time requirements, etc.)
* Bass Graaf Marco Lormans and Hans Toetenel Embedded Software Engineering: Graaf, Toetenel, Embedded The State of the Practice, IEEE Software, Nov.-Dec., 2003 KAIST SE LAB 2008 31/35

Part III. Software Engineering in Embedded System Design

Research Issues (2/3) ( / ) In the view of the software model

HW & SW Partition HW Model M d l (Abstraction lv. 1) SW Model M d l (Abstraction lv. 1)

Issue 1 : DSE in a more abstract level Issue 2 : Performance/ energy-aware energy aware refactoring Issue 3 : Performance/ energy-related metric Issue 4 : Model-Driven Development

Map HW & SW
Evaluation failed

Evaluation

HW Model (Abstraction lv. n)

SW Model (Abstraction lv. n)

Map HW & SW KAIST SE LAB 2008

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Part III. Software Engineering in Embedded System Design

Research Issues (3/3) ( / ) In the view of the software code

HW & SW Partition Usually SystemC code

HW Model Map HW & SW

Evaluation failed

SW Model

Issue 1 : UML to SystemC Issue 2 : Application of code-level software engineering techniques Testing Clone detection Reverse engineering Metric
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Evaluation*

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References
[1] Michael Barr, "Embedded Systems Glossary, Netrino Technical Library, Available at http://www.netrino.com/Embedded-Systems/Glossary a ab e ttp // et o co / bedded Syste s/G ossa y [2] Frank Vahid and Tony Givargis, Embedded System Design: A Unified Hardware/Software Introduction, John Wiley & Sons, ISBN: 0471386782, 2002. 2002 [3] M. Gries. Methods for evaluating and covering the design space during early design development. Integr. VLSI J., 38(2):131183, 2004. [4] A. Sangiovanni-Vincentelli, Quo Vadis, SLD? Reasoning About the Trends and Challenges of System Level Design, Proceedings of the IEEE, Vol. 95, No. 3, March 2007. [5] Bass Graaf, Marco Lormans, and Hans Toetenel, Embedded Software Engineering: The State of the Practice, IEEE Software, Nov.-Dec., 2003 [6] A. Sangiovanni-Vincentelli and Grant Martin Platform-Based Design and A Sangiovanni Vincentelli Martin, Platform Based Software Design Methodology for Embedded Systems, IEEE Design & Test, Vol. 18(6), November 2001.

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Discussion Q&A

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