Operational Amplifiers

Lesson 5 Offset Compensation and Common Mode Rejection

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Outline

Output Offset External Compensation Networks Internal Compensation Internal Trimming Current Offset Minimizing Resistor Common Mode Rejection

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Output Offset

Ideally, if inverting = non-inverting, Vo = 0V Op-Amps high gain, smallest difference in input V or I causes output voltage Input differential amp, two BJTs or FETs Differential amp symmetrical, slightest difference in manufacture causes offset Changing operating temperature Variation in power supply voltage
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Output Offset

To measure output offset voltage:

Connect Op-Amp to Vcc / Vee Short both inputs to ground Measure output voltage

Typical offsets from 1mV to 10mV Datasheet Input Offset Voltage Difference in input voltage / current causes output offset...
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Output Offset

Output offset voltage:

Small issue for most AC output circuits Not a problem when capacitor coupled Comparator circuits go to Vsat anyway... DC coupled AC, offset amplified by next stage, may cause clipping! DC summing / scaling may require high precision, ie. measuring error voltage in closed loop control circuits (Power Supplies)
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External Compensation Networks

Essentially an adjustable biasing method Resistor network applies small voltage to one of the inputs Use resistor values to control biasing current (usually high values) May get complex Lost popularity to Internal Compensation or Trimming
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External Compensation Networks

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Internally Compensated Op-Amp

Op-Amp with Offset Null (optional) pins Connect a potentiometer to pins Direct adjustment of input stage biasing

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Internally Trimmed

High end Op-Amps individually tuned Before enclosing, each silicon die is tested Input stage Trimmed using laser or mechanical cutting Very low offsets achievable Offsets due to temperature still there

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Current Offset Minimizing Resistor

Even when Nulled or Trimmed, input currents may cause small additional offset Input current offsets in nA or pA... May be amplified Inverting amplifier, add small ROM Offset current causes a voltage across ROM that provides compensating feedback

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Current Offset Minimizing Resistor

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Common Mode Rejection

Ideally, for all conditions, if Vi1 = Vi2, Vo = 0V Usually assumed Vi1 = Vi2 = 0V If Vi1 = Vi2 0V, may cause offset at output Common Mode Rejection resists this offset Very useful in communications, allows use of twisted pairs to carry signal in noisy environment (Differential Signal)

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Common Mode Rejection

Common Mode Rejection Ratio (CMRR) Found in Data Sheet Typically ranges from 90dB to 110dB Available 120dB or more High CMRR Op-Amps block external noise on differential signal lines, however... Design of high CMRR Op-Amps may cause internal noise
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Common Mode Rejection

Ad Ad CMRR = or CMRR(dB) = 20 log A cm A cm
v od v ocm where Ad = and A cm = v id v icm

therefore v ocm

Ad v icm = CMRR

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Review

Output Offset External Compensation Networks Internal Compensation Internal Trimming Current Offset Minimizing Resistor Common Mode Rejection

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2012 Mladen Hruska This work is licensed under a Creative Commons Attribution-ShareAlike 2.5 Canada License

Credits and Attributions

Reference Text:

Gayakwad, R.A., (1988). Op-Amps and Linear Integrated Circuits.

Software:

Schematic diagram(s) drawn using National Instruments Multisim 12

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Copyright (c) 2012 by Mladen Hruska. This work is made available under the terms of the Creative Commons Attribution-ShareAlike 2.5 Canada license All images, diagrams, charts, etc. are the copyright work of Mladen Hruska if not immediately attributed otherwise. For more information: http://creativecommons.org/licenses/by-sa/2.5/ca/

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2012 Mladen Hruska This work is licensed under a Creative Commons Attribution-ShareAlike 2.5 Canada License