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EEE 223 Circuit Theory I Final Examination
M. K. Uygurolu, E. Erdil Jan 27,2006
2. Convert the circuit in Fig. P2 to current source representation.
a
b
4
2
12 V
Figure P2
12 V
6
a
b
a
b
2 A 6
EEE 223 Circuit Theory I Final Examination
M. K. Uygurolu, E. Erdil Jan 27,2006
3. Calculate what value of
L
R will absorb maximum power and find the maximum power
for the circuit in Fig.P3.
2
4 R
L
2 A
Figure P3
When
L Th
R R = it will absorb maximum power. The maximum power absorbed by
L
R :
2 2
max
8 64
4
4 4 4 16
Th
Th
V
P W
R
= = = =
=
In order to find
Th
R :
2
4 R
Th
= 4
:
Th
V
2
4 2 A V
oc
= V
Th
= 2 4=8 V
EEE 223 Circuit Theory I Final Examination
M. K. Uygurolu, E. Erdil Jan 27,2006
4. Use superposition to find i for the circuit in Fig.P4.
5 A 4
6
20 V
i
Figure P4
5 A 4
6
i'
4
6
20 V
i''
' '' 3 2 5 i i i A = + = + =
By using current division
5 6
' 3
6 4
i A
= =
+
20
'' 2
6 4
i A = =
+
EEE 223 Circuit Theory I Final Examination
M. K. Uygurolu, E. Erdil Jan 27,2006
5. (a)Use current division principle to find the current flowing through
3
R for the circuit
in Fig.P5(a).
I
s
R
3
R
2
R
1
Figure 5(a)
(b) Use voltage division principle to find the voltage across
3
R for the circuit in
Fig.P5(b).
.
R
3
R
2
R
1
V
s
+
V
_
+
V
s
_
Figure 5(b)
3
2 3
s
R
V V
R R
=
+
3
1
1 2 3
R s
R
i I
R R R
=
+ +
EEE 223 Circuit Theory I Final Examination
M. K. Uygurolu, E. Erdil Jan 27,2006
6. Given signals
1
V and
2
V , cascade an inverting op-amp with an inverting summer to
have an output
0 1 2
3 V V V =
50
50
V
1
V
2
V
0
450
150
450
EEE 223 Circuit Theory I Final Examination
M. K. Uygurolu, E. Erdil Jan 27,2006
7. Find
0
v in the circuit in Fig. P7.
100 V 80
10
60 20 30
4 v
0
+
v
0
_
v
0
5 v
0
100 V
SUPERNODE
Figure P7
KCL at the SUPERNODE:
0 0 0 0
0 0 0 0
0
0
5 100 5
0
10 60 20 30
multiply both sides by 60 yields:
30 600 5 3 2 0
40 600
15 V
v v v v
v v v v
v
v
+ + + =
+ + + =
=
=
EEE 223 Circuit Theory I Final Examination
M. K. Uygurolu, E. Erdil Jan 27,2006
8. The switch in the circuit in Fig. P8 has been in position 1 for a long time before
moving to position 2 at 0 t = . Find ( ) i t for 0 t .
20 V
3.3 k
0.1 F
i
10
4
i
t = 0
40 k
1
2
Figure P8
at 0 t =
20 V
3.3 k
40 k
1
2 i = 0
10
4
i = 0 V
+
v
c
(0-)=20 V
-
t = 0-
for 0 t
( ) ( ) 0 0 12 V
c c
v v = + =
20 V
3.3 k
0.1 F
i
10
4
i
40 k
1
2
t 0
+
v
c
-
EEE 223 Circuit Theory I Final Examination
M. K. Uygurolu, E. Erdil Jan 27,2006
( )
6
20 V
0.1 10 and 0
t
c
c c
dv
i v v e
dt
= =
eq
R C =
In order to find the equivalent resistance
eq
R seen by the capacitor, a test source is needed
to connect .
40 k 1 A
i = -1 A
10
4
i = -10
4
V
+
v
_
+
40 kV
_
KVL around the loop:
( )
4
40 10 0
50kV
k v
v
+ + =
=
50k
1
eq
v
R = =
Therefore
( ) ( )
3 6 3
200
6 200 6 200 200
50 10 0.1 10 5 10
20 V
0.1 10 20 0.1 10 4000 0.4 mA
t
c
t t t
v e
d
i e e e
dt
= =
=
= = =
EEE 223 Circuit Theory I Final Examination
M. K. Uygurolu, E. Erdil Jan 27,2006
9. The switch in the circuit in Fig. P9 has been open for a long time before closing at
0 t = . Find ( ) v t for 0 t .
12 V
400
t = 0
1.25 H
1.25 F
+
v
-
Figure P9
at 0 t =
12 V
400
1.25 H
+
v
-
t = 0-
i
L
= 0
+
v
c
= 12 V
-
( ) ( ) 0 12 V 0 0
c L
v i A = =
for 0 t
12 V
400
1.25 H
1.25 F
+
v
-
+
v
c
-
i
L
12 V
v
c
= v
EEE 223 Circuit Theory I Final Examination
M. K. Uygurolu, E. Erdil Jan 27,2006
KCL at node
c
v :
6
12
1.25 10 0
400
c c
L
v dv
i
dt
+ + = (1)
KVL around the loop:
1.25 0
L
c
di
v
dt
+ = (2)
If Eq. (1) is written at 0 t = + then ( ) 0 0
c
dv
dt
+ = .
From Eq.(1)
6
12
1.25 10
400
c c
L L
v dv
i i
dt
= (3)
Substitute Eq.3) into (2) yields:
6
2
2 6
2
6
2
2 2 6 6
2 2 2
12
1.25 1.25 10 0
400
1.25
1.25 10 0
400
10
or multiply both sides by
1.25
10 10
0 2000 640000 0
500 1.25
c c
c
c c
c
c c c c
c c
v dv d
v
dt dt
d v dv
v
dt dt
d v dv d v dv
v v
dt dt dt dt
| |
+ =
|
\ .
+ + =
+ + = + + =
characteristic equation:
2
2
1,2
1
2
2000 640000 0
2000 2000 4 640000
1000 600
2
The natural frequencies are
400
real and distinct natural frequencies OVERDAMPED case
1600
s s
s
s
s
+ + =
= =
=
`
=
)
( )
( )
( )
( )
400 1600
1 2
1 2
400 1600
1 2
1 2
0 12...................................(4)
400 1600
0 400 1600 0................(5)
t t
c
c
t t
c
c
v t Ae A e
v A A
d
v t Ae A e
dt
d
v A A
dt
= +
= + =
=
= =
Multipy Eq.(4) by 400 and add to Eq.(5) gives:
2
2
1200 4800
4
A
A
=
=
Substitute the value of A
2
into Eq.(4) yields:
1
16 A =
Therefore
( )
400 1600
( ) 16 4 V
t t
c
v t v t e e
= =